diff options
Diffstat (limited to 'src/usr/isteps/istep15')
| -rw-r--r-- | src/usr/isteps/istep15/host_build_stop_image.C | 89 | ||||
| -rw-r--r-- | src/usr/isteps/istep15/host_establish_ex_chiplet.C | 5 | ||||
| -rw-r--r-- | src/usr/isteps/istep15/host_start_stop_engine.C | 11 | ||||
| -rw-r--r-- | src/usr/isteps/istep15/proc_set_pba_homer_bar.C | 78 |
4 files changed, 101 insertions, 82 deletions
diff --git a/src/usr/isteps/istep15/host_build_stop_image.C b/src/usr/isteps/istep15/host_build_stop_image.C index 26e3677f4..6bc755314 100644 --- a/src/usr/isteps/istep15/host_build_stop_image.C +++ b/src/usr/isteps/istep15/host_build_stop_image.C @@ -445,7 +445,17 @@ void* host_build_stop_image (void *io_pArgs) //If running Sapphire need to place this at the top of memory instead if(is_sapphire_load()) { - l_memBase = get_top_homer_mem_addr(); + //Because the way P9N/P9C are init'ed for backwards HB / SBE + //compatibility (SMF never enabled -- thus unsecure homer to + //secure homer sc2 (system call to Ultravisor) doesn't work) during + //istep 15 need to "trick" hostboot into placing HOMER into normal + //memory @HRMOR (instead of secure SMF memory). When HB goes + //through istep 16 it will enter UV mode if SMF is enabled, and then + //when PM complex is restarted in istep 21, HOMER is moved to right + //spot. No movement of HOME oocurs in non-SMF mode; HOMER lands in + //non-secure memory. + + l_memBase = get_top_mem_addr(); assert (l_memBase != 0, "host_build_stop_image: Top of memory was 0!"); @@ -502,9 +512,6 @@ void* host_build_stop_image (void *io_pArgs) "Found %d functional procs in system", l_procChips.size() ); - auto l_unsecureHomerSize = - l_sys->getAttr<TARGETING::ATTR_UNSECURE_HOMER_SIZE>(); - for (const auto & l_procChip: l_procChips) { do { @@ -563,22 +570,12 @@ void* host_build_stop_image (void *io_pArgs) break; } - if(SECUREBOOT::SMF::isSmfEnabled()) - { - // In SMF mode, unsecure HOMER goes to the top of unsecure - // memory (2MB aligned); we need to subtract the size of the - // unsecure HOMER and align the resulting address to arrive - // at the correct location. - uint64_t l_unsecureHomerAddr = ALIGN_DOWN_X( - ISTEP::get_top_mem_addr() - - MAX_UNSECURE_HOMER_SIZE, - 2 * MEGABYTE); - l_procChip->setAttr<TARGETING::ATTR_UNSECURE_HOMER_ADDRESS> - (l_unsecureHomerAddr); - TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "host_build_stop_image: unsecure HOMER addr = 0x%.16llX", - l_unsecureHomerAddr); - } + //Set unsecure HOMER address to real HOMER, as this + //will allow SMF inits to become active (results in + //URMOR == HRMOR in non SMF memory). The processor self-restore + //code is 2MB into HOMER, so point the unsecure HOMER there. + l_procChip->setAttr<TARGETING::ATTR_UNSECURE_HOMER_ADDRESS> + (l_procRealMemAddr + (2 * MEGABYTE)); //Call p9_hcode_image_build.C HWP FAPI_INVOKE_HWP( l_errl, @@ -608,58 +605,6 @@ void* host_build_stop_image (void *io_pArgs) break; } - // We now need to copy the data that was put in l_temp_buffer2 - // by the p9_hcode_image_build procedure into the unsecure - // HOMER memory - if(SECUREBOOT::SMF::isSmfEnabled()) - { - auto l_unsecureHomerAddr = l_procChip-> - getAttr<TARGETING::ATTR_UNSECURE_HOMER_ADDRESS>(); - - - assert(l_unsecureHomerSize <= MAX_RING_BUF_SIZE, - "host_build_stop_image: unsecure HOMER is bigger than the output buffer"); - assert(l_unsecureHomerSize <= MAX_UNSECURE_HOMER_SIZE, - "host_build_stop_image: the size of unsecure HOMER is more than 0x%x", MAX_UNSECURE_HOMER_SIZE); - assert(l_unsecureHomerAddr, - "host_build_stop_image: the unsecure HOMER addr is 0"); - - void* l_unsecureHomerVAddr = mm_block_map( - reinterpret_cast<void*>(l_unsecureHomerAddr), - l_unsecureHomerSize); - assert(l_unsecureHomerVAddr, - "host_build_stop_image: could not map unsecure HOMER phys addr"); - memcpy(l_unsecureHomerVAddr, - l_temp_buffer2, - l_unsecureHomerSize); - int l_rc = mm_block_unmap(l_unsecureHomerVAddr); - if(l_rc) - { - /*@ - * @errortype - * @reasoncode ISTEP::RC_MM_UNMAP_FAILED - * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE - * @moduleid ISTEP::MOD_BUILD_HCODE_IMAGES - * @userdata1 Unsecure HOMER addr - * @userdata2 RC from mm_block_unmap - * @devdesc Could not unmap unsecure HOMER's virtual - * address - * @custdesc A problem occurred during the IPL of the - * system - */ - l_errl = new ERRORLOG::ErrlEntry( - ERRORLOG::ERRL_SEV_UNRECOVERABLE, - ISTEP::MOD_BUILD_HCODE_IMAGES, - ISTEP::RC_MM_UNMAP_FAILED, - reinterpret_cast<uint64_t>( - l_unsecureHomerVAddr), - l_rc, - ERRORLOG::ErrlEntry::ADD_SW_CALLOUT); - l_errl->collectTrace(ISTEP_COMP_NAME); - break; - } - } - l_errl = applyHcodeGenCpuRegs( l_procChip, l_pImageOut, l_sizeImageOut ); diff --git a/src/usr/isteps/istep15/host_establish_ex_chiplet.C b/src/usr/isteps/istep15/host_establish_ex_chiplet.C index be5640167..1d89bfa80 100644 --- a/src/usr/isteps/istep15/host_establish_ex_chiplet.C +++ b/src/usr/isteps/istep15/host_establish_ex_chiplet.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ +/* Contributors Listed Below - COPYRIGHT 2016,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -53,7 +53,6 @@ void* host_establish_ex_chiplet (void *io_pArgs) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_establish_ex_chiplet entry" ); ISTEP_ERROR::IStepError l_StepError; - #ifndef CONFIG_AXONE_BRING_UP errlHndl_t l_errl = NULL; do { //Use targeting code to get a list of all processors @@ -64,6 +63,7 @@ void* host_establish_ex_chiplet (void *io_pArgs) { const fapi2::Target<TARGET_TYPE_PROC_CHIP> l_fapi_cpu_target(l_procChip); + // call p9_update_ec_eq_state.C HWP FAPI_INVOKE_HWP( l_errl, p9_update_ec_eq_state, @@ -78,7 +78,6 @@ void* host_establish_ex_chiplet (void *io_pArgs) } } }while(0); - #endif // end task, returning any errorlogs to IStepDisp TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_establish_ex_chiplet exit" ); diff --git a/src/usr/isteps/istep15/host_start_stop_engine.C b/src/usr/isteps/istep15/host_start_stop_engine.C index 27580947d..b89804fe3 100644 --- a/src/usr/isteps/istep15/host_start_stop_engine.C +++ b/src/usr/isteps/istep15/host_start_stop_engine.C @@ -55,7 +55,7 @@ void* host_start_stop_engine (void *io_pArgs) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_host_start_stop_engine entry" ); ISTEP_ERROR::IStepError l_StepError; - errlHndl_t l_errl = NULL; + errlHndl_t l_errl __attribute__((unused)) = NULL; // Cast to void just to get around unused var warning if #ifdef's dont work // out to actually use the l_errl variable @@ -79,11 +79,9 @@ void* host_start_stop_engine (void *io_pArgs) } #endif -// Skip initializing the PM complex in axone simics for now -#ifndef CONFIG_AXONE_BRING_UP //Use targeting code to get a list of all processors TARGETING::TargetHandleList l_procChips; - getAllChips( l_procChips, TARGETING::TYPE_PROC ); + getAllChips( l_procChips, TARGETING::TYPE_PROC ); for (const auto & l_procChip: l_procChips) { @@ -92,6 +90,10 @@ void* host_start_stop_engine (void *io_pArgs) fapi2::Target<TARGET_TYPE_PROC_CHIP>l_fapi2CpuTarget( (l_procChip)); + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Calling p9_pm_stop_gpe_init for 0x%.8X target", + TARGETING::get_huid(l_procChip) ); + //call p9_pm_stop_gpe_init.C HWP FAPI_INVOKE_HWP(l_errl, p9_pm_stop_gpe_init, @@ -105,7 +107,6 @@ void* host_start_stop_engine (void *io_pArgs) TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_start_stop_engine:: failed on proc with HUID : %d",TARGETING::get_huid(l_procChip) ); } } -#endif #ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS // Starting SGPE in istep15.4 causes OIMR0 register to be improperly diff --git a/src/usr/isteps/istep15/proc_set_pba_homer_bar.C b/src/usr/isteps/istep15/proc_set_pba_homer_bar.C index 0173b1a15..5c02af9df 100644 --- a/src/usr/isteps/istep15/proc_set_pba_homer_bar.C +++ b/src/usr/isteps/istep15/proc_set_pba_homer_bar.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -46,10 +46,17 @@ #include <return_code.H> #include <p9_pm_set_homer_bar.H> +#include <secureboot/smf_utils.H> +#include <secureboot/smf.H> +#include <isteps/mem_utils.H> +#include <util/align.H> + + //Namespaces using namespace ERRORLOG; using namespace TARGETING; using namespace fapi2; +using namespace ISTEP; namespace ISTEP_15 { @@ -62,12 +69,56 @@ void* proc_set_pba_homer_bar (void *io_pArgs) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_set_pba_homer_bar entry" ); ISTEP_ERROR::IStepError l_StepError; - errlHndl_t l_errl = NULL; + errlHndl_t l_errl = nullptr; TARGETING::TargetHandleList l_procChips; + uint64_t l_smfBase = 0x0; + uint64_t l_unsecureHomerAddr = get_top_mem_addr(); + + + //Determine top-level system target + TARGETING::Target* l_sys = nullptr; + TARGETING::targetService().getTopLevelTarget(l_sys); + assert(l_sys != nullptr, "Top level target was nullptr!"); + + //Because the way P9N/P9C are init'ed for backwards HB / SBE + //compatibility (SMF never enabled -- thus unsecure homer to + //secure homer sc2 (system call to Ultravisor) doesn't work) during istep 15 + //need to "trick" hostboot into placing HOMER into normal memory @ + //HRMOR. When HB goes through istep 16 it will enter UV + //mode if SMF is enabled, and then when PM complex is restarted + //in istep 21, HOMER is moved to right spot + if(SECUREBOOT::SMF::isSmfEnabled()) + { + l_smfBase = get_top_homer_mem_addr(); + assert(l_smfBase != 0, + "proc_set_pba_homer_bar: Top of SMF memory was 0!"); + if(is_sapphire_load()) + { + l_smfBase -= VMM_ALL_HOMER_OCC_MEMORY_SIZE; + // Unsecure HOMER address is used in istep21 to place the + // unsecure part of the HOMER image outside of SMF memory. + // Unsecure HOMER goes to the top of unsecure + // memory (2MB aligned); we need to subtract the size of the + // unsecure HOMER and align the resulting address to arrive + // at the correct location. + l_unsecureHomerAddr = ALIGN_DOWN_X(l_unsecureHomerAddr - + MAX_UNSECURE_HOMER_SIZE, + 2 * MEGABYTE); + } + assert(l_unsecureHomerAddr != 0, + "proc_set_pba_homer_bar: Unsecure HOMER addr was 0!"); + + //Since we have the HOMER location defined, set the + // OCC common attribute to be used later by pm code + l_sys->setAttr<TARGETING::ATTR_OCC_COMMON_AREA_PHYS_ADDR> + (l_smfBase + VMM_HOMER_REGION_SIZE); + } //Use targeting code to get a list of all processors getAllChips( l_procChips, TARGETING::TYPE_PROC ); + + //Loop through all of the procs and call the HWP on each one for (const auto & l_procChip: l_procChips) { @@ -92,6 +143,29 @@ void* proc_set_pba_homer_bar (void *io_pArgs) l_StepError.addErrorDetails( l_errl ); errlCommit( l_errl, HWPF_COMP_ID ); } + + if(SECUREBOOT::SMF::isSmfEnabled()) + { + //Set correct SMF value used later in istep 21 + // calculate size and location of the HCODE output buffer + uint32_t l_procNum = + l_procChip->getAttr<TARGETING::ATTR_POSITION>(); + uint64_t l_procOffsetAddr = l_procNum * VMM_HOMER_INSTANCE_SIZE; + + l_procChip->setAttr<TARGETING::ATTR_HOMER_PHYS_ADDR> + (l_smfBase + l_procOffsetAddr); + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "Update %.8X HOMER from 0x%.16llX to 0x%.16llX for SMF", + TARGETING::get_huid(l_procChip), homerAddr, + (l_smfBase + l_procOffsetAddr)); + + l_procChip->setAttr<TARGETING::ATTR_UNSECURE_HOMER_ADDRESS> + (l_unsecureHomerAddr); + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "proc_set_pba_homer_bar: unsecure HOMER addr = 0x%.16llX", + l_unsecureHomerAddr); + } + } TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_set_pba_homer_bar exit" ); |
