diff options
Diffstat (limited to 'src/usr/isteps/istep15/host_start_stop_engine.C')
-rw-r--r-- | src/usr/isteps/istep15/host_start_stop_engine.C | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/usr/isteps/istep15/host_start_stop_engine.C b/src/usr/isteps/istep15/host_start_stop_engine.C index 27580947d..b89804fe3 100644 --- a/src/usr/isteps/istep15/host_start_stop_engine.C +++ b/src/usr/isteps/istep15/host_start_stop_engine.C @@ -55,7 +55,7 @@ void* host_start_stop_engine (void *io_pArgs) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_host_start_stop_engine entry" ); ISTEP_ERROR::IStepError l_StepError; - errlHndl_t l_errl = NULL; + errlHndl_t l_errl __attribute__((unused)) = NULL; // Cast to void just to get around unused var warning if #ifdef's dont work // out to actually use the l_errl variable @@ -79,11 +79,9 @@ void* host_start_stop_engine (void *io_pArgs) } #endif -// Skip initializing the PM complex in axone simics for now -#ifndef CONFIG_AXONE_BRING_UP //Use targeting code to get a list of all processors TARGETING::TargetHandleList l_procChips; - getAllChips( l_procChips, TARGETING::TYPE_PROC ); + getAllChips( l_procChips, TARGETING::TYPE_PROC ); for (const auto & l_procChip: l_procChips) { @@ -92,6 +90,10 @@ void* host_start_stop_engine (void *io_pArgs) fapi2::Target<TARGET_TYPE_PROC_CHIP>l_fapi2CpuTarget( (l_procChip)); + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Calling p9_pm_stop_gpe_init for 0x%.8X target", + TARGETING::get_huid(l_procChip) ); + //call p9_pm_stop_gpe_init.C HWP FAPI_INVOKE_HWP(l_errl, p9_pm_stop_gpe_init, @@ -105,7 +107,6 @@ void* host_start_stop_engine (void *io_pArgs) TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_start_stop_engine:: failed on proc with HUID : %d",TARGETING::get_huid(l_procChip) ); } } -#endif #ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS // Starting SGPE in istep15.4 causes OIMR0 register to be improperly |