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-rw-r--r--src/usr/isteps/istep13/call_mss_ddr_phy_reset.C6
-rw-r--r--src/usr/isteps/istep13/call_mss_draminit.C285
-rw-r--r--src/usr/isteps/istep13/call_mss_draminit_mc.C82
-rw-r--r--src/usr/isteps/istep13/call_mss_draminit_trainadv.C16
-rw-r--r--src/usr/isteps/istep13/call_mss_draminit_training.C4
-rw-r--r--src/usr/isteps/istep13/call_mss_scominit.C380
-rw-r--r--src/usr/isteps/istep13/istep13consts.H4
-rw-r--r--src/usr/isteps/istep13/makefile120
8 files changed, 618 insertions, 279 deletions
diff --git a/src/usr/isteps/istep13/call_mss_ddr_phy_reset.C b/src/usr/isteps/istep13/call_mss_ddr_phy_reset.C
index 00ffaf2fb..4f28f980b 100644
--- a/src/usr/isteps/istep13/call_mss_ddr_phy_reset.C
+++ b/src/usr/isteps/istep13/call_mss_ddr_phy_reset.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2017 */
+/* Contributors Listed Below - COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -41,7 +41,9 @@
#include <fapi2.H>
#include <fapi2/plat_hwp_invoker.H>
#include <p9_mss_ddr_phy_reset.H>
+#ifndef CONFIG_AXONE
#include <p9c_mss_ddr_phy_reset.H>
+#endif
using namespace ERRORLOG;
using namespace ISTEP;
@@ -103,6 +105,7 @@ void* call_mss_ddr_phy_reset (void *io_pArgs)
} // end l_mcbist loop
+#ifndef CONFIG_AXONE
if(l_stepError.getErrorHandle() == NULL)
{
// Get all Centaur targets
@@ -169,6 +172,7 @@ void* call_mss_ddr_phy_reset (void *io_pArgs)
}
}
+#endif
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
"call_mss_ddr_phy_reset exit" );
diff --git a/src/usr/isteps/istep13/call_mss_draminit.C b/src/usr/isteps/istep13/call_mss_draminit.C
index 915bc992b..012d3111a 100644
--- a/src/usr/isteps/istep13/call_mss_draminit.C
+++ b/src/usr/isteps/istep13/call_mss_draminit.C
@@ -23,7 +23,7 @@
/* */
/* IBM_PROLOG_END_TAG */
-//Error handling and tracing
+// Error Handling and Tracing Support
#include <errl/errlentry.H>
#include <errl/errlmanager.H>
#include <errl/errludtarget.H>
@@ -32,12 +32,15 @@
#include <initservice/initserviceif.H>
#include <plat_trace.H>
-//Istep 13 framework
+// Generated files
+#include <config.h>
+
+// Istep 13 framework
#include <istepHelperFuncs.H>
#include "istep13consts.H"
#include "platform_vddr.H"
-// targeting support
+// Targeting support
#include <targeting/common/commontargeting.H>
#include <targeting/common/util.H>
#include <targeting/common/utilFilter.H>
@@ -47,14 +50,21 @@
//From Import Directory (EKB Repository)
#include <fapi2.H>
-#include <p9_mss_draminit.H>
-#include <p9c_mss_draminit.H>
+#ifndef CONFIG_AXONE
+ #include <p9_mss_draminit.H>
+ #include <p9c_mss_draminit.H>
+#else
+#include <chipids.H>
+ #include <exp_draminit.H>
+ #include <gem_draminit.H>
+#endif
-#ifdef CONFIG_NVDIMM
// NVDIMM support
+#ifdef CONFIG_NVDIMM
#include <isteps/nvdimm/nvdimm.H>
#endif
+
using namespace ERRORLOG;
using namespace ISTEP;
using namespace ISTEP_ERROR;
@@ -62,8 +72,49 @@ using namespace TARGETING;
namespace ISTEP_13
{
+// Declare local functions
+void nimbus_mss_draminit(IStepError & io_istepError);
+void cumulus_mss_draminit(IStepError & io_istepError);
+void axone_mss_draminit(IStepError & io_istepError);
+void mss_post_draminit( IStepError & io_stepError );
-void mss_post_draminit( IStepError & io_stepError )
+void* call_mss_draminit (void *io_pArgs)
+{
+ IStepError l_stepError;
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_draminit entry" );
+ auto l_procModel = TARGETING::targetService().getProcessorModel();
+
+ switch (l_procModel)
+ {
+ case TARGETING::MODEL_CUMULUS:
+ cumulus_mss_draminit(l_stepError);
+ break;
+ case TARGETING::MODEL_AXONE:
+ axone_mss_draminit(l_stepError);
+ break;
+ case TARGETING::MODEL_NIMBUS:
+ nimbus_mss_draminit(l_stepError);
+ break;
+ default:
+ assert(0, "call_mss_draminit: Unsupported model type 0x%04X",
+ l_procModel);
+ break;
+ }
+
+ // call POST_DRAM_INIT function, if nothing failed above
+ if( INITSERVICE::spBaseServicesEnabled() &&
+ (l_stepError.getErrorHandle() == nullptr) )
+ {
+ mss_post_draminit(l_stepError);
+ }
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_draminit exit" );
+
+ return l_stepError.getErrorHandle();
+}
+
+void mss_post_draminit( IStepError & io_stepError )
{
errlHndl_t l_err = NULL;
bool rerun_vddr = false;
@@ -144,14 +195,11 @@ void mss_post_draminit( IStepError & io_stepError )
return;
}
-void* call_mss_draminit (void *io_pArgs)
+#ifndef CONFIG_AXONE
+void nimbus_mss_draminit(IStepError & io_istepError)
{
errlHndl_t l_err = NULL;
- IStepError l_stepError;
-
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_draminit entry" );
-
// Get all MCBIST targets
TARGETING::TargetHandleList l_mcbistTargetList;
getAllChiplets(l_mcbistTargetList, TYPE_MCBIST);
@@ -171,6 +219,10 @@ void* call_mss_draminit (void *io_pArgs)
TARGETING::TargetHandleList l_dimmTargetList;
getChildAffinityTargets(l_dimmTargetList, l_mcbist_target, CLASS_NA, TYPE_DIMM);
+ // Generate valid encryption keys
+ NVDIMM::nvdimm_gen_keys();
+
+ // Walk the dimm list and init nvdimms
for (const auto & l_dimm : l_dimmTargetList)
{
if (isNVDIMM(l_dimm))
@@ -178,7 +230,12 @@ void* call_mss_draminit (void *io_pArgs)
NVDIMM::nvdimm_init(l_dimm);
}
}
+ // After nvdimm init
+ // - nvdimm controller initialized
+ // - nvdimm encryption unlocked
+ // - nvdimms disarmed
#endif
+
FAPI_INVOKE_HWP(l_err, p9_mss_draminit, l_fapi_mcbist_target);
if (l_err)
@@ -191,12 +248,12 @@ void* call_mss_draminit (void *io_pArgs)
ErrlUserDetailsTarget(l_mcbist_target).addToLog(l_err);
// Create IStep error log and cross reference to error that occurred
- l_stepError.addErrorDetails( l_err );
-
- break;
+ io_istepError.addErrorDetails( l_err );
// Commit Error
errlCommit( l_err, HWPF_COMP_ID );
+
+ break;
}
else
{
@@ -206,85 +263,145 @@ void* call_mss_draminit (void *io_pArgs)
}
} // endfor mcbist's
+}
+void cumulus_mss_draminit(IStepError & io_istepError)
+{
+ errlHndl_t l_err = NULL;
+ // Get all Centaur targets
+ TARGETING::TargetHandleList l_membufTargetList;
+ getAllChips(l_membufTargetList, TYPE_MEMBUF);
- if(l_stepError.getErrorHandle() == NULL)
+ for (const auto & l_membufTarget : l_membufTargetList )
{
- // Get all Centaur targets
- TARGETING::TargetHandleList l_membufTargetList;
- getAllChips(l_membufTargetList, TYPE_MEMBUF);
-
- for (TargetHandleList::const_iterator
- l_membuf_iter = l_membufTargetList.begin();
- l_membuf_iter != l_membufTargetList.end();
- ++l_membuf_iter)
+ TARGETING::TargetHandleList l_mbaTargetList;
+ getChildChiplets(l_mbaTargetList, l_membufTarget, TYPE_MBA);
+
+ for (const auto & l_mbaTarget : l_mbaTargetList )
{
- // make a local copy of the target for ease of use
- TARGETING::Target* l_pCentaur = *l_membuf_iter;
-
- TARGETING::TargetHandleList l_mbaTargetList;
- getChildChiplets(l_mbaTargetList,
- l_pCentaur,
- TYPE_MBA);
-
- for (TargetHandleList::const_iterator
- l_mba_iter = l_mbaTargetList.begin();
- l_mba_iter != l_mbaTargetList.end();
- ++l_mba_iter)
- {
- // Make a local copy of the target for ease of use
- TARGETING::Target* l_mbaTarget = *l_mba_iter;
-
- // Dump current run on target
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "Running p9c_mss_draminit HWP on "
- "target HUID %.8X", TARGETING::get_huid(l_mbaTarget));
-
- // call the HWP with each target
- fapi2::Target <fapi2::TARGET_TYPE_MBA_CHIPLET> l_fapi_mba_target(l_mbaTarget);
-
- FAPI_INVOKE_HWP(l_err, p9c_mss_draminit, l_fapi_mba_target);
-
- // process return code.
- if ( l_err )
- {
- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
- "ERROR 0x%.8X : p9c_mss_draminit HWP returns error",
- l_err->reasonCode());
-
- // capture the target data in the elog
- ErrlUserDetailsTarget(l_mbaTarget).addToLog(l_err);
-
- // Create IStep error log and cross reference to error that occurred
- l_stepError.addErrorDetails( l_err );
-
- // Commit Error
- errlCommit( l_err, HWPF_COMP_ID );
-
- break;
- }
- else
- {
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "SUCCESS running p9c_mss_draminit HWP on "
- "target HUID %.8X", TARGETING::get_huid(l_mbaTarget));
- }
-
- }
- }
+ // Dump current run on target
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running p9c_mss_draminit HWP on "
+ "target HUID %.8X", TARGETING::get_huid(l_mbaTarget));
- }
+ // call the HWP with each target
+ fapi2::Target <fapi2::TARGET_TYPE_MBA_CHIPLET> l_fapi_mba_target(l_mbaTarget);
+
+ FAPI_INVOKE_HWP(l_err, p9c_mss_draminit, l_fapi_mba_target);
+
+ // process return code.
+ if ( l_err )
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X : p9c_mss_draminit HWP returns error",
+ l_err->reasonCode());
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_mbaTarget).addToLog(l_err);
+
+ // Create IStep error log and cross reference to error that occurred
+ io_istepError.addErrorDetails( l_err );
+
+ // Commit Error
+ errlCommit( l_err, HWPF_COMP_ID );
- // call POST_DRAM_INIT function
- if(INITSERVICE::spBaseServicesEnabled())
+ break;
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS running p9c_mss_draminit HWP on "
+ "target HUID %.8X", TARGETING::get_huid(l_mbaTarget));
+ }
+ } // end MBA loop
+ } // end MEMBUF loop
+}
+
+#else
+void nimbus_mss_draminit(IStepError & io_istepError)
+{
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Error: Trying to call 'p9_mss_draminit' but Nimbus code is not compiled in");
+ assert(0, "Calling wrong Model's HWPs");
+}
+
+void cumulus_mss_draminit(IStepError & io_istepError)
+{
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Error: Trying to call 'p9c_mss_draminit' but Cumulus code is not compiled in");
+ assert(0, "Calling wrong Model's HWPs");
+}
+#endif
+
+#ifdef CONFIG_AXONE
+void axone_mss_draminit(IStepError & io_istepError)
+{
+ errlHndl_t l_err = NULL;
+
+ // Get all OCMB targets
+ TARGETING::TargetHandleList l_ocmbTargetList;
+ getAllChips(l_ocmbTargetList, TYPE_OCMB_CHIP);
+
+ bool isGeminiChip = false;
+ for ( const auto & l_ocmb : l_ocmbTargetList )
{
- mss_post_draminit(l_stepError);
- }
+ fapi2::Target <fapi2::TARGET_TYPE_OCMB_CHIP> l_fapi_ocmb_target(l_ocmb);
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_draminit exit" );
+ // check EXPLORER first as this is most likely the configuration
+ uint32_t chipId = l_ocmb->getAttr< TARGETING::ATTR_CHIP_ID>();
+ if (chipId == POWER_CHIPID::EXPLORER_16)
+ {
+ isGeminiChip = false;
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running exp_draminit HWP on target HUID 0x%.8X",
+ TARGETING::get_huid(l_ocmb) );
+ FAPI_INVOKE_HWP(l_err, exp_draminit, l_fapi_ocmb_target);
+ }
+ else
+ {
+ isGeminiChip = true;
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running gem_draminit HWP on target HUID 0x%.8X, chipId 0x%.4X",
+ TARGETING::get_huid(l_ocmb), chipId );
+ FAPI_INVOKE_HWP(l_err, gem_draminit, l_fapi_ocmb_target);
+ }
- return l_stepError.getErrorHandle();
+ // process return code.
+ if ( l_err )
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X : %s_draminit HWP returned error",
+ l_err->reasonCode(), isGeminiChip?"gem":"exp");
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_ocmb).addToLog(l_err);
+
+ // Create IStep error log and cross reference to error that occurred
+ io_istepError.addErrorDetails( l_err );
+
+ // Commit Error
+ errlCommit( l_err, HWPF_COMP_ID );
+
+ break;
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS running %s_draminit HWP on target HUID 0x%.8X",
+ isGeminiChip?"gem":"exp", TARGETING::get_huid(l_ocmb) );
+ }
+ } // end of OCMB loop
+}
+
+#else
+
+void axone_mss_draminit(IStepError & io_istepError)
+{
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Error: Trying to call 'exp_draminit' or 'gem_draminit' but Axone code is not compiled in");
+ assert(0, "Calling wrong Model's HWPs");
}
+#endif
};
diff --git a/src/usr/isteps/istep13/call_mss_draminit_mc.C b/src/usr/isteps/istep13/call_mss_draminit_mc.C
index cee7771bf..54b790de2 100644
--- a/src/usr/isteps/istep13/call_mss_draminit_mc.C
+++ b/src/usr/isteps/istep13/call_mss_draminit_mc.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2017 */
+/* Contributors Listed Below - COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -44,8 +44,14 @@
//From Import Directory (EKB Repository)
#include <config.h>
#include <fapi2.H>
+#ifdef CONFIG_AXONE
+#include <exp_draminit_mc.H>
+#include <chipids.H> // for EXPLORER ID
+#else
#include <p9_mss_draminit_mc.H>
#include <p9c_mss_draminit_mc.H>
+#endif
+
using namespace ERRORLOG;
@@ -66,6 +72,8 @@ void* call_mss_draminit_mc (void *io_pArgs)
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,"call_mss_draminit_mc entry" );
+#ifndef CONFIG_AXONE
+
// Get all MCBIST
TARGETING::TargetHandleList l_mcbistTargetList;
getAllChiplets(l_mcbistTargetList, TYPE_MCBIST);
@@ -117,8 +125,8 @@ void* call_mss_draminit_mc (void *io_pArgs)
{
// Dump current run on target
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "Running p9_mss_draminit_mc HWP on "
- "target HUID %.8X", TARGETING::get_huid(l_membuf_target));
+ "Running p9_mss_draminit_mc HWP on target HUID %.8X",
+ TARGETING::get_huid(l_membuf_target) );
fapi2::Target <fapi2::TARGET_TYPE_MEMBUF_CHIP> l_fapi_membuf_target
(l_membuf_target);
@@ -133,26 +141,84 @@ void* call_mss_draminit_mc (void *io_pArgs)
l_err->reasonCode());
// capture the target data in the elog
- ErrlUserDetailsTarget(l_fapi_membuf_target).addToLog( l_err );
+ ErrlUserDetailsTarget(l_membuf_target).addToLog( l_err );
- // Create IStep error log and cross reference to error that occurred
+ // Create IStep error log and cross reference to error
+ // that occurred
l_stepError.addErrorDetails( l_err );
// Commit Error
errlCommit( l_err, HWPF_COMP_ID );
-
+
break;
}
else
{
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
"SUCCESS running p9c_mss_draminit_mc HWP on "
- "target HUID %.8X", TARGETING::get_huid(l_fapi_membuf_target));
+ "target HUID %.8X",
+ TARGETING::get_huid(l_membuf_target));
}
-
}
}
+#else
+
+ // Get all OCMB targets
+ TARGETING::TargetHandleList l_ocmbTargetList;
+ getAllChips(l_ocmbTargetList, TYPE_OCMB_CHIP);
+
+ for (const auto & l_ocmb_target : l_ocmbTargetList)
+ {
+ // check EXPLORER first as this is most likely the configuration
+ uint32_t chipId = l_ocmb_target->getAttr< TARGETING::ATTR_CHIP_ID>();
+ if (chipId == POWER_CHIPID::EXPLORER_16)
+ {
+ fapi2::Target <fapi2::TARGET_TYPE_OCMB_CHIP> l_fapi_ocmb_target
+ (l_ocmb_target);
+
+ // Dump current run on target
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running exp_draminit_mc HWP on "
+ "target HUID %.8X", TARGETING::get_huid(l_ocmb_target));
+
+ // call the HWP with each fapi2::Target
+ FAPI_INVOKE_HWP(l_err, exp_draminit_mc, l_fapi_ocmb_target);
+ }
+ else
+ {
+ // Gemini, NOOP
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Skipping draminit_mc HWP on target HUID 0x%.8X, chipId 0x%.4X",
+ TARGETING::get_huid(l_ocmb_target), chipId );
+ }
+ if (l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X : exp_draminit_mc HWP returns error",
+ l_err->reasonCode());
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_ocmb_target).addToLog( l_err );
+
+ // Create IStep error log and cross reference to error that occurred
+ l_stepError.addErrorDetails( l_err );
+
+ // Commit Error
+ errlCommit( l_err, HWPF_COMP_ID );
+
+ break;
+ }
+ else if (chipId == POWER_CHIPID::EXPLORER_16)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS running exp_draminit_mc HWP on target HUID %.8X",
+ TARGETING::get_huid(l_ocmb_target));
+ }
+ }
+
+#endif
+
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_draminit_mc exit" );
return l_stepError.getErrorHandle();
diff --git a/src/usr/isteps/istep13/call_mss_draminit_trainadv.C b/src/usr/isteps/istep13/call_mss_draminit_trainadv.C
index fc42f7264..31e0a50d3 100644
--- a/src/usr/isteps/istep13/call_mss_draminit_trainadv.C
+++ b/src/usr/isteps/istep13/call_mss_draminit_trainadv.C
@@ -110,6 +110,7 @@ class MembufWorkItem: public IStepWorkItem
//******************************************************************************
void MembufWorkItem::operator()()
{
+#ifndef CONFIG_AXONE
errlHndl_t l_err = nullptr;
// reset watchdog for each memb as this function can be very slow
@@ -154,7 +155,7 @@ void MembufWorkItem::operator()()
mutex_unlock(&g_stepErrorMutex);
// Commit Error
- errlCommit( l_err, HWPF_COMP_ID );
+ errlCommit( l_err, ISTEP_COMP_ID );
break;
}
@@ -165,6 +166,8 @@ void MembufWorkItem::operator()()
TARGETING::get_huid(l_mbaTarget));
}
}
+#endif
+
}
@@ -210,7 +213,7 @@ void* call_mss_draminit_trainadv (void *io_pArgs)
l_stepError.addErrorDetails( l_err );
// Commit Error
- errlCommit( l_err, HWPF_COMP_ID );
+ errlCommit( l_err, ISTEP_COMP_ID );
}
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
@@ -252,7 +255,14 @@ void* call_mss_draminit_trainadv (void *io_pArgs)
tp.start();
//wait for all workitems to complete, then clean up all threads.
- tp.shutdown();
+ l_err = tp.shutdown();
+ if(l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ ERR_MRK"call_mss_draminit_trainadv: thread pool returned an error");
+ l_stepError.addErrorDetails(l_err);
+ errlCommit(l_err, ISTEP_COMP_ID);
+ }
}
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
diff --git a/src/usr/isteps/istep13/call_mss_draminit_training.C b/src/usr/isteps/istep13/call_mss_draminit_training.C
index a167457e9..d790e3483 100644
--- a/src/usr/isteps/istep13/call_mss_draminit_training.C
+++ b/src/usr/isteps/istep13/call_mss_draminit_training.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2017 */
+/* Contributors Listed Below - COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -102,6 +102,7 @@ void* call_mss_draminit_training (void *io_pArgs)
}
}
+#ifndef CONFIG_AXONE
if(l_stepError.getErrorHandle() == NULL)
{
// Get all Centaur targets
@@ -169,6 +170,7 @@ void* call_mss_draminit_training (void *io_pArgs)
}
}
+#endif
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
"call_mss_draminit_training exit" );
diff --git a/src/usr/isteps/istep13/call_mss_scominit.C b/src/usr/isteps/istep13/call_mss_scominit.C
index 69e05c7ee..6c623f1d2 100644
--- a/src/usr/isteps/istep13/call_mss_scominit.C
+++ b/src/usr/isteps/istep13/call_mss_scominit.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2019 */
+/* Contributors Listed Below - COPYRIGHT 2015,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -42,10 +42,13 @@
#include <config.h>
#include <fapi2.H>
#include <p9_mss_scominit.H>
-#include <p9_throttle_sync.H>
-#include <p9c_mss_scominit.H>
#ifdef CONFIG_AXONE
-#include <exp_scominit.H>
+ #include <exp_scominit.H>
+ #include <chipids.H> // for EXPLORER ID
+ #include <p9a_throttle_sync.H>
+#else
+ #include <p9c_mss_scominit.H>
+ #include <p9_throttle_sync.H>
#endif
using namespace ERRORLOG;
@@ -55,163 +58,290 @@ using namespace TARGETING;
namespace ISTEP_13
{
+void nimbus_call_mss_scominit(IStepError & io_istepError);
+void cumulus_call_mss_scominit(IStepError & io_istepError);
+void axone_call_mss_scominit(IStepError & io_istepError);
+void run_proc_throttle_sync(IStepError & io_istepError);
+
void* call_mss_scominit (void *io_pArgs)
{
- errlHndl_t l_err = NULL;
-
- IStepError l_stepError;
+ IStepError l_StepError;
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_scominit entry" );
+ auto l_procModel = TARGETING::targetService().getProcessorModel();
- do
+ switch (l_procModel)
{
- // Get all MCBIST targets
- TARGETING::TargetHandleList l_mcbistTargetList;
- getAllChiplets(l_mcbistTargetList, TYPE_MCBIST);
+ case TARGETING::MODEL_CUMULUS:
+ cumulus_call_mss_scominit(l_StepError);
+ break;
+ case TARGETING::MODEL_AXONE:
+ axone_call_mss_scominit(l_StepError);
+ break;
+ case TARGETING::MODEL_NIMBUS:
+ nimbus_call_mss_scominit(l_StepError);
+ break;
+ default:
+ assert(0, "call_mss_scominit: Unsupported model type 0x%04X",
+ l_procModel);
+ break;
+ }
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_scominit exit" );
+
+ // end task, returning any errorlogs to IStepDisp
+ return l_StepError.getErrorHandle();
+}
+
+#ifndef CONFIG_AXONE
+
+void nimbus_call_mss_scominit(IStepError & io_istepError)
+{
+ errlHndl_t l_err = nullptr;
- for (const auto & l_target : l_mcbistTargetList)
+ // Get all MCBIST targets
+ TARGETING::TargetHandleList l_mcbistTargetList;
+ getAllChiplets(l_mcbistTargetList, TYPE_MCBIST);
+
+ for (const auto & l_target : l_mcbistTargetList)
+ {
+ // Dump current run on target
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running p9_mss_scominit HWP on target HUID %.8X",
+ TARGETING::get_huid(l_target));
+
+ fapi2::Target <fapi2::TARGET_TYPE_MCBIST> l_fapi_target
+ (l_target);
+
+ // call the HWP with each fapi2::Target
+ FAPI_INVOKE_HWP(l_err, p9_mss_scominit, l_fapi_target);
+
+ if (l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: p9_mss_scominit HWP returns error",
+ l_err->reasonCode());
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_target).addToLog(l_err);
+
+ // Create IStep error log and cross reference to error that
+ // occurred
+ io_istepError.addErrorDetails( l_err );
+
+ // Commit Error
+ errlCommit( l_err, HWPF_COMP_ID );
+
+ break;
+ }
+ else
{
- // Dump current run on target
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "Running p9_mss_scominit HWP on "
- "target HUID %.8X",
+ "SUCCESS running p9_mss_scominit HWP on target HUID %.8X",
TARGETING::get_huid(l_target));
+ }
+ }
+}
- fapi2::Target <fapi2::TARGET_TYPE_MCBIST> l_fapi_target
- (l_target);
+void cumulus_call_mss_scominit(IStepError & io_istepError)
+{
- // call the HWP with each fapi2::Target
- FAPI_INVOKE_HWP(l_err, p9_mss_scominit, l_fapi_target);
-
- if (l_err)
- {
- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
- "ERROR 0x%.8X: p9_mss_scominit HWP returns error",
- l_err->reasonCode());
-
- // capture the target data in the elog
- ErrlUserDetailsTarget(l_target).addToLog(l_err);
-
- // Create IStep error log and cross reference to error that
- // occurred
- l_stepError.addErrorDetails( l_err );
-
- // Commit Error
- errlCommit( l_err, HWPF_COMP_ID );
-
- break;
- }
- else
- {
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "SUCCESS running p9_mss_scominit HWP on "
- "target HUID %.8X", TARGETING::get_huid(l_target));
- }
- }
+ errlHndl_t l_err = nullptr;
- if (!l_stepError.isNull())
+ // Get all MBA targets
+ TARGETING::TargetHandleList l_membufTargetList;
+ getAllChips(l_membufTargetList, TYPE_MEMBUF);
+
+ for (const auto & l_membuf_target : l_membufTargetList)
+ {
+ // Dump current run on target
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running p9c_mss_scominit HWP on target HUID %.8X",
+ TARGETING::get_huid(l_membuf_target));
+
+ fapi2::Target <fapi2::TARGET_TYPE_MEMBUF_CHIP> l_fapi_membuf_target
+ (l_membuf_target);
+
+ // call the HWP with each fapi2::Target
+ FAPI_INVOKE_HWP(l_err, p9c_mss_scominit, l_fapi_membuf_target);
+
+ if (l_err)
{
- break;
- }
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: p9c_mss_scominit HWP returns error",
+ l_err->reasonCode());
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_membuf_target).addToLog(l_err);
+
+ // Create IStep error log and cross reference to error that
+ // occurred
+ io_istepError.addErrorDetails( l_err );
- // Get all MBA targets
- TARGETING::TargetHandleList l_membufTargetList;
- getAllChips(l_membufTargetList, TYPE_MEMBUF);
+ // Commit Error
+ errlCommit( l_err, HWPF_COMP_ID );
- for (const auto & l_membuf_target : l_membufTargetList)
+ break;
+ }
+ else
{
- // Dump current run on target
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "Running p9c_mss_scominit HWP on "
- "target HUID %.8X",
- TARGETING::get_huid(l_membuf_target));
+ "SUCCESS running p9c_mss_scominit HWP on target HUID %.8X",
+ TARGETING::get_huid(l_membuf_target));
+ }
+ }
- fapi2::Target <fapi2::TARGET_TYPE_MEMBUF_CHIP> l_fapi_membuf_target
- (l_membuf_target);
+ // Setup the memory throttles for worstcase mode
+ run_proc_throttle_sync(io_istepError);
+
+}
+#else
+void nimbus_call_mss_scominit(IStepError & io_istepError)
+{
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Error: Trying to call 'p9_mss_scominit' but Nimbus code is not compiled in");
+ assert(0, "Calling wrong Model's HWPs");
+}
+
+void cumulus_call_mss_scominit(IStepError & io_istepError)
+{
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Error: Trying to call 'p9c_mss_scominit' but Cumulus code is not compiled in");
+ assert(0, "Calling wrong Model's HWPs");
+}
+
+#endif
- // call the HWP with each fapi2::Target
- FAPI_INVOKE_HWP(l_err, p9c_mss_scominit, l_fapi_membuf_target);
-
- if (l_err)
- {
- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
- "ERROR 0x%.8X: p9c_mss_scominit HWP returns error",
- l_err->reasonCode());
-
- // capture the target data in the elog
- ErrlUserDetailsTarget(l_membuf_target).addToLog(l_err);
-
- // Create IStep error log and cross reference to error that
- // occurred
- l_stepError.addErrorDetails( l_err );
-
- // Commit Error
- errlCommit( l_err, HWPF_COMP_ID );
-
- break;
- }
- else
- {
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "SUCCESS running p9c_mss_scominit HWP on "
- "target HUID %.8X", TARGETING::get_huid(l_membuf_target));
- }
- }
#ifdef CONFIG_AXONE
- // Get all OCMB targets
- TARGETING::TargetHandleList l_ocmbTargetList;
- getAllChips(l_ocmbTargetList, TYPE_OCMB_CHIP);
+void axone_call_mss_scominit(IStepError & io_istepError)
+{
- for (const auto & l_ocmb_target : l_ocmbTargetList)
- {
- // Dump current run on target
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "Running exp_scominit HWP on "
- "target HUID %.8X",
- TARGETING::get_huid(l_ocmb_target));
+ errlHndl_t l_err = nullptr;
+
+ // Get all OCMB targets
+ TARGETING::TargetHandleList l_ocmbTargetList;
+ getAllChips(l_ocmbTargetList, TYPE_OCMB_CHIP);
+ for (const auto & l_ocmb_target : l_ocmbTargetList)
+ {
+ // check EXPLORER first as this is most likely the configuration
+ uint32_t chipId = l_ocmb_target->getAttr< TARGETING::ATTR_CHIP_ID>();
+ if (chipId == POWER_CHIPID::EXPLORER_16)
+ {
fapi2::Target <fapi2::TARGET_TYPE_OCMB_CHIP> l_fapi_ocmb_target
(l_ocmb_target);
+ // Dump current run on target
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running exp_scominit HWP on target HUID %.8X",
+ TARGETING::get_huid(l_ocmb_target));
+
// call the HWP with each fapi2::Target
FAPI_INVOKE_HWP(l_err, exp_scominit, l_fapi_ocmb_target);
-
- if (l_err)
- {
- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
- "ERROR 0x%.8X: exp_scominit HWP returns error",
- l_err->reasonCode());
-
- // capture the target data in the elog
- ErrlUserDetailsTarget(l_fapi_ocmb_target).addToLog(l_err);
-
- // Create IStep error log and cross reference to error that
- // occurred
- l_stepError.addErrorDetails( l_err );
-
- // Commit Error
- errlCommit( l_err, HWPF_COMP_ID );
-
- break;
- }
- else
- {
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "SUCCESS running exp_scominit HWP on "
- "target HUID %.8X", TARGETING::get_huid(l_ocmb_target));
- }
+ }
+ else
+ {
+ // Gemini, NOOP
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Skipping scominit HWP on target HUID 0x%.8X, chipId 0x%.4X",
+ TARGETING::get_huid(l_ocmb_target), chipId );
}
- if (!l_stepError.isNull())
+ if (l_err)
{
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: exp_scominit HWP returns error",
+ l_err->reasonCode());
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_ocmb_target).addToLog(l_err);
+
+ // Create IStep error log and cross reference to error that
+ // occurred
+ io_istepError.addErrorDetails( l_err );
+
+ // Commit Error
+ errlCommit( l_err, HWPF_COMP_ID );
+
break;
}
+ else if (chipId == POWER_CHIPID::EXPLORER_16)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS running exp_scominit HWP on "
+ "target HUID %.8X", TARGETING::get_huid(l_ocmb_target));
+ }
+ }
+
+ // Need to setup the memory throttles for worstcase mode until
+ // we get the thermals really setup later
+ run_proc_throttle_sync(io_istepError);
+
+}
+#else
+void axone_call_mss_scominit(IStepError & io_istepError)
+{
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Error: Trying to call 'exp_scominit' but Axone code is not compiled in");
+ assert(0, "Calling wrong Model's HWPs");
+}
#endif
- } while (0);
+void run_proc_throttle_sync(IStepError & io_istepError)
+{
+ errlHndl_t l_errl = nullptr;
+
+ // Run proc throttle sync
+ // Get all functional proc chip targets
+ // Use targeting code to get a list of all processors
+ TARGETING::TargetHandleList l_procChips;
+ getAllChips( l_procChips, TARGETING::TYPE_PROC );
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_scominit exit" );
- return l_stepError.getErrorHandle();
+ for (const auto & l_procChip: l_procChips)
+ {
+ //Convert the TARGETING::Target into a fapi2::Target by passing
+ //l_procChip into the fapi2::Target constructor
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>
+ l_fapi2CpuTarget((l_procChip));
+
+ // Call p9_throttle_sync
+#ifndef CONFIG_AXONE
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running p9_throttle_sync HWP on target HUID %.8X",
+ TARGETING::get_huid(l_procChip) );
+ FAPI_INVOKE_HWP( l_errl, p9_throttle_sync, l_fapi2CpuTarget );
+#else
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running p9a_throttle_sync HWP on target HUID %.8X",
+ TARGETING::get_huid(l_procChip) );
+ FAPI_INVOKE_HWP( l_errl, p9a_throttle_sync, l_fapi2CpuTarget );
+#endif
+
+ if (l_errl)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: p9_throttle_sync HWP returns error",
+ l_errl->reasonCode());
+
+ // Capture the target data in the elog
+ ErrlUserDetailsTarget(l_procChip).addToLog(l_errl);
+
+ // Create IStep error log and cross reference
+ // to error that occurred
+ io_istepError.addErrorDetails( l_errl );
+
+ // Commit Error
+ errlCommit( l_errl, HWPF_COMP_ID );
+
+ break;
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : p9_throttle_sync HWP on 0x%.8X processor",
+ TARGETING::get_huid(l_procChip) );
+ }
+ }
}
};
diff --git a/src/usr/isteps/istep13/istep13consts.H b/src/usr/isteps/istep13/istep13consts.H
index cf459f82e..218c89283 100644
--- a/src/usr/isteps/istep13/istep13consts.H
+++ b/src/usr/isteps/istep13/istep13consts.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015 */
+/* Contributors Listed Below - COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -29,5 +29,5 @@
const uint8_t UNLIMITED_RUN = 0xFF;
const uint8_t VPO_NUM_OF_MBAS_TO_RUN = UNLIMITED_RUN;
const uint8_t VPO_NUM_OF_MEMBUF_TO_RUN = UNLIMITED_RUN;
-const uint8_t ISTEP13_MAX_THREADS = 1;
+const uint8_t ISTEP13_MAX_THREADS = 4;
#endif
diff --git a/src/usr/isteps/istep13/makefile b/src/usr/isteps/istep13/makefile
index bd38d4f71..d85873963 100644
--- a/src/usr/isteps/istep13/makefile
+++ b/src/usr/isteps/istep13/makefile
@@ -25,11 +25,12 @@
ROOTPATH = ../../../..
MODULE = istep13
-PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/p9/procedures
-CEN_PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/centaur/procedures
+P9_PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/p9/procedures
+CEN_PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/centaur/procedures
OCMB_PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/ocmb/procedures
-EXP_PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/ocmb/explorer/procedures
-
+EXP_PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/ocmb/explorer/procedures
+EXP_INCLUDE_PATH = ${ROOTPATH}/src/import/chips/ocmb/explorer/common/include/
+GEM_PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/ocmb/gemini/procedures
#Add all the extra include paths
EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2
@@ -42,14 +43,14 @@ EXTRAINCDIR += ${ROOTPATH}/src/import/
EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/imageProcs/
EXTRAINCDIR += ${ROOTPATH}/src/import/chips/common/utils/imageProcs/
EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/common/include
-EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/memory
-EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/memory/lib
-EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/memory/lib/utils
-EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/memory/lib/mc/
-EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/memory/lib/fir/
-EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/perv
-EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/nest
-EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/initfiles
+EXTRAINCDIR += ${P9_PROCEDURES_PATH}/hwp/memory
+EXTRAINCDIR += ${P9_PROCEDURES_PATH}/hwp/memory/lib
+EXTRAINCDIR += ${P9_PROCEDURES_PATH}/hwp/memory/lib/utils
+EXTRAINCDIR += ${P9_PROCEDURES_PATH}/hwp/memory/lib/mc/
+EXTRAINCDIR += ${P9_PROCEDURES_PATH}/hwp/memory/lib/fir/
+EXTRAINCDIR += ${P9_PROCEDURES_PATH}/hwp/perv
+EXTRAINCDIR += ${P9_PROCEDURES_PATH}/hwp/nest
+EXTRAINCDIR += ${P9_PROCEDURES_PATH}/hwp/initfiles
EXTRAINCDIR += ${ROOTPATH}/src/import/chips/centaur/common/include/
EXTRAINCDIR += ${ROOTPATH}/src/import/
EXTRAINCDIR += ${ROOTPATH}/
@@ -60,7 +61,13 @@ EXTRAINCDIR += ${CEN_PROCEDURES_PATH}/hwp/memory/lib/utils/
EXTRAINCDIR += ${CEN_PROCEDURES_PATH}/hwp/initfiles
EXTRAINCDIR += ${EXP_PROCEDURES_PATH}/hwp/memory/
EXTRAINCDIR += ${OCMB_PROCEDURES_PATH}/hwp/initfiles/
-
+EXTRAINCDIR += ${EXP_INCLUDE_PATH}/
+EXTRAINCDIR += ${ROOTPATH}/obj/genfiles/
+EXTRAINCDIR += ${ROOTPATH}/obj/genfiles/chips/ocmb/explorer/procedures/hwp/memory/lib/
+EXTRAINCDIR += ${ROOTPATH}/obj/genfiles/generic/memory/lib/
+EXTRAINCDIR += ${GEM_PROCEDURES_PATH}/hwp/memory
+EXTRAINCDIR += ${GEM_PROCEDURES_PATH}/hwp/memory/lib/
+EXTRAINCDIR += ${ROOTPATH}/src/import/chips/common/utils
# from src/usr/isteps/istep13
OBJS += call_host_disable_memvolt.o
@@ -81,61 +88,63 @@ OBJS += call_mss_draminit_mc.o
include ${ROOTPATH}/procedure.rules.mk
# PLL HWPs
-include ${PROCEDURES_PATH}/hwp/perv/p9_mem_pll_initf.mk
-include ${PROCEDURES_PATH}/hwp/perv/p9_mem_pll_setup.mk
-include ${PROCEDURES_PATH}/hwp/perv/p9_mem_pll_reset.mk
+include ${P9_PROCEDURES_PATH}/hwp/perv/p9_mem_pll_initf.mk
+include ${P9_PROCEDURES_PATH}/hwp/perv/p9_mem_pll_setup.mk
+include ${P9_PROCEDURES_PATH}/hwp/perv/p9_mem_pll_reset.mk
#Start Memclocks
-include ${PROCEDURES_PATH}/hwp/perv/p9_mem_startclocks.mk
+include ${P9_PROCEDURES_PATH}/hwp/perv/p9_mem_startclocks.mk
#Scom init
-include ${PROCEDURES_PATH}/hwp/memory/p9_mss_scominit.mk
-include ${PROCEDURES_PATH}/hwp/nest/p9_throttle_sync.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_scominit.mk
+include ${P9_PROCEDURES_PATH}/hwp/memory/p9_mss_scominit.mk
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_scominit.o)
-include ${PROCEDURES_PATH}/hwp/initfiles/p9n_ddrphy_scom.mk
-include ${PROCEDURES_PATH}/hwp/initfiles/p9n_mca_scom.mk
-include ${PROCEDURES_PATH}/hwp/initfiles/p9n_mcbist_scom.mk
+include ${P9_PROCEDURES_PATH}/hwp/initfiles/p9n_ddrphy_scom.mk
+include ${P9_PROCEDURES_PATH}/hwp/initfiles/p9n_mca_scom.mk
+include ${P9_PROCEDURES_PATH}/hwp/initfiles/p9n_mcbist_scom.mk
#Dram init
-include ${PROCEDURES_PATH}/hwp/memory/p9_mss_draminit.mk
-include ${PROCEDURES_PATH}/hwp/memory/p9_mss_draminit_training.mk
-include ${PROCEDURES_PATH}/hwp/memory/p9_mss_draminit_mc.mk
-include ${PROCEDURES_PATH}/hwp/memory/p9_mss_ddr_phy_reset.mk
-include ${PROCEDURES_PATH}/hwp/memory/p9_mss_draminit_training_adv.mk
-
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_mcbist.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_mcbist_common.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_mcbist_address.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_generic_shmoo.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_draminit.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_draminit_mc.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_draminit_training.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_ddr_phy_reset.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_draminit_training_advanced.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_mrs6_DDR4.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_ddr4_pda.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_ddr4_funcs.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_termination_control.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_access_delay_reg.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_unmask_errors.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_dimmBadDqBitmapFuncs.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_funcs.mk
-include ${CEN_PROCEDURES_PATH}/hwp/initfiles/centaur_mbs_scom.mk
-include ${CEN_PROCEDURES_PATH}/hwp/initfiles/centaur_mba_scom.mk
-include ${CEN_PROCEDURES_PATH}/hwp/initfiles/centaur_ddrphy_scom.mk
-include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_row_repair.mk
+include ${P9_PROCEDURES_PATH}/hwp/memory/p9_mss_draminit.mk
+include ${P9_PROCEDURES_PATH}/hwp/memory/p9_mss_draminit_training.mk
+include ${P9_PROCEDURES_PATH}/hwp/memory/p9_mss_draminit_mc.mk
+include ${P9_PROCEDURES_PATH}/hwp/memory/p9_mss_ddr_phy_reset.mk
+include ${P9_PROCEDURES_PATH}/hwp/memory/p9_mss_draminit_training_adv.mk
+
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_mcbist.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_mcbist_common.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_mcbist_address.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_generic_shmoo.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_draminit.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_draminit_mc.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_draminit_training.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_ddr_phy_reset.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_draminit_training_advanced.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_mrs6_DDR4.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_ddr4_pda.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_ddr4_funcs.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_termination_control.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_access_delay_reg.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_unmask_errors.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_dimmBadDqBitmapFuncs.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_funcs.o)
+OBJS += $(if $(CONFIG_AXONE),,centaur_mbs_scom.o)
+OBJS += $(if $(CONFIG_AXONE),,centaur_mba_scom.o)
+OBJS += $(if $(CONFIG_AXONE),,centaur_ddrphy_scom.o)
+OBJS += $(if $(CONFIG_AXONE),,p9c_mss_row_repair.o)
OBJS += $(if $(CONFIG_AXONE),exp_scominit.o,)
OBJS += $(if $(CONFIG_AXONE),explorer_scom.o,)
+OBJS += $(if $(CONFIG_AXONE),exp_draminit_mc.o,)
+OBJS += $(if $(CONFIG_AXONE),exp_draminit.o,)
+OBJS += $(if $(CONFIG_AXONE),gem_draminit.o,)
include ${ROOTPATH}/config.mk
-VPATH += ${PROCEDURES_PATH}/hwp/memory ${PROCEDURES_PATH}/hwp/nest ${PROCEDURES_PATH}/hwp/perv ${PROCEDURES_PATH}/hwp/initfiles/
-VPATH += ${PROCEDURES_PATH}/hwp/memory/lib/ccs/ ${PROCEDURES_PATH}/hwp/memory/lib/dimm/ ${PROCEDURES_PATH}/hwp/memory/lib/utils/ ${PROCEDURES_PATH}/hwp/memory/lib/phy/
-VPATH += ${PROCEDURES_PATH}/hwp/memory/lib/mc/
-VPATH += ${PROCEDURES_PATH}/hwp/memory/lib/fir/
-VPATH += ${PROCEDURES_PATH}/hwp/memory/lib/dimm/ddr4/
+VPATH += ${P9_PROCEDURES_PATH}/hwp/memory ${P9_PROCEDURES_PATH}/hwp/nest ${P9_PROCEDURES_PATH}/hwp/perv ${P9_PROCEDURES_PATH}/hwp/initfiles/
+VPATH += ${P9_PROCEDURES_PATH}/hwp/memory/lib/ccs/ ${P9_PROCEDURES_PATH}/hwp/memory/lib/dimm/ ${P9_PROCEDURES_PATH}/hwp/memory/lib/utils/ ${P9_PROCEDURES_PATH}/hwp/memory/lib/phy/
+VPATH += ${P9_PROCEDURES_PATH}/hwp/memory/lib/mc/
+VPATH += ${P9_PROCEDURES_PATH}/hwp/memory/lib/fir/
+VPATH += ${P9_PROCEDURES_PATH}/hwp/memory/lib/dimm/ddr4/
VPATH += ${CEN_PROCEDURES_PATH}
VPATH += ${CEN_PROCEDURES_PATH}/hwp/memory/
VPATH += ${CEN_PROCEDURES_PATH}/hwp/memory/lib/
@@ -144,4 +153,5 @@ VPATH += ${CEN_PROCEDURES_PATH}/hwp/memory/lib/utils/
VPATH += ${CEN_PROCEDURES_PATH}/hwp/initfiles
VPATH += $(if $(CONFIG_AXONE),${EXP_PROCEDURES_PATH}/hwp/memory,)
+VPATH += $(if $(CONFIG_AXONE),${GEM_PROCEDURES_PATH}/hwp/memory,)
VPATH += $(if $(CONFIG_AXONE),${OCMB_PROCEDURES_PATH}/hwp/initfiles/,)
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