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-rw-r--r--src/usr/isteps/istep13/call_mss_scominit.C380
1 files changed, 255 insertions, 125 deletions
diff --git a/src/usr/isteps/istep13/call_mss_scominit.C b/src/usr/isteps/istep13/call_mss_scominit.C
index 69e05c7ee..6c623f1d2 100644
--- a/src/usr/isteps/istep13/call_mss_scominit.C
+++ b/src/usr/isteps/istep13/call_mss_scominit.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2019 */
+/* Contributors Listed Below - COPYRIGHT 2015,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -42,10 +42,13 @@
#include <config.h>
#include <fapi2.H>
#include <p9_mss_scominit.H>
-#include <p9_throttle_sync.H>
-#include <p9c_mss_scominit.H>
#ifdef CONFIG_AXONE
-#include <exp_scominit.H>
+ #include <exp_scominit.H>
+ #include <chipids.H> // for EXPLORER ID
+ #include <p9a_throttle_sync.H>
+#else
+ #include <p9c_mss_scominit.H>
+ #include <p9_throttle_sync.H>
#endif
using namespace ERRORLOG;
@@ -55,163 +58,290 @@ using namespace TARGETING;
namespace ISTEP_13
{
+void nimbus_call_mss_scominit(IStepError & io_istepError);
+void cumulus_call_mss_scominit(IStepError & io_istepError);
+void axone_call_mss_scominit(IStepError & io_istepError);
+void run_proc_throttle_sync(IStepError & io_istepError);
+
void* call_mss_scominit (void *io_pArgs)
{
- errlHndl_t l_err = NULL;
-
- IStepError l_stepError;
+ IStepError l_StepError;
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_scominit entry" );
+ auto l_procModel = TARGETING::targetService().getProcessorModel();
- do
+ switch (l_procModel)
{
- // Get all MCBIST targets
- TARGETING::TargetHandleList l_mcbistTargetList;
- getAllChiplets(l_mcbistTargetList, TYPE_MCBIST);
+ case TARGETING::MODEL_CUMULUS:
+ cumulus_call_mss_scominit(l_StepError);
+ break;
+ case TARGETING::MODEL_AXONE:
+ axone_call_mss_scominit(l_StepError);
+ break;
+ case TARGETING::MODEL_NIMBUS:
+ nimbus_call_mss_scominit(l_StepError);
+ break;
+ default:
+ assert(0, "call_mss_scominit: Unsupported model type 0x%04X",
+ l_procModel);
+ break;
+ }
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_scominit exit" );
+
+ // end task, returning any errorlogs to IStepDisp
+ return l_StepError.getErrorHandle();
+}
+
+#ifndef CONFIG_AXONE
+
+void nimbus_call_mss_scominit(IStepError & io_istepError)
+{
+ errlHndl_t l_err = nullptr;
- for (const auto & l_target : l_mcbistTargetList)
+ // Get all MCBIST targets
+ TARGETING::TargetHandleList l_mcbistTargetList;
+ getAllChiplets(l_mcbistTargetList, TYPE_MCBIST);
+
+ for (const auto & l_target : l_mcbistTargetList)
+ {
+ // Dump current run on target
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running p9_mss_scominit HWP on target HUID %.8X",
+ TARGETING::get_huid(l_target));
+
+ fapi2::Target <fapi2::TARGET_TYPE_MCBIST> l_fapi_target
+ (l_target);
+
+ // call the HWP with each fapi2::Target
+ FAPI_INVOKE_HWP(l_err, p9_mss_scominit, l_fapi_target);
+
+ if (l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: p9_mss_scominit HWP returns error",
+ l_err->reasonCode());
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_target).addToLog(l_err);
+
+ // Create IStep error log and cross reference to error that
+ // occurred
+ io_istepError.addErrorDetails( l_err );
+
+ // Commit Error
+ errlCommit( l_err, HWPF_COMP_ID );
+
+ break;
+ }
+ else
{
- // Dump current run on target
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "Running p9_mss_scominit HWP on "
- "target HUID %.8X",
+ "SUCCESS running p9_mss_scominit HWP on target HUID %.8X",
TARGETING::get_huid(l_target));
+ }
+ }
+}
- fapi2::Target <fapi2::TARGET_TYPE_MCBIST> l_fapi_target
- (l_target);
+void cumulus_call_mss_scominit(IStepError & io_istepError)
+{
- // call the HWP with each fapi2::Target
- FAPI_INVOKE_HWP(l_err, p9_mss_scominit, l_fapi_target);
-
- if (l_err)
- {
- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
- "ERROR 0x%.8X: p9_mss_scominit HWP returns error",
- l_err->reasonCode());
-
- // capture the target data in the elog
- ErrlUserDetailsTarget(l_target).addToLog(l_err);
-
- // Create IStep error log and cross reference to error that
- // occurred
- l_stepError.addErrorDetails( l_err );
-
- // Commit Error
- errlCommit( l_err, HWPF_COMP_ID );
-
- break;
- }
- else
- {
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "SUCCESS running p9_mss_scominit HWP on "
- "target HUID %.8X", TARGETING::get_huid(l_target));
- }
- }
+ errlHndl_t l_err = nullptr;
- if (!l_stepError.isNull())
+ // Get all MBA targets
+ TARGETING::TargetHandleList l_membufTargetList;
+ getAllChips(l_membufTargetList, TYPE_MEMBUF);
+
+ for (const auto & l_membuf_target : l_membufTargetList)
+ {
+ // Dump current run on target
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running p9c_mss_scominit HWP on target HUID %.8X",
+ TARGETING::get_huid(l_membuf_target));
+
+ fapi2::Target <fapi2::TARGET_TYPE_MEMBUF_CHIP> l_fapi_membuf_target
+ (l_membuf_target);
+
+ // call the HWP with each fapi2::Target
+ FAPI_INVOKE_HWP(l_err, p9c_mss_scominit, l_fapi_membuf_target);
+
+ if (l_err)
{
- break;
- }
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: p9c_mss_scominit HWP returns error",
+ l_err->reasonCode());
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_membuf_target).addToLog(l_err);
+
+ // Create IStep error log and cross reference to error that
+ // occurred
+ io_istepError.addErrorDetails( l_err );
- // Get all MBA targets
- TARGETING::TargetHandleList l_membufTargetList;
- getAllChips(l_membufTargetList, TYPE_MEMBUF);
+ // Commit Error
+ errlCommit( l_err, HWPF_COMP_ID );
- for (const auto & l_membuf_target : l_membufTargetList)
+ break;
+ }
+ else
{
- // Dump current run on target
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "Running p9c_mss_scominit HWP on "
- "target HUID %.8X",
- TARGETING::get_huid(l_membuf_target));
+ "SUCCESS running p9c_mss_scominit HWP on target HUID %.8X",
+ TARGETING::get_huid(l_membuf_target));
+ }
+ }
- fapi2::Target <fapi2::TARGET_TYPE_MEMBUF_CHIP> l_fapi_membuf_target
- (l_membuf_target);
+ // Setup the memory throttles for worstcase mode
+ run_proc_throttle_sync(io_istepError);
+
+}
+#else
+void nimbus_call_mss_scominit(IStepError & io_istepError)
+{
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Error: Trying to call 'p9_mss_scominit' but Nimbus code is not compiled in");
+ assert(0, "Calling wrong Model's HWPs");
+}
+
+void cumulus_call_mss_scominit(IStepError & io_istepError)
+{
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Error: Trying to call 'p9c_mss_scominit' but Cumulus code is not compiled in");
+ assert(0, "Calling wrong Model's HWPs");
+}
+
+#endif
- // call the HWP with each fapi2::Target
- FAPI_INVOKE_HWP(l_err, p9c_mss_scominit, l_fapi_membuf_target);
-
- if (l_err)
- {
- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
- "ERROR 0x%.8X: p9c_mss_scominit HWP returns error",
- l_err->reasonCode());
-
- // capture the target data in the elog
- ErrlUserDetailsTarget(l_membuf_target).addToLog(l_err);
-
- // Create IStep error log and cross reference to error that
- // occurred
- l_stepError.addErrorDetails( l_err );
-
- // Commit Error
- errlCommit( l_err, HWPF_COMP_ID );
-
- break;
- }
- else
- {
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "SUCCESS running p9c_mss_scominit HWP on "
- "target HUID %.8X", TARGETING::get_huid(l_membuf_target));
- }
- }
#ifdef CONFIG_AXONE
- // Get all OCMB targets
- TARGETING::TargetHandleList l_ocmbTargetList;
- getAllChips(l_ocmbTargetList, TYPE_OCMB_CHIP);
+void axone_call_mss_scominit(IStepError & io_istepError)
+{
- for (const auto & l_ocmb_target : l_ocmbTargetList)
- {
- // Dump current run on target
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "Running exp_scominit HWP on "
- "target HUID %.8X",
- TARGETING::get_huid(l_ocmb_target));
+ errlHndl_t l_err = nullptr;
+
+ // Get all OCMB targets
+ TARGETING::TargetHandleList l_ocmbTargetList;
+ getAllChips(l_ocmbTargetList, TYPE_OCMB_CHIP);
+ for (const auto & l_ocmb_target : l_ocmbTargetList)
+ {
+ // check EXPLORER first as this is most likely the configuration
+ uint32_t chipId = l_ocmb_target->getAttr< TARGETING::ATTR_CHIP_ID>();
+ if (chipId == POWER_CHIPID::EXPLORER_16)
+ {
fapi2::Target <fapi2::TARGET_TYPE_OCMB_CHIP> l_fapi_ocmb_target
(l_ocmb_target);
+ // Dump current run on target
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running exp_scominit HWP on target HUID %.8X",
+ TARGETING::get_huid(l_ocmb_target));
+
// call the HWP with each fapi2::Target
FAPI_INVOKE_HWP(l_err, exp_scominit, l_fapi_ocmb_target);
-
- if (l_err)
- {
- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
- "ERROR 0x%.8X: exp_scominit HWP returns error",
- l_err->reasonCode());
-
- // capture the target data in the elog
- ErrlUserDetailsTarget(l_fapi_ocmb_target).addToLog(l_err);
-
- // Create IStep error log and cross reference to error that
- // occurred
- l_stepError.addErrorDetails( l_err );
-
- // Commit Error
- errlCommit( l_err, HWPF_COMP_ID );
-
- break;
- }
- else
- {
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "SUCCESS running exp_scominit HWP on "
- "target HUID %.8X", TARGETING::get_huid(l_ocmb_target));
- }
+ }
+ else
+ {
+ // Gemini, NOOP
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Skipping scominit HWP on target HUID 0x%.8X, chipId 0x%.4X",
+ TARGETING::get_huid(l_ocmb_target), chipId );
}
- if (!l_stepError.isNull())
+ if (l_err)
{
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: exp_scominit HWP returns error",
+ l_err->reasonCode());
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_ocmb_target).addToLog(l_err);
+
+ // Create IStep error log and cross reference to error that
+ // occurred
+ io_istepError.addErrorDetails( l_err );
+
+ // Commit Error
+ errlCommit( l_err, HWPF_COMP_ID );
+
break;
}
+ else if (chipId == POWER_CHIPID::EXPLORER_16)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS running exp_scominit HWP on "
+ "target HUID %.8X", TARGETING::get_huid(l_ocmb_target));
+ }
+ }
+
+ // Need to setup the memory throttles for worstcase mode until
+ // we get the thermals really setup later
+ run_proc_throttle_sync(io_istepError);
+
+}
+#else
+void axone_call_mss_scominit(IStepError & io_istepError)
+{
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Error: Trying to call 'exp_scominit' but Axone code is not compiled in");
+ assert(0, "Calling wrong Model's HWPs");
+}
#endif
- } while (0);
+void run_proc_throttle_sync(IStepError & io_istepError)
+{
+ errlHndl_t l_errl = nullptr;
+
+ // Run proc throttle sync
+ // Get all functional proc chip targets
+ // Use targeting code to get a list of all processors
+ TARGETING::TargetHandleList l_procChips;
+ getAllChips( l_procChips, TARGETING::TYPE_PROC );
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_scominit exit" );
- return l_stepError.getErrorHandle();
+ for (const auto & l_procChip: l_procChips)
+ {
+ //Convert the TARGETING::Target into a fapi2::Target by passing
+ //l_procChip into the fapi2::Target constructor
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>
+ l_fapi2CpuTarget((l_procChip));
+
+ // Call p9_throttle_sync
+#ifndef CONFIG_AXONE
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running p9_throttle_sync HWP on target HUID %.8X",
+ TARGETING::get_huid(l_procChip) );
+ FAPI_INVOKE_HWP( l_errl, p9_throttle_sync, l_fapi2CpuTarget );
+#else
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running p9a_throttle_sync HWP on target HUID %.8X",
+ TARGETING::get_huid(l_procChip) );
+ FAPI_INVOKE_HWP( l_errl, p9a_throttle_sync, l_fapi2CpuTarget );
+#endif
+
+ if (l_errl)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: p9_throttle_sync HWP returns error",
+ l_errl->reasonCode());
+
+ // Capture the target data in the elog
+ ErrlUserDetailsTarget(l_procChip).addToLog(l_errl);
+
+ // Create IStep error log and cross reference
+ // to error that occurred
+ io_istepError.addErrorDetails( l_errl );
+
+ // Commit Error
+ errlCommit( l_errl, HWPF_COMP_ID );
+
+ break;
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : p9_throttle_sync HWP on 0x%.8X processor",
+ TARGETING::get_huid(l_procChip) );
+ }
+ }
}
};
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