Removing some more old fapi1 and hwp code

Deleted all of the old fapi1 code
Moved potentially reuseable occ code to a new dir
Deleted a variety of p8 hwp files

Change-Id: I8b6ab72fef3f1413d919bdd21bc88f2c4f59c5c3
RTC: 146345
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23075
Tested-by: Jenkins Server
Tested-by: FSP CI Jenkins
Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>

312 files changed, 74 insertions, 96950 deletions

diff --git a/src/usr/hwpf/fapi/fapi.mk b/src/usr/hwpf/fapi/fapi.mk
deleted file mode 100644
index 663cc5713..000000000
--- a/src/usr/hwpf/fapi/fapi.mk
+++ /dev/null
@@ -1,39 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/fapi/fapi.mk $
-#
-# OpenPOWER HostBoot Project
-#
-# COPYRIGHT International Business Machines Corp. 2014
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/ecmddatabuffer
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/fapi
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/plat
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp
-EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/include
-
-CFLAGS += -D_NO_SPY_ACCESS=1
-
-OBJS += fapiReturnCode.o
-OBJS += fapiReturnCodeDataRef.o
-OBJS += fapiTarget.o
-OBJS += fapiHwAccess.o
-OBJS += fapiErrorInfo.o
-OBJS += fapiAttributeService.o
-OBJS += fapiChipEcFeature.o
-OBJS += fapiCollectRegFfdc.o
-
diff --git a/src/usr/hwpf/fapi/fapiCreateFapiSpyIds.pl b/src/usr/hwpf/fapi/fapiCreateFapiSpyIds.pl
deleted file mode 100755
index d21199a23..000000000
--- a/src/usr/hwpf/fapi/fapiCreateFapiSpyIds.pl
+++ /dev/null
@@ -1,299 +0,0 @@
-#!/usr/bin/perl
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/fapi/fapiCreateFapiSpyIds.pl $
-#
-# OpenPOWER HostBoot Project
-#
-# COPYRIGHT International Business Machines Corp. 2012,2014
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-use strict; 
-use warnings;
-
-
-#------------------------------------------------------------------------------
-# Print Command Line Help
-#------------------------------------------------------------------------------
-my $numArgs = $#ARGV+1;
-print $numArgs;
-
-if ($numArgs < 2)
-{
-    print ("Usage: fapiCreateFapiSpyIds.pl <input file> <output directory>\n");
-    print ("  This script will parse the spy id files and create a set of nested\n");
-    print ("  structures in the file fapiSpyIds.H which the FSP will use.\n");
-    exit(1);
-}
-
-#------------------------------------------------------------------------------
-# Globals
-#------------------------------------------------------------------------------
-my $spyIdFile = $ARGV[0];
-my $outDir    = $ARGV[1];
-my $outFile  = "fapiSpyIds.H";
-my $UTFile   = "fapiSpyIdsUT.C";
-$outFile = $outDir . $outFile; 
-my %structureNames;
-my $somenumber;
-my %currentmembers;
-
-#------------------------------------------------------------------------------
-# Prototypes 
-#------------------------------------------------------------------------------
-sub buildStructures( \@ );
-sub createTest();
-sub addTest($$);
-sub closeTest();
-
-#------------------------------------------------------------------------------
-# Open input and output files for our use.
-#------------------------------------------------------------------------------
-open(IDFILE, "<", $spyIdFile) or die "ERROR $? : cant open $spyIdFile : $!";
-open(OUTFILE, ">", $outFile) or die "ERROR $? : can't open $outFile : $!";
-open(UTFILE, ">", $UTFile) or die "ERROR $? : can't open $outFile : $!";
-
-# direct the printf output to the file
-select OUTFILE;
-#select STDOUT;
-
-createTest();
-# read in the entire file to an array
-my (@lines) = <IDFILE>;
-
-#------------------------------------------------------------------------------
-# Process every line in the file one at a time
-#------------------------------------------------------------------------------
-foreach my $line (@lines)
-{
-    $line =~s/^\s+|\s+$//g;
-    my @tokens = split(/,/, $line );
-
-    $tokens[1]=~s/\}//;
-    $tokens[1]=~s/\"//g;
-
-    # replace a # with __P__
-    $tokens[1]=~s/\#/__P__/g;
-
-    # fix a case like this ABC.2CD ==> ABC._2CD
-    $tokens[1]=~s/(\.)([0-9])/$1_$2/;
-
-    #get rid of the parens
-    $tokens[0]=~s/\{//;
-
-    my $structure=$tokens[1];
-    my $number=$tokens[0];
-
-    #create a hash for later use
-    $structureNames{ $structure } = $number;
-
-}
-
-#sort the hash based on the structure name
-my @keys = sort { ( $a cmp $b);  } ( keys %structureNames );
-
-my @array = @keys;
-
-#init the key to some value..
-my $current = @keys;
-my @name;
-my @spaces;
-
-push(@spaces," ");
-push(@spaces," ");
-
-# start the file off with a namespace
-printf "#ifndef __FAPI_SPY_IDS_H__\n";
-printf "#define __FAPI_SPY_IDS_H__ \n\n";
-printf "namespace FAPI_SPY_NAMES \n { \n\n";
-
-# look at every entry in the array of names..
-foreach my $value (@array)
-{
-    # segment the name and then search for all
-    # entries which have the first value the same
-    # and then process those values
-    my @members = split(/\./, $value );
-    my $member = $members[0];
-    @name = ();
-
-    my $size = @members;
-
-    #once we go in here we wont need to look at this value again
-    if( $member ne $current  )
-    {
-        push(@name,$member);
-
-        if( $size > 1 )
-        {
-
-            # add some readability;
-            printf "@spaces";
-            my $extern = "extern struct " . $member . "_component \n";
-            printf "$extern";
-            printf "@spaces";
-            printf"{\n";
-            # grab every value out of the array which matches our query
-            my @selected = @keys;
-            @selected = grep( m/^$member\b/, @selected);
-            # modify the stucture names to remove the first member
-            my @filtered = map { (my $new = $_) =~ s/$member\.//; $new} @selected;
-            $current = $member;
-            # passing the shortend structure names
-            buildStructures( @filtered );
-            printf "@spaces";
-            printf"} $member;\n";
-        }
-        else
-        {
-                # make the structure back into a name and use it go get
-                # the value from the hash we made eariler -- its a global
-                my $name = join(".", @name );
-                my $number = 0;
-                $number = $structureNames{ $name };
-                my $struct = "struct " . $member . "_comp";
-                addTest( $name, $number );
-                printf "@spaces";
-                printf "$struct\n";
-                printf "@spaces";
-                printf "{\n";
-                printf "@spaces";
-                printf"     static const unsigned int value = $number;\n";
-                printf "@spaces";
-                printf "} $member;\n";
-        }
-    }
-
-}
-# close out the namespace in the file
-printf "};\n";
-printf "#endif\n";
-close OUTFILE;
-close IDFILE;
-closeTest();
-#done
-
-#------------------------------------------------------------------------------
-# Subroutines
-#------------------------------------------------------------------------------
-sub buildStructures( \@ )
-{
-    my( $structures ) = @_;
-
-    my @structures = @$structures;
-
-    my $current = 0;
-    my $member = 0;
-
-    push( @spaces, " " );
-    push( @spaces, " " );
-
-    foreach my $value (@structures )
-    {
-        my @members = split(/\./, $value );
-        my $member = $members[0];
-        push( @name, $member );
-
-        my $size = @members;
-        #once we go in here we wont need to look at this value again
-        if( $member ne $current )
-        {
-            if( $size > 1 )
-            {
-                $somenumber += 1;
-                my $struct = "struct " . $member . "_comp" . $somenumber . "\n";
-                printf "@spaces";
-                printf $struct;
-                printf "@spaces";
-                printf "{\n";
-                # grab every value out of the array which matches our query
-                my @selected = grep( m/^$member\b/, @structures);
-                my @filtered = map { (my $new = $_) =~ s/$member\.//; $new} @selected;
-                $current = $member;
-                buildStructures( @filtered );
-                #take off the last struture member name
-                #from the array
-                printf "@spaces";
-                printf ("} $member;\n");
-            }
-            else
-            {
-                # make the structure back into a name and use it go get
-                # the value from the hash we made eariler -- its a global
-                my $name = join(".", @name );
-                my $number = 0;
-                $number = $structureNames{ $name };
-                my $struct = "struct " . $member . "_comp";
-                addTest( $name, $number );
-                printf "@spaces";
-                printf "$struct\n";
-                printf "@spaces";
-                printf "{\n";
-                printf "@spaces";
-                printf"     static const unsigned int value = $number;\n";
-                printf "@spaces";
-                printf "} $member;\n";
-            }
-        }
-        pop(@name);
-    }
-   pop( @spaces );
-   pop( @spaces );
-
-}
-
-
-sub createTest()
-{
-    printf( UTFILE "#include <fapiSpyIds.H>\n");
-    printf( UTFILE "#include \"s1_reduced.h\"\n\n");
-    printf( UTFILE "#include <iostream>\n\n");
-    printf( UTFILE "#define fspSpyId(DATA) FAPI_SPY_NAMES::DATA.value\n");
-    printf( UTFILE "int main( void )\n { \n");
-    printf( UTFILE "unsigned int  totalTests = 0; \n");
-    printf( UTFILE "unsigned int failedTests = 0; \n");
-}
-sub closeTest()
-{
-
-    printf( UTFILE "if( failedTests )\n { \n");
-    printf( UTFILE "std::cout << failedTests  << \" of \" << totalTests << \" tests failed \" << std::endl;" );
-    printf( UTFILE "}\n");
-    printf( UTFILE "else { std::cout << \"+++++ SUCCESS +++++\" << std::endl; \
-                           std::cout << totalTests << \" TESTS PASSED\" << std::endl; }" );
-    printf( UTFILE "\n\n}\n");
-    close(UTFILE);
-}
-
-sub addTest( $$ )
-{
-    my( $name, $number ) = @_;
-
-    # create a name which the FSP understands
-     my $fspName = $name;
-     $fspName =~ s/__P__/_/g;
-     $fspName =~ s/\._/\./g;
-     $fspName =~ s/\./_/g;
-
-    $fspName = "SPY_" . $fspName;
-
-    $fspName =~ s/ //g;
-#    $fspName =~ s/__/_/g;
-
-    printf( UTFILE "totalTests++;  if ( fspSpyId( $name ) !=  $fspName)\n");
-    printf( UTFILE "{ std::cout << \"spy values dont match\" << std::endl; failedTests++;  }\n");
-
-}
diff --git a/src/usr/hwpf/fapi/fapiCreateIfAttrService.pl b/src/usr/hwpf/fapi/fapiCreateIfAttrService.pl
deleted file mode 100755
index e1dc082af..000000000
--- a/src/usr/hwpf/fapi/fapiCreateIfAttrService.pl
+++ /dev/null
@@ -1,312 +0,0 @@
-#!/usr/bin/perl
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/fapi/fapiCreateIfAttrService.pl $
-#
-# OpenPOWER HostBoot Project
-#
-# Contributors Listed Below - COPYRIGHT 2011,2014
-# [+] International Business Machines Corp.
-#
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-# $Id: fapiCreateIfAttrService.pl,v 1.9 2014/04/21 18:35:11 mjjones Exp $
-# Purpose:  This perl script will parse HWP Attribute XML files and
-# initfile attr files and create the fapiGetInitFileAttr() function
-# in a file called fapiAttributeService.C
-#
-# Author: Mike Jones
-#
-# Change Log **********************************************************
-#
-#  Flag  Track#    Userid    Date      Description
-#  ----  --------  --------  --------  -----------
-#                  mjjones   11/15/11  Copied from fapiParseAttributeInfo
-#                  mjjones   12/12/11  Support all attributes if no if-attr
-#                                      files specified (for Cronus)
-#                  mjjones   01/13/12  Use new ReturnCode interfaces
-#                  mjjones   02/08/12  Handle attribute files with 1 entry
-#                  mjjones   06/12/12  Handle privileged attributes
-#                  mjjones   09/28/12  Minor change to add FFDC on error
-#                  mjjones   10/26/12  Output attrId/targType on error
-#
-# End Change Log ******************************************************
-
-use strict;
-
-#------------------------------------------------------------------------------
-# Print Command Line Help
-#------------------------------------------------------------------------------
-my $numArgs = $#ARGV + 1;
-if ($numArgs < 3)
-{
-    print ("Usage: fapiCreateIfAttrService.pl <output dir>\n");
-    print ("           [<if-attr-file1> <if-attr-file2> ...]\n");
-    print ("           -a <attr-xml-file1> [<attr-xml-file2> ...]\n");
-    print ("  This perl script will parse if-attr files (containing the\n");
-    print ("  attributes used by the initfile) and attribute XML files\n");
-    print ("  (containing all HWPF attributes) and create the\n");
-    print ("  fapiGetInitFileAttr() function in a file called\n");
-    print ("  fapiAttributeService.C. Only the attributes specified in\n");
-    print ("  the if-attr files are supported. If no if-attr files are\n");
-    print ("  specified then all attributes are supported\n");
-    exit(1);
-}
-
-#------------------------------------------------------------------------------
-# Specify perl modules to use
-#------------------------------------------------------------------------------
-use XML::Simple;
-my $xml = new XML::Simple (KeyAttr=>[]);
-
-# Uncomment to enable debug output
-#use Data::Dumper;
-
-#------------------------------------------------------------------------------
-# Open output file for writing
-#------------------------------------------------------------------------------
-my $asFile = $ARGV[0];
-$asFile .= "/";
-$asFile .= "fapiAttributeService.C";
-open(ASFILE, ">", $asFile);
-
-#------------------------------------------------------------------------------
-# Print Start of file information to fapiAttributeService.C
-#------------------------------------------------------------------------------
-print ASFILE "// fapiAttributeService.C\n";
-print ASFILE "// This file is generated by perl script fapiCreateIfAttrService.pl\n\n";
-print ASFILE "#include <fapiAttributeService.H>\n";
-print ASFILE "#include <fapiChipEcFeature.H>\n";
-print ASFILE "#include <fapiPlatTrace.H>\n\n";
-print ASFILE "namespace fapi\n";
-print ASFILE "{\n\n";
-print ASFILE "ReturnCode fapiGetInitFileAttr(const AttributeId i_id,\n";
-print ASFILE "                               const Target * i_pTarget,\n";
-print ASFILE "                               uint64_t & o_val,\n";
-print ASFILE "                               const uint32_t i_arrayIndex1,\n";
-print ASFILE "                               const uint32_t i_arrayIndex2,\n";
-print ASFILE "                               const uint32_t i_arrayIndex3,\n";
-print ASFILE "                               const uint32_t i_arrayIndex4)\n";
-print ASFILE "{\n";
-print ASFILE "    ReturnCode l_rc;\n\n";
-
-my $xmlFiles = 0;
-my $attCount = 0;
-my $numIfAttrFiles = 0;
-my @attrIds;
-
-#------------------------------------------------------------------------------
-# Element names
-#------------------------------------------------------------------------------
-my $attribute = 'attribute';
-
-#------------------------------------------------------------------------------
-# For each argument
-#------------------------------------------------------------------------------
-foreach my $argnum (1 .. $#ARGV)
-{
-    my $infile = $ARGV[$argnum];
-
-    if ($infile eq '-a')
-    {
-        # Start of attribute XML files
-        $xmlFiles = 1;
-        next;
-    }
-
-    if ($xmlFiles == 0)
-    {
-        #----------------------------------------------------------------------
-        # Process initfile attr file. This file contains the HWPF attributes
-        # that the initfile uses.
-        #----------------------------------------------------------------------
-        $numIfAttrFiles++;
-        open(ATTRFILE, "<", $infile);
-        
-        # Read each line of the file (each line contains an attribute)
-        while(my $fileAttrId = <ATTRFILE>)
-        {
-            # Remove newline
-            chomp($fileAttrId);
-
-            # Store the attribute in @attrIds if it does not already exist
-            my $match = 0;
-
-            foreach my $attrId (@attrIds)
-            {
-                if ($fileAttrId eq $attrId)
-                {
-                    $match = 1;
-                    last;
-                }
-            }
-
-            if (!($match))
-            {
-                push(@attrIds, $fileAttrId);
-            }
-        } 
-
-        close(ATTRFILE);
-    }
-    else
-    {
-        #----------------------------------------------------------------------
-        # Process XML file. The ForceArray option ensures that there is an
-        # array of attributes even if there is only one attribute in the file
-        #----------------------------------------------------------------------
-        my $attributes = $xml->XMLin($infile, ForceArray => [$attribute]);
-
-        #----------------------------------------------------------------------
-        # For each Attribute
-        #----------------------------------------------------------------------
-        foreach my $attr (@{$attributes->{attribute}})
-        {
-            #------------------------------------------------------------------
-            # Check that the AttributeId exists
-            #------------------------------------------------------------------
-            if (! exists $attr->{id})
-            {
-                print ("fapiParseAttributeInfo.pl ERROR. Att 'id' missing\n");
-                exit(1);
-            }
-
-            #------------------------------------------------------------------
-            # Find if the attribute is used by any initfile. If no if-attr
-            # files were specified then support all attributes
-            #------------------------------------------------------------------
-            my $match = 0;
-
-            if ($numIfAttrFiles)
-            {
-                foreach my $attrId (@attrIds)
-                {
-                    if ($attr->{id} eq $attrId)
-                    {
-                        $match = 1;
-                        last;
-                    }
-                }
-            }
-            else
-            {
-                $match = 1;
-            }
-
-            if (!($match))
-            {
-                # Look at the next attribute in the XML file
-                next;
-            }
-
-            #------------------------------------------------------------------
-            # Figure out the number of attribute array dimensions
-            #------------------------------------------------------------------
-            my $numArrayDimensions = 0;
-            if ($attr->{array})
-            {
-                # Remove leading whitespace
-                my $dimText = $attr->{array};
-                $dimText =~ s/^\s+//;
-
-                # Split on commas or whitespace
-                my @vals = split(/\s*,\s*|\s+/, $dimText);
-
-                $numArrayDimensions=@vals;
-            }
-
-            #------------------------------------------------------------------
-            # Print the attribute get code to fapiAttributeService.C
-            #------------------------------------------------------------------
-            if ($attCount > 0)
-            {
-                print ASFILE "    else ";
-            }
-            else
-            {
-                print ASFILE "    ";
-            }
-            $attCount++;
-
-            print ASFILE "if (i_id == $attr->{id})\n";
-            print ASFILE "    {\n"; 
-            print ASFILE "        $attr->{id}_Type l_attr;\n";
-
-            if (exists $attr->{privileged})
-            {
-                print ASFILE "        l_rc = FAPI_ATTR_GET_PRIVILEGED($attr->{id}, i_pTarget, l_attr);\n";
-            }
-            else
-            {
-                print ASFILE "        l_rc = FAPI_ATTR_GET($attr->{id}, i_pTarget, l_attr);\n";
-            }
-            print ASFILE "        o_val = l_attr";
-
-            if ($numArrayDimensions >= 5)
-            {
-                print ("fapiParseAttributeInfo.pl ERROR. More than 4 array dimensions!!\n");
-                exit(1);
-            }
-            else
-            {
-                for (my $i = 0; $i < $numArrayDimensions; $i++)
-                {
-                    print ASFILE "[i_arrayIndex";
-                    print ASFILE $i+1;
-                    print ASFILE "]";
-                }
-            }
-
-            print ASFILE ";\n";
-            print ASFILE "    }\n";
-        }
-    }
-}
-
-#------------------------------------------------------------------------------
-# Print End of file information to fapiAttributeService.C
-#--------------------------------------------------------------------------
-if ($attCount > 0)
-{
-    print ASFILE "    else\n";
-}
-print ASFILE "    {\n";
-print ASFILE "        FAPI_ERR(\"fapiGetInitFileAttr: Unrecognized attr ID: 0x%x\", i_id);\n";
-print ASFILE "        l_rc.setFapiError(FAPI_RC_INVALID_ATTR_GET);\n";
-print ASFILE "        l_rc.addEIFfdc(0, &i_id, sizeof(i_id));\n";
-print ASFILE "    }\n\n";
-print ASFILE "    if (l_rc)\n";
-print ASFILE "    {\n";
-print ASFILE "        if (i_pTarget)\n";
-print ASFILE "        {\n";
-print ASFILE "            FAPI_ERR(\"fapiGetInitFileAttr: Error getting attr ID 0x%x from targType 0x%x\",\n";
-print ASFILE "                     i_id, i_pTarget->getType());\n";
-print ASFILE "        }\n";
-print ASFILE "        else\n";
-print ASFILE "        {\n";
-print ASFILE "            FAPI_ERR(\"fapiGetInitFileAttr: Error getting attr ID 0x%x from system target\",\n";
-print ASFILE "                     i_id);\n";
-print ASFILE "        }\n";
-print ASFILE "    }\n\n";
-print ASFILE "    return l_rc;\n";
-print ASFILE "}\n\n";
-print ASFILE "}\n";
-
-
-#------------------------------------------------------------------------------
-# Close output file
-#------------------------------------------------------------------------------
-close(ASFILE);
diff --git a/src/usr/hwpf/fapi/fapiCreateL3DeltaVals.pl b/src/usr/hwpf/fapi/fapiCreateL3DeltaVals.pl
deleted file mode 100755
index 3ec91df6d..000000000
--- a/src/usr/hwpf/fapi/fapiCreateL3DeltaVals.pl
+++ /dev/null
@@ -1,271 +0,0 @@
-#!/usr/bin/perl -w
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/fapi/fapiCreateL3DeltaVals.pl $
-#
-# OpenPOWER HostBoot Project
-#
-# Contributors Listed Below - COPYRIGHT 2013,2015
-# [+] International Business Machines Corp.
-#
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-# $Id: fapiCreateL3DeltaVals.pl,v 1.4 2014/12/17 23:43:11 thi Exp $
-#
-# Purpose:  This perl script will parse HWP Attribute XML files
-# and add attribute information to a file called fapiL3DeltaDataAttr.H
-#
-# Author: Dale Peterson
-# Last Updated: 09/20/2013
-#
-# Version: 1.0
-#
-# Change Log **********************************************************
-#
-#  Flag  Track#    Userid    Date      Description
-#  ----  --------  --------  --------  -----------
-#        873826    dpeterso  09/16/13  Based on fapiCreatePllRingAttrVals.pl
-#        920311    whs       03/23/14  PROC_EX_FUNC_L3_LENGTH from
-#                                      mrw to hwp accessor  
-#
-#
-# End Change Log ******************************************************
-
-use strict;
-use Cwd 'chdir';
-use Env;
-
-sub help;
-
-my $ProgName       = "fapiCreateL3DeltaVals.pl";
-my $ringAttrFile;
-my $outputPwd;
-my $DEBUG = 0;
-my $VERBOSE = 0;
-my $chip = "";
-my $ec = "";
-my $revision = "";
-my $fileName = "fapiL3DeltaDataAttr.H";
-
-my  @fileList = ();
-#Pull out the args passed in
-&parseArgs;
-
-my  $outputFile = "$outputPwd" . "$fileName";
-my  $line = "";
-
-my $count = 0;
-my $dataCount = 0;
-
-# Start to generate header file.
-
-open (OUTFILE, ">$outputFile") or die "Couldn't open $outputFile for output. \n";
-
-#Initial data types and definitions here
-
-print OUTFILE "// fapiL3DeltaDataAttr.H\n";
-print OUTFILE "// This file is generated by perl script fapiCreateL3DeltaVals.pl\n";
-print OUTFILE "\n";
-print OUTFILE "\n";
-print OUTFILE "#ifndef FAPIL3DELTADATAATTR_H_\n";
-print OUTFILE "#define FAPIL3DELTADATAATTR_H_\n";
-print OUTFILE "//----------------------------------------------------------------------\n";
-print OUTFILE "//  Includes\n";
-print OUTFILE "//----------------------------------------------------------------------\n";
-print OUTFILE "#include <stdlib.h>\n";
-print OUTFILE "\n";
-print OUTFILE "#include <fapiAttributeIds.H>\n";
-print OUTFILE "\n";
-print OUTFILE "#define DELTA_DATA_SIZE 64\n";
-
-
-# Create array structure for L3_DELTA_DATA attribute
-print OUTFILE "struct L3_DELTA_DATA_ATTR {\n";
-print OUTFILE "    uint8_t  l_ATTR_SELECT;\n";
-print OUTFILE "    uint8_t  l_ATTR_CHIPTYPE;\n";
-print OUTFILE "    uint8_t  l_ATTR_EC;\n";
-print OUTFILE "    uint32_t l_ATTR_BIT_LENGTH;\n";
-print OUTFILE "    uint32_t l_ATTR_L3_DELTA_DATA[DELTA_DATA_SIZE];\n";
-print OUTFILE "};\n";
-print OUTFILE "\n";
-print OUTFILE "\n" . "const L3_DELTA_DATA_ATTR L3_DELTA_DATA_array [] = {\n";
-
-# Loop over all attribute files
-foreach $ringAttrFile (@fileList)
-{
-    if ($ringAttrFile =~ m"(\S+/)?(\S+?)_(\d+?)_winkle_ring.attributes") {
-        $chip = $2;
-        $ec = $3;
-    } else
-    {
-        die "$ProgName ERROR : Couldn't parse chip type and ec from file $ringAttrFile \n\n";
-    }
-    my $count = 0;
-    my $dataCount = 0;
-    my $dataArrayString = "";
-    my $selectVal = 0;
-    my $lengthVal = 0;
-
-# open the winkle ring attribute file
-    open (FILE, "$ringAttrFile") or die "Couldn't open $ringAttrFile for input.\n";
-
-    if ($ringAttrFile =~ m"\S+/(\S+)") {
-        my $fileName = $1;
-        my $temp = `head -1 $ringAttrFile`;
-        if ($temp =~ m"Id: $fileName,v (\S+)") {
-            $revision = $1;
-        }
-    }
-
-    if (($DEBUG) || ($VERBOSE))
-    {
-        print "Chip: $chip \n";
-        print "EC: $ec \n";
-        print "File: $ringAttrFile \n";
-        print "Output File: $outputFile\n";
-    }
-
-
-    #Embed some version info
-    print OUTFILE "/**\n";
-    print OUTFILE " \@kdbfile $ringAttrFile\n";
-    print OUTFILE " \@chip $chip\n";
-    print OUTFILE " \@ec $ec\n";
-    print OUTFILE " \@version $revision\n";
-    print OUTFILE "*/\n";
-
-    while (<FILE>)
-    {   
-        # Each section we are interested in begins with ===BEGIN and ends with ===END
-        if (/\===BEGIN/../\===END/) {
-            # Keep track of how many instances we have in the file and reset some sub-counters.
-            if (/\===BEGIN/)
-            {
-                $count++;
-                $dataCount = 0;
-            }       
-
-            # Store select value in array
-            if ($_ =~ m"^#SELECT=(\d)")
-            {
-                $selectVal = $1;
-            }
-            if ($_ =~ m"^ATTR_PROC_EX_FUNC_L3_LENGTH u32\s+(\d+)\s+")
-            {
-                $lengthVal = $1;
-            
-                if ($selectVal != ($count-1))
-                {
-                    die "$ProgName ERROR: Select value in file $ringAttrFile does not appear to be sequential.  There may be a script problem or a corrupted ring attribute file.\n";
-                }
-
-                my $chipEnum = 0;
-                # Map chip type to fapi attribute enum values (p8=01, s1=02
-                if ($chip eq "s1")
-                {
-                   $chipEnum = "fapi::ENUM_ATTR_NAME_MURANO";
-                }
-                elsif ($chip eq "p8")
-                {
-                   $chipEnum = "fapi::ENUM_ATTR_NAME_VENICE";
-                }
-                elsif ($chip eq "n1")
-                {
-                   $chipEnum = "fapi::ENUM_ATTR_NAME_NAPLES";
-                }
-                else
-                {
-                    die "$ProgName ERROR: Chip type $chip not supported by this script.  Either the ring attribute file is in error or support for the new chip type needs to be added.\n";
-                }
-                print OUTFILE "{\n";
-                print OUTFILE "   $selectVal, \t// ATTR_PROC_PBIEX_ASYNC_SEL \n";
-                print OUTFILE "   $chipEnum, \t// CHIP TYPE  \n";
-                print OUTFILE "   0x$ec, \t// EC LEVEL \n";
-                print OUTFILE "   $lengthVal, \t// RING LENGTH \n";
-                print OUTFILE "   {\n";
-            }
-
-            # Store values in array
-            if ($_ =~ m"^ATTR_PROC_EX_FUNC_L3_DELTA_DATA\[(\d+)\]\s+\S+\s+(\S+)")
-            {
-                if ($dataCount != $1)
-                {
-                    die "$ProgName: ERROR: Data array index value in file $ringAttrFile does not appear to be sequential.  There may be a script problem or a corrupted ring attribute file.\n";
-                }
-                $dataCount++;
-                $dataArrayString = $dataArrayString . $2 . ", ";
-                # If this is the last entry in the array (delta data size = 64
-                if ($dataCount eq 64)
-                { 
-                    print OUTFILE "        $dataArrayString\n";
-                    print OUTFILE "   }, // ATTR_PROC_EX_FUNC_L3_DELTA_DATA\n";
-                    print OUTFILE "},\n";
-                    $dataArrayString = "";
-                }
-            }
-        }
-    }
-
-    close (FILE);
-
-}
-print OUTFILE "}; \n\n";
-
-print OUTFILE "#endif  // FAPIL3DELTADATAATTR_H_\n";
-close (OUTFILE);
-exit 0;
-
-sub help {
-    printf("Usage:  $ProgName  <output directory> [<attributes-file1> [<attributes-file2> ...]] [--help|-h]\n");
-    printf("Generates C header file from KB winkle_ring.attributes file(s).  \n");
-    printf("Example: $ProgName \$PWD p8_10_winkle_ring.attributes s1_10_winkle_ring.attributes -v\n\n");
-    exit(0);
-}
-
-sub parseArgs {
-    #Note that arg 0 MUST be output dir. If no args are specified, usage is printed.
-    if (!defined $ARGV[0])
-    {
-        &help;
-    }
-
-    # Output directory is first parameter
-    $outputPwd = $ARGV[0];
-    $outputPwd .= "/";
-
-    foreach my $argnum (1 .. $#ARGV)
-    {
-        my $Arg = $ARGV[$argnum];
-
-        if ($Arg =~ m"^--debug" || $Arg =~ m"^-d")
-        {
-            $DEBUG = 1;
-        }
-        elsif ($Arg =~ m"^--verbose" || $Arg =~ m"^-v")
-        {
-            $VERBOSE = 1;
-        }
-        elsif ($Arg =~ m"^--help" || $Arg =~ m"^-h")
-        {
-            &help;
-            exit 1;
-        }
-        else
-        {
-            push(@fileList,$Arg);
-        }
-    }
-}
diff --git a/src/usr/hwpf/fapi/fapiCreatePllRingAttrVals.pl b/src/usr/hwpf/fapi/fapiCreatePllRingAttrVals.pl
deleted file mode 100755
index 552d76e58..000000000
--- a/src/usr/hwpf/fapi/fapiCreatePllRingAttrVals.pl
+++ /dev/null
@@ -1,689 +0,0 @@
-#!/usr/bin/perl -w
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/fapi/fapiCreatePllRingAttrVals.pl $
-#
-# OpenPOWER HostBoot Project
-#
-# COPYRIGHT International Business Machines Corp. 2013,2014
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-# $Id: fapiCreatePllRingAttrVals.pl,v 1.4 2014/01/13 15:49:47 dedahle Exp $
-#
-# Purpose:  This perl script will parse HWP Attribute XML files
-# and add attribute information to a file called fapiAttributeIds.H
-#
-# Author: Kahn Evans
-# Last Updated: 09/16/2013
-#
-# Version: 1.0
-#
-# Change Log **********************************************************
-#
-#  Flag  Track#    Userid    Date      Description
-#  ----  --------  --------  --------  -----------
-#                  dpeterso  09/16/13  Modified Kahn Evans/John Farrugia script to gen .H
-#
-#
-# End Change Log ******************************************************
-
-use strict;
-use Cwd 'chdir';
-use Env;
-
-sub help;
-
-my $ProgName            = "fapicreatePllRingAttrVals.pl";
-my @args                = @ARGV;
-my $Arg                 = "";
-#my $ekbPathHead = "/cronus/ekb";
-my $ekbPathHead = ".";
-my $kbPath = "$ekbPathHead/eclipz/chips/";
-#my $kbPath = "/cronus/ekb/eclipz/chips/";
-my $pllFile;
-my $callingPwd;
-my $DEBUG = 0;
-my $VERBOSE = 0;
-my $chip = "";
-my $capChip = "";
-my $ec = "";
-my  $fileName = "fapiPllRingAttr.H";
-
-my %cronusNameToFapi = (
-                        ATTR_MSS_FREQ                => "MEMB_MEM_FREQ",
-                        ATTR_FREQ_X_mem                => "MEMB_NEST_FREQ",
-                        ATTR_FREQ_A                => "PU_ABUS_FREQ",
-                        ATTR_FREQ_PB                => "PU_DMI_FREQ",
-                        ATTR_NEST_FREQ_MHZ        => "PU_NEST_FREQ",
-                        ATTR_FREQ_PCIE                => "PU_PCIE_FREQ",
-                        ATTR_NO_FAPI_ATTR_ALWAYS_100 => "PU_PCIE_REF_CLOCK",
-                        ATTR_FREQ_PROC_REFCLOCK        => "PU_REF_CLOCK",
-                        ATTR_FREQ_X                => "PU_XBUS_FREQ",
-                        );
-
-# Frequencies to query for each attribute type
-# NOTE: For each attribute the frequencies must be listed in alphabetical order
-my %attrToFreqs = (
-                   ATTR_PROC_AB_BNDY_PLL                => [ "ATTR_FREQ_A" ],
-                   ATTR_PROC_AB_BNDY_PLL_FOR_DCCAL      => [ "ATTR_FREQ_A" ],
-                   ATTR_PROC_AB_BNDY_PLL_FOR_RUNTIME    => [ "ATTR_FREQ_A" ],
-                   ATTR_PROC_PB_BNDY_DMIPLL             => [ "ATTR_FREQ_PB" ],
-                   ATTR_PROC_PB_BNDY_DMIPLL_FOR_DCCAL   => [ "ATTR_FREQ_PB" ],
-                   ATTR_PROC_PB_BNDY_DMIPLL_FOR_RUNTIME => [ "ATTR_FREQ_PB" ],
-                   ATTR_PROC_PCI_BNDY_PLL               => [ "ATTR_FREQ_PCIE" ],
-                   ATTR_PROC_PERV_BNDY_PLL              => [ "ATTR_NEST_FREQ_MHZ", "ATTR_NO_FAPI_ATTR_ALWAYS_100", "ATTR_FREQ_PROC_REFCLOCK", "ATTR_FREQ_X" ],
-                   ATTR_MEMB_TP_BNDY_PLL                    => [ "ATTR_MSS_FREQ", "ATTR_FREQ_X_mem" ],
-                   ATTR_MEMB_TP_BNDY_PLL_FOR_DCCAL          => [ "ATTR_MSS_FREQ", "ATTR_FREQ_X_mem" ],
-                   ATTR_MEMB_TP_BNDY_PLL_FOR_RUNTIME        => [ "ATTR_MSS_FREQ", "ATTR_FREQ_X_mem" ],
-                   ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1066   => [ "ATTR_MSS_FREQ", "ATTR_FREQ_X_mem" ],
-                   ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1333   => [ "ATTR_MSS_FREQ", "ATTR_FREQ_X_mem" ],
-                   ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1600   => [ "ATTR_MSS_FREQ", "ATTR_FREQ_X_mem" ],
-                   ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1866   => [ "ATTR_MSS_FREQ", "ATTR_FREQ_X_mem" ],
-                   ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1066   => [ "ATTR_MSS_FREQ", "ATTR_FREQ_X_mem" ],
-                   ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1333   => [ "ATTR_MSS_FREQ", "ATTR_FREQ_X_mem" ],
-                   ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1600   => [ "ATTR_MSS_FREQ", "ATTR_FREQ_X_mem" ],
-                   ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1866   => [ "ATTR_MSS_FREQ", "ATTR_FREQ_X_mem" ],
-                   );
-
-# Get the path the script was called from so we can get back to it later
-$callingPwd = $ARGV[0];
-$callingPwd .= "/";
-
-my  $fileString = "";
-#Pull out the args passed in
-&parseArgs;
-
-#Full path of the file
-$pllFile = "$kbPath" . "$chip\/" . "working\/ec_" . "$ec\/" . "$chip" . "_" . "$ec" . "_pll_ring.attributes";
-
-#output file path and name
-if ($chip ne ""){
-    $capChip = ucfirst($chip);
-    $fileName = $capChip . "Ec" . "$ec" . "Pll.H";
-}
-
-my  $outputFile = "$callingPwd" . "$fileName";
-my  $line = "";
-
-# Start to generate header file.
-
-open (OUTFILE, ">$outputFile") or die "Couldn't open $outputFile for output. \n";
-
-#Initial data types and definitions here
-
-print OUTFILE "// fapiPllRingAttr.H\n";
-print OUTFILE "// This file is generated by perl script fapiCreatePllRingAttrVals.pl\n";
-print OUTFILE "\n";
-print OUTFILE "#ifndef FAPIPLLRINGATTR_H_\n";
-print OUTFILE "#define FAPIPLLRINGATTR_H_\n";
-print OUTFILE "//----------------------------------------------------------------------\n";
-print OUTFILE "//  Includes\n";
-print OUTFILE "//----------------------------------------------------------------------\n";
-print OUTFILE "#include <stdlib.h>\n";
-print OUTFILE "\n";
-print OUTFILE "#include <fapiAttributeIds.H>\n";
-print OUTFILE "\n";
-print OUTFILE "using namespace fapi;\n";
-print OUTFILE "\n";
-print OUTFILE "#define MAX_PLL_RING_SIZE_BYTES 256\n";
-print OUTFILE "\n";
-
-
-# Create array structures for PLL attributes based on the number of keys
-my %freqCountHash = ();
-foreach my $val (sort (values %attrToFreqs)) {
-    my $numKeys = scalar @$val;
-    if (!$freqCountHash{$numKeys}) {
-        $freqCountHash{$numKeys} = 1;
-        print OUTFILE "struct PLL_RING_ATTR_WITH_" . $numKeys . "_KEYS {\n";
-        for (my $i=1; $i <= $numKeys; $i++) {
-            print OUTFILE "    uint32_t l_freq_" . $i . ";\n";
-        }
-        print OUTFILE "    uint16_t l_ATTR_PLL_RING_BIT_LENGTH;\n";
-        print OUTFILE "    uint8_t l_ATTR_PLL_RING_BYTE_LENGTH;\n";
-        print OUTFILE "    uint8_t l_ATTR_PLL_RING_DATA [MAX_PLL_RING_SIZE_BYTES];\n";
-        print OUTFILE "    uint8_t l_ATTR_PLL_RING_FLUSH [MAX_PLL_RING_SIZE_BYTES];\n";
-        print OUTFILE "};\n";
-        print OUTFILE "\n";
-    }
-}
-
-print OUTFILE "\n";
-
-$fileString = "ls -1 $fileString |";
-
-open(ALLFILES, "$fileString") or die die "$ProgName ERROR : Couldn't open list of files $fileString\n";
-
-# Loop over all attribute files found
-while (defined($line = <ALLFILES>))
-{
-    $pllFile = $line;
-    if ($pllFile =~ m"\S+/(\S+?)_(\d+?)_pll_ring.attributes")
-    {
-        $chip = $1;
-        $capChip = ucfirst($chip);
-        $ec = $2;
-    } else {
-        die "$ProgName ERROR : Couldn't parse chip type and ec from file $pllFile \n\n";
-    }
-
-    my $count = 0;
-    my @envType ;
-    my @freqVals;
-    my @freqType;
-    my @uniqFreqType;
-    my $uniqFreqTypeCount = 0;
-    my @pllDataName;
-    my @pllFlushName;
-    my @pllDataArrayNames;
-    my @pllDataArrayVals;
-    my @pllFlushArrayNames;
-    my @pllFlushArrayVals;
-    my @pllRingLength;
-    my @pllDataSize;
-    my @pllFlushSize;
-    my @freqValSize;
-    my @uniqAttrs;
-    my @uniqAttrSize;
-    my @uniqFlushAttrs;
-    my @uniqFlushAttrSize;
-    my $uniqAttrCount = 0;
-    my $uniqFlushAttrCount = 0;
-    my $freqCount = 0;
-    my $dataCount = 0;
-    my $flushCount = 0;
-    my $haveHwVals = 0;
-
-    # open the pll attribute file
-    open (FILE, "$pllFile") or die "Couldn't open $pllFile for input.\n";
-
-
-    if (($DEBUG) || ($VERBOSE))
-    {
-        print "Chip: $chip \n";
-        print "EC: $ec \n";
-        print "File: $pllFile \n";
-        print "Output File: $outputFile\n";
-    }
-
-    while (<FILE>)
-    {
-        # Each section we are interested in begins with ===BEGIN and ends with ===END
-        if (/\===BEGIN/../\===END/)
-        {
-            # Keep track of how many instances we have in the file and reset some sub-counters.
-            if (/\===BEGIN/)
-            {
-                $count++;
-                $freqCount = 0;
-                $dataCount = 0;
-                $flushCount = 0;
-            }
-            # Determine if we are dealing with SIM or HW and store it in an array
-            if (m/\#ENV\=/)
-            {
-                my $env = $_;
-                chomp $env;
-                $env =~ tr/\#ENV\=//d ;
-                push(@envType,$env);
-                if ($env eq "HW") {
-                    $haveHwVals = 1;
-                }
-            }
-
-            # Determine any frequency dependent values and store them in arrays
-            # Also keep track of the size.
-            if ((m/\#PU_/) || (m/\#MEMB_/))
-            {
-                $freqCount++;
-                my $freq = $_;
-                chomp $freq;
-                ($freqType[$count - 1][$freqCount - 1], $freqVals[$count - 1][$freqCount - 1]) = split " = ",$freq;
-                # Strip the # off the name and convert to lower case
-                $freqType[$count - 1][$freqCount - 1] =~ tr/\#//d ;
-                $freqValSize[$count - 1] = $freqCount;
-
-                # Determine if this is the first instance of a particular name
-                # If it is, then store it away in the uniq array.
-                if ($uniqFreqTypeCount == 0)
-                {
-                    $uniqFreqType[$uniqFreqTypeCount] = $freqType[$count - 1][$freqCount - 1];
-                    $uniqFreqTypeCount++;
-                }
-                else
-                {
-                    my $uniqFreq = 1;
-                    for (my $i=0; $i < $uniqFreqTypeCount; $i++)
-                    {
-                        if ($freqType[$count - 1][$freqCount - 1] eq $uniqFreqType[$i])
-                        {
-                            $uniqFreq = 0;
-                        }
-                    }
-                    if ($uniqFreq == 1)
-                    {
-                        $uniqFreqType[$uniqFreqTypeCount] = $freqType[$count - 1][$freqCount - 1];
-                        $uniqFreqTypeCount++;
-                    }
-                }
-
-            }
-
-            # Determine the PLL_DATA name and store in an array
-            if ((m/_DATA/) && (m/\#/))
-            {
-                my ($pllName, $garbage) = split " = ",$_;
-                #Remove the leading #
-                $pllName =~ tr/\#//d;
-                #Remove whitespace at the end.
-                $pllName =~ s/\s+$//;
-                push(@pllDataName,$pllName);
-
-                # Determine if this is the first instance of a particular name
-                # If it is, then store it away in the uniq array.
-                if ($count == 1)
-                {
-                    $uniqAttrs[$count - 1] = $pllName;
-                    $uniqAttrCount++;
-                }
-                else
-                {
-                    my $uniq = 1;
-                    for (my $i=0; $i < $uniqAttrCount; $i++)
-                    {
-                        if ($pllName eq $uniqAttrs[$i])
-                        {
-                            $uniq = 0;
-                        }
-                    }
-                    if ($uniq == 1)
-                    {
-                        $uniqAttrs[$uniqAttrCount] = $pllName;
-                        $uniqAttrCount++;
-                    }
-                }
-
-            }
-
-
-            # Determine the PLL_FLUSH name and store in an array
-            if ((m/_FLUSH/) && (m/\#/) && !(m/GEN_FLUSH/))
-            {
-                my ($pllFlush, $garbage) = split " = ",$_;
-                #Remove # at the beginning
-                $pllFlush =~ tr/\#//d;
-                #Remove whitespace at the end.
-                $pllFlush =~ s/\s+$//;
-                push(@pllFlushName,$pllFlush);
-
-                # Determine if this is the first instance of a particular name
-                # If it is, then store it away in the uniq array.
-                if ($count == 1)
-                {
-                    $uniqFlushAttrs[$count - 1] = $pllFlush;
-                    $uniqFlushAttrCount++;
-                }
-                else
-                {
-                    my $uniqFlush = 1;
-                    for (my $i=0; $i < $uniqFlushAttrCount; $i++)
-                    {
-                        if ($pllFlush eq $uniqFlushAttrs[$i])
-                        {
-                            $uniqFlush = 0;
-                        }
-                    }
-                    if ($uniqFlush == 1)
-                    {
-                        $uniqFlushAttrs[$uniqFlushAttrCount] = $pllFlush;
-                        $uniqFlushAttrCount++;
-                    }
-                }
-
-
-            }
-            # No flush values exist.  Create a blank entry to prevent errors during flush looping output.
-            elsif (m/GEN_FLUSH\=NO/) {
-                my $pllFlush = "";
-                push(@pllFlushName,$pllFlush);
-
-            }
-
-            #Store bit length in an array..
-            if ($_ =~ m/_LENGTH\s+u\d+\s+(\d+)/)
-            {
-                $pllRingLength[$count - 1] = $1;
-            }
-
-            #Determine the actual data names and values and store them in arrays.
-            #Also keep track of the size.
-            if ((m/_DATA/) && (m/\[/))
-            {
-                my $garbage;
-                $dataCount++;
-                chomp $_;
-                ($pllDataArrayNames[$count - 1][$dataCount - 1], $garbage, $pllDataArrayVals[$count - 1][$dataCount - 1]) = split " ",$_;
-                $pllDataSize[$count - 1] = $dataCount;
-            }
-
-            #Determine the actual flush names and values and store them in arrays.
-            #Also keep track of the size.
-            if ((m/_FLUSH/) && (m/\[/))
-            {
-                my $garbage;
-                $flushCount++;
-                chomp $_;
-                ($pllFlushArrayNames[$count - 1][$flushCount - 1], $garbage, $pllFlushArrayVals[$count - 1][$flushCount - 1]) = split " ",$_;
-                $pllFlushSize[$count - 1] = $flushCount;
-            }
-
-        }
-
-    }
-    close (FILE);
-
-    #Fill in some other values now that we need
-    for (my $q=0; $q < $uniqAttrCount; $q++)
-    {
-        for (my $r=0; $r < $count; $r++)
-        {
-            if ($uniqAttrs[$q] eq $pllDataName[$r])
-            {
-                $uniqAttrSize[$q] = $pllDataSize[$r];
-                last;
-            }
-        }
-    }
-
-    for (my $q=0; $q < $uniqFlushAttrCount; $q++)
-    {
-        for (my $r=0; $r < $count; $r++)
-        {
-            if ($uniqFlushAttrs[$q] eq $pllFlushName[$r])
-            {
-                $uniqFlushAttrSize[$q] = $pllFlushSize[$r];
-                last;
-            }
-        }
-    }
-
-
-    #Embed some version info
-    print OUTFILE "/**\n";
-    print OUTFILE " \@kdbfile $pllFile\n";
-    print OUTFILE " \@chip $chip\n";
-    print OUTFILE " \@ec $ec\n";
-    print OUTFILE "*/\n";
-    print OUTFILE "\n";
-
-
-    #################################################################################
-    # First loop over all instances of each uniq attribute within the pll data
-    # Then loop over all HW and SIM instances
-    # Then check the frequency dependencies
-    # Output the attr values
-    # Repeat all of the above for pll flush values.
-    #################################################################################
-
-
-    #First display the HW attr values
-    ### PLL_DATA VALUES ###
-    for (my $x = 0; $x < $uniqAttrCount; $x++)
-    {
-        my %freqHash = ();
-        my $firstAttr = 1;
-        my $simString = "\n";
-        my $freqString = "";
-        my $isDefHw = 0;
-        my $isDefSim = 0;
-        my $arrayIndex = 0;
-        my @freqList = ();
-        my $attr_prefix = "";
-        my $y = 0;
-
-        if ($uniqAttrs[$x] =~ m"(\S+)_DATA")
-        {
-            $attr_prefix = $1;
-            $y = scalar @{$attrToFreqs{$attr_prefix}};
-        }
-        print OUTFILE "\n" . "const PLL_RING_ATTR_WITH_" . $y . "_KEYS $capChip" . "_" . $ec . "_" . "$uniqAttrs[$x]_array [] = {\n";
-
-        for (my $y=0 ; $y < $count; $y++) {
-            if ($pllDataName[$y] eq $uniqAttrs[$x])
-            {
-                if ($envType[$y] eq "HW")
-                {
-                    #This attribute has HW values.
-                    $isDefHw = 1;
-                    if ($firstAttr == 1)
-                    {
-                        print OUTFILE "#ifdef HW\n";
-                        $firstAttr = 0;
-                        $arrayIndex = 0;
-                    } else
-                    {
-                        $arrayIndex++;
-                    }
-                    print OUTFILE "            {        // Entry $arrayIndex\n";
-                    %freqHash = ();
-                    for (my $q=0; $q < $uniqFreqTypeCount; $q++)
-                    {
-                        $freqHash{$uniqFreqType[$q]} = 0;
-                    }
-                    for (my $z=0; $z < $freqValSize[$y]; $z++) {
-                        $freqHash{$freqType[$y][$z]} = $freqVals[$y][$z];
-                    }
-                    #                    foreach my $freq (sort keys %freqHash) {
-                    if ($uniqAttrs[$x] =~ m"(\S+)_DATA")
-                    {
-                        my $attr_prefix = $1;
-                        for (my $freqIdx = 0; $freqIdx <= $#{$attrToFreqs{$attr_prefix}}; $freqIdx++)
-                        {
-                            # Frequency is supported for this attribute
-                            print OUTFILE "            $freqHash{$cronusNameToFapi{$attrToFreqs{$attr_prefix}[$freqIdx]}},   \t// $attrToFreqs{$attr_prefix}[$freqIdx] = $cronusNameToFapi{$attrToFreqs{$attr_prefix}[$freqIdx]} \n";
-                        }
-                    }
-                    print OUTFILE "            $pllRingLength[$y], \t// $pllDataName[$y] ring length\n";
-                    print OUTFILE "            $pllDataSize[$y], \t// $pllDataName[$y] array length\n";
-                    # Add attr values here
-                    print OUTFILE "            { ";
-                    for (my $attr_num = 0; $attr_num < $pllDataSize[$y]-1; $attr_num++)
-                    {
-                        print OUTFILE "$pllDataArrayVals[$y][$attr_num], ";
-                    }
-                    print OUTFILE " }, \t// $pllDataName[$y]\n";
-
-                    if (defined $pllFlushSize[$y])
-                    {
-                        print OUTFILE "            { ";
-                        for (my $attr_num = 0; $attr_num < $pllFlushSize[$y]-1; $attr_num++)
-                        {
-                            print OUTFILE "$pllFlushArrayVals[$y][$attr_num], ";
-                        }
-                        print OUTFILE " }, \t// $pllFlushName[$y]\n";
-                    }
-
-                    print OUTFILE "            },\n";
-
-                } # end envType condition
-
-                # For SIM values, there are a couple of assumptions:
-                # 1.  No frequency values
-                # 2.  Only one set of values per attribute
-                elsif ($envType[$y] eq "SIM")
-                {
-                    $isDefSim = 1;
-                    $simString = "            \{        // Entry 0\n";
-                    %freqHash = ();
-                    for (my $q=0; $q < $uniqFreqTypeCount; $q++)
-                    {
-                        $freqHash{$uniqFreqType[$q]} = 0;
-                    }
-                    #                    foreach my $freq (sort keys %freqHash) {
-                    if ($uniqAttrs[$x] =~ m"(\S+)_DATA")
-                    {
-                        my $attr_prefix = $1;
-                        for (my $freqIdx = 0; $freqIdx <= $#{$attrToFreqs{$attr_prefix}}; $freqIdx++)
-                        {
-                            # Frequency is supported for this attribute
-                            #                                if ($attrToFreqs{$attr_prefix}[$freqIdx] eq $cronusNameToFapi{$freq}) {
-                            $simString = $simString . "            $freqHash{$cronusNameToFapi{$attrToFreqs{$attr_prefix}[$freqIdx]}},   \t// $attrToFreqs{$attr_prefix}[$freqIdx] = $cronusNameToFapi{$attrToFreqs{$attr_prefix}[$freqIdx]} \n";
-                        }
-                    }
-                    $simString = $simString . "            $pllRingLength[$y], \t\t// $pllDataName[$y] ring length\n";
-                    $simString = $simString . "            $pllDataSize[$y], \t\t// $pllDataName[$y] array length\n";
-                    $simString = $simString . "            { ";
-                    for (my $attr_num = 0; $attr_num < $pllDataSize[$y]-1; $attr_num++)
-                    {
-                        $simString = $simString . "$pllDataArrayVals[$y][$attr_num], ";
-                    }
-                    # Print final byte
-                    $simString = $simString . " }, \t// $pllDataName[$y]\n";
-                    if (defined $pllFlushSize[$y])
-                    {
-                        #                        $simString = $simString . "            $pllFlushSize[$y], \t\t// $pllFlushName[$y]_LENGTH\n";
-                        $simString = $simString . "            { ";
-                        if ( $pllDataName[$y] =~ m"ATTR_PROC_PB_BNDY_DMIPLL_FOR_DCCAL")
-                        {
-                            print " pllFlushSize[y] = $pllFlushSize[$y]   y = $y  array size = $#pllFlushSize \n";
-                        }
-                        for (my $attr_num = 0; $attr_num < $pllFlushSize[$y]-1; $attr_num++)
-                        {
-                            if ( $pllDataName[$y] =~ m"ATTR_PROC_PB_BNDY_DMIPLL_FOR_DCCAL")
-                            {
-                                print " pllFlushSize[y] = $pllFlushSize[$y]   y = $y \n";
-                            }
-                            $simString = $simString . "$pllFlushArrayVals[$y][$attr_num], ";
-                        }
-                        # Print final byte
-                        $simString = $simString . " }, \t// $pllFlushName[$y]\n";
-                    }
-                    $simString = $simString . "            },\n";
-
-                } # end sim condition
-                else
-                {
-                    # We shouldn't be here
-                    print "fapicreatePllRingAttrVals.pl:ERROR: Unexpected environment type.  Should only be HW or SIM. \n";
-                    exit(1);
-                }
-
-            } # end pllDataName condition
-
-        } # end for loop over all attributes
-
-
-        #This is where we insert the SIM values.
-        if (($isDefHw == 1) && ($isDefSim == 1))
-        {
-            $simString = "#else\n" . $simString;
-        }
-
-        print OUTFILE "$simString\n";
-
-        #Only display this if we had HW values.
-        if ($isDefHw == 1)
-        {
-            print OUTFILE "#endif\n";
-        }
-
-        print OUTFILE "        };\n";
-
-    } # end for loop over uniq attributes
-
-    if ($VERBOSE)
-    {
-        print "Number of sections in file: $count \n";
-        print "Number of Freqs: @freqValSize \n";
-        print "Number of Data Vals: @pllDataSize \n";
-        print "Number of Flush Vals: @pllFlushSize \n";
-        print "Uniq Freq Types: @uniqFreqType \n";
-        print "Number of Uniq Freq Types: $uniqFreqTypeCount \n";
-        print "Uniq Attrs: @uniqAttrs \n";
-        print "Uniq Attr Size: @uniqAttrSize \n";
-        print "Uniq Flush Attrs: @uniqFlushAttrs \n";
-        print "Uniq Flush Attr Size: @uniqFlushAttrSize \n";
-        print "Number of Uniq Attrs: $uniqAttrCount \n";
-        print "Number of Uniq Flush Attrs: $uniqFlushAttrCount \n";
-
-        print "envType: @envType \n \n";
-        print "pllDataName: @pllDataName \n \n";
-        print "pllFlushName: @pllFlushName \n \n";
-
-        my $item1, my $item2;
-        print "\nfreqType: \n";
-        foreach $item1 (@freqType)
-        {
-            foreach $item2 (@{$item1})
-            {
-                print "$item2 ";
-            }
-            print "\n";
-        }
-        print "\nfreqVals: \n";
-        foreach $item1 (@freqVals)
-        {
-            foreach $item2 (@{$item1})
-            {
-                print "$item2 ";
-            }
-            print "\n";
-        }
-
-    }
-
-}
-
-print OUTFILE "#endif  // FAPIPLLRINGATTR_H_\n";
-close (OUTFILE);
-
-
-
-sub help {
-    printf("Usage:  fapicreatePllRingAttrVals.pl <output directory> [<attributes-file1> [<attributes-file2> ...] [-help|-h]\n");
-    printf("Generates C header file from KB pll_ring.attributes file(s).  \n");
-    printf("          fapicreatePllRingAttrVals.pl -v\n");
-    exit(0);
-}
-
-
-
-
-sub parseArgs {
-    #Note that arg 0 MUST be output dir
-    foreach my $argnum (1 .. $#ARGV)
-    {
-        my $infile = $ARGV[$argnum];
-
-        if ($Arg =~ m"^-debug" || $Arg =~ m"^-d")
-        {
-            $DEBUG = 1;
-        }
-        elsif ($Arg =~ m"^-verbose" || $Arg =~ m"^-v")
-        {
-            $VERBOSE = 1;
-        }
-        elsif ($Arg =~ m"^-help" || $Arg =~ m"^-h")
-        {
-            &help;
-            exit 1;
-        }
-        else
-        {
-            $fileString = "$fileString " . "$infile";
-        }
-    }
-}
diff --git a/src/usr/hwpf/fapi/fapiCreateTpDbgAttrVals.pl b/src/usr/hwpf/fapi/fapiCreateTpDbgAttrVals.pl
deleted file mode 100755
index f2c8d3f50..000000000
--- a/src/usr/hwpf/fapi/fapiCreateTpDbgAttrVals.pl
+++ /dev/null
@@ -1,249 +0,0 @@
-#!/usr/bin/perl -w
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: /afs/awd.austin.ibm.com/proj/p9/eclipz/KnowledgeBase/.cvsroot/eclipz/hwpf/working/hwp/tp_dbg_data_accessors/fapiCreateTpDbgAttrVals.pl,v $
-#
-# OpenPOWER HostBoot Project
-#
-# Contributors Listed Below - COPYRIGHT 2013,2015
-# [+] International Business Machines Corp.
-#
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-# $Id: fapiCreateTpDbgAttrVals.pl,v 1.1 2015/05/07 20:11:12 thi Exp $
-#
-# Purpose:  This perl script will parse HWP Attribute XML files
-# and add attribute information to a file called fapiTpDbgAttr.H
-#
-# Version: 1.0
-#
-# Change Log **********************************************************
-#
-#  Flag  Track#    Userid    Date      Description
-#  ----  --------  --------  --------  -----------
-#        941745    thi       04/17/15  Created
-#
-# End Change Log ******************************************************
-
-use strict;
-use Cwd 'chdir';
-use Env;
-
-sub help;
-
-my $ProgName       = "fapiCreateTpDbgAttrVals.pl";
-my $spyAttrFile;
-my $outputPwd;
-my $DEBUG = 0;
-my $VERBOSE = 0;
-my $chip = "";
-my $ec = "";
-my $revision = "";
-my $fileName = "fapiTpDbgDataAttr.H";
-
-my  @fileList = ();
-#Pull out the args passed in
-&parseArgs;
-
-my  $outputFile = "$outputPwd" . "$fileName";
-my  $line = "";
-
-my $dataCount = 0;
-
-# Start to generate header file.
-
-open (OUTFILE, ">$outputFile") or die "Couldn't open $outputFile for output. \n";
-
-#Initial data types and definitions here
-
-print OUTFILE "// fapiTpDbgDataAttr.H\n";
-print OUTFILE "// This file is generated by perl script fapiCreateTpDbgAttrVals.pl\n";
-print OUTFILE "\n";
-print OUTFILE "\n";
-print OUTFILE "#ifndef FAPI_TP_DBG_DATA_ATTR_H\n";
-print OUTFILE "#define FAPI_TP_DBG_DATA_ATTR_H\n";
-print OUTFILE "//----------------------------------------------------------------------\n";
-print OUTFILE "//  Includes\n";
-print OUTFILE "//----------------------------------------------------------------------\n";
-print OUTFILE "#include <stdlib.h>\n";
-print OUTFILE "\n";
-print OUTFILE "#include <fapiAttributeIds.H>\n";
-print OUTFILE "\n";
-print OUTFILE "#define SPY_OFFSET_SIZE 24\n";
-
-
-# Create array structure for TP_DBG_DATA attribute
-print OUTFILE "struct TP_DBG_DATA_ATTR {\n";
-print OUTFILE "    uint8_t  l_ATTR_CHIPTYPE;\n";
-print OUTFILE "    uint8_t  l_ATTR_EC;\n";
-print OUTFILE "    uint32_t l_ATTR_RING_LENGTH;\n";
-print OUTFILE "    uint32_t l_ATTR_SPY_LENGTH;\n";
-print OUTFILE "    uint32_t l_ATTR_TP_DBG_DATA[SPY_OFFSET_SIZE];\n";
-print OUTFILE "};\n";
-print OUTFILE "\n";
-print OUTFILE "\n" . "const TP_DBG_DATA_ATTR TP_DBG_DATA_array [] = {\n";
-
-# Loop over all attribute files
-foreach $spyAttrFile (@fileList)
-{
-    if ($spyAttrFile =~ m"(\S+/)?(\S+?)_(\d+?)_tp_dbg_data.attributes") {
-        $chip = $2;
-        $ec = $3;
-    } else
-    {
-        die "$ProgName ERROR : Couldn't parse chip type and ec from file $spyAttrFile \n\n";
-    }
-    my $dataArrayString = "";
-    my $ringLengthVal = 0;
-    my $spyLengthVal = 0;
-
-# open the winkle ring attribute file
-    open (FILE, "$spyAttrFile") or die "Couldn't open $spyAttrFile for input.\n";
-
-    if ($spyAttrFile =~ m"\S+/(\S+)") {
-        my $fileName = $1;
-        my $temp = `head -1 $spyAttrFile`;
-        if ($temp =~ m"Id: $fileName,v (\S+)") {
-            $revision = $1;
-        }
-    }
-
-    if (($DEBUG) || ($VERBOSE))
-    {
-        print "Chip: $chip \n";
-        print "EC: $ec \n";
-        print "File: $spyAttrFile \n";
-        print "Output File: $outputFile\n";
-    }
-
-
-    #Embed some version info
-    print OUTFILE "/**\n";
-    print OUTFILE " \@kdbfile $spyAttrFile\n";
-    print OUTFILE " \@chip $chip\n";
-    print OUTFILE " \@ec $ec\n";
-    print OUTFILE " \@version $revision\n";
-    print OUTFILE "*/\n";
-
-    while (<FILE>)
-    {   
-        # Store select value in array
-        if ($_ =~ m"^ATTR_PROC_PERV_VITL_LENGTH u32\s+(\d+)\s+")
-        {
-            $dataCount = 0;
-            $ringLengthVal = $1;
-        
-            my $chipEnum = 0;
-            # Map chip type to fapi attribute enum values (p8=01, s1=02
-            if ($chip eq "s1")
-            {
-               $chipEnum = "fapi::ENUM_ATTR_NAME_MURANO";
-            }
-            elsif ($chip eq "p8")
-            {
-               $chipEnum = "fapi::ENUM_ATTR_NAME_VENICE";
-            }
-            elsif ($chip eq "n1")
-            {
-               $chipEnum = "fapi::ENUM_ATTR_NAME_NAPLES";
-            }
-            else
-            {
-                die "$ProgName ERROR: Chip type $chip not supported by this script.  Either the spy attribute file is in error or support for the new chip type needs to be added.\n";
-            }
-            print OUTFILE "{\n";
-            print OUTFILE "   $chipEnum, \t// CHIP TYPE  \n";
-            print OUTFILE "   0x$ec, \t// EC LEVEL \n";
-            print OUTFILE "   $ringLengthVal, \t// ATTR_PROC_PERV_VITL_LENGTH \n";
-        }
-
-        if ($_ =~ m"^ATTR_PROC_TP_VITL_SPY_LENGTH u32\s+(\d+)\s+")
-        {
-            $spyLengthVal = $1;
-            print OUTFILE "   $spyLengthVal, \t// ATTR_PROC_TP_VITL_SPY_LENGTH \n";
-            print OUTFILE "   {\n";
-        }
-
-        # Store values in array
-        if ($_ =~ m"^ATTR_PROC_TP_VITL_SPY_OFFSETS\[(\d+)\]\s+\S+\s+(\S+)")
-        {
-            if ($dataCount != $1)
-            {
-                die "$ProgName: ERROR: Data array index value in file $spyAttrFile does not appear to be sequential.  There may be a script problem or a corrupted spy attribute file.\n";
-            }
-            $dataCount++;
-            $dataArrayString = $dataArrayString . $2 . ", ";
-            # If this is the last entry in the array (delta data size = 24)
-            if ($dataCount eq 24)
-            { 
-                print OUTFILE "        $dataArrayString\n";
-                print OUTFILE "   }, // ATTR_PROC_TP_VITL_SPY_OFFSETS\n";
-                print OUTFILE "},\n";
-                $dataArrayString = "";
-            }
-        }
-    }
-
-    close (FILE);
-
-}
-print OUTFILE "}; \n\n";
-
-print OUTFILE "#endif  // FAPI_TP_DBG_DATA_ATTR_H\n";
-close (OUTFILE);
-exit 0;
-
-sub help {
-    printf("Usage:  $ProgName  <output directory> [<attributes-file1> [<attributes-file2> ...]] [--help|-h]\n");
-    printf("Generates C header file from KB tp_dbg_data.attributes file(s).  \n");
-    printf("Example: $ProgName \$PWD p8_20_tp_dbg_data.attributes -v\n\n");
-    exit(0);
-}
-
-sub parseArgs {
-    #Note that arg 0 MUST be output dir. If no args are specified, usage is printed.
-    if (!defined $ARGV[0])
-    {
-        &help;
-    }
-
-    # Output directory is first parameter
-    $outputPwd = $ARGV[0];
-    $outputPwd .= "/";
-
-    foreach my $argnum (1 .. $#ARGV)
-    {
-        my $Arg = $ARGV[$argnum];
-
-        if ($Arg =~ m"^--debug" || $Arg =~ m"^-d")
-        {
-            $DEBUG = 1;
-        }
-        elsif ($Arg =~ m"^--verbose" || $Arg =~ m"^-v")
-        {
-            $VERBOSE = 1;
-        }
-        elsif ($Arg =~ m"^--help" || $Arg =~ m"^-h")
-        {
-            &help;
-            exit 1;
-        }
-        else
-        {
-            push(@fileList,$Arg);
-        }
-    }
-}
diff --git a/src/usr/hwpf/fapi/fapiErrorInfo.C b/src/usr/hwpf/fapi/fapiErrorInfo.C
deleted file mode 100644
index d674d2907..000000000
--- a/src/usr/hwpf/fapi/fapiErrorInfo.C
+++ /dev/null
@@ -1,369 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/fapi/fapiErrorInfo.C $                           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: fapiErrorInfo.C,v 1.13 2015/01/16 11:27:43 sangeet2 Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/hwpf/working/fapi/fapiErrorInfo.C,v $
-
-/**
- *  @file fapiErrorInfo.C
- *
- *  @brief Implements the ErrorInfo structs and classes
- */
-
-/*
- * Change Log ******************************************************************
- * Flag     Defect/Feature  User        Date        Description
- * ------   --------------  ----------  ----------- ----------------------------
- *                          mjjones     08/05/2011  Created
- *                          mjjones     08/24/2011  Added ErrorInfoGard.
- *                          mjjones     09/22/2011  Major updates
- *                          mjjones     03/16/2012  Add FfdcType. Remove copy
- *                                                  ctor and assignment operator
- *                          mjjones     08/14/2012  Merge Callout/Deconfig/Gard
- *                                                  structures into one
- *                          mjjones     09/19/2012  Replace FFDC type with ID
- *                          mjjones     03/22/2013  Support Procedure Callouts
- *                          mjjones     05/20/2013  Support Bus Callouts
- *                          mjjones     06/24/2013  Support Children CDGs
- *                          mjjones     08/26/2013  Support HW Callouts
- *                          rjknight    09/24/2013  Support dimm callouts
- *                                                  based on mba parent target
- *                          whs         03/11/2014  Add FW traces to error logs
- *                          sangeet2    01/16/2015  Modify ErrorInfoHwCallout
- */
-
-#include <fapiErrorInfo.H>
-#include <string.h>
-#include <fapiUtil.H>
-
-namespace fapi
-{
-
-//******************************************************************************
-// ErrorInfoFfdc Constructor
-//******************************************************************************
-ErrorInfoFfdc::ErrorInfoFfdc(const uint32_t i_ffdcId,
-                             const void * i_pFfdc,
-                             const uint32_t i_size)
-: iv_ffdcId(i_ffdcId), iv_size(i_size)
-{
-    iv_pFfdc = reinterpret_cast<uint8_t *>(fapiMalloc(i_size));
-    if(iv_pFfdc != NULL)
-    {
-        memcpy(iv_pFfdc, i_pFfdc, i_size);
-    }
-    else
-    {
-        FAPI_ERR("ErrorInfoFfdc - could not allocate storage");
-        iv_size = 0;
-    }
-}
-
-//******************************************************************************
-// ErrorInfoFfdc Destructor
-//******************************************************************************
-ErrorInfoFfdc::~ErrorInfoFfdc()
-{
-    fapiFree(iv_pFfdc);
-    iv_pFfdc = NULL;
-}
-
-//******************************************************************************
-// ErrorInfoFfdc getData function
-//******************************************************************************
-const void * ErrorInfoFfdc::getData(uint32_t & o_size) const
-{
-    o_size = iv_size;
-    return iv_pFfdc;
-}
-
-//******************************************************************************
-// ErrorInfoFfdc new Operator Overload
-//******************************************************************************
-#ifdef FAPI_CUSTOM_MALLOC
-void * ErrorInfoFfdc::operator new(size_t i_sz)
-{
-    return fapiMalloc(i_sz);
-}
-#endif
-
-//******************************************************************************
-// ErrorInfoFfdc delete Operator Overload
-//******************************************************************************
-#ifdef FAPI_CUSTOM_MALLOC
-void ErrorInfoFfdc::operator delete(void * i_ptr)
-{
-    fapiFree(i_ptr);
-}
-#endif
-
-//******************************************************************************
-// ErrorInfoHwCallout Constructor
-//******************************************************************************
-ErrorInfoHwCallout::ErrorInfoHwCallout(
-    const HwCallouts::HwCallout i_hw,
-    const CalloutPriorities::CalloutPriority i_calloutPriority,
-    const Target & i_refTarget,
-    const targetPos_t i_position)
-: iv_hw(i_hw), iv_calloutPriority(i_calloutPriority), iv_refTarget(i_refTarget),
-  iv_position(i_position)
-{
-
-}
-
-//******************************************************************************
-// ErrorInfoHwCallout new Operator Overload
-//******************************************************************************
-#ifdef FAPI_CUSTOM_MALLOC
-void * ErrorInfoHwCallout::operator new(size_t i_sz)
-{
-    return fapiMalloc(i_sz);
-}
-#endif
-
-//******************************************************************************
-// ErrorInfoProcedureCallout delete Operator Overload
-//******************************************************************************
-#ifdef FAPI_CUSTOM_MALLOC
-void ErrorInfoHwCallout::operator delete(void * i_ptr)
-{
-    fapiFree(i_ptr);
-}
-#endif
-
-//******************************************************************************
-// ErrorInfoProcedureCallout Constructor
-//******************************************************************************
-ErrorInfoProcedureCallout::ErrorInfoProcedureCallout(
-    const ProcedureCallouts::ProcedureCallout i_procedure,
-    const CalloutPriorities::CalloutPriority i_calloutPriority)
-: iv_procedure(i_procedure), iv_calloutPriority(i_calloutPriority)
-{
-
-}
-
-//******************************************************************************
-// ErrorInfoProcedureCallout new Operator Overload
-//******************************************************************************
-#ifdef FAPI_CUSTOM_MALLOC
-void * ErrorInfoProcedureCallout::operator new(size_t i_sz)
-{
-    return fapiMalloc(i_sz);
-}
-#endif
-
-//******************************************************************************
-// ErrorInfoProcedureCallout delete Operator Overload
-//******************************************************************************
-#ifdef FAPI_CUSTOM_MALLOC
-void ErrorInfoProcedureCallout::operator delete(void * i_ptr)
-{
-    fapiFree(i_ptr);
-}
-#endif
-
-//******************************************************************************
-// ErrorInfoBusCallout Constructor
-//******************************************************************************
-ErrorInfoBusCallout::ErrorInfoBusCallout(
-    const Target & i_target1,
-    const Target & i_target2,
-    const CalloutPriorities::CalloutPriority i_calloutPriority)
-: iv_target1(i_target1), iv_target2(i_target2),
-  iv_calloutPriority(i_calloutPriority)
-{
-}
-
-//******************************************************************************
-// ErrorInfoBusCallout new Operator Overload
-//******************************************************************************
-#ifdef FAPI_CUSTOM_MALLOC
-void * ErrorInfoBusCallout::operator new(size_t i_sz)
-{
-    return fapiMalloc(i_sz);
-}
-#endif
-
-//******************************************************************************
-// ErrorInfoBusCallout delete Operator Overload
-//******************************************************************************
-#ifdef FAPI_CUSTOM_MALLOC
-void ErrorInfoBusCallout::operator delete(void * i_ptr)
-{
-    fapiFree(i_ptr);
-}
-#endif
-
-//******************************************************************************
-// ErrorInfoCDG Constructor
-//******************************************************************************
-ErrorInfoCDG::ErrorInfoCDG(const Target & i_target,
-                           const bool i_callout,
-                           const bool i_deconfigure,
-                           const bool i_gard,
-                           const CalloutPriorities::CalloutPriority i_priority)
-: iv_target(i_target), iv_callout(i_callout), iv_calloutPriority(i_priority),
-  iv_deconfigure(i_deconfigure), iv_gard(i_gard)
-{
-
-}
-
-//******************************************************************************
-// ErrorInfoCDG new Operator Overload
-//******************************************************************************
-#ifdef FAPI_CUSTOM_MALLOC
-void * ErrorInfoCDG::operator new(size_t i_sz)
-{
-    return fapiMalloc(i_sz);
-}
-#endif
-
-//******************************************************************************
-// ErrorInfoCDG delete Operator Overload
-//******************************************************************************
-#ifdef FAPI_CUSTOM_MALLOC
-void ErrorInfoCDG::operator delete(void * i_ptr)
-{
-    fapiFree(i_ptr);
-}
-#endif
-
-//******************************************************************************
-// ErrorInfoChildrenCDG Constructor
-//******************************************************************************
-ErrorInfoChildrenCDG::ErrorInfoChildrenCDG(
-    const Target & i_parent,
-    const TargetType i_childType,
-    const bool i_callout,
-    const bool i_deconfigure,
-    const bool i_gard,
-    const CalloutPriorities::CalloutPriority i_priority,
-    const uint8_t i_childPort, const uint8_t i_childNum )
-: iv_parent(i_parent), iv_childType(i_childType), iv_callout(i_callout),
-  iv_calloutPriority(i_priority), iv_deconfigure(i_deconfigure),
-  iv_gard(i_gard), iv_childPort(i_childPort), iv_childNumber(i_childNum)
-{
-
-}
-
-//******************************************************************************
-// ErrorInfoCollectTrace Constructor
-//******************************************************************************
-ErrorInfoCollectTrace::ErrorInfoCollectTrace(
-    const CollectTraces::CollectTrace i_traceId)
-: iv_eiTraceId(i_traceId)
-{
-}
-
-//******************************************************************************
-// ErrorInfoChildrenCDG new Operator Overload
-//******************************************************************************
-#ifdef FAPI_CUSTOM_MALLOC
-void * ErrorInfoChildrenCDG::operator new(size_t i_sz)
-{
-    return fapiMalloc(i_sz);
-}
-#endif
-
-//******************************************************************************
-// ErrorInfoCDG delete Operator Overload
-//******************************************************************************
-#ifdef FAPI_CUSTOM_MALLOC
-void ErrorInfoChildrenCDG::operator delete(void * i_ptr)
-{
-    fapiFree(i_ptr);
-}
-#endif
-
-//******************************************************************************
-// ErrorInfo Destructor
-//******************************************************************************
-ErrorInfo::~ErrorInfo()
-{
-    for (ErrorInfo::ErrorInfoFfdcItr_t l_itr = iv_ffdcs.begin();
-         l_itr != iv_ffdcs.end(); ++l_itr)
-    {
-        delete (*l_itr);
-        (*l_itr) = NULL;
-    }
-
-    for (ErrorInfoHwCalloutItr_t l_itr = iv_hwCallouts.begin();
-         l_itr != iv_hwCallouts.end(); ++l_itr)
-    {
-        delete (*l_itr);
-        (*l_itr) = NULL;
-    }
-
-    for (ErrorInfo::ErrorInfoProcedureCalloutItr_t l_itr =
-             iv_procedureCallouts.begin();
-         l_itr != iv_procedureCallouts.end(); ++l_itr)
-    {
-        delete (*l_itr);
-        (*l_itr) = NULL;
-    }
-
-    for (ErrorInfo::ErrorInfoBusCalloutItr_t l_itr =
-             iv_busCallouts.begin();
-         l_itr != iv_busCallouts.end(); ++l_itr)
-    {
-        delete (*l_itr);
-        (*l_itr) = NULL;
-    }
-
-    for (ErrorInfo::ErrorInfoCDGItr_t l_itr = iv_CDGs.begin();
-         l_itr != iv_CDGs.end(); ++l_itr)
-    {
-        delete (*l_itr);
-        (*l_itr) = NULL;
-    }
-
-    for (ErrorInfo::ErrorInfoChildrenCDGItr_t l_itr = iv_childrenCDGs.begin();
-         l_itr != iv_childrenCDGs.end(); ++l_itr)
-    {
-        delete (*l_itr);
-        (*l_itr) = NULL;
-    }
-}
-
-//******************************************************************************
-// ErrorInfo new Operator Overload
-//******************************************************************************
-#ifdef FAPI_CUSTOM_MALLOC
-void * ErrorInfo::operator new(size_t i_sz)
-{
-    return fapiMalloc(i_sz);
-}
-#endif
-
-//******************************************************************************
-// ErrorInfo delete Operator Overload
-//******************************************************************************
-#ifdef FAPI_CUSTOM_MALLOC
-void ErrorInfo::operator delete(void * i_ptr)
-{
-    fapiFree(i_ptr);
-}
-#endif
-
-}
diff --git a/src/usr/hwpf/fapi/fapiHwAccess.C b/src/usr/hwpf/fapi/fapiHwAccess.C
deleted file mode 100644
index 547ad9422..000000000
--- a/src/usr/hwpf/fapi/fapiHwAccess.C
+++ /dev/null
@@ -1,672 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/fapi/fapiHwAccess.C $                            */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2011,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: fapiHwAccess.C,v 1.14 2013/10/15 13:13:29 dcrowell Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/hwpf/working/fapi/fapiHwAccess.C,v $
-
-/**
- *  @file fapiHwAccess.C
- *
- *  @brief Implements the fapiHwAccess.H functions at a high level,
- *  allowing for scand common tracing to occur before and after
- *  the call to the platform-specific worker. 
- *
- *  Note that platform code must provide the implementation.
- */
-
-/*
- * Change Log ******************************************************************
- * Flag     Defect/Feature  User        Date        Description
- * ------   --------------  ----------  ----------- ----------------------------
- *                          copelanm    09/13/2011  new for common scan traces
- *                          mjjones     09/14/2011  Prepended fapi to functions
- *                                                  and enabled all functions
- *                          mjjones     10/13/2011  util namespace change
- *                          mjjones     02/21/2012  Use high performance Target
- *                                                  toEcmdString
- *          836579          thi         May 18,2012 Spy/ring supports
- *                          mjjones     07/12/2012  Add Pulse mode option to
- *                                                  Ring funcs
- *                          rjknight    09/20/2012  Update fapiGetSpy to take
- *                                                  a string as input
- *          F876964         jknight     Apr, 02,2013  fapi get/setSpyImage
- *                                                  support
- *          F873646         srimeesa    Mar 10,2013 64Bit SPYID and 
- *                                                  ClockDomain ID support  
- *          F883863         atendolk    05/06/2013  Update to support MultiScom
- */
-#include <fapi.H>
-#include <fapiPlatHwAccess.H>
-
-extern "C"
-{
-
-//******************************************************************************
-// fapiGetScom function
-//******************************************************************************
-fapi::ReturnCode fapiGetScom(const fapi::Target& i_target,
-                             const uint64_t i_address,
-                             ecmdDataBufferBase & o_data)
-{
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-    l_rc = platGetScom( i_target, i_address, o_data );
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiGetScom failed - Target %s, Addr %.16llX",
-                  i_target.toEcmdString(), i_address);
-    }
-
-    if( l_traceit )
-    {
-        FAPI_SCAN( "TRACE : GETSCOM     : %s : %.16llX %.16llX",
-                   i_target.toEcmdString(),
-                   i_address,
-                   o_data.getDoubleWord( 0 ) );
-    }
-
-    return l_rc;
-}
-
-
-//******************************************************************************
-// fapiPutScom function
-//******************************************************************************
-fapi::ReturnCode fapiPutScom(const fapi::Target& i_target,
-                             const uint64_t i_address,
-                             ecmdDataBufferBase & i_data)
-{
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-    l_rc = platPutScom( i_target, i_address, i_data );
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiPutScom failed - Target %s, Addr %.16llX",
-                  i_target.toEcmdString(), i_address);
-    }
-
-    if( l_traceit )
-    {
-        FAPI_SCAN( "TRACE : PUTSCOM     : %s : %.16llX %.16llX",
-                   i_target.toEcmdString(),
-                   i_address,
-                   i_data.getDoubleWord( 0 )  );
-    }
-
-    return l_rc;
-}
-
-//******************************************************************************
-// fapiPutScomUnderMask function
-//******************************************************************************
-fapi::ReturnCode fapiPutScomUnderMask(const fapi::Target& i_target,
-                                      const uint64_t i_address,
-                                      ecmdDataBufferBase & i_data,
-                                      ecmdDataBufferBase & i_mask)
-{
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-    l_rc = platPutScomUnderMask( i_target, i_address, i_data, i_mask );
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiPutScomUnderMask failed - Target %s, Addr %.16llX",
-                  i_target.toEcmdString(), i_address);
-    }
-
-    if( l_traceit )
-    {
-        FAPI_SCAN( "TRACE : PUTSCOMMASK : %s : %.16llX %.16llX %.16llX",
-               i_target.toEcmdString(),
-               i_address,
-               i_data.getDoubleWord(0),
-               i_mask.getDoubleWord(0));
-    }
-
-    return l_rc;
-}
-
-//******************************************************************************
-// fapiMultiScom function
-//******************************************************************************
-#ifdef FAPI_SUPPORT_MULTI_SCOM
-fapi::ReturnCode fapiMultiScom (
-                    const   fapi::Target&       i_target,
-                            fapi::MultiScom&    io_multiScomObj)
-{
-    FAPI_DBG (ENTER_MRK "fapiMultiScom - i_target: %s, # input ops: %d",
-              i_target.toEcmdString (), io_multiScomObj.iv_ScomList.size ());
-
-    fapi::ReturnCode l_rc;
-
-    // Call the platform specific implemetation
-    l_rc = platMultiScom (i_target, io_multiScomObj);
-
-    if (!l_rc.ok ())
-    {
-        uint32_t l_retCode = l_rc;
-
-        FAPI_ERR ("fapiMultiScom Failed with RC: 0x%.8X! i_target: %s, "
-                  "# input ops: %d, # ops complete: %d", l_retCode,
-                  i_target.toEcmdString (),
-                  io_multiScomObj.iv_ScomList.size (),
-                  io_multiScomObj.iv_NumOfCompletes);
-    }
-
-    FAPI_DBG (EXIT_MRK "fapiMultiScom - i_target: %s, # input ops: %d, "
-              "#ops complete: %d", i_target.toEcmdString (),
-              io_multiScomObj.iv_ScomList.size (),
-              io_multiScomObj.iv_NumOfCompletes);
-
-    return l_rc;
-}
-#endif // FAPI_SUPPORT_MULTI_SCOM
-
-
-//******************************************************************************
-// fapiGetCfamRegister function
-//******************************************************************************
-fapi::ReturnCode fapiGetCfamRegister(const fapi::Target& i_target,
-                                     const uint32_t i_address,
-                                     ecmdDataBufferBase & o_data)
-{
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-    l_rc = platGetCfamRegister( i_target, i_address, o_data );
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiGetCfamRegister failed - Target %s, Addr %.8X",
-                  i_target.toEcmdString(), i_address);
-    }
-
-    if( l_traceit )
-    {
-        FAPI_SCAN( "TRACE : GETCFAMREG  : %s : %.8X %.8X",
-               i_target.toEcmdString(),
-               i_address,
-               o_data.getWord(0) );
-    }
-
-    return l_rc;
-}
-
-//******************************************************************************
-// fapiPutCfamRegister function
-//******************************************************************************
-fapi::ReturnCode fapiPutCfamRegister(const fapi::Target& i_target,
-                                     const uint32_t i_address,
-                                     ecmdDataBufferBase & i_data)
-{
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-    l_rc = platPutCfamRegister( i_target, i_address, i_data );
-
-    if (l_rc)
-    {
-        FAPI_ERR("platPutCfamRegister failed - Target %s, Addr %.8X",
-                  i_target.toEcmdString(), i_address);
-    }
-
-    if( l_traceit )
-    {
-        FAPI_SCAN( "TRACE : PUTCFAMREG  : %s : %.8X %.8X",
-               i_target.toEcmdString(),
-               i_address,
-               i_data.getWord(0) );
-    }
-
-    return l_rc;
-}
-
-//******************************************************************************
-// fapiModifyCfamRegister function
-//******************************************************************************
-fapi::ReturnCode fapiModifyCfamRegister(const fapi::Target& i_target,
-                                      const uint32_t i_address,
-                                      ecmdDataBufferBase & i_data,
-                                      const fapi::ChipOpModifyMode i_modifyMode)
-{
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-    l_rc = platModifyCfamRegister( i_target, i_address, i_data, i_modifyMode );
-
-    if (l_rc)
-    {
-        FAPI_ERR("platModifyCfamRegister failed - Target %s, Addr %.8X",
-                  i_target.toEcmdString(), i_address);
-    }
-
-    if( l_traceit )
-    {
-        // get string representation of the modify mode
-        const char * l_pMode = NULL;
-
-        if (i_modifyMode == fapi::CHIP_OP_MODIFY_MODE_OR)
-        {
-            l_pMode = "OR";
-        }
-        else if (i_modifyMode == fapi::CHIP_OP_MODIFY_MODE_AND)
-        {
-            l_pMode = "AND";
-        }
-        else if (i_modifyMode == fapi::CHIP_OP_MODIFY_MODE_XOR)
-        {
-            l_pMode = "XOR";
-        }
-        else
-        {
-            l_pMode = "?";
-        }
-
-        FAPI_SCAN( "TRACE : MODCFAMREG  : %s : %.8X %.8X %s",
-               i_target.toEcmdString(),
-               i_address,
-               i_data.getWord(0),
-               l_pMode );
-    }
-
-    return l_rc;
-}
-
-////////////////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////////////////
-fapi::ReturnCode fapiGetRing(const fapi::Target& i_target,
-                             const scanRingId_t i_address,
-                             ecmdDataBufferBase & o_data,
-                             const uint32_t i_ringMode)
-{
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-    l_rc = platGetRing( i_target, i_address, o_data, i_ringMode );
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiGetRing failed - Target %s, Addr 0x%.16llX", 
-                  i_target.toEcmdString(), i_address);
-    }
-
-    if( l_traceit )
-    {
-        FAPI_SCAN( "TRACE : GETRING     : %s : %.16llX %.16llX", 
-                   i_target.toEcmdString(),
-                   i_address,
-                   o_data.getDoubleWord( 0 ) );
-    }
-
-    return l_rc;
-}
-
-////////////////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////////////////
-fapi::ReturnCode fapiPutRing(const fapi::Target& i_target,
-                             const scanRingId_t i_address,
-                             ecmdDataBufferBase & i_data,
-                             const uint32_t i_ringMode)
-{
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-    l_rc = platPutRing( i_target, i_address, i_data, i_ringMode );
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiPutRing failed - Target %s, Addr 0x%.16llX",
-                  i_target.toEcmdString(), i_address);
-    }
-
-    if( l_traceit )
-    {
-        FAPI_SCAN( "TRACE : PUTRING     : %s : %.16llX %.16llX",
-                   i_target.toEcmdString(),
-                   i_address,
-                   i_data.getDoubleWord(0));
-    }
-
-    return l_rc;
-}
-
-////////////////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////////////////
-fapi::ReturnCode fapiModifyRing(const fapi::Target& i_target,
-                                const scanRingId_t i_address,
-                                ecmdDataBufferBase & i_data,
-                                const fapi::ChipOpModifyMode i_modifyMode,
-                                const uint32_t i_ringMode)
-{
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-    l_rc = platModifyRing( i_target, i_address, i_data, i_modifyMode, i_ringMode );
-
-    if (l_rc)
-    {
-        FAPI_ERR("platModifyRing failed - Target %s, Addr 0x%.16llX,"
-                 "ModifyMode 0x%.8X", i_target.toEcmdString(),
-                 i_address, i_modifyMode);
-    }
-
-    if( l_traceit )
-    {
-        // get string representation of the modify mode
-        const char * l_pMode = NULL;
-
-        if (i_modifyMode == fapi::CHIP_OP_MODIFY_MODE_OR)
-        {
-            l_pMode = "OR";
-        }
-        else if (i_modifyMode == fapi::CHIP_OP_MODIFY_MODE_AND)
-        {
-            l_pMode = "AND";
-        }
-        else if (i_modifyMode == fapi::CHIP_OP_MODIFY_MODE_XOR)
-        {
-            l_pMode = "XOR";
-        }
-        else
-        {
-            l_pMode = "?";
-        }
-
-        FAPI_SCAN( "TRACE : MODRING     : %s : %.16llX %.16llX %s",
-               i_target.toEcmdString(),
-               i_address,
-               i_data.getDoubleWord(0),
-               l_pMode);
-    }
-
-    return l_rc;
-}
-
-// --------------------------------------------------------------------------
-// NOTE:
-// These spy access interfaces are only used in FSP and cronus.
-// HB does not allow spy access
-
-////////////////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////////////////
-#ifdef FAPI_SUPPORT_SPY_AS_ENUM
-fapi::ReturnCode _fapiGetSpy(const fapi::Target& i_target,
-                            const spyId_t i_spyId,
-                            ecmdDataBufferBase & o_data)
-{
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-    l_rc = platGetSpy( i_target, i_spyId, o_data );
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiGetSpy failed - Target %s, SpyId 0x%.16llX",
-                  i_target.toEcmdString(), i_spyId);
-    }
-
-    if( l_traceit )
-    {
-        FAPI_SCAN( "TRACE : GETSPY      : %s : %.16llX %.16llX", 
-                   i_target.toEcmdString(),
-                   i_spyId,
-                   o_data.getDoubleWord(0));
-    }
-
-    return l_rc;
-}
-#endif
-
-#ifdef FAPI_SUPPORT_SPY_AS_STRING
-fapi::ReturnCode _fapiGetSpy(const fapi::Target& i_target,
-                            const char * i_spyId,
-                            ecmdDataBufferBase & o_data)
-{
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-    l_rc = platGetSpy( i_target, i_spyId, o_data );
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiGetSpy failed - Target %s, SpyId %s",
-                  i_target.toEcmdString(), i_spyId);
-    }
-
-    if( l_traceit )
-    {
-        FAPI_SCAN( "TRACE : GETSPY      : %s : %s %.16llX",
-                   i_target.toEcmdString(),
-                   i_spyId,
-                   o_data.getDoubleWord(0));
-    }
-
-    return l_rc;
-}
-#endif
-
-#ifdef FAPI_SUPPORT_SPY_AS_ENUM
-////////////////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////////////////
-fapi::ReturnCode _fapiPutSpy(const fapi::Target& i_target,
-                            const spyId_t i_spyId,
-                            ecmdDataBufferBase & i_data)
-{
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-    l_rc = platPutSpy( i_target, i_spyId, i_data );
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiPutSpy failed - Target %s, SpyId 0x%.16llX",
-                  i_target.toEcmdString(), i_spyId);
-    }
-
-    if( l_traceit )
-    {
-        FAPI_SCAN( "TRACE : PUTSPY      : %s : %.16llX %.16llX",
-                   i_target.toEcmdString(),
-                   i_spyId,
-                   i_data.getDoubleWord(0));
-    }
-
-    return l_rc;
-}
-#endif
-
-#ifdef FAPI_SUPPORT_SPY_AS_STRING
-////////////////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////////////////
-fapi::ReturnCode _fapiPutSpy(const fapi::Target& i_target,
-                            const char * const i_spyId,
-                            ecmdDataBufferBase & i_data)
-{
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-    l_rc = platPutSpy( i_target, i_spyId, i_data );
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiPutSpy failed - Target %s, SpyId %s.8X",
-                  i_target.toEcmdString(), i_spyId);
-    }
-
-    if( l_traceit )
-    {
-        FAPI_SCAN( "TRACE : PUTSPY      : %s : %s %.16llX",
-                   i_target.toEcmdString(),
-                   i_spyId,
-                   i_data.getDoubleWord(0));
-    }
-
-    return l_rc;
-}
-#endif
-
-#ifdef FAPI_SUPPORT_SPY_AS_STRING
-////////////////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////////////////
-fapi::ReturnCode _fapiGetSpyImage(const fapi::Target& i_target,
-                            const char * const i_spyId,
-                            ecmdDataBufferBase & o_data,
-                            const ecmdDataBufferBase & i_imageData)
-{
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-    l_rc = platGetSpyImage( i_target, i_spyId, o_data, i_imageData );
-
-    if (l_rc)
-    {
-      FAPI_ERR("fapiGetSpyImage failed - Target %s, SpyId %s",
-                i_target.toEcmdString(), i_spyId);
-    }
-
-    if( l_traceit )
-    {
-      FAPI_SCAN( "TRACE : GETSPYIMAGE : %s : %s %.16llX",
-                   i_target.toEcmdString(),
-                   i_spyId,
-                   o_data.getDoubleWord(0));
-
-    }
-
-    return l_rc;
-}
-
-////////////////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////////////////
-fapi::ReturnCode _fapiPutSpyImage(const fapi::Target& i_target,
-                                const char * const i_spyId,
-                                const ecmdDataBufferBase & i_data,
-                                ecmdDataBufferBase & io_imageData)
-{
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-   l_rc = platPutSpyImage( i_target, i_spyId, i_data, io_imageData );
-
-    if (l_rc)
-    {
-      FAPI_ERR("fapiPutSpyImage failed - Target %s, SpyId %s",
-               i_target.toEcmdString(), i_spyId);
-    }
-
-    if( l_traceit )
-    {
-        FAPI_SCAN("TRACE : PUTSPYIMG : %s : %s %.16llX",
-                   i_target.toEcmdString(),
-                   i_spyId,
-                   i_data.getDoubleWord(0));
-
-    }
-
-    return l_rc;
-}
-#endif
-#ifdef FAPI_SUPPORT_SPY_AS_ENUM
-////////////////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////////////////
-fapi::ReturnCode _fapiGetSpyImage(const fapi::Target& i_target,
-                            const spyId_t i_spyId,
-                            ecmdDataBufferBase & o_data,
-                            const ecmdDataBufferBase & i_imageData)
-{
-
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-    l_rc = platGetSpyImage( i_target, i_spyId, o_data, i_imageData );
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiGetSpyImage failed - Target %s, SpyId 0x%.16llX",
-                  i_target.toEcmdString(), i_spyId);
-    }
-
-    if( l_traceit )
-    {
-        FAPI_SCAN( "TRACE : GETSPYIMG  : %s : %.16llX %.16llX",
-                   i_target.toEcmdString(),
-                   i_spyId,
-                   o_data.getDoubleWord(0));
-
-    }
-
-    return l_rc;
-}
-
-////////////////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////////////////
-fapi::ReturnCode _fapiPutSpyImage(const fapi::Target& i_target,
-                                const spyId_t i_spyId,
-                                const ecmdDataBufferBase & i_data,
-                                ecmdDataBufferBase & io_imageData)
-{
-    fapi::ReturnCode l_rc;
-    bool l_traceit = platIsScanTraceEnabled();
-
-    // call the platform implementation
-    l_rc = platPutSpyImage( i_target, i_spyId, i_data, io_imageData );
-
-    if (l_rc)
-    {
-      FAPI_ERR("fapiPutSpyImage failed - Target %s, SpyId 0x%.16llX",
-                i_target.toEcmdString(), i_spyId);
-    }
-
-    if( l_traceit )
-    {
-        FAPI_SCAN( "TRACE : PUTSPYIMG  : %s : %.16llX %.16llX",
-                   i_target.toEcmdString(),
-                   i_spyId,
-                   i_data.getDoubleWord(0));
-
-    }
-
-    return l_rc;
-}
-#endif
-} // extern "C"
diff --git a/src/usr/hwpf/fapi/fapiParseAttributeInfo.pl b/src/usr/hwpf/fapi/fapiParseAttributeInfo.pl
deleted file mode 100755
index 0e28afbf0..000000000
--- a/src/usr/hwpf/fapi/fapiParseAttributeInfo.pl
+++ /dev/null
@@ -1,799 +0,0 @@
-#!/usr/bin/perl
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/fapi/fapiParseAttributeInfo.pl $
-#
-# OpenPOWER HostBoot Project
-#
-# Contributors Listed Below - COPYRIGHT 2011,2015
-# [+] International Business Machines Corp.
-#
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-# $Id: fapiParseAttributeInfo.pl,v 1.21 2014/01/20 20:35:30 mjjones Exp $
-#
-# Purpose:  This perl script will parse HWP Attribute XML files
-# and add attribute information to a file called fapiAttributeIds.H
-#
-# Author: CamVan Nguyen
-# Last Updated: 06/23/2011
-#
-# Version: 1.0
-#
-# Change Log **********************************************************
-#
-#  Flag  Track#    Userid    Date      Description
-#  ----  --------  --------  --------  -----------
-#                  camvanng  06/03/11  Created
-#                  mjjones   06/06/11  Minor updates for integration
-#                  mjjones   06/10/11  Added "use strict;"
-#                  mjjones   06/23/11  Parse more info
-#                  mjjones   07/05/11  Take output dir as parameter
-#                  mjjones   09/06/11  Remove string/defaultVal support
-#                  mjjones   10/07/11  Create fapiAttributeService.C
-#                  mjjones   10/17/11  Support enums with values
-#                  mjjones   10/18/11  Support multiple attr files and
-#                                      multi-line descriptions
-#                  camvanng  10/20/11  Changed i_pTarget to "const" ptr
-#                  camvanng  11/09/11  Prepend "ENUM_" to attribute
-#                                      enums
-#                  mjjones   11/15/11  Move gen of fapiAttributeService.C
-#                                      to a different file
-#                  mjjones   12/16/11  Generate fapiAttributePlatCheck.H
-#                                      Generate fapiAttributesSupported.html
-#                  mjjones   02/08/12  Handle attribute files with 1 entry
-#                  mjjones   03/22/12  Generate hash values for enums
-#                  mjjones   04/10/12  Process Chip EC Feature attributes
-#                  mjjones   05/15/12  Detect duplicate attr ids and append
-#                                      ULL after 64bit enumerator
-#                  mjjones   05/21/12  Detect duplicate ids/hashes across files
-#                  mjjones   05/21/12  Ignore newlines and whitespace when
-#                                      parsing enumerations
-#                  mjjones   06/12/12  Add new include file to fapiChipEcFeature.C
-#                  mjjones   08/08/12  Output target types and if PlatInit
-#                  mjjones   09/28/12  Minor change to add FFDC on error
-#                  mjjones   11/05/12  Generate fapiAttributeIds.txt
-#                                      Generate fapiAttributeEnums.txt
-#                  mjjones   03/21/13  Add fapi namespace to Chip EC Feature macro
-#                  mjjones   02/27/13  Generate fapiAttrInfo.csv
-#                                      Generate fapiAttrEnumInfo.csv
-#                  mjjones   04/11/13  Allow platform to override Chip EC Feature
-#                  mjjones   05/02/13  Allow Chip EC feature to be queried from
-#                                      chiplet
-#
-# End Change Log ******************************************************
-
-use strict;
-
-#------------------------------------------------------------------------------
-# Print Command Line Help
-#------------------------------------------------------------------------------
-my $numArgs = $#ARGV + 1;
-if ($numArgs < 2)
-{
-    print ("Usage: fapiParseAttributeInfo.pl <output dir> <attr-xml-file1> [<attr-xml-file2> ...]\n");
-    print ("  This perl script will parse attribute XML files and create the following files:\n");
-    print ("  - fapiAttributeIds.H.          Contains IDs, type, value enums and other information\n");
-    print ("  - fapiChipEcFeature.C.         Contains a function to query chip EC features\n");
-    print ("  - fapiAttributePlatCheck.H.    Contains compile time checks that all attributes are\n");
-    print ("                                 handled by the platform\n");
-    print ("  - fapiAttributesSupported.html Contains the HWPF attributes supported\n");
-    print ("  - fapiAttrInfo.csv             Used to process Attribute Override Text files\n");
-    print ("  - fapiAttrEnumInfo.csv         Used to process Attribute Override Text files\n");
-    exit(1);
-}
-
-#------------------------------------------------------------------------------
-# Specify perl modules to use
-#------------------------------------------------------------------------------
-use Digest::MD5 qw(md5_hex);
-use XML::Simple;
-my $xml = new XML::Simple (KeyAttr=>[]);
-
-# Uncomment to enable debug output
-#use Data::Dumper;
-
-#------------------------------------------------------------------------------
-# Set PREFERRED_PARSER to XML::Parser. Otherwise it uses XML::SAX which contains
-# bugs that result in XML parse errors that can be fixed by adjusting white-
-# space (i.e. parse errors that do not make sense).
-#------------------------------------------------------------------------------
-$XML::Simple::PREFERRED_PARSER = 'XML::Parser';
-
-#------------------------------------------------------------------------------
-# Open output files for writing
-#------------------------------------------------------------------------------
-my $aiFile = $ARGV[0];
-$aiFile .= "/";
-$aiFile .= "fapiAttributeIds.H";
-open(AIFILE, ">", $aiFile);
-
-my $ecFile = $ARGV[0];
-$ecFile .= "/";
-$ecFile .= "fapiChipEcFeature.C";
-open(ECFILE, ">", $ecFile);
-
-my $acFile = $ARGV[0];
-$acFile .= "/";
-$acFile .= "fapiAttributePlatCheck.H";
-open(ACFILE, ">", $acFile);
-
-my $asFile = $ARGV[0];
-$asFile .= "/";
-$asFile .= "fapiAttributesSupported.html";
-open(ASFILE, ">", $asFile);
-
-my $itFile = $ARGV[0];
-$itFile .= "/";
-$itFile .= "fapiAttrInfo.csv";
-open(ITFILE, ">", $itFile);
-
-my $etFile = $ARGV[0];
-$etFile .= "/";
-$etFile .= "fapiAttrEnumInfo.csv";
-open(ETFILE, ">", $etFile);
-
-my $fmFile = $ARGV[0];
-$fmFile .= "/";
-$fmFile .= "fapiAttrOverrideData.H";
-open(FMFILE, ">", $fmFile);
-
-my $feFile = $ARGV[0];
-$feFile .= "/";
-$feFile .= "fapiAttrOverrideEnums.H";
-open(FEFILE, ">", $feFile);
-
-
-#------------------------------------------------------------------------------
-# Print Start of file information to fapiAttributeIds.H
-#------------------------------------------------------------------------------
-print AIFILE "// fapiAttributeIds.H\n";
-print AIFILE "// This file is generated by perl script fapiParseAttributeInfo.pl\n\n";
-print AIFILE "#ifndef FAPIATTRIBUTEIDS_H_\n";
-print AIFILE "#define FAPIATTRIBUTEIDS_H_\n\n";
-print AIFILE "#include <fapiTarget.H>\n\n";
-print AIFILE "namespace fapi\n";
-print AIFILE "{\n\n";
-print AIFILE "\/**\n";
-print AIFILE " * \@brief Enumeration of attribute IDs\n";
-print AIFILE " *\/\n";
-print AIFILE "enum AttributeId\n{\n";
-
-#------------------------------------------------------------------------------
-# Print Start of file information to fapiChipEcFeature.C
-#------------------------------------------------------------------------------
-print ECFILE "// fapiChipEcFeature.C\n";
-print ECFILE "// This file is generated by perl script fapiParseAttributeInfo.pl\n";
-print ECFILE "// It implements the fapiQueryChipEcFeature function\n\n";
-print ECFILE "#include <fapiChipEcFeature.H>\n";
-print ECFILE "#include <fapiAttributeService.H>\n";
-print ECFILE "#include <fapiSystemConfig.H>\n";
-print ECFILE "#include <fapiPlatTrace.H>\n\n";
-print ECFILE "namespace fapi\n";
-print ECFILE "{\n\n";
-print ECFILE "fapi::ReturnCode fapiQueryChipEcFeature(fapi::AttributeId i_id,\n";
-print ECFILE "                                        const fapi::Target * i_pTarget,\n";
-print ECFILE "                                        uint8_t & o_hasFeature)\n";
-print ECFILE "{\n";
-print ECFILE "    o_hasFeature = false;\n";
-print ECFILE "    fapi::ReturnCode l_rc;\n";
-print ECFILE "    uint8_t l_chipName = 0;\n";
-print ECFILE "    uint8_t l_chipEc = 0;\n";
-print ECFILE "    fapi::Target l_target = *i_pTarget;\n\n";
-print ECFILE "    if (i_pTarget->isChiplet())\n";
-print ECFILE "    {\n";
-print ECFILE "        l_rc = fapiGetParentChip(*i_pTarget, l_target);\n\n";
-print ECFILE "        if (l_rc)\n";
-print ECFILE "        {\n";
-print ECFILE "            FAPI_ERR(\"fapiQueryChipEcFeature: error getting parent chip\");\n";
-print ECFILE "        }\n";
-print ECFILE "    }\n\n";
-print ECFILE "    if (!l_rc)\n";
-print ECFILE "    {\n";
-print ECFILE "        l_rc = FAPI_ATTR_GET_PRIVILEGED(ATTR_NAME, &l_target, l_chipName);\n\n";
-print ECFILE "        if (l_rc)\n";
-print ECFILE "        {\n";
-print ECFILE "            FAPI_ERR(\"fapiQueryChipEcFeature: error getting chip name\");\n";
-print ECFILE "        }\n";
-print ECFILE "        else\n";
-print ECFILE "        {\n";
-print ECFILE "            l_rc = FAPI_ATTR_GET_PRIVILEGED(ATTR_EC, &l_target, l_chipEc);\n\n";
-print ECFILE "            if (l_rc)\n";
-print ECFILE "            {\n";
-print ECFILE "                FAPI_ERR(\"fapiQueryChipEcFeature: error getting chip ec\");\n";
-print ECFILE "            }\n";
-print ECFILE "            else\n";
-print ECFILE "            {\n";
-print ECFILE "                switch (i_id)\n";
-print ECFILE "                {\n";
-
-#------------------------------------------------------------------------------
-# Print Start of file information to fapiAttributePlatCheck.H
-#------------------------------------------------------------------------------
-print ACFILE "// fapiAttributePlatCheck.H\n";
-print ACFILE "// This file is generated by perl script fapiParseAttributeInfo.pl\n";
-print ACFILE "// A platform can include it to ensure that it handles all HWPF\n";
-print ACFILE "// attributes\n\n";
-print ACFILE "#ifndef FAPIATTRIBUTEPLATCHECK_H_\n";
-print ACFILE "#define FAPIATTRIBUTEPLATCHECK_H_\n\n";
-
-#------------------------------------------------------------------------------
-# Print Start of file information to fapiAttributesSupported.html
-#------------------------------------------------------------------------------
-print ASFILE "<html>\n";
-print ASFILE "<body>\n\n";
-print ASFILE "<!-- fapiAttributesSupported.html -->\n";
-print ASFILE "<!-- This file is generated by perl script fapiParseAttributeInfo.pl -->\n";
-print ASFILE "<!-- It lists all HWPF attributes supported -->\n\n";
-print ASFILE "<h4>HWPF Attributes supported by this build.</h4>\n";
-print ASFILE "<table border=\"4\">\n";
-print ASFILE "<tr><th>Attribute ID</th><th>Attribute Description</th></tr>";
-
-#------------------------------------------------------------------------------
-# Print Start of file information to fapiAttrInfo.csv
-#------------------------------------------------------------------------------
-print ITFILE "# fapiAttrInfo.csv\n";
-print ITFILE "# This file is generated by perl script fapiParseAttributeInfo.pl\n";
-print ITFILE "# It lists information about FAPI attributes and is used to\n";
-print ITFILE "# process FAPI Attribute text files (overrides/syncs)\n";
-print ITFILE "# Format:\n";
-print ITFILE "# <FAPI-ATTR-ID-STR>,<LAYER-ATTR-ID-STR>,<ATTR-ID-VAL>,<ATTR-TYPE>\n";
-print ITFILE "# Note that for the AttributeTanks at the FAPI layer, the\n";
-print ITFILE "# FAPI-ATTR-ID-STR and LAYER-ATTR-ID-STR will be identical\n";
-
-#------------------------------------------------------------------------------
-# Print Start of file information to fapiAttrEnumInfo.csv
-#------------------------------------------------------------------------------
-print ETFILE "# fapiAttrEnumInfo.csv\n";
-print ETFILE "# This file is generated by perl script fapiParseAttributeInfo.pl\n";
-print ETFILE "# It lists information about FAPI attribute enumeratorss and is\n";
-print ETFILE "# used to process FAPI Attribute text files (overrides/syncs)\n";
-print ETFILE "# Format:\n";
-print ETFILE "# <ENUM-STR>,<ENUM-VAL>\n";
-
-#-------------------------------------------------------------------------------
-# Print header of getFapiAttrData.C
-# ------------------------------------------------------------------------------
-print FMFILE "const AttributeData g_FapiAttrs[] = {\n";
-my %attrOverrideData = ();
-
-#-------------------------------------------------------------------------------
-# Print header of getFapiAttrEnumData.C
-# ------------------------------------------------------------------------------
-print FEFILE "const AttributeEnum g_FapiEnums[] = {\n";
-my @attrOverrideEnums = ();
-
-my %attrIdHash;  # Records which Attribute IDs have been used
-my %attrValHash; # Records which Attribute values have been used
-
-#------------------------------------------------------------------------------
-# For each XML file
-#------------------------------------------------------------------------------
-foreach my $argnum (1 .. $#ARGV)
-{
-    my $infile = $ARGV[$argnum];
-
-    # read XML file. The ForceArray option ensures that there is an array of
-    # elements even if there is only one such element in the file
-    my $attributes = $xml->XMLin($infile, ForceArray => ['attribute']);
-
-    # Uncomment to get debug output of all attributes
-    #print "\nFile: ", $infile, "\n", Dumper($attributes), "\n";
-
-    #--------------------------------------------------------------------------
-    # For each Attribute
-    #--------------------------------------------------------------------------
-    foreach my $attr (@{$attributes->{attribute}})
-    {
-        #----------------------------------------------------------------------
-        # Print the Attribute ID and calculated value to fapiAttributeIds.H and
-        # fapiAttributeIds.txt. The value for an attribute is a hash value
-        # generated from the attribute name, this ties a specific value to a
-        # specific attribute name. This is done for Cronus so that if a HWP is
-        # not recompiled against a new eCMD/Cronus version where the attributes
-        # have changed then there will not be a mismatch in enumerator values.
-        # This is a 28bit hash value because the Initfile compiler has a
-        # requirement that the top nibble of the 32 bit attribute ID be zero to
-        # store flags
-        #----------------------------------------------------------------------
-        if (! exists $attr->{id})
-        {
-            print ("fapiParseAttributeInfo.pl ERROR. Att 'id' missing\n");
-            exit(1);
-        }
-
-        if (exists($attrIdHash{$attr->{id}}))
-        {
-            # Two different attributes with the same id!
-            print ("fapiParseAttributeInfo.pl ERROR. Duplicate attr id ",
-                $attr->{id}, "\n");
-            exit(1);
-        }
-
-        # Calculate a 28 bit hash value.
-        my $attrHash128Bit = md5_hex($attr->{id});
-        my $attrHash28Bit = substr($attrHash128Bit, 0, 7);
-
-        # Print the attribute ID/value to fapiAttributeIds.H
-        print AIFILE "    $attr->{id} = 0x$attrHash28Bit,\n";
-
-        if (exists($attrValHash{$attrHash28Bit}))
-        {
-            # Two different attributes generate the same hash-value!
-            print ("fapiParseAttributeInfo.pl ERROR. Duplicate attr id hash value for ",
-                   $attr->{id}, "\n");
-            exit(1);
-        }
-
-        $attrIdHash{$attr->{id}} = $attrHash28Bit;
-        $attrValHash{$attrHash28Bit} = 1;
-    };
-}
-
-#------------------------------------------------------------------------------
-# Print AttributeId enumeration end to fapiAttributeIds.H
-#------------------------------------------------------------------------------
-print AIFILE "};\n\n";
-
-#------------------------------------------------------------------------------
-# Print Attribute Information comment to fapiAttributeIds.H
-#------------------------------------------------------------------------------
-print AIFILE "\/**\n";
-print AIFILE " * \@brief Attribute Information\n";
-print AIFILE " *\/\n";
-
-#------------------------------------------------------------------------------
-# For each XML file
-#------------------------------------------------------------------------------
-foreach my $argnum (1 .. $#ARGV)
-{
-    my $infile = $ARGV[$argnum];
-
-    # read XML file. The ForceArray option ensures that there is an array of
-    # elements even if there is only one such element in the file
-    my $attributes = $xml->XMLin($infile, ForceArray => ['attribute', 'chip']);
-
-    #--------------------------------------------------------------------------
-    # For each Attribute
-    #--------------------------------------------------------------------------
-    foreach my $attr
-        (@{$attributes->{attribute}})
-    {
-        my $attrOverride = "";
-        #----------------------------------------------------------------------
-        # Print a comment with the attribute ID fapiAttributeIds.H
-        #----------------------------------------------------------------------
-        print AIFILE "/* $attr->{id} */\n";
-
-        #----------------------------------------------------------------------
-        # Print the AttributeId and description to fapiAttributesSupported.html
-        #----------------------------------------------------------------------
-        if (! exists $attr->{description})
-        {
-            print ("fapiParseAttributeInfo.pl ERROR. Att 'description' missing\n");
-            exit(1);
-        }
-
-        print ASFILE "<tr>\n";
-        print ASFILE "  <td>$attr->{id}</td>\n";
-        print ASFILE "  <td>$attr->{description}</td>\n";
-        print ASFILE "</tr>\n";
-
-        #----------------------------------------------------------------------
-        # Print the assignment of each attribute to the local l_name
-        #----------------------------------------------------------------------
-        $attrOverride .= "\t{\n";
-        $attrOverride .= "\t\t\"$attr->{id}\",\n";
-
-        #----------------------------------------------------------------------
-        # Figure out the attribute array dimensions (if array)
-        #----------------------------------------------------------------------
-        my $arrayDimensions = "";
-        my @arrayDims = ();
-        if ($attr->{array})
-        {
-            # Remove leading whitespace
-            my $dimText = $attr->{array};
-            $dimText =~ s/^\s+//;
-
-            # Split on commas or whitespace
-            @arrayDims = split(/\s*,\s*|\s+/, $dimText);
-
-
-            foreach my $val (@arrayDims)
-            {
-                $arrayDimensions .= "[${val}]";
-            }
-        }
-        until ($#arrayDims == 3)
-        {
-            push @arrayDims, 1;
-        }
-        my $arrayDimString = join(", ", @arrayDims);
-
-        #----------------------------------------------------------------------
-        # Print the typedef for each attribute's val type to fapiAttributeIds.H
-        # Print the attribute information to fapiAttrInfo.csv
-        #----------------------------------------------------------------------
-        if (exists $attr->{chipEcFeature})
-        {
-            # The value type of chip EC feature attributes is uint8_t
-            print AIFILE "typedef uint8_t $attr->{id}_Type;\n";
-            print ITFILE "$attr->{id},$attr->{id},";
-            print ITFILE "0x$attrIdHash{$attr->{id}},u8\n";
-            $attrOverride .= "\t\t0x$attrIdHash{$attr->{id}},\n";
-            $attrOverride .= "\t\tsizeof(uint8_t),\n";
-            $attrOverride .= "\t\t{ $arrayDimString }\n";
-            $attrOverride .= "\t},\n";
-        }
-        else
-        {
-            if (! exists $attr->{valueType})
-            {
-                print ("fapiParseAttributeInfo.pl ERROR. Att 'valueType' missing\n");
-                exit(1);
-            }
-
-            my @sizes = ( 'uint8', 'uint32', 'uint64' );
-            my $actualSize = '';
-            foreach my $size (@sizes)
-            {
-                if ($attr->{valueType} eq $size)
-                {
-                    $actualSize = $size;
-                    last;
-                }
-            }
-            if ($actualSize ne '')
-            {
-
-                print AIFILE "typedef ${actualSize}_t $attr->{id}_Type$arrayDimensions;\n";
-                print ITFILE "$attr->{id},$attr->{id},0x$attrIdHash{$attr->{id}},u8" .
-                             "$arrayDimensions\n";
-                $attrOverride .= "\t\t0x$attrIdHash{$attr->{id}},\n";
-                $attrOverride .= "\t\tsizeof(${actualSize}_t),\n";
-            }
-            else
-            {
-                print ("fapiParseAttributeInfo.pl ERROR. valueType not recognized: ");
-                print $attr->{valueType}, "\n";
-                exit(1);
-            }
-            $attrOverride .= "\t\t{ $arrayDimString }\n";
-            $attrOverride .= "\t},\n";
-        }
-
-        #----------------------------------------------------------------------
-        # Print if the attribute is privileged
-        #----------------------------------------------------------------------
-        if (exists $attr->{privileged})
-        {
-            print AIFILE "const bool $attr->{id}_Privileged = true;\n";
-        }
-        else
-        {
-            print AIFILE "const bool $attr->{id}_Privileged = false;\n";
-        }
-
-        #----------------------------------------------------------------------
-        # Print the target type(s) that the attribute is associated with
-        #----------------------------------------------------------------------
-        if (! exists $attr->{targetType})
-        {
-            print ("fapiParseAttributeInfo.pl ERROR. Att 'targetType' missing\n");
-            exit(1);
-        }
-
-        print AIFILE "const TargetTypes_t $attr->{id}_TargetTypes = ";
-
-        # Split on commas
-        my @targTypes = split(',', $attr->{targetType});
-
-        my $targTypeCount = 0;
-        foreach my $targType (@targTypes)
-        {
-            # Remove newlines and leading/trailing whitespace
-            $targType =~ s/\n//;
-            $targType =~ s/^\s+//;
-            $targType =~ s/\s+$//;
-
-            if ($targTypeCount != 0)
-            {
-                print AIFILE " | ";
-            }
-            print AIFILE "$targType";
-            $targTypeCount++;
-        }
-        print AIFILE ";\n";
-
-        #----------------------------------------------------------------------
-        # Print if the attribute is a platInit attribute
-        #----------------------------------------------------------------------
-        if (exists $attr->{platInit})
-        {
-            print AIFILE "const bool $attr->{id}_PlatInit = true;\n";
-        }
-        else
-        {
-            print AIFILE "const bool $attr->{id}_PlatInit = false;\n";
-        }
-
-        #----------------------------------------------------------------------
-        # Print the value enumeration (if specified) to fapiAttributeIds.H and
-        # fapiAttributeEnums.txt
-        #----------------------------------------------------------------------
-        if (exists $attr->{enum})
-        {
-            print AIFILE "enum $attr->{id}_Enum\n{\n";
-
-            # Values must be separated by commas to allow for values to be
-            # specified: <enum>VAL_A = 3, VAL_B = 5, VAL_C = 0x23</enum>
-            my @vals = split(',', $attr->{enum});
-
-            foreach my $val (@vals)
-            {
-                # Remove newlines and leading/trailing whitespace
-                $val =~ s/\n//;
-                $val =~ s/^\s+//;
-                $val =~ s/\s+$//;
-
-                my @values = split('=', ${val});
-                # Remove newlines and leading/trailing whitespace
-
-                foreach my $value (@values)
-                {
-                    $value =~ s/\n//;
-                    $value =~ s/^\s+//;
-                    $value =~ s/\s+$//;
-                }
-
-                push @attrOverrideEnums,
-                    "\t{ \"$attr->{id}_$values[0]\", $values[1] },\n";
-
-                # Print the attribute enum to fapiAttributeIds.H
-                print AIFILE "    ENUM_$attr->{id}_${val}";
-
-                # Print the attribute enum to fapiAttrEnumInfo.csv
-                my $attrEnumTxt = "$attr->{id}_${val}\n";
-
-
-                $attrEnumTxt =~ s/ = /,/;
-                print ETFILE $attrEnumTxt;
-
-
-                if ($attr->{valueType} eq 'uint64')
-                {
-                    print AIFILE "ULL";
-                }
-
-                print AIFILE ",\n";
-            }
-
-            print AIFILE "};\n";
-        }
-
-        #----------------------------------------------------------------------
-        # Print _GETMACRO and _SETMACRO where appropriate to fapiAttributeIds.H
-        #----------------------------------------------------------------------
-        if (exists $attr->{chipEcFeature})
-        {
-            #------------------------------------------------------------------
-            # The attribute is a Chip EC Feature, define _GETMACRO to call a
-            # fapi function and define _SETMACRO to something that will cause a
-            # compile failure if a set is attempted
-            #------------------------------------------------------------------
-            print AIFILE "#define $attr->{id}_GETMACRO(ID, PTARGET, VAL) \\\n";
-            print AIFILE "    PLAT_GET_CHIP_EC_FEATURE_OVERRIDE(ID, PTARGET, VAL) ? fapi::FAPI_RC_SUCCESS : \\\n";
-            print AIFILE "    fapi::fapiQueryChipEcFeature(fapi::ID, PTARGET, VAL)\n";
-            print AIFILE "#define $attr->{id}_SETMACRO(ID, PTARGET, VAL) ";
-            print AIFILE "CHIP_EC_FEATURE_ATTRIBUTE_NOT_WRITABLE\n";
-        }
-        elsif (! exists $attr->{writeable})
-        {
-            #------------------------------------------------------------------
-            # The attribute is read-only, define the _SETMACRO to something
-            # that will cause a compile failure if a set is attempted
-            #------------------------------------------------------------------
-            if (! exists $attr->{writeable})
-            {
-                print AIFILE "#define $attr->{id}_SETMACRO ATTRIBUTE_NOT_WRITABLE\n";
-            }
-        }
-
-        #----------------------------------------------------------------------
-        # If the attribute is a Chip EC Feature, print the chip EC feature
-        # query to fapiChipEcFeature.C
-        #----------------------------------------------------------------------
-        if (exists $attr->{chipEcFeature})
-        {
-            my $chipCount = 0;
-            print ECFILE "                case $attr->{id}:\n";
-            print ECFILE "                    if (\n";
-
-            foreach my $chip (@{$attr->{chipEcFeature}->{chip}})
-            {
-                $chipCount++;
-
-                if (! exists $chip->{name})
-                {
-                    print ("fapiParseAttributeInfo.pl ERROR. Att 'name' missing\n");
-                    exit(1);
-                }
-
-                if (! exists $chip->{ec})
-                {
-                    print ("fapiParseAttributeInfo.pl ERROR. Att 'ec' missing\n");
-                    exit(1);
-                }
-
-                if (! exists $chip->{ec}->{value})
-                {
-                    print ("fapiParseAttributeInfo.pl ERROR. Att 'value' missing\n");
-                    exit(1);
-                }
-
-                if (! exists $chip->{ec}->{test})
-                {
-                    print ("fapiParseAttributeInfo.pl ERROR. Att 'test' missing\n");
-                    exit(1);
-                }
-
-                my $test;
-                if ($chip->{ec}->{test} eq 'EQUAL')
-                {
-                    $test = '==';
-                }
-                elsif ($chip->{ec}->{test} eq 'GREATER_THAN')
-                {
-                    $test = '>';
-                }
-                elsif ($chip->{ec}->{test} eq 'GREATER_THAN_OR_EQUAL')
-                {
-                    $test = '>=';
-                }
-                elsif ($chip->{ec}->{test} eq 'LESS_THAN')
-                {
-                    $test = '<';
-                }
-                elsif ($chip->{ec}->{test} eq 'LESS_THAN_OR_EQUAL')
-                {
-                    $test = '<=';
-                }
-                else
-                {
-                    print ("fapiParseAttributeInfo.pl ERROR. test '$chip->{ec}->{test}' unrecognized\n");
-                    exit(1);
-                }
-
-                if ($chipCount > 1)
-                {
-                    print ECFILE "                    ||\n";
-                }
-                print ECFILE "                        ((l_chipName == $chip->{name}) &&\n";
-                print ECFILE "                         (l_chipEc $test $chip->{ec}->{value}))\n";
-            }
-
-            print ECFILE "                       )\n";
-            print ECFILE "                    {\n";
-            print ECFILE "                        o_hasFeature = true;\n";
-            print ECFILE "                    }\n";
-            print ECFILE "                    break;\n";
-        }
-
-        #----------------------------------------------------------------------
-        # Print the platform attribute checks to fapiAttributePlatCheck.H
-        #----------------------------------------------------------------------
-        if (exists $attr->{writeable})
-        {
-            print ACFILE "#ifndef $attr->{id}_SETMACRO\n";
-            print ACFILE "#error Platform does not support set of HWPF attr $attr->{id}\n";
-            print ACFILE "#endif\n";
-        }
-
-        print ACFILE "#ifndef $attr->{id}_GETMACRO\n";
-        print ACFILE "#error Platform does not support get of HWPF attr $attr->{id}\n";
-        print ACFILE "#endif\n\n";
-
-        #----------------------------------------------------------------------
-        # Print newline between each attribute's info to fapiAttributeIds.H
-        #----------------------------------------------------------------------
-        print AIFILE "\n";
-
-        #----------------------------------------------------------------------
-        # Add attribute override string to map.
-        #----------------------------------------------------------------------
-        $attrOverrideData{$attr->{id}} = $attrOverride;
-    };
-}
-
-#------------------------------------------------------------------------------
-# Print End of file information to fapiAttributeIds.H
-#------------------------------------------------------------------------------
-print AIFILE "}\n\n";
-print AIFILE "#endif\n";
-
-#------------------------------------------------------------------------------
-# Print End of file information to fapiChipEcFeature.C
-#------------------------------------------------------------------------------
-print ECFILE "                default:\n";
-print ECFILE "                    FAPI_ERR(\"fapiQueryChipEcFeature: Unknown feature 0x%x\",\n";
-print ECFILE "                        i_id);\n";
-print ECFILE "                    l_rc.setFapiError(FAPI_RC_INVALID_CHIP_EC_FEATURE_GET);\n";
-print ECFILE "                    l_rc.addEIFfdc(0, &i_id, sizeof(i_id));\n";
-print ECFILE "                    break;\n";
-print ECFILE "                }\n\n";
-print ECFILE "                if (o_hasFeature)\n";
-print ECFILE "                {\n";
-print ECFILE "                    FAPI_INF(\"fapiQueryChipEcFeature: Chip (0x%x:0x%x) has ";
-print ECFILE "feature (0x%x)\", l_chipName, l_chipEc, i_id);\n";
-print ECFILE "                }\n";
-print ECFILE "                else\n";
-print ECFILE "                {\n";
-print ECFILE "                    FAPI_INF(\"fapiQueryChipEcFeature: Chip (0x%x:0x%x) does not ";
-print ECFILE "have feature (0x%x)\", l_chipName, l_chipEc, i_id);\n";
-print ECFILE "                }\n";
-print ECFILE "            }\n";
-print ECFILE "        }\n";
-print ECFILE "    }\n";
-print ECFILE "    return l_rc;\n";
-print ECFILE "}\n\n";
-print ECFILE "}\n";
-
-
-#------------------------------------------------------------------------------
-# Print End of file information to fapiAttributePlatCheck.H
-#------------------------------------------------------------------------------
-print ACFILE "#endif\n";
-
-#------------------------------------------------------------------------------
-# Print End of file information to fapiAttributesSupported.html
-#------------------------------------------------------------------------------
-print ASFILE "</table>\n\n";
-print ASFILE "</body>\n";
-print ASFILE "</html>\n";
-
-#------------------------------------------------------------------------------
-# Print content for getFapiAttrData.C
-#------------------------------------------------------------------------------
-foreach my $override (sort keys %attrOverrideData)
-{
-    print FMFILE $attrOverrideData{$override};
-}
-print FMFILE "};\n";
-
-#------------------------------------------------------------------------------
-# Print footer for getFapiAttrEnumData.C
-#------------------------------------------------------------------------------
-foreach my $override (sort @attrOverrideEnums)
-{
-    print FEFILE $override;
-}
-print FEFILE "};\n";
-
-
-
-#------------------------------------------------------------------------------
-# Close output files
-#------------------------------------------------------------------------------
-close(AIFILE);
-close(ECFILE);
-close(ACFILE);
-close(ASFILE);
-close(ITFILE);
-close(ETFILE);
-close(FMFILE);
-close(FEFILE);
-
diff --git a/src/usr/hwpf/fapi/fapiParseErrorInfo.pl b/src/usr/hwpf/fapi/fapiParseErrorInfo.pl
deleted file mode 100755
index 36df57d6f..000000000
--- a/src/usr/hwpf/fapi/fapiParseErrorInfo.pl
+++ /dev/null
@@ -1,1229 +0,0 @@
-#!/usr/bin/perl
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/fapi/fapiParseErrorInfo.pl $
-#
-# OpenPOWER HostBoot Project
-#
-# Contributors Listed Below - COPYRIGHT 2011,2015
-# [+] International Business Machines Corp.
-#
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-
-# $Id: fapiParseErrorInfo.pl,v 1.34 2015/05/27 17:10:16 rjknight Exp $
-# Purpose:  This perl script will parse HWP Error XML files and create required
-#           FAPI code.
-#
-# Author: CamVan Nguyen and Mike Jones
-#
-# Change Log **********************************************************
-#
-#  Flag  Track#    Userid    Date      Description
-#  ----  --------  --------  --------  -----------
-#                  camvanng  06/03/11  Created
-#                  mjjones   06/06/11  Minor updates for integration
-#                  mjjones   06/10/11  Added "use strict;"
-#                  mjjones   07/05/11  Take output dir as parameter
-#                  mjjones   08/08/11  Large update to create more code
-#                  mjjones   08/24/11  Parse GARD info
-#                  mjjones   09/22/11  New Error Info Design
-#                  camvanng  10/20/11  Fix bug
-#                  mjjones   12/16/11  Improved usage statement
-#                  mjjones   02/10/12  Allow err file with one element
-#                  mjjones   03/22/12  Generate hash values for enums
-#                  mjjones   05/15/12  Detect duplicate error rcs
-#                  mjjones   05/21/12  Detect duplicate ids/hashes across files
-#                  mjjones   06/27/12  Add assembler output for SBE usage
-#                  mjjones   09/19/12  Generate FFDC ID enumeration
-#                                      Generate fapiCollectRegFfdc.C file
-#                  mjjones   10/23/12  Minor fix for Cronus compile failure
-#                  mjjones   11/09/12  Generate fapiSetSbeError.H
-#                  mjjones   01/09/13  Fix CFAM register capture
-#                  mjjones   03/14/13  Allow 64bit literals for SCOM reg capture
-#                  mjjones   03/22/13  Support Procedure Callouts
-#                  mjjones   04/25/13  Allow multiple register ffdc ids in a
-#                                      collectRegisterFfdc element
-#                  mjjones   05/20/13  Support Bus Callouts
-#                  mjjones   06/24/13  Support Children CDGs
-#                  mjjones   08/20/13  Use constants for Reg FFDC collection
-#                  mjjones   08/26/13  Support HW Callouts
-#                  dedahle   09/30/13  Support chiplet register FFDC collection
-#                  rjknight  09/24/13  Allow callout/deconfigure/gard of
-#                                      DIMM(s) related to MBA
-#                  dedahle   10/15/13  Support register FFDC collection based on
-#                                      present children
-#                  whs       03/11/14  Add FW traces to error logs
-#                  mjjones   03/20/14  Fix register FFDC collection bug when
-#                                      collecting chiplet registers
-#                  mjjones   03/26/14  Generate HWP error on unknown SBE error
-#                  maploetz  06/11/14  Callout deconfig/gard target on all SBE
-#                                      errors
-#                  rjknight  05/27/15  Include hwInstance parsing for PCI clock
-#                                      callouts
-#
-# End Change Log *****************************************************
-#
-# Usage:
-# fapiParseErrorInfo.pl <output dir> <filename1> <filename2> ...
-
-use strict;
-
-#------------------------------------------------------------------------------
-# Set PREFERRED_PARSER to XML::Parser. Otherwise it uses XML::SAX which contains
-# bugs that result in XML parse errors that can be fixed by adjusting white-
-# space (i.e. parse errors that do not make sense).
-#------------------------------------------------------------------------------
-$XML::Simple::PREFERRED_PARSER = 'XML::Parser';
-
-#------------------------------------------------------------------------------
-# Specify perl modules to use
-#------------------------------------------------------------------------------
-use Digest::MD5 qw(md5_hex);
-use XML::Simple;
-my $xml = new XML::Simple (KeyAttr=>[]);
-
-# Uncomment to enable debug output
-#use Data::Dumper;
-
-#------------------------------------------------------------------------------
-# Print Command Line Help
-#------------------------------------------------------------------------------
-my $numArgs = $#ARGV + 1;
-if ($numArgs < 2)
-{
-    print ("Usage: fapiParseErrorInfo.pl <output dir> <filename1> <filename2> ...\n");
-    print ("  This perl script will parse HWP Error XML files and create\n");
-    print ("  the following files:\n");
-    print ("  - fapiHwpReturnCodes.H. HwpReturnCode enumeration (HWP generated errors)\n");
-    print ("  - fapiHwpErrorInfo.H.   Error information (used by FAPI_SET_HWP_ERROR\n");
-    print ("                          when a HWP generates an error)\n");
-    print ("  - fapiCollectRegFfdc.C. Function to collect register FFDC\n");
-    print ("  - fapiSetSbeError.H.    Macro to create an SBE error\n");
-    exit(1);
-}
-
-#------------------------------------------------------------------------------
-# Hashes containing error names/enum-values
-#------------------------------------------------------------------------------
-my %errNameToValueHash;
-my %errValuePresentHash;
-
-#------------------------------------------------------------------------------
-# Hashes containing ffdc names/enum-values
-#------------------------------------------------------------------------------
-my %ffdcNameToValueHash;
-my %ffdcValuePresentHash;
-
-#------------------------------------------------------------------------------
-# Subroutine that checks if an entry exists in an array. If it doesn't exist
-# then it is added. The index of the entry within the array is returned
-#------------------------------------------------------------------------------
-sub addEntryToArray
-{
-    my ($arrayref, $entry ) = @_;
-
-    my $match = 0;
-    my $index = 0;
-
-    foreach my $element (@$arrayref)
-    {
-        if ($element eq $entry)
-        {
-            $match = 1;
-            last;
-        }
-        else
-        {
-            $index++;
-        }
-    }
-
-    if (!($match))
-    {
-        push(@$arrayref, $entry);
-    }
-
-    return $index;
-}
-
-#------------------------------------------------------------------------------
-# Subroutine that figures out an error enum value from an error name and stores
-# it in global hashes
-#------------------------------------------------------------------------------
-sub setErrorEnumValue
-{
-    my $name = $_[0];
-
-    #--------------------------------------------------------------------------
-    # Check that the error name is not a duplicate
-    #--------------------------------------------------------------------------
-    if (exists($errNameToValueHash{$name}))
-    {
-        # Two different errors with the same name!
-        print ("fapiParseErrorInfo.pl ERROR. Duplicate error name ", $name, "\n");
-        exit(1);
-    }
-
-    #--------------------------------------------------------------------------
-    # Figure out the error enum-value. This is a hash value generated from
-    # the error name. A hash is used for Cronus so that if a HWP is not
-    # recompiled against a new eCMD/Cronus version where the errors have
-    # changed then there will not be a mismatch in error values.
-    # This is a 24bit hash value because FAPI has a requirement that the
-    # top byte of the 32 bit error value be zero to store flags indicating
-    # the creator of the error
-    #--------------------------------------------------------------------------
-    my $errHash128Bit = md5_hex($name);
-    my $errHash24Bit = substr($errHash128Bit, 0, 6);
-
-    #--------------------------------------------------------------------------
-    # Check that the error enum-value is not a duplicate
-    #--------------------------------------------------------------------------
-    if (exists($errValuePresentHash{$errHash24Bit}))
-    {
-        # Two different errors generate the same hash-value!
-        print ("fapiParseAttributeInfo.pl ERROR. Duplicate error hash value\n");
-        exit(1);
-    }
-
-    #--------------------------------------------------------------------------
-    # Update the hashes with the error name and ID
-    #--------------------------------------------------------------------------
-    $errValuePresentHash{$errHash24Bit} = 1;
-    $errNameToValueHash{$name} = $errHash24Bit;
-}
-
-#------------------------------------------------------------------------------
-# Subroutine that figures out an FFDC ID value from an FFDC name and stores it
-# in global hashes for use when creating the enumeration of FFDC IDs
-#------------------------------------------------------------------------------
-sub setFfdcIdValue
-{
-    my $name = $_[0];
-
-    #--------------------------------------------------------------------------
-    # Check that the FFDC name is not a duplicate
-    #--------------------------------------------------------------------------
-    if (exists($ffdcNameToValueHash{$name}))
-    {
-        # Two different FFDCs with the same name!
-        print ("fapiParseErrorInfo.pl ERROR. Duplicate FFDC name ", $name, "\n");
-        exit(1);
-    }
-
-    #--------------------------------------------------------------------------
-    # Figure out the FFDC enum-value. This is a hash value generated from
-    # the FFDC name.
-    #--------------------------------------------------------------------------
-    my $ffdcHash128Bit = md5_hex($name);
-    my $ffdcHash32Bit = substr($ffdcHash128Bit, 0, 8);
-
-    #--------------------------------------------------------------------------
-    # Check that the error enum-value is not a duplicate
-    #--------------------------------------------------------------------------
-    if (exists($ffdcValuePresentHash{$ffdcHash32Bit}))
-    {
-        # Two different FFDCs generate the same hash-value!
-        print ("fapiParseAttributeInfo.pl ERROR. Duplicate FFDC hash value\n");
-        exit(1);
-    }
-
-    #--------------------------------------------------------------------------
-    # Update the hashes with the error name and ID
-    #--------------------------------------------------------------------------
-    $ffdcValuePresentHash{$ffdcHash32Bit} = 1;
-    $ffdcNameToValueHash{$name} = $ffdcHash32Bit;
-}
-
-#------------------------------------------------------------------------------
-# Open output files for writing
-#------------------------------------------------------------------------------
-my $rcFile = $ARGV[0];
-$rcFile .= "/";
-$rcFile .= "fapiHwpReturnCodes.H";
-open(RCFILE, ">", $rcFile);
-
-my $eiFile = $ARGV[0];
-$eiFile .= "/";
-$eiFile .= "fapiHwpErrorInfo.H";
-open(EIFILE, ">", $eiFile);
-
-my $crFile = $ARGV[0];
-$crFile .= "/";
-$crFile .= "fapiCollectRegFfdc.C";
-open(CRFILE, ">", $crFile);
-
-my $sbFile = $ARGV[0];
-$sbFile .= "/";
-$sbFile .= "fapiSetSbeError.H";
-open(SBFILE, ">", $sbFile);
-
-#------------------------------------------------------------------------------
-# Print start of file information to fapiHwpErrorInfo.H
-#------------------------------------------------------------------------------
-print EIFILE "// fapiHwpErrorInfo.H\n";
-print EIFILE "// This file is generated by perl script fapiParseErrorInfo.pl\n\n";
-print EIFILE "#ifndef FAPIHWPERRORINFO_H_\n";
-print EIFILE "#define FAPIHWPERRORINFO_H_\n\n";
-print EIFILE "/**\n";
-print EIFILE " * \@brief Error Information macros and HwpFfdcId enumeration\n";
-print EIFILE " *\/\n";
-
-#------------------------------------------------------------------------------
-# Print start of file information to fapiCollectRegFfdc.C
-#------------------------------------------------------------------------------
-print CRFILE "// fapiCollectRegFfdc.C\n";
-print CRFILE "// This file is generated by perl script fapiParseErrorInfo.pl\n\n";
-print CRFILE "#include <stdint.h>\n";
-print CRFILE "#include <vector>\n";
-print CRFILE "#include <ecmdDataBufferBase.H>\n";
-print CRFILE "#include <fapiCollectRegFfdc.H>\n";
-print CRFILE "#include <fapiTarget.H>\n";
-print CRFILE "#include <fapiReturnCode.H>\n";
-print CRFILE "#include <fapiHwAccess.H>\n";
-print CRFILE "#include <fapiPlatTrace.H>\n";
-print CRFILE "#include <fapiPlatRegAddresses.H>\n\n";
-print CRFILE "#include <fapiAttributeService.H>\n";
-print CRFILE "#include <fapiSystemConfig.H>\n\n";
-
-print CRFILE "namespace fapi\n";
-print CRFILE "{\n";
-print CRFILE "void fapiCollectRegFfdc(const fapi::Target & i_target,\n";
-print CRFILE "                        const fapi::HwpFfdcId i_ffdcId,\n";
-print CRFILE "                        fapi::ReturnCode & o_rc,\n";
-print CRFILE "                        fapi::TargetType i_child,\n";
-print CRFILE "                        fapi::TargetType i_presChild,\n";
-print CRFILE "                        uint32_t i_childOffsetMult)\n";
-print CRFILE "{\n";
-print CRFILE "    FAPI_INF(\"fapiCollectRegFfdc. FFDC ID: 0x%x\", i_ffdcId);\n";
-print CRFILE "    fapi::ReturnCode l_rc;\n";
-print CRFILE "    ecmdDataBufferBase l_buf;\n";
-print CRFILE "    uint32_t l_cfamData = 0;\n";
-print CRFILE "    uint64_t l_scomData = 0;\n";
-print CRFILE "    std::vector<uint32_t> l_cfamAddresses;\n";
-print CRFILE "    std::vector<uint64_t> l_scomAddresses;\n";
-print CRFILE "    uint32_t l_ffdcSize = 0;\n\n";
-print CRFILE "    switch (i_ffdcId)\n";
-print CRFILE "    {\n";
-
-#------------------------------------------------------------------------------
-# Print start of file information to fapiSetSbeError.H
-#------------------------------------------------------------------------------
-print SBFILE "// fapiSetSbeError.H\n";
-print SBFILE "// This file is generated by perl script fapiParseErrorInfo.pl\n\n";
-print SBFILE "// When SBE code creates an error, it produces an error value\n";
-print SBFILE "// that matches a value in the HwpReturnCode enum in\n";
-print SBFILE "// fapiHwpReturnCodes.H. The SBE uses the __ASSEMBLER__\n";
-print SBFILE "// primitives in fapiHwpReturnCodes.H to do this. The function\n";
-print SBFILE "// that extracts the error value from the SBE needs to call\n";
-print SBFILE "// FAPI_SET_HWP_ERROR to create the error and get all the\n";
-print SBFILE "// actions in the error XML file performed, but that macro can\n";
-print SBFILE "// only be called with the enumerator, not the value. This\n";
-print SBFILE "// FAPI_SET_SBE_ERROR macro can be called instead, it calls\n";
-print SBFILE "// FAPI_SET_HWP_ERROR with the correct error enumerator.\n";
-print SBFILE "// Errors containing <sbeError/> in their XML are supported\n";
-print SBFILE "// in this macro.\n\n";
-print SBFILE "// Note that it is expected that this macro will be called\n";
-print SBFILE "// in one place (the function that extracts the error from\n";
-print SBFILE "// the SBE), if this changes and it is called in multiple\n";
-print SBFILE "// places then the macro could be turned into a function to\n";
-print SBFILE "// avoid the code size increase of expanding the macro in\n";
-print SBFILE "// multiple places. The function approach is slightly more\n";
-print SBFILE "// complicated, there is an extra C file and the function\n";
-print SBFILE "// must take a parameter for the generic chip ID in the error\n";
-print SBFILE "// XML.\n\n";
-print SBFILE "#ifndef FAPISETSBEERROR_H_\n";
-print SBFILE "#define FAPISETSBEERROR_H_\n\n";
-print SBFILE "#define FAPI_SET_SBE_ERROR(RC, ERRVAL)\\\n";
-print SBFILE "{\\\n";
-print SBFILE "switch (ERRVAL)\\\n";
-print SBFILE "{\\\n";
-
-#------------------------------------------------------------------------------
-# For each XML file
-#------------------------------------------------------------------------------
-foreach my $argnum (1 .. $#ARGV)
-{
-    my $infile = $ARGV[$argnum];
-    my $count = 0;
-
-    #--------------------------------------------------------------------------
-    # Read XML file. The ForceArray option ensures that there is an array of
-    # elements even if there is only one element
-    #--------------------------------------------------------------------------
-    my $errors = $xml->XMLin($infile, ForceArray =>
-        ['hwpError', 'collectFfdc', 'ffdc', 'callout', 'deconfigure', 'gard',
-         'registerFfdc', 'collectRegisterFfdc', 'cfamRegister', 'scomRegister',
-         'id','collectTrace']);
-
-    # Uncomment to get debug output of all errors
-    #print "\nFile: ", $infile, "\n", Dumper($errors), "\n";
-
-    #--------------------------------------------------------------------------
-    # For each Error
-    #--------------------------------------------------------------------------
-    foreach my $err (@{$errors->{hwpError}})
-    {
-        #----------------------------------------------------------------------
-        # Check that expected fields are present
-        #----------------------------------------------------------------------
-        if (! exists $err->{rc})
-        {
-            print ("fapiParseErrorInfo.pl ERROR. rc missing\n");
-            exit(1);
-        }
-
-        if (! exists $err->{description})
-        {
-            print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. description missing\n");
-            exit(1);
-        }
-
-        #----------------------------------------------------------------------
-        # Set the error enum value in a global hash
-        #---------------------------------------------------------------------
-        setErrorEnumValue($err->{rc});
-
-        #----------------------------------------------------------------------
-        # If this is an SBE error, add it to fapiSetSbeError.H
-        #----------------------------------------------------------------------
-        if (exists $err->{sbeError})
-        {
-            print SBFILE "    case fapi::$err->{rc}:\\\n";
-            print SBFILE "        FAPI_SET_HWP_ERROR(RC, $err->{rc});\\\n";
-            print SBFILE "        break;\\\n";
-        }
-
-        #----------------------------------------------------------------------
-        # Print the CALL_FUNCS_TO_COLLECT_FFDC macro to fapiHwpErrorInfo.H
-        #----------------------------------------------------------------------
-        print EIFILE "#define $err->{rc}_CALL_FUNCS_TO_COLLECT_FFDC(RC) ";
-        $count = 0;
-
-        foreach my $collectFfdc (@{$err->{collectFfdc}})
-        {
-            if ($count == 0)
-            {
-                print EIFILE "{ fapi::ReturnCode l_tempRc; ";
-            }
-            $count++;
-
-            print EIFILE "FAPI_EXEC_HWP(l_tempRc, $collectFfdc, RC); ";
-        }
-
-        if ($count > 0)
-        {
-            print EIFILE "}";
-        }
-
-        print EIFILE "\n";
-
-        #----------------------------------------------------------------------
-        # Print the CALL_FUNCS_TO_COLLECT_REG_FFDC macro to fapiHwpErrorInfo.H
-        #----------------------------------------------------------------------
-        print EIFILE "#define $err->{rc}_CALL_FUNCS_TO_COLLECT_REG_FFDC(RC) ";
-
-        foreach my $collectRegisterFfdc (@{$err->{collectRegisterFfdc}})
-        {
-            #------------------------------------------------------------------
-            # Check that expected fields are present
-            #------------------------------------------------------------------
-            if (! exists $collectRegisterFfdc->{id}[0])
-            {
-                print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. id(s) missing from collectRegisterFfdc\n");
-                exit(1);
-            }
-            foreach my $id (@{$collectRegisterFfdc->{id}})
-            {
-                #---------------------------------------------------------------------------------
-                # Check FFDC register collection type: target, child, or based on present children
-                #---------------------------------------------------------------------------------
-                if (exists $collectRegisterFfdc->{target})
-                {
-                    print EIFILE "fapiCollectRegFfdc($collectRegisterFfdc->{target}, ";
-                    print EIFILE "fapi::$id, RC); ";
-                }
-                elsif (exists $collectRegisterFfdc->{childTargets})
-                {
-                    if (! exists $collectRegisterFfdc->{childTargets}->{parent})
-                    {
-                        print ("fapiParseErrorInfo.pl ERROR: parent missing from collectRegisterFfdc\n");
-                        exit(1);
-                    }
-                    if (! exists $collectRegisterFfdc->{childTargets}->{childType})
-                    {
-                        print ("fapiParseErrorInfo.pl ERROR: childType missing from collectRegisterFfdc\n");
-                        exit(1);
-                    }
-                    print EIFILE "fapiCollectRegFfdc($collectRegisterFfdc->{childTargets}->{parent}, ";
-                    print EIFILE "fapi::$id, RC, fapi::$collectRegisterFfdc->{childTargets}->{childType}); ";
-                }
-                elsif (exists $collectRegisterFfdc->{basedOnPresentChildren})
-                {
-                    if (! exists $collectRegisterFfdc->{basedOnPresentChildren}->{target})
-                    {
-                        print ("fapiParseErrorInfo.pl ERROR: target missing from collectRegisterFfdc\n");
-                        exit(1);
-                    }
-                    if (! exists $collectRegisterFfdc->{basedOnPresentChildren}->{childType})
-                    {
-                        print ("fapiParseErrorInfo.pl ERROR: childType missing from collectRegisterFfdc\n");
-                        exit(1);
-                    }
-                    if (! exists $collectRegisterFfdc->{basedOnPresentChildren}->{childPosOffsetMultiplier})
-                    {
-                        print ("fapiParseErrorInfo.pl ERROR: childPosOffsetMultiplier missing from collectRegisterFfdc\n");
-                        exit(1);
-                    }
-                    print EIFILE "fapiCollectRegFfdc($collectRegisterFfdc->{basedOnPresentChildren}->{target}, ";
-                    print EIFILE "fapi::$id, RC, fapi::TARGET_TYPE_NONE, fapi::$collectRegisterFfdc->{basedOnPresentChildren}->{childType}, ";
-                    print EIFILE "$collectRegisterFfdc->{basedOnPresentChildren}->{childPosOffsetMultiplier});";
-                }
-                else
-                {
-                    print ("fapiParseErrorInfo.pl ERROR: Invalid collectRegisterFfdc configuration\n");
-                    exit(1);
-                }
-            }
-        }
-
-        print EIFILE "\n";
-
-        #----------------------------------------------------------------------
-        # Print the ADD_ERROR_INFO macro to fapiHwpErrorInfo.H
-        #----------------------------------------------------------------------
-        print EIFILE "#define $err->{rc}_ADD_ERROR_INFO(RC) ";
-
-        # Array of EI Objects
-        my @eiObjects;
-
-        my $eiObjectStr = "const void * l_objects[] = {";
-        my $eiEntryStr = "";
-        my $eiEntryCount = 0;
-        my %cdgTargetHash; # Records the callout/deconfigure/gards for Targets
-        my %cdgChildHash;  # Records the callout/deconfigure/gards for Children
-
-        # collect firmware trace
-        foreach my $collectTrace (@{$err->{collectTrace}})
-        {
-            # Add an EI entry to eiEntryStr
-            $eiEntryStr .= "  l_entries[$eiEntryCount].iv_type = fapi::ReturnCode::EI_TYPE_COLLECT_TRACE; \\\n";
-            $eiEntryStr .= "  l_entries[$eiEntryCount].collect_trace.iv_eieTraceId =  fapi::CollectTraces::$collectTrace; \\\n";
-            $eiEntryCount++;
-        }
-
-        # Local FFDC
-        foreach my $ffdc (@{$err->{ffdc}})
-        {
-            # Set the FFDC ID value in a global hash. The name is <rc>_<ffdc>
-            my $ffdcName = $err->{rc} . "_";
-            $ffdcName = $ffdcName . $ffdc;
-            setFfdcIdValue($ffdcName);
-
-            # Add the FFDC data to the EI Object array if it doesn't already exist
-            my $objNum = addEntryToArray(\@eiObjects, $ffdc);
-
-            # Add an EI entry to eiEntryStr
-            $eiEntryStr .= "  l_entries[$eiEntryCount].iv_type = fapi::ReturnCode::EI_TYPE_FFDC; \\\n";
-            $eiEntryStr .= "  l_entries[$eiEntryCount].ffdc.iv_ffdcObjIndex = $objNum; \\\n";
-            $eiEntryStr .= "  l_entries[$eiEntryCount].ffdc.iv_ffdcId = fapi::$ffdcName; \\\n";
-            $eiEntryStr .= "  l_entries[$eiEntryCount].ffdc.iv_ffdcSize = fapi::ReturnCodeFfdc::getErrorInfoFfdcSize($ffdc); \\\n";
-            $eiEntryCount++;
-        }
-
-        # Procedure/Target/Bus/Child callouts
-        foreach my $callout (@{$err->{callout}})
-        {
-            if (! exists $callout->{priority})
-            {
-                print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. Callout priority missing\n");
-                exit(1);
-            }
-
-            my $elementsFound = 0;
-            if (exists $callout->{hw})
-            {
-                # HW Callout
-                if (! exists $callout->{hw}->{hwid})
-                {
-                    print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. HW Callout hwid missing\n");
-                    exit(1);
-                }
-
-                # Check that there is a reference target
-                if (! exists $callout->{hw}->{refTarget})
-                {
-                    print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. Callout missing refTarget\n");
-                    exit(1);
-                }
-
-                # Add an EI entry to eiEntryStr
-                $eiEntryStr .= "  l_entries[$eiEntryCount].iv_type = fapi::ReturnCode::EI_TYPE_HW_CALLOUT; \\\n";
-                $eiEntryStr .= "  l_entries[$eiEntryCount].hw_callout.iv_hw = fapi::HwCallouts::$callout->{hw}->{hwid}; \\\n";
-                $eiEntryStr .= "  l_entries[$eiEntryCount].hw_callout.iv_calloutPriority = fapi::CalloutPriorities::$callout->{priority}; \\\n";
-                if (exists $callout->{hw}->{refTarget})
-                {
-                    # Add the Targets to the objectlist if they don't already exist
-                    my $objNum = addEntryToArray(\@eiObjects, $callout->{hw}->{refTarget});
-                    $eiEntryStr .= "  l_entries[$eiEntryCount].hw_callout.iv_refObjIndex = $objNum; \\\n";
-                }
-                else
-                {
-                    $eiEntryStr .= "  l_entries[$eiEntryCount].hw_callout.iv_refObjIndex = 0xff; \\\n";
-                }
-
-                if (exists $callout->{hw}->{hwInstance})
-                {
-                    # Add the Targets to the objectlist if they don't already exist
-                    my $objNum = addEntryToArray(\@eiObjects, $callout->{hw}->{hwInstance});
-                    $eiEntryStr .= "  l_entries[$eiEntryCount].hw_callout.iv_objPosIndex = $objNum; \\\n";
-                }
-                else
-                {
-                    $eiEntryStr .= "  l_entries[$eiEntryCount].hw_callout.iv_objPosIndex = 0xff; \\\n"
-                }
-
-                $eiEntryCount++;
-                $elementsFound++;
-            }
-            if (exists $callout->{procedure})
-            {
-                # Procedure Callout
-                # Add an EI entry to eiEntryStr
-                $eiEntryStr .= "  l_entries[$eiEntryCount].iv_type = fapi::ReturnCode::EI_TYPE_PROCEDURE_CALLOUT; \\\n";
-                $eiEntryStr .= "  l_entries[$eiEntryCount].proc_callout.iv_procedure = fapi::ProcedureCallouts::$callout->{procedure}; \\\n";
-                $eiEntryStr .= "  l_entries[$eiEntryCount].proc_callout.iv_calloutPriority = fapi::CalloutPriorities::$callout->{priority}; \\\n";
-                $eiEntryCount++;
-                $elementsFound++;
-            }
-            if (exists $callout->{bus})
-            {
-                # A Bus Callout consists of two targets separated by
-                # commas/spaces
-                my @targets = split(/\s*,\s*|\s+/, $callout->{bus});
-
-                if (scalar @targets != 2)
-                {
-                    print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. did not find two targets in bus callout\n");
-                    exit(1);
-                }
-
-                # Check the type of the Targets
-                print EIFILE "fapi::fapiCheckType<const fapi::Target *>(&$targets[0]); \\\n";
-                print EIFILE "fapi::fapiCheckType<const fapi::Target *>(&$targets[1]); \\\n";
-
-                # Add the Targets to the objectlist if they don't already exist
-                my $objNum1 = addEntryToArray(\@eiObjects, $targets[0]);
-                my $objNum2 = addEntryToArray(\@eiObjects, $targets[1]);
-
-                # Add an EI entry to eiEntryStr
-                $eiEntryStr .= "  l_entries[$eiEntryCount].iv_type = fapi::ReturnCode::EI_TYPE_BUS_CALLOUT; \\\n";
-                $eiEntryStr .= "  l_entries[$eiEntryCount].bus_callout.iv_endpoint1ObjIndex = $objNum1; \\\n";
-                $eiEntryStr .= "  l_entries[$eiEntryCount].bus_callout.iv_endpoint2ObjIndex = $objNum2; \\\n";
-                $eiEntryStr .= "  l_entries[$eiEntryCount].bus_callout.iv_calloutPriority = fapi::CalloutPriorities::$callout->{priority}; \\\n";
-                $eiEntryCount++;
-                $elementsFound++;
-            }
-            if (exists $callout->{target})
-            {
-                # Add the Target to cdgTargetHash to be processed with any
-                # deconfigure and GARD requests
-                $cdgTargetHash{$callout->{target}}{callout} = 1;
-                $cdgTargetHash{$callout->{target}}{priority} =
-                    $callout->{priority};
-
-                $elementsFound++;
-            }
-            if (exists $callout->{childTargets})
-            {
-                # Check that the parent and childType subelements exist
-                if (! exists $callout->{childTargets}->{parent})
-                {
-                    print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. Child Callout parent missing\n");
-                    exit(1);
-                }
-
-                if (! exists $callout->{childTargets}->{childType})
-                {
-                    print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. Child Callout childType missing\n");
-                    exit(1);
-                }
-
-                # Add the child info to cdgChildHash to be processed with
-                # any deconfigure and GARD requests
-                my $parent = $callout->{childTargets}->{parent};
-                my $childType = $callout->{childTargets}->{childType};
-                $cdgChildHash{$parent}{$childType}{callout} = 1;
-                $cdgChildHash{$parent}{$childType}{priority} =
-                    $callout->{priority};
-
-                $elementsFound++;
-
-                if (exists $callout->{childTargets}->{childPort})
-                {
-                    my $childPort = $callout->{childTargets}->{childPort};
-
-                    $cdgChildHash{$parent}{$childType}{childPort} = $childPort;
-                }
-
-                if (exists $callout->{childTargets}->{childNumber})
-                {
-                    my $childNum = $callout->{childTargets}->{childNumber};
-                    $cdgChildHash{$parent}{$childType}{childNumber} = $childNum;
-                }
-
-            }
-            if ($elementsFound == 0)
-            {
-                print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. Callout incomplete\n");
-                exit(1);
-            }
-            elsif ($elementsFound > 1)
-            {
-                print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. Callout has multiple elements\n");
-                exit(1);
-            }
-        } # callout
-
-        # Target/Child deconfigures
-        foreach my $deconfigure (@{$err->{deconfigure}})
-        {
-            my $elementsFound = 0;
-            if (exists $deconfigure->{target})
-            {
-                # Add the Target to cdgTargetHash to be processed with any
-                # callout and GARD requests
-                $cdgTargetHash{$deconfigure->{target}}{deconf} = 1;
-                $elementsFound++;
-            }
-            if (exists $deconfigure->{childTargets})
-            {
-                # Check that the parent and childType subelements exist
-                if (! exists $deconfigure->{childTargets}->{parent})
-                {
-                    print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. Child Deconfigure parent missing\n");
-                    exit(1);
-                }
-                if (! exists $deconfigure->{childTargets}->{childType})
-                {
-                    print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. Child Deconfigure childType missing\n");
-                    exit(1);
-                }
-
-                # Add the child info to cdgChildHash to be processed with
-                # any callout and GARD requests
-                my $parent = $deconfigure->{childTargets}->{parent};
-                my $childType = $deconfigure->{childTargets}->{childType};
-                $cdgChildHash{$parent}{$childType}{deconf} = 1;
-
-                $elementsFound++;
-
-                if ( exists $deconfigure->{childTargets}->{childPort})
-                {
-                    my $childPort = $deconfigure->{childTargets}->{childPort};
-
-                    $cdgChildHash{$parent}{$childType}{childPort} = $childPort;
-                }
-
-                if ( exists $deconfigure->{childTargets}->{childNumber})
-                {
-                    my $childNum = $deconfigure->{childTargets}->{childNumber};
-                    $cdgChildHash{$parent}{$childType}{childNumber} = $childNum;
-
-                }
-            }          
-
-            if ($elementsFound == 0)
-            {
-                print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. Deconfigure incomplete\n");
-                exit(1);
-            }
-            elsif ($elementsFound > 1)
-            {
-                print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. Deconfigure has multiple elements\n");
-                exit(1);
-            }
-        } # deconfigure
-
-        # Target/Child Gards
-        foreach my $gard (@{$err->{gard}})
-        {
-            my $elementsFound = 0;
-            if (exists $gard->{target})
-            {
-                # Add the Target to cdgTargetHash to be processed with any
-                # callout and deconfigure requests
-                $cdgTargetHash{$gard->{target}}{gard} = 1;
-                $elementsFound++;
-            }
-            if (exists $gard->{childTargets})
-            {
-                # Check that the parent and childType subelements exist
-                if (! exists $gard->{childTargets}->{parent})
-                {
-                    print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. Child GARD parent missing\n");
-                    exit(1);
-                }
-                if (! exists $gard->{childTargets}->{childType})
-                {
-                    print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. Child GARD childType missing\n");
-                    exit(1);
-                }
-
-                # Add the child info to cdgChildHash to be processed with
-                # any callout and deconfigure requests
-                my $parent = $gard->{childTargets}->{parent};
-                my $childType = $gard->{childTargets}->{childType};
-                $cdgChildHash{$parent}{$childType}{gard} = 1;
-
-                $elementsFound++;
-
-                if ( exists $gard->{childTargets}->{childPort})
-                {
-                    my $childPort = $gard->{childTargets}->{childPort};
-
-                    $cdgChildHash{$parent}{$childType}{childPort} = $childPort;
-
-                }
-
-                if ( exists $gard->{childTargets}->{childNumber})
-                {
-                    my $childNum = $gard->{childTargets}->{childNumber};
-                    $cdgChildHash{$parent}{$childType}{childNumber} = $childNum;
-                }
-            }
-            if ($elementsFound == 0)
-            {
-                print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. GARD incomplete\n");
-                exit(1);
-            }
-            elsif ($elementsFound > 1)
-            {
-                print ("fapiParseErrorInfo.pl ERROR in $err->{rc}. GARD has multiple elements\n");
-                exit(1);
-            }
-        } # gard
-
-        # Process the callout, deconfigures and GARDs for each Target
-        foreach my $cdg (keys %cdgTargetHash)
-        {
-            # Check the type
-            print EIFILE "fapi::fapiCheckType<const fapi::Target *>(&$cdg); \\\n";
-
-            my $callout = 0;
-            my $priority = 'LOW';
-            my $deconf = 0;
-            my $gard = 0;
-
-            if (exists $cdgTargetHash{$cdg}->{callout})
-            {
-                $callout = 1;
-            }
-            if (exists $cdgTargetHash{$cdg}->{priority})
-            {
-                $priority = $cdgTargetHash{$cdg}->{priority};
-            }
-            if (exists $cdgTargetHash{$cdg}->{deconf})
-            {
-                $deconf = 1;
-            }
-            if (exists $cdgTargetHash{$cdg}->{gard})
-            {
-                $gard = 1;
-            }
-
-            # Add the Target to the objectlist if it doesn't already exist
-            my $objNum = addEntryToArray(\@eiObjects, $cdg);
-
-            # Add an EI entry to eiEntryStr
-            $eiEntryStr .= "  l_entries[$eiEntryCount].iv_type = fapi::ReturnCode::EI_TYPE_CDG; \\\n";
-            $eiEntryStr .= "  l_entries[$eiEntryCount].target_cdg.iv_targetObjIndex = $objNum; \\\n";
-            $eiEntryStr .= "  l_entries[$eiEntryCount].target_cdg.iv_callout = $callout; \\\n";
-            $eiEntryStr .= "  l_entries[$eiEntryCount].target_cdg.iv_deconfigure = $deconf; \\\n";
-            $eiEntryStr .= "  l_entries[$eiEntryCount].target_cdg.iv_gard = $gard; \\\n";
-            $eiEntryStr .= "  l_entries[$eiEntryCount].target_cdg.iv_calloutPriority = fapi::CalloutPriorities::$priority; \\\n";
-            $eiEntryCount++;
-        }
-
-        # Process the callout, deconfigures and GARDs for Child Targets
-        foreach my $parent (keys %cdgChildHash)
-        {
-            # Check the type
-            print EIFILE "fapi::fapiCheckType<const fapi::Target *>(&$parent); \\\n";
-
-            foreach my $childType (keys %{$cdgChildHash{$parent}})
-            {
-                my $callout = 0;
-                my $priority = 'LOW';
-                my $deconf = 0;
-                my $gard = 0;
-                my $childPort = 0xFF;
-                my $childNumber = 0xFF;
-
-                if (exists $cdgChildHash{$parent}{$childType}->{callout})
-                {
-                    $callout = 1;
-                }
-                if (exists $cdgChildHash{$parent}->{$childType}->{priority})
-                {
-                    $priority =
-                        $cdgChildHash{$parent}->{$childType}->{priority};
-                }
-                if (exists $cdgChildHash{$parent}->{$childType}->{deconf})
-                {
-                    $deconf = 1;
-                }
-                if (exists $cdgChildHash{$parent}->{$childType}->{childPort})
-                {
-                    $childPort =
-                        $cdgChildHash{$parent}->{$childType}->{childPort} ;
-                }
-                if (exists $cdgChildHash{$parent}->{$childType}->{childNumber})
-                {
-                    $childNumber =
-                        $cdgChildHash{$parent}->{$childType}->{childNumber} ;
-                }
-                if (exists $cdgChildHash{$parent}->{$childType}->{gard})
-                {
-                    $gard = 1;
-                }
-
-
-                # Add the Target to the objectlist if it doesn't already exist
-                my $objNum = addEntryToArray(\@eiObjects, $parent);
-
-                # Add an EI entry to eiEntryStr
-                $eiEntryStr .=
-                    "  l_entries[$eiEntryCount].iv_type = fapi::ReturnCode::EI_TYPE_CHILDREN_CDG; \\\n";
-                $eiEntryStr .=
-                    "  l_entries[$eiEntryCount].children_cdg.iv_parentObjIndex = $objNum; \\\n";
-                $eiEntryStr .=
-                    "  l_entries[$eiEntryCount].children_cdg.iv_callout = $callout; \\\n";
-                $eiEntryStr .=
-                    "  l_entries[$eiEntryCount].children_cdg.iv_deconfigure = $deconf; \\\n";
-                $eiEntryStr .=
-                    "  l_entries[$eiEntryCount].children_cdg.iv_childType = fapi::$childType; \\\n";
-                $eiEntryStr .=
-                    "  l_entries[$eiEntryCount].children_cdg.iv_childPort = $childPort; \\\n";
-                $eiEntryStr .=
-                    "  l_entries[$eiEntryCount].children_cdg.iv_childNumber = $childNumber; \\\n";
-                $eiEntryStr .=
-                    "  l_entries[$eiEntryCount].children_cdg.iv_gard = $gard; \\\n";
-                $eiEntryStr .=
-                    "  l_entries[$eiEntryCount].children_cdg.iv_calloutPriority = fapi::CalloutPriorities::$priority; \\\n";
-                $eiEntryCount++;
-            }
-        }
-
-        # Add all objects to $eiObjectStr
-        my $objCount = 0;
-
-        foreach my $eiObject (@eiObjects)
-        {
-            if ($objCount > 0)
-            {
-                $eiObjectStr .= ", ";
-            }
-            $eiObjectStr .= "&$eiObject";
-            $objCount++;
-        }
-        $eiObjectStr .= "};";
-
-        # Print info to file
-        if ($eiEntryCount > 0)
-        {
-            print EIFILE "\\\n{ \\\n  $eiObjectStr \\\n";
-            print EIFILE "  fapi::ReturnCode::ErrorInfoEntry l_entries[$eiEntryCount]; \\\n";
-            print EIFILE "$eiEntryStr";
-            print EIFILE "  RC.addErrorInfo(l_objects, l_entries, $eiEntryCount); \\\n}";
-        }
-        print EIFILE "\n\n";
-    }
-
-    #--------------------------------------------------------------------------
-    # For each registerFfdc.
-    #--------------------------------------------------------------------------
-    foreach my $registerFfdc (@{$errors->{registerFfdc}})
-    {
-        #----------------------------------------------------------------------
-        # Check that expected fields are present
-        #----------------------------------------------------------------------
-        if (! exists $registerFfdc->{id}[0])
-        {
-            print ("fapiParseErrorInfo.pl ERROR. id missing from registerFfdc\n");
-            exit(1);
-        }
-
-        if (scalar @{$registerFfdc->{id}} > 1)
-        {
-            print ("fapiParseErrorInfo.pl ERROR. multiple ids in registerFfdc\n");
-            exit(1);
-        }
-
-        #----------------------------------------------------------------------
-        # Set the FFDC ID value in a global hash
-        #----------------------------------------------------------------------
-        setFfdcIdValue($registerFfdc->{id}[0]);
-
-        #----------------------------------------------------------------------
-        # Generate code to capture the registers in fapiCollectRegFfdc.C
-        #----------------------------------------------------------------------
-        print CRFILE "        case $registerFfdc->{id}[0]:\n";
-
-        # Look for CFAM Register addresses
-        foreach my $cfamRegister (@{$registerFfdc->{cfamRegister}})
-        {
-            print CRFILE "            l_cfamAddresses.push_back($cfamRegister);\n";
-            print CRFILE "            l_ffdcSize += sizeof(l_cfamData);\n";
-        }
-
-        # Look for SCOM Register addresses
-        foreach my $scomRegister (@{$registerFfdc->{scomRegister}})
-        {
-            print CRFILE "            l_scomAddresses.push_back($scomRegister);\n";
-            print CRFILE "            l_ffdcSize += sizeof(l_scomData);\n";
-        }
-
-        print CRFILE "            break;\n";
-    }
-
-}
-
-#------------------------------------------------------------------------------
-# Print end of file information to fapiCollectRegFfdc.C
-#------------------------------------------------------------------------------
-print CRFILE "        default:\n";
-print CRFILE "            FAPI_ERR(\"fapiCollectRegFfdc.C: Invalid FFDC ID 0x%x\", ";
-print CRFILE                     "i_ffdcId);\n";
-print CRFILE "            return;\n";
-print CRFILE "    }\n\n";
-print CRFILE "    uint8_t * l_pBuf = NULL;\n";
-print CRFILE "    uint8_t * l_pData = NULL;\n";
-print CRFILE "    std::vector<fapi::Target> l_targets;\n";
-print CRFILE "    uint32_t l_chipletPos32 = 0;\n";
-#---------------------------------------------------------------------------------------------------------
-# Populate chiplet vectors (if required by register collection method) and adjust buffer sizes accordingly
-#---------------------------------------------------------------------------------------------------------
-print CRFILE "    if (fapi::TARGET_TYPE_NONE != i_child)\n";
-print CRFILE "    {\n";
-print CRFILE "        l_rc = fapiGetChildChiplets(i_target, i_child, l_targets, TARGET_STATE_FUNCTIONAL);\n";
-print CRFILE "        if (l_rc)\n";
-print CRFILE "        {\n";
-print CRFILE "            FAPI_ERR(\"fapiCollectRegFfdc.C: Error: fapiGetChildChiplets: failed to get chiplets.\");\n";
-print CRFILE "            return;\n";
-print CRFILE "        }\n";
-print CRFILE "        if (l_targets.empty())\n";
-print CRFILE "        {\n";
-print CRFILE "            FAPI_INF(\"fapiCollectRegFfdc.C: Error: No functional chiplets found. \");\n";
-print CRFILE "            return;\n";
-print CRFILE "        }\n";
-print CRFILE "        l_ffdcSize += sizeof(l_chipletPos32);\n";
-print CRFILE "        l_ffdcSize *= l_targets.size();\n";
-print CRFILE "        l_pBuf = new uint8_t[l_ffdcSize];\n";
-print CRFILE "        l_pData = l_pBuf;\n";
-print CRFILE "    }\n";
-print CRFILE "    else if (fapi::TARGET_TYPE_NONE != i_presChild)\n";
-print CRFILE "    {\n";
-print CRFILE "        l_rc = fapiGetChildChiplets(i_target, i_presChild, l_targets, TARGET_STATE_PRESENT);\n";
-print CRFILE "        if (l_rc)\n";
-print CRFILE "        {\n";
-print CRFILE "            FAPI_ERR(\"fapiCollectRegFfdc.C: Error: fapiGetChildChiplets: failed to get chiplets.\");\n";
-print CRFILE "            return;\n";
-print CRFILE "        }\n";
-print CRFILE "        if (l_targets.empty())\n";
-print CRFILE "        {\n";
-print CRFILE "            FAPI_INF(\"fapiCollectRegFfdc.C: Error: No functional chiplets found. \");\n";
-print CRFILE "            return;\n";
-print CRFILE "        }\n";
-print CRFILE "        l_ffdcSize += sizeof(l_chipletPos32);\n";
-print CRFILE "        l_ffdcSize *= l_targets.size();\n";
-print CRFILE "        l_pBuf = new uint8_t[l_ffdcSize];\n";
-print CRFILE "        l_pData = l_pBuf;\n";
-print CRFILE "    }\n";
-print CRFILE "    else\n";
-print CRFILE "    {\n";
-print CRFILE "        l_ffdcSize += sizeof(l_chipletPos32);\n";
-print CRFILE "        l_pBuf = new uint8_t[l_ffdcSize];\n";
-print CRFILE "        l_pData = l_pBuf;\n";
-print CRFILE "        l_targets.push_back(i_target);\n";
-print CRFILE "    }\n\n";
-#---------------------------------------------------------------------------------------------------------
-# Obtain target position and insert as the first word in the buffer
-#---------------------------------------------------------------------------------------------------------
-print CRFILE "    bool l_targIsChiplet = i_target.isChiplet();\n\n";
-print CRFILE "    for (std::vector<fapi::Target>::const_iterator targetIter = l_targets.begin();\n";
-print CRFILE "        targetIter != l_targets.end(); ++targetIter)\n";
-print CRFILE "    {\n";
-print CRFILE "        if ((fapi::TARGET_TYPE_NONE != i_child) ||\n";
-print CRFILE "            (fapi::TARGET_TYPE_NONE != i_presChild) ||\n";
-print CRFILE "            (true == l_targIsChiplet))\n";
-print CRFILE "        {\n";
-print CRFILE "            uint8_t l_chipletPos = 0;\n";
-print CRFILE "            l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &(*targetIter), l_chipletPos);\n";
-print CRFILE "            if (l_rc)\n";
-print CRFILE "            {\n";
-print CRFILE "                FAPI_ERR(\"fapiCollectRegFfdc.C: Error getting chiplet position\");\n";
-print CRFILE "                l_chipletPos = 0xFF;\n";
-print CRFILE "            }\n";
-                          #-------------------------------------------------------------------------
-                          # We print the target's position in the error log whether the target is a
-                          # chip or chiplet, so we need to store the chiplet position in a uint32_t
-                          # to have consitency in the buffer as ATTR_POS below returns a uint32_t
-                          #-------------------------------------------------------------------------
-print CRFILE "            l_chipletPos32 = l_chipletPos;\n";
-print CRFILE "        }\n";
-print CRFILE "        else\n";
-print CRFILE "        {\n";
-print CRFILE "            l_rc = FAPI_ATTR_GET(ATTR_POS, &(*targetIter), l_chipletPos32);\n";
-print CRFILE "            if (l_rc)\n";
-print CRFILE "            {\n";
-print CRFILE "                FAPI_ERR(\"fapiCollectRegFfdc.C: Error getting chip position\");\n";
-print CRFILE "                l_chipletPos32 = 0xFFFFFFFF;\n";
-print CRFILE "            }\n";
-print CRFILE "        }\n";
-print CRFILE "        *(reinterpret_cast<uint32_t *>(l_pData)) = l_chipletPos32;\n";
-print CRFILE "        l_pData += sizeof(l_chipletPos32);\n";
-#---------------------------------------------------------------------------------------------------------
-# Instert cfam data (if any) related to this chip / chiplet into the buffer
-# If collecting FFDC based on present children, adjust the register address by the appropriate offset
-#---------------------------------------------------------------------------------------------------------
-print CRFILE "        for (std::vector<uint32_t>::const_iterator cfamIter = l_cfamAddresses.begin();\n";
-print CRFILE "             cfamIter != l_cfamAddresses.end(); ++cfamIter)\n";
-print CRFILE "        {\n";
-print CRFILE "            if (fapi::TARGET_TYPE_NONE != i_presChild)\n";
-print CRFILE "            {\n";
-print CRFILE "                l_rc = fapiGetCfamRegister(i_target, (*cfamIter + (l_chipletPos32 * i_childOffsetMult)), l_buf);\n";
-print CRFILE "            }\n";
-print CRFILE "            else\n";
-print CRFILE "            {\n";
-print CRFILE "                l_rc = fapiGetCfamRegister(*targetIter, *cfamIter, l_buf);\n";
-print CRFILE "            }\n";
-print CRFILE "            if (l_rc)\n";
-print CRFILE "            {\n";
-print CRFILE "                FAPI_ERR(\"fapiCollectRegFfdc.C: CFAM error for 0x%x\",";
-print CRFILE                          "*cfamIter);\n";
-print CRFILE "                l_cfamData = 0xbaddbadd;\n";
-print CRFILE "            }\n";
-print CRFILE "            else\n";
-print CRFILE "            {\n";
-print CRFILE "                l_cfamData = l_buf.getWord(0);\n";
-print CRFILE "            }\n";
-print CRFILE "            *(reinterpret_cast<uint32_t *>(l_pData)) = l_cfamData;\n";
-print CRFILE "            l_pData += sizeof(l_cfamData);\n";
-print CRFILE "        }\n\n";
-#---------------------------------------------------------------------------------------------------------
-# Instert any scom data (if any) related to this chip / chiplet into the buffer
-# If collecting FFDC based on present children, adjust the register address by the appropriate offset
-#---------------------------------------------------------------------------------------------------------
-print CRFILE "        for (std::vector<uint64_t>::const_iterator scomIter = l_scomAddresses.begin();\n";
-print CRFILE "            scomIter != l_scomAddresses.end(); ++scomIter)\n";
-print CRFILE "        {\n";
-print CRFILE "            if (fapi::TARGET_TYPE_NONE != i_presChild)\n";
-print CRFILE "            {\n";
-print CRFILE "                l_rc = fapiGetScom(i_target, (*scomIter + (l_chipletPos32 * i_childOffsetMult)), l_buf);\n";
-print CRFILE "            }\n";
-print CRFILE "            else\n";
-print CRFILE "            {\n";
-print CRFILE "                l_rc = fapiGetScom(*targetIter, *scomIter, l_buf);\n";
-print CRFILE "            }\n";
-print CRFILE "            if (l_rc)\n";
-print CRFILE "            {\n";
-print CRFILE "                FAPI_ERR(\"fapiCollectRegFfdc.C: SCOM error for 0x%llx\",";
-print CRFILE                         "*scomIter);\n";
-print CRFILE "                l_scomData = 0xbaddbaddbaddbaddULL;\n";
-print CRFILE "            }\n";
-print CRFILE "            else\n";
-print CRFILE "            {\n";
-print CRFILE "                 l_scomData = l_buf.getDoubleWord(0);\n";
-print CRFILE "            }\n";
-print CRFILE "            *(reinterpret_cast<uint64_t *>(l_pData)) = l_scomData;\n";
-print CRFILE "            l_pData += sizeof(l_scomData);\n";
-print CRFILE "        }\n";
-print CRFILE "    }\n\n";
-print CRFILE "    o_rc.addEIFfdc(i_ffdcId, l_pBuf, l_ffdcSize);\n";
-print CRFILE "    delete [] l_pBuf;\n";
-print CRFILE "}\n";
-print CRFILE "}\n";
-
-#------------------------------------------------------------------------------
-# Print the fapiHwpReturnCodes.H file
-#------------------------------------------------------------------------------
-print RCFILE "// fapiHwpReturnCodes.H\n";
-print RCFILE "// This file is generated by perl script fapiParseErrorInfo.pl\n\n";
-print RCFILE "#ifndef FAPIHWPRETURNCODES_H_\n";
-print RCFILE "#define FAPIHWPRETURNCODES_H_\n\n";
-print RCFILE "#ifndef __ASSEMBLER__\n";
-print RCFILE "namespace fapi\n";
-print RCFILE "{\n\n";
-print RCFILE "/**\n";
-print RCFILE " * \@brief Enumeration of HWP return codes\n";
-print RCFILE " *\/\n";
-print RCFILE "enum HwpReturnCode\n";
-print RCFILE "{\n";
-foreach my $key (keys %errNameToValueHash)
-{
-    print RCFILE "    $key = 0x$errNameToValueHash{$key},\n";
-}
-print RCFILE "};\n\n";
-print RCFILE "}\n\n";
-print RCFILE "#else\n";
-foreach my $key (keys %errNameToValueHash)
-{
-    print RCFILE "    .set $key, 0x$errNameToValueHash{$key}\n";
-}
-print RCFILE "#endif\n";
-print RCFILE "#endif\n";
-
-#------------------------------------------------------------------------------
-# Print the HwpFfdcId enumeration to fapiHwpErrorInfo.H
-#------------------------------------------------------------------------------
-print EIFILE "namespace fapi\n";
-print EIFILE "{\n\n";
-print EIFILE "/**\n";
-print EIFILE " * \@brief Enumeration of FFDC identifiers\n";
-print EIFILE " *\/\n";
-print EIFILE "enum HwpFfdcId\n";
-print EIFILE "{\n";
-foreach my $key (keys %ffdcNameToValueHash)
-{
-    print EIFILE "    $key = 0x$ffdcNameToValueHash{$key},\n";
-}
-print EIFILE "};\n\n";
-print EIFILE "}\n\n";
-
-#------------------------------------------------------------------------------
-# Print end of file information to fapiHwpErrorInfo.H
-#------------------------------------------------------------------------------
-print EIFILE "\n\n#endif\n";
-
-#------------------------------------------------------------------------------
-# Print end of file information to fapiSetSbeError.H
-#------------------------------------------------------------------------------
-print SBFILE "    default:\\\n";
-print SBFILE "        FAPI_SET_HWP_ERROR(RC, RC_SBE_UNKNOWN_ERROR);\\\n";
-print SBFILE "        break;\\\n";
-print SBFILE "}\\\n";
-print SBFILE "}\n\n";
-print SBFILE "#endif\n";
-
-#------------------------------------------------------------------------------
-# Close output files
-#------------------------------------------------------------------------------
-close(RCFILE);
-close(EIFILE);
-close(CRFILE);
-close(SBFILE);
diff --git a/src/usr/hwpf/fapi/fapiReturnCode.C b/src/usr/hwpf/fapi/fapiReturnCode.C
deleted file mode 100644
index a969e785e..000000000
--- a/src/usr/hwpf/fapi/fapiReturnCode.C
+++ /dev/null
@@ -1,632 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/fapi/fapiReturnCode.C $                          */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: fapiReturnCode.C,v 1.22 2015/01/16 11:31:38 sangeet2 Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/hwpf/working/fapi/fapiReturnCode.C,v $
-
-/**
- *  @file fapiReturnCode.C
- *
- *  @brief Implements the ReturnCode class.
- */
-
-/*
- * Change Log ******************************************************************
- * Flag     Defect/Feature  User        Date        Description
- * ------   --------------  ----------  ----------- ----------------------------
- *                          mjjones     04/13/2011  Created.
- *                          mjjones     07/05/2011. Removed const from data
- *                          mjjones     07/25/2011  Added support for FFDC and
- *                                                  Error Target
- *                          camvanng    09/06/2011  Clear Plat Data, Hwp FFDC data,
- *                                                  and Error Target if
- *                                                  FAPI_RC_SUCCESS is assigned to
- *                                                  ReturnCode
- *                          mjjones     09/22/2011  Added ErrorInfo Support
- *                          mjjones     01/12/2012  Enforce correct usage
- *                          mjjones     02/22/2012  Allow user to add Target FFDC
- *                          mjjones     03/16/2012  Add type to FFDC data
- *                          mjjones     03/16/2012  Allow different PLAT errors
- *                          mjjones     04/20/2012  Remove deprecated int assign
- *                          mjjones     05/02/2012  Only trace setEcmdError on err
- *                          mjjones     07/11/2012  Remove a trace
- *                          brianh      07/31/2012  performance/size optimizations
- *                          mjjones     08/14/2012  Use new ErrorInfo structure
- *                          mjjones     09/19/2012  Add FFDC ID to error info
- *                          mjjones     03/22/2013  Support Procedure Callouts
- *                          mjjones     05/20/2013  Support Bus Callouts
- *                          mjjones     06/24/2013  Support Children CDGs
- *                          mjjones     08/26/2013  Support HW Callouts
- *                          whs         03/11/2014  Add FW traces to error logs
- *                          whs         07/23/2014  Reduce traces
- *                          sangeet2    01/16/2015  Support "position" attribute
- *                                                  for osc callout
- */
-
-#include <fapiReturnCode.H>
-#include <fapiReturnCodeDataRef.H>
-#include <fapiPlatTrace.H>
-#include <fapiTarget.H>
-#include <fapiUtil.H>
-#include <fapiErrorInfo.H>
-
-namespace fapi
-{
-
-//******************************************************************************
-// Constructor
-//******************************************************************************
-ReturnCode::ReturnCode(const ReturnCodes i_rcValue) :
-    iv_rcValue(i_rcValue), iv_pDataRef(NULL)
-{
-    if (i_rcValue != FAPI_RC_SUCCESS)
-    {
-        FAPI_ERR("ctor: Creating error 0x%x", i_rcValue);
-    }
-}
-
-//******************************************************************************
-// Copy Constructor
-//******************************************************************************
-ReturnCode::ReturnCode(const ReturnCode & i_right) :
-    iv_rcValue(i_right.iv_rcValue), iv_pDataRef(i_right.iv_pDataRef)
-{
-    // Note shallow copy of data ref pointer. Both ReturnCodes now point to any
-    // associated data. If there is data, increment the data ref count
-    if (iv_pDataRef)
-    {
-        iv_pDataRef->incRefCount();
-    }
-}
-
-//******************************************************************************
-// Destructor
-//******************************************************************************
-ReturnCode::~ReturnCode()
-{
-    // Forget about any associated data
-    forgetData();
-}
-
-//******************************************************************************
-// Assignment Operator
-//******************************************************************************
-ReturnCode & ReturnCode::operator=(const ReturnCode & i_right)
-{
-    // Test for self assignment
-    if (this != &i_right)
-    {
-        // Forget about any associated data
-        forgetData();
-
-        // Note shallow copy of data ref pointer. Both ReturnCodes now point to
-        // any associated data. If there is data, increment the data ref count
-        iv_rcValue = i_right.iv_rcValue;
-        iv_pDataRef = i_right.iv_pDataRef;
-
-        if (iv_pDataRef)
-        {
-            iv_pDataRef->incRefCount();
-        }
-    }
-
-    return *this;
-}
-
-//******************************************************************************
-// setFapiError function
-//******************************************************************************
-void ReturnCode::setFapiError(const ReturnCodes i_rcValue)
-{
-    FAPI_ERR("setFapiError: Creating FAPI error 0x%x", i_rcValue);
-    iv_rcValue = i_rcValue;
-
-    // Forget about any associated data (this is a new error)
-    forgetData();
-
-    // Errors generated by FAPI code are a small set, all are firmware issues
-    addEIProcedureCallout(ProcedureCallouts::CODE, CalloutPriorities::HIGH);
-}
-
-//******************************************************************************
-// setEcmdError function
-//******************************************************************************
-void ReturnCode::setEcmdError(const uint32_t i_rcValue)
-{
-    // Some HWPs perform an ecmdDataBaseBufferBase operation, then call this
-    // function then check if the ReturnCode indicates an error. Therefore only
-    // trace an error if there actually is an error
-    if (i_rcValue != 0)
-    {
-        FAPI_ERR("setEcmdError: Creating ECMD error 0x%x", i_rcValue);
-    }
-    iv_rcValue = i_rcValue;
-
-    // Forget about any associated data (this is a new error)
-    forgetData();
-
-    // Callout firmware
-    addEIProcedureCallout(ProcedureCallouts::CODE, CalloutPriorities::HIGH);
-}
-
-//******************************************************************************
-// setPlatError function
-//******************************************************************************
-void ReturnCode::setPlatError(void * i_pData,
-                              const ReturnCodes i_rcValue)
-{
-    FAPI_ERR("setPlatError: Creating PLAT error 0x%x", i_rcValue);
-    iv_rcValue = i_rcValue;
-
-    // Forget about any associated data (this is a new error)
-    forgetData();
-
-    if (i_pData)
-    {
-        getCreateReturnCodeDataRef().setPlatData(i_pData);
-    }
-}
-
-//******************************************************************************
-// _setHwpError function
-//******************************************************************************
-void ReturnCode::_setHwpError(const HwpReturnCode i_rcValue)
-{
-    FAPI_ERR("_setHwpError: Creating HWP error 0x%x", i_rcValue);
-    iv_rcValue = i_rcValue;
-
-    // Forget about any associated data (this is a new error)
-    forgetData();
-}
-
-//******************************************************************************
-// getPlatData function
-//******************************************************************************
-void * ReturnCode::getPlatData() const
-{
-    void * l_pData = NULL;
-
-    if (iv_pDataRef)
-    {
-        l_pData = iv_pDataRef->getPlatData();
-    }
-
-    return l_pData;
-}
-
-//******************************************************************************
-// releasePlatData function
-//******************************************************************************
-void * ReturnCode::releasePlatData()
-{
-    void * l_pData = NULL;
-
-    if (iv_pDataRef)
-    {
-        l_pData = iv_pDataRef->releasePlatData();
-    }
-
-    return l_pData;
-}
-
-//******************************************************************************
-// addErrorInfo function
-//******************************************************************************
-void ReturnCode::addErrorInfo(const void * const * i_pObjects,
-                              const ErrorInfoEntry * i_pEntries,
-                              const uint8_t i_count)
-{
-    for (uint32_t i = 0; i < i_count; i++)
-    {
-        ErrorInfoType l_type = static_cast<ErrorInfoType>(
-            i_pEntries[i].iv_type);
-
-        if (l_type == EI_TYPE_FFDC)
-        {
-            uint8_t l_objIndex = i_pEntries[i].ffdc.iv_ffdcObjIndex;
-            uint16_t l_size = i_pEntries[i].ffdc.iv_ffdcSize;
-            uint32_t l_ffdcId = i_pEntries[i].ffdc.iv_ffdcId;
-
-            // Get the object to add as FFDC
-            const void * l_pObject = i_pObjects[l_objIndex];
-
-            if (l_size == ReturnCodeFfdc::EI_FFDC_SIZE_ECMDDB)
-            {
-                // The FFDC is a ecmdDataBufferBase
-                const ecmdDataBufferBase * l_pDb =
-                    static_cast<const ecmdDataBufferBase *>(l_pObject);
-
-                size_t byteLength = l_pDb->getWordLength() * sizeof(uint32_t);
-                uint32_t * l_pData =
-                        reinterpret_cast<uint32_t*>(fapiMalloc(byteLength));
-
-                // getWordLength rounds up to the next 32bit boundary, ensure
-                // that after extracting, any unset bits are zero
-                l_pData[l_pDb->getWordLength() - 1] = 0;
-
-                // Deliberately not checking return code from extract
-                l_pDb->extract(l_pData, 0, l_pDb->getBitLength());
-                addEIFfdc(l_ffdcId, l_pData, (l_pDb->getWordLength() * 4));
-
-                fapiFree(l_pData);
-            }
-            else if (l_size == ReturnCodeFfdc::EI_FFDC_SIZE_TARGET)
-            {
-                // The FFDC is a fapi::Target
-                const fapi::Target * l_pTarget =
-                    static_cast<const fapi::Target *>(l_pObject);
-
-                const char * l_ecmdString = l_pTarget->toEcmdString();
-                addEIFfdc(l_ffdcId, l_ecmdString, (strlen(l_ecmdString) + 1));
-            }
-            else
-            {
-                // This is a regular FFDC data object that can be directly
-                // memcopied
-                addEIFfdc(l_ffdcId, l_pObject, l_size);
-            }
-        }
-        else if (l_type == EI_TYPE_HW_CALLOUT)
-        {
-            HwCallouts::HwCallout l_hw = static_cast<HwCallouts::HwCallout>(
-                i_pEntries[i].hw_callout.iv_hw);
-            CalloutPriorities::CalloutPriority l_pri =
-                static_cast<CalloutPriorities::CalloutPriority>(
-                    i_pEntries[i].hw_callout.iv_calloutPriority);
-
-            // A l_posIndex of 0xff indicates that it is not a clock callout
-            uint8_t l_posIndex = i_pEntries[i].hw_callout.iv_objPosIndex;
-
-            // A refIndex of 0xff indicates that there is no reference target
-            uint8_t l_refIndex = i_pEntries[i].hw_callout.iv_refObjIndex;
-
-            if (l_refIndex != 0xff)
-            {
-                const Target * l_pRefTarget = static_cast<const Target *>(
-                    i_pObjects[l_refIndex]);
-                FAPI_DBG("addErrorInfo: Adding hw callout with ref, hw:"
-                     " %d, pri: %d",
-                     l_hw, l_pri);
-
-                if (l_posIndex != 0xff)
-                {
-                    const targetPos_t * l_posObj =
-                    static_cast<const targetPos_t *>(i_pObjects[l_posIndex]);
-
-                    addEIHwCallout(l_hw, l_pri, *l_pRefTarget, *l_posObj);
-                }
-                else
-                {
-                    addEIHwCallout(l_hw, l_pri, *l_pRefTarget);
-                }
-            }
-            else
-            {
-                Target l_emptyTarget;
-                FAPI_DBG("addErrorInfo: Adding hw callout with no ref, hw:"
-                     " %d, pri: %d",
-                     l_hw, l_pri);
-
-                if (l_posIndex != 0xff)
-                {
-                    const targetPos_t * l_posObj =
-                    static_cast<const targetPos_t *>(i_pObjects[l_posIndex]);
-                    addEIHwCallout(l_hw, l_pri, l_emptyTarget, *l_posObj);
-                }
-                else
-                {
-                    addEIHwCallout(l_hw, l_pri, l_emptyTarget);
-                }
-            }
-        }
-        else if (l_type == EI_TYPE_PROCEDURE_CALLOUT)
-        {
-            ProcedureCallouts::ProcedureCallout l_proc =
-                static_cast<ProcedureCallouts::ProcedureCallout>(
-                    i_pEntries[i].proc_callout.iv_procedure);
-            CalloutPriorities::CalloutPriority l_pri =
-                static_cast<CalloutPriorities::CalloutPriority>(
-                    i_pEntries[i].proc_callout.iv_calloutPriority);
-
-            // Add the ErrorInfo
-            FAPI_DBG("addErrorInfo: Adding proc callout, proc: %d, pri: %d",
-                     l_proc, l_pri);
-            addEIProcedureCallout(l_proc, l_pri);
-        }
-        else if (l_type == EI_TYPE_BUS_CALLOUT)
-        {
-            uint8_t l_ep1Index = i_pEntries[i].bus_callout.iv_endpoint1ObjIndex;
-            uint8_t l_ep2Index = i_pEntries[i].bus_callout.iv_endpoint2ObjIndex;
-            CalloutPriorities::CalloutPriority l_pri =
-                static_cast<CalloutPriorities::CalloutPriority>(
-                    i_pEntries[i].bus_callout.iv_calloutPriority);
-
-            // Get the endpoint Targets for the bus to callout
-            const Target * l_pTarget1 = static_cast<const Target *>(
-                i_pObjects[l_ep1Index]);
-            const Target * l_pTarget2 = static_cast<const Target *>(
-                i_pObjects[l_ep2Index]);
-
-            // Add Procedure ErrorInfo section first
-            ProcedureCallouts::ProcedureCallout l_proc =
-                ProcedureCallouts::BUS_CALLOUT;
-            FAPI_DBG("addErrorInfo: Bus Callout: Adding procedure "
-                     "proc: %d, pri: %d",
-                     l_proc, l_pri);
-            addEIProcedureCallout(l_proc, l_pri);
-
-            // Update priority for bus callout (with targets):
-            // use priority 1 level down of initial callout priority
-            if (l_pri == CalloutPriorities::HIGH)
-            {
-                l_pri = CalloutPriorities::MEDIUM;
-            }
-            else
-            {
-                // Medium or low, so set to low
-                l_pri = CalloutPriorities::LOW;
-            }
-
-            // Add the Bus Callout ErrorInfo section next with updated priority
-            FAPI_DBG("addErrorInfo: Adding bus callout, pri: %d", l_pri);
-            addEIBusCallout(*l_pTarget1, *l_pTarget2, l_pri);
-        }
-        else if (l_type == EI_TYPE_CDG)
-        {
-            uint8_t l_targIndex = i_pEntries[i].target_cdg.iv_targetObjIndex;
-            uint8_t l_callout = i_pEntries[i].target_cdg.iv_callout;
-            uint8_t l_deconf = i_pEntries[i].target_cdg.iv_deconfigure;
-            uint8_t l_gard = i_pEntries[i].target_cdg.iv_gard;
-            CalloutPriorities::CalloutPriority l_pri =
-                static_cast<CalloutPriorities::CalloutPriority>(
-                    i_pEntries[i].target_cdg.iv_calloutPriority);
-
-            // Get the Target to cdg
-            const Target * l_pTarget = static_cast<const Target *>(
-                i_pObjects[l_targIndex]);
-
-            // Add the ErrorInfo
-            FAPI_DBG("addErrorInfo: Adding target cdg (%d:%d:%d), pri: %d",
-                     l_callout, l_deconf, l_gard, l_pri);
-            addEICdg(*l_pTarget, l_callout, l_deconf, l_gard, l_pri);
-        }
-        else if (l_type == EI_TYPE_CHILDREN_CDG)
-        {
-            uint8_t l_parentIndex =
-                i_pEntries[i].children_cdg.iv_parentObjIndex;
-            TargetType l_childType = static_cast<TargetType>(
-                i_pEntries[i].children_cdg.iv_childType);
-            uint8_t l_callout = i_pEntries[i].children_cdg.iv_callout;
-            uint8_t l_deconf = i_pEntries[i].children_cdg.iv_deconfigure;
-            uint8_t l_gard = i_pEntries[i].children_cdg.iv_gard;
-            uint8_t l_childPort = i_pEntries[i].children_cdg.iv_childPort;
-            uint8_t l_childNumber =
-                i_pEntries[i].children_cdg.iv_childNumber;
-            CalloutPriorities::CalloutPriority l_pri =
-                static_cast<CalloutPriorities::CalloutPriority>(
-                    i_pEntries[i].children_cdg.iv_calloutPriority);
-
-            // Get the Parent Target of the children to cdg
-            const Target * l_pParent = static_cast<const Target *>(
-                i_pObjects[l_parentIndex]);
-
-            // Add the ErrorInfo
-            FAPI_DBG("addErrorInfo: Adding children cdg (%d:%d:%d), type:"
-                     " 0x%08x, pri: %d",
-                     l_callout, l_deconf, l_gard, l_childType, l_pri);
-            addEIChildrenCdg(*l_pParent, l_childType, l_callout, l_deconf,
-                             l_gard, l_pri, l_childPort, l_childNumber );
-        }
-        else if (l_type == EI_TYPE_COLLECT_TRACE)
-        {
-            CollectTraces::CollectTrace l_traceId =
-               static_cast<CollectTraces::CollectTrace>
-                   (i_pEntries[i].collect_trace.iv_eieTraceId);
-            addEICollectTrace(l_traceId);
-        }
-        else
-        {
-            FAPI_ERR("addErrorInfo: Unrecognized EI type: %d", l_type);
-        }
-    }
-}
-
-//******************************************************************************
-// addEIFfdc function
-//******************************************************************************
-void ReturnCode::addEIFfdc(const uint32_t i_ffdcId,
-                           const void * i_pFfdc,
-                           const uint32_t i_size)
-{
-    // Create a ErrorInfoFfdc object and add it to the Error Information
-    ErrorInfoFfdc * l_pFfdc = new ErrorInfoFfdc(i_ffdcId, i_pFfdc, i_size);
-    getCreateReturnCodeDataRef().getCreateErrorInfo().
-        iv_ffdcs.push_back(l_pFfdc);
-
-    // Note: This gets deallocated in ~ErrorInfo()
-}
-
-
-//******************************************************************************
-// getErrorInfo function
-//******************************************************************************
-const ErrorInfo * ReturnCode::getErrorInfo() const
-{
-    ErrorInfo * l_pErrorInfo = NULL;
-
-    if (iv_pDataRef != NULL)
-    {
-        l_pErrorInfo = iv_pDataRef->getErrorInfo();
-    }
-
-    return l_pErrorInfo;
-}
-
-//******************************************************************************
-// getCreator function
-//******************************************************************************
-ReturnCode::returnCodeCreator ReturnCode::getCreator() const
-{
-    returnCodeCreator l_creator = CREATOR_HWP;
-
-    if ((iv_rcValue & FAPI_RC_FAPI_MASK) || (iv_rcValue & FAPI_RC_ECMD_MASK))
-    {
-        l_creator = CREATOR_FAPI;
-    }
-    else if (iv_rcValue & FAPI_RC_PLAT_MASK)
-    {
-        l_creator = CREATOR_PLAT;
-    }
-
-    return l_creator;
-}
-
-//******************************************************************************
-// getCreateReturnCodeDataRef function
-//******************************************************************************
-ReturnCodeDataRef & ReturnCode::getCreateReturnCodeDataRef()
-{
-    if (iv_pDataRef == NULL)
-    {
-        iv_pDataRef = new ReturnCodeDataRef();
-    }
-
-    return *iv_pDataRef;
-}
-
-//******************************************************************************
-// forgetData function
-//******************************************************************************
-void ReturnCode::forgetData()
-{
-    if (iv_pDataRef)
-    {
-        // Decrement the refcount
-        if (iv_pDataRef->decRefCountCheckZero())
-        {
-            // Refcount decremented to zero. No other ReturnCode points to the
-            // ReturnCodeDataRef object, delete it
-            delete iv_pDataRef;
-        }
-        iv_pDataRef = NULL;
-    }
-}
-
-//******************************************************************************
-// addEIHwCallout function
-//******************************************************************************
-void ReturnCode::addEIHwCallout(
-    const HwCallouts::HwCallout i_hw,
-    const CalloutPriorities::CalloutPriority i_priority,
-    const Target & i_refTarget,
-    const targetPos_t i_position)
-{
-    // Create an ErrorInfoHwCallout object and add it to the Error Information
-    ErrorInfoHwCallout * l_pCallout = new ErrorInfoHwCallout(
-        i_hw, i_priority, i_refTarget, i_position);
-    getCreateReturnCodeDataRef().getCreateErrorInfo().
-        iv_hwCallouts.push_back(l_pCallout);
-}
-
-//******************************************************************************
-// addEIProcedureCallout function
-//******************************************************************************
-void ReturnCode::addEIProcedureCallout(
-    const ProcedureCallouts::ProcedureCallout i_procedure,
-    const CalloutPriorities::CalloutPriority i_priority)
-{
-    // Create an ErrorInfoProcedureCallout object and add it to the Error
-    // Information
-    ErrorInfoProcedureCallout * l_pCallout = new ErrorInfoProcedureCallout(
-        i_procedure, i_priority);
-    getCreateReturnCodeDataRef().getCreateErrorInfo().
-        iv_procedureCallouts.push_back(l_pCallout);
-}
-
-//******************************************************************************
-// addEIBusCallout function
-//******************************************************************************
-void ReturnCode::addEIBusCallout(
-    const Target & i_target1,
-    const Target & i_target2,
-    const CalloutPriorities::CalloutPriority i_priority)
-{
-    // Create an ErrorInfoBusCallout object and add it to the Error Information
-    ErrorInfoBusCallout * l_pCallout = new ErrorInfoBusCallout(
-        i_target1, i_target2, i_priority);
-    getCreateReturnCodeDataRef().getCreateErrorInfo().
-        iv_busCallouts.push_back(l_pCallout);
-}
-
-//******************************************************************************
-// addEICdg function
-//******************************************************************************
-void ReturnCode::addEICdg(
-    const Target & i_target,
-    const bool i_callout,
-    const bool i_deconfigure,
-    const bool i_gard,
-    const CalloutPriorities::CalloutPriority i_priority)
-{
-    // Create an ErrorInfoCDG object and add it to the Error Information
-    ErrorInfoCDG * l_pCdg = new ErrorInfoCDG(i_target, i_callout, i_deconfigure,
-        i_gard, i_priority);
-    getCreateReturnCodeDataRef().getCreateErrorInfo().
-        iv_CDGs.push_back(l_pCdg);
-}
-
-//******************************************************************************
-// addEIChildrenCdg function
-//******************************************************************************
-void ReturnCode::addEIChildrenCdg(
-    const Target & i_parent,
-    const TargetType i_childType,
-    const bool i_callout,
-    const bool i_deconfigure,
-    const bool i_gard,
-    const CalloutPriorities::CalloutPriority i_priority,
-    const uint8_t i_childPort,
-    const uint8_t i_childNum)
-{
-    // Create an ErrorInfoChildrenCDG object and add it to the Error Information
-    ErrorInfoChildrenCDG * l_pCdg = new ErrorInfoChildrenCDG(i_parent,
-        i_childType, i_callout, i_deconfigure, i_gard, i_priority,
-        i_childPort, i_childNum);
-    getCreateReturnCodeDataRef().getCreateErrorInfo().
-        iv_childrenCDGs.push_back(l_pCdg);
-}
-
-//******************************************************************************
-// addEICollectTrace function
-//******************************************************************************
-void ReturnCode::addEICollectTrace(
-    const CollectTraces::CollectTrace i_traceId)
-{
-    // Create an ErrorInfoCollectTrace object and add it to Error Information
-    ErrorInfoCollectTrace * l_pCT = new ErrorInfoCollectTrace(i_traceId);
-    getCreateReturnCodeDataRef().getCreateErrorInfo().
-        iv_traces.push_back(l_pCT);
-}
-
-}
diff --git a/src/usr/hwpf/fapi/fapiReturnCodeDataRef.C b/src/usr/hwpf/fapi/fapiReturnCodeDataRef.C
deleted file mode 100644
index 026a4ca09..000000000
--- a/src/usr/hwpf/fapi/fapiReturnCodeDataRef.C
+++ /dev/null
@@ -1,180 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/fapi/fapiReturnCodeDataRef.C $                   */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2011,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: fapiReturnCodeDataRef.C,v 1.8 2013/10/15 13:13:37 dcrowell Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/hwpf/working/fapi/fapiReturnCodeDataRef.C,v $
-
-/**
- *  @file fapiReturnCodeDataRef.C
- *
- *  @brief Implements the FAPI part of the ReturnCodeDataRef class.
- */
-
-/*
- * Change Log ******************************************************************
- * Flag     Defect/Feature  User        Date        Description
- * ------   --------------  ----------  ----------- ----------------------------
- *                          mjjones     04/13/2011  Created.
- *                          camvanng	05/31/2011  Added debug traces
- *                          mjjones     06/30/2011  Added #include
- *                          mjjones     07/05/2011  Removed const from data
- *                          mjjones     07/25/2011  Added support for FFDC
- *                          mjjones     09/22/2011  Added support for Error Info
- *                          mjjones     07/11/2012  Removed some tracing
- */
-
-#include <string.h>
-#include <fapiReturnCodeDataRef.H>
-#include <fapiUtil.H>
-#include <fapiPlatTrace.H>
-
-namespace fapi
-{
-
-//******************************************************************************
-// Constructor
-//******************************************************************************
-ReturnCodeDataRef::ReturnCodeDataRef()
-: iv_refCount(1),
-  iv_pPlatData(NULL),
-  iv_pErrorInfo(NULL)
-{
-
-}
-
-//******************************************************************************
-// Destructor
-//******************************************************************************
-ReturnCodeDataRef::~ReturnCodeDataRef()
-{
-    if (iv_refCount != 0)
-    {
-        FAPI_ERR("ReturnCodeDataRef. Bug. Destruct with refcount: %d",
-                 iv_refCount);
-        fapiAssert(false);
-    }
-
-    deletePlatData();
-    delete iv_pErrorInfo;
-    iv_pErrorInfo = NULL;
-}
-
-//******************************************************************************
-// incRefCount function
-//******************************************************************************
-void ReturnCodeDataRef::incRefCount()
-{
-    iv_refCount++;
-}
-
-//******************************************************************************
-// decRefCountCheckZero function
-//******************************************************************************
-bool ReturnCodeDataRef::decRefCountCheckZero()
-{
-    if (iv_refCount == 0)
-    {
-        FAPI_ERR("ReturnCodeDataRef. Bug. Dec with zero refcount");
-        fapiAssert(false);
-    }
-    else
-    {
-        iv_refCount--;
-    }
-    return (iv_refCount == 0);
-}
-
-//******************************************************************************
-// setPlatData function
-//******************************************************************************
-void ReturnCodeDataRef::setPlatData(void * i_pPlatData)
-{
-    // Delete any current PlatData
-    if (iv_pPlatData)
-    {
-        FAPI_ERR("ReturnCodeDataRef. setPlatData when existing data");
-        deletePlatData();
-    }
-
-    iv_pPlatData = i_pPlatData;
-}
-
-//******************************************************************************
-// getPlatData function
-//******************************************************************************
-void * ReturnCodeDataRef::getPlatData() const
-{
-    return iv_pPlatData;
-}
-
-//******************************************************************************
-// releasePlatData function
-//******************************************************************************
-void * ReturnCodeDataRef::releasePlatData()
-{
-    void * l_pPlatData = iv_pPlatData;
-    iv_pPlatData = NULL;
-    return l_pPlatData;
-}
-
-//******************************************************************************
-// getErrorInfo function
-//******************************************************************************
-ErrorInfo * ReturnCodeDataRef::getErrorInfo()
-{
-    return iv_pErrorInfo;
-}
-
-//******************************************************************************
-// getCreateErrorInfo function
-//******************************************************************************
-ErrorInfo & ReturnCodeDataRef::getCreateErrorInfo()
-{
-    if (iv_pErrorInfo == NULL)
-    {
-        iv_pErrorInfo = new ErrorInfo();
-    }
-
-    return *iv_pErrorInfo;
-}
-
-//******************************************************************************
-// Overload Operator new function
-//******************************************************************************
-#ifdef FAPI_CUSTOM_MALLOC
-void * ReturnCodeDataRef::operator new(size_t i_sz)
-{
-    return fapiMalloc(i_sz);
-}
-#endif
-
-//******************************************************************************
-// Overload Operator delete function
-//******************************************************************************
-#ifdef FAPI_CUSTOM_MALLOC
-void ReturnCodeDataRef::operator delete(void * i_ptr)
-{
-    fapiFree(i_ptr);
-}
-#endif
-
-}
diff --git a/src/usr/hwpf/fapi/fapiTarget.C b/src/usr/hwpf/fapi/fapiTarget.C
deleted file mode 100644
index bd948a063..000000000
--- a/src/usr/hwpf/fapi/fapiTarget.C
+++ /dev/null
@@ -1,191 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/fapi/fapiTarget.C $                              */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2011,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: fapiTarget.C,v 1.10 2014/02/26 14:51:07 mjjones Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/hwpf/working/fapi/fapiTarget.C,v $
-
-/**
- *  @file fapiTarget.C
- *
- *  @brief Implements the FAPI part of the Target class.
- */
-
-/*
- * Change Log ******************************************************************
- * Flag     Defect/Feature  User        Date        Description
- * ------   --------------  ----------  ----------- ----------------------------
- *                          mjjones     04/13/2011  Created. Based on Hlava prototype
- *                          mjjones     07/05/2011  Removed const from handle
- *                          mjjones     09/12/2011  Added isChip and isChiplet
- *                          mjjones     02/07/2012  Remove MBS_CHIPLET
- *                                                  Add XBUS_ENDPOINT ABUS_ENDPOINT
- *                          mjjones     02/21/2012  Add high performance toEcmdString
- *                          mjjones     07/11/2012  Clear iv_pEcmdString on set
- *                          mjjones     02/24/2014  Add isChip/Chiplet using types
- *                                                  Add isPhysParentChild
- */
-
-#include <fapiTarget.H>
-#include <fapiUtil.H>
-
-namespace fapi
-{
-
-//******************************************************************************
-// Default Constructor
-//******************************************************************************
-Target::Target() :
-    iv_type(TARGET_TYPE_NONE), iv_pHandle(NULL), iv_pEcmdString(NULL)
-{
-
-}
-
-//******************************************************************************
-// Constructor.
-//******************************************************************************
-Target::Target(const TargetType i_type,
-               void * i_pHandle) :
-    iv_type(i_type), iv_pHandle(i_pHandle), iv_pEcmdString(NULL)
-{
-
-}
-
-//******************************************************************************
-// Copy Constructor
-//******************************************************************************
-Target::Target(const Target & i_right) :
-    iv_type(i_right.iv_type), iv_pEcmdString(NULL)
-{
-    (void) copyHandle(i_right);
-}
-
-//******************************************************************************
-// Destructor
-//******************************************************************************
-Target::~Target()
-{
-    (void) deleteHandle();
-    fapiFree(iv_pEcmdString);
-}
-
-//******************************************************************************
-// Assignment Operator
-//******************************************************************************
-Target & Target::operator=(const Target & i_right)
-{
-    // Test for self assignment
-    if (this != &i_right)
-    {
-        iv_type = i_right.iv_type;
-        (void) copyHandle(i_right);
-        fapiFree(iv_pEcmdString);
-        iv_pEcmdString = NULL;
-    }
-    return *this;
-}
-
-//******************************************************************************
-// Equality Comparison Operator
-//******************************************************************************
-bool Target::operator==(const Target & i_right) const
-{
-    bool l_equal = false;
-
-    if (iv_type == i_right.iv_type)
-    {
-        l_equal = compareHandle(i_right);
-    }
-
-    return l_equal;
-}
-
-//******************************************************************************
-// Inequality Comparison Operator
-//******************************************************************************
-bool Target::operator!=(const Target & i_right) const
-{
-    // Determine inequality by calling the equality comparison operator
-    return (!(*this == i_right));
-}
-
-//******************************************************************************
-// Set the handle.
-//******************************************************************************
-void Target::set(void * i_pHandle)
-{
-    iv_pHandle = i_pHandle;
-    fapiFree(iv_pEcmdString);
-    iv_pEcmdString = NULL;
-}
-
-//******************************************************************************
-// Is a target type a chip?
-//******************************************************************************
-bool Target::isChip(const TargetType i_type)
-{
-    return ((i_type & (TARGET_TYPE_PROC_CHIP | TARGET_TYPE_MEMBUF_CHIP)) != 0);
-}
-
-//******************************************************************************
-// Is a target type a chiplet?
-//******************************************************************************
-bool Target::isChiplet(const TargetType i_type)
-{
-    return ((i_type & (TARGET_TYPE_EX_CHIPLET |
-                       TARGET_TYPE_MBA_CHIPLET |
-                       TARGET_TYPE_MCS_CHIPLET |
-                       TARGET_TYPE_XBUS_ENDPOINT |
-                       TARGET_TYPE_ABUS_ENDPOINT |
-                       TARGET_TYPE_L4 )) != 0);
-}
-
-//******************************************************************************
-// Is a target type pair a physical parent/child?
-//******************************************************************************
-bool Target::isPhysParentChild(const TargetType i_parentType,
-                               const TargetType i_childType)
-{
-    bool l_result = false;
-
-    if (i_parentType == TARGET_TYPE_PROC_CHIP)
-    {
-        if ((i_childType == TARGET_TYPE_EX_CHIPLET) ||
-            (i_childType == TARGET_TYPE_MCS_CHIPLET) ||
-            (i_childType == TARGET_TYPE_XBUS_ENDPOINT) ||
-            (i_childType == TARGET_TYPE_ABUS_ENDPOINT))
-        {
-            l_result = true;
-        }
-    }
-    else if (i_parentType == TARGET_TYPE_MEMBUF_CHIP)
-    {
-        if ((i_childType == TARGET_TYPE_MBA_CHIPLET) ||
-            (i_childType == TARGET_TYPE_L4))
-        {
-            l_result = true;
-        }
-    }
-
-    return l_result;
-}
-
-}
diff --git a/src/usr/hwpf/fapi/makefile b/src/usr/hwpf/fapi/makefile
deleted file mode 100644
index c94398448..000000000
--- a/src/usr/hwpf/fapi/makefile
+++ /dev/null
@@ -1,32 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/fapi/makefile $
-#
-# OpenPOWER HostBoot Project
-#
-# COPYRIGHT International Business Machines Corp. 2011,2014
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-ROOTPATH = ../../../..
-MODULE = fapi
-
-SUBDIRS += runtime.d
-
-include fapi.mk
-
-include ${ROOTPATH}/config.mk
-
-vpath %.C ${GENDIR}
diff --git a/src/usr/hwpf/fapi/runtime/makefile b/src/usr/hwpf/fapi/runtime/makefile
deleted file mode 100644
index b4e2b470b..000000000
--- a/src/usr/hwpf/fapi/runtime/makefile
+++ /dev/null
@@ -1,32 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/fapi/runtime/makefile $
-#
-# OpenPOWER HostBoot Project
-#
-# COPYRIGHT International Business Machines Corp. 2011,2014
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-ROOTPATH = ../../../../..
-MODULE = fapi_rt
-VPATH += ../
-HOSTBOOT_RUNTIME = 1
-
-include ../fapi.mk
-
-include ${ROOTPATH}/config.mk
-
-vpath %.C ${GENDIR}
diff --git a/src/usr/hwpf/hwp/L2_L3_attributes.xml b/src/usr/hwpf/hwp/L2_L3_attributes.xml
deleted file mode 100644
index d6eaf8fea..000000000
--- a/src/usr/hwpf/hwp/L2_L3_attributes.xml
+++ /dev/null
@@ -1,122 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/L2_L3_attributes.xml $                       -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!--
-    XML file specifying HWPF attributes.
-    These are L2/L3 non-platInit attributes associated with proc EX chiplets
--->
-
-
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_L2_R_T0_EPS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>L2 tier0 read epsilon register value.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_L2_R_T1_EPS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>L2 tier1 read epsilon register value.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_L2_R_T2_EPS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>L2 tier2 read epsilon register value.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_L2_FORCE_R_T2_EPS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>L2 force tier2 read epsilon protect (all tiers).</description>
-    <valueType>uint8</valueType>
-    <enum>OFF = 0x00, ON = 0x01</enum>
-    <writeable/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_L2_W_EPS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>L2 write epsilon register value.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_L3_R_T0_EPS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>L3 tier0 read epsilon register value.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_L3_R_T1_EPS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>L3 tier1 read epsilon register value.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_L3_R_T2_EPS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>L3 tier2 read epsilon register value.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_L3_FORCE_R_T2_EPS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>L3 force tier2 read epsilon protect (all tiers).</description>
-    <valueType>uint8</valueType>
-    <enum>OFF = 0x00, ON = 0x01</enum>
-    <writeable/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_L3_W_EPS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>L3 write epsilon register value.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <persistRuntime/>
-  </attribute>
-</attributes>
diff --git a/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_adu_utils_errors.xml b/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_adu_utils_errors.xml
deleted file mode 100644
index 444b730ce..000000000
--- a/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_adu_utils_errors.xml
+++ /dev/null
@@ -1,62 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_adu_utils_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_adu_utils_errors.xml,v 1.5 2014/02/12 05:01:56 jmcgill Exp $ -->
-<!-- Error definitions for proc_adu_utils library -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_ADU_UTILS_INVALID_LOCK_ATTEMPTS</rc>
-    <ffdc>TARGET</ffdc>
-    <ffdc>ATTEMPTS</ffdc>
-    <description>Invalid number of lock manipulation attempts presented to proc_adu_utils library routine.</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_ADU_UTILS_INVALID_LOCK_OPERATION</rc>
-    <ffdc>TARGET</ffdc>
-    <ffdc>OPERATION</ffdc>
-    <description>Invalid lock operation type presented to proc_adu_utils library routine.</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_ADU_UTILS_INVALID_FBC_OP</rc>
-    <ffdc>TARGET</ffdc>
-    <ffdc>ADDRESS</ffdc>
-    <ffdc>FBC_OP</ffdc>
-    <ffdc>FBC_OP_HP_CTL</ffdc>
-    <description>Invalid fabric op programming parameters presented to proc_adu_utils library routine.</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_errors.xml b/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_errors.xml
deleted file mode 100644
index 451f52481..000000000
--- a/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_errors.xml
+++ /dev/null
@@ -1,372 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_build_smp_errors.xml,v 1.10 2014/03/27 03:36:41 jmcgill Exp $ -->
-<!-- Error definitions for proc_build_smp -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_CORE_FREQ_RANGE_ERR</rc>
-    <description>Invalid relationship between ceiling/nominal/floor core frequency attributes.</description>
-    <ffdc>FREQ_CORE_CEILING</ffdc>
-    <ffdc>FREQ_CORE_NOM</ffdc>
-    <ffdc>FREQ_CORE_FLOOR</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_CORE_FLOOR_FREQ_RATIO_ERR</rc>
-    <description>Unsupported core floor to PB frequency ratio.</description>
-    <ffdc>FREQ_PB</ffdc>
-    <ffdc>FREQ_CORE_FLOOR</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_CORE_CEILING_FREQ_RATIO_ERR</rc>
-    <description>Unsupported core ceiling to PB frequency ratio.</description>
-    <ffdc>FREQ_PB</ffdc>
-    <ffdc>FREQ_CORE_CEILING</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_INVALID_OPERATION_ERR</rc>
-    <description>Unsupported SMP build operation presented.</description>
-    <ffdc>OP</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_MASTER_DESIGNATION_ERR</rc>
-    <description>Node or system master chip designation error.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>OP</ffdc>
-    <ffdc>MASTER_CHIP_SYS_CURR</ffdc>
-    <ffdc>MASTER_CHIP_NODE_CURR</ffdc>
-    <ffdc>MASTER_CHIP_SYS_NEXT</ffdc>
-    <ffdc>MASTER_CHIP_NODE_NEXT</ffdc>
-    <ffdc>SYS_RECONFIG_MASTER_SET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_NODE_ADD_INTERNAL_ERR</rc>
-    <description>Internal Error.  Error encountered adding node to SMP structure.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>NODE_ID</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_DUPLICATE_FABRIC_ID_ERR</rc>
-    <description>Multiple chips found with identifcal fabric node/chip ID attribute values.</description>
-    <ffdc>TARGET1</ffdc>
-    <ffdc>TARGET2</ffdc>
-    <ffdc>NODE_ID</ffdc>
-    <ffdc>CHIP_ID</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_NO_MASTER_SPECIFIED_ERR</rc>
-    <description>Input parameters do not specify a new fabric system master.</description>
-    <ffdc>OP</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_ADU_STATUS_MISMATCH</rc>
-    <description>Status mismatch detected on ADU operation executed for SMP configuration.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>ADU_STATUS_DATA</ffdc>
-    <ffdc>ADU_NUM_POLLS</ffdc>
-    <ffdc>FFDC_VALID</ffdc>
-    <ffdc>NUM_CHIPS</ffdc>
-    <ffdc>CHIP_IDS</ffdc>
-    <ffdc>PB_MODE_CENT_DATA</ffdc>
-    <ffdc>PB_HP_MODE_NEXT_CENT_DATA</ffdc>
-    <ffdc>PB_HP_MODE_CURR_CENT_DATA</ffdc>
-    <ffdc>PB_HPX_MODE_NEXT_CENT_DATA</ffdc>
-    <ffdc>PB_HPX_MODE_CURR_CENT_DATA</ffdc>
-    <ffdc>X_GP0_DATA</ffdc>
-    <ffdc>PB_X_MODE_DATA</ffdc>
-    <ffdc>A_GP0_DATA</ffdc>
-    <ffdc>ADU_IOS_LINK_EN_DATA</ffdc>
-    <ffdc>PB_A_MODE_DATA</ffdc>
-    <ffdc>ADU_PMISC_MODE_DATA</ffdc>
-    <callout>
-      <procedure>LVL_SUPPORT</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_EPSILON_RANGE_ERR</rc>
-    <description>Target epsilon value exceeds maximum value supported by HW capabilities.</description>
-    <ffdc>VALUE</ffdc>
-    <ffdc>MAX_HW_VALUE</ffdc>
-    <ffdc>UNIT</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_EPSILON_INVALID_TABLE_ERR</rc>
-    <description>Invalid epsilon table type or content detected.</description>
-    <ffdc>TABLE_TYPE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_INVALID_AGGREGATE_CONFIG_ERR</rc>
-    <description>Invalid aggregate link configuration detected.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>X_NOT_A</ffdc>
-    <ffdc>ALLOW_AGGREGATE</ffdc>
-    <ffdc>AGGREGATE_DEST_ID1</ffdc>
-    <ffdc>AGGREGATE_DEST_ID2</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_X_CMD_RATE_ERR</rc>
-    <description>Target link command rate value is out of range.</description>
-    <ffdc>FREQ_PB</ffdc>
-    <ffdc>FREQ_X</ffdc>
-    <ffdc>X_IS_8B</ffdc>
-    <ffdc>X_AGGREGATE</ffdc>
-    <ffdc>N</ffdc>
-    <ffdc>D</ffdc>
-    <ffdc>CMD_RATE</ffdc>
-    <ffdc>MIN_CMD_RATE</ffdc>
-    <ffdc>MAX_CMD_RATE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_A_CMD_RATE_ERR</rc>
-    <description>Target link command rate value is out of range.</description>
-    <ffdc>FREQ_PB</ffdc>
-    <ffdc>FREQ_A</ffdc>
-    <ffdc>A_OW_PACK</ffdc>
-    <ffdc>A_OW_PACK_PRIORITY</ffdc>
-    <ffdc>A_AGGREGATE</ffdc>
-    <ffdc>N</ffdc>
-    <ffdc>D</ffdc>
-    <ffdc>CMD_RATE</ffdc>
-    <ffdc>MIN_CMD_RATE</ffdc>
-    <ffdc>MAX_CMD_RATE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_F_CMD_RATE_ERR</rc>
-    <description>Target link command rate value is out of range.</description>
-    <ffdc>FREQ_PB</ffdc>
-    <ffdc>FREQ_F</ffdc>
-    <ffdc>F_OW_PACK</ffdc>
-    <ffdc>F_OW_PACK_PRIORITY</ffdc>
-    <ffdc>F_AGGREGATE</ffdc>
-    <ffdc>N</ffdc>
-    <ffdc>D</ffdc>
-    <ffdc>CMD_RATE</ffdc>
-    <ffdc>MIN_CMD_RATE</ffdc>
-    <ffdc>MAX_CMD_RATE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_HOTPLUG_SHADOW_ERR</rc>
-    <description>Inconsistent state in hotplug (CURR) shadow copies.</description>
-    <ffdc>ADDRESS0</ffdc>
-    <ffdc>ADDRESS1</ffdc>
-    <ffdc>DATA0</ffdc>
-    <ffdc>DATA1</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_AX_PARTIAL_GOOD_ERR</rc>
-    <description>A/X bus partial good attribute state does not allow for action on target.</description>
-    <ffdc>SOURCE_CHIP_TARGET</ffdc>
-    <ffdc>CHIPLET_ID</ffdc>
-    <ffdc>SOURCE_LINK_ID</ffdc>
-    <ffdc>REGION_ENABLED</ffdc>
-    <ffdc>REGIONS_TO_ENABLE</ffdc>
-    <ffdc>REGIONS_TO_ENABLE_VALID</ffdc>
-    <ffdc>DEST_LINK_TARGET</ffdc>
-    <callout>
-      <target>SOURCE_CHIP_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>MEDIUM</priority>
-    </callout>
-    <deconfigure>
-      <target>SOURCE_CHIP_TARGET</target>
-    </deconfigure>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_LINK_TARGET_TYPE_ERR</rc>
-    <description>Invalid destination link target type detected in input parameters.</description>
-    <ffdc>SOURCE_CHIP_TARGET</ffdc>
-    <ffdc>SOURCE_LINK_ID</ffdc>
-    <ffdc>DEST_LINK_TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_PCIE_PARTIAL_GOOD_ERR</rc>
-    <description>PCIE partial good attribute state does not allow for action on target.</description>
-    <ffdc>SOURCE_CHIP_TARGET</ffdc>
-    <ffdc>CHIPLET_ID</ffdc>
-    <ffdc>SOURCE_LINK_ID</ffdc>
-    <ffdc>REGION_ENABLED</ffdc>
-    <ffdc>REGIONS_TO_ENABLE</ffdc>
-    <ffdc>REGIONS_TO_ENABLE_VALID</ffdc>
-    <ffdc>DEST_NODE_ID</ffdc>
-    <callout>
-      <target>SOURCE_CHIP_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>MEDIUM</priority>
-    </callout>
-    <deconfigure>
-      <target>SOURCE_CHIP_TARGET</target>
-    </deconfigure>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_CORE_CEILING_RATIO_ERR</rc>
-    <description>Unsupported core ceiling frequency enumerated value.</description>
-    <ffdc>FREQ_PB</ffdc>
-    <ffdc>FREQ_CORE_CEILING</ffdc>
-    <ffdc>CORE_CEILING_RATIO</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_CORE_FLOOR_RATIO_ERR</rc>
-    <description>Unsupported core floor frequency enumerated value.</description>
-    <ffdc>FREQ_PB</ffdc>
-    <ffdc>FREQ_CORE_FLOOR</ffdc>
-    <ffdc>CORE_FLOOR_RATIO</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_INVALID_GROUP_SIZE_ERR</rc>
-    <description>Invalid chips per group configuration detected.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>GROUP_SIZE</ffdc>
-    <ffdc>NODE_ID</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_PACING_RATE_TABLE_ERR</rc>
-    <description>Command rate pacing table lookup error.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>GROUP_SIZE</ffdc>
-    <ffdc>NODE_ID</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_BUILD_SMP_INVALID_TOPOLOGY</rc>
-    <description>Invalid fabric topology specified by input parameters.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>A_CONNECTIONS_OK</ffdc>
-    <ffdc>A_CONNECTED_NODE_IDS</ffdc>
-    <ffdc>X_CONNECTIONS_OK</ffdc>
-    <ffdc>X_CONNECTED_CHIP_IDS</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_fab_smp_fabric_attributes.xml b/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_fab_smp_fabric_attributes.xml
deleted file mode 100644
index cdd0df1fa..000000000
--- a/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_fab_smp_fabric_attributes.xml
+++ /dev/null
@@ -1,93 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_fab_smp_fabric_attributes.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_fab_smp_fabric_attributes.xml,v 1.5 2013/09/19 18:50:18 cswenson Exp $ -->
-<!-- proc_fab_smp_fabric_attributes.xml -->
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FREQ_CORE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      firmware notes:
-        Nominal processor's core DPLL frequency (MHz).
-        Default value provided by Machine Readable Workbook.
-        This attribute is the current value.
-    </description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_EPS_GB_PERCENTAGE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      firmware notes:
-        Guardband percentage to apply to baseline epsilon values
-    </description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_EPS_GB_DIRECTION</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      firmware notes:
-        Direction to apply guardband margin (positive/negative)
-    </description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <enum>POSITIVE = 0x0, NEGATIVE = 0x1</enum>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_FABRIC_ASYNC_SAFE_MODE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      firmware notes:
-        Set to force all asynchronous boundary crossings into safe mode.
-    </description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <enum>PERFORMANCE_MODE = 0x0, SAFE_MODE = 0x1</enum>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_NOT_F_LINK</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      firmware notes:
-        Set IPL time mux/switch between PCIE PHB/F link function
-        (one per foreign link)
-    </description>
-    <valueType>uint8</valueType>
-    <array>2</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr_errors.xml
deleted file mode 100644
index e7086da78..000000000
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr_errors.xml
+++ /dev/null
@@ -1,38 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_block_wakeup_intr_errors.xml,v 1.3 2014/02/27 03:45:05 stillgs Exp $ -->
-<!-- Error definitions for p8_block_wakeup_intr procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_BLKWKUP_CODE_BAD_OP</rc>
-    <description>An invalid operation (eg besides Set or Clear ENUM) was passed to p8_block_wakeup_intr</description>
-    <ffdc>EX_TARGET</ffdc>
-    <ffdc>OPERATION</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_errors.xml
deleted file mode 100644
index 6086a827d..000000000
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_errors.xml
+++ /dev/null
@@ -1,98 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_pfet_errors.xml,v 1.5 2014/02/25 04:07:23 stillgs Exp $ -->
-<!-- Error definitions for p8_pfet_init and p8_pfet_lib procedures -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PMPROC_PFETLIB_BAD_DOMAIN</rc>
-    <description>Invalid domain value passed to p8_pfet_control.</description>
-    <ffdc>EX</ffdc>
-    <ffdc>DOMAIN</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PMPROC_PFETLIB_BAD_OP</rc>
-    <description>Invalid operation value passed to p8_pfet_control.</description>
-    <ffdc>EX</ffdc>
-    <ffdc>DOMAIN</ffdc>
-    <ffdc>OPERATION</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PMPROC_PFETLIB_RAIL_ON</rc>
-    <description>Error returned turning PFETs on in p8_pfet_control.</description>
-    <ffdc>EX</ffdc>
-    <ffdc>DOMAIN</ffdc>
-    <ffdc>OPERATION</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PMPROC_PFETLIB_RAIL_OFF</rc>
-    <description>Error returned turning PFETs off in p8_pfet_control.</description>
-    <ffdc>EX</ffdc>
-    <ffdc>DOMAIN</ffdc>
-    <ffdc>OPERATION</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PFETLIB_TIMEOUT</rc>
-    <description>
-        PFET sequencer timed out in p8_pfet_control.
-        Bad EX Chiplet
-    </description>
-    <ffdc>ADDRESS</ffdc>
-    <ffdc>PFETCONTROLVALUE</ffdc>
-    <ffdc>DOMAIN</ffdc>
-    <callout>
-      <childTargets>
-        <parent>PROC_CHIP_IN_ERROR</parent>
-        <childType>TARGET_TYPE_EX_CHIPLET</childType>
-        <childNumber>EX_NUMBER_IN_ERROR</childNumber>
-      </childTargets>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <childTargets>
-        <parent>PROC_CHIP_IN_ERROR</parent>
-        <childType>TARGET_TYPE_EX_CHIPLET</childType>
-        <childNumber>EX_NUMBER_IN_ERROR</childNumber>
-      </childTargets>
-    </deconfigure>
-    <gard>
-      <childTargets>
-        <parent>PROC_CHIP_IN_ERROR</parent>
-        <childType>TARGET_TYPE_EX_CHIPLET</childType>
-        <childNumber>EX_NUMBER_IN_ERROR</childNumber>
-      </childTargets>
-    </gard>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init_errors.xml
deleted file mode 100644
index a7fe8ac7b..000000000
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init_errors.xml
+++ /dev/null
@@ -1,37 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_pfet_init_errors.xml,v 1.2 2013/05/23 18:44:21 stillgs Exp $ -->
-<!-- Error definitions for p8_pfet_init procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PFET_CODE_BAD_MODE</rc>
-    <description>Unknown mode passed to p8_pfet_init</description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PFET_GET_ATTR</rc>
-    <description>p8_pfet_init could not get an attribute.</description>   
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup_errors.xml
deleted file mode 100644
index 7b675b029..000000000
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup_errors.xml
+++ /dev/null
@@ -1,29 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_pmc_deconfig_setup_errors.xml,v 1.3 2013/10/15 17:36:08 dcrowell Exp $ -->
-<!-- Error definitions for p8_pmc_deconfig_setup procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <!-- No errors yet, keeping as placeholder -->
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml
deleted file mode 100644
index f567b6385..000000000
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml
+++ /dev/null
@@ -1,57 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_poreslw_errors.xml,v 1.3 2013/09/25 22:28:06 stillgs Exp $ -->
-<!-- Error definitions for p8_poreslw procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PORESLW_CODE_BAD_TBA</rc>
-    <description>Invalid Table Base Address value passed to p8_poreslw_init.</description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_SLW_RESET_TIMEOUT</rc>
-    <description>SLW reset failed in p8_poreslw_init.</description>
-    <ffdc>POLLCOUNT</ffdc>
-    <ffdc>MAXPOLLS</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_SLW_REGISTERS</id>
-      <id>REG_FFDC_PROC_SLW_FIR_REGISTERS</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>CHIP</target>     
-      <priority>HIGH</priority>
-    </callout>    
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PORESLW_CODE_BAD_MODE</rc>
-    <description>Unknown mode passed to p8_poreslw_init.</description>
-    <ffdc>IMODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar_errors.xml
deleted file mode 100644
index f410e9ea0..000000000
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar_errors.xml
+++ /dev/null
@@ -1,171 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_set_pore_bar_errors.xml,v 1.7 2014/03/07 14:32:52 stillgs Exp $ -->
-<!-- Error definitions for p8_set_pore_bar procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_POREBAR_IMAGE_BRANCH_VALUE_ERROR</rc>
-    <description>XIP access of branch table failed in p8_set_pore_bar</description>
-    <ffdc>CHIP</ffdc>
-    <ffdc>IMAGEADDR</ffdc>
-    <ffdc>XIPRC</ffdc>
-    <ffdc>BRANCHTABLEADDRESS</ffdc>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-    
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_POREBAR_LOC_ERROR</rc>
-    <description>Invalid image location passed to p8_set_pore_bar</description>
-    <ffdc>CHIP</ffdc>
-    <ffdc>MEMLOC</ffdc>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_POREBAR_PBABAR_ERROR</rc>
-    <description>PBA BAR image location passed to p8_set_pore_bar</description>
-        <ffdc>CHIP</ffdc>
-    <ffdc>MEMBAR</ffdc>
-    <ffdc>REGIONMASKEDADDR</ffdc>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-    <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PBA_SLVRST_TIMED_OUT</rc>
-    <description>PBA Slave Reset timed out in p8_set_pore_bar</description>
-    <ffdc>POLLCOUNT</ffdc>
-    <ffdc>POLLVALUE</ffdc>
-    <ffdc>PSR</ffdc>
-    <ffdc>SLVID</ffdc>
-    <callout>
-      <target>CHIP</target>     
-      <priority>HIGH</priority>
-    </callout>    
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_POREBAR_XIP_IMAGE_SIZE_ERROR</rc>
-    <description>Get of XIP Image size failed in p8_set_pore_bar</description>
-    <ffdc>CHIP</ffdc>
-    <ffdc>IMAGEADDR</ffdc>
-    <ffdc>XIPRC</ffdc>
-    <ffdc>IMAGESIZE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_POREBAR_IMAGE_SIZE_ERROR</rc>
-    <description>Image address plus image size overflows PBA region in p8_set_pore_bar</description>
-    <ffdc>IMAGEADDR</ffdc>
-    <ffdc>XIPRC</ffdc>
-    <ffdc>BRANCHTABLEADDRESS</ffdc>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_POREBAR_SIZE0_ERROR</rc>
-    <description>An image  size of 0 was specified to p8_set_pore_bar but the BAR was not 0</description>
-    <ffdc>CHIP</ffdc>
-    <ffdc>IMAGEADDR</ffdc>
-    <ffdc>MEMSIZE</ffdc>
-    <ffdc>MEMBAR</ffdc>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_POREBAR_IMAGE_PLACEMENT_ERROR</rc>
-    <description>Image address plus image size overflows PBA region in p8_set_pore_bar</description>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_POREBAR_IMAGE_ADDR_ERROR</rc>
-    <description>Find of XIP of slw_control_vector failed in p8_set_pore_bar</description>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_POREBAR_IMAGE_SLW_CONTROL_VECTOR_ERROR</rc>
-    <description>XIP Find of slw_control_vector failed in p8_set_pore_bar</description>
-    <ffdc>CHIP</ffdc>
-    <ffdc>IMAGEADDR</ffdc>
-    <ffdc>XIPRC</ffdc>
-     <ffdc>SLWCONTROLVECTOR</ffdc>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_POREBAR_IMAGE_SLW_DEEP_WINKLE_EXIT_HALT_ERROR</rc>
-    <description>XIP Find of slw_deep_winkle_exit_good_halt failed in p8_set_pore_bar</description>
-    <ffdc>CHIP</ffdc>
-    <ffdc>IMAGEADDR</ffdc>
-    <ffdc>XIPRC</ffdc>
-     <ffdc>SLWDEEPWINKLEEXITHALT</ffdc>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_POREBAR_IMAGE_SLW_DEEP_SLEEP_EXIT_HALT_ERROR</rc>
-    <description>XIP Find of slw_deep_sleep_exit_good_halt failed in p8_set_pore_bar</description>
-    <ffdc>CHIP</ffdc>
-    <ffdc>IMAGEADDR</ffdc>
-    <ffdc>XIPRC</ffdc>
-     <ffdc>SLWDEEPSLEEPEXITHALT</ffdc>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pba_bar_config_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pba_bar_config_errors.xml
deleted file mode 100644
index dae9e5050..000000000
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pba_bar_config_errors.xml
+++ /dev/null
@@ -1,82 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pba_bar_config_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_pba_bar_config_errors.xml,v 1.4 2014/03/03 23:43:34 stillgs Exp $ -->
-<!-- Error definitions for proc_pba_bar_config procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_PBA_BAR_SCOPE_OUT_OF_RANGE</rc>
-    <description>pba bar scope  out of range, allowed is 0 to 7</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-    <ffdc>i_index</ffdc>
-    <ffdc>i_pba_bar_addr</ffdc>
-    <ffdc>i_pba_bar_size</ffdc>
-    <ffdc>i_pba_cmd_scope</ffdc>
-    <ffdc>exp_PBA_CMD_SCOPE_FOREIGN1</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_PBA_ADDR_OUT_OF_RANGE</rc>
-    <description>pba bar scope  out of range, allowed is 0 to 7</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-    <ffdc>i_index</ffdc>
-    <ffdc>i_pba_bar_addr</ffdc>
-    <ffdc>i_pba_bar_size</ffdc>
-    <ffdc>i_pba_cmd_scope</ffdc>
-    <ffdc>exp_BAR_ADDR_RANGECHECK_HIGH</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_PBA_ADDR_ALIGNMENT_ERROR</rc>
-    <description>pba BAR must be on a 1MB boundary</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-    <ffdc>i_index</ffdc>
-    <ffdc>i_pba_bar_addr</ffdc>
-    <ffdc>i_pba_bar_size</ffdc>
-    <ffdc>i_pba_cmd_scope</ffdc>
-    <ffdc>exp_BAR_ADDR_RANGECHECK_LOW</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_PBA_BAR_SIZE_INVALID</rc>
-    <description>Non-zero PBA BAR defined with region size of 0. Size must be 1MB or greater</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-    <ffdc>i_index</ffdc>
-    <ffdc>i_pba_bar_addr</ffdc>
-    <ffdc>i_pba_bar_size</ffdc>
-    <ffdc>i_pba_cmd_scope</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build_errors.xml
deleted file mode 100644
index 8dff7aa56..000000000
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build_errors.xml
+++ /dev/null
@@ -1,326 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2014                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_slw_build_errors.xml,v 1.10 2014/07/03 19:53:58 jmcgill Exp $   -->
-<!-- Error definitions for proc_slw_build procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_INPUT_IMAGE_SIZE_MESS</rc>
-    <description>Supplied max image size is too small or image too large.</description>
-    <ffdc>DATA_IMG_SIZE_INP</ffdc>
-    <ffdc>DATA_IMG_SIZE_MAX</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_IMG_PTR_ERROR</rc>
-    <description>Supplied image ptrs are the same. This is not allowed.</description>
-    <ffdc>DATA_BUF1_PTR</ffdc>
-    <ffdc>DATA_BUF2_PTR</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_BUF_PTR_ERROR</rc>
-    <description>Supplied buffer(s) is invalid. Either it (they) does not exist or they are the same. This is not allowed.</description>
-    <ffdc>DATA_BUF1_PTR</ffdc>
-    <ffdc>DATA_BUF2_PTR</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_BUF_SIZE_NOT_FIXED</rc>
-    <description>Supplied buffer size(s) differs from agreed upon fixed ring buffer size.</description>
-    <ffdc>DATA_BUF1_SIZE</ffdc>
-    <ffdc>DATA_BUF2_SIZE</ffdc>
-    <ffdc>DATA_BUF_SIZE_FIXED</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_IMAGE_SIZE_NOT_FIXED</rc>
-    <description>Supplied max output image size differs from agreed upon fixed SLW image size.</description>
-    <ffdc>DATA_IMG_SIZE_MAX</ffdc>
-    <ffdc>DATA_IMG_SIZE_FIXED</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_IMAGE_SIZE_MISMATCH</rc>
-    <description>Supplied image size differs from size in image header.</description>
-    <ffdc>DATA_IMG_SIZE_INP</ffdc>
-    <ffdc>DATA_IMG_SIZE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_MS_IMAGE_SIZE_MISMATCH</rc>
-    <description>Supplied image size differs from size in mainstore image header.</description>
-    <ffdc>DATA_IMG_SIZE_INP</ffdc>
-    <ffdc>DATA_IMG_SIZE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_RING_BLOCK_TOO_LARGE</rc>
-    <description>Ring block is too large.</description>
-    <ffdc>DATA_RING_BLOCK_SIZEOFTHIS</ffdc>
-    <ffdc>DATA_SIZE_OF_BUF1</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_RING_BLOCK_ALIGN_ERROR</rc>
-    <description>Problem with WF ring block alignment.</description>
-    <ffdc>DATA_RING_BLOCK_ENTRYOFFSET</ffdc>
-    <ffdc>DATA_RING_BLOCK_SIZEOFTHIS</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_IMGBUILD_ERROR</rc>
-    <description>Local IMGBUILD_xyz error from non-FAPI routine. Check rc code in p8_delta_scan_rw.h.</description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_MAX_IMAGE_SIZE_EXCEEDED</rc>
-    <description>Estimated image size exceeds max allowed size.</description>
-    <ffdc>DATA_IMG_SIZE_OLD</ffdc>
-    <ffdc>DATA_IMG_SIZE_EST</ffdc>
-    <ffdc>DATA_IMG_SIZE_MAX</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_INTERNAL_IMAGE_ERR</rc>
-    <description>Unable to obtain either image size or to validate image.</description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_MS_INTERNAL_IMAGE_ERR</rc>
-    <description>Unable to obtain either image size or to validate image in mainstore.</description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_DELETE_IMAGE_SECTION_ERROR</rc>
-    <description>Error associated with deleting an image section.</description>
-    <ffdc>SBE_XIP_SECTION</ffdc>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_RING_RETRIEVAL_ERROR</rc>
-    <description>Error associated with retrieving RS4 ring from image.</description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_RS4_DECOMPRESSION_ERROR</rc>
-    <description>RS4 decompression failed.</description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_L3_FUNC_OVERLAY_ERROR</rc>
-    <description>Existing ring has 1-bits in overlay locations.</description>
-    <ffdc>DATA_FAIL_BYTE_NO</ffdc>
-    <ffdc>DATA_EXISTING_RING_BYTE</ffdc>
-    <ffdc>DATA_OVERLAY_RING_BYTE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_L2_FARY_OVERLAY_ERROR</rc>
-    <description>Existing ring has 1-bits in overlay locations.</description>
-    <ffdc>DATA_FAIL_BYTE_NO</ffdc>
-    <ffdc>DATA_EXISTING_RING_BYTE</ffdc>
-    <ffdc>DATA_OVERLAY_RING_BYTE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_SLEEP_PROCESSING_ERROR</rc>
-    <description>Unsupported chip type/EC combination found in sleep procesing code.</description>
-    <ffdc>CT</ffdc>
-    <ffdc>EC</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_WF_CREATION_ERROR</rc>
-    <description>Wiggle-flip programming failed.</description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_IMAGE_UPDATE_ERROR</rc>
-    <description>Error associated with updating mainstore image.</description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_APPEND_SLW_SECTION_ERROR</rc>
-    <description>Error associated with adding empty SLW section for ramming table.</description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_CREATE_FIXED_IMAGE_ERROR</rc>
-    <description>Error associated with creating and initializing fixed image and fixed .slw and .ffdc sections.</description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_KEYWORD_NOT_FOUND_ERROR</rc>
-    <description>A keyword in the XIP image was not found.</description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_UNKNOWN_XIP_ERROR</rc>
-    <description>Unknown XIP error, except it's not an _ITEM_NOT_FOUND error.</description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_UNKNOWN_ERROR</rc>
-    <description>Unknown error. (Shouldn't be in this code section.)</description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_BAD_CODE_OR_PARM</rc>
-    <description>Shouldn't be in this code section or invalid parm.</description>
-    <ffdc>MODE_BUILD</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SLWB_MEMORY_ERROR</rc>
-    <description>Memory allocation error.</description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize_attributes.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize_attributes.xml
deleted file mode 100644
index 116a5a1ef..000000000
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize_attributes.xml
+++ /dev/null
@@ -1,350 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize_attributes.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_xip_customize_attributes.xml,v 1.11 2013/11/07 21:51:13 dcrowell Exp $ -->
-<!-- p8_xip_customize_attributes.xml -->
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_NX_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>NX partial good control
-      creator: platform
-      firmware notes:
-        must track ATTR_CHIP_REGIONS_TO_ENABLE
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0x0, ENABLE = 0x1</enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>PCIE partial good control
-      creator: platform
-      firmware notes:
-        must track ATTR_CHIP_REGIONS_TO_ENABLE
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0x0, ENABLE = 0x1</enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_L3_ENABLE</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>L3 partial good control
-      creator: platform
-      firmware notes:
-        must track ATTR_CHIP_REGIONS_TO_ENABLE
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0x0, ENABLE = 0x1</enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
- <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_A_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>ABUS chiplet partial good control
-      creator: platform
-      firmware notes:
-        must track ATTR_CHIP_REGIONS_TO_ENABLE
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0x0, ENABLE = 0x1</enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
- <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_X_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>XBUS chiplet partial good control
-      creator: platform
-      firmware notes:
-        must track ATTR_CHIP_REGIONS_TO_ENABLE
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0x0, ENABLE = 0x1</enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PBA_UNTRUSTED_BAR_BASE_ADDR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>PBA Untrusted BAR base address (secure mode)
-      creator: platform
-      firmware notes:
-        64-bit address representing BAR RA
-    </description>
-    <valueType>uint64</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PBA_UNTRUSTED_BAR_SIZE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>PBA Untrusted BAR size (secure mode)
-      creator: platform
-      firmware notes:
-        mask applied to RA 23:43
-    </description>
-    <valueType>uint64</valueType>
-    <enum>
-        2_TB = 0x000001FFFFF00000,
-        1_TB = 0x000000FFFFF00000,
-      512_GB = 0x0000007FFFF00000,
-      256_GB = 0x0000003FFFF00000,
-      128_GB = 0x0000001FFFF00000,
-       64_GB = 0x0000000FFFF00000,
-       32_GB = 0x00000007FFF00000,
-       16_GB = 0x00000003FFF00000,
-        8_GB = 0x00000001FFF00000,
-        4_GB = 0x00000000FFF00000,
-        2_GB = 0x000000007FF00000,
-        1_GB = 0x000000003FF00000,
-      512_MB = 0x000000001FF00000,
-      256_MB = 0x000000000FF00000,
-      128_MB = 0x0000000007F00000,
-       64_MB = 0x0000000003F00000,
-       32_MB = 0x0000000001F00000,
-       16_MB = 0x0000000000F00000,
-        8_MB = 0x0000000000700000,
-        4_MB = 0x0000000000300000,
-        2_MB = 0x0000000000100000,
-        1_MB = 0x0000000000000000
-    </enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_ADU_UNTRUSTED_BAR_BASE_ADDR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>ADU Untrusted BAR base address (secure mode)
-      creator: platform
-      firmware notes:
-        64-bit address representing BAR RA
-    </description>
-    <valueType>uint64</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_ADU_UNTRUSTED_BAR_SIZE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>ADU Untrusted BAR size (secure mode)
-      creator: platform
-      firmware notes:
-        mask applied to RA 14:43
-    </description>
-    <valueType>uint64</valueType>
-    <enum>
-        1_PB = 0x0000000000000000,
-      512_TB = 0x0002000000000000,
-      256_TB = 0x0003000000000000,
-      128_TB = 0x0003800000000000,
-       64_TB = 0x0003C00000000000,
-       32_TB = 0x0003E00000000000,
-       16_TB = 0x0003F00000000000,
-        8_TB = 0x0003F80000000000,
-        4_TB = 0x0003FC0000000000,
-        2_TB = 0x0003FE0000000000,
-        1_TB = 0x0003FF0000000000,
-      512_GB = 0x0003FF8000000000,
-      256_GB = 0x0003FFC000000000,
-      128_GB = 0x0003FFE000000000,
-       64_GB = 0x0003FFF000000000,
-       32_GB = 0x0003FFF800000000,
-       16_GB = 0x0003FFFC00000000,
-        8_GB = 0x0003FFFE00000000,
-        4_GB = 0x0003FFFF00000000,
-        2_GB = 0x0003FFFF80000000,
-        1_GB = 0x0003FFFFC0000000,
-      512_MB = 0x0003FFFFE0000000,
-      256_MB = 0x0003FFFFF0000000,
-      128_MB = 0x0003FFFFF8000000,
-       64_MB = 0x0003FFFFFC000000,
-       32_MB = 0x0003FFFFFE000000,
-       16_MB = 0x0003FFFFFF000000,
-        8_MB = 0x0003FFFFFF800000,
-        4_MB = 0x0003FFFFFFC00000,
-        2_MB = 0x0003FFFFFFE00000,
-        1_MB = 0x0003FFFFFFF00000
-    </enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PSI_UNTRUSTED_BAR0_BASE_ADDR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>PSI Untrusted BAR0 base address (secure mode)
-      creator: platform
-      firmware notes:
-        64-bit address representing BAR RA
-    </description>
-    <valueType>uint64</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PSI_UNTRUSTED_BAR0_SIZE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>PSI Untrusted BAR0 size (secure mode)
-      creator: platform
-      firmware notes:
-        mask applied to RA 14:43
-    </description>
-    <valueType>uint64</valueType>
-    <enum>
-        1_PB = 0x0000000000000000,
-      512_TB = 0x0002000000000000,
-      256_TB = 0x0003000000000000,
-      128_TB = 0x0003800000000000,
-       64_TB = 0x0003C00000000000,
-       32_TB = 0x0003E00000000000,
-       16_TB = 0x0003F00000000000,
-        8_TB = 0x0003F80000000000,
-        4_TB = 0x0003FC0000000000,
-        2_TB = 0x0003FE0000000000,
-        1_TB = 0x0003FF0000000000,
-      512_GB = 0x0003FF8000000000,
-      256_GB = 0x0003FFC000000000,
-      128_GB = 0x0003FFE000000000,
-       64_GB = 0x0003FFF000000000,
-       32_GB = 0x0003FFF800000000,
-       16_GB = 0x0003FFFC00000000,
-        8_GB = 0x0003FFFE00000000,
-        4_GB = 0x0003FFFF00000000,
-        2_GB = 0x0003FFFF80000000,
-        1_GB = 0x0003FFFFC0000000,
-      512_MB = 0x0003FFFFE0000000,
-      256_MB = 0x0003FFFFF0000000,
-      128_MB = 0x0003FFFFF8000000,
-       64_MB = 0x0003FFFFFC000000,
-       32_MB = 0x0003FFFFFE000000,
-       16_MB = 0x0003FFFFFF000000,
-        8_MB = 0x0003FFFFFF800000,
-        4_MB = 0x0003FFFFFFC00000,
-        2_MB = 0x0003FFFFFFE00000,
-        1_MB = 0x0003FFFFFFF00000
-    </enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PSI_UNTRUSTED_BAR1_BASE_ADDR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>PSI Untrusted BAR1 base address (secure mode)
-      creator: platform
-      firmware notes:
-        64-bit address representing BAR RA
-    </description>
-    <valueType>uint64</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PSI_UNTRUSTED_BAR1_SIZE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>PSI Untrusted BAR1 size (secure mode)
-      creator: platform
-      firmware notes:
-        mask applied to RA 14:43
-    </description>
-    <valueType>uint64</valueType>
-    <enum>
-        1_PB = 0x0000000000000000,
-      512_TB = 0x0002000000000000,
-      256_TB = 0x0003000000000000,
-      128_TB = 0x0003800000000000,
-       64_TB = 0x0003C00000000000,
-       32_TB = 0x0003E00000000000,
-       16_TB = 0x0003F00000000000,
-        8_TB = 0x0003F80000000000,
-        4_TB = 0x0003FC0000000000,
-        2_TB = 0x0003FE0000000000,
-        1_TB = 0x0003FF0000000000,
-      512_GB = 0x0003FF8000000000,
-      256_GB = 0x0003FFC000000000,
-      128_GB = 0x0003FFE000000000,
-       64_GB = 0x0003FFF000000000,
-       32_GB = 0x0003FFF800000000,
-       16_GB = 0x0003FFFC00000000,
-        8_GB = 0x0003FFFE00000000,
-        4_GB = 0x0003FFFF00000000,
-        2_GB = 0x0003FFFF80000000,
-        1_GB = 0x0003FFFFC0000000,
-      512_MB = 0x0003FFFFE0000000,
-      256_MB = 0x0003FFFFF0000000,
-      128_MB = 0x0003FFFFF8000000,
-       64_MB = 0x0003FFFFFC000000,
-       32_MB = 0x0003FFFFFE000000,
-       16_MB = 0x0003FFFFFF000000,
-        8_MB = 0x0003FFFFFF800000,
-        4_MB = 0x0003FFFFFFC00000,
-        2_MB = 0x0003FFFFFFE00000,
-        1_MB = 0x0003FFFFFFF00000
-    </enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_SECURITY_SETUP_VECTOR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>64-bit proc_sbe_security_setup_vector used by proc_sbe_security_setup.S
-      creator: platform
-      firmware notes:
-        64-bit proc_sbe_security_setup_vector
-    </description>
-    <valueType>uint64</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SBE_IMAGE_MINIMUM_VALID_EXS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-       The minimum number of valid EXs that is required to be used when
-       customizing a SBE image. The customization will fail if it cannot
-       create an image with at least this many EXs.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize_errors.xml
deleted file mode 100644
index aad8d4714..000000000
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize_errors.xml
+++ /dev/null
@@ -1,535 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_xip_customize_errors.xml,v 1.21 2014/05/28 15:31:56 cmolsen Exp $ -->
-<!-- Error definitions for p8_xip_customize procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_IMAGE_WORK_SPACE_MESS</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Max work space for output image is not equal to FIXED_SEEPROM_WORK_SPACE.
-    </description>
-    <ffdc>DATA_IMG_SIZE_MAX</ffdc>
-    <ffdc>DATA_IMG_SIZE_WORK_SPACE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_IMAGE_SIZE_MESS</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Supplied max image size is smaller than input image.
-    </description>
-    <ffdc>DATA_IMG_SIZE</ffdc>
-    <ffdc>DATA_IMG_SIZE_MAX</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_INTERNAL_IMAGE_ERR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Unable to obtain either image size or to validate image.
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_MS_INTERNAL_IMAGE_ERR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Unable to obtain either image size or to validate image in MS.
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_MS_IMAGE_SIZE_MISMATCH</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Supplied image size differs from size in image header in MS.
-    </description>
-    <ffdc>DATA_IMG_SIZE_INP</ffdc>
-    <ffdc>DATA_IMG_SIZE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_BUF_PTR_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Supplied buffer(s) is invalid.
-    </description>
-    <ffdc>DATA_BUF1_PTR</ffdc>
-    <ffdc>DATA_BUF2_PTR</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_BUF_SIZE_NOT_FIXED</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Supplied buffer size(s) differs from agreed upon fixed ring buffer size.
-    </description>
-    <ffdc>DATA_BUF1_SIZE</ffdc>
-    <ffdc>DATA_BUF2_SIZE</ffdc>
-    <ffdc>DATA_BUF_SIZE_FIXED</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_UNEXPECTED_FIELD_SIZE</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Expected field size of 4 bytes. Got something else from fapiGetMvpdField().
-    </description>
-    <ffdc>DATA_SIZE_VPD_FIELD</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_GEN_SCOM_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Updating Scom NC table w/L2 or L3 data failed. Check rc code in p8_delta_scan_rw.h
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_GEN_RAM_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Updating RAM table w/LPCR or HMEER RAM failed. Check rc code in p8_delta_scan_rw.h
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_PLL_RING_SIZE_TOO_LARGE</rc>
-    <description>
-      Procedure: p8_xip_customize
-      PLL ring size returned from attribute is too large.
-    </description>
-    <ffdc>DATA_ATTRIBUTE_RING_SIZE</ffdc>
-    <ffdc>DATA_MAX_PLL_RING_SIZE</ffdc>
-    <ffdc>DATA_SIZE_OF_BUF1</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_IMGBUILD_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Local IMGBUILD_xyz error from non-FAPI routine. Check rc code in p8_delta_scan_rw.h.
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_RS4_COMPRESS_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      _rs4_compress() failed w/local rc.
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_RS4_COMPRESS_SIZE_MESS</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Problem with RS4 ring sizes from _rs4_compress().
-    </description>
-    <ffdc>DATA_SIZE_RS4_COMPRESS_RETURN</ffdc>
-    <ffdc>DATA_SIZE_RS4_COMPRESS_CONTAINER</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_ILLEGAL_RS4_DECOMPRESS_ADDR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      RS4 decompress address has illegal value.
-    </description>
-    <ffdc>DATA_RS4_DECOMPRESS_ADDR</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_PORE_INLINE_CTX_CREATE_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      pore_inline_context_create failed w/local rc.
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_PORE_INLINE_RS4_LAUNCH_CREATE_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      pore_MR/ADDS/LI/BRAD failed w/local rc.
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_PLL_RING_BLOCK_TOO_LARGE</rc>
-    <description>
-      Procedure: p8_xip_customize
-      PLL ring block is too large.
-    </description>
-    <ffdc>DATA_RING_BLOCK_SIZEOFTHIS</ffdc>
-    <ffdc>DATA_SIZE_OF_BUF1</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_RING_BLOCK_ALIGN_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Problem with RS4 PLL ring block alignment.
-    </description>
-    <ffdc>DATA_SIZE_OF_RS4_LAUNCH</ffdc>
-    <ffdc>DATA_RING_BLOCK_ENTRYOFFSET</ffdc>
-    <ffdc>DATA_RING_BLOCK_SIZEOFTHIS</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_CHIPLET_ID_MESS</rc>
-    <description>
-      Procedure: p8_xip_customize
-      VPD ring's chipletId differs from 0xFF and doesn't match requested value either.
-    </description>
-    <ffdc>DATA_CHIPLET_ID_VPD</ffdc>
-    <ffdc>DATA_CHIPLET_ID_REQ</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_PG_RING_TOO_LARGE</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Requested #G ring size exceeds max value.
-    </description>
-    <ffdc>DATA_RING_SIZE_REQ</ffdc>
-    <ffdc>DATA_RING_SIZE_MAX</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_PR_RING_TOO_LARGE</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Requested #R ring size exceeds max value.
-    </description>
-    <ffdc>DATA_RING_SIZE_REQ</ffdc>
-    <ffdc>DATA_RING_SIZE_MAX</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_INVALID_VPD_TYPE</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Invalid VPD type.
-    </description>
-    <ffdc>DATA_VPD_TYPE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_KEYWORD_NOT_FOUND_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      A keyword in the XIP image was not found.
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_VPD_KEYWORD_RESOLVE_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Unable to resolve local vpd keyword to fapi-level mvpd keyword.
-    </description>
-    <ffdc>DATA_RING_LIST_VPD_KEYWORD</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_PERFORM_RING_DATACARE_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Error occured during check_and_perform_ring_datacare()
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_CHECK_REDUNDANT_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Error occured during rs4_redundant()
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_RING_WRITE_WOULD_OVERFLOW</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Ran out of space when trying to add a ring to the image
-      (write_vpd_ring_to_ipl_image returned SBE_XIP_WOULD_OVERFLOW)
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <ffdc>CHIPLET_ID</ffdc>
-    <ffdc>RING_ID</ffdc>
-    <ffdc>RING_SIZE</ffdc>
-    <ffdc>IMAGE_SIZE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_RING_WRITE_WOULD_OVERFLOW_ADD_INFO</rc>
-    <description>
-      Procedure: p8_xip_customize
-      More FFDC for the RC_PROC_XIPC_RING_WRITE_WOULD_OVERFLOW error
-    </description>
-    <ffdc>VALID_COUNT</ffdc>
-    <ffdc>MINIMUM</ffdc>
-    <ffdc>DESIRED_CORES</ffdc>
-    <ffdc>BOOT_CORE_MASK</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_OVERFLOW_BEFORE_REACHING_MINIMUM_EXS</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Hit a RC_PROC_XIPC_RING_WRITE_WOULD_OVERFLOW error before the minimum number
-      of EX chiplets were added to the image.
-    </description>
-    <ffdc>VALID_COUNT</ffdc>
-    <ffdc>MINIMUM</ffdc>
-    <ffdc>DESIRED_CORES</ffdc>
-    <ffdc>BOOT_CORE_MASK</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_WRITE_VPD_RING_TO_IPL_IMAGE_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Error occured during write_vpd_ring_to_ipl_image()
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_WRITE_VPD_RING_TO_SLW_IMAGE_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Error occured during write_vpd_ring_to_slw_image()
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_XIP_DELETE_SECTION_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      sbe_xip_delete_section() failed w/local rc.
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_CREATE_FIXED_IMAGE_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Error associated with creating and initializing fixed image and fixed .slw and .ffdc sections.
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_MAX_IMAGE_SIZE_EXCEEDED</rc>
-    <description>
-      Procedure: p8_xip_customize
-      New image size exceeds max allowed size.
-    </description>
-    <ffdc>DATA_IMG_SIZE_NEW</ffdc>
-    <ffdc>DATA_IMG_SIZE_MAX</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_APPEND_SLW_SECTION_ERROR</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Error associated with adding empty SLW section for ram and scom tables.
-    </description>
-    <ffdc>RC_LOCAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_XIPC_BAD_CODE_OR_PARM</rc>
-    <description>
-      Procedure: p8_xip_customize
-      Shouldn't be in this code section or invalid modeBuild parm.
-    </description>
-    <ffdc>MODE_BUILD</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/proc_pll_ring_attributes.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/proc_pll_ring_attributes.xml
deleted file mode 100644
index 3a2d74585..000000000
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/proc_pll_ring_attributes.xml
+++ /dev/null
@@ -1,328 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/proc_pll_ring_attributes.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2013,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_pll_ring_attributes.xml,v 1.17 2014/11/13 20:14:02 szhong Exp $ -->
-<!-- proc_pll_ring_attributes.xml -->
-<attributes>
-  <attribute>
-    <id>ATTR_PROC_PERV_BNDY_PLL_DATA</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Ring image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>128</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PB_BNDY_DMIPLL_DATA</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Ring image for pb_bndy_dmipll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>240</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_AB_BNDY_PLL_DATA</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Ring image for ab_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>110</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCI_BNDY_PLL_DATA</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Ring image for pci_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>110</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PERV_BNDY_PLL_LENGTH</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Length of data in ring image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PB_BNDY_DMIPLL_LENGTH</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Length of data in ring image for pb_bndy_dmipll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_AB_BNDY_PLL_LENGTH</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Length of data in ring image for ab_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCI_BNDY_PLL_LENGTH</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Length of data in ring image for pci_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PERV_BNDY_PLL_FLUSH</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Ring flush image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>128</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PB_BNDY_DMIPLL_FLUSH</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Ring flush image for pb_bndy_dmipll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>240</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_AB_BNDY_PLL_FLUSH</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Ring flush image for ab_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>110</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCI_BNDY_PLL_FLUSH</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Ring flush image for pci_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>110</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PERV_BNDY_PLL_CHIPLET_ID</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Chiplet ID for ring image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PB_BNDY_DMIPLL_CHIPLET_ID</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Chiplet ID for ring image for pb_bndy_dmipll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_AB_BNDY_PLL_CHIPLET_ID</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Chiplet ID for ring image for ab_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCI_BNDY_PLL_CHIPLET_ID</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Chiplet ID for ring image for pci_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PERV_BNDY_PLL_SCAN_SELECT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Scan select for ring image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PB_BNDY_DMIPLL_SCAN_SELECT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Scan select for ring image for pb_bndy_dmipll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_AB_BNDY_PLL_SCAN_SELECT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Scan select for ring image for ab_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCI_BNDY_PLL_SCAN_SELECT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Scan select for ring image for pci_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_ABUS_CUPLL_PFD360_OFFSET</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Scan chain positions of CU PLL PDF360 bits in ab_bndy_pll chain (Offset from beginning of chain)
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <array>3</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_ABUS_CUPLL_REFCLKSEL_OFFSET</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Scan chain positions of CU PLL REFCLKSEL bits in ab_bndy_pll chain (Offset from beginning of chain)
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <array>3</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_DMI_CUPLL_PFD360_OFFSET</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Scan chain positions of CU PLL PDF360 bits in tp_bndy_dmipll chain (Offset from beginning of chain)
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <array>8</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_DMI_CUPLL_REFCLKSEL_OFFSET</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Scan chain positions of CU PLL REFCLKSEL bits in tp_bndy_dmipll chain (Offset from beginning of chain)
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <array>8</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_mailbox_utils/p8_mailbox_utils_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/proc_mailbox_utils/p8_mailbox_utils_errors.xml
deleted file mode 100644
index 6ced17ba6..000000000
--- a/src/usr/hwpf/hwp/build_winkle_images/proc_mailbox_utils/p8_mailbox_utils_errors.xml
+++ /dev/null
@@ -1,56 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/proc_mailbox_utils/p8_mailbox_utils_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_mailbox_utils_errors.xml,v 1.2 2014/02/28 15:27:47 jmcgill Exp $ -->
-<!-- Error definitions for proc_mailbox_utils procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_P8_MAILBOX_UTILS_PROC_REFCLK_ZERO_ERROR</rc>
-    <description>
-      Procedure: p8_mailbox_utils (p8_mailbox_utils_get_mbox1)
-      The ATTR_FREQ_PROC_REFCLOCK specified a zero for proc refclk, which is invalid
-    </description>
-    <ffdc>REF_FREQ</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_P8_MAILBOX_UTILS_FREQ_MULT_OOB_ERROR</rc>
-    <description>
-      Procedure: p8_mailbox_utils (p8_mailbox_utils_get_mbox1)
-      The calculated DPLL frequency multiplier is too bit to fit in the bit field
-    </description>
-    <ffdc>BOOT_FREQ</ffdc>
-    <ffdc>REF_FREQ</ffdc>
-    <ffdc>DPLL_DIV</ffdc>
-    <ffdc>FREQ_MULT</ffdc>
-    <ffdc>MAX_BITS</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/bus_training/erepair_errors.xml b/src/usr/hwpf/hwp/bus_training/erepair_errors.xml
deleted file mode 100644
index 43f39bd62..000000000
--- a/src/usr/hwpf/hwp/bus_training/erepair_errors.xml
+++ /dev/null
@@ -1,115 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/bus_training/erepair_errors.xml $            -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: erepair_errors.xml,v 1.3 2014/04/29 12:00:37 bilicon Exp $ -->
-<hwpErrors>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_ACCESSOR_HWP_INVALID_TARGET_TYPE</rc>
-    <description>
-        Invalid input parameter: Valid target types are - XBUS, ABUS, MCS
-    </description>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_ACCESSOR_HWP_MEMORY_ALLOC_FAIL</rc>
-    <description>
-        Failed to allocate run time memory from the heap
-    </description>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_EREPAIR_RESTORE_INVALID_TARGET_PAIR</rc>
-    <description>
-        Invalid input parameter: Valid target pairs are: XBus-XBus, ABus-ABus,
-        MCS-MEMBUF
-    </description>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_EREPAIR_RESTORE_FIELD_VPD_NOT_CLEAR</rc>
-    <description>
-        Field VPD needs to be clear during Manufacturing Mode eRepair restore
-    </description>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_EREPAIR_RESTORE_CHARM_THRESHOLD_EXCEED</rc>
-    <description>
-        The threshold limit for eRepair has been crossed during CHARM operation
-    </description>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_EREPAIR_RESTORE_SPARE_LANES_IN_VPD</rc>
-    <description>
-        There are spare lanes in the VPD. Spare lanes cannot be restored.
-    </description>
-    <ffdc>FFDC_TARGET</ffdc>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_EREPAIR_RESTORE_INVALID_TARGET</rc>
-    <description>
-        Invalid input parameter: Invalid target type
-    </description>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_EREPAIR_THRESHOLD_EXCEED</rc>
-    <description>
-        The threshold limit for eRepair has been crossed
-    </description>
-    <ffdc>FFDC_TX_NUM_LANES</ffdc>
-    <ffdc>FFDC_RX_NUM_LANES</ffdc>
-    <ffdc>FFDC_THRESHOLD</ffdc>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_EREPAIR_MVPD_FULL</rc>
-    <description>
-        eRepair data limit in the Processor Module VPD has been reached
-    </description>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_EREPAIR_MBVPD_FULL</rc>
-    <description>
-        eRepair data limit in the Memory Buffer FRU VPD has been reached
-    </description>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_ACCESSOR_HWP_INVALID_MEM_VPD_SIZE</rc>
-    <description>
-        Invalid Memory VPD size has been returned by platform
-    </description>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_ACCESSOR_HWP_INVALID_FABRIC_VPD_SIZE</rc>
-    <description>
-        Invalid Fabric VPD size has been returned by platform
-    </description>
-  </hwpError>
-  <!-- ********************************************************************* -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/bus_training/gcr_funcs_errors.xml b/src/usr/hwpf/hwp/bus_training/gcr_funcs_errors.xml
deleted file mode 100644
index 41ee12a4c..000000000
--- a/src/usr/hwpf/hwp/bus_training/gcr_funcs_errors.xml
+++ /dev/null
@@ -1,39 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/bus_training/gcr_funcs_errors.xml $          -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2014                   -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: gcr_funcs_errors.xml,v 1.2 2014/03/18 14:56:22 jgrell Exp $ -->
-
-<!-- Error definitions for gcr_func HWPS  -->
-<hwpErrors>
-<!-- *********************************************************************** -->
- <hwpError>
-    <rc>IO_GCR_WRITE_MISMATCH_RC</rc>
-    <description>IO GCR write operation failed to readback data that was written</description>
-    <ffdc>READ_BUF</ffdc>
-    <ffdc>WRITE_BUF</ffdc>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
-
diff --git a/src/usr/hwpf/hwp/bus_training/io_dccal_errors.xml b/src/usr/hwpf/hwp/bus_training/io_dccal_errors.xml
deleted file mode 100644
index 93cecce77..000000000
--- a/src/usr/hwpf/hwp/bus_training/io_dccal_errors.xml
+++ /dev/null
@@ -1,166 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/bus_training/io_dccal_errors.xml $           -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2014                             -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: io_dccal_errors.xml,v 1.8 2014/09/10 20:35:22 garyp Exp $ -->
-
-<!-- Error definitions for io_dccal HWPS  -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_DCCAL_OFFCAL_ERROR_RC</rc>
-    <ffdc>CHIP_INTERFACE</ffdc>
-    <ffdc>DATA_BUFFER</ffdc>
-    <ffdc>FAIL_BIT</ffdc>
-    <ffdc>TARGET</ffdc>
-    <description>io offset cal errored out</description>
-	<callout>
-        <target>TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <deconfigure>
-        <target>TARGET</target>
-    </deconfigure>
-    <gard>
-        <target>TARGET</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_DCCAL_OFFCAL_TIMEOUT_RC</rc>
-    <ffdc>TIMEOUTCNT</ffdc>
-    <description>io offset cal timedout</description>
-	<callout>
-        <target>TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <deconfigure>
-        <target>TARGET</target>
-    </deconfigure>
-    <gard>
-        <target>TARGET</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_DCCAL_ZCAL_K2_EXCEEDED_RC</rc>
-    <ffdc>K2</ffdc>
-    <description>Post cursor drive ratio has exceeded 0.25</description>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_DCCAL_ZCAL_M_EXCEEDED_RC</rc>
-    <ffdc>M</ffdc>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-    <description>Margin Ratio has exceeded 100 percentage</description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_DCCAL_ZCAL_ERROR_RC</rc>
-    <ffdc>FAIL</ffdc>
-    <ffdc>DATA_BUFFER</ffdc>
-    <description>io impedance cal errored out</description>
-	<callout>
-        <target>TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <deconfigure>
-        <target>TARGET</target>
-    </deconfigure>
-    <gard>
-        <target>TARGET</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_DCCAL_ZCAL_TIMEOUT_RC</rc>
-    <ffdc>TIMEOUTCNT</ffdc>
-    <description>io impedance cal timed out</description>
-	<callout>
-        <target>TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <deconfigure>
-        <target>TARGET</target>
-    </deconfigure>
-    <gard>
-        <target>TARGET</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_DCCAL_ZCALN_VALUE_OUT_OF_RANGE_RC</rc>
-    <ffdc>ZCAL_N</ffdc>
-    <ffdc>MIN</ffdc>
-    <ffdc>MAX</ffdc>
-    <description>Impedance calibration zcal_n value out of range</description>
-	<callout>
-        <target>TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <deconfigure>
-        <target>TARGET</target>
-    </deconfigure>
-    <gard>
-        <target>TARGET</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_DCCAL_ZCALP_VALUE_OUT_OF_RANGE_RC</rc>
-    <ffdc>ZCAL_P</ffdc>
-    <ffdc>MIN</ffdc>
-    <ffdc>MAX</ffdc>
-    <description>Impedance calibration zcal_p value out of range</description>
-	<callout>
-        <target>TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <deconfigure>
-        <target>TARGET</target>
-    </deconfigure>
-    <gard>
-        <target>TARGET</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_DCCAL_INVALID_INVOCATION_RC</rc>
-    <ffdc>TARGET</ffdc>
-    <description>io dc cal invoked with wrong pair of targets</description>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
- 
-</hwpErrors>
-
-
diff --git a/src/usr/hwpf/hwp/bus_training/io_fir_isolation_errors.xml b/src/usr/hwpf/hwp/bus_training/io_fir_isolation_errors.xml
deleted file mode 100755
index 1af92ae80..000000000
--- a/src/usr/hwpf/hwp/bus_training/io_fir_isolation_errors.xml
+++ /dev/null
@@ -1,104 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/bus_training/io_fir_isolation_errors.xml $   -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2014                   -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: io_fir_isolation_errors.xml,v 1.6 2014/04/22 23:18:58 garyp Exp $ -->
-<hwpErrors>
-    <hwpError>
-        <rc>IO_FIR_TOO_MANY_BUS_ERROR_RC</rc>
-        <description>A bus has experienced too many random lane errors</description>
-        <ffdc>ENDPOINT</ffdc>
-        <ffdc>BUS_ERROR_REG</ffdc>
-    </hwpError>
-    <hwpError>
-        <rc>IO_FIR_RECALIBRATION_ERROR_RC</rc>
-        <description>recalibration or a repair error has been detected</description>
-        <ffdc>ENDPOINT</ffdc>
-        <ffdc>RECAL_ERROR_REG</ffdc>
-    </hwpError>
-    <hwpError>
-        <rc>IO_FIR_MAX_SPARES_EXCEEDED_FIR_RC</rc>
-        <description>maximum spares possible to deploy exceeded</description>
-        <ffdc>ENDPOINT</ffdc>
-        <ffdc>SPARE_ERROR_REG</ffdc>
-    </hwpError>
-    <hwpError>
-        <rc>IO_FIR_SPARES_DEPLOYED_FIR_RC</rc>
-        <description>A spare has been deployed</description>
-        <ffdc>ENDPOINT</ffdc>
-        <ffdc>SPARE_ERROR_REG</ffdc>
-    </hwpError>
-    <hwpError>
-        <rc>IO_FIR_LANE_TX_PARITY_ERROR_RC</rc>
-        <description>io lane level tx parity error set</description>
-        <ffdc>ENDPOINT</ffdc>
-        <ffdc>LANE_ID</ffdc>
-        <ffdc>TX_ERROR_REG</ffdc>
-    </hwpError>
-    <hwpError>
-        <rc>IO_FIR_GROUP_TX_PARITY_ERROR_RC</rc>
-        <description>io group level tx parity error set</description>
-        <ffdc>ENDPOINT</ffdc>
-        <ffdc>TX_ERROR_REG</ffdc>
-    </hwpError>
-    <hwpError>
-        <rc>IO_FIR_LANE_RX_PARITY_ERROR_RC</rc>
-        <description>io lane level rx parity error set</description>
-        <ffdc>ENDPOINT</ffdc>
-        <ffdc>LANE_ID</ffdc>
-        <ffdc>RX_ERROR_REG</ffdc>
-    </hwpError>
-    <hwpError>
-        <rc>IO_FIR_GROUP_RX_PARITY_ERROR_RC</rc>
-        <description>io group level rx parity error set</description>
-        <ffdc>ENDPOINT</ffdc>
-        <ffdc>RX_ERROR_REG</ffdc>
-    </hwpError>
-    <hwpError>
-        <rc>IO_FIR_BUS_RX_PARITY_ERROR_RC</rc>
-        <description>io bus level rx parity error set</description>
-        <ffdc>ENDPOINT</ffdc>
-        <ffdc>RX_ERROR_REG</ffdc>
-    </hwpError>
-    <hwpError>
-        <rc>IO_FIR_GCR_HANG_ERROR_RC</rc>
-        <description>gcr hang error detected</description>
-        <ffdc>ENDPOINT</ffdc>
-    </hwpError>
-    <hwpError>
-        <rc>IO_FIR_INVALID_INVOCATION_RC</rc>
-        <description>io clear firs hwp invoked with wrong pair of targets</description>
-        <ffdc>ENDPOINT</ffdc>
-        <callout>
-            <procedure>CODE</procedure>
-            <priority>HIGH</priority>
-        </callout>
-    </hwpError>
-    <hwpError>
-        <rc>IO_CLEAR_FIRS_INVALID_INVOCATION_RC</rc>
-        <description>io clear firs hwp invoked with wrong pair of targets</description>
-        <ffdc>ENDPOINT</ffdc>
-        <callout>
-            <procedure>CODE</procedure>
-            <priority>HIGH</priority>
-        </callout>
-    </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/bus_training/io_funcs_errors.xml b/src/usr/hwpf/hwp/bus_training/io_funcs_errors.xml
deleted file mode 100644
index 53a5b0fcc..000000000
--- a/src/usr/hwpf/hwp/bus_training/io_funcs_errors.xml
+++ /dev/null
@@ -1,495 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/bus_training/io_funcs_errors.xml $           -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2014                   -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: io_funcs_errors.xml,v 1.5 2014/05/08 06:06:40 varkeykv Exp $ -->
-
-<hwpErrors>
-
-  <!-- **********************TIMEOUT FAILS************************************************* -->
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_FUNCS_WIRETEST_TIMEOUT_RC</rc>
-        <ffdc>FFDC_NUM_CYCLES</ffdc>
-    <description>io run training wiretest timed out waiting for pass/fail indication in the p8 or centaur Status Registers</description>
-    <ffdc>MASTER_CHIP_INTERFACE</ffdc>
-    <ffdc>MASTER_GROUP</ffdc>
-    <ffdc>SLAVE_CHIP_INTERFACE</ffdc>
-    <ffdc>SLAVE_GROUP</ffdc>
-    <callout>
-        <target>MASTER_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <target>SLAVE_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <bus>MASTER_TARGET,SLAVE_TARGET</bus>
-        <priority>HIGH</priority>
-    </callout>
-        <deconfigure>
-        <target>MASTER_TARGET</target>
-    </deconfigure>
-    <deconfigure>
-        <target>SLAVE_TARGET</target>
-    </deconfigure>
-        <gard>
-        <target>MASTER_TARGET</target>
-    </gard>
-    <gard>
-        <target>SLAVE_TARGET</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-   <hwpError>
-    <rc>IO_FUNCS_DESKEW_TIMEOUT_RC</rc>
-        <ffdc>FFDC_NUM_CYCLES</ffdc>
-    <description>io run training deskew timed out waiting for pass/fail indication in the p8 or centaur Status Registers</description>
-    <ffdc>MASTER_CHIP_INTERFACE</ffdc>
-    <ffdc>MASTER_GROUP</ffdc>
-    <ffdc>SLAVE_CHIP_INTERFACE</ffdc>
-    <ffdc>SLAVE_GROUP</ffdc>
-
-    <callout>
-        <target>MASTER_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <target>SLAVE_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <bus>MASTER_TARGET,SLAVE_TARGET</bus>
-        <priority>HIGH</priority>
-    </callout>
-        <deconfigure>
-        <target>MASTER_TARGET</target>
-    </deconfigure>
-    <deconfigure>
-        <target>SLAVE_TARGET</target>
-    </deconfigure>
-        <gard>
-        <target>MASTER_TARGET</target>
-    </gard>
-    <gard>
-        <target>SLAVE_TARGET</target>
-    </gard>
-  </hwpError>
-   <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_FUNCS_EYEOPT_TIMEOUT_RC</rc>
-        <ffdc>FFDC_NUM_CYCLES</ffdc>
-    <description>io run training Eyeopt timed out waiting for pass/fail indication in the p8 or centaur Status Registers</description>
-    <ffdc>MASTER_CHIP_INTERFACE</ffdc>
-    <ffdc>MASTER_GROUP</ffdc>
-    <ffdc>SLAVE_CHIP_INTERFACE</ffdc>
-    <ffdc>SLAVE_GROUP</ffdc>
-    <callout>
-        <target>MASTER_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <target>SLAVE_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <bus>MASTER_TARGET,SLAVE_TARGET</bus>
-        <priority>HIGH</priority>
-    </callout>
-        <deconfigure>
-        <target>MASTER_TARGET</target>
-    </deconfigure>
-    <deconfigure>
-        <target>SLAVE_TARGET</target>
-    </deconfigure>
-        <gard>
-        <target>MASTER_TARGET</target>
-    </gard>
-    <gard>
-        <target>SLAVE_TARGET</target>
-    </gard>
-  </hwpError>
-   <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_FUNCS_REPAIR_TIMEOUT_RC</rc>
-        <ffdc>FFDC_NUM_CYCLES</ffdc>
-    <description>io run training repair timed out waiting for pass/fail indication in the p8 or centaur Status Registers</description>
-    <ffdc>MASTER_CHIP_INTERFACE</ffdc>
-    <ffdc>MASTER_GROUP</ffdc>
-    <ffdc>SLAVE_CHIP_INTERFACE</ffdc>
-    <ffdc>SLAVE_GROUP</ffdc>
-    <callout>
-        <target>MASTER_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <target>SLAVE_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <bus>MASTER_TARGET,SLAVE_TARGET</bus>
-        <priority>HIGH</priority>
-    </callout>
-        <deconfigure>
-        <target>MASTER_TARGET</target>
-    </deconfigure>
-    <deconfigure>
-        <target>SLAVE_TARGET</target>
-    </deconfigure>
-        <gard>
-        <target>MASTER_TARGET</target>
-    </gard>
-    <gard>
-        <target>SLAVE_TARGET</target>
-    </gard>
-  </hwpError>
-   <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_FUNCS_FUNC_MODE_TIMEOUT_RC</rc>
-        <ffdc>FFDC_NUM_CYCLES</ffdc>
-    <description>io run training functional mode timed out waiting for pass/fail indication in the p8 or centaur Status Registers</description>
-    <ffdc>MASTER_CHIP_INTERFACE</ffdc>
-    <ffdc>MASTER_GROUP</ffdc>
-    <ffdc>SLAVE_CHIP_INTERFACE</ffdc>
-    <ffdc>SLAVE_GROUP</ffdc>
-    <callout>
-        <target>MASTER_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <target>SLAVE_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <bus>MASTER_TARGET,SLAVE_TARGET</bus>
-        <priority>HIGH</priority>
-    </callout>
-        <deconfigure>
-        <target>MASTER_TARGET</target>
-    </deconfigure>
-    <deconfigure>
-        <target>SLAVE_TARGET</target>
-    </deconfigure>
-        <gard>
-        <target>MASTER_TARGET</target>
-    </gard>
-    <gard>
-        <target>SLAVE_TARGET</target>
-    </gard>
-  </hwpError>
-   <!-- *********************************************************************** -->
-
-    <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_FUNCS_WIRETEST_FAIL_RC</rc>
-    <description>Wiretest Training fail was reported in a P8 or Centaur status register</description>
-    <ffdc>MASTER_CHIP_INTERFACE</ffdc>
-    <ffdc>MASTER_GROUP</ffdc>
-    <ffdc>SLAVE_CHIP_INTERFACE</ffdc>
-    <ffdc>SLAVE_GROUP</ffdc>
-    <ffdc>MASTER_RX_LANE_DISABLED_VEC_0_15_PG</ffdc>
-    <ffdc>MASTER_RX_LANE_DISABLED_VEC_16_31_PG</ffdc>
-    <ffdc>MASTER_RX_LANE_SWAPPED_VEC_0_15_PG</ffdc>
-    <ffdc>MASTER_RX_INIT_STATE_PG</ffdc>
-    <ffdc>MASTER_RX_WIRETEST_STATE_PG</ffdc>
-    <ffdc>MASTER_RX_WIRETEST_LANEINFO_PG</ffdc>
-    <ffdc>MASTER_RX_TRAINING_STATUS_PG</ffdc>
-    <ffdc>MASTER_RX_WT_CLK_STATUS_PG</ffdc>
-    <ffdc>SLAVE_RX_LANE_DISABLED_VEC_0_15_PG</ffdc>
-    <ffdc>SLAVE_RX_LANE_DISABLED_VEC_16_31_PG</ffdc>
-    <ffdc>SLAVE_RX_LANE_SWAPPED_VEC_0_15_PG</ffdc>
-    <ffdc>SLAVE_RX_INIT_STATE_PG</ffdc>
-    <ffdc>SLAVE_RX_WIRETEST_STATE_PG</ffdc>
-    <ffdc>SLAVE_RX_WIRETEST_LANEINFO_PG</ffdc>
-    <ffdc>SLAVE_RX_TRAINING_STATUS_PG</ffdc>
-    <ffdc>SLAVE_RX_WT_CLK_STATUS_PG</ffdc>
-    <callout>
-        <target>MASTER_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <target>SLAVE_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <bus>MASTER_TARGET,SLAVE_TARGET</bus>
-        <priority>HIGH</priority>
-    </callout>
-        <deconfigure>
-        <target>MASTER_TARGET</target>
-    </deconfigure>
-    <deconfigure>
-        <target>SLAVE_TARGET</target>
-    </deconfigure>
-        <gard>
-        <target>MASTER_TARGET</target>
-    </gard>
-    <gard>
-        <target>SLAVE_TARGET</target>
-    </gard>
-  </hwpError>
-  
-  
-    <hwpError>
-     <rc>IO_FUNCS_WIRETEST_FAIL_LANE_MASTER_DATA_RC</rc>
-     <description>FFDC for Wiretest failure in training ( PER LANE MASTER DATA ) </description>
-     <ffdc>CHIP_TARGET</ffdc>
-     <ffdc>LANEID</ffdc>
-     <ffdc>RX_WT_STATUS_PL</ffdc>
-  </hwpError>
-    
-        <hwpError>
-     <rc>IO_FUNCS_WIRETEST_FAIL_LANE_SLAVE_DATA_RC</rc>
-     <description>FFDC for Wiretest failure in training (PER LANE SLAVE DATA ) </description>
-     <ffdc>CHIP_TARGET</ffdc>
-     <ffdc>LANEID</ffdc>
-     <ffdc>RX_WT_STATUS_PL</ffdc>
-  </hwpError>
-        
-      <!-- ********************DESKEW *************************************************** -->
-      
-        <hwpError>
-    <rc>IO_FUNCS_DESKEW_FAIL_RC</rc>
-    <description>Deskew Training fail was reported in a P8 or Centaur status register</description>
-    <ffdc>MASTER_CHIP_INTERFACE</ffdc>
-    <ffdc>MASTER_GROUP</ffdc>
-    <ffdc>SLAVE_CHIP_INTERFACE</ffdc>
-    <ffdc>SLAVE_GROUP</ffdc>
-        <ffdc>MASTER_RX_INIT_STATE_PG</ffdc>
-    <ffdc>MASTER_RX_TRAINING_STATUS_PG</ffdc>
-    <ffdc>MASTER_RX_DESKEW_STATE_PG</ffdc>
-    <ffdc>MASTER_RX_LANE_BAD_0_15_PG</ffdc>
-    <ffdc>MASTER_RX_LANE_BAD_16_31_PG</ffdc>
-    <ffdc>SLAVE_RX_INIT_STATE_PG</ffdc>
-    <ffdc>SLAVE_RX_TRAINING_STATUS_PG</ffdc>
-    <ffdc>SLAVE_RX_DESKEW_STATE_PG</ffdc>
-      <ffdc>SLAVE_RX_LANE_BAD_0_15_PG</ffdc>
-    <ffdc>SLAVE_RX_LANE_BAD_16_31_PG</ffdc>
-    <callout>
-        <target>MASTER_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <target>SLAVE_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <bus>MASTER_TARGET,SLAVE_TARGET</bus>
-        <priority>HIGH</priority>
-    </callout>
-        <deconfigure>
-        <target>MASTER_TARGET</target>
-    </deconfigure>
-    <deconfigure>
-        <target>SLAVE_TARGET</target>
-    </deconfigure>
-        <gard>
-        <target>MASTER_TARGET</target>
-    </gard>
-    <gard>
-        <target>SLAVE_TARGET</target>
-    </gard>
-  </hwpError>
-        
-        
- 
-      <hwpError>
-     <rc>IO_FUNCS_DESKEW_FAIL_LANE_MASTER_DATA_RC</rc>
-     <description>FFDC for Deskew in training ( PER LANE MASTER DATA )</description>
-     <ffdc>CHIP_TARGET</ffdc>
-     <ffdc>LANEID</ffdc>
-    <ffdc>RX_DESKEW_STAT_PL</ffdc>
-    <ffdc>RX_STAT_PL</ffdc>
-    <ffdc>RX_VREF_PL</ffdc>
-    <ffdc>RX_FIFO_STAT_PL</ffdc>
-    <ffdc>RX_PROT_STATUS_PL</ffdc>
-  </hwpError>
-    
-    <hwpError>
-     <rc>IO_FUNCS_DESKEW_FAIL_LANE_SLAVE_DATA_RC</rc>
-     <description>FFDC for Deskew in training ( PER LANE SLAVE DATA )</description>
-     <ffdc>CHIP_TARGET</ffdc>
-     <ffdc>LANEID</ffdc>
-    <ffdc>RX_DESKEW_STAT_PL</ffdc>
-    <ffdc>RX_STAT_PL</ffdc>
-    <ffdc>RX_VREF_PL</ffdc>
-    <ffdc>RX_FIFO_STAT_PL</ffdc>
-    <ffdc>RX_PROT_STATUS_PL</ffdc>
-  </hwpError>
-  
-   <!-- ********************EYEOPT*************************************************** -->
-     <hwpError>
-    <rc>IO_FUNCS_EYEOPT_FAIL_RC</rc>
-    <description>Eye Optimization Training fail was reported in a P8 or Centaur status register</description>
-    <ffdc>MASTER_CHIP_INTERFACE</ffdc>
-    <ffdc>MASTER_GROUP</ffdc>
-    <ffdc>SLAVE_CHIP_INTERFACE</ffdc>
-    <ffdc>SLAVE_GROUP</ffdc>
-        <ffdc>MASTER_RX_TRAINING_STATUS_PG</ffdc>
-    <ffdc>MASTER_RX_EO_RECAL_PG</ffdc>
-        <ffdc>MASTER_RX_LANE_BAD_0_15_PG</ffdc>
-    <ffdc>MASTER_RX_LANE_BAD_16_31_PG</ffdc>
-    <ffdc>SLAVE_RX_TRAINING_STATUS_PG</ffdc>
-    <ffdc>SLAVE_RX_EO_RECAL_PG</ffdc>
-        <ffdc>SLAVE_RX_LANE_BAD_0_15_PG</ffdc>
-    <ffdc>SLAVE_RX_LANE_BAD_16_31_PG</ffdc>
-    <callout>
-        <target>MASTER_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <target>SLAVE_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <bus>MASTER_TARGET,SLAVE_TARGET</bus>
-        <priority>HIGH</priority>
-    </callout>
-        <deconfigure>
-        <target>MASTER_TARGET</target>
-    </deconfigure>
-    <deconfigure>
-        <target>SLAVE_TARGET</target>
-    </deconfigure>
-        <gard>
-        <target>MASTER_TARGET</target>
-    </gard>
-    <gard>
-        <target>SLAVE_TARGET</target>
-    </gard>
-  </hwpError>
-   
-    
-           <hwpError>
-     <rc>IO_FUNCS_EYEOPT_FAIL_LANE_MASTER_DATA_RC</rc>
-     <description>FFDC for Deskew in training ( PER LANE MASTER DATA )</description>
-     <ffdc>CHIP_TARGET</ffdc>
-     <ffdc>LANEID</ffdc>
-    <ffdc>RX_AP_PL</ffdc>
-    <ffdc>RX_AN_PL</ffdc>
-    <ffdc>RX_AMIN_PL</ffdc>
-    <ffdc>RX_H1_EVEN_PL</ffdc>
-    <ffdc>RX_H1_ODD_PL</ffdc>
-    <ffdc>RX_EYE_OPT_STATE_PL</ffdc> 
-    <ffdc>RX_EYE_WIDTH_STATUS_PL</ffdc> 
-    <ffdc>RX_DCD_ADJ_PL</ffdc>
-    
-  </hwpError>
-    
-    <hwpError>
-     <rc>IO_FUNCS_EYEOPT_FAIL_LANE_SLAVE_DATA_RC</rc>
-     <description>FFDC for Deskew in training ( PER LANE SLAVE DATA )</description>
-     <ffdc>CHIP_TARGET</ffdc>
-     <ffdc>LANEID</ffdc>
-    <ffdc>RX_AP_PL</ffdc>
-    <ffdc>RX_AN_PL</ffdc>
-    <ffdc>RX_AMIN_PL</ffdc>
-    <ffdc>RX_H1_EVEN_PL</ffdc>
-    <ffdc>RX_H1_ODD_PL</ffdc>
-    <ffdc>RX_EYE_OPT_STATE_PL</ffdc> 
-    <ffdc>RX_EYE_WIDTH_STATUS_PL</ffdc> 
-    <ffdc>RX_DCD_ADJ_PL</ffdc>
-    
-  </hwpError>
-      
-      
-       <!-- ********************REPAIR *************************************************** -->
-         <hwpError>
-    <rc>IO_FUNCS_REPAIR_FAIL_RC</rc>
-    <description>Static Repair Training fail was reported in a P8 or Centaur status register</description>
-    <ffdc>MASTER_CHIP_INTERFACE</ffdc>
-    <ffdc>MASTER_GROUP</ffdc>
-    <ffdc>SLAVE_CHIP_INTERFACE</ffdc>
-    <ffdc>SLAVE_GROUP</ffdc>
-        <ffdc>MASTER_RX_STATIC_REPAIR_STATE_PG</ffdc>
-    <ffdc>MASTER_RX_TRAINING_STATUS_PG</ffdc>
-    <ffdc>MASTER_RX_BAD_LANE_ENC_GCRMSG_PG</ffdc>
-    <ffdc>SLAVE_RX_STATIC_REPAIR_STATE_PG</ffdc>
-    <ffdc>SLAVE_RX_TRAINING_STATUS_PG</ffdc>
-    <ffdc>SLAVE_RX_BAD_LANE_ENC_GCRMSG_PG</ffdc>
-    <callout>
-        <target>MASTER_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <target>SLAVE_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <bus>MASTER_TARGET,SLAVE_TARGET</bus>
-        <priority>HIGH</priority>
-    </callout>
-          <deconfigure>
-        <target>MASTER_TARGET</target>
-    </deconfigure>
-    <deconfigure>
-        <target>SLAVE_TARGET</target>
-    </deconfigure>
-        <gard>
-        <target>MASTER_TARGET</target>
-    </gard>
-    <gard>
-        <target>SLAVE_TARGET</target>
-    </gard>
-  </hwpError>
-       
-
-        <!-- ********************FUNC MODE *************************************************** -->
-          <hwpError>
-    <rc>IO_FUNCS_FUNC_FAIL_RC</rc>
-    <description>Functional mode Training fail was reported in a P8 or Centaur status register</description>
-    <ffdc>MASTER_CHIP_INTERFACE</ffdc>
-    <ffdc>MASTER_GROUP</ffdc>
-    <ffdc>SLAVE_CHIP_INTERFACE</ffdc>
-    <ffdc>SLAVE_GROUP</ffdc>
-    <ffdc>MASTER_RX_FUNC_STATE_PG</ffdc>
-    <ffdc>MASTER_RX_TRAINING_STATUS_PG</ffdc>
-    <ffdc>SLAVE_RX_FUNC_STATE_PG</ffdc>
-    <ffdc>SLAVE_RX_TRAINING_STATUS_PG</ffdc>
-    <callout>
-        <target>MASTER_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <target>SLAVE_TARGET</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <bus>MASTER_TARGET,SLAVE_TARGET</bus>
-        <priority>HIGH</priority>
-    </callout>
-        <deconfigure>
-        <target>MASTER_TARGET</target>
-    </deconfigure>
-    <deconfigure>
-        <target>SLAVE_TARGET</target>
-    </deconfigure>
-        <gard>
-        <target>MASTER_TARGET</target>
-    </gard>
-    <gard>
-        <target>SLAVE_TARGET</target>
-    </gard>
-  </hwpError>
-          
-          
- </hwpErrors>
diff --git a/src/usr/hwpf/hwp/bus_training/io_power_down_lanes_errors.xml b/src/usr/hwpf/hwp/bus_training/io_power_down_lanes_errors.xml
deleted file mode 100644
index 75a399d97..000000000
--- a/src/usr/hwpf/hwp/bus_training/io_power_down_lanes_errors.xml
+++ /dev/null
@@ -1,37 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/bus_training/io_power_down_lanes_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2014                   -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: io_power_down_lanes_errors.xml,v 1.2 2014/03/18 14:58:41 jgrell Exp $ -->
-
-<!-- Error definitions for io_power_down_lanes.o_power_down_lanes.CC  -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_POWER_DOWN_LANES_INVALID_INVOCATION_RC</rc>
-    <description>io_power_down_lanes invoked with incorrect target type</description>
-    <ffdc>TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/bus_training/io_read_erepair_errors.xml b/src/usr/hwpf/hwp/bus_training/io_read_erepair_errors.xml
deleted file mode 100644
index 36fe3cc83..000000000
--- a/src/usr/hwpf/hwp/bus_training/io_read_erepair_errors.xml
+++ /dev/null
@@ -1,37 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/bus_training/io_read_erepair_errors.xml $    -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2014                   -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: io_read_erepair_errors.xml,v 1.2 2014/03/18 14:58:41 jgrell Exp $ -->
-
-<!-- Error definitions for IO_READ_EREPAIR HWPS  -->
-<hwpErrors>
-   <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_READ_EREPAIR_INVALID_INVOCATION_RC</rc>
-    <description>io_run_training invoked with wrong pair of targets</description>
-    <ffdc>TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/bus_training/io_restore_erepair_errors.xml b/src/usr/hwpf/hwp/bus_training/io_restore_erepair_errors.xml
deleted file mode 100644
index eae5725e6..000000000
--- a/src/usr/hwpf/hwp/bus_training/io_restore_erepair_errors.xml
+++ /dev/null
@@ -1,35 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/bus_training/io_restore_erepair_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2014                   -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: io_restore_erepair_errors.xml,v 1.2 2014/03/17 18:54:00 dedahle Exp $ -->
-<!-- Error definitions for IO_RESTORE_EREPAIR  -->
-<hwpErrors> 
-  <hwpError>
-    <rc>IO_RESTORE_EREPAIR_INVALID_INVOCATION_RC</rc>
-    <description>io_restore_erepair invoked with incorrect target type</description>
-    <ffdc>TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/bus_training/io_run_training_errors.xml b/src/usr/hwpf/hwp/bus_training/io_run_training_errors.xml
deleted file mode 100644
index d8232e452..000000000
--- a/src/usr/hwpf/hwp/bus_training/io_run_training_errors.xml
+++ /dev/null
@@ -1,105 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/bus_training/io_run_training_errors.xml $    -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: io_run_training_errors.xml,v 1.8 2014/03/17 18:54:00 dedahle Exp $ -->
-<!-- Error definitions for IO_RUN_TRAINING  -->
-<hwpErrors>
-  <hwpError>
-    <rc>IO_RUN_TRAINING_SET_PLL_INVALID_INVOCATION_RC</rc>
-    <description>io_training_set_pll_post_wiretest invoked with incorrect target type</description>
-    <ffdc>TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-     <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_RUN_TRAINING_POST_TRAINING_INVALID_INVOCATION_RC</rc>
-    <description>io_training_set_pll_post_wiretest invoked with incorrect target type</description>
-    <ffdc>TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-     <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_RUN_TRAINING_CHECK_DLL_VAL_OUT_OF_BOUND_RC</rc>
-    <description>DLL Workaround encountered unexpected start value</description>
-    <ffdc>DLL_REG</ffdc>
-    <callout>
-      <target>TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>TARGET</target>
-    </deconfigure>
-    <gard>
-      <target>TARGET</target>
-    </gard>
-  </hwpError>
-   <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>IO_RUN_TRAINING_CHECK_DLL_WORKAROUND_FAIL</rc>
-    <description>DLL Workaround failed to arrive at a solution</description>
-    <ffdc>DLL_REG</ffdc>
-    <callout>
-      <target>TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>TARGET</target>
-    </deconfigure>
-    <gard>
-      <target>TARGET</target>
-    </gard>
-  </hwpError>
-      <!-- *********************************************************************** -->
-    <hwpError>
-     <rc>IO_RUN_TRAINING_FIR_MAX_SPARES_EXCEEDED_RC</rc>
-     <description>maximum spares possible to deploy exceeded</description>
-     <ffdc>CHIP_TARGET</ffdc>
-     <ffdc>SPARE_ERROR_REG</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP_TARGET</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP_TARGET</target>
-    </gard>
-  </hwpError>
-      <!-- *********************************************************************** -->
-   <hwpError>
-    <rc>IO_RUN_TRAINING_INVALID_TARGET_PAIR_RC</rc>
-    <description>io_run_training invoked with wrong pair of targets</description>
-    <ffdc>MASTER_TARGET</ffdc>
-    <ffdc>SLAVE_TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/cen_fir_registers.xml b/src/usr/hwpf/hwp/cen_fir_registers.xml
deleted file mode 100644
index b1c973685..000000000
--- a/src/usr/hwpf/hwp/cen_fir_registers.xml
+++ /dev/null
@@ -1,158 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/cen_fir_registers.xml $                      -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2014                             -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: cen_fir_registers.xml,v 1.1 2014/07/23 20:16:05 jmcgill Exp $ -->
-<!-- Definition of FIR registers to collect on some errors -->
-<hwpErrors>
-  <!-- ******************************************************************** -->
-  <!-- All FIRs *********************************************************** -->
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_CEN_FIR_FFDC</rc>
-    <description>
-      FFDC collected on Centaur FIR errors
-    </description>
-    <ffdc>TARGET</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_CEN_CHIP_MASTER_INTERRUPT_REGISTERS</id>
-      <id>REG_FFDC_CEN_CHIP_GLOB_XFIR_REGISTERS</id>
-      <id>REG_FFDC_CEN_CHIP_GLOB_RFIR_REGISTERS</id>
-      <id>REG_FFDC_CEN_CHIP_GLOB_FIR_MASK_REGISTERS</id>
-      <id>REG_FFDC_CEN_CHIP_GLOB_ATTN_REGISTERS</id>
-      <id>REG_FFDC_CEN_CHIP_GLOB_ATTN_MASK_REGISTERS</id>
-      <id>REG_FFDC_CEN_CHIP_LFIR_REGISTERS</id>
-      <id>REG_FFDC_CEN_CHIP_LFIR_MASK_REGISTERS</id>
-      <target>TARGET</target>
-    </collectRegisterFfdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_CEN_MBA_LFIR_REGISTERS</id> 
-      <id>REG_FFDC_CEN_MBA_LFIR_MASK_REGISTERS</id>
-      <childTargets>
-        <parent>TARGET</parent>
-        <childType>TARGET_TYPE_MBA_CHIPLET</childType>
-      </childTargets>
-    </collectRegisterFfdc>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <!-- Chip Level FFDC **************************************************** -->
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CEN_CHIP_MASTER_INTERRUPT_REGISTERS</id>
-    <cfamRegister>CFAM_FSI_STATUS_0x00001007</cfamRegister>
-    <scomRegister>MASTER_PCB_INT_0x000F001A</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CEN_CHIP_GLOB_XFIR_REGISTERS</id>
-    <scomRegister>READ_GLOBAL_XSTOP_FIR_0x570F001B</scomRegister>
-    <scomRegister>TP_XSTOP_0x01040000</scomRegister>
-    <scomRegister>NEST_XSTOP_0x02040000</scomRegister>
-    <scomRegister>MEM_XSTOP_0x03040000</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CEN_CHIP_GLOB_RFIR_REGISTERS</id>
-    <scomRegister>READ_GLOBAL_RECOV_FIR_0x570F001C</scomRegister>
-    <scomRegister>TP_RECOV_0x01040001</scomRegister>
-    <scomRegister>NEST_RECOV_0x02040001</scomRegister>
-    <scomRegister>MEM_RECOV_0x03040001</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CEN_CHIP_GLOB_FIR_MASK_REGISTERS</id>
-    <scomRegister>TP_FIR_MASK_0x01040002</scomRegister>
-    <scomRegister>NEST_FIR_MASK_0x02040002</scomRegister>
-    <scomRegister>MEM_FIR_MASK_0x03040002</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CEN_CHIP_GLOB_ATTN_REGISTERS</id>
-    <scomRegister>READ_GLOBAL_SPATT_FIR_0x570F001A</scomRegister>
-    <scomRegister>TP_SPATTN_0x01040004</scomRegister>
-    <scomRegister>NEST_SPATTN_0x02040004</scomRegister>
-    <scomRegister>MEM_SPATTN_0x03040004</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CEN_CHIP_GLOB_ATTN_MASK_REGISTERS</id>
-    <scomRegister>TP_SPATTN_MASK_0x01040007</scomRegister>
-    <scomRegister>NEST_SPATTN_MASK_0x02040007</scomRegister>
-    <scomRegister>MEM_SPATTN_MASK_0x03040007</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CEN_CHIP_LFIR_REGISTERS</id>
-    <scomRegister>TP_PERV_LFIR_0x0104000A</scomRegister>
-    <scomRegister>NEST_PERV_LFIR_0x0204000A</scomRegister>
-    <scomRegister>CEN_DMIFIR_0x02010400</scomRegister>
-    <scomRegister>MBI_FIR_0x02010800</scomRegister>
-    <scomRegister>MBS_FIR_REG_0x02011400</scomRegister>
-    <scomRegister>MBS_ECC0_MBECCFIR_0x02011440</scomRegister>
-    <scomRegister>MBS_ECC1_MBECCFIR_0x02011480</scomRegister>
-    <scomRegister>MBS01_MBSFIRQ_0x02011600</scomRegister>
-    <scomRegister>MBS23_MBSFIRQ_0x02011700</scomRegister>
-    <scomRegister>FBISTN_FIR_REG_0x02010880</scomRegister>
-    <scomRegister>SCAC_LFIR_0x020115C0</scomRegister>
-    <scomRegister>MBSS_FIR_REG_0x0201141E</scomRegister>
-    <scomRegister>MEM_PERV_LFIR_0x0304000A</scomRegister>
-    <scomRegister>FBISTM_FIR_REG_0x03010480</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CEN_CHIP_LFIR_MASK_REGISTERS</id>
-    <scomRegister>TP_PERV_LFIR_MASK_0x0104000D</scomRegister>
-    <scomRegister>NEST_PERV_LFIR_MASK_0x0204000D</scomRegister>
-    <scomRegister>CEN_DMIFIR_MASK_0x02010403</scomRegister>
-    <scomRegister>MBI_FIRMASK_0x02010803</scomRegister>
-    <scomRegister>MBS_FIR_MASK_REG_0x02011403</scomRegister>
-    <scomRegister>MBS_ECC0_MBECCFIR_MASK_0x02011443</scomRegister>
-    <scomRegister>MBS_ECC1_MBECCFIR_MASK_0x02011483</scomRegister>
-    <scomRegister>MBS01_MBSFIRMASK_0x02011603</scomRegister>
-    <scomRegister>MBS23_MBSFIRMASK_0x02011703</scomRegister>
-    <scomRegister>FBISTN_FIR_MASK_REG_0x02010883</scomRegister>
-    <scomRegister>SCAC_FIRMASK_0x020115C3</scomRegister>
-    <scomRegister>MBSS_FIR_MASK_REG_0x02011421</scomRegister>
-    <scomRegister>MEM_PERV_LFIR_MASK_0x0304000D</scomRegister>
-    <scomRegister>FBISTM_FIR_MASK_REG_0x03010483</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <!-- MBA Chiplet Level FFDC ********************************************* -->
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CEN_MBA_LFIR_REGISTERS</id>
-    <scomRegister>MBA01_MBACALFIR_0x03010400</scomRegister>
-    <scomRegister>MBA01_MBAFIRQ_0x03010600</scomRegister>
-    <scomRegister>PHY01_DDRPHY_FIR_REG_0x800200900301143f</scomRegister>
-    <scomRegister>MBAS_FIR_REG_0x0301041B</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CEN_MBA_LFIR_MASK_REGISTERS</id>
-    <scomRegister>MBA01_MBACALFIR_MASK_0x03010403</scomRegister>
-    <scomRegister>MBA01_MBAFIRMASK_0x03010603</scomRegister>
-    <scomRegister>PHY01_DDRPHY_FIR_MASK_REG_0x800200930301143f</scomRegister>
-    <scomRegister>MBAS_FIR_MASK_REG_0x0301041E</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/centaur_ec_attributes.xml b/src/usr/hwpf/hwp/centaur_ec_attributes.xml
deleted file mode 100644
index 8533e4b82..000000000
--- a/src/usr/hwpf/hwp/centaur_ec_attributes.xml
+++ /dev/null
@@ -1,481 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/centaur_ec_attributes.xml $                  -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<attributes>
-<!-- ********************************************************************* -->
-  <!-- $Id: centaur_ec_attributes.xml,v 1.31 2015/01/14 16:30:24 jdsloat Exp $ -->
-  <attribute>
-    <id>ATTR_CENTAUR_EC_ENABLE_TRACE_ARRAY_CLKSTOP_ON_XSTOP_FW624741</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.  If true, it sets stop on error for xtsop in the Centaur arrays using ATTR_CENTAUR_EC_ENABLE_TRACE_ARRAY_CLKSTOP_ON_XSTOP_FW624741.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_ENABLE_SAFE_MODE_THROTTLE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.  If true, it sets Safe mode throttles using sys attributes  ATTR_MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP and ATTR_MRW_MEM_THROTTLE_DENOMINATOR.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_ENABLE_RCE_WITH_OTHER_ERRORS_HW246685</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.  If true, it allow RCE to be reported even if we also have chip marks or symbol marks in place. MBSTR(60)=1 and MBSECC(16)=1, DD2 is set.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_ENABLE_PAGE_MODE_FOR_RRQ</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.  If true, it allows super fast read to go faster. MBA_RRQ0Q(57) cfg_rrq_opp_page_mode_en RW DD2 is set.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_ENABLE_TRACE_LCL_CLK_GATE_CTRL</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.  For HW259719. If true, Trace LCL_CLK_GATE_CTRL will be enabled.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_ENABLE_NM_CHANGE_AFTER_SYNC</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.  IF TRUE, ENABLE NM change after sync.
-        This fix that is going into DD2 (to use values in N/M shadow registers when a sync command is seen), we should be able to change M to a different value if we wanted to without any issues.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_ENABLE_ROW_HAMMER_FEATURE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.  IF TRUE, Enable ROW HAMMER ENHANCEMENT FOR DD2.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_WRITE_FIR_MASK_FEATURE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-      Returns true if the chip needs to fix the fir_mask register in the DDRPHY.  This is for HW217419.
-	True if: Centaur EC 10
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x10</value>
-          <test>EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-
-  <attribute>
-    <id>ATTR_CENTAUR_BLUEWATERFALL_NWELL_BROKEN_CHECK_FLAG</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on DD1.0 (TRUE), otherwise FALSE.  If true, subversion will be checked in mss_get_cen_ecid.C to determine if changes need to be made to the transistor misplaced in the nwell.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x10</value>
-          <test>EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_MSS_CONTINUE_ON_DP18_PLL_LOCK_FAIL</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-Controls the ddr_phy_reset procedure.  When set to TRUE, the procedure will continue with processing other DP18 blocks, if one fails.  In DD2, this attribute must be set to false so that the failing hardware (centaur) is marked as bad and not the DIMM.  Set by firwmare using the EC level or by a MRW
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x10</value>
-          <test>EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_MSS_READ_PHASE_SELECT_RESET</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-      If true, then training and periodic training needs to make adjustments to the read phase select.
-      In DD2, this is expected to be fixed.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x10</value>
-          <test>EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_CHECK_L4_CACHE_ENABLE_UNKNOWN</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-      If true then mss_get_cen_ecid needs to read an ECBIT from the ECID in
-      order to determine if the L4 Cache Enable data in the ECID is in an
-      unknown state.
-      This is true for Centaur 1.*
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-<attribute>
-    <id>ATTR_MSS_DISABLE1_REG_FIXED</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.  If false, then draminit_training will also set the wrclk registers to disable appropriate dqs based on the bad bit map attribute and the swizzle(board dependent).  If true, draminit_training will just do the default disable0 and disable1 registers.</description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_DISABLE1_RDCLK_REG_FIXED</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.  If false, then draminit_training will also set the rdclk registers to disable appropriate dqs based on the bad bit map attribute and the swizzle(board dependent).  If true, draminit_training will just do the default disable0 and disable1 registers.</description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-</attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_ECID_CONTAINS_PORT_LOGIC_BAD_INDICATION</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-      If true then mss_get_cen_ecid reads the ECID bits to determine if
-      logic on either of the ports are good.  For DD2, these bits are not
-      used for this purpose and so the check is not made.
-      This is true for Centaur 1.*
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_MCBIST_RANDOM_DATA_GEN</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.   If false, this will enable the  power bus ECC and FIFO mode workarounds of DD1.x for Random Data .
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_MCBIST_TRAP_RESET</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE. If false, work around for error trap reset logic which  clears  trap registers will be enabled.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_MCBIST_RANDOM_ADDRESS</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.   If false, this will enable workaround for start and end counters for Random Addressing.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-    <attribute>
-    <id>ATTR_CENTAUR_EC_SCOM_PARITY_ERROR_HW244827_FIXED</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.  If false, draminit_mc will execute a putscom to clear the scom parity error fir for all densities on DD1.X parts.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-    <attribute>
-    <id>ATTR_CENTAUR_EC_HW217608_MBSPA_0_CMD_COMPLETE_ATTN_FIXED</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.  If true, MBSPA bit 8 is masked, and MBSPA bit 0 is unmasked and configured to report when maint cmd either stops clean or stops on error. Otherwise, MBSPA bit 0 is masked, and MBSPA bit 8 is unmasked. NOTE: For DD1 when using MBSPA bit 8, a scan init is needed to enable the WAT workaround allows bit 8 to report when maint cmd either stops clean or stops on error. The scan init is enabled for DD1 and disabled for DD2, but does not use this same attribute.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_USE_FIRST_SUPPLIER_FOR_INVALID_MODULE_ID</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        The getMBvpdSlopeInterceptData Attribute Accessor returns power data from the MW (master) and MV (supplier) Centaur DIMM VPD.
-        For MV attributes, the Attribute Accessor finds the Manufacturer-ID from JEDEC SPD (#I) and then matches it to a Supplier-ID in the array of supplier entries in the MV field .
-        For Centaur DD 1.X chips, the Manufacturer-ID may be invalid.
-The getMBvpdSlopeInterceptData Attribute Accessor, if it does not find a matching Supplier-ID in MV, will  return the data for the first supplier on Centaur DD 1.X chips.
-       This is true for Centaur 1.*
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_ENABLE_SAFEMODE_THROTTLE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.   If true, this will enable safe mode throttle values to be set during the IPL in mss_thermal_init.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-    <attribute>
-    <id>ATTR_CENTAUR_EC_DD2_FIR_BIT_DEFN_CHANGES</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.  If true, mss_unmask_errors.C will use the DD2 FIR bit definitions when setting FIR action regs and masks.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-      <id>ATTR_CENTAUR_EC_RDCLK_PR_UPDATE_HW236658_FIXED</id>
-      <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-      <description>
-         Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.  If false, draminit_mc will execute a putscom to set bit 52 (PER_RDCLK_UPDATE_DISABLE) of DP18 Read Diag Cfg 5 on DD1.X parts.
-      </description>
-      <chipEcFeature>
-        <chip>
-          <name>ENUM_ATTR_NAME_CENTAUR</name>
-          <ec>
-            <value>0x20</value>
-            <test>GREATER_THAN_OR_EQUAL</test>
-          </ec>
-        </chip>
-       </chipEcFeature>
-   </attribute>
-
-    <attribute>
-    <id>ATTR_CENTAUR_EC_DD2_ENABLE_EXIT_POINT_1</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on DD2.x or newer (TRUE), otherwise FALSE.  If true, exit point 1 will be enabled if any mark in markstore.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CENTAUR_EC_DISABLE_VDDR_DYNAMIC_VID</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Set by the platform depending on EC less than DD2.0 (TRUE), otherwise FALSE.   If true, mss_volt_vddr_offset will use the value from mss_volt instead of the calculated dynamic vid value, even if vddr dynamic vid is enabled in the MRW.  Centaur DD1.X chips need vmem voltage to be at 1.35V.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-
-</attributes>
diff --git a/src/usr/hwpf/hwp/chip_accessors/chip.mk b/src/usr/hwpf/hwp/chip_accessors/chip.mk
deleted file mode 100644
index e98de05ec..000000000
--- a/src/usr/hwpf/hwp/chip_accessors/chip.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/hwp/chip_accessors/chip.mk $
-#
-# OpenPOWER HostBoot Project
-#
-# Contributors Listed Below - COPYRIGHT 2014,2015
-# [+] International Business Machines Corp.
-#
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/chip_accessors
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp/chip_accessors
-
-VPATH += ${HWPPATH}/chip_accessors
-
-OBJS += getPciOscswitchConfig.o
-OBJS += getOscswitchCtlAttr.o
-OBJS += getTdpRdpCurrentFactor.o
-
diff --git a/src/usr/hwpf/hwp/chip_accessors/chip_errors.xml b/src/usr/hwpf/hwp/chip_accessors/chip_errors.xml
deleted file mode 100644
index c9abf520e..000000000
--- a/src/usr/hwpf/hwp/chip_accessors/chip_errors.xml
+++ /dev/null
@@ -1,121 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/chip_accessors/chip_errors.xml $             -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2014,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: chip_errors.xml,v 1.5 2015/08/11 08:55:24 whs Exp $ -->
-<hwpErrors>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_OSC_SWITCH_UNEXPECTED_CHIP_TYPE</rc>
-    <description>
-        The hwp accessor encountered an unexpected chip type.
-    </description>
-    <ffdc>FFDC_CHIP_TYPE</ffdc>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_OSC_SWITCH_UNEXPECTED_CHIP_POSITION</rc>
-    <description>
-        The hwp accessor encountered an unexpected chip position.
-    </description>
-    <ffdc>FFDC_CHIP_POSITION</ffdc>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_OSC_SWITCH_UNEXPECTED_CHIP_EC</rc>
-    <description>
-        The hwp accessor encountered an unexpected chip ec.
-    </description>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <ffdc>FFDC_CHIP_EC</ffdc>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_OSC_SWITCH_CTL_UNEXPECTED_CHIP_TYPE</rc>
-    <description>
-        No entry in oscswitch ctl date for this chip type
-    </description>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <ffdc>FFDC_CHIP_TYPE</ffdc>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_OSC_SWITCH_CTL_UNEXPECTED_ATTR</rc>
-    <description>
-        Attribute request out of expected range.
-    </description>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <ffdc>FFDC_UNEXPECTED_ATTR</ffdc>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_OSC_SWITCH_CTL_INVALID_ATTR_SIZE</rc>
-    <description>
-        Oscswitch ctl attribute size passed does not match type of data to return
-    </description>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <ffdc>FFDC_ATTR</ffdc>
-    <ffdc>FFDC_EXPECTED_SIZE</ffdc>
-    <ffdc>FFDC_PASSED_SIZE</ffdc>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_INSUFFICIENT_VPD_RETURNED</rc>
-    <description>
-        VPD keyword record returned is smaller than expected.
-        Probably a firmware bug, but could be bad VPD
-    </description>
-    <ffdc>KEYWORD</ffdc>
-    <ffdc>RETURNED_SIZE</ffdc>
-    <ffdc>EXPECTED_SIZE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/chip_accessors/getOscswitchCtlAttr.C b/src/usr/hwpf/hwp/chip_accessors/getOscswitchCtlAttr.C
deleted file mode 100644
index 8ba0d9f93..000000000
--- a/src/usr/hwpf/hwp/chip_accessors/getOscswitchCtlAttr.C
+++ /dev/null
@@ -1,190 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/chip_accessors/getOscswitchCtlAttr.C $       */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: getOscswitchCtlAttr.C,v 1.1 2014/05/23 01:19:13 whs Exp $
-/**
- *  @file getOscswitchCtlAttr.C
- *
- *  @brief Accessor for providing the ATTR_OSCSWITCH_CTLx attributes
- *
- */
-
-#include    <stdint.h>
-
-//  fapi support
-#include    <fapi.H>
-#include    <fapiUtil.H>
-#include    <getOscswitchCtlAttr.H>
-
-extern "C"
-{
-using   namespace   fapi;
-
-fapi::ReturnCode getOscswitchSizeCheck(
-                                  const fapi::getOscswitchCtl::Attr i_attr,
-                                  const size_t i_fieldSize,
-                                  const size_t i_len);
-
-// ----------------------------------------------------------------------------
-// HWP accessor for providing ATTR_OSCSWITCH_CTLx attributes
-// ----------------------------------------------------------------------------
-fapi::ReturnCode getOscswitchCtlAttr( const fapi::Target & i_pProcTarget,
-                                  const fapi::getOscswitchCtl::Attr i_attr,
-                                  void * o_pVal,
-                                  const size_t i_len)
-{
-    fapi::ReturnCode l_fapirc;
-
-    FAPI_DBG("getOscswitchCtlAttr: entry ");
-
-    do {
-        // see if platform has redundant clocks
-        uint8_t  l_redundantClocks = 0;
-        l_fapirc = FAPI_ATTR_GET(ATTR_REDUNDANT_CLOCKS,
-                                          NULL,
-                                          l_redundantClocks);
-        if (l_fapirc)
-        {
-             FAPI_ERR("getOscswitchCtlAttr:FAPI_ATTR_GET(ATTR_REDUNDANT_CLOCKS)"
-                     " failed w/rc=0x%08x",
-                     static_cast<uint32_t>(l_fapirc) );
-            break; // break out with error
-        }
-
-        // find the chip type if there are redundant clocks, otherwise use
-        // the ENUM_ATTR_NAME_NONE entry for systems without redundant clocks
-        fapi::ATTR_NAME_Type    l_chipType = ENUM_ATTR_NAME_NONE ;
-        if (l_redundantClocks)
-        {
-            // Get chip type
-            l_fapirc = FAPI_ATTR_GET_PRIVILEGED(ATTR_NAME,
-                                          &i_pProcTarget,
-                                          l_chipType);
-            if (l_fapirc)
-            {
-                 FAPI_ERR("getOscswitchCtlAttr:"
-                         " FAPI_ATTR_GET_PRIVILEGED(ATTR_NAME) "
-                         "failed w/rc=0x%08x",
-                         static_cast<uint32_t>(l_fapirc) );
-                break; // break out with error
-            }
-        }
-        FAPI_DBG("getOscswitchCtlAttr: Chip type=0x%02x",l_chipType);
-
-        // find entry in Oscswitch Ctl data table
-        const    getOscswitchCtl::OSCSWITCH_CTL_DATA * l_pOscswitchCtlData =
-                 reinterpret_cast<const getOscswitchCtl::OSCSWITCH_CTL_DATA *>
-                 (&getOscswitchCtl::OSCSWITCH_CTL_DATA_array);
-        uint8_t l_data = 0;
-        uint8_t l_tableSize = sizeof(getOscswitchCtl::OSCSWITCH_CTL_DATA_array)/
-                               sizeof(getOscswitchCtl::OSCSWITCH_CTL_DATA);
-        for (l_data = 0; l_data<l_tableSize; l_data++)
-        {
-            if (l_pOscswitchCtlData[l_data].l_CHIP_TYPE == l_chipType)
-            {
-                break; //found match. Could add EC check here if ever needed
-            }
-        }
-        if (l_data >= l_tableSize) // did not find an entry
-        {
-            const uint32_t FFDC_CHIP_TYPE = l_chipType;
-            FAPI_SET_HWP_ERROR(l_fapirc,RC_OSC_SWITCH_CTL_UNEXPECTED_CHIP_TYPE);
-            break ; // break with error
-        }
-
-        // return requested attribute value
-        switch (i_attr)
-        {
-            case fapi::getOscswitchCtl::CTL0:
-            {
-                uint32_t * l_pCtl0 = (uint32_t *) o_pVal;
-                l_fapirc = getOscswitchSizeCheck(i_attr,
-                           sizeof (l_pOscswitchCtlData[l_data].l_CTL0),
-                           i_len);
-                if (l_fapirc)
-                {
-                    break; // break with error
-                }
-                *l_pCtl0 = l_pOscswitchCtlData[l_data].l_CTL0;
-                break;
-            }
-            case fapi::getOscswitchCtl::CTL1:
-            {
-                uint8_t * l_pCtl1 = (uint8_t *) o_pVal;
-                l_fapirc = getOscswitchSizeCheck(i_attr,
-                           sizeof (l_pOscswitchCtlData[l_data].l_CTL1),
-                           i_len);
-                if (l_fapirc)
-                {
-                    break; // break with error
-                }
-                *l_pCtl1 = l_pOscswitchCtlData[l_data].l_CTL1;
-                break;
-            }
-            case fapi::getOscswitchCtl::CTL2:
-            {
-                uint32_t * l_pCtl2 = (uint32_t *) o_pVal;
-                l_fapirc = getOscswitchSizeCheck(i_attr,
-                           sizeof (l_pOscswitchCtlData[l_data].l_CTL2),
-                           i_len);
-                if (l_fapirc)
-                {
-                    break; // break with error
-                }
-                *l_pCtl2 = l_pOscswitchCtlData[l_data].l_CTL2;
-                break;
-            }
-            default:
-            {
-                const uint8_t FFDC_UNEXPECTED_ATTR = i_attr;
-                FAPI_SET_HWP_ERROR(l_fapirc,RC_OSC_SWITCH_CTL_UNEXPECTED_ATTR);
-                break ; // break with error
-            }
-        }
-
-    } while (0);
-
-    FAPI_DBG("getOscswitchCtlAttr: exit rc=0x%08x)",
-               static_cast<uint32_t>(l_fapirc));
-
-    return  l_fapirc;
-}
-
-// check output field length
-fapi::ReturnCode getOscswitchSizeCheck(
-                                  const fapi::getOscswitchCtl::Attr i_attr,
-                                  const size_t i_fieldSize,
-                                  const size_t i_len)
-{
-    fapi::ReturnCode l_fapirc;
-    if (i_len != i_fieldSize)
-    {
-        const fapi::getOscswitchCtl::Attr FFDC_ATTR = i_attr;
-        const size_t  FFDC_EXPECTED_SIZE = i_fieldSize;
-        const size_t  FFDC_PASSED_SIZE = i_len;
-        FAPI_SET_HWP_ERROR(l_fapirc,RC_OSC_SWITCH_CTL_INVALID_ATTR_SIZE);
-    }
-    return  l_fapirc;
-}
-
-
-}   // extern "C"
diff --git a/src/usr/hwpf/hwp/chip_accessors/getPciOscswitchConfig.C b/src/usr/hwpf/hwp/chip_accessors/getPciOscswitchConfig.C
deleted file mode 100644
index 7211a8048..000000000
--- a/src/usr/hwpf/hwp/chip_accessors/getPciOscswitchConfig.C
+++ /dev/null
@@ -1,159 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/chip_accessors/getPciOscswitchConfig.C $     */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: getPciOscswitchConfig.C,v 1.2 2014/01/15 20:03:06 whs Exp $
-/**
- *  @file getPciOscswitchConfig.C
- *
- *  @brief Accessor for providing the ATTR_PCI_OSCSWITCH_CONFIG attribute
- *
- */
-
-#include    <stdint.h>
-
-//  fapi support
-#include    <fapi.H>
-#include    <fapiUtil.H>
-#include    <getPciOscswitchConfig.H>
-
-extern "C"
-{
-using   namespace   fapi;
-
-fapi::ReturnCode getPciOscswitchConfig(
-                              const fapi::Target   &i_procTarget,
-                              uint8_t  & o_val)
-{
-    fapi::ReturnCode l_fapirc;
-    fapi::ATTR_NAME_Type    l_chipType = 0x00;
-    const uint32_t DEFAULT_EC_VALUE = 0x10;
-    uint8_t        l_attrDdLevel = DEFAULT_EC_VALUE;
-    uint32_t       l_position = 0;
-
-    FAPI_DBG("getPciOscswitchConfig: entry ");
-
-    do {
-        FAPI_DBG("getPciOscswitchConfig: parent path=%s ",
-             i_procTarget.toEcmdString()  );
-
-        // Get chip type
-        l_fapirc = FAPI_ATTR_GET_PRIVILEGED(ATTR_NAME,
-                                          &i_procTarget,
-                                          l_chipType);
-        if (l_fapirc)  {
-            FAPI_ERR("getPciOscswitchConig:FAPI_ATTR_GET_PRIVILEGED(ATTR_NAME) "
-                         "failed w/rc=0x%08x",
-                         static_cast<uint32_t>(l_fapirc) );
-           break; // break out with error
-        }
-        FAPI_DBG("getPciOscswitchConfig: Chip type=0x%02x",l_chipType);
-
-        // Get EC level
-        l_fapirc = FAPI_ATTR_GET_PRIVILEGED(ATTR_EC,
-                                          &i_procTarget,
-                                          l_attrDdLevel);
-        if (l_fapirc)  {
-            FAPI_ERR("getPciOscswitchConig:FAPI_ATTR_GET_PRIVILEGED(ATTR_EC) "
-                         "failed w/rc=0x%08x",
-                         static_cast<uint32_t>(l_fapirc) );
-           break; // break out with error
-        }
-        FAPI_DBG("getPciOscswitchConfig: EC level=0x%02x",l_attrDdLevel);
-
-        // Get the position
-        l_fapirc = FAPI_ATTR_GET_PRIVILEGED(ATTR_POS,
-                                          &i_procTarget,
-                                          l_position);
-        if (l_fapirc)  {
-            FAPI_ERR("getPciOscswitchConig:FAPI_ATTR_GET_PRIVILEGED(ATTR_POS) "
-                         "failed w/rc=0x%08x",
-                         static_cast<uint32_t>(l_fapirc) );
-           break; // break out with error
-        }
-        FAPI_DBG("getPciOscswitchConfig: position=0x%08x",l_position);
-
-        // determine value to return
-        if (l_chipType == ENUM_ATTR_NAME_MURANO)
-        {
-            if (l_attrDdLevel < 0x20 )
-            {
-                o_val = MURANO_DD1X;
-            }
-            else if (l_attrDdLevel < 0x30 )
-            {
-                o_val = MURANO_DD2X;
-            }
-            else
-            {
-               FAPI_ERR("getPciOscswitchConfig: unexpected ec=0x%02x",
-                        l_attrDdLevel);
-               const uint32_t & FFDC_CHIP_EC = l_attrDdLevel;
-               FAPI_SET_HWP_ERROR(l_fapirc,RC_OSC_SWITCH_UNEXPECTED_CHIP_EC);
-               break; // break out with error
-            }
-        }
-        else if (l_chipType == ENUM_ATTR_NAME_VENICE)
-        {
-            if (l_position == 0x00 || l_position == 0x02 )
-            {
-                o_val = VENICE_P0P2;
-            }
-            else if (l_position == 0x01 || l_position == 0x03 )
-            {
-                o_val = VENICE_P1P3;
-            }
-            else
-            {
-               FAPI_ERR("getPciOscswitchConfig: unexpected position=0x%08x",
-                        l_position);
-               const uint32_t & FFDC_CHIP_POSITION = l_position;
-               FAPI_SET_HWP_ERROR(l_fapirc,
-                          RC_OSC_SWITCH_UNEXPECTED_CHIP_POSITION);
-               break; // break out with error
-            }
-        }
-        // TODO RTC: 109249 Check to see if  DD1X is correct,
-        // it was based off Murano DD2X
-        else if (l_chipType == ENUM_ATTR_NAME_NAPLES)
-        {
-            o_val = NAPLES_DD1X;
-        }
-        else
-        {
-            FAPI_ERR("getPciOscswitchConfig: unexpected chip type=0x%02x",
-                        l_chipType);
-            const uint32_t & FFDC_CHIP_TYPE = l_chipType;
-            FAPI_SET_HWP_ERROR(l_fapirc,RC_OSC_SWITCH_UNEXPECTED_CHIP_TYPE);
-            break; // break out with error
-        }
-        FAPI_DBG("getPciOscswitchConfig: pci oscswitch config=0x%02x",
-                o_val);
-
-    } while (0);
-
-    FAPI_DBG("getPciOscswitchConfig: exit rc=0x%08x)",
-               static_cast<uint32_t>(l_fapirc));
-
-    return  l_fapirc;
-}
-
-}   // extern "C"
diff --git a/src/usr/hwpf/hwp/chip_accessors/getTdpRdpCurrentFactor.C b/src/usr/hwpf/hwp/chip_accessors/getTdpRdpCurrentFactor.C
deleted file mode 100644
index f7da05c85..000000000
--- a/src/usr/hwpf/hwp/chip_accessors/getTdpRdpCurrentFactor.C
+++ /dev/null
@@ -1,142 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/chip_accessors/getTdpRdpCurrentFactor.C $    */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015                             */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: getTdpRdpCurrentFactor.C,v 1.6 2015/09/15 20:31:49 whs Exp $
-/**
- *  @file getTdpRdpCurrentFactor.C
- *
- *  @brief Accessor for providing the ATTR_TDP_RDP_CURRENT_FACTOR attribute
- *
- */
-
-#include    <stdint.h>
-
-//  fapi support
-#include    <fapi.H>
-#include    <fapiUtil.H>
-#include    <getTdpRdpCurrentFactor.H>
-
-extern "C"
-{
-using   namespace   fapi;
-
-fapi::ReturnCode getTdpRdpCurrentFactor(
-                              const fapi::Target   &i_procTarget,
-                              uint32_t  & o_val)
-{
-
-    const uint32_t DEFAULT_TDP_RDP_CURRENT_FACTOR = 9180;  // 91.90% = 0x9180
-    // IQ keyword layout
-    const uint8_t NUM_ENTRIES =  4;    // The IQ keyword has 4 sub entries
-    const uint8_t TDP_RDP_ENTRY =0;    // Array index for LRP9 Entry 1
-
-    struct iq_entry
-    {
-       uint8_t iv_MSB;   // data in big endian format
-       uint8_t iv_LSB;
-    };
-    struct iq_keyword
-    {
-        uint8_t iv_version;
-        iq_entry entry[NUM_ENTRIES];
-    };
-
-    fapi::ReturnCode l_fapirc;
-    uint32_t l_tdpRdp = 0;
-
-    FAPI_DBG("getTdpRdpCurrentFactor: entry");
-
-    do
-    {
-        // On WOF enabled systems, mvpd record LRP9 keyword IQ has the
-        // TDP RDP current factor. LRP9 is not present for Murano processors
-        // and is present, but not defined as TDP RPD current factor on other
-        // Venice processors.
-        // Only look for TDP RPD current factor in vpd for WOF enabled systems.
-
-        // See if WOF enabled
-        uint8_t l_WofEnabled = ENUM_ATTR_WOF_ENABLED_DISABLED;
-        l_fapirc = FAPI_ATTR_GET(ATTR_WOF_ENABLED,NULL,l_WofEnabled);
-        if ( l_fapirc  )
-        {
-            FAPI_IMP("getTdpRdpCurrentFactor: get ATTR_WOF_ENABLED failed, "
-                     "rc=0x%08x",
-                     static_cast<uint32_t>(l_fapirc));
-            break;  // return with error. Unexpected.
-        }
-        else if (ENUM_ATTR_WOF_ENABLED_DISABLED == l_WofEnabled)
-        {
-            break;  // not a WOF enabled system. Return with 0 value. No error.
-        }
-
-        // Read TDP RDP current factor from LRP9 IQ keyword.
-        // Expected to be present on WOF enabled system.
-        iq_keyword l_iqKeyword = {0,{{0}}};
-        uint32_t l_bufsize = sizeof(l_iqKeyword);
-
-        l_fapirc = fapiGetMvpdField(MVPD_RECORD_LRP9,
-                                    MVPD_KEYWORD_IQ,
-                                    i_procTarget,
-                                    (uint8_t*)(&l_iqKeyword),
-                                    l_bufsize );
-        if ( l_fapirc  )
-        {
-            FAPI_IMP("getTdpRdpCurrentFactor: get LRP9 IQ failed, "
-                     "rc=0x%08x",
-                     static_cast<uint32_t>(l_fapirc));
-            break;  // return with  error
-        }
-        if (l_bufsize < sizeof(l_iqKeyword)) //ensure expected data retured
-        {
-            FAPI_ERR("getTdpRdpCurrentFacto:"
-                     " less IQ keyword returned than expected %d < %d, "
-                     " use default",
-                       l_bufsize, sizeof(l_iqKeyword));
-            const uint32_t & KEYWORD = fapi::MVPD_KEYWORD_IQ;
-            const uint32_t & RETURNED_SIZE = l_bufsize;
-            const uint32_t & EXPECTED_SIZE = sizeof(l_iqKeyword);
-            const fapi::Target & CHIP_TARGET = i_procTarget;
-            FAPI_SET_HWP_ERROR(l_fapirc, RC_INSUFFICIENT_VPD_RETURNED );
-            break;  // return with error. Unexpected.
-        }
-        // get TDP RDP current factor endian safe
-        l_tdpRdp  = l_iqKeyword.entry[TDP_RDP_ENTRY].iv_LSB;
-        l_tdpRdp |= (l_iqKeyword.entry[TDP_RDP_ENTRY].iv_MSB<<8);
-        FAPI_DBG("getTdpRdpCurrentFactor: LRP9 IQ value=%d",l_tdpRdp);
-
-        // use default if value not filled in by mfg
-        if (!l_tdpRdp)
-        {
-            l_tdpRdp = DEFAULT_TDP_RDP_CURRENT_FACTOR;
-            FAPI_IMP("getTdpRdpCurrentFactor: use default value=%d",l_tdpRdp);
-        }
-    } while (0);
-
-    // return value
-    o_val = l_tdpRdp;
-
-    return  l_fapirc;
-}
-
-}   // extern "C"
diff --git a/src/usr/hwpf/hwp/chip_attributes.xml b/src/usr/hwpf/hwp/chip_attributes.xml
deleted file mode 100644
index 498e8aa70..000000000
--- a/src/usr/hwpf/hwp/chip_attributes.xml
+++ /dev/null
@@ -1,259 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/chip_attributes.xml $                        -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: chip_attributes.xml,v 1.18 2015/04/30 20:15:33 stillgs Exp $ -->
-<!--
-    XML file specifying HWPF attributes.
-    These are platInit attributes associated with chips.
--->
-
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_ID</id>
-    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        ID of a chip target
-        Read from the chip by the platform
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_NAME</id>
-    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Product name of a chip target
-        Provided by the Machine Readable Workbook
-    </description>
-    <valueType>uint8</valueType>
-    <enum>NONE = 0, VENICE = 1, MURANO = 2, CENTAUR = 3, NAPLES = 4</enum>
-    <platInit/>
-    <!-- To make HWPs data driven, this is a privileged attribute that cannot
-         be accessed by normal HWPs. -->
-    <privileged/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_EC</id>
-    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        EC level of a chip target
-        Read from the chip by the platform
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <!-- To make HWPs data driven, this is a privileged attribute that cannot
-         be accessed by normal HWPs. -->
-    <privileged/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FSI_GP_REG_SCOM_ACCESS</id>
-    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        Indicates if the target's FSI GP regs have scom access
-        Provided by the Machine Readable Workbook.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>false = 0, true = 1</enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FABRIC_NODE_ID</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-        Logical fabric node the chip belongs to.
-        Provided by the Machine Readable Workbook.
-        Can vary across drawers.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FABRIC_CHIP_ID</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-        Logical fabric chip id for this chip (position within the fabric).
-        Provided by the Machine Readable Workbook.
-        Can vary across drawers.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_HAS_SBE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        If true, the chip has an SBE and the associated registers
-        Provided by the Machine Readable Workbook.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>false = 0, true = 1</enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_DCM_INSTALLED</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-        If true, the chip is installed on a Dual Chip Module
-        Provided by the Machine Readable Workbook
-    </description>
-    <valueType>uint8</valueType>
-    <enum>false = 0, true = 1</enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_REGIONS_TO_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Called to get data to customize an IPL or SLW image with data indicating
-        which chip regions the SBE should enable
-      The data is in the format of the Module VPD PG (Partial Good Vector)
-        keyword which is an 32 entry array of 16bit words, each word
-        represents a chiplet and a defined set of bits within the word
-        represents regions that are good. The 16 bit word is embedded within
-        a 64bit word as described in the MVPD spec to reflect the clock
-        controller region register layout:
-          bits 0:3 are reserved -> set to 0
-          bits 4:19 are the 16 bit data word
-          bits 20:63 are reserved -> set to 0
-      A platform needs to return data indicating the chip regions to enable,
-      this may not be just the MVPD partial-good data, it may also not enable
-      other chips and chiplets it has decided are non-functional - this is
-      why it is not a standard MVPD query.
-    </description>
-    <valueType>uint64</valueType>
-    <array>32</array>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_EX_L2_SINGLE_MEMBER_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Vector to communicate to SBE which EX chiplets must be configured with L2 in single member mode.
-      One bit per EX chiplet, bit location aligned to chiplet ID
-      (bit 16: EX00, bit 17: EX01, bit 18: EX02 ... bit 31: EX15)
-      EX chiplets whose L2 must run in single member mode are marked by a '1'.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_BOOT_VOLTAGE_VID</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-        Proc Boot Voltage
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PCI_OSCSWITCH_CONFIG</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-        Defines PCI oscswitch configuration (FSI GP7 bits 0:3)
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_OSCSWITCH_CTL0</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-        Defines oscswitch ctl0 value (FSI GP3 bits 0:15)
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_OSCSWITCH_CTL1</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-        Defines oscswitch ctl1 value (FSI GP6 bits 20:27)
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_OSCSWITCH_CTL2</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-        Defines oscswitch ctl2 value (FSI GP7 bits 8:31)
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_I2C_SLAVE_ADDRESS</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-        Defines I2C slave address
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_TARGET_SCOMABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP,TARGET_TYPE_EX_CHIPLET,TARGET_TYPE_MCS_CHIPLET,TARGET_TYPE_XBUS_ENDPOINT,TARGET_TYPE_ABUS_ENDPOINT,TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>
-        This attribute indicates if the target can be SCOMed.
-        Set by check_chiplet_states HWP during DUMP process
-    </description>
-    <valueType>uint8</valueType>
-    <enum>FALSE = 0, TRUE = 1</enum>
-    <writeable/>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_TDP_RDP_CURRENT_FACTOR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>  
-    <description>
-        Defines the scaling factor that converts the AC current (amperage) value from
-        the Thermal Design Point (TDP) to the Regulator Design Point (RDP) as input
-        to the Workload Optimization Frequency (WOF) OCC algorithm.
-
-        This is a percentage ratio value and has a granularity of 0.01 percent.  Data
-        is held in hexidecimal.   Example: 86.17% -> 8617 -> 0x21A9.
-    </description>
-    <valueType>uint32</valueType>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/chip_ec_attributes.xml b/src/usr/hwpf/hwp/chip_ec_attributes.xml
deleted file mode 100644
index 6e78ccadb..000000000
--- a/src/usr/hwpf/hwp/chip_ec_attributes.xml
+++ /dev/null
@@ -1,74 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/chip_ec_attributes.xml $                     -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!--
-    XML file specifying HWPF attributes.
-    These are example Chip EC Feature attributes that specify chip features
-    based on the EC level of a chip
--->
-
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_TEST1</id>
-    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-      Returns if a chip contains the TEST1 feature. True if either:
-      Centaur EC 10
-      Venice EC greater than 30
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x10</value>
-          <test>EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x30</value>
-          <test>GREATER_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute> 
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_TEST2</id>
-    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-      Returns if a chip contains the TEST2 feature. True if:
-      Murano EC less than 20
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-</attributes>
diff --git a/src/usr/hwpf/hwp/common_attributes.xml b/src/usr/hwpf/hwp/common_attributes.xml
deleted file mode 100644
index ef6a6c824..000000000
--- a/src/usr/hwpf/hwp/common_attributes.xml
+++ /dev/null
@@ -1,78 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/common_attributes.xml $                      -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!--
-    XML file specifying HWPF attributes.
-    These are platInit attributes associated with multiple target types
-    Each execution platform must initialize.
--->
-
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FUNCTIONAL</id>
-    <targetType>
-        TARGET_TYPE_DIMM, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP,
-        TARGET_TYPE_EX_CHIPLET, TARGET_TYPE_MBA_CHIPLET,
-        TARGET_TYPE_MCS_CHIPLET, TARGET_TYPE_XBUS_ENDPOINT,
-        TARGET_TYPE_ABUS_ENDPOINT, TARGET_TYPE_L4
-    </targetType>
-    <description>
-        1 if the target is functional, else 0
-        Set by the platform.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>NON_FUNCTIONAL = 0, FUNCTIONAL = 1</enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_POS</id>
-    <targetType>
-        TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP, TARGET_TYPE_DIMM
-    </targetType>
-    <description>
-        Position of chip/dimm within drawer
-        This data is from the MRW
-        TARGET_TYPE_PROC_CHIP:
-            0, 1, 2, 3...
-        TARGET_TYPE_MEMBUF_CHIP:
-            (attached PROC_CHIP->ATTR_POS * 8) +
-                (attached MCS_CHIPLET->ATTR_CHIP_UNIT_POS)
-        TARGET_TYPE_DIMM:
-            (attached PROC_CHIP->ATTR_POS * 64) +
-                (attached MCS_CHIPLET->ATTR_CHIP_UNIT_POS * 8) +
-                    DIMM-NUMBER
-            where DIMM-NUMBER:
-                0: MBA0, port0, dimm0
-                1: MBA0, port0, dimm1
-                2: MBA0, port1, dimm0
-                3: MBA0, port1, dimm1
-                4: MBA1, port0, dimm0
-                5: MBA1, port0, dimm1
-                6: MBA1, port1, dimm0
-                7: MBA1, port1, dimm1
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-</attributes>
diff --git a/src/usr/hwpf/hwp/core_activate/proc_check_slw_done/proc_check_slw_done_errors.xml b/src/usr/hwpf/hwp/core_activate/proc_check_slw_done/proc_check_slw_done_errors.xml
deleted file mode 100755
index 96920fdd7..000000000
--- a/src/usr/hwpf/hwp/core_activate/proc_check_slw_done/proc_check_slw_done_errors.xml
+++ /dev/null
@@ -1,119 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/core_activate/proc_check_slw_done/proc_check_slw_done_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2013,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_check_slw_done_errors.xml,v 1.6 2015/09/17 16:15:36 cmolsen Exp $ -->
-<!-- Error definitions for p8_poreslw procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PMPROC_CHKSLW_INVALID_STATE</rc>
-    <description>The PORE SLW is in an unexpected state for completing a Winkle transition</description>
-    <ffdc>EX</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_SLW_REGISTERS</id>
-      <target>CHIP_IN_ERROR</target>
-    </collectRegisterFfdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PMPROC_CHKSLW_NOT_IN_ETR</rc>
-    <description>The targeted EX chiplet is not in current SLW EXE Trigger register.</description>
-    <ffdc>GP3</ffdc>
-    <ffdc>PMGP0</ffdc>
-    <ffdc>PMGP1</ffdc>
-    <ffdc>PMERR</ffdc>
-    <ffdc>PMHIST</ffdc>
-    <ffdc>EX</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_SLW_REGISTERS</id>
-      <target>CHIP_IN_ERROR</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>EX_IN_ERROR</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>EX_IN_ERROR</target>
-    </deconfigure>
-    <gard>
-      <target>EX_IN_ERROR</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PMPROC_CHKSLW_ADDRESS_MISMATCH</rc>
-    <description>SLW engine address does not match the expected address</description>
-    <ffdc>GP3</ffdc>
-    <ffdc>PMGP0</ffdc>
-    <ffdc>PMGP1</ffdc>
-    <ffdc>PMERR</ffdc>
-    <ffdc>PMHIST</ffdc>
-    <ffdc>GOODHALTADDR</ffdc>
-    <ffdc>EX</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_SLW_REGISTERS</id>
-      <target>CHIP_IN_ERROR</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>EX_IN_ERROR</target>
-      <priority>HIGH</priority>
-    </callout> 
-    <deconfigure>
-      <target>EX_IN_ERROR</target>
-    </deconfigure>
-    <gard>
-      <target>EX_IN_ERROR</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PMPROC_CHKSLW_PMC_FIR_ERRORS</rc>
-    <description>PMC LFIR has unexpeced SLW bits on</description>
-    <ffdc>GP3</ffdc>
-    <ffdc>PMGP0</ffdc>
-    <ffdc>PMGP1</ffdc>
-    <ffdc>PMERR</ffdc>
-    <ffdc>PMCLFIR</ffdc>
-    <ffdc>EX</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_SLW_REGISTERS</id>
-      <target>CHIP_IN_ERROR</target>
-    </collectRegisterFfdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PMPROC_CHKSLW_EX_NOT_RUNNING</rc>
-    <description>The targeted EX chiplet is not in the expected RUNNING state per PMHistory register.</description>
-    <ffdc>GP3</ffdc>
-    <ffdc>PMGP0</ffdc>
-    <ffdc>PMGP1</ffdc>
-    <ffdc>PMERR</ffdc>
-    <ffdc>PMHIST</ffdc>
-    <ffdc>EX</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_SLW_REGISTERS</id>
-      <target>CHIP_IN_ERROR</target>
-    </collectRegisterFfdc>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle_errors.xml b/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle_errors.xml
deleted file mode 100644
index 0bc269064..000000000
--- a/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle_errors.xml
+++ /dev/null
@@ -1,87 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_prep_master_winkle_errors.xml,v 1.8 2014/02/28 16:58:58 stillgs Exp $ -->
-<!-- Error definitions for proc_prep_master_winkle procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_PREP_MASTER_WINKLE_SBE_NOT_RUNNING</rc>
-    <description>
-      Procedure: proc_prep_master_winkle
-      The SBE is stopped and so will never wake up the master EX
-    </description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
-      <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-      <target>CHIP_IN_ERROR</target>
-    </collectRegisterFfdc>
-    <ffdc>SBE_STATUS</ffdc>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>CHIP_IN_ERROR</target>     
-      <priority>LOW</priority>
-    </callout>   
-    <deconfigure>
-      <target>CHIP_IN_ERROR</target>     
-    </deconfigure>  
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_PREP_MASTER_WINKLE_BAD_ISTEP_NUM</rc>
-    <description>
-      Procedure: proc_prep_master_winkle
-      The SBE is not at the correct istep number for the master winkle
-    </description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
-      <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-      <target>CHIP_IN_ERROR</target>
-    </collectRegisterFfdc>
-    <ffdc>SBE_VITAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_PREP_MASTER_WINKLE_BAD_SUBSTEP_NUM</rc>
-    <description>
-      Procedure: proc_prep_master_winkle
-      The SBE is not at the correct substep number for the master winkle
-    </description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
-      <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-      <target>CHIP_IN_ERROR</target>
-    </collectRegisterFfdc>
-    <ffdc>SBE_VITAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer_errors.xml b/src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer_errors.xml
deleted file mode 100644
index 8564800bd..000000000
--- a/src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer_errors.xml
+++ /dev/null
@@ -1,95 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_stop_deadman_timer_errors.xml,v 1.7 2015/07/27 00:46:32 jmcgill Exp $ -->
-<!-- Error definitions for proc_stop_deadman_timer procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_STOP_DEADMAN_TIMER_UNEXPECTED_INITIAL_STATE</rc>
-    <description>
-      Procedure: proc_stop_deadman_timer
-      The SBE did not reach the correct istep progress to stop the deadman timer
-    </description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
-      <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-      <id>REG_FFDC_PROC_SLW_REGISTERS</id>
-      <id>REG_FFDC_PROC_SLW_FIR_REGISTERS</id>
-      <id>REG_FFDC_PROC_SLW_PMC_REGISTERS</id>
-      <id>REG_FFDC_PROC_SLW_PBA_REGISTERS</id>
-      <target>CHIP_IN_ERROR</target>
-    </collectRegisterFfdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_SLW_PCBS_REGISTERS</id>
-      <basedOnPresentChildren>
-          <target>CHIP_IN_ERROR</target>
-          <childType>TARGET_TYPE_EX_CHIPLET</childType>
-          <childPosOffsetMultiplier>0x01000000</childPosOffsetMultiplier>
-      </basedOnPresentChildren>
-    </collectRegisterFfdc>
-    <ffdc>SBE_RUNNING</ffdc>
-    <ffdc>HALT_CODE</ffdc>
-    <ffdc>ISTEP_NUM</ffdc>
-    <ffdc>SUBSTEP_NUM</ffdc>
-     <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_STOP_DEADMAN_TIMER_UNEXPECTED_FINAL_STATE</rc>
-    <description>
-      Procedure: proc_stop_deadman_timer
-      The SBE reached an unexpected final state
-    </description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
-      <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-      <id>REG_FFDC_PROC_SLW_REGISTERS</id>
-      <id>REG_FFDC_PROC_SLW_FIR_REGISTERS</id>
-      <id>REG_FFDC_PROC_SLW_PMC_REGISTERS</id>
-      <id>REG_FFDC_PROC_SLW_PBA_REGISTERS</id>
-      <target>CHIP_IN_ERROR</target>
-    </collectRegisterFfdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_SLW_PCBS_REGISTERS</id>
-      <basedOnPresentChildren>
-          <target>CHIP_IN_ERROR</target>
-          <childType>TARGET_TYPE_EX_CHIPLET</childType>
-          <childPosOffsetMultiplier>0x01000000</childPosOffsetMultiplier>
-      </basedOnPresentChildren>
-    </collectRegisterFfdc>
-    <ffdc>SBE_RUNNING</ffdc>
-    <ffdc>HALT_CODE</ffdc>
-    <ffdc>ISTEP_NUM</ffdc>
-    <ffdc>SUBSTEP_NUM</ffdc>
-     <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dimm_attributes.xml b/src/usr/hwpf/hwp/dimm_attributes.xml
deleted file mode 100644
index b69623e20..000000000
--- a/src/usr/hwpf/hwp/dimm_attributes.xml
+++ /dev/null
@@ -1,101 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dimm_attributes.xml $                        -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- XML file specifying DIMM attributes used by HW Procedures. -->
-<!-- $Id: dimm_attributes.xml,v 1.4 2013/10/03 20:40:52 dedahle Exp $ -->
-<attributes>
-
-<attribute>
-    <id>ATTR_CEN_DQ_TO_DIMM_CONN_DQ</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Centaur DQ to DIMM connector DQ mapping.
-        Uint8 value for each Centaur DQ (0-79).
-        The value is the corresponding DIMM Connector DQ.
-        Therefore if (data[2] == 60) then Centaur DQ 2 maps to DIMM DQ 60
-        If the logical DIMM is on a Centaur-DIMM then the value is the same as the
-        array index because there is no DIMM connector.
-        If the logical DIMM is an IS-DIMM then the value depends on board wiring.
-    </description>
-    <valueType>uint8</valueType>
-    <array>80</array>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MBA_PORT</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>MBA Chiplet port this DIMM is connected to</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MBA_DIMM</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>MBA port DIMM number of this DIMM</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_BAD_DQ_BITMAP</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Bad DQ bitmap from a Centaur:MBA point of view.
-        The data is a 10 byte bitmap for each of 4 possible ranks.
-        The bad DQ data is stored in DIMM SPD, it is stored in a special format
-        and is translated to a DIMM Connector point of view for IS-DIMMs.
-        All of these details are hidden from the user of this attribute.
-    </description>
-    <valueType>uint8</valueType>
-    <array>4 10</array>
-    <platInit/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DIMM_SPARE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>
-        Spare DRAM availability for all DIMMs connected to the target MBA.
-        For each rank on a DIMM, there are 8 DQ lines to spare DRAMs.
-        - NO_SPARE: No spare DRAMs
-        - LOW_NIBBLE:  x4 DRAMs in use, one spare DRAM connected to SP_DQ0-3
-        - HIGH_NIBBLE: x4 DRAMs in use, one spare DRAM connected to SP_DQ4-7
-        - FULL_BYTE: Either
-          1/ x4 DRAMs in use, two spare DRAMs connected to SP_DQ0-7
-          2/ x8 DRAMs in use, one spare DRAM connected to SP_DQ0-7
-        For C-DIMMs, this is in a VPD field : Record:VSPD, Keyword:AM
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-        NO_SPARE = 0x00,
-        LOW_NIBBLE = 0x01,
-        HIGH_NIBBLE = 0x02,
-        FULL_BYTE = 0x03
-    </enum>
-    <array>2 2 4</array>
-    <platInit/>
-</attribute>
-
-</attributes>
diff --git a/src/usr/hwpf/hwp/dimm_errors.xml b/src/usr/hwpf/hwp/dimm_errors.xml
deleted file mode 100644
index 6b19331f0..000000000
--- a/src/usr/hwpf/hwp/dimm_errors.xml
+++ /dev/null
@@ -1,104 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dimm_errors.xml $                            -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: dimm_errors.xml,v 1.7 2014/02/27 21:40:32 mjjones Exp $ -->
-
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_BAD_DQ_DIMM_BAD_PARAM</rc>
-    <description>
-        A HWP called a utility function to access the bad DQ data but specified
-        an invalid PORT/DIMM/RANK
-    </description>
-    <ffdc>FFDC_PORT</ffdc>
-    <ffdc>FFDC_DIMM</ffdc>
-    <ffdc>FFDC_RANK</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_BAD_DQ_DIMM_NOT_FOUND</rc>
-    <description>
-        A HWP called a utility function to accessing the bad DQ data. The
-        utility function could not find a functional DIMM associated with the
-        specified MBA/PORT/DIMM
-    </description>
-    <ffdc>FFDC_MBA_TARGET</ffdc>
-    <ffdc>FFDC_PORT</ffdc>
-    <ffdc>FFDC_DIMM</ffdc>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_BAD_DQ_MFG_MODE_BITS_FOUND_DURING_GET</rc>
-    <description>
-        A HWP noted additional bad bits in the bad dq bitmap of the
-        specified DIMM while in the manufacturing DISABLE_DRAM_REPAIRS
-        mode during a read operation.
-        CLEAN_BAD_DQ_BITMAP represents a bad dq bitmap with the appropriate
-        spare and ECC DQs (if any) set to 1 and all other DQs set to 0.
-        CURRENT_BAD_DQ_BITMAP represents the current bad dq bitmap. Any
-        discrepancies with CLEAN_BAD_DQ_BITMAP are the result of a manufacturing
-        mode process.
-    </description>
-    <ffdc>DIMM</ffdc>
-    <ffdc>CLEAN_BAD_DQ_BITMAP_RANK0</ffdc>
-    <ffdc>CLEAN_BAD_DQ_BITMAP_RANK1</ffdc>
-    <ffdc>CLEAN_BAD_DQ_BITMAP_RANK2</ffdc>
-    <ffdc>CLEAN_BAD_DQ_BITMAP_RANK3</ffdc>
-    <ffdc>CURRENT_BAD_DQ_BITMAP_RANK0</ffdc>
-    <ffdc>CURRENT_BAD_DQ_BITMAP_RANK1</ffdc>
-    <ffdc>CURRENT_BAD_DQ_BITMAP_RANK2</ffdc>
-    <ffdc>CURRENT_BAD_DQ_BITMAP_RANK3</ffdc>
-    <callout>
-      <target>DIMM</target>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_BAD_DQ_MFG_MODE_BITS_FOUND_DURING_SET</rc>
-    <description>
-        A HWP noted an attempt to set additional bad bits in the bad dq bitmap
-        of the specified DIMM while in the manufacturing DISABLE_DRAM_REPAIRS
-        mode during a write operation.
-        CLEAN_BAD_DQ_BITMAP represents a bad dq bitmap with the appropriate
-        spare and ECC DQs (if any) set to 1 and all other DQs set to 0.
-        UPDATE_BAD_DQ_BITMAP represents the proposed updates to set. Any
-        discrepancies with CLEAN_BAD_DQ_BITMAP are the result of a manufacturing
-        mode process and should not be made.
-    </description>
-    <ffdc>DIMM</ffdc>
-    <ffdc>CLEAN_BAD_DQ_BITMAP_RANK0</ffdc>
-    <ffdc>CLEAN_BAD_DQ_BITMAP_RANK1</ffdc>
-    <ffdc>CLEAN_BAD_DQ_BITMAP_RANK2</ffdc>
-    <ffdc>CLEAN_BAD_DQ_BITMAP_RANK3</ffdc>
-    <ffdc>UPDATE_BAD_DQ_BITMAP_RANK0</ffdc>
-    <ffdc>UPDATE_BAD_DQ_BITMAP_RANK1</ffdc>
-    <ffdc>UPDATE_BAD_DQ_BITMAP_RANK2</ffdc>
-    <ffdc>UPDATE_BAD_DQ_BITMAP_RANK3</ffdc>
-    <callout>
-      <target>DIMM</target>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dimm_spd_attributes.xml b/src/usr/hwpf/hwp/dimm_spd_attributes.xml
deleted file mode 100644
index 4093f1b1f..000000000
--- a/src/usr/hwpf/hwp/dimm_spd_attributes.xml
+++ /dev/null
@@ -1,2999 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dimm_spd_attributes.xml $                    -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: dimm_spd_attributes.xml,v 1.56 2015/08/27 12:04:06 sasethur Exp $ -->
-<!-- XML file specifying DIMM SPD attributes used by HW Procedures. -->
-<attributes>
-
-<!--
-*******************************************************************************
-The following attributes can be queried from both DDR3 and DDR4 DIMMs
-*******************************************************************************
--->
-
-<attribute>
-    <id>ATTR_SPD_DRAM_DEVICE_TYPE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM Device Type.
-        Located in DDR3/DDR4 SPD byte 2.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DDR3 = 0x0b, DDR4 = 0x0c</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_TYPE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Type.
-        Located in DDR3/DDR4 SPD byte 3, bits 3-0.
-        Note that CDIMM designation here is obsolete.  See ATTR_SPD_CUSTOM
-    </description>
-    <valueType>uint8</valueType>
-    <enum>CDIMM = 0x00, RDIMM = 0x01, UDIMM = 0x02, SO_DIMM=0x03, LRDIMM = 0x0b, INVALID = 0xff</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_CUSTOM</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Type is CUSTOM
-        Located in DDR3/DDR4 SPD byte 3, bit 7. (Most significant bit)
-        If bit 7 (reserved) is a '1' then this attribute value should be set to YES
-    </description>
-    <valueType>uint8</valueType>
-    <enum>NO = 0x0, YES = 0x1</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_DENSITY</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM Density.
-        Located in DDR3/DDR4 SPD byte 4, bits 3-0.
-        0x00 = 256MB
-        0x01 = 512MB
-        0x02 = 1GB
-        0x03 = 2GB
-        0x04 = 4GB
-        0x05 = 8GB
-        0x06 = 16GB
-        0x07 = 32GB
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-        D256MB = 0x00, D512Mb = 0x01, D1GB = 0x02, D2GB = 0x03, D4GB = 0x04,
-        D8GB = 0x05, D16GB = 0x06, D32GB=0x07
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_BANKS</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Number of banks.
-        Located in DDR3 SPD byte 4, bits 6-4.
-        Located in DDR4 SPD byte 4, bits 5-4.
-        The raw data has different meanings for DDR3 and DDR4.
-        HWPs must use this DDR neutral enumeration to decode.
-        Platform support must call an Accessor HWP.
-        For DDR4 , Values can be B4 and B8 based on bits 5-4
-        For DDR3 , Values can be B8,B16,B32,B64 based on bits 6-4
-    </description>
-    <valueType>uint8</valueType>
-    <enum>B8 = 0x00, B16 = 0x01, B32 = 0x02, B64 = 0x03, B4 = 0x04, UNKNOWN = 0xff</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_ROWS</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Number of Rows.
-        Located in DDR3/DDR4 SPD byte 5, bits 5-3.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>R12 = 0x00, R13 = 0x01, R14 = 0x02, R15 = 0x03, 
-          R16 = 0x04, R17 = 0x05, R18 = 0x06
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_COLUMNS</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Number of Columns.
-        Located in DDR3/DDR4 SPD byte 5, bits 2-0.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>C9 = 0x00, C10 = 0x01, C11 = 0x02, C12 = 0x03</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_NOMINAL_VOLTAGE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Nominal voltage (bitmap).
-        Located in DDR3 SPD byte 6, bits 2-0.
-        Located in DDR4 SPD byte 11, bits 5-0.
-        The raw data has different meanings for DDR3 and DDR4.
-        HWPs must use this DDR neutral enumeration to decode.
-        Platform support must call an Accessor HWP.
-        For DDR3, values would be NOTOP1_5,OP1_35,OP1_2X based on byte 6, bits 2-0
-        For DDR4, values would be OP1_2V,END1_2V, based on byte 6, bits 5-0
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-         NOTOP1_5 = 0x01,
-         OP1_35 = 0x02,
-         OP1_2X = 0x04,
-         OP1_2V = 0x08,
-         END1_2V = 0x10
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_NUM_RANKS</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Number of ranks.
-        Located in DDR3 SPD byte 7, bits 5-3.
-        Located in DDR4 SPD byte 12, bits 5-3.
-    </description>
-    <valueType>uint8</valueType>
-    <!-- RX means an invalid value, only used to init vars -->
-    <enum>R1 = 0x00, R2 = 0x01, R4 = 0x03, RX = 0xFF</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_DRAM_WIDTH</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM Width.
-        Located in DDR3 SPD byte 7, bits 2-0.
-        Located in DDR4 SPD byte 12, bits 2-0.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>W4 = 0x00, W8 = 0x01, W16 = 0x02, W32 = 0x03</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_MEMORY_BUS_WIDTH</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Memory Bus Width.
-        Located in DDR3 SPD byte 8, bits 4-0
-        Located in DDR4 SPD byte 13, bits 4-0.
-           Bits 4-3 contain the Bus Width Extension (ECC)
-           Bits 2-0 contain the Primary Bus Width
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-        W8 = 0x00, W16 = 0x01, W32 = 0x02, W64 = 0x03,
-        WE8 = 0x08, WE16 = 0x09, WE32 = 0x0a, WE64 = 0x0b
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TCKMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum cycle time (tCKmin).
-        Located in DDR3 SPD byte 12.
-        Located in DDR4 SPD byte 18.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_CAS_LATENCIES_SUPPORTED</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        CAS Latencies supported (bitmap).
-        Located in DDR3 SPD byte 14 (LSB) and byte 15.
-        Located in DDR4 SPD byte 20 (LSB) through byte 23
-        The raw data has different meanings for DDR3 and DDR4.
-        HWPs must use this DDR neutral enumeration to decode.
-        Platform support must call an Accessor HWP.
-        For DDR3, the values would be from CL_4 through CL_18
-        For DDR4, the values would be from CL_7 through CL_24
-    </description>
-    <valueType>uint32</valueType>
-    <enum>
-        CL_24 = 0x00100000,
-        CL_23 = 0x00080000,
-        CL_22 = 0x00040000,
-        CL_21 = 0x00020000,
-        CL_20 = 0x00010000,
-        CL_19 = 0x00008000,
-        CL_18 = 0x00004000,
-        CL_17 = 0x00002000,
-        CL_16 = 0x00001000,
-        CL_15 = 0x00000800,
-        CL_14 = 0x00000400,
-        CL_13 = 0x00000200,
-        CL_12 = 0x00000100,
-        CL_11 = 0x00000080,
-        CL_10 = 0x00000040,
-        CL_9  = 0x00000020,
-        CL_8  = 0x00000010,
-        CL_7  = 0x00000008,
-        CL_6  = 0x00000004,
-        CL_5  = 0x00000002,
-        CL_4  = 0x00000001
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TAAMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum CAS Latency Time (tAAmin).
-        Located in DDR3 SPD byte 16.
-        Located in DDR4 SPD byte 24.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRCDMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum RAS# to CAS# Delay Time (tRCDmin).
-        Located in DDR3 SPD byte 18.
-        Located in DDR4 SPD byte 25.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRPMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Row Precharge Delay Time (tRPmin).
-        Located in DDR3 SPD byte 20.
-        Located in DDR4 SPD byte 26.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRASMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Active to Precharge Delay Time (tRASmin).
-        Located in DDR3 SPD byte 21, bits 3-0 and byte 22 (LSB).
-        Located in DDR4 SPD byte 27, bits 3-0 and byte 28 (LSB)
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRCMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Active to Active/Refresh Delay Time (tRCmin).
-        Located in DDR3 SPD byte 21, bits 7-4 and byte 23 (LSB).
-        Located in DDR4 SPD byte 27, bits 7-4 and byte 29 (LSB)
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TFAWMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Four Activate Window Delay Time (tFAWmin).
-        Located in DDR3 SPD byte 28, bits 3-0 and byte 29 (LSB).
-        Located in DDR4 SPD byte 36, bits 3-0 and byte 37 (LSB).
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_OPTIONAL_FEATURES</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        SDRAM Optional Features (bitmap).
-        Located in DDR3 SPD byte 30.
-        Located in DDR4 SPD byte 7, will be reserved and set to 0x0.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DLL_OFF = 0x80, RZQ7 = 0x02, RZQ6 = 0x01</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_THERMAL_AND_REFRESH_OPTIONS</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        SDRAM Thermal and Refresh Options (bitmap).
-        Located in DDR3 SPD byte 31.
-        Located in DDR4 SPD byte 8, will be reserved and set to 0x0.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>PASR = 0x80, ODTS = 0x08, ASR = 0x05, ETRR = 0x02, ETR = 0x01</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_THERMAL_SENSOR</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Thermal Sensor.
-        Located in DDR3 SPD byte 32.
-        Located in DDR4 SPD byte 14.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>PRESENT = 0x80, ACCURACY_MASK = 0x7F</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_DEVICE_TYPE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        SDRAM Device Type.
-        Located in DDR3 SPD byte 33, bit 7.
-        Located in DDR4 SPD byte 6, bit 7.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>STANDARD_MONOLITHIC = 0x00, NON_STANDARD = 0x01</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_DEVICE_TYPE_SIGNAL_LOADING</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        SDRAM Device Type Signal Loading for stacked DRAMs.
-        Located in DDR3 SPD byte 33, bits 1-0.
-        Located in DDR4 SPD byte 6, bit 1-0.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>NOT_SPECIFIED = 0x00, MULTI_LOAD_STACK = 0x01, SINGLE_LOAD_STACK = 0x02</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_DIE_COUNT</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        SDRAM Device Type Die Count.
-        Located in DDR3 SPD byte 33, bits 6-4.
-        Located in DDR4 SPD byte 6, bit 6-4.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DIE1 = 0x00, DIE2 = 0x01, DIE4 = 0x02, DIE8 = 0x03</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TCKMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Fine Offset for SDRAM Minimum Cycle Time (tCKmin).
-        Located in DDR3 SPD byte 34.
-        Located in DDR4 SPD byte 125.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TAAMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Fine Offset for Minimum CAS Latency Time (tAAmin).
-        Located in DDR3 SPD byte 35.
-        Located in DDR4 SPD byte 123.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TRCDMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Fine Offset for Minimum RAS# to CAS# Delay Time (tRCDmin).
-        Located in DDR3 SPD byte 36.
-        Located in DDR4 SPD byte 122.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TRPMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Fine Offset for Minimum Row Precharge Delay Time (tRPmin).
-        Located in DDR3 SPD byte 37.
-        Located in DDR4 SPD byte 121.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TRCMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Fine Offset for Minimum Active to Active/Refresh Delay Time (tRCmin).
-        Located in DDR3 SPD byte 38.
-        Located in DDR4 SPD byte 120.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_NUM_OF_REGISTERS_USED_ON_RDIMM</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Number of Registers used on RDIMM.
-        Located in DDR3 SPD byte 63 bits 1-0.
-    </description> 
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_SPECIFIC_SECTION</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Specific Section.
-        Located in DDR3 SPD bytes 60d - 116d.
-        Located in DDR4 SPD bytes 128 - 255d.
-    </description>
-    <valueType>uint8</valueType>
-    <array>57</array>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_ID_MODULE_MANUFACTURERS_JEDEC_ID_CODE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module ID: Module Manufacturer's JEDEC ID Code.
-        Located in DDR3 SPD bytes 117 (LSB) to 118.
-        Located in DDR4 SPD bytes 320 (LSB) to 321.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_ID_MODULE_MANUFACTURING_LOCATION</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module ID: Module Manufacturing Location.
-        Located in DDR3 SPD byte 119.
-        Located in DDR4 SPD byte 322.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_ID_MODULE_MANUFACTURING_DATE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module ID: Module Manufacturing Date.
-        Located in DDR3 SPD bytes 120 (BCD year) to byte 121 (BCD week) (LSB).
-        Located in DDR4 SPD bytes 323 (BCD year) to byte 324 (BCD week) (LSB).
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_ID_MODULE_SERIAL_NUMBER</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module ID: Module Serial Number.
-        Located in DDR3 SPD bytes 122 (LSB) to 125.
-        Located in DDR4 SPD bytes 325 (LSB) to 328.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_CYCLICAL_REDUNDANCY_CODE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Cyclical Redundancy Code.
-        Located in DDR3 SPD bytes 126 (LSB) to 127.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_PART_NUMBER</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Part Number.
-        Located in DDR3 SPD bytes 128 - 145.
-        Located in DDR4 SPD bytes 329 - 348.
-    </description>
-    <valueType>uint8</valueType>
-    <array>18</array>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_REVISION_CODE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Revision Code.
-        Located in DDR3 SPD bytes 146 (LSB) to 147.
-        Located in DDR4 SPD byte 349
-        The raw data has a different size for DDR3 and DDR4.
-        HWPs must use this DDR neutral attribute.
-        Platform support must call an Accessor HWP.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_DRAM_MANUFACTURER_JEDEC_ID_CODE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM Manufacturer JEDEC ID Code.
-        Located in DDR3 SPD bytes 148 (LSB) to 149.
-        Located in DDR4 SPD bytes 350 (LSB) to 351.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_BAD_DQ_DATA</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Bad DQ pin data stored in DIMM SPD. This data is in a special fomat.
-        This must only be called by a firmware HWP that knows how to
-        decode the data. HWP/PLAT firmware that needs to get/set the
-        Bad DQ Bitmap from a Centaur DQ point of view must use the
-        ATTR_BAD_DQ_BITMAP attribute.
-    </description>
-    <valueType>uint8</valueType>
-    <array>80</array>
-    <platInit/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_DIMM_RCD_CNTL_WORD_0_15</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>RCD Control Word. Supplied by SPD, used by mss_eff_config.C and mss_draminit.C . Each dimm will have a value.
-        consumer: mss_dram_init, mss_eff_config firmware notes: In order to make this readable to the OpenPower: It is necessary
-        to swap the nibbles for a given byte.  IE this is pulled from SPD bytes 69 - 76. (DDR3)
-        The attribute would contain byte 69 nibble 1, followed by byte 69 nibble 0, followed by byte 70 nibble 1, and so forth.
-   </description>
-    <valueType>uint64</valueType>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DIMM_RCD_CNTL_WORD_0_15</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>This will be replaced by ATTR_SPD_DIMM_RCD_CNTL_WORD_0_15. Until migration is complete USE as is. (Will be deleted soon)
-    IE this is pulled from SPD bytes 69 - 76. (DDR3)
-    The attribute would contain byte 69 nibble 1, followed by byte 69 nibble 0, followed by byte 70 nibble 1, and so forth.
-   </description>
-    <valueType>uint64</valueType>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DIMM_RCD_OUTPUT_TIMING</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RCD Timing. Supplied by VPD, used by mss_eff_config.C. Each dimm will have a value.
-        consumer: mss_eff_config
-   </description>
-    <valueType>uint8</valueType>
-    <enum>1T = 0x01, 3T = 0x03</enum>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<!--
-*******************************************************************************
-The following attributes can be queried from DDR3 DIMMs only
-Querying them from DDR4 DIMMs will result in an error
-*******************************************************************************
--->
-
-<attribute>
-    <id>ATTR_SPD_FTB_DIVIDEND</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Fine Timebase Dividend.
-        Located in DDR3 SPD byte 9, bits 7-4.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FTB_DIVISOR</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Fine Timebase Divisor.
-        Located in DDR3 SPD byte 9, bits 3-0.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MTB_DIVIDEND</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Medium Timebase Dividend.
-        Located in DDR3 SPD byte 10.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MTB_DIVISOR</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Medium Timebase Divisor.
-        Located in DDR3 SPD byte 11.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TWRMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Write Recovery Time (tWRmin).
-        Located in DDR3 SPD byte 17.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRRDMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Row Active to Row Active Delay Time (tRRDmin).
-        Located in DDR3 SPD byte 19.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRFCMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Refresh Recovery Delay Time (tRFCmin).
-        Located in DDR3 SPD byte 24 (LSB) and byte 25.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TWTRMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Internal Write to Read Command Delay Time (tWTRmin).
-        Located in DDR3 SPD byte 26.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRTPMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Internal Read to Precharge Command Delay Time (tRTPmin).
-        Located in DDR3 SPD byte 27.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_ADDR_MIRRORING</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced address mirroring attribute.
-        Located in DDR3 SPD byte 63 bits 1-0.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-        NO_RANKS = 0x00,
-        ODD_RANKS = 0x01
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F0RC3_F0RC2</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F0RC3/F0RC2.
-        Timing control AND Drive strength, Address/Command AND QxCS_n
-        Located in DDR3 SPD byte 67.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F0RC5_F0RC4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F0RC5/F0RC4.
-        Drive strength, QxODT AND QxCKE and Clock.
-        Located in DDR3 SPD byte 68.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F1RC11_F1RC8</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F1RC11/F1RC8.
-        Extended delay for clocks, QxCS_n and QxODT AND QxCKE.
-        Located in DDR3 SPD byte 69.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F1RC13_F1RC12</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F1RC13/F1RC12.
-        Additive delay for QxCS_n and QxCA.
-        Located in DDR3 SPD byte 70.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F1RC15_F1RC14</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F1RC15/F1RC14.
-        Additive delay for QxODT and QxCKE.
-        Located in DDR3 SPD byte 71.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F3RC9_F3RC8_FOR_800_1066</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F3RC9/F3RC8 for 800 AND 1066.
-        DRAM interface MDQ Termination and Drive strength.
-        Located in DDR3 SPD byte 72.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F34RC11_F34RC10_FOR_800_1066</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[3,4]RC11/F[3,4]RC10 for 800 AND 1066.
-        Rank 0AND1 Read and Write QxODT control.
-        Located in DDR3 SPD byte 73.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F56RC11_F56RC10_FOR_800_1066</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[5,6]RC11/F[5,6]RC10 for 800 AND 1066.
-        Rank 2AND3 Read and Write QxODT control.
-        Located in DDR3 SPD byte 74.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F78RC11_F78RC10_FOR_800_1066</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[7,8]RC11/F[7,8]RC10 for 800 AND 1066.
-        Rank 4AND5 Read and Write QxODT control.
-        Located in DDR3 SPD byte 75.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F910RC11_F910RC10_FOR_800_1066</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[9,10]RC11/F[9,10]RC10 for 800 AND 1066.
-        Rank 6AND7 Read and Write QxODT control.
-        Located in DDR3 SPD byte 76.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_MR12_FOR_800_1066</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced MR1,2 registers for 800 AND 1066.
-        DRAM Rtt_WR for all ranks, DRAM Rtt_Nom for ranks 0 and 1, DRAM driver impedance for all ranks.
-        Located in DDR3 SPD byte 77.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F3RC9_F3RC8_FOR_1333_1600</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F3RC9/F3RC8 for 1333 AND 1600.
-        DRAM interface MDQ Termination and Drive strength.
-        Located in DDR3 SPD byte 78.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F34RC11_F34RC10_FOR_1333_1600</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[3,4]RC11/F[3,4]RC10 for 1333 AND 1600.
-        Rank 0AND1 Read and Write QxODT control.
-        Located in DDR3 SPD byte 79.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F56RC11_F56RC10_FOR_1333_1600</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[5,6]RC11/F[5,6]RC10 for 1333 AND 1600.
-        Rank 2AND3 Read and Write QxODT control.
-        Located in DDR3 SPD byte 80.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F78RC11_F78RC10_FOR_1333_1600</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[7,8]RC11/F[7,8]RC10 for 1333 AND 1600.
-        Rank 4AND5 Read and Write QxODT control.
-        Located in DDR3 SPD byte 81.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F910RC11_F910RC10_FOR_1333_1600</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[9,10]RC11/F[9,10]RC10 for 1333 AND 1600.
-        Rank 6AND7 Read and Write QxODT control.
-        Located in DDR3 SPD byte 82.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_MR12_FOR_1333_1600</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced MR1,2 registers for 1333 AND 1600.
-        DRAM Rtt_WR for all ranks, DRAM Rtt_Nom for ranks 0 and 1, DRAM driver impedance for all ranks.
-        Located in DDR3 SPD byte 83.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F3RC9_F3RC8_FOR_1866_2133</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F3RC9/F3RC8 for 1866 AND 2133.
-        DRAM interface MDQ Termination and Drive strength.
-        Located in DDR3 SPD byte 84.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F34RC11_F34RC10_FOR_1866_2133</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[3,4]RC11/F[3,4]RC10 for 1866 AND 2133.
-        Rank 0AND1 Read and Write QxODT control.
-        Located in DDR3 SPD byte 85.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F56RC11_F56RC10_FOR_1866_2133</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[5,6]RC11/F[5,6]RC10 for 1866 AND 2133.
-        Rank 2AND3 Read and Write QxODT control.
-        Located in DDR3 SPD byte 86.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F78RC11_F78RC10_FOR_1866_2133</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[7,8]RC11/F[7,8]RC10 for 1866 AND 2133.
-        Rank 4AND5 Read and Write QxODT control.
-        Located in DDR3 SPD byte 87.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F910RC11_F910RC10_FOR_1866_2133</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[9,10]RC11/F[9,10]RC10 for 1866 AND 2133.
-        Rank 6AND7 Read and Write QxODT control.
-        Located in DDR3 SPD byte 88.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_MR12_FOR_1866_2133</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced MR1,2 registers for 1866 AND 2133.
-        DRAM Rtt_WR for all ranks, DRAM Rtt_Nom for ranks 0 and 1, DRAM driver impedance for all ranks.
-        Located in DDR3 SPD byte 89.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<!--
-*******************************************************************************
-The following attributes can be queried from DDR4 DIMMs only
-Querying them from DDR3 DIMMs will result in an error
-*******************************************************************************
--->
-<attribute>
-    <id>ATTR_SPD_SDRAM_BANKGROUPS_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Number of bank groups.
-        Located in DDR4 SPD byte 4, bits 7-6.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>BG0 = 0x00, BG2 = 0x01, BG4 = 0x02</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TIMEBASE_MTB_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        defines a value in picoseconds that represents the fundamental timebase
-        for medium grain timing calculations. This value is used as a multiplier
-        for formulating subsequent timing parameters.
-        Located in DDR4 SPD byte 17, bits 3-2.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>PS125 = 0x00</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TIMEBASE_FTB_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        defines a value in picoseconds that represents the fundamental timebase
-        for fine grain timing calculations. This value is used as a multiplier
-        for formulating subsequent timing parameters.
-        Located in DDR4 SPD byte 17, bits 1-0.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>PS1 = 0x00</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TCKMAX_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Maximum cycle time (tCKmax).
-        Located in DDR4 SPD byte 19.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRFC1MIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum SDRAM Refresh Recovery Time Delay in medium timebase (MTB) units
-        Located in DDR4 SPD bytes 31(MSB) bits 15-8 and SPD byte 30(LSB) 7-0.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRFC2MIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum SDRAM Refresh Recovery Time Delay in medium timebase (MTB) units
-        Located in DDR4 SPD bytes 33(MSB) bits 15-8 and SPD byte 32(LSB) 7-0.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRFC4MIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum SDRAM Refresh Recovery Time Dealy in medium timebase (MTB) units.
-        Located in DDR4 SPD byte 35(MSB) bits 15-8 and SPD byte 34(LSB) 7-0.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRRDSMIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        The minimum SDRAM Activate to Activate Delay Time to different bank 
-        groups in medium timebase (MTB) units. Controller designers must also 
-        note that at some frequencies, a minimum number of clocks may be required
-        resulting in a larger tRRD_Smin value than indicated in the SPD. 
-        For example, tRRD_Smin for DDR4-1600 must be 4 clocks.
-        Located in DDR4 SPD byte 38
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRRDLMIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        The minimum SDRAM Activate to Activate Delay Time to same  bank 
-        groups in medium timebase (MTB) units. Controller designers must also 
-        note that at some frequencies, a minimum number of clocks may be required
-        resulting in a larger tRRD_Smin value than indicated in the SPD. 
-        For example, tRRD_Lmin for DDR4-1600 must be 4 clocks.
-        Located in DDR4 SPD byte 39
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TCCDLMIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        The minimum SDRAM CAS to CAS Delay Time to same  bank 
-        groups in medium timebase (MTB) units. Controller designers must also 
-        note that at some frequencies, a minimum number of clocks may be required
-        resulting in a larger tCCD_Lmin value than indicated in the SPD. 
-        For example, tCCD_Lmin for DDR4-2133 must be 6 clocks.
-        Located in DDR4 SPD byte 40 
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TCCDLMIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Modifies the calculation of SPD Byte 40 with a fine correction 
-        using FTB units. The value of tCCD_Lmin comes from the SDRAM data 
-        sheet. This value is a two.s complement multiplier for FTB units, 
-        ranging from +127 to -128.
-        Located in DDR4 SPD byte 117 
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TRRDLMIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Modifies the calculation of SPD Byte 39 with a fine correction using 
-        FTB units. The value of tRRD_Lmin comes from the SDRAM data sheet. 
-        This value is a two.s complement multiplier for FTB units, 
-        ranging from +127 to -128.
-        Located in DDR4 SPD byte 118 
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TRRDSMIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Modifies the calculation of SPD Byte 38 (MTB units) with a fine 
-        correction using FTB units. The value of tRRD_Smin comes from the 
-        SDRAM data sheet. This value is a two.s complement multiplier for 
-        FTB units, ranging from +127 to -128.
-        Located in DDR4 SPD byte 119 
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TCKMAX_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Fine Offset for SDRAM Minimum Cycle Time (tCKAVGmax).
-        Located in DDR4 SPD byte 124.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_CRC_BASE_CONFIG_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        contains the calculated CRC for bytes 0~125 (0x000~0x07D) in the SPD
-        Located in DDR4 SPD byte 126(LSB) and 127(MSB).
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_DRAM_STEPPING_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Defines the vendor die revision level (often called the .stepping.)
-        of the DRAMs on the module. This byte is optional. 
-        For modules without DRAM stepping information, this byte should
-        be programmed to 0xFF.
-        Located in DDR4 SPD byte 352
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_CRC_MNFG_SEC_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        contains the calculated CRC for bytes 320~381 (0x140~0x17D) in the SPD
-        Located in DDR4 SPD byte 382(LSB) and 383(MSB).
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_VERSION</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        The VPD Version of this DIMM.  The version number can be an indication of when different DIMM keywords are valid and is loaded from the platform.  A version number of zero is unknown.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<!--
-*******************************************************************************
-The following attributes can be queried from LRDIMM type DDR4 DIMMs only
-*******************************************************************************
--->
-
-<attribute>
-    <id>ATTR_SPD_DIMM_MODULE_ATTRIBUTES</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Indicates number of registers used and number of rows of DRAM's on LRDIMM.
-         Byte 131, Bits 1-0 for # of registers used on LRDIMM. 
-         00 - Undefined , 01 - 1 Register , 10,11 -Reserved.
-        Byte 131, Bits 3-2 for # of rows of DRAM's on LRDIMM
-         00,11- Undefined, 01- 1 Row, 10 - 2 Rows.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_REGISTER_MANF_ID</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Manufacturer of the memory buffer on DIMM module. 
-         Located in DDR4 SPD bytes 133(LSB) and 134(MSB).
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_ADDR_MAP_REG_TO_DRAM</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Address mapping from Register to DRAM and Drive strength.
-         Located in DDR4 SPD bytes 136 and 137.
-        Byte 136 bit 0, 0 - Standard, 1 - Mirrored.
-        Byte 137 has drive strength for control and command/Address.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_REG_OUTPUT_DRV_STRENGTH_CK</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Drive strength for clock outputs of the registering clock driver.
-         Located in DDR4 SPD bytes 138.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_VREF_DQ_RANK0</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        VREFDQ value for the package rank 0 DRAM's.
-         Located in DDR4 SPD bytes 140.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_VREF_DQ_RANK1</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        VREFDQ value for the package rank 1 DRAM's.
-         Located in DDR4 SPD bytes 141.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_VREF_DQ_RANK2</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        VREFDQ value for the package rank 2 DRAM's.
-         Located in DDR4 SPD bytes 142.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_VREF_DQ_RANK3</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        VREFDQ value for the package rank 3 DRAM's.
-         Located in DDR4 SPD bytes 143.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_BUF_VREF_DQ_FOR_DRAM</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        VREFDQ value for the data buffer component.
-         Located in DDR4 SPD bytes 144.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_BUF_MDQ_DRV_LESS_THAN_1866</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Data Buffer MDQ Drive strength and RTT for data rate less than 1866.
-         Located in DDR4 SPD bytes 145.
-        Bits 2-0 for MDQ Read Termination strength.
-        Bits 6-4 for MDQ Drive strength.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_BUF_MDQ_DRV_1866_2400</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Data Buffer MDQ Drive strength and RTT for data rate between 1866 and 2400.
-         Located in DDR4 SPD bytes 146.
-        Bits 2-0 for MDQ Read Termination strength.
-        Bits 6-4 for MDQ Drive strength.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_BUF_MDQ_DRV_2400_3200</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Data Buffer MDQ Drive strength and RTT for data rate between 2400 and 3200.
-         Located in DDR4 SPD bytes 147.
-        Bits 2-0 for MDQ Read Termination strength.
-        Bits 6-4 for MDQ Drive strength.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_DRV_STRENGTH</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM Drive strength for all the data rates between 1866 and 3200.
-         Located in DDR4 SPD bytes 148.
-        Bits 1-0 for Datarate less than 1866.
-        Bits 3-2 for Data rate between 1866 and 2400.
-        Bits 5-4 for data rate between 2400 and 3200.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_WR_LESS_THAN_1866</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_WR) for data rates less than 1866
-         Located in DDR4 SPD bytes 149 bits 2-0.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_NOM_LESS_THAN_1866</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_NOM)for data rates less than 1866
-         Located in DDR4 SPD bytes 149 bits 5-3.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_WR_1866_2400</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_WR) for data rates between 1866 and 2400.
-         Located in DDR4 SPD bytes 150 bits 2-0.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_NOM_1866_2400</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_NOM)for data rates between 1866 and 2400.
-         Located in DDR4 SPD bytes 150 bits 5-3.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_WR_2400_3200</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_WR) for data rates between 2400 and 3200.
-         Located in DDR4 SPD bytes 151 bits 2-0.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_NOM_2400_3200</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_NOM)for data rates between 2400 and 3200.
-         Located in DDR4 SPD bytes 151 bits 5-3.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_PARK_LESS_THAN_1866</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_PARK)for data rates less than 1866.
-         Located in DDR4 SPD bytes 152.
-         Bit 2-0 for package ranks 0 and 1.
-         Bit 5-3 for package ranks 2 and 3.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_PARK_1866_2400</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_PARK)for data rates between 1866 and 2400.
-         Located in DDR4 SPD bytes 153.
-         Bit 2-0 for package ranks 0 and 1.
-         Bit 5-3 for package ranks 2 and 3.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_PARK_2400_3200</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_PARK)for data rates between 2400 and 3200.
-         Located in DDR4 SPD bytes 154.
-         Bit 2-0 for package ranks 0 and 1.
-         Bit 5-3 for package ranks 2 and 3.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<!--
-*******************************************************************************
-The following attributes are DDR3 specific. Regular HWPs should query the DDR
-neutral attribute, these attributes should only be queried by the Accessor HWP
-that handles the DDR neutral attribute.
-*******************************************************************************
--->
-<attribute>
-    <id>ATTR_SPD_SDRAM_BANKS_DDR3</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Number of banks.
-        Located in DDR3 SPD byte 4, bits 6-4.
-        This attribute must only be used by an Accessor HWP.
-        Regular HWPs must use ATTR_SPD_SDRAM_BANKS.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>B8 = 0x00, B16 = 0x01, B32 = 0x02, B64 = 0x03</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_NOMINAL_VOLTAGE_DDR3</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Nominal voltage (bitmap).
-        Located in DDR3 SPD byte 6, bits 2-0.
-        This attribute must only be used by an Accessor HWP.
-        Regular HWPs must use ATTR_SPD_MODULE_NOMINAL_VOLTAGE.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>NOTOP1_5 = 0x01, OP1_35 = 0x02, OP1_2X = 0x04</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_CAS_LATENCIES_SUPPORTED_DDR3</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        CAS Latencies supported (bitmap).
-        Located in DDR3 SPD byte 14 (LSB) and byte 15.
-        This attribute must only be used by an Accessor HWP.
-        Regular HWPs must use ATTR_SPD_CAS_LATENCIES_SUPPORTED.
-    </description>
-    <valueType>uint32</valueType>
-    <enum>
-        CL_18 = 0x00004000,
-        CL_17 = 0x00002000,
-        CL_16 = 0x00001000,
-        CL_15 = 0x00000800,
-        CL_14 = 0x00000400,
-        CL_13 = 0x00000200,
-        CL_12 = 0x00000100,
-        CL_11 = 0x00000080,
-        CL_10 = 0x00000040,
-        CL_9  = 0x00000020,
-        CL_8  = 0x00000010,
-        CL_7  = 0x00000008,
-        CL_6  = 0x00000004,
-        CL_5  = 0x00000002,
-        CL_4  = 0x00000001
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_REVISION_CODE_DDR3</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Revision Code.
-        Located in DDR3 SPD bytes 146 (LSB) to 147.
-        This attribute must only be used by an Accessor HWP.
-        Regular HWPs must use ATTR_SPD_MODULE_REVISION_CODE.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<!--
-*******************************************************************************
-The following attributes are DDR4 specific. Regular HWPs should query the DDR
-neutral attribute, these attributes should only be queried by the Accessor HWP
-that handles the DDR neutral attribute.
-*******************************************************************************
--->
-<attribute>
-    <id>ATTR_SPD_SDRAM_BANKS_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Number of banks.
-        Located in DDR4 SPD byte 4, bits 5-4.
-        This attribute must only be used by an Accessor HWP.
-        Regular HWPs must use ATTR_SPD_SDRAM_BANKS.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>B4 = 0x00, B8 = 0x01</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_NOMINAL_VOLTAGE_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Nominal voltage (bitmap).
-        Located in DDR4 SPD byte 11, bits 5-0.
-        This attribute must only be used by an Accessor HWP.
-        Regular HWPs must use ATTR_SPD_MODULE_NOMINAL_VOLTAGE.
-    </description>
-    <valueType>uint8</valueType>
-    <!-- Note that current DDR4 spec has TBD for bits 2-5 -->
-    <enum>
-        OP1_2V = 0x01, END1_2V = 0x02,
-        OPTBD1V = 0x04, ENDTBD1V = 0x08,
-        OPTBD2V = 0x10, ENDTBD2V = 0x20
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_CAS_LATENCIES_SUPPORTED_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        CAS Latencies supported (bitmap).
-        Located in DDR4 SPD byte 20 (LSB) through byte 23.
-        This attribute must only be used by an Accessor HWP.
-        Regular HWPs must use ATTR_SPD_CAS_LATENCIES_SUPPORTED.
-    </description>
-    <valueType>uint32</valueType>
-    <enum>
-        CL_24 = 0x00020000,
-        CL_23 = 0x00010000,
-        CL_22 = 0x00008000,
-        CL_21 = 0x00004000,
-        CL_20 = 0x00002000,
-        CL_19 = 0x00001000,
-        CL_18 = 0x00000800,
-        CL_17 = 0x00000400,
-        CL_16 = 0x00000200,
-        CL_15 = 0x00000100,
-        CL_14 = 0x00000080,
-        CL_13 = 0x00000040,
-        CL_12 = 0x00000020,
-        CL_11 = 0x00000010,
-        CL_10 = 0x00000008,
-        CL_9  = 0x00000004,
-        CL_8  = 0x00000002,
-        CL_7  = 0x00000001
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_REVISION_CODE_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Revision Code.
-        Located in DDR4 SPD byte 349
-        This attribute must only be used by an Accessor HWP.
-        Regular HWPs must use ATTR_SPD_MODULE_REVISION_CODE.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<!--
-*******************************************************************************
-The following attributes are from Centaur VPD. Consider moving them from this
-file
-*******************************************************************************
--->
-
-<attribute>
-    <id>ATTR_VPD_DRAM_ADDRESS_MIRRORING</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>
-        The C-DIMM ranks that have address mirroring.
-        This data is in the Record:VSPD, Keyword:AM field in C-DIMM VPD.
-        This attribute is only valid for C-DIMMs, an error should be returned if queried from IS-DIMMs.
-    Note: Muliple ranks can be mirrored.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-        RANK0_MIRRORED = 0x08,
-        RANK1_MIRRORED = 0x04,
-        RANK2_MIRRORED = 0x02,
-        RANK3_MIRRORED = 0x01
-    </enum>
-    <platInit/>
-    <array> 2 2</array>
-</attribute>
-
-<!-- Attributes added to support the VPD which was formally using the EFF settings -->
-
-<attribute>
-    <id>ATTR_VPD_ODT_RD</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Read ODT. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT),mss_eff_cnfg_termination
-consumer: various.C files and initfiles
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_ODT_WR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Write ODT. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-Creator: VPD(MT)/ mss_eff_cnfg_termination
-consumer: various.C and initfile
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DRAM_RON</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DRAM Ron. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-OHM48 is for DDR4.
-creator: VPD(MT)/mss_eff_cnfg_termination
-consumer: various.C files (no initfile)
-firmware notes: none
-This Attribute is to be interpreted as an Integer </description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 0, OHM34 = 34, OHM40 = 40, OHM48 = 48</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DRAM_RTT_NOM</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DRAM Rtt_Nom. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT),mss_eff_cnfg_termination
-consumer: various.C files (no initfiles)
-firmware notes: none
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, OHM20 = 20, OHM30 = 30, OHM34 = 34, OHM40 = 40, OHM48 = 48, OHM60 = 60, OHM80 = 80, OHM120 = 120, OHM240 = 240</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DRAM_RTT_WR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DRAM Rtt_WR. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-Creator: VPD(MT), mss_eff_cnfg_termination
-consumer: various.C files (no initfiles)
-firmware notes: none
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, OHM60 = 60, OHM120 = 120, OHM240 = 240, HIGHZ = 1</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DRAM_RTT_PARK</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DRAM Rtt_PARK. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-    RTT_Park value. This is for DDR4 MRS5.Each memory channel will have a value.
-Creator: VPD(MT), mss_eff_cnfg_termination
-consumer: various.C files (no initfiles)
-firmware notes: none
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, 60OHM = 60, 120OHM = 120, 40OHM = 40, 240OHM = 240, 48OHM = 48, 80OHM = 80, 34OHM = 34</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DRAM_WR_VREF</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DRAM Write Vref. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT) or mss_eff_cnfg_termination
-consumer: various.C and initfile
-firmware notes: none
-This is the nominal value
-This is for DDR3
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint32</valueType>
-    <enum>VDD420 = 420, VDD425 = 425, VDD430 = 430, VDD435 = 435, VDD440 = 440, VDD445 = 445, VDD450 = 450, VDD455 = 455, VDD460 = 460, VDD465 = 465, VDD470 = 470, VDD475 = 475, VDD480 = 480, VDD485 = 485, VDD490 = 490, VDD495 = 495, VDD500 = 500, VDD505 = 505, VDD510 = 510, VDD515 = 515, VDD520 = 520, VDD525 = 525, VDD530 = 530, VDD535 = 535, VDD540 = 540, VDD545 = 545, VDD550 = 550, VDD555 = 555, VDD560 = 560, VDD565 = 565, VDD570 = 570, VDD575 = 575</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DRAM_WRDDR4_VREF</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DRAM Write Vref. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT) or mss_eff_cnfg_termination
-consumer: various
-firmware notes: none
-This is the nominal value
-This is for DDR4
-The value is from 0 to 50</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_DRV_IMP_DQ_DQS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur DQ and DQS Drive Impedance Used in various locations and comes from the MT Keyword of the VPD or  is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT)/mss_eff_cnfg_termination
-consumer: initfile,various.C files
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>OHM24_FFE0 = 0x0A, OHM30_FFE0 = 0x08,
-OHM30_FFE480 = 0x48, OHM30_FFE240 = 0x38, OHM30_FFE160 = 0x28, OHM30_FFE120 = 0x18, OHM34_FFE0 = 0x07, OHM34_FFE480 = 0x47, OHM34_FFE240 = 0x37, OHM34_FFE160 = 0x27, OHM34_FFE120 = 0x17, OHM40_FFE0 = 0x06, OHM40_FFE480 = 0x46, OHM40_FFE240 = 0x36, OHM40_FFE160 = 0x26, OHM40_FFE120 = 0x16</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_DRV_IMP_ADDR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Address Drive Impedance Used in various locations and comes from the MT keyword of the VPD or  is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_termination
-consumer: initfile and various.C
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>OHM15 = 15, OHM20 = 20, OHM30 = 30, OHM40 = 40</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_DRV_IMP_CNTL</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Control Drive Impedance Used in various locations and comes from the MT keyword of the VPD or  is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT)/mss_eff_cnfg_termination
-consumer: initfile,various .C
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>OHM15 = 15, OHM20 = 20, OHM30 = 30, OHM40 = 40</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_DRV_IMP_CLK</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Clock Drive Impedance Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT),mss_eff_cnfg_termination
-consumer: initfiles,various
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>OHM15 = 15, OHM20 = 20, OHM30 = 30, OHM40 = 40</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_DRV_IMP_SPCKE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Spare Clock Drive Impedance Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT) , mss_eff_cnfg_termination
-consumer: initfiles, various.C
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>OHM15 = 15, OHM20 = 20, OHM30 = 30, OHM40 = 40</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_RCV_IMP_DQ_DQS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur DQ and DQS Receiver Impedance Used in various locations and it comes from the VPD MT keyword for custom DIMMs or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD, mss_eff_cnfg_termination
-Consumer: initfile + C code
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>OHM15 = 15, OHM20 = 20, OHM30 = 30, OHM40 = 40, OHM48 = 48, OHM60 = 60,  OHM80 = 80, OHM120 = 120, OHM160 = 160, OHM240 = 240</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_SLEW_RATE_DQ_DQS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur DQ and DQS Slew Rate Used in various locations and comes from the MT keyword of the VPD or  is computed in mss_eff_cnfg_termination. Slowest slew rate is 0, incrementing by one. The lower the number the slower the slew rate the higher the faster. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT), mss_eff_cnfg_termination
-consumer: initfiles,various.C
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer except MAX</description>
-    <valueType>uint8</valueType>
-    <enum>SLEW_3V_NS = 3,
-SLEW_4V_NS = 4,
-SLEW_5V_NS = 5,
-SLEW_6V_NS = 6,
-SLEW_MAXV_NS = 7</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_SLEW_RATE_ADDR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Address Slew Rate Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Slowest slew rate is 0, incrementing by one. The lower the number the slower the slew rate the higher the faster. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT),mss_eff_cnfg_termination
-consumer: initfile,various .C files
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer except Max</description>
-    <valueType>uint8</valueType>
-    <enum>SLEW_3V_NS = 3,
-SLEW_4V_NS = 4,
-SLEW_5V_NS = 5,
-SLEW_6V_NS = 6,
-SLEW_MAXV_NS = 7</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_SLEW_RATE_CLK</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Clock Slew Rate Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Slowest slew rate is 0, incrementing by one. The lower the number the slower the slew rate the higher the faster. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT)mss_eff_cnfg_termination
-consumer: initfile,various.C files
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer except max</description>
-    <valueType>uint8</valueType>
-    <enum>SLEW_3V_NS = 3,
-SLEW_4V_NS = 4,
-SLEW_5V_NS = 5,
-SLEW_6V_NS = 6,
-SLEW_MAXV_NS = 7</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_SLEW_RATE_SPCKE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Spare Clock Slew Rate Used in various locations and comes from the MT keyword or is computed in mss_eff_cnfg_termination. Slowest slew rate is 0, incrementing by one. The lower the number the slower the slew rate the higher the faster. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT) or mss_eff_cnfg_termination
-consumer: initfile,various.C
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer except max</description>
-    <valueType>uint8</valueType>
-    <enum>SLEW_3V_NS = 3,
-SLEW_4V_NS = 4,
-SLEW_5V_NS = 5,
-SLEW_6V_NS = 6,
-SLEW_MAXV_NS = 7
-</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_SLEW_RATE_CNTL</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Control Slew Rate Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Slowest slew rate is 0, incrementing by one. The lower the number the slower the slew rate the higher the faster. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT),mss_eff_cnfg_termination
-consumer:initfile, various .C files
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer except for max</description>
-    <valueType>uint8</valueType>
-    <enum>SLEW_3V_NS = 3,
-SLEW_4V_NS = 4,
-SLEW_5V_NS = 5,
-SLEW_6V_NS = 6,
-SLEW_MAXV_NS = 7
-</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_RD_VREF</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Read Vref. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-Creator: VPD(MT) or mss_eff_cnfg_termination
-consumer: various.C and initfiles
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint32</valueType>
-    <enum>VDD40375 = 40375, VDD41750 = 41750, VDD43125 = 43125, VDD44500 = 44500, VDD45875 = 45875, VDD47250 = 47250, VDD48625 = 48625, VDD50000 = 50000, VDD51375 = 51375, VDD52750 = 52750, VDD54125 = 54125, VDD55500 = 55500, VDD56875 = 56875, VDD58250 = 58250, VDD59625 = 59625, VDD61000 = 61000, VDD60375 = 60375, VDD61750 = 61750, VDD63125 = 63125, VDD64500 = 64500, VDD65875 = 65875, VDD67250 = 67250, VDD68625 = 68625, VDD70000 = 70000, VDD71375 = 71375, VDD72750 = 72750, VDD74125 = 74125, VDD75500 = 75500, VDD76875 = 76875, VDD78250 = 78250, VDD79625 = 79625, VDD81000 = 81000</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CLK_P0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CLK_P0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CLK_P1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CLK_P1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CLK_P0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CLK_P0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CLK_P1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CLK_P1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A2</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A3</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A3</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A4</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A4</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A5</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A5</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A6</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A6</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A7</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A7</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A8</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A8</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A9</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A9</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A10</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A10</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A11</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A11</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A12</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A12</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A13</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A13</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A14</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A14</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A15</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A15</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_BA0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_BA0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_BA1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_BA1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_BA2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_BA2</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_CASN</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_CASN</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_RASN</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_RASN</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_WEN</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_WEN</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_PAR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_PAR</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_ACTN</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_ACTN</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CKE0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_CKE0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CKE1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_CKE1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CKE2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_CKE2</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CKE3</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_CKE3</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CSN0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_CSN0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CSN1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_CSN1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CSN2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_CSN2</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CSN3</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_CSN3</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_ODT0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_ODT0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_ODT1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_ODT1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CKE0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_CKE0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CKE1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_CKE1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CKE2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_CKE2</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CKE3</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_CKE3</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CSN0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_CSN0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CSN1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_CSN1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CSN2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_CSN2</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CSN3</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_CSN3</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_ODT0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_ODT0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_ODT1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_ODT1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_PERIODIC_MEMCAL_MODE_OPTIONS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Settings for periodic CAL - zcal 1, syscal 1, centering 0, rdclk 1, dqs align 1, rdclk_update_dis 0, dutycycle 0, and power dis (dqs) 1. Second byte has repeat as 000, mpr mode as 0, mba as 11, and the spares as 00
-</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<!-- Spare attribute found in eclipz/hwpf/hwp/xml/attribute_info/dimm_attributes.xml -->
-<!-- <attribute> -->
-<!--     <id>ATTR_VPD_DIMM_SPARE</id>  -->
-<!--     <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>  -->
-<!--     <description>Spare DRAM availability. It comes from the VPD or SPD in ISDIMM systems</description>  -->
-<!--     <valueType>uint8</valueType>  -->
-<!--     <enum>NO_SPARE = 0, LOW_NIBBLE = 1, HIGH_NIBBLE = 2, FULL_BYTE = 3</enum>  -->
-<!--     <platInit/>  -->
-<!--     <odmVisable/>  -->
-<!--     <odmChangeable/>  -->
-<!--     <array> 2 2 4</array>  -->
-<!-- </attribute>  -->
-
-<attribute>
-    <id>ATTR_VPD_CKE_PRI_MAP</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD keyword MT bytes 54 and 55 MT(54:55) for the Logical DIMM associated with port A.  Bytes 118:119 for port B, 182:183 for port C and 246:247 for port D.  In the end, the AB and CD portions form a 32 bit word for each mba to write into the corresponding ddrphy register</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <array>2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CKE_PWR_MAP</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD keyword MT bytes 56 to 59 MT(56:59) for the Logical DIMM associated with port A.  Bytes 120:123 for port B, 184:187 for port C and 248:251 for port D. The values for Port A concatenated with port B forms the value for one MBA.  C concat D forms the value for the other MBA</description>
-    <valueType>uint64</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_GPO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD keyword MT bytes 61 MT(61) for the Logical DIMM associated with port A.  Bytes 125 for port B, 189 for port C and 253 for port D</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <array>2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_RLO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD keyword MT byte 60 bits 4:7 for the Logical DIMM associated with port A.  Byte 124 bits 4:7 for port B, 188 bits 4:7 for port C and 252 bits 4:7 for port D</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <array>2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_WLO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD keyword MT byte 60 bits 0:3 for the Logical DIMM associated with port A.  Byte 124 bits 0:3 for port B, 188 bits 0:3 for port C and 252 bits 0:3 for port D</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <array>2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_TSYS_ADR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD MR keyword byte 49 for ports A and B and byte 177 for port C and D.    This means that all ADR blocks use this value on an mba level</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <array>2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_TSYS_DP18</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD MR keyword byte 113 for ports A and B and byte 241 for port C and D.  This means all DP18 blocks use this value on a mba level</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <array>2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CDIMM_SENSOR_MAP_PRIMARY</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Custom DIMM Sensor Map for Primary I2C Port (1 byte of data):
-0x00 No sensors attached
-0x01 DIMM sensor 0 attached
-0x02 DIMM sensor 1 attached
-0x04 DIMM sensor 2 attached
-0x08 DIMM sensor 3 attached
-0x10 DIMM sensor 4 attached
-0x20 DIMM sensor 5 attached
-0x40 DIMM sensor 6 attached
-0x80 DIMM sensor 7 attached
-Comes from the VPD MW Keyword</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CDIMM_SENSOR_MAP_SECONDARY</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Custom DIMM Sensor Map for Secondary I2C Port (1 byte of data):
-0x00 No sensors attached
-0x01 DIMM sensor 0 attached
-0x02 DIMM sensor 1 attached
-0x04 DIMM sensor 2 attached
-0x08 DIMM sensor 3 attached
-0x10 DIMM sensor 4 attached
-0x20 DIMM sensor 5 attached
-0x40 DIMM sensor 6 attached
-0x80 DIMM sensor 7 attached
-Comes from the VPD MW Keyword</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DRAM_2N_MODE_ENABLED</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Describes if this MBA is in 2N address mode.  The DIMM attributes associated with this MBA describes if this mode is needed for SI. Come from the VPD and consumed in the mba_def.initfile.</description>
-    <valueType>uint8</valueType>
-    <enum>FALSE = 0, TRUE = 1</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_CDIMM_VPD_MASTER_POWER_SLOPE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Master Power Slope that comes from the VPD MW Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_CDIMM_VPD_MASTER_POWER_INTERCEPT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Master Power Intercept that comes from the VPD MW Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_CDIMM_VPD_SUPPLIER_POWER_SLOPE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Supplier Power Slope that comes from the VPD the MV Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_CDIMM_VPD_SUPPLIER_POWER_INTERCEPT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Supplier Power Intercept that comes from MV Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_L4_BANK_DELETE_VPD</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>L4 Bank Delete settings in VPD.
-Denotes what banks have been deleted from the L4.
-Data will be pulled from CDIMM VPD if CDIMM present.
-Data will be pulled from backplane VPD if IS DIMMs present.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <persistent/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_MT_VERSION_BYTE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Describes the Version of MT Keyword</description>
-    <valueType>uint8</valueType>
-   <platInit/>
-     <odmVisable/>
- </attribute>
-
-<attribute>
-    <id>ATTR_VPD_MR_VERSION_BYTE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Describes the Version of MR Keyword</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-     <odmVisable/>
- </attribute>
- 
- <attribute>
-    <id>ATTR_VPD_MR_DATA_CONTROL_BYTE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Describes the DATA control byte from MR</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-     <odmVisable/>
- </attribute>
- 
- <attribute>
-    <id>ATTR_VPD_MT_DATA_CONTROL_BYTE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Describes the DATA control byte from MT</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-     <odmVisable/>
- </attribute>
- 
- <attribute>
-    <id>ATTR_VPD_VM_KEYWORD</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Fetches the VM Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-     <odmVisable/>
- </attribute>
- 
- <attribute>
-    <id>ATTR_VPD_VD_KEYWORD</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Fetch the VD keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-     <odmVisable/>
- </attribute>
- 
- <attribute>
-    <id>ATTR_VPD_DW_KEYWORD</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Describes Centaur Voltage from DW keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-     <odmVisable/>
- </attribute>
- 
-
-<attribute>
-    <id>ATTR_SPD_MODSPEC_COM_REF_RAW_CARD_REV</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Reference Raw Card Revision
-        Located in DDR3 SPD byte 62 bits 6-5.
-        Located in DDR4 SPD byte 130 bits 6-5.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODSPEC_COM_REF_RAW_CARD</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Reference Raw Card
-        Located in DDR3 SPD byte 62 bit 7 + bits 4-0.
-        Located in DDR4 SPD byte 130 bit 7 + bits 4-0.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-    A = 0x00, B = 0x01, C = 0x02, D = 0x03, E = 0x04, F = 0x05, G = 0x06, H = 0x07, J = 0x08, K = 0x09, L = 0x0a, M = 0x0b, N = 0x0c, P = 0x0d, R = 0x0e, T = 0x0f, U = 0x10, V = 0x11, W = 0x12, Y = 0x13, AA = 0x14, AB = 0x15, AC = 0x16, AD = 0x17, AE = 0x18, AF = 0x19, AG = 0x1a, AH = 0x1b, AJ = 0x1c, AK = 0x1d, AL = 0x1e, AM = 0x20, AN = 0x21, AP = 0x22, AR = 0x23, AT = 0x24, AU = 0x25, AV = 0x26, AW = 0x27, AY = 0x28, BA = 0x29, BB = 0x2a, BC = 0x2b, BD = 0x2c, BE = 0x2d, BF = 0x2e, BG = 0x2f, BH = 0x30, BJ = 0x31, BK = 0x32, BL = 0x33, BM = 0x34, BN = 0x35, BP = 0x36, BR = 0x37, BT = 0x38, BU = 0x39, BV = 0x3a, BW = 0x3b, BY = 0x3c, CA = 0x3d, CB = 0x3e, ZZ = 0x3f
-    </enum>
-    <platInit/>
-</attribute>
-
- <attribute>
-     <id>ATTR_VPD_POWER_CONTROL_CAPABLE</id>
-     <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-     <description>Capable power control settings.</description>
-     <valueType>uint8</valueType>
-     <enum>NONE = 0x00, SLOWEXIT_CAPABLE = 0x01, FASTEXIT_CAPABLE = 0x02, FASTSLOW_CAPABLE = 0x03</enum>
-     <platInit/>
-     <odmVisable/>
- </attribute>
-
-
- <attribute>
-     <id>ATTR_VPD_DIMM_RCD_IBT</id>
-     <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RCD IBT. Used in mss_dram_init and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each dimm will have a value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint32</valueType>
-    <enum>IBT_OFF = 0, IBT_100 = 100, IBT_150 = 150, IBT_200 = 200, IBT_300 = 300</enum>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-
- <attribute>
-     <id>ATTR_VPD_RD_CTR_WINDAGE_OFFSET</id>
-     <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Derived from calibration/characterization of read centering. Number of windage offset in units of pico-seconds[ps] with sign bit0 (0b0=positive, 0b1=negative) and value in bits1..31, so 0x80000023 for example would mean "-35ps". Can be overwritten by ODM vendors if done from VPD.  Each port will have a value.
-creator: VPD
-consumer: mss_draminit_training_adv
-firmware notes: none</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-
-<attribute>
-    <id>ATTR_ISDIMM_MBVPD_INDEX</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>VPD index for associated chip's memory buffer VPD</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_CDIMM_VPD_MASTER_TOTAL_POWER_SLOPE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Master Total Power Slope that comes from the VPD MW Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_CDIMM_VPD_MASTER_TOTAL_POWER_INTERCEPT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Master Total Power Intercept that comes from the VPD MW Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_CDIMM_VPD_SUPPLIER_TOTAL_POWER_SLOPE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Supplier Total Power Slope that comes from the VPD MV Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_CDIMM_VPD_SUPPLIER_TOTAL_POWER_INTERCEPT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Supplier Total Power Intercept that comes from the VPD MV Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-</attributes>
diff --git a/src/usr/hwpf/hwp/dmi_training/cen_dmi_scominit_errors.xml b/src/usr/hwpf/hwp/dmi_training/cen_dmi_scominit_errors.xml
deleted file mode 100644
index de7fbb25b..000000000
--- a/src/usr/hwpf/hwp/dmi_training/cen_dmi_scominit_errors.xml
+++ /dev/null
@@ -1,37 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dmi_training/cen_dmi_scominit_errors.xml $   -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: cen_dmi_scominit_errors.xml,v 1.4 2013/10/28 23:07:36 jmcgill Exp $ -->
-<!-- Error definitions for cen_dmi_scominit procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <!-- $Id: cen_dmi_scominit_errors.xml,v 1.4 2013/10/28 23:07:36 jmcgill Exp $ -->
-  <hwpError>
-    <rc>RC_CEN_DMI_SCOMINIT_INVALID_TARGET</rc>
-    <ffdc>TARGET</ffdc>
-    <description>Invalid target type presented to cen_dmi_scominit HWP (expects TARGET_TYPE_MEMBUF_CHIP).</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dmi_training/mss_getecid/memory_mss_get_cen_ecid.xml b/src/usr/hwpf/hwp/dmi_training/mss_getecid/memory_mss_get_cen_ecid.xml
deleted file mode 100644
index 087ab4a62..000000000
--- a/src/usr/hwpf/hwp/dmi_training/mss_getecid/memory_mss_get_cen_ecid.xml
+++ /dev/null
@@ -1,28 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dmi_training/mss_getecid/memory_mss_get_cen_ecid.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_get_cen_ecid.xml,v 1.1 2013/06/19 18:28:15 bellows Exp $ -->
-<!-- For file ../../ipl/fapi/mss_get_cen_ecid.C -->
-<!-- // *! OWNER NAME  : Mark Bellows Email: bellows@us.ibm.com -->
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock_errors.xml b/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock_errors.xml
deleted file mode 100644
index 16b681c24..000000000
--- a/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock_errors.xml
+++ /dev/null
@@ -1,752 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_cen_framelock_errors.xml,v 1.6 2013/11/08 17:54:43 baysah Exp $ -->
-<!-- Error definitions for proc_cen_framelock procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_INVALID_ARGS</rc>
-    <description>Invalid or out-of-range argument value(s) presented to proc_cen_framelock HWP.</description>
-    <ffdc>ARGS</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_FL_P8_FIR_ERR_MCS</rc>
-    <description>
-        Framelock sequence set FIR bit in P8 MCI FIR Register.
-        FIR bit indicates MCS issue.
-    </description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MCS_CHIPLET</target>
-    </deconfigure>
-    <gard>
-      <target>MCS_CHIPLET</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_FL_P8_FIR_ERR_MEMBUF</rc>
-    <description>
-        Framelock sequence set FIR bit in P8 MCI FIR Register.
-        FIR bit indicates MEMBUF issue.
-    </description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_ERRSTATE_FL_P8_FIR_ERR_MCS</rc>
-    <description>
-        Framelock errstate sequence set FIR bit in P8 MCI FIR Register.
-        FIR bit indicates MCS issue.
-    </description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MCS_CHIPLET</target>
-    </deconfigure>
-    <gard>
-      <target>MCS_CHIPLET</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_ERRSTATE_FL_P8_FIR_ERR_MEMBUF</rc>
-    <description>
-        Framelock errstate sequence set FIR bit in P8 MCI FIR Register.
-        FIR bit indicates MEMBUF issue.
-    </description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_ERRSTATE_FL_CEN_FIR_ERR</rc>
-    <description>Framelock errstate sequence set FIR bit in Centaur MBI FIR Register.</description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_FL_P8_FAIL_ERR</rc>
-    <description>Framelock sequence fail reported in P8 MCI Status Register.</description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_ERRSTATE_FL_P8_FAIL_ERR</rc>
-    <description>Framelock errstate sequence fail reported in P8 MCI Status Register.</description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_ERRSTATE_FL_CEN_FAIL_ERR</rc>
-    <description>Framelock errstate sequence fail reported in Centaur MBI Status Register.</description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_FL_TIMEOUT_ERR</rc>
-    <description>Framelock sequence timed out waiting for pass/fail indication in P8 MCI Status Register.</description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_ERRSTATE_FL_TIMEOUT_ERR</rc>
-    <description>Framelock errstate sequence timed out waiting for pass/fail indication in P8 MCI Status Register.</description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_FRTL_P8_FIR_ERR_MCS</rc>
-    <description>
-        FRTL sequence set FIR bit in P8 MCI FIR Register.
-        FIR bit indicates MCS issue.
-    </description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MCS_CHIPLET</target>
-    </deconfigure>
-    <gard>
-      <target>MCS_CHIPLET</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_FRTL_P8_FIR_ERR_MEMBUF</rc>
-    <description>
-        FRTL sequence set FIR bit in P8 MCI FIR Register.
-        FIR bit indicates MEMBUF issue.
-    </description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_MANUAL_FRTL_P8_FIR_ERR_MCS</rc>
-    <description>
-        FRTL manual sequence set FIR bit in P8 MCI FIR Register.
-        FIR bit indicates MCS issue.
-    </description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MCS_CHIPLET</target>
-    </deconfigure>
-    <gard>
-      <target>MCS_CHIPLET</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_MANUAL_FRTL_P8_FIR_ERR_MEMBUF</rc>
-    <description>
-        FRTL manual sequence set FIR bit in P8 MCI FIR Register.
-        FIR bit indicates MEMBUF issue.
-    </description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_ERRSTATE_FRTL_P8_FIR_ERR_MCS</rc>
-    <description>
-        FRTL errstate sequence set FIR bit in P8 MCI FIR Register.
-        FIR bit indicates MCS issue.
-    </description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MCS_CHIPLET</target>
-    </deconfigure>
-    <gard>
-      <target>MCS_CHIPLET</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_ERRSTATE_FRTL_P8_FIR_ERR_MEMBUF</rc>
-    <description>
-        FRTL errstate sequence set FIR bit in P8 MCI FIR Register.
-        FIR bit indicates MEMBUF issue.
-    </description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_MANUAL_FRTL_CEN_FIR_ERR</rc>
-    <description>FRTL mannual sequence set FIR bit in Centaur MBI FIR Register.</description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_ERRSTATE_FRTL_CEN_FIR_ERR</rc>
-    <description>FRTL errstate sequence set FIR bit in Centaur MBI FIR Register.</description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_FRTL_P8_FAIL_ERR</rc>
-    <description>FRTL sequence fail reported in P8 MCI Status Register.</description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_MANUAL_FRTL_P8_FAIL_ERR</rc>
-    <description>FRTL manual sequence fail reported in P8 MCI Status Register.</description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_ERRSTATE_FRTL_P8_FAIL_ERR</rc>
-    <description>FRTL errstate sequence fail reported in P8 MCI Status Register.</description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_MANUAL_FRTL_CEN_FAIL_ERR</rc>
-    <description>FRTL manual sequence fail reported in Centaur MBI Status Register.</description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_ERRSTATE_FRTL_CEN_FAIL_ERR</rc>
-    <description>FRTL errstate sequence fail reported in Centaur MBI Status Register.</description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_FRTL_TIMEOUT_ERR</rc>
-    <description>FRTL sequence timed out waiting for pass/fail indication in P8 MCI Status Register.</description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_MANUAL_FRTL_TIMEOUT_ERR</rc>
-    <description>FRTL manual sequence timed out waiting for pass/fail indication in Centaur MBI Status Register or P8 MCI Status Register.</description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_ERRSTATE_FRTL_TIMEOUT_ERR</rc>
-    <description>FRTL errstate sequence timed out waiting for pass/fail indication in Centaur MBI Status Register or P8 MCI Status Register.</description>
-    <ffdc>MCI_STAT</ffdc>
-    <ffdc>MCI_FIR</ffdc>
-    <ffdc>MBI_STAT</ffdc>
-    <ffdc>MBI_FIR</ffdc>
-    <callout>
-      <target>MEMBUF_CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MCS_CHIPLET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-      <bus>MCS_CHIPLET, MEMBUF_CHIP</bus>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP</target>
-    </gard>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dmi_training/proc_cen_set_inband_addr/proc_cen_set_inband_addr_attributes.xml b/src/usr/hwpf/hwp/dmi_training/proc_cen_set_inband_addr/proc_cen_set_inband_addr_attributes.xml
deleted file mode 100644
index 4dad33abe..000000000
--- a/src/usr/hwpf/hwp/dmi_training/proc_cen_set_inband_addr/proc_cen_set_inband_addr_attributes.xml
+++ /dev/null
@@ -1,39 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dmi_training/proc_cen_set_inband_addr/proc_cen_set_inband_addr_attributes.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_cen_set_inband_addr_attributes.xml,v 1.4 2013/09/23 16:12:02 mfred Exp $ -->
-<!-- proc_cen_set_inband_addr_attributes.xml -->
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MCS_INBAND_BASE_ADDRESS</id>
-    <targetType>TARGET_TYPE_MCS_CHIPLET</targetType>
-    <description>Base address to set in MCFGPR for inband SCOM access
-      creator: platform
-      consumer: proc_cen_set_inband_addr
-    </description>
-    <valueType>uint64</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/dmi_training/proc_dmi_scominit_errors.xml b/src/usr/hwpf/hwp/dmi_training/proc_dmi_scominit_errors.xml
deleted file mode 100644
index 93ffaf3be..000000000
--- a/src/usr/hwpf/hwp/dmi_training/proc_dmi_scominit_errors.xml
+++ /dev/null
@@ -1,36 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dmi_training/proc_dmi_scominit_errors.xml $  -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_dmi_scominit_errors.xml,v 1.3 2013/11/09 18:38:44 jmcgill Exp $ -->
-<!-- Error definitions for proc_dmi_scominit procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_DMI_SCOMINIT_INVALID_TARGET</rc>
-    <ffdc>MCS_TARGET</ffdc>
-    <description>Invalid target type presented to proc_dmi_scominit HWP (expects TARGET_TYPE_MCS_CHIPLET).</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup_errors.xml b/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup_errors.xml
deleted file mode 100644
index cf00cf893..000000000
--- a/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup_errors.xml
+++ /dev/null
@@ -1,42 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_mpipl_chip_cleanup_errors.xml,v 1.5 2014/03/02 23:18:31 belldi Exp $ -->
-<!-- Error codes for proc_mpipl_chip_cleanup -->
-<hwpErrors>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_MPIPL_MCD_RECOVERY_NOT_DISABLED_RC</rc>
-    <description>MCD recovery is not disabled as expected during MPIPL</description>
-    <!-- Add target chip -->
-    <ffdc>CHIP_TARGET</ffdc>
-    <!-- Add register address -->
-    <ffdc>MCD_RECOV_CTRL_REG_ADDR</ffdc>
-    <!-- Add register data -->
-    <ffdc>MCD_RECOV_CTRL_REG_DATA</ffdc>
-    <!-- Add procedure callout -->
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_initialization/mss_extent_setup/memory_mss_extent_setup.xml b/src/usr/hwpf/hwp/dram_initialization/mss_extent_setup/memory_mss_extent_setup.xml
deleted file mode 100644
index 65c933800..000000000
--- a/src/usr/hwpf/hwp/dram_initialization/mss_extent_setup/memory_mss_extent_setup.xml
+++ /dev/null
@@ -1,27 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_initialization/mss_extent_setup/memory_mss_extent_setup.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_extent_setup.xml,v 1.1 2013/06/19 18:28:06 bellows Exp $ -->
-<!-- For file ../../ipl/fapi/mss_extent_setup.C -->
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/memory_mss_power_cleanup.xml b/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/memory_mss_power_cleanup.xml
deleted file mode 100644
index ae4e3b046..000000000
--- a/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/memory_mss_power_cleanup.xml
+++ /dev/null
@@ -1,89 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/memory_mss_power_cleanup.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2014                   -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_power_cleanup.xml,v 1.1 2014/02/05 19:18:41 bellows Exp $ -->
-<!-- For file ../../ipl/fapi/mss_power_cleanup.C -->
-<!-- // *! OWNER NAME : bellows@us.ibm.com -->
-<!-- // *! BACKUP NAME : -->
-
-<hwpError>
-  <rc>RC_MSS_POWER_CLEANUP_MBA0_UNEXPECTED_BAD_RC</rc>
-  <description>Procedure got an unexpected fail in a cfam or scom access for mba0</description>
-  <callout>
-    <target>MBA_CHIPLET</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>MBA_CHIPLET</target>
-  </deconfigure>
-  <gard>
-    <target>MBA_CHIPLET</target>
-  </gard>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_POWER_CLEANUP_MBA1_UNEXPECTED_BAD_RC</rc>
-  <description>Procedure got an unexpected fail in a cfam or scom access for mba1</description>
-  <callout>
-    <target>MBA_CHIPLET</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>MBA_CHIPLET</target>
-  </deconfigure>
-  <gard>
-    <target>MBA_CHIPLET</target>
-  </gard>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_POWER_CLEANUP_FENCING_UNEXPECTED_BAD_RC</rc>
-  <description>Procedure got an unexpected fail in a cfam or scom access during fencing</description>
-  <callout>
-    <target>CENTAUR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>CENTAUR</target>
-  </deconfigure>
-  <gard>
-    <target>CENTAUR</target>
-  </gard>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_POWER_CLEANUP_CENTAUR_UNEXPECTED_BAD_RC</rc>
-  <description>Procedure got an unexpected fail in a cfam or scom access during centaur cleanup</description>
-  <callout>
-    <target>CENTAUR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>CENTAUR</target>
-  </deconfigure>
-  <gard>
-    <target>CENTAUR</target>
-  </gard>
-</hwpError>
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/memory_mss_thermal_init.xml b/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/memory_mss_thermal_init.xml
deleted file mode 100644
index 941b93c22..000000000
--- a/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/memory_mss_thermal_init.xml
+++ /dev/null
@@ -1,41 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/memory_mss_thermal_init.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_thermal_init.xml,v 1.2 2013/12/02 22:46:55 pardeik Exp $ -->
-<!-- For file ../../ipl/fapi/mss_thermal_init.C -->
-<!-- // *! OWNER NAME  : Michael Pardeik   Email: pardeik@us.ibm.com -->
-<!-- // *! BACKUP NAME : Jacob Sloat   Email: jdsloat@us.ibm.com -->
-
-<hwpError>
-    <rc>RC_MSS_CDIMM_INVALID_NUMBER_SENSORS</rc>
-    <description>Invalid number of dimm temperature sensors specified in the CDIMM VPD MW keyword.  Number of sensors greater than 8.</description>
-    <ffdc>FFDC_DATA_1</ffdc>
-    <ffdc>FFDC_DATA_2</ffdc>	
-   <callout><target>MEM_CHIP</target><priority>HIGH</priority></callout>
- <!-- Deconfigure MEM_CHIP -->
-  <deconfigure><target>MEM_CHIP</target></deconfigure>
-  <!-- Create GARD record for MEM_CHIP -->
-  <gard><target>MEM_CHIP</target></gard>	
-</hwpError>
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config_errors.xml b/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config_errors.xml
deleted file mode 100644
index 35ebd31b8..000000000
--- a/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config_errors.xml
+++ /dev/null
@@ -1,36 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_pcie_config_errors.xml,v 1.3 2014/01/27 05:23:01 jmcgill Exp $ -->
-<!-- Error definitions for proc_pcie_config -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_PCIE_CONFIG_INVALID_TARGET</rc>
-    <description>Invalid target type provided to HWP.</description>
-    <ffdc>TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/memory_mss_setup_bars.xml b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/memory_mss_setup_bars.xml
deleted file mode 100644
index 7cd32cb28..000000000
--- a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/memory_mss_setup_bars.xml
+++ /dev/null
@@ -1,69 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/memory_mss_setup_bars.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_setup_bars.xml,v 1.2 2014/03/10 17:12:06 gpaulraj Exp $ -->
-<!-- For file ../../ipl/fapi/mss_setup_bars.C -->
-<!-- // *! OWNER NAME  : Girisankar Paulraj      Email: gpaulraj@in.ibm.com -->
-<!-- // *! OWNER NAME  : Mark Bellows            Email: bellows@us.ibm.com -->
-
-<!-- Original Source for RC_MSS_SETUP_BARS_NM_ALT_BAR_ERR memory_errors.xml -->
-  <hwpError>
-    <rc>RC_MSS_SETUP_BARS_NM_ALT_BAR_ERR</rc>
-    <description>Invalid non-mirrored alternate BAR configuration.</description>
-    <ffdc>ALT_BASE_INDEX</ffdc>	
-    <ffdc>BASE_INDEX</ffdc>	
-    <ffdc>SIZE_INDEX</ffdc>	
-    <callout>	
-	<procedure>CODE</procedure>
-	<priority>HIGH</priority>
-    </callout>
-  </hwpError>
-
-<!-- Original Source for RC_MSS_SETUP_BARS_M_ALT_BAR_ERR memory_errors.xml -->
-  <hwpError>
-    <rc>RC_MSS_SETUP_BARS_M_ALT_BAR_ERR</rc>
-    <description>Invalid mirrored alternate BAR configuration.</description>
-   <ffdc>ALT_BASE_INDEX</ffdc> 
-    <ffdc>BASE_INDEX</ffdc>     
-    <ffdc>SIZE_INDEX</ffdc>     
-    <callout>   
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-
-<!-- Original Source for RC_MSS_SETUP_BARS_MULTIPLE_GROUP_ERR memory_errors.xml -->
-  <hwpError>
-    <rc>RC_MSS_SETUP_BARS_MULTIPLE_GROUP_ERR</rc>
-    <description>MCS is listed as a member in multiple groups.</description>
-    <ffdc>MCS_POS</ffdc>
-    <ffdc>GROUP_INDEX_A</ffdc>
-    <ffdc>GROUP_INDEX_B</ffdc>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_errors.xml b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_errors.xml
deleted file mode 100644
index 74cf62edf..000000000
--- a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_errors.xml
+++ /dev/null
@@ -1,186 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_setup_bars_errors.xml,v 1.7 2014/02/24 17:53:13 jmcgill Exp $ -->
-<!-- Error definitions for proc_setup_bars -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SETUP_BARS_ATTR_QUERY_ERR</rc>
-    <description>Unsupported attribute query</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>FAPI_ATTR_ID</ffdc>
-    <ffdc>ATTR_ID</ffdc>
-    <ffdc>ATTR_IDX1</ffdc>
-    <ffdc>ATTR_IDX2</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SETUP_BARS_ATTR_LOOKUP_ERR</rc>
-    <description>No rule provided to set BAR/range address, enable, or size.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>ATTR_ID</ffdc>
-    <ffdc>ATTR_IDX1</ffdc>
-    <ffdc>ATTR_IDX2</ffdc>
-    <ffdc>ERR_TYPE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SETUP_BARS_ATTR_CONTENT_ERR</rc>
-    <description>BAR attribute content violates expected behavior.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>ATTR_ID</ffdc>
-    <ffdc>ATTR_IDX1</ffdc>
-    <ffdc>ATTR_IDX2</ffdc>
-    <ffdc>BASE_ADDR</ffdc>
-    <ffdc>ENABLED</ffdc>
-    <ffdc>SIZE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SETUP_BARS_CHIP_MEMORY_RANGE_ATTR_OVERLAP_ERR</rc>
-    <description>Chip memory range attributes specify overlapping address ranges.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>RANGE_ID</ffdc>
-    <ffdc>ATTR_IDX1</ffdc>
-    <ffdc>BASE_ADDR1</ffdc>
-    <ffdc>END_ADDR1</ffdc>
-    <ffdc>ENABLED1</ffdc>
-    <ffdc>ATTR_IDX2</ffdc>
-    <ffdc>BASE_ADDR2</ffdc>
-    <ffdc>END_ADDR2</ffdc>
-    <ffdc>ENABLED2</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SETUP_BARS_CHIP_MEMORY_RANGE_ERR</rc>
-    <description>Invalid definition for merged chip memory address range.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>RANGE_ID</ffdc>
-    <ffdc>BASE_ADDR</ffdc>
-    <ffdc>END_ADDR</ffdc>
-    <ffdc>ENABLED</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SETUP_BARS_NODE_ADD_INTERNAL_ERR</rc>
-    <description>Internal Error.  Error encountered adding node to SMP map structure.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>NODE_ID</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SETUP_BARS_NODE_FIND_INTERNAL_ERR</rc>
-    <description>Internal Error.  Error encountered attempting to find node in SMP structure.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>NODE_ID</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SETUP_BARS_DUPLICATE_FABRIC_ID_ERR</rc>
-    <description>Multiple chips found with identical fabric node/chip ID attribute values.</description>
-    <ffdc>TARGET1</ffdc>
-    <ffdc>TARGET2</ffdc>
-    <ffdc>NODE_ID</ffdc>
-    <ffdc>CHIP_ID</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SETUP_BARS_SYSTEM_RANGE_OVERLAP_ERR</rc>
-    <description>Overlapping memory/MMIO address ranges detected.</description>
-    <ffdc>TARGET1</ffdc>
-    <ffdc>RANGE_ID1</ffdc>
-    <ffdc>BASE_ADDR1</ffdc>
-    <ffdc>END_ADDR1</ffdc>
-    <ffdc>ENABLED1</ffdc>
-    <ffdc>TARGET2</ffdc>
-    <ffdc>RANGE_ID2</ffdc>
-    <ffdc>BASE_ADDR2</ffdc>
-    <ffdc>END_ADDR2</ffdc>
-    <ffdc>ENABLED2</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SETUP_BARS_INVALID_BAR_REG_DEF</rc>
-    <description>Internal error. Invalid proc_setup_bars_bar_reg_def structure content.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>SCOM_ADDR</ffdc>
-    <ffdc>BASE_ADDR</ffdc>
-    <ffdc>ENABLED</ffdc>
-    <ffdc>SIZE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SETUP_BARS_SIZE_XLATE_ERR</rc>
-    <description>Internal error. Unsupported size translation for proc_setup_bars_bar_reg_def structure.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>SCOM_ADDR</ffdc>
-    <ffdc>BASE_ADDR</ffdc>
-    <ffdc>ENABLED</ffdc>
-    <ffdc>SIZE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_l3_attributes.xml b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_l3_attributes.xml
deleted file mode 100644
index 034c7daff..000000000
--- a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_l3_attributes.xml
+++ /dev/null
@@ -1,72 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_l3_attributes.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_setup_bars_l3_attributes.xml,v 1.2 2013/09/19 18:52:39 cswenson Exp $ -->
-<!-- proc_setup_bars_l3_attributes.xml -->
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_L3_BAR1_REG</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>L3 BAR1 register value
-      creator: proc_setup_bars
-      consumer: winkle image setup procedures
-      notes:
-        64-bit register value
-        SCOM address: 0x1001080B
-    </description>
-    <valueType>uint64</valueType>
-    <writeable/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_L3_BAR2_REG</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>L3 BAR2 register value
-      creator: proc_setup_bars
-      consumer: winkle image setup procedures
-      notes:
-        64-bit register value
-        SCOM address: 0x10010813
-    </description>
-    <valueType>uint64</valueType>
-    <writeable/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_L3_BAR_GROUP_MASK_REG</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>L3 BAR Group Mask register value
-      creator: proc_setup_bars
-      consumer: winkle image setup procedures
-      notes:
-        64-bit register value
-        SCOM address: 0x10010816
-    </description>
-    <valueType>uint64</valueType>
-    <writeable/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml
deleted file mode 100644
index 84d133591..000000000
--- a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml
+++ /dev/null
@@ -1,416 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_setup_bars_mmio_attributes.xml,v 1.6 2015/02/02 18:57:33 jmcgill Exp $ -->
-<!-- proc_setup_bars_mmio_attributes.xml -->
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PSI_BRIDGE_BAR_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>PSI Bridge BAR enable
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes: none
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0x0, ENABLE = 0x1</enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PSI_BRIDGE_BAR_BASE_ADDR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>PSI Bridge BAR base address value
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes:
-        64-bit address representing BAR RA
-        NOTE: BAR register covers RA 14:43
-        NOTE: Implied size of 1MB
-    </description>
-    <valueType>uint64</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_FSP_BAR_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>FSP BAR enable
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes: none
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0x0, ENABLE = 0x1</enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_FSP_BAR_BASE_ADDR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>FSP BAR base address value
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes:
-        64-bit address representing BAR RA
-        NOTE: BAR register covers RA 14:43
-    </description>
-    <valueType>uint64</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_FSP_BAR_SIZE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>FSP BAR size value
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes: none
-    </description>
-    <valueType>uint64</valueType>
-    <enum>
-        4_GB = 0x0000000100000000,
-        2_GB = 0x0000000080000000,
-        1_GB = 0x0000000040000000,
-      512_MB = 0x0000000020000000,
-      256_MB = 0x0000000010000000,
-      128_MB = 0x0000000008000000,
-       64_MB = 0x0000000004000000,
-       32_MB = 0x0000000002000000,
-       16_MB = 0x0000000001000000,
-        8_MB = 0x0000000000800000,
-        4_MB = 0x0000000000400000,
-        2_MB = 0x0000000000200000,
-        1_MB = 0x0000000000100000
-    </enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_FSP_MMIO_MASK_SIZE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>FSP MMIO mask size value
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes:
-        AND mask applied to RA 32:35 when transmitting address to FSP
-        NOTE: RA 14:31 are always replaced with zero
-    </description>
-    <valueType>uint64</valueType>
-    <enum>
-        4_GB = 0x0000000100000000,
-        2_GB = 0x0000000080000000,
-        1_GB = 0x0000000040000000,
-      512_MB = 0x0000000020000000,
-      256_MB = 0x0000000010000000
-    </enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_INTP_BAR_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>INTP BAR enable
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes: none
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0x0, ENABLE = 0x1</enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_INTP_BAR_BASE_ADDR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>INTP BAR base address value
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes:
-        64-bit address representing BAR RA
-        NOTE: BAR register covers RA 14:43
-        NOTE: Implied size of 1MB
-    </description>
-    <valueType>uint64</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_AS_MMIO_BAR_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>AS MMIO BAR enable
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes: none
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0x0, ENABLE = 0x1</enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_AS_MMIO_BAR_BASE_ADDR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>AS MMIO BAR base address value
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes:
-        64-bit address representing BAR RA
-        NOTE: BAR register covers RA 14:51
-    </description>
-    <valueType>uint64</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_AS_MMIO_BAR_SIZE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>AS MMIO BAR size value
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes: none
-    </description>
-    <valueType>uint64</valueType>
-    <enum>
-        2_MB = 0x0000000000200000,
-        1_MB = 0x0000000000100000,
-      512_KB = 0x0000000000080000,
-      256_KB = 0x0000000000040000
-    </enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_NX_MMIO_BAR_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>NX MMIO BAR enable
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes: none
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0x0, ENABLE = 0x1</enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_NX_MMIO_BAR_BASE_ADDR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>NX MMIO BAR base address value
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes:
-        64-bit address representing BAR RA
-        NOTE: BAR register covers RA 14:51
-    </description>
-    <valueType>uint64</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_NX_MMIO_BAR_SIZE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>NX MMIO BAR size value
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes: none
-    </description>
-    <valueType>uint64</valueType>
-    <enum>
-       16_GB = 0x0000000400000000,
-       16_MB = 0x0000000001000000,
-        1_MB = 0x0000000000100000,
-       64_KB = 0x0000000000010000,
-        4_KB = 0x0000000000001000
-    </enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_NPU_MMIO_BAR_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>NPU MMIO BAR enables
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes:
-        first dimension: unit number (0:3)
-        second dimension: BAR number (0:1)
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0x0, ENABLE = 0x1</enum>
-    <array>4,2</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_NPU_MMIO_BAR_BASE_ADDR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>NPU MMIO BAR base address values
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes:
-        64-bit address representing BAR RA
-        NOTE: BAR register covers RA 14:51
-        first dimension: unit number (0:3)
-        second dimension: BAR number (0:1)
-    </description>
-    <valueType>uint64</valueType>
-    <array>4,2</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_NPU_MMIO_BAR_SIZE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>NPU MMIO BAR size values
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes: none
-        first dimension: unit number (0:3)
-        second dimension: BAR number (0:1)
-    </description>
-    <valueType>uint64</valueType>
-    <enum>
-        2_MB = 0x0000000000200000,
-        1_MB = 0x0000000000100000,
-      512_KB = 0x0000000000080000,
-      256_KB = 0x0000000000040000,
-      128_KB = 0x0000000000020000,
-       64_KB = 0x0000000000010000
-    </enum>
-    <array>4,2</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_BAR_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>PCIE BAR enable
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes:
-        first dimension: PCIE unit number (0:3)
-        second dimension: BAR number (0:2)
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0x0, ENABLE = 0x1</enum>
-    <array>4 3</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_BAR_BASE_ADDR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>PCIE BAR base address value
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes:
-        64-bit address representing BAR RA
-        first dimension: PCIE unit number (0:3)
-        second dimension: BAR number (0:2)
-        NOTE: BAR0/1 registers cover RA 14:47
-        NOTE: BAR2 registers covers RA 14:51
-    </description>
-    <valueType>uint64</valueType>
-    <array>4 3</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_BAR_SIZE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>PCIE BAR size value
-      creator: platform
-      consumer: proc_setup_bars
-      firmware notes:
-        first dimension: PCIE unit number (0:3)
-        second dimension: BAR number (0:2)
-        NOTE: supported BAR0/1 sizes are from 64KB-1PB
-        NOTE: only supported BAR2 size is 4KB
-    </description>
-    <valueType>uint64</valueType>
-    <enum>
-        1_PB = 0x0004000000000000,
-      512_TB = 0x0002000000000000,
-      256_TB = 0x0001000000000000,
-      128_TB = 0x0000800000000000,
-       64_TB = 0x0000400000000000,
-       32_TB = 0x0000200000000000,
-       16_TB = 0x0000100000000000,
-        8_TB = 0x0000080000000000,
-        4_TB = 0x0000040000000000,
-        2_TB = 0x0000020000000000,
-        1_TB = 0x0000010000000000,
-      512_GB = 0x0000008000000000,
-      256_GB = 0x0000004000000000,
-      128_GB = 0x0000002000000000,
-       64_GB = 0x0000001000000000,
-       32_GB = 0x0000000800000000,
-       16_GB = 0x0000000400000000,
-        8_GB = 0x0000000200000000,
-        4_GB = 0x0000000100000000,
-        2_GB = 0x0000000080000000,
-        1_GB = 0x0000000040000000,
-      512_MB = 0x0000000020000000,
-      256_MB = 0x0000000010000000,
-      128_MB = 0x0000000008000000,
-       64_MB = 0x0000000004000000,
-       32_MB = 0x0000000002000000,
-       16_MB = 0x0000000001000000,
-        8_MB = 0x0000000000800000,
-        4_MB = 0x0000000000400000,
-        2_MB = 0x0000000000200000,
-        1_MB = 0x0000000000100000,
-      512_KB = 0x0000000000080000,
-      256_KB = 0x0000000000040000,
-      128_KB = 0x0000000000020000,
-       64_KB = 0x0000000000010000,
-        4_KB = 0x0000000000001000
-    </enum>
-    <array>4 3</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync_errors.xml b/src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync_errors.xml
deleted file mode 100644
index 3e6e8b4e0..000000000
--- a/src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync_errors.xml
+++ /dev/null
@@ -1,32 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_throttle_sync_errors.xml,v 1.2 2013/11/25 21:13:20 bellows Exp $ -->
-<!-- Error definitions for proc_enable_reconfig procedure -->
-
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_MCSYNC_THERMAL_RETRY_EXCEEDED</rc>
-    <description>The DMI lost the sync operation too many times</description>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf_errors.xml b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf_errors.xml
deleted file mode 100644
index 6c8b75a07..000000000
--- a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf_errors.xml
+++ /dev/null
@@ -1,52 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: cen_mem_pll_initf_errors.xml,v 1.1 2013/11/15 16:30:43 mfred Exp $ -->
-<!-- Error definitions for cen_mem_pll_initf -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_CEN_MEM_PLL_INITF_UNSUPPORTED_MSS_FREQ</rc>
-    <description>
-        cen_mem_pll_initf found unsupported memory channel frequency in
-        ATTR_MSS_FREQ attribute.
-    </description>
-    <ffdc>MSS_FREQ</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_CEN_MEM_PLL_INITF_UNSUPPORTED_NEST_FREQ</rc>
-    <description>
-        cen_mem_pll_initf found unsupported nest frequency in
-        ATTR_FREQ_PB attribute.
-    </description>
-    <ffdc>NEST_FREQ</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_setup_errors.xml b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_setup_errors.xml
deleted file mode 100644
index 55eaea1d7..000000000
--- a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_setup_errors.xml
+++ /dev/null
@@ -1,52 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_setup_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: cen_mem_pll_setup_errors.xml,v 1.2 2013/11/21 15:47:19 mjjones Exp $ -->
-<!-- Error definitions for cen_mem_pll_setup -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_CEN_MEM_PLL_SETUP_PLL_LOCK_TIMEOUT</rc>
-    <description>
-        cen_mem_pll_setup timed out waiting for PLL lock.
-        Membuf chip is most likely bad, but could be reference clock.
-    </description>
-    <ffdc>CFAM_FSI_STATUS</ffdc>
-    <callout>
-     <target>MEMBUF_CHIP_IN_ERROR</target>
-     <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <hw>
-        <hwid>MEM_REF_CLOCK</hwid>
-        <refTarget>MEMBUF_CHIP_IN_ERROR</refTarget>
-      </hw>
-      <priority>MEDIUM</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP_IN_ERROR</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP_IN_ERROR</target>
-    </gard>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/memb_pll_ring_attributes.xml b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/memb_pll_ring_attributes.xml
deleted file mode 100644
index ce85d83b4..000000000
--- a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/memb_pll_ring_attributes.xml
+++ /dev/null
@@ -1,314 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mem_pll_setup/memb_pll_ring_attributes.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2013,2014                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<attributes>
-  <!-- ********************************************************************* -->
-  <!-- $Id: memb_pll_ring_attributes.xml,v 1.13 2014/09/23 21:55:16 jmcgill Exp $ -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_DATA</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Ring image for Centaur tp_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>80</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_LENGTH</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Length of data in ring image for Centaur tp_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_FLUSH</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Ring flush image for Centaur tp_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>80</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_SCAN_SELECT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Scan select for ring image for Centaur tp_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1066_DATA</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Ring image for Centaur tp_bndy_pll ring for nest=4000 mem=1066
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>80</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1066_LENGTH</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Length of data in ring image for Centaur tp_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1333_DATA</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Ring image for Centaur tp_bndy_pll ring for nest=4000 mem=1333
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>80</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1333_LENGTH</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Length of data in ring image for Centaur tp_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1600_DATA</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Ring image for Centaur tp_bndy_pll ring for nest=4000 mem=1600
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>80</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1600_LENGTH</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Length of data in ring image for Centaur tp_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1866_DATA</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Ring image for Centaur tp_bndy_pll ring for nest=4000 mem=1866
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>80</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1866_LENGTH</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Length of data in ring image for Centaur tp_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1066_DATA</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Ring image for Centaur tp_bndy_pll ring for nest=4800 mem=1066
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>80</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1066_LENGTH</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Length of data in ring image for Centaur tp_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1333_DATA</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Ring image for Centaur tp_bndy_pll ring for nest=4800 mem=1333
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>80</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1333_LENGTH</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Length of data in ring image for Centaur tp_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1600_DATA</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Ring image for Centaur tp_bndy_pll ring for nest=4800 mem=1600
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>80</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1600_LENGTH</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Length of data in ring image for Centaur tp_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1866_DATA</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Ring image for Centaur tp_bndy_pll ring for nest=4800 mem=1866
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <array>80</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1866_LENGTH</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Length of data in ring image for Centaur tp_bndy_pll ring
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_DMI_CUPLL_PFD360_OFFSET</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Scan chain position of CU PLL PDF360 bit in tp_pll_bndy chain (Offset from beginning of chain)
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_DMI_CUPLL_REFCLKSEL_OFFSET</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Scan chain position of CU PLL REFCLKSEL bit in tp_pll_bndy chain (Offset from beginning of chain)
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_MEM_PLL_CFG_UPDATE_OFFSET</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Scan chain position of MEM PLL PLLCTRL1(44) bit in tp_pll_bndy chain (Offset from beginning of chain)
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/dram_training/mem_startclocks/cen_mem_startclocks_errors.xml b/src/usr/hwpf/hwp/dram_training/mem_startclocks/cen_mem_startclocks_errors.xml
deleted file mode 100644
index c65333e87..000000000
--- a/src/usr/hwpf/hwp/dram_training/mem_startclocks/cen_mem_startclocks_errors.xml
+++ /dev/null
@@ -1,53 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mem_startclocks/cen_mem_startclocks_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: cen_mem_startclocks_errors.xml,v 1.2 2013/11/21 15:47:35 mjjones Exp $ -->
-<!-- Error definitions for cen_mem_startclocks -->
-<hwpErrors>
-  <hwpError>
-    <rc>RC_CEN_MEM_STARTCLOCKS_UNEXPECTED_CLOCK_STATUS</rc>
-    <description>
-        cen_mem_startclocks got unexpected clock status in the
-          MEM_CLK_STATUS register.
-        Membuf chip is most likely bad, but could be reference clock.
-    </description>
-    <ffdc>MEM_CLK_STATUS_REG</ffdc>
-    <ffdc>MEM_CLK_STATUS_REG_EXP_DATA</ffdc>
-    <callout>
-     <target>MEMBUF_CHIP_IN_ERROR</target>
-     <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <hw>
-        <hwid>MEM_REF_CLOCK</hwid>
-        <refTarget>MEMBUF_CHIP_IN_ERROR</refTarget>
-      </hw>
-      <priority>MEDIUM</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_CHIP_IN_ERROR</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_CHIP_IN_ERROR</target>
-    </gard>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/mem_startclocks/memory_cen_stopclocks.xml b/src/usr/hwpf/hwp/dram_training/mem_startclocks/memory_cen_stopclocks.xml
deleted file mode 100644
index bfaa5cba1..000000000
--- a/src/usr/hwpf/hwp/dram_training/mem_startclocks/memory_cen_stopclocks.xml
+++ /dev/null
@@ -1,98 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mem_startclocks/memory_cen_stopclocks.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-
-<hwpErrors>
-<!-- $Id: memory_cen_stopclocks.xml,v 1.3 2014/01/31 22:05:42 mfred Exp $ -->
-<!-- For file ../../ipl/fapi/cen_stopclocks.C -->
-<!-- // *! OWNER NAME  : Mark Fredrickson  Email: mfred@us.ibm.com -->
-<!-- // *! BACKUP NAME : Mark Bellows      Email: bellows@us.ibm.com -->
-
-<registerFfdc>
-  <id>REG_FFDC_CLOCK_STOP_BAD_STATUS_REGS</id>
-  <cfamRegister>CFAM_FSI_GP3_0x00002812</cfamRegister>
-  <cfamRegister>CFAM_FSI_GP4_0x00002813</cfamRegister>
-  <cfamRegister>CFAM_FSI_GP3_MIRROR_0x0000101B</cfamRegister>
-  <scomRegister>MEM_GP3_0x030F0012</scomRegister>
-  <scomRegister>NEST_GP3_0x020F0012</scomRegister>
-</registerFfdc>
-
-<hwpError>
-  <rc>RC_MSS_UNEXPECTED_MEM_CLOCK_STATUS</rc>
-  <description>
-    cen_stopclocks got unexpected clock status in MEM_CLK_STATUS_0x03030008
-    This error could happen for a number of reasons and probably not on the
-    IPL path, so callout the memory buffer chip, but do not deconfigure/GARD.
-  </description>
-  <ffdc>EXPECTED_STATUS</ffdc>
-  <ffdc>ACTUAL_STATUS</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_CLOCK_STOP_BAD_STATUS_REGS</id>
-    <target>MEMBUF_CHIP_IN_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>MEMBUF_CHIP_IN_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_UNEXPECTED_NEST_CLOCK_STATUS</rc>
-  <description>
-    cen_stopclocks got unexpected clock status in NEST_CLK_STATUS_0x02030008
-    This error could happen for a number of reasons and probably not on the
-    IPL path, so callout the memory buffer chip, but do not deconfigure/GARD.
-  </description>
-  <ffdc>EXPECTED_STATUS</ffdc>
-  <ffdc>ACTUAL_STATUS</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_CLOCK_STOP_BAD_STATUS_REGS</id>
-    <target>MEMBUF_CHIP_IN_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>MEMBUF_CHIP_IN_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_UNEXPECTED_TP_CLOCK_STATUS</rc>
-  <description>
-    cen_stopclocks got unexpected clock status in TP_CLK_STATUS_0x01030008
-    This error could happen for a number of reasons and probably not on the
-    IPL path, so callout the memory buffer chip, but do not deconfigure/GARD.
-  </description>
-  <ffdc>EXPECTED_STATUS</ffdc>
-  <ffdc>ACTUAL_STATUS</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_CLOCK_STOP_BAD_STATUS_REGS</id>
-    <target>MEMBUF_CHIP_IN_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>MEMBUF_CHIP_IN_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<!-- Add some header comments for BACKUP and SCREEN. -->
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/memory_errors.xml b/src/usr/hwpf/hwp/dram_training/memory_errors.xml
deleted file mode 100644
index 151ca013a..000000000
--- a/src/usr/hwpf/hwp/dram_training/memory_errors.xml
+++ /dev/null
@@ -1,532 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/memory_errors.xml $            -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2014                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_errors.xml,v 1.46 2014/07/23 20:16:05 jmcgill Exp $ -->
-<!-- EDIT THIS FILE DIRECTLY. THE ODS FILE METHOD IS NO LONGER VALID -->
-<!-- *********************************************************************** -->
-
-  <hwpError>
-    <rc>RC_MSS_PLACE_HOLDER_ERROR</rc>
-    <description>Not for production code.  This return code is used for cases where the error code has not been approved yet.  Eventually, no code should use this error code.</description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_RANK_GROUP_RC_ERROR_001A</rc>
-    <description>Plug rule violation in EFF_CONFIG_RANK_GROUP.</description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_UNEXPECTED_MEM_CLK_STATUS</rc>
-    <description>A read of the memory clock status register returned an unexpected value. </description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_UNEXPECTED_NEST_CLK_STATUS</rc>
-    <description>A read of the nest clock status register returned an unexpected value.</description>
-    <sbeError/>
-    <collectFfdc>proc_extract_pore_halt_ffdc, pore_state, PORE_HALT_SCAN_FAIL, POR_FFDC_OFFSET_NEST_CHIPLET</collectFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_INIT1_OPCG_DONE_ERROR</rc>
-    <description>Timed out waiting for OPCG done bit in SCAN0 module.</description>
-    <sbeError/>
-    <collectFfdc>proc_extract_pore_halt_ffdc, pore_state, PORE_HALT_SCAN_FLUSH_FAIL, POR_FFDC_OFFSET_USE_P1</collectFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_INIT1_FSISTATUS_FAIL</rc>
-    <description>Failed VDD status check on FSI2PIB Status Reg bit(16).</description>
-    <sbeError/>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_CEN_STANDBY_REGION</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_INIT3_FSISTATUS_FAIL</rc>
-    <description>Failed clock region check on FSI2PIB Status Reg bit(31).</description>
-    <sbeError/>
-    <collectFfdc>proc_extract_pore_halt_ffdc, pore_state, PORE_HALT_SCAN_FAIL, POR_FFDC_OFFSET_TP_CHIPLET</collectFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_NEST_PLL_LOCK_TIMEOUT</rc>
-    <description>Timed out waiting for NEST PLL lock in FSI2PIB Status Reg bit 24. </description>
-    <sbeError/>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_CEN_STANDBY_REGION</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_MEM_PLL_LOCK_TIMEOUT</rc>
-    <description>Timed out waiting for MEM PLL lock in FSI2PIB Status Reg bit 25. </description>
-    <sbeError/>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_CEN_STANDBY_REGION</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-
-  <registerFfdc>
-  <id>REG_FFDC_CEN_STANDBY_REGION</id>
-    <cfamRegister>CFAM_FSI_STATUS_0x00001007</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP3_0x00001012</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP4_0x00001013</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP4_0x00001013</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP5_0x00001014</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP6_0x00001015</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP7_0x00001016</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP3_MIRROR_0x0000101B</cfamRegister>
-  </registerFfdc>
-
-  <hwpError>
-    <rc>RC_MSS_THOLD_ERROR</rc>
-    <description>THOLDS after Clock Start cmd do NOT match to the expected value.</description>
-    <sbeError/>
-    <collectFfdc>proc_extract_pore_halt_ffdc, pore_state, PORE_HALT_SCAN_FAIL, POR_FFDC_OFFSET_TP_CHIPLET</collectFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_CCREG_MISMATCH</rc>
-    <description>Clock Control Register does not match the expected value.</description>
-    <sbeError/>
-    <collectFfdc>proc_extract_pore_halt_ffdc, pore_state, PORE_HALT_SCAN_FAIL, POR_FFDC_OFFSET_TP_CHIPLET</collectFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_ARRAY_REPAIR_BUSY</rc>
-    <description>Array repair loader is busy now. 0x00050003 bit(0)=1 </description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_ARRAY_REPAIR_NOT_DONE</rc>
-    <description>Array repair loader did NOT report repair done. </description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_ECC_TRAP_ERROR</rc>
-    <description>ECC trap register reported error. 0x00050004 bit(0-7) != 0x00</description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_GENERAL_PUTSCOM_ERROR</rc>
-    <description>PutScom failed!   See previous error message for details.</description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_GENERAL_GETSCOM_ERROR</rc>
-    <description>GetScom failed!   See previous error message for details.</description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_UNEXPECTED_FIR_STATUS</rc>
-    <description>Unexpected FIR status!  See previous error message for details.</description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_INIT_CAL_FAILED</rc>
-    <description>Inital Calibration failed.  Check init cal error register at address: 0x8001C0180301143F </description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_GENERAL_SIMSTKFAC_ERROR</rc>
-    <description>simSTKFAC failed!   See previous error message for details</description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_GET_FAPI_ATTRIBUTE_ERROR</rc>
-    <description>Failed to get FAPI attribute!   See previous error message for details.</description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_GET_SIM_HIERARCHY_ERROR</rc>
-    <description>Failed to get simulation hierarchy from eCmd target.</description>
-</hwpError>
-
-<registerFfdc>
-  <id>REG_FFDC_INVALID_ADDR</id>
-  <scomRegister>MBA01_MBMACAQ_0x0301060D</scomRegister>
-  <scomRegister>MBA01_MBMEAQ_0x0301060E</scomRegister>
-  <scomRegister>MBA01_MBA_MCBERRPTQ_0x030106e7</scomRegister>
-</registerFfdc>
-
-<registerFfdc>
-  <id>REG_FFDC_CMD_TIMEOUT_MBA_REGS</id>
-  <!-- MBA Maintenance Command Type Register -->    
-  <scomRegister>MBA01_MBMCTQ_0x0301060A</scomRegister>
-  <!-- MBA Maintenance Command Control Register -->
-  <scomRegister>MBA01_MBMCCQ_0x0301060B</scomRegister>
-  <!-- MBA Maintenance Command Status Register -->
-  <scomRegister>MBA01_MBMSRQ_0x0301060C</scomRegister>
-  <!-- MBA Maintenance Command Address Register -->
-  <scomRegister>MBA01_MBMACAQ_0x0301060D</scomRegister>
-  <!-- MBA Maintenance Command End Address Register -->
-  <scomRegister>MBA01_MBMEAQ_0x0301060E</scomRegister>
-  <!-- MBA Memory Scrub/Read Control Register -->
-  <scomRegister>MBA01_MBASCTLQ_0x0301060F</scomRegister>
-  <!-- MBA Error Control Register -->
-  <scomRegister>MBA01_MBECTLQ_0x03010610</scomRegister>
-
-  <!-- MBA Special Attention Registers -->    
-  <scomRegister>MBA01_MBSPAQ_0x03010611</scomRegister>
-  <scomRegister>MBA01_MBSPAMSKQ_0x03010614</scomRegister>
-
-  <!-- MBA Fault Isolation Registers -->  
-  <scomRegister>MBA01_MBAFIRQ_0x03010600</scomRegister>  
-  <scomRegister>MBA01_MBAFIRMASK_0x03010603</scomRegister>  
-  <scomRegister>MBA01_MBAFIRACT0_0x03010606</scomRegister>  
-  <scomRegister>MBA01_MBAFIRACT1_0x03010607</scomRegister>  
-  <!-- MBA Error Report Register -->  
-  <scomRegister>MBA01_MBA_MCBERRPTQ_0x030106e7</scomRegister>  
-
-  <!-- MBA CAL FIR Registers -->  
-  <scomRegister>MBA01_MBACALFIR_0x03010400</scomRegister>  
-  <scomRegister>MBA01_MBACALFIR_MASK_0x03010403</scomRegister>  
-  <scomRegister>MBA01_MBACALFIR_ACTION0_0x03010406</scomRegister>  
-  <scomRegister>MBA01_MBACALFIR_ACTION1_0x03010407</scomRegister>  
-  <!-- MBA Error report register -->  
-  <scomRegister>MBA01_MBA_ERR_REPORTQ_0x0301041A</scomRegister>  
-</registerFfdc>
-
-<registerFfdc>
-  <id>REG_FFDC_CMD_TIMEOUT_MBS_REGS</id>
-  <!-- MBS ECC0 Decoder FIR Registers -->
-  <scomRegister>MBS_ECC0_MBECCFIR_0x02011440</scomRegister>
-  <scomRegister>MBS_ECC0_MBECCFIR_MASK_0x02011443</scomRegister>
-  <scomRegister>MBS_ECC0_MBECCFIR_ACTION0_0x02011446</scomRegister>
-  <scomRegister>MBS_ECC0_MBECCFIR_ACTION1_0x02011447</scomRegister>
-
-  <!-- MBS ECC1 Decoder FIR Registers -->
-  <scomRegister>MBS_ECC1_MBECCFIR_0x02011480</scomRegister>
-  <scomRegister>MBS_ECC1_MBECCFIR_MASK_0x02011483</scomRegister>
-  <scomRegister>MBS_ECC1_MBECCFIR_ACTION0_0x02011486</scomRegister>
-  <scomRegister>MBS_ECC1_MBECCFIR_ACTION1_0x02011487</scomRegister> 
-</registerFfdc>
-
-  <hwpError>
-    <rc>RC_MSS_INVALID_FN_INPUT_ERROR</rc>
-    <description>An input to FN call is out of range.</description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_MCBIST_ERROR</rc>
-    <description>MCBIST operation failed</description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_PORT_INPUT_ERROR</rc>
-    <description>TBD</description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_DRIVER_IMP_INPUT_ERROR</rc>
-    <description>TBD</description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_SLEW_INPUT_ERROR</rc>
-    <description>TBD</description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_WR_DRAM_VREF_INPUT_ERROR</rc>
-    <description>TBD</description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_READ_CEN_VREF_INPUT_ERROR</rc>
-    <description>TBD</description>
-</hwpError>
-
-  <hwpError>
-    <rc>RC_MSS_RECEIVER_IMP_INPUT_ERROR</rc>
-    <description>TBD</description>
-</hwpError>
-
-<hwpError>
-    <rc>RC_MSS_INPUT_ERROR</rc>
-    <description>Invalid input </description>
-</hwpError>
-
-<hwpError>
-    <rc>RC_MSS_UNABLE_TO_GROUP_MCS</rc>
-    <description>MCS COULD NOT BE GROUPED.  EITHER SWITCH DIMMS SO GROUPING IS POSSIBLE OR CHANGE SYSTEM POLICY.</description>
-    <callout>
-        <procedure>MEMORY_PLUGGING_ERROR</procedure>
-        <priority>MEDIUM</priority>
-    </callout>
-    <deconfigure><target>TARGET_MCS</target></deconfigure>
-</hwpError>
-
-<hwpError>
-    <rc>RC_ERROR_MSS_GROUPING_ATTRS</rc>
-    <description>MEM grouping Attributes collection and printing function</description>
-    <ffdc>_ATTR_PROC_POS</ffdc>
-    <ffdc>_ATTR_CEN_POS</ffdc>
-    <ffdc>_ATTR_CHIP_UNIT_POS_MBA0</ffdc>
-    <ffdc>_ATTR_CHIP_UNIT_POS_MBA1</ffdc>
-    <ffdc>_ATTR_EFF_DIMM_SIZE0</ffdc>
-    <ffdc>_ATTR_EFF_DIMM_SIZE1</ffdc>
-    <ffdc>_ATTR_MSS_INTERLEAVE_ENABLE</ffdc>
-    <ffdc>_ATTR_ALL_MCS_IN_INTERLEAVING_GROUP</ffdc>
-    <ffdc>_ATTR_PROC_MEM_BASE</ffdc>
-    <ffdc>_ATTR_PROC_MIRROR_BASE</ffdc>
-    <ffdc>_ATTR_MSS_MEM_MC_IN_GROUP</ffdc>
-    <ffdc>_ATTR_PROC_MEM_BASES</ffdc>
-    <ffdc>_ATTR_PROC_MEM_SIZES</ffdc>
-    <ffdc>_ATTR_MSS_MCS_GROUP_32</ffdc>
-    <ffdc>_ATTR_PROC_MIRROR_BASES</ffdc>
-    <ffdc>_ATTR_PROC_MIRROR_SIZES</ffdc>
-</hwpError>
-
-<hwpError>
-    <rc>RC_ERROR_MSS_FIRS</rc>
-    <description>MEM FIR REGISTERS</description>
- 
-<!-- DMI_FIR -->
-    <collectRegisterFfdc>
-	<id>REG_FFDC_DMI_FIR_REGS</id>
-	<target>CENCHIP</target>
-    </collectRegisterFfdc>
-<!-- MBIFIRQ -->
-    <collectRegisterFfdc>
-       <id>REG_FFDC_MBI_FIR_REGS</id>
-       <target>CENCHIP</target>
-    </collectRegisterFfdc>
- 
-<!-- MBSFIRQ -->
-    <collectRegisterFfdc>
-       <id>REG_FFDC_MBS_FIR_REGS</id>
-       <target>CENCHIP</target>
-    </collectRegisterFfdc>
- 
-<!-- SCAC_LFIR -->
-    <collectRegisterFfdc>
-       <id>REG_FFDC_SCAC_FIR_REGS</id>
-       <target>CENCHIP</target>
-    </collectRegisterFfdc>
- 
-</hwpError>
-
-<hwpError>
-    <rc>RC_ERROR_MBA_FIRS</rc>
-    <description>MEM MBA FIR REGISTERS</description>
- 
-<!-- MBA01_MBACALFIR -->
-<!-- MBA01_MBAFIRQ -->
-<!-- MBA01_MBSPAQ -->
-    <collectRegisterFfdc>
-       <id>REG_FFDC_MBA_FIR_REGS</id>
-       <target>CENCHIP_MBA</target>
-    </collectRegisterFfdc>
-
-<!-- PHY01_DDRPHY_FIR_REG -->
-    <collectRegisterFfdc>
-       <id>REG_FFDC_DDR_PHY_FIR_REGS</id>
-       <target>CENCHIP_MBA</target>
-    </collectRegisterFfdc>
-
- 
-</hwpError>
-
-<registerFfdc>
-  <id>REG_FFDC_MBA_FIR_REGS</id>
-
-  <!-- MBA Special Attention Registers -->    
-  <scomRegister>MBA01_MBSPAQ_0x03010611</scomRegister>
-  <scomRegister>MBA01_MBSPAMSKQ_0x03010614</scomRegister>
-
-  <!-- MBA Fault Isolation Registers -->  
-  <scomRegister>MBA01_MBAFIRQ_0x03010600</scomRegister>  
-  <scomRegister>MBA01_MBAFIRMASK_0x03010603</scomRegister>  
-  <scomRegister>MBA01_MBAFIRACT0_0x03010606</scomRegister>  
-  <scomRegister>MBA01_MBAFIRACT1_0x03010607</scomRegister>  
-  <!-- MBA Error Report Register -->  
-  <scomRegister>MBA01_MBA_MCBERRPTQ_0x030106e7</scomRegister>  
-
-  <!-- MBA CAL FIR Registers -->  
-  <scomRegister>MBA01_MBACALFIR_0x03010400</scomRegister>  
-  <scomRegister>MBA01_MBACALFIR_MASK_0x03010403</scomRegister>  
-  <scomRegister>MBA01_MBACALFIR_ACTION0_0x03010406</scomRegister>  
-  <scomRegister>MBA01_MBACALFIR_ACTION1_0x03010407</scomRegister>  
-  <!-- MBA Error report register -->  
-  <scomRegister>MBA01_MBA_ERR_REPORTQ_0x0301041A</scomRegister>  
-</registerFfdc>
-
-<registerFfdc>
-  <id>REG_FFDC_MBI_FIR_REGS</id>
-  <scomRegister>MBI_FIR_0x02010800</scomRegister>
-  <scomRegister>MBI_FIRMASK_0x02010803</scomRegister>
-  <scomRegister>MBI_FIRACT0_0x02010806</scomRegister>
-  <scomRegister>MBI_FIRACT1_0x02010807</scomRegister>
-</registerFfdc>
-
-<registerFfdc>
-  <id>REG_FFDC_MBS_FIR_REGS</id>
-  <scomRegister>MBS_FIR_REG_0x02011400</scomRegister>
-  <scomRegister>MBS_FIR_MASK_REG_0x02011403</scomRegister>
-  <scomRegister>MBS_FIR_ACTION0_REG_0x02011406</scomRegister>
-  <scomRegister>MBS_FIR_ACTION1_REG_0x02011407</scomRegister>
-  <scomRegister>MBS_FIR_WOF_REG_0x02011408</scomRegister>
-
-  <scomRegister>MBS_ECC0_MBECCFIR_0x02011440</scomRegister>
-  <scomRegister>MBS_ECC0_MBECCFIR_MASK_0x02011443</scomRegister>
-  <scomRegister>MBS_ECC0_MBECCFIR_ACTION0_0x02011446</scomRegister>
-  <scomRegister>MBS_ECC0_MBECCFIR_ACTION1_0x02011447</scomRegister>
-  <scomRegister>MBS_ECC0_MBECCFIR_WOF_0x02011448</scomRegister>
-
-  <scomRegister>MBS_ECC1_MBECCFIR_0x02011480</scomRegister>
-  <scomRegister>MBS_ECC1_MBECCFIR_MASK_0x02011483</scomRegister>
-  <scomRegister>MBS_ECC1_MBECCFIR_ACTION0_0x02011486</scomRegister>
-  <scomRegister>MBS_ECC1_MBECCFIR_ACTION1_0x02011487</scomRegister>
-  <scomRegister>MBS_ECC1_MBECCFIR_WOF_0x02011488</scomRegister>
-
-  <scomRegister>MBS01_MBSFIRQ_0x02011600</scomRegister>
-  <scomRegister>MBS01_MBSFIRMASK_0x02011603</scomRegister>
-  <scomRegister>MBS01_MBSFIRACT0_0x02011606</scomRegister>
-  <scomRegister>MBS01_MBSFIRACT1_0x02011607</scomRegister>
-  <scomRegister>MBS01_MBSFIRWOF_0x02011608</scomRegister>
-
-  <scomRegister>MBS23_MBSFIRQ_0x02011700</scomRegister>
-  <scomRegister>MBS23_MBSFIRMASK_0x02011703</scomRegister>
-  <scomRegister>MBS23_MBSFIRACT0_0x02011706</scomRegister>
-  <scomRegister>MBS23_MBSFIRACT1_0x02011707</scomRegister>
-  <scomRegister>MBS23_MBSFIRWOF_0x02011708</scomRegister>
-</registerFfdc>
-
-<registerFfdc>
-  <id>REG_FFDC_SCAC_FIR_REGS</id>
-  <scomRegister>SCAC_LFIR_0x020115C0</scomRegister>
-  <scomRegister>SCAC_FIRMASK_0x020115C3</scomRegister>
-  <scomRegister>SCAC_FIRACTION0_0x020115C6</scomRegister>
-  <scomRegister>SCAC_FIRACTION1_0x020115C7</scomRegister>
-  <scomRegister>SCAC_FIRWOF_0x020115C8</scomRegister>
-</registerFfdc>
-
-<registerFfdc>
-  <id>REG_FFDC_DDR_PHY_FIR_REGS</id>
-  <scomRegister>PHY01_DDRPHY_FIR_REG_0x800200900301143f</scomRegister>
-  <scomRegister>PHY01_DDRPHY_FIR_MASK_REG_0x800200930301143f</scomRegister>
-  <scomRegister>PHY01_DDRPHY_FIR_ACTION0_REG_0x800200960301143f</scomRegister>
-  <scomRegister>PHY01_DDRPHY_FIR_ACTION1_REG_0x800200970301143f</scomRegister>
-  <scomRegister>PHY01_DDRPHY_FIR_WOF_REG_0x800200980301143f</scomRegister>
-</registerFfdc>
-
-<registerFfdc>
-  <id>REG_FFDC_DMI_FIR_REGS</id>
-  <scomRegister>CEN_DMIFIR_0x02010400</scomRegister>
-  <scomRegister>CEN_DMIFIR_MASK_0x02010403</scomRegister>
-  <scomRegister>CEN_DMIFIR_ACT0_0x02010406</scomRegister>
-  <scomRegister>CEN_DMIFIR_ACT1_0x02010407</scomRegister>
-  <scomRegister>CEN_DMIFIR_WOF_0x02010408</scomRegister>
-</registerFfdc>
-
-
-<!-- EDIT THIS FILE DIRECTLY. THE ODS FILE METHOD IS NO LONGER VALID -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/memory_mss_funcs.xml b/src/usr/hwpf/hwp/dram_training/memory_mss_funcs.xml
deleted file mode 100644
index 479c5ec87..000000000
--- a/src/usr/hwpf/hwp/dram_training/memory_mss_funcs.xml
+++ /dev/null
@@ -1,166 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/memory_mss_funcs.xml $         -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_funcs.xml,v 1.3 2014/03/31 15:54:05 jdsloat Exp $ -->
-<!-- For file ../../ipl/fapi/mss_funcs.C -->
-<!-- // *! OWNER NAME : jdsloat@us.ibm.com -->
-<!-- // *! BACKUP NAME : -->
-
-
-
-<registerFfdc>
-  <id>REG_FFDC_MSS_CCS_FAILURE</id>
-  <scomRegister>MEM_MBA01_CCS_MODEQ_0x030106A7</scomRegister>
-  <scomRegister>MEM_MBA01_STATQ_0x030106A6</scomRegister>
-  <scomRegister>MEM_MBA01_CCS_CNTLQ_0x030106A5</scomRegister>
-</registerFfdc>
-
-<registerFfdc>
-  <id>REG_FFDC_MSS_RCD_PARITY_FAILURE</id>
-  <scomRegister>MEM_MBA01_CALFIR_0x03010402</scomRegister>
-</registerFfdc>
-
-<!-- Original Source for RC_MSS_CCS_READ_MISCOMPARE memory_errors.xml -->
-  <hwpError>
-    <rc>RC_MSS_CCS_READ_MISCOMPARE</rc>
-    <description>The ccs errors at runtime and registers a read miscompare.</description>
-  <ffdc>REG_CONTENTS</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_CCS_FAILURE</id>
-    <target>TARGET_MBA_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>TARGET_MBA_ERROR</target>
-  </deconfigure>
-</hwpError>
-
-<!-- Original Source for RC_MSS_CCS_UE_SUE memory_errors.xml -->
-  <hwpError>
-    <rc>RC_MSS_CCS_UE_SUE</rc>
-    <description>The ccs errors at runtime and registers a UE or SUE</description>
-  <ffdc>REG_CONTENTS</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_CCS_FAILURE</id>
-    <target>TARGET_MBA_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>TARGET_MBA_ERROR</target>
-  </deconfigure>
-</hwpError>
-
-<!-- Original Source for RC_MSS_CCS_CAL_TIMEOUT memory_errors.xml -->
-  <hwpError>
-    <rc>RC_MSS_CCS_CAL_TIMEOUT</rc>
-    <description>The ccs errors at runtime and registers a calibration operation timeout</description>
-  <ffdc>REG_CONTENTS</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_CCS_FAILURE</id>
-    <target>TARGET_MBA_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>TARGET_MBA_ERROR</target>
-  </deconfigure>
-</hwpError>
-
-<!-- Original Source for RC_MSS_CCS_HUNG memory_errors.xml -->
-  <hwpError>
-    <rc>RC_MSS_CCS_HUNG</rc>
-    <description>The ccs failed to return from in_progress status and failed to describe an error further.</description>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_CCS_FAILURE</id>
-    <target>TARGET_MBA_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>TARGET_MBA_ERROR</target>
-  </deconfigure>
-</hwpError>
-
-<!-- Original Source for RC_MSS_RCD_PARITY_ERROR_LIMIT memory_errors.xml -->
-  <hwpError>
-    <rc>RC_MSS_RCD_PARITY_ERROR_LIMIT</rc>
-    <description>The number of rcd parity errors have exceeded the maximum allowable number</description>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_RCD_PARITY_FAILURE</id>
-    <target>TARGET_MBA_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>TARGET_MBA_ERROR</target>
-  </deconfigure>
-</hwpError>
-
-<!-- Original Source for RC_MSS_RCD_PARITY_ERROR_PORT0 memory_errors.xml -->
-  <hwpError>
-    <rc>RC_MSS_RCD_PARITY_ERROR_PORT0</rc>
-    <description>An rcd parity error has been registered on port_0</description>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_RCD_PARITY_FAILURE</id>
-    <target>TARGET_MBA_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>TARGET_MBA_ERROR</target>
-  </deconfigure>
-</hwpError>
-
-<!-- Original Source for RC_MSS_RCD_PARITY_ERROR_PORT1 memory_errors.xml -->
-  <hwpError>
-    <rc>RC_MSS_RCD_PARITY_ERROR_PORT1</rc>
-    <description>An rcd parity error has been registered on port_1</description>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_RCD_PARITY_FAILURE</id>
-    <target>TARGET_MBA_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>TARGET_MBA_ERROR</target>
-  </deconfigure>
-</hwpError>
-
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/memory_mss_termination_control.xml b/src/usr/hwpf/hwp/dram_training/memory_mss_termination_control.xml
deleted file mode 100644
index a0f5eb72a..000000000
--- a/src/usr/hwpf/hwp/dram_training/memory_mss_termination_control.xml
+++ /dev/null
@@ -1,252 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/memory_mss_termination_control.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-
-<hwpErrors>
-<!-- $Id: memory_mss_termination_control.xml,v 1.4 2014/01/31 13:42:23 sasethur Exp $ -->
-<!-- For file ../../ipl/fapi/mss_termination_control.C -->
-<!-- // *! OWNER NAME : Saravanan Sethuraman          email ID:saravanans@in.ibm.com -->
-<!-- // *! BACKUP NAME: Menlo Wuu	 	         email ID:menlowuu@us.ibm.com -->
-
-<hwpError>
-  <rc>RC_CONFIG_DRV_IMP_INVALID_INPUT</rc>
-  <description>
-    The config_drv_imp utility function received a bad parameter
-  </description>
-  <ffdc>PORT_PARAM</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_CONFIG_RCV_IMP_INVALID_INPUT</rc>
-  <description>
-    The config_rcv_imp utility function received a bad parameter
-  </description>
-  <ffdc>PORT_PARAM</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_CONFIG_SLEW_RATE_INVALID_INPUT</rc>
-  <description>
-    The config_slew_rate utility function received a bad parameter
-  </description>
-  <ffdc>PORT_PARAM</ffdc>
-  <ffdc>SLEW_TYPE_PARAM</ffdc>
-  <ffdc>SLEW_IMP_PARAM</ffdc>
-  <ffdc>SLEW_RATE_PARAM</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_CONFIG_WR_DRAM_VREF_INVALID_INPUT</rc>
-  <description>
-    The config_wr_dram_vref utility function received a bad parameter
-  </description>
-  <ffdc>PORT_PARAM</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_CONFIG_RD_CEN_VREF_INVALID_INPUT</rc>
-  <description>
-    The config_rd_cen_vref utility function received a bad parameter
-  </description>
-  <ffdc>PORT_PARAM</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_SLEW_CAL_INVALID_DRAM_GEN</rc>
-  <description>
-    mss_slew_cal found an invalid DRAM type in ATTR_EFF_DRAM_GEN (not DDR3/4)
-  </description>
-  <ffdc>DRAM_GEN</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_SLEW_CAL_INVALID_FREQ</rc>
-  <description>
-    mss_slew_cal found a zero frequency in ATTR_MSS_FREQ
-  </description>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<registerFfdc>
-  <id>REG_FFDC_MSS_SLEW_CAL_FAILURE_PORT0</id>
-  <scomRegister>DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR0_0x8000401A0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR1_0x8000441A0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR2_0x8000481A0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR3_0x80004C1A0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_0_0x800000750301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_1_0x800004750301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_2_0x800008750301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_3_0x80000C750301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_4_0x800010750301143F</scomRegister>
-</registerFfdc>
-
-<registerFfdc>
-  <id>REG_FFDC_MSS_SLEW_CAL_FAILURE_PORT1</id>
-  <scomRegister>DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR0_0x8001401A0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR1_0x8001441A0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR2_0x8001481A0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR3_0x80014C1A0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_0_0x800100750301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_1_0x800104750301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_2_0x800108750301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_3_0x80010C750301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_4_0x800110750301143F</scomRegister>
-</registerFfdc>
-
-<hwpError>
-  <rc>RC_MSS_SLEW_CAL_TIMEOUT_PORT0</rc>
-  <description>
-      mss_slew_cal found slew calibration timeout on MBA port 0
-  </description>
-  <ffdc>DATA_ADR</ffdc>
-  <ffdc>IMP</ffdc>
-  <ffdc>SLEW</ffdc>
-  <ffdc>STAT_REG</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_SLEW_CAL_FAILURE_PORT0</id>
-    <target>MBA_IN_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>MBA_IN_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>MBA_IN_ERROR</target>
-  </deconfigure>
-  <gard>
-    <target>MBA_IN_ERROR</target>
-  </gard>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_SLEW_CAL_TIMEOUT_PORT1</rc>
-  <description>
-      mss_slew_cal found slew calibration timeout on MBA port 1
-  </description>
-  <ffdc>DATA_ADR</ffdc>
-  <ffdc>IMP</ffdc>
-  <ffdc>SLEW</ffdc>
-  <ffdc>STAT_REG</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_SLEW_CAL_FAILURE_PORT1</id>
-    <target>MBA_IN_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>MBA_IN_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>MBA_IN_ERROR</target>
-  </deconfigure>
-  <gard>
-    <target>MBA_IN_ERROR</target>
-  </gard>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_SLEW_CAL_ERROR_PORT0</rc>
-  <description>
-      mss_slew_cal found slew calibration error on MBA port 0
-  </description>
-  <ffdc>DATA_ADR</ffdc>
-  <ffdc>IMP</ffdc>
-  <ffdc>SLEW</ffdc>
-  <ffdc>STAT_REG</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_SLEW_CAL_FAILURE_PORT0</id>
-    <target>MBA_IN_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>MBA_IN_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>MBA_IN_ERROR</target>
-  </deconfigure>
-  <gard>
-    <target>MBA_IN_ERROR</target>
-  </gard>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_SLEW_CAL_ERROR_PORT1</rc>
-  <description>
-      mss_slew_cal found slew calibration error on MBA port 1
-  </description>
-  <ffdc>DATA_ADR</ffdc>
-  <ffdc>IMP</ffdc>
-  <ffdc>SLEW</ffdc>
-  <ffdc>STAT_REG</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_SLEW_CAL_FAILURE_PORT1</id>
-    <target>MBA_IN_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>MBA_IN_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>MBA_IN_ERROR</target>
-  </deconfigure>
-  <gard>
-    <target>MBA_IN_ERROR</target>
-  </gard>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_IMP_INPUT_ERROR</rc>
-  <!-- TODO Remove when all HWPs using it are using their own Error XML file -->
-  <description>Impedance is invalid for driver/receiver type.</description>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/memory_mss_ddr_phy_reset.xml b/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/memory_mss_ddr_phy_reset.xml
deleted file mode 100644
index dcde98377..000000000
--- a/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/memory_mss_ddr_phy_reset.xml
+++ /dev/null
@@ -1,142 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/memory_mss_ddr_phy_reset.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-
-<hwpErrors>
-<!-- $Id: memory_mss_ddr_phy_reset.xml,v 1.3 2014/01/31 15:08:07 mfred Exp $ -->
-<!-- For file ../../ipl/fapi/mss_ddr_phy_reset.C -->
-<!-- // *! OWNER NAME  : Mark Fredrickson  Email: mfred@us.ibm.com -->
-<!-- // *! BACKUP NAME : Mark Bellows      Email: bellows@us.ibm.com -->
-
-<hwpError>
-  <rc>RC_MSS_DP18_0_PLL_FAILED_TO_LOCK</rc>
-  <description>
-    mss_ddr_phy_reset: DP18  0x0C000 PLL failed to lock!
-    Value in DPHY01_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P0_0x8000C0000301143F
-      not as expected
-  </description>
-  <ffdc>EXPECTED_STATUS</ffdc>
-  <ffdc>ACTUAL_STATUS</ffdc>
-  <callout>
-    <target>MBA_IN_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <callout>
-    <hw>
-      <hwid>MEM_REF_CLOCK</hwid>
-      <refTarget>MEMBUF_CHIP_IN_ERROR</refTarget>
-    </hw>
-    <priority>MEDIUM</priority>
-  </callout>
-  <deconfigure>
-    <target>MBA_IN_ERROR</target>
-  </deconfigure>
-  <gard>
-    <target>MBA_IN_ERROR</target>
-  </gard>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_DP18_1_PLL_FAILED_TO_LOCK</rc>
-  <description>
-    mss_ddr_phy_reset: DP18  0x1C000 PLL failed to lock!
-    Value in DPHY01_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P1_0x8001C0000301143F
-      not as expected
-  </description>
-  <ffdc>EXPECTED_STATUS</ffdc>
-  <ffdc>ACTUAL_STATUS</ffdc>
-  <callout>
-    <target>MBA_IN_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <callout>
-    <hw>
-      <hwid>MEM_REF_CLOCK</hwid>
-      <refTarget>MEMBUF_CHIP_IN_ERROR</refTarget>
-    </hw>
-    <priority>MEDIUM</priority>
-  </callout>
-  <deconfigure>
-    <target>MBA_IN_ERROR</target>
-  </deconfigure>
-  <gard>
-    <target>MBA_IN_ERROR</target>
-  </gard>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_AD32S_0_PLL_FAILED_TO_LOCK</rc>
-  <description>
-    mss_ddr_phy_reset: AD32S 0x0C001 PLL failed to lock!
-    Value in DPHY01_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P0_0x8000C0010301143F
-      not as expected
-  </description>
-  <ffdc>EXPECTED_STATUS</ffdc>
-  <ffdc>ACTUAL_STATUS</ffdc>
-  <callout>
-    <target>MBA_IN_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <callout>
-    <hw>
-      <hwid>MEM_REF_CLOCK</hwid>
-      <refTarget>MEMBUF_CHIP_IN_ERROR</refTarget>
-    </hw>
-    <priority>MEDIUM</priority>
-  </callout>
-  <deconfigure>
-    <target>MBA_IN_ERROR</target>
-  </deconfigure>
-  <gard>
-    <target>MBA_IN_ERROR</target>
-  </gard>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_AD32S_1_PLL_FAILED_TO_LOCK</rc>
-  <description>
-    mss_ddr_phy_reset: AD32S 0x1C001 PLL failed to lock!
-    Value in DPHY01_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P1_0x8001C0010301143F
-      not as expected
-  </description>
-  <ffdc>EXPECTED_STATUS</ffdc>
-  <ffdc>ACTUAL_STATUS</ffdc>
-  <callout>
-    <target>MBA_IN_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <callout>
-    <hw>
-      <hwid>MEM_REF_CLOCK</hwid>
-      <refTarget>MEMBUF_CHIP_IN_ERROR</refTarget>
-    </hw>
-    <priority>MEDIUM</priority>
-  </callout>
-  <deconfigure>
-    <target>MBA_IN_ERROR</target>
-  </deconfigure>
-  <gard>
-    <target>MBA_IN_ERROR</target>
-  </gard>
-</hwpError>
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit/memory_mss_draminit.xml b/src/usr/hwpf/hwp/dram_training/mss_draminit/memory_mss_draminit.xml
deleted file mode 100644
index b17ad79e3..000000000
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit/memory_mss_draminit.xml
+++ /dev/null
@@ -1,65 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mss_draminit/memory_mss_draminit.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_draminit.xml,v 1.2 2014/03/28 21:04:03 jdsloat Exp $ -->
-<!-- For file ../../ipl/fapi/mss_draminit.C -->
-
-<hwpError>
-  <rc>RC_MSS_DRAMINIT_RTT_NOM_IMP_INPUT_ERROR</rc>
-  <description>Unknown Value for RTT_NOM within the VPD</description>
-  <ffdc>IMP</ffdc>
-  <ffdc>PORT</ffdc>
-  <ffdc>DIMM</ffdc>
-  <ffdc>RANK</ffdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>TARGET_MBA_ERROR</target>
-  </deconfigure>
-  <gard>
-    <target>TARGET_MBA_ERROR</target>
-  </gard>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_DRAMINIT_RTT_WR_IMP_INPUT_ERROR</rc>
-  <description>Unknown Value for RTT_WR within the VPD</description>
-  <ffdc>IMP</ffdc>
-  <ffdc>PORT</ffdc>
-  <ffdc>DIMM</ffdc>
-  <ffdc>RANK</ffdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>TARGET_MBA_ERROR</target>
-  </deconfigure>
-  <gard>
-    <target>TARGET_MBA_ERROR</target>
-  </gard>
-</hwpError>
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_mc/memory_mss_draminit_mc.xml b/src/usr/hwpf/hwp/dram_training/mss_draminit_mc/memory_mss_draminit_mc.xml
deleted file mode 100644
index 4bbd2ff99..000000000
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_mc/memory_mss_draminit_mc.xml
+++ /dev/null
@@ -1,104 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mss_draminit_mc/memory_mss_draminit_mc.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2013,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_draminit_mc.xml,v 1.2 2015/02/12 22:09:31 gollub Exp $ -->
-<!-- For file ../../ipl/fapi/mss_draminit_mc.C -->
-<!-- // *! OWNER NAME :  David Cadigan   Email: dcadiga@us.ibm.com -->
-<!-- // *! BACKUP NAME : Jacob Sloat   Email: jdsloat@us.ibm.com -->
-
-
-  <hwpError>
-    <rc>RC_MSS_DRAMINIT_MC_DISPLAY_INVALID_ADDR</rc>
-    <description>Display invalid address.</description>
-    <!-- FFDC: MBA target -->    
-    <ffdc>MBA</ffdc>
-    <!-- FFDC: Capture invalid address -->    
-    <ffdc>MBMACA</ffdc>
-    <!-- FFDC: Capture FIR -->    
-    <ffdc>MBAFIR</ffdc>    
-    <!-- Callout FW HIGH -->
-    <callout><procedure>CODE</procedure><priority>HIGH</priority></callout>    
-</hwpError>
-
-
-  <hwpError>
-    <rc>RC_MSS_DRAMINIT_MC_DISPLAY_TIMEOUT</rc>
-    <description>Display timeout.</description>
-    <!-- FFDC: Capture cmd type -->    
-    <ffdc>MBMCT</ffdc>
-    <!-- FFDC: Capture address -->    
-    <ffdc>MBMACA</ffdc>    
-    <!-- FFDC: Capture stop conditions -->    
-    <ffdc>MBASCTL</ffdc>    
-    <!-- FFDC: Capture stop/start control reg -->    
-    <ffdc>MBMCC</ffdc>    
-    <!-- FFDC: Capture cmd in progress reg -->    
-    <ffdc>MBMSR</ffdc>    
-    <!-- FFDC: Capture FIR -->    
-    <ffdc>MBAFIR</ffdc>    
-    <!-- Callout FW HIGH -->
-    <callout><procedure>CODE</procedure><priority>HIGH</priority></callout>        
-    <!-- Callout MBA LOW -->
-    <callout><target>MBA</target><priority>LOW</priority></callout>
-    <!-- Deconfigure MBA -->
-    <deconfigure><target>MBA</target></deconfigure>
-    <!-- Create GARD record for MBA -->    
-    <gard><target>MBA</target></gard>        
-    
-</hwpError>
-
-
-  <hwpError>
-    <rc>RC_MSS_DRAMINIT_MC_INSUF_RCD_PROTECT_TIME</rc>
-    <description>Injected RCD parity error detected too late for RCD retry to be effective.</description>
-    <!-- FFDC: PORT select: 0,1 -->    
-    <ffdc>PORT_SELECT</ffdc>
-    <!-- FFDC: DIMM select: 0,1 -->        
-    <ffdc>DIMM_SELECT</ffdc>        
-    <!-- FFDC: MBS has to be told about RCD parity error before cfg_wrdone_dly so it knows to retry writes -->
-    <ffdc>CFG_WRDONE_DLY</ffdc>                
-    <!-- FFDC: MBS has to be told about RCD parity error before cfg_rdtag_dly so it knows to retry reads -->
-    <ffdc>CFG_RDTAG_DLY</ffdc>                
-    <!-- FFDC: Injected RCD parity error not detected within detected max_cfg_rcd_protection_time, so RCD retry not effective -->
-    <ffdc>MAX_CFG_RCD_PROTECTION_TIME</ffdc>                
-    <!-- FFDC: Capture register with the RCD retry settings -->
-    <ffdc>MBA_FARB0</ffdc>                
-    <!-- FFDC: Capture MBACALFIR to see if at least the MBA detected the injected RCD parity error -->
-    <ffdc>MBACALFIR</ffdc>                
-    <!-- Callout DIMM HIGH -->
-    <callout><target>DIMM</target><priority>HIGH</priority></callout>
-    <!-- Deconfigure DIMM -->
-    <deconfigure><target>DIMM</target></deconfigure>
-    <!-- Create GARD record for DIMM -->    
-    <gard><target>DIMM</target></gard>         
-    <!-- Callout MBA LOW -->
-    <callout><target>MBA</target><priority>LOW</priority></callout>
-    <!-- Deconfigure MBA -->
-    <deconfigure><target>MBA</target></deconfigure>
-    <!-- Create GARD record for MBA -->    
-    <gard><target>MBA</target></gard>        
-</hwpError>
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_access_delay_reg.xml b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_access_delay_reg.xml
deleted file mode 100644
index 2c8b3e5c1..000000000
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_access_delay_reg.xml
+++ /dev/null
@@ -1,198 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_access_delay_reg.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_access_delay_reg.xml,v 1.2 2014/01/24 17:24:45 sasethur Exp $ -->
-<!-- For file ../../ipl/fapi/mss_access_delay_reg.C -->
-<!-- // *! OWNER NAME  : Saurabh Chadha     Email: sauchadh@in.ibm.com -->
-
-<hwpError>
-  <rc>RC_MSS_ACCESS_DELAY_REG_INVALID_INPUT</rc>
-  <description>
-    The mss_access_delay_reg utility function received a bad parameter
-  </description>
-  <ffdc>MBA_TARGET</ffdc>
-  <ffdc>ACCESS_TYPE_PARAM</ffdc>
-  <ffdc>PORT_PARAM</ffdc>
-  <ffdc>RANK_PARAM</ffdc>
-  <ffdc>TYPE_PARAM</ffdc>
-  <ffdc>INDEX_PARAM</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_ACCESS_DELAY_REG_BAD_MBA_POS</rc>
-  <description>
-    The mss_access_delay_reg utility function received a bad MBA position
-    from the ATTR_CHIP_UNIT_POS attribute
-  </description>
-  <ffdc>MBA_TARGET</ffdc>
-  <ffdc>MBA_POS</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_ACCESS_DELAY_REG_BAD_DRAM_WIDTH</rc>
-  <description>
-    The mss_access_delay_reg utility function received a bad DRAM width
-    from the ATTR_EFF_DRAM_WIDTH attribute
-  </description>
-  <ffdc>MBA_TARGET</ffdc>
-  <ffdc>DRAM_WIDTH</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_CROSS_COUPLED_INVALID_INPUT</rc>
-  <description>
-    The cross_coupled utility function received a bad input type parameter
-  </description>
-  <ffdc>TYPE_PARAM</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-
-<hwpError>
-  <rc>RC_CROSS_COUPLED_INVALID_DQS</rc>
-  <description>
-    The cross_coupled utility function received a invalid DQS
-  </description>
-  <ffdc>INVALID_DQS</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-
-<hwpError>
-  <rc>RC_ROSETTA_MAP_INVALID_INPUT</rc>
-  <description>
-    The rosetta_map utility function received a bad parameter
-  </description>
-  <ffdc>MBA_TARGET</ffdc>
-  <ffdc>PORT_PARAM</ffdc>
-  <ffdc>TYPE_PARAM</ffdc>
-  <ffdc>INDEX_PARAM</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_ROSETTA_MAP_BAD_SWIZZLE_VALUE</rc>
-  <description>
-    The rosetta_map utility function received a bad swizzle value
-    from the ATTR_MSS_DQS_SWIZZLE_TYPE attribute
-  </description>
-  <ffdc>SWIZZLE_TYPE</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_ROSETTA_MAP_BAD_MBA_POS</rc>
-  <description>
-    The rosetta_map  utility function received a bad MBA position
-    from the ATTR_CHIP_UNIT_POS attribute
-  </description>
-  <ffdc>MBA_TARGET</ffdc>
-  <ffdc>MBA_POS</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_C4_PHY_INVALID_INPUT</rc>
-  <description>
-    The mss_c4_phy utility function received a bad input type parameter
-  </description>
-  <ffdc>TYPE_PARAM</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_ACCESS_DELAY_REG_SCHMOO_INVALID_INPUT</rc>
-  <description>
-    The mss_access_delay_reg_schmoo utility function received a bad parameter
-  </description>
-  <ffdc>MBA_TARGET</ffdc>
-  <ffdc>ACCESS_TYPE_PARAM</ffdc>
-  <ffdc>PORT_PARAM</ffdc>
-  <ffdc>RANK_PARAM</ffdc>
-  <ffdc>TYPE_PARAM</ffdc>
-  <ffdc>INDEX_PARAM</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_ACCESS_DELAY_REG_SCHMOO_BAD_MBA_POS</rc>
-  <description>
-    The mss_access_delay_reg utility function received a bad MBA position
-    from the ATTR_CHIP_UNIT_POS attribute
-  </description>
-  <ffdc>MBA_TARGET</ffdc>
-  <ffdc>MBA_POS</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_ACCESS_DELAY_REG_SCHMOO_BAD_DRAM_WIDTH</rc>
-  <description>
-    The mss_access_delay_reg utility function received a bad DRAM width
-    from the ATTR_EFF_DRAM_WIDTH attribute
-  </description>
-  <ffdc>MBA_TARGET</ffdc>
-  <ffdc>DRAM_WIDTH</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_draminit_training_advanced.xml b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_draminit_training_advanced.xml
deleted file mode 100644
index 7f08d2591..000000000
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_draminit_training_advanced.xml
+++ /dev/null
@@ -1,94 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_draminit_training_advanced.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_draminit_training_advanced.xml,v 1.2 2014/01/23 17:11:14 sasethur Exp $ -->
-<!-- For file ../../ipl/fapi/mss_draminit_training_advanced.C -->
-<!-- // *! OWNER NAME : Saravanan Sethuraman          email ID:saravanans@in.ibm.com -->
-<!-- // *! BACKUP NAME: Mark D Bellows	 			 email ID:bellows@us.ibm.com -->
-
-<hwpError>
-  <rc>RC_DRV_IMPED_SHMOO_INVALID_MARGIN_DATA</rc>
-  <description>
-    The drv_imped_shmoo utility function got bad margin data from the
-    find_best_margin function
-  </description>
-  <ffdc>COUNT_DATA</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_SLEW_RATE_SHMOO_INVALID_MARGIN_DATA</rc>
-  <description>
-    The slew_rate_shmoo utility function got bad margin data from the
-    find_best_margin function
-  </description>
-  <ffdc>COUNT_DATA</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_WR_VREF_SHMOO_INVALID_MARGIN_DATA</rc>
-  <description>
-    The wr_vref_shmoo utility function got bad margin data from the
-    find_best_margin function
-  </description>
-  <ffdc>COUNT_DATA</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_RD_VREF_SHMOO_INVALID_MARGIN_DATA</rc>
-  <description>
-    The rd_vref_shmoo utility function got bad margin data from the
-    find_best_margin function
-  </description>
-  <ffdc>COUNT_DATA</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_RCV_IMP_SHMOO_INVALID_MARGIN_DATA</rc>
-  <description>
-    The rcv_imp_shmoo utility function got bad margin data from the
-    find_best_margin function
-  </description>
-  <ffdc>COUNT_DATA</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_generic_shmoo.xml b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_generic_shmoo.xml
deleted file mode 100644
index bcae920d5..000000000
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_generic_shmoo.xml
+++ /dev/null
@@ -1,52 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_generic_shmoo.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_generic_shmoo.xml,v 1.3 2014/02/07 16:56:32 sasethur Exp $ -->
-<!-- For file ../../ipl/fapi/mss_generic_shmoo.C -->
-<!-- // *! OWNER  NAME          : Abhijit Saurabh          Email: abhijit.saurabh@in.ibm.com -->
-<!-- // *! BACKUP NAME          : Sidhartha Vijay      	  Email: sidvijay@in.ibm.com -->
-
-<hwpError>
-  <rc>RC_MSS_GENERIC_SHMOO_MCBIST_FAILED</rc>
-  <description>
-    The mss_generic_shmoo file found an MCBIST Failure
-  </description>
-  <callout>
-    <childTargets>
-      <parent>MBA_CHIPLET</parent>
-      <childType>TARGET_TYPE_DIMM</childType>
-      <childPort>MBA_PORT_NUMBER</childPort>
-      <childNumber>MBA_DIMM_NUMBER</childNumber>
-    </childTargets>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <childTargets>
-      <parent>MBA_CHIPLET</parent>
-      <childType>TARGET_TYPE_DIMM</childType>
-      <childPort>MBA_PORT_NUMBER</childPort>
-      <childNumber>MBA_DIMM_NUMBER</childNumber>
-    </childTargets>
-  </deconfigure>
-</hwpError>
-</hwpErrors>
\ No newline at end of file
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_mcbist.xml b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_mcbist.xml
deleted file mode 100644
index 1e4df7a38..000000000
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_mcbist.xml
+++ /dev/null
@@ -1,53 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_mcbist.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_mcbist.xml,v 1.2 2014/01/23 19:24:34 sasethur Exp $ -->
-<!-- For file ../../ipl/fapi/mss_mcbist.C -->
-<!-- // *! OWNER  NAME          : Devashikamani, Aditya         Email: adityamd@in.ibm.com -->
-<!-- // *! BACKUP               : Sethuraman, Saravanan         Email: saravanans@in.ibm.com -->
-
-<hwpError>
-  <rc>RC_CFG_MCB_TEST_MEM_INVALID_INPUT</rc>
-  <description>
-    The cfg_mcb_test_mem function received a bad test type parameter
-  </description>
-  <ffdc>TEST_TYPE_PARAM</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_CFG_MCB_DGEN_INVALID_INPUT</rc>
-  <description>
-    The cfg_mcb_dgen function received a bad data mode parameter
-  </description>
-  <ffdc>DATA_MODE_PARAM</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_mcbist_common.xml b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_mcbist_common.xml
deleted file mode 100644
index 4d40639bd..000000000
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_mcbist_common.xml
+++ /dev/null
@@ -1,44 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_mcbist_common.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_mcbist_common.xml,v 1.5 2014/02/07 17:23:02 sasethur Exp $ -->
-<!-- For file ../../ipl/fapi/mss_mcbist_common.C -->
-<!-- // *! OWNER  NAME          : Devashikamani, Aditya         Email: adityamd@in.ibm.com -->
-<!-- // *! BACKUP               : Sethuraman, Saravanan         Email: saravanans@in.ibm.com -->
-
-<!-- Original Source for RC_MSS_MCBIST_TIMEOUT_ERROR memory_errors.xml -->
-<hwpError>
-  <rc>RC_MSS_MCBIST_TIMEOUT_ERROR</rc>
-  <description>Timeout on MCBIST configuration register polling.</description>
-  <callout>
-    <target>MBA_CHIPLET</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>MBA_CHIPLET</target>
-  </deconfigure>
-  <gard>
-    <target>MBA_CHIPLET</target>
-  </gard>
-</hwpError>
-</hwpErrors>
\ No newline at end of file
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_mss_ddr4_pda_errors.xml b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_mss_ddr4_pda_errors.xml
deleted file mode 100644
index 28f992ecc..000000000
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_mss_ddr4_pda_errors.xml
+++ /dev/null
@@ -1,67 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/memory_mss_mss_ddr4_pda_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2015                             -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-
-<!-- $Id: memory_mss_mss_ddr4_pda_errors.xml,v 1.2 2015/05/13 14:06:15 sglancy Exp $ -->
-<!-- For file ../../ipl/fapi/mss_volt_vddr_offset.C -->
-<!-- // *! OWNER NAME :   Stephen Glancy (sglancy@us.ibm.com) -->
-<!-- // *! BACKUP NAME : Andre Marin     (aamarin@us.ibm.com) -->
-
-
-  <hwpError>
-    <rc>RC_MSS_PDA_NONMRS_ATTR_NAME</rc>
-    <description>An attribute that is not associated with an MRS was inputted into the PDA function</description>
-    <ffdc>NONMRS_ATTR_NAME</ffdc>
-    <ffdc>MBA_TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <hwpError>
-    <rc>RC_MSS_PDA_MRS_NOT_FOUND</rc>
-    <description>An MRS id from 0 to 6 (valid MRS) was not selected.</description>
-    <ffdc>MRS_VALUE</ffdc>
-    <ffdc>MBA_TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <hwpError>
-    <rc>RC_MSS_PDA_DRAM_DNE</rc>
-    <description>An invalid DRAM was selected for this given configuration for PDA. The DRAM does not exist (DNE).</description>
-    <ffdc>PORT_VALUE</ffdc>
-    <ffdc>DIMM_VALUE</ffdc>
-    <ffdc>RANK_VALUE</ffdc>
-    <ffdc>DRAM_VALUE</ffdc>
-    <ffdc>MBA_TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
-
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_training/memory_mss_draminit_training.xml b/src/usr/hwpf/hwp/dram_training/mss_draminit_training/memory_mss_draminit_training.xml
deleted file mode 100644
index 53fc9b395..000000000
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_training/memory_mss_draminit_training.xml
+++ /dev/null
@@ -1,322 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mss_draminit_training/memory_mss_draminit_training.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_draminit_training.xml,v 1.4 2014/06/09 22:44:56 jdsloat Exp $ -->
-<!-- For file ../../ipl/fapi/mss_draminit_training.C -->
-
-
-<registerFfdc>
-  <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_0_0x8000007c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_1_0x8000047c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_2_0x8000087c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_3_0x80000c7c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_4_0x8000107c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_0_0x8000017c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_1_0x8000057c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_2_0x8000097c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_3_0x80000d7c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_4_0x8000117c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_0_0x8000027c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_1_0x8000067c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_2_0x80000a7c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_3_0x80000e7c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_4_0x8000127c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_0_0x8000037c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_1_0x8000077c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_2_0x80000b7c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_3_0x80000f7c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_4_0x8000137c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_0_0x8001007c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_1_0x8001047c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_2_0x8001087c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_3_0x80010c7c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_4_0x8001107c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_0_0x8001017c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_1_0x8001057c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_2_0x8001097c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_3_0x80010d7c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_4_0x8001117c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_0_0x8001027c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_1_0x8001067c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_2_0x80010a7c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_3_0x80010e7c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_4_0x8001127c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_0_0x8001037c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_1_0x8001077c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_2_0x80010b7c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_3_0x80010f7c0301143F</scomRegister>
-  <scomRegister>DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_4_0x8001137c0301143F</scomRegister>
-</registerFfdc>
-
-<hwpError>
-  <rc>RC_MSS_DRAMINIT_TRAINING_DRAM_WIDTH_INPUT_ERROR_SETBBM</rc>
-  <description>Unknown Value for DRAM_WIDTH being used.</description>
-  <ffdc>WIDTH</ffdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>LOW</priority>
-  </callout>
-  <deconfigure>
-    <target>TARGET_MBA_ERROR</target>
-  </deconfigure>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_DRAMINIT_TRAINING_DRAM_WIDTH_INPUT_ERROR_GETBBM</rc>
-  <description>Unknown Value for DRAM_WIDTH being used.</description>
-  <ffdc>WIDTH</ffdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>LOW</priority>
-  </callout>
-  <deconfigure>
-    <target>TARGET_MBA_ERROR</target>
-  </deconfigure>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_DRAMINIT_TRAINING_DIMM_SPARE_INPUT_ERROR</rc>
-  <description>Unknown Value for DIMM_SPARE being used.</description>
-  <ffdc>PORT</ffdc>
-  <ffdc>DIMM</ffdc>
-  <ffdc>RANK</ffdc>
-  <ffdc>SPARE</ffdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>LOW</priority>
-  </callout>
-  <deconfigure>
-    <target>TARGET_MBA_ERROR</target>
-  </deconfigure>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_DRAMINIT_TRAINING_C4_PHY_TRANSLATION_ERROR</rc>
-  <description>Incorrect translation of bad bit mask between C4 and PHY</description>
-  <ffdc>PORT</ffdc>
-  <ffdc>BLOCK</ffdc>
-  <ffdc>QUAD</ffdc>
-  <ffdc>PHYLANE</ffdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <target>TARGET_MBA_ERROR</target>
-  </deconfigure>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_DRAMINIT_TRAINING_WR_LVL_ERROR</rc>
-  <description>Write Leveling has returned a fail for a given position within this calibration.</description>
-  <ffdc>MBA_POSITION</ffdc>
-  <ffdc>PORT_POSITION</ffdc>
-  <ffdc>RANKGROUP_POSITION</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id>
-    <target>TARGET_MBA_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>LOW</priority>
-  </callout>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_DRAMINIT_TRAINING_DQS_ALIGNMENT_ERROR</rc>
-  <description>DQS Alignment has returned a fail for a given position within this calibration.</description>
-  <ffdc>MBA_POSITION</ffdc>
-  <ffdc>PORT_POSITION</ffdc>
-  <ffdc>RANKGROUP_POSITION</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id>
-    <target>TARGET_MBA_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>LOW</priority>
-  </callout>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_DRAMINIT_TRAINING_RD_CLK_SYS_CLK_ALIGNMENT_ERROR</rc>
-  <description>Read CLK to SYS CLK Alignment has returned a fail for a given position within this calibration.</description>
-  <ffdc>MBA_POSITION</ffdc>
-  <ffdc>PORT_POSITION</ffdc>
-  <ffdc>RANKGROUP_POSITION</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id>
-    <target>TARGET_MBA_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>LOW</priority>
-  </callout>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_DRAMINIT_TRAINING_RD_CENTERING_ERROR</rc>
-  <description>Read Centering has returned a fail for a given position within this calibration.</description>
-  <ffdc>MBA_POSITION</ffdc>
-  <ffdc>PORT_POSITION</ffdc>
-  <ffdc>RANKGROUP_POSITION</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id>
-    <target>TARGET_MBA_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>LOW</priority>
-  </callout>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_DRAMINIT_TRAINING_WR_CENTERING_ERROR</rc>
-  <description>Write centering has returned a fail for a given position within this calibration.</description>
-  <ffdc>MBA_POSITION</ffdc>
-  <ffdc>PORT_POSITION</ffdc>
-  <ffdc>RANKGROUP_POSITION</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id>
-    <target>TARGET_MBA_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>LOW</priority>
-  </callout>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_DRAMINIT_TRAINING_COURSE_RD_CENTERING_ERROR</rc>
-  <description>Course Read Centering has returned a fail for a given position within this calibration.</description>
-  <ffdc>MBA_POSITION</ffdc>
-  <ffdc>PORT_POSITION</ffdc>
-  <ffdc>RANKGROUP_POSITION</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id>
-    <target>TARGET_MBA_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>LOW</priority>
-  </callout>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_DRAMINIT_TRAINING_CUSTOM_PATTERN_RD_CENTERING_ERROR</rc>
-  <description>Custom Pattern Read Centering has returned a fail for a given position within this calibration.</description>
-  <ffdc>MBA_POSITION</ffdc>
-  <ffdc>PORT_POSITION</ffdc>
-  <ffdc>RANKGROUP_POSITION</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id>
-    <target>TARGET_MBA_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>LOW</priority>
-  </callout>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_DRAMINIT_TRAINING_CUSTOM_PATTERN_WR_CENTERING_ERROR</rc>
-  <description>Custom Pattern Write Centering has returned a fail for a given position within this calibration.</description>
-  <ffdc>MBA_POSITION</ffdc>
-  <ffdc>PORT_POSITION</ffdc>
-  <ffdc>RANKGROUP_POSITION</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id>
-    <target>TARGET_MBA_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>LOW</priority>
-  </callout>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-<hwpError>
-  <rc>RC_MSS_DRAMINIT_TRAINING_DIGITAL_EYE_ERROR</rc>
-  <description>Digital Eye has returned a fail for a given position within this calibration.</description>
-  <ffdc>MBA_POSITION</ffdc>
-  <ffdc>PORT_POSITION</ffdc>
-  <ffdc>RANKGROUP_POSITION</ffdc>
-  <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id>
-    <target>TARGET_MBA_ERROR</target>
-  </collectRegisterFfdc>
-  <callout>
-    <target>TARGET_MBA_ERROR</target>
-    <priority>LOW</priority>
-  </callout>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs/memory_mss_lrdimm_funcs.xml b/src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs/memory_mss_lrdimm_funcs.xml
deleted file mode 100755
index 694f0588a..000000000
--- a/src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs/memory_mss_lrdimm_funcs.xml
+++ /dev/null
@@ -1,212 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs/memory_mss_lrdimm_funcs.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2014                   -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: memory_mss_lrdimm_funcs.xml,v 1.1 2014/02/12 22:47:52 kcook Exp $ -->
-<!-- Error definitions for  mss_lrdimm_funcs procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_LRDIMM_UNSUPPORTED_TYPE</rc>
-    <description>
-        Currently unsuported IBM type
-    </description>
-    <ffdc>IBM_TYPE</ffdc>
-    <ffdc>TARGET</ffdc>
-	<callout>
-		<target>DIMM</target>
-		<priority>HIGH</priority>
-	</callout>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-	<deconfigure>
-		<target>DIMM</target>
-	</deconfigure>
-	<gard>
-		<target>DIMM</target>
-	</gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_LRDIMM_INVALID_MSS_FREQ</rc>
-    <description>Invalid LRDIMM ATTR_MSS_FREQ</description>
-    <ffdc>L_MSS_FREQ</ffdc>
-	<callout>
-		<target>TARGET</target>
-		<priority>HIGH</priority>
-	</callout>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-	<deconfigure>
-		<target>TARGET</target>
-	</deconfigure>
-	<gard>
-		<target>TARGET</target>
-	</gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_LRDIMM_INVALID_MSS_VOLT</rc>
-    <description>Invalid LRDIMM ATTR_MSS_VOLT</description>
-    <ffdc>L_MSS_VOLT</ffdc>
-	<callout>
-		<target>TARGET</target>
-		<priority>HIGH</priority>
-	</callout>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-	<deconfigure>
-		<target>TARGET</target>
-	</deconfigure>
-	<gard>
-		<target>TARGET</target>
-	</gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_LRDIMM_INVALID_DRAM_DENSITY</rc>
-    <description>Invalid ATTR_EFF_DRAM_DENSITY for mult_mode = 1</description>
-    <ffdc>L_LRDIMM_RANK_MULT_MODE</ffdc>
-    <ffdc>L_DRAM_DENSITY</ffdc>
-	<callout>
-		<target>TARGET</target>
-		<priority>HIGH</priority>
-	</callout>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-	<deconfigure>
-		<target>TARGET</target>
-	</deconfigure>
-	<gard>
-		<target>TARGET</target>
-	</gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_LRDIMM_INVALID_DRAM_DENSITY_MULT_2</rc>
-    <description>Invalid ATTR_EFF_DRAM_DENSITY for mult_mode = 2</description>
-    <ffdc>L_LRDIMM_RANK_MULT_MODE</ffdc>
-    <ffdc>L_DRAM_DENSITY</ffdc>
-	<callout>
-		<target>TARGET</target>
-		<priority>HIGH</priority>
-	</callout>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-	<deconfigure>
-		<target>TARGET</target>
-	</deconfigure>
-	<gard>
-		<target>TARGET</target>
-	</gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_LRDIMM_INVALID_SPD_DRV_IMP</rc>
-    <description>Invalid SPD LR MR1,2 DRAM drv imp on</description>
-    <ffdc>L_DRAM_RON</ffdc>
-	<callout>
-		<target>TARGET</target>
-		<priority>HIGH</priority>
-	</callout>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-	<deconfigure>
-		<target>TARGET</target>
-	</deconfigure>
-	<gard>
-		<target>TARGET</target>
-	</gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_LRDIMM_INVALID_SPD_RTT_NOM</rc>
-    <description>Invalid SPD LR MR1,2 DRAM drv imp on</description>
-    <ffdc>L_DRAM_RTT_NOM</ffdc>
-	<callout>
-		<target>TARGET</target>
-		<priority>HIGH</priority>
-	</callout>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-	<deconfigure>
-		<target>TARGET</target>
-	</deconfigure>
-	<gard>
-		<target>TARGET</target>
-	</gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_LRDIMM_INVALID_SPD_RTT_WR</rc>
-    <description>Invalid SPD LR MR1,2 DRAM RTT_WR</description>
-    <ffdc>L_DRAM_RTT_WR</ffdc>
-	<callout>
-		<target>TARGET</target>
-		<priority>HIGH</priority>
-	</callout>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-	<deconfigure>
-		<target>TARGET</target>
-	</deconfigure>
-	<gard>
-		<target>TARGET</target>
-	</gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_LRDIMM_INVALID_RANK_MULT_MODE</rc>
-    <description>Invalid LR rank mult mode </description>
-    <ffdc>L_LRDIMM_RANK_MULT_MODE</ffdc>
-	<callout>
-		<target>TARGET</target>
-		<priority>HIGH</priority>
-	</callout>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-	<deconfigure>
-		<target>TARGET</target>
-	</deconfigure>
-	<gard>
-		<target>TARGET</target>
-	</gard>
-  </hwpError>
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/mss_scominit/memory_mss_scominit.xml b/src/usr/hwpf/hwp/dram_training/mss_scominit/memory_mss_scominit.xml
deleted file mode 100644
index f864e8c5f..000000000
--- a/src/usr/hwpf/hwp/dram_training/mss_scominit/memory_mss_scominit.xml
+++ /dev/null
@@ -1,55 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/dram_training/mss_scominit/memory_mss_scominit.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: memory_mss_scominit.xml,v 1.2 2013/11/18 22:32:03 mwuu Exp $ -->
-<!-- For file ../../ipl/fapi/mss_scominit.C -->
-<!-- // *! OWNER NAME  : Menlo Wuu         Email: menlowuu@us.ibm.com -->
-<!-- // *! BACKUP NAME : Mark Bellows      Email: bellows@us.ibm.com -->
-
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_SCOMINIT_NUM_MBA_ERROR</rc>
-    <description>
-        mss_scominit did not see 2 present membuf child MBAs returned by
-        fapiGetChildChiplets
-    </description>
-    <ffdc>NUM_MBAS</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_SCOMINIT_NUM_L4_ERROR</rc>
-    <description>
-        mss_scominit did not see 1 present membuf child L4 returned by
-        fapiGetChildChiplets
-    </description>
-    <ffdc>NUM_L4S</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml
deleted file mode 100644
index 56df2bd68..000000000
--- a/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml
+++ /dev/null
@@ -1,120 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_fab_smp_errors.xml,v 1.7 2014/02/23 21:40:08 jmcgill Exp $ -->
-<!-- Error definitions for proc_fab_smp -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_FAB_SMP_PCIE_NOT_F_LINK_ATTR_ERR</rc>
-    <description>Invalid definition for PCIe/DSMP mux attribute value.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>ATTR_DATA</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_FAB_SMP_FABRIC_NODE_ID_ATTR_ERR</rc>
-    <description>Invalid definition for fabric node ID attribute value.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>ATTR_DATA</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_FAB_SMP_FABRIC_CHIP_ID_ATTR_ERR</rc>
-    <description>Invalid definition for fabric chip ID attribute value.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>ATTR_DATA</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_FAB_SMP_EPSILON_TABLE_TYPE_ATTR_ERR</rc>
-    <description>Invalid definition for epsilon table type attribute value.</description>
-    <ffdc>ATTR_DATA</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_FAB_SMP_EPSILON_GB_DIRECTION_ATTR_ERR</rc>
-    <description>Invalid definition for epsilon guardband direction attribute value.</description>
-    <ffdc>ATTR_DATA</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_FAB_SMP_ASYNC_SAFE_MODE_ATTR_ERR</rc>
-    <description>Invalid definition for fabric async safe mode attribute value.</description>
-    <ffdc>ATTR_DATA</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_FAB_SMP_PUMP_MODE_ATTR_ERR</rc>
-    <description>Invalid definition for fabric pump mode attribute value.</description>
-    <ffdc>ATTR_DATA</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_FAB_SMP_X_BUS_WIDTH_ATTR_ERR</rc>
-    <description>Invalid definition for X bus width attribute value.</description>
-    <ffdc>ATTR_DATA</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_FAB_SMP_MCS_INTERLEAVED_ATTR_ERR</rc>
-    <description>Invalid definition for MCS interleaving attribute value.</description>
-    <ffdc>ATTR_DATA</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/ei_bus_attributes.xml b/src/usr/hwpf/hwp/ei_bus_attributes.xml
deleted file mode 100755
index b0505ac8d..000000000
--- a/src/usr/hwpf/hwp/ei_bus_attributes.xml
+++ /dev/null
@@ -1,126 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/ei_bus_attributes.xml $                      -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: ei_bus_attributes.xml,v 1.13 2015/04/13 16:13:24 jgrell Exp $ -->
-<!--
-    XML file specifying HWPF attributes.
-    These are platInit attributes associated with chips.
--->
-
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_EI_BUS_TX_MSBSWAP</id>
-    <targetType>TARGET_TYPE_MCS_CHIPLET,TARGET_TYPE_MEMBUF_CHIP,TARGET_TYPE_ABUS_ENDPOINT</targetType>
-    <description>
-        Source: MRW: Downstream MSB Swap and Upstream MSB Swap
-		Usage:  TX_MSBSWAP initfile setting for DMI and A buses
-
-		This attribute represents whether or not a single clock group bus such as DMI and A bus was wired by the board designer using a feature
-		called MSB Swap where lane 0 of the TX chip wires to lane n-1 on the RX chip where 'n' is the width of the bus. A basic description
-		of this capability is that the board designer can save layers on the board wiring by crossing the wiring between the two chips in
-		a prescribed manner. In a non-MSB Swapped bus Lane 0 on the TX chip wires to lane 0 on the RX chip, lane 1 to lane 1 and so on.
-		If a bus is MSB Swapped then lane 0 of the TX chip wires to lane 'n-1' of the RX chip, lane 1 to lane 'n-2', etc. Random or 
-		arbitrary wiring of TX to RX lanes on different chips is NOT ALLOWED.
-
-        The Master Chip of two connected chips is defined as the chip with the smaller value of (100*Node + Pos).
-		The Slave Chip of two connected chips is defined as the chip with the larger value of (100*Node + Pos).
-		The Downstream direction is defined as the direction from the Master chip to the Slave chip.
-		The Upstream direction is defined as the direction from the Slave chip to the Master chip.
-
-		The Downstream TX_MSBSWAP from the MRW is a uint8 value. 0x01 means the Downstream bus is wired msb to lsb etc. and
-		0x00 means the bus is wired normally, msb to msb, lsb to lsb (lane0 to lane0).
-		
-		The Upstream TX_MSBSWAP from the MRW is a uint8 value. 0x01 means the Upstream bus is wired msb to lsb etc. and
-		0x00 means the bus is wired normally, msb to msb, lsb to lsb (lane0 to lane0).
-		
-		It is up to the platform code to set up each ATTR_EI_BUS_TX_MSBSWAP value for the correct target endpoints.
-		 
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <attribute>
-    <id>ATTR_EI_BUS_TX_LANE_INVERT</id>
-    <targetType>TARGET_TYPE_MCS_CHIPLET,TARGET_TYPE_MEMBUF_CHIP,TARGET_TYPE_ABUS_ENDPOINT</targetType>
-    <description>
-        Source: MRW: Downstream N/P Lane Swap Mask and Upstream N/P Lane Swap Mask
-		             upstream-n-p-lane-swap-mask => Slave chip ATTR_EI_BUS_TX_LANE_INVERT
-					 downstream-n-p-lane-swap-mask => Master chip ATTR_EI_BUS_TX_LANE_INVERT
-		Usage:  TX_LANE_INVERT initfile setting for DMI and A buses
-		This attribute represents the polarity of a differential wire pair on the DMI and A buses. Normally differential pair
-		wires are connected between the two positive phases of the pair and the two negative phases between two chips. In the DMI
-		and Abus designs it's allowable for the board designer to wire the positive phase of a lane from one chip to the negative phase of the 
-		of the other chip on that same lane and vice versa in order to simplify wiring on the board and reduce the number of board layers.
-		This attribute is set up as a 32 bit uint value interpreted as a 32 bit binary vector where the left-most bit position (msb/bit0) 
-		corresponds to the polarity of lane 0 and the right-most bit position (lsb/bit31) corresponds to lane 31. 		
-		A binary 1 in any position in the attribute means that the board designer has done a polarity swap within the differential
-		pair and the initfile must set the tx_lane_invert bit in the driving chip for that wire pair (called a lane).
-		The Downstream N/P Lane Swap Mask from the MRW represents the polarity of the bus wiring as it goes from the master chip to 
-		the slave chip (master chip is defined as the chip with a lower value of (node*100 + chip position) and 
-		Upstream N/P Lane Swap Mask represents the polarity of the bus wiring as it goes from the slave chip back to the master chip.
-		Examples: 
-		- Port A2 on Chip Target n0p0 connects to Port A2 on chip target n0p2. This connection has a Downstream N/P Lane Swap Mask and
-		  an Upstream N/P Lane Swap Mask. Setting the Downstream N/P Lane Swap Mask to a value of 0x80000000 means lane 0 is polarity 
-		  swapped and the initfile should set lane 0's tx_lane_invert bit on the n0p0 targeted chip (the so-called master chip).
-          If the Upstream N/P Lane Swap Mask is 0x20000000 this means lane 2 is polarity swapped and the initfile should set lane 2's 
-		  tx_lane_invert bit on the n0p2 targeted chip (the so-called slave chip).
-		It is up to the platform code to set up each ATTR_EI_BUS_TX_LANE_INVERT value for the correct target endpoints, 
-		ie. 0x80000000 for n0p0 and 0x20000000 for n0p2. 
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_DMI_REFCLOCK_SWIZZLE</id>
-    <targetType>TARGET_TYPE_MCS_CHIPLET</targetType>
-    <description>
-      Defines Murano/Venice FSI GP8 refclock enable field bit offset (0:7) associated with this MCS chip unit.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_DMI_DFE_OVERRIDE</id>
-    <targetType>TARGET_TYPE_MCS_CHIPLET,TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-      Defines where to apply DMI bus DFE override settings for HW244323.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_BRAZOS_RX_FIFO_OVERRIDE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      Defines where to apply Brazos rx_fifo_final_l2u_dly override settings for SW299500.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-
-</attributes>
diff --git a/src/usr/hwpf/hwp/erepair_thresholds.xml b/src/usr/hwpf/hwp/erepair_thresholds.xml
deleted file mode 100644
index f020d6b95..000000000
--- a/src/usr/hwpf/hwp/erepair_thresholds.xml
+++ /dev/null
@@ -1,104 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/erepair_thresholds.xml $                     -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!--
-    XML file specifying eRepair threshold attributes.
-    These are platInit attributes associated with the system.
-    These attributes are not associated with particular targets.
-    Each execution platform must initialize.
--->
-
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_X_EREPAIR_THRESHOLD_FIELD</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Firmware specified eRepair threshold limit of X Bus for Field usage
-        This value must be initialized by platforms by reading the value
-        from System Model - x_threshold_field of system_policy_table
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_X_EREPAIR_THRESHOLD_MNFG</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Firmware specified eRepair threshold limit of X Bus for MNFG usage
-        This value must be initialized by platforms by reading the value
-        from System Model - x_threshold_mnfg of system_policy_table
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->  
-  <attribute>
-    <id>ATTR_A_EREPAIR_THRESHOLD_FIELD</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Firmware specified eRepair threshold limit of A Bus for Field usage
-        This value must be initialized by platforms by reading the value
-        from System Model - a_threshold_field of system_policy_table
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_A_EREPAIR_THRESHOLD_MNFG</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Firmware specified eRepair threshold limit of A Bus for MNFG usage
-        This value must be initialized by platforms by reading the value
-        from System Model - a_threshold_mnfg of system_policy_table
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_DMI_EREPAIR_THRESHOLD_FIELD</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Firmware specified eRepair threshold limit of Memory Bus for Field usage
-        This value must be initialized by platforms by reading the value
-        from System Model - dmi_threshold_field of system_policy_table
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_DMI_EREPAIR_THRESHOLD_MNFG</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Firmware specified eRepair threshold limit of Memory Bus for MNFG usage
-        This value must be initialized by platforms by reading the value
-        from System Model - dmi_threshold_mnfg of system_policy_table
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/fapiHwpErrorInfo.xml b/src/usr/hwpf/hwp/fapiHwpErrorInfo.xml
deleted file mode 100755
index 3af8cb95b..000000000
--- a/src/usr/hwpf/hwp/fapiHwpErrorInfo.xml
+++ /dev/null
@@ -1,378 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/fapiHwpErrorInfo.xml $                       -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2011,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: fapiHwpErrorInfo.xml,v 1.17 2015/02/02 18:40:42 dcrowell Exp $ -->
-<!-- XML file specifying Test HW Procedure generated errors. -->
-
-<hwpErrors>
-
-  <registerFfdc>
-    <id>REG_FFDC_TEST_X_PROC_REGISTERS</id>
-    <cfamRegister>CFAM_FSI_GP8_0x00002817</cfamRegister>
-    <scomRegister>PORE_GPE0_STATUS_0x00060000</scomRegister>
-    <scomRegister>PORE_GPE0_CONTROL_0x00060001</scomRegister>
-    <scomRegister>PORE_GPE0_RESET_0x00060002</scomRegister>
-    <scomRegister>PORE_GPE0_ERROR_MASK_0x00060003</scomRegister>
-  </registerFfdc>
-
-  <registerFfdc>
-    <id>REG_FFDC_TEST_X_EX_REGISTERS</id>
-    <scomRegister>EX_GP0_0x10000000</scomRegister>
-    <scomRegister>EX_L3_FIR_REG_0x10010800</scomRegister>
-  </registerFfdc>
-
-  <registerFfdc>
-    <id>REG_FFDC_TEST_X_MBA_REGISTERS</id>
-    <scomRegister>MBA01_MBAFIRQ_0x03010600</scomRegister>
-    <scomRegister>MBA01_MBAFIRMASK_0x03010603</scomRegister>
-  </registerFfdc>
-
-  <registerFfdc>
-    <id>REG_FFDC_TEST_X_PROC_REGISTERS_PRES_CHILDREN</id>
-    <scomRegister>HANG_PULSE_0_REG_0x010F0020</scomRegister>
-    <scomRegister>HANG_PULSE_1_REG_0x010F0021</scomRegister>
-  </registerFfdc>
-
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_TEST_ERROR_A</rc>
-    <description>HWP Error A generated by Unit Test</description>
-
-    <!-- Collect chip register FFDC -->
-    <collectRegisterFfdc>
-       <id>REG_FFDC_TEST_X_PROC_REGISTERS</id>
-       <target>UNIT_TEST_CHIP_TARGET</target>
-    </collectRegisterFfdc>
-
-    <!-- Collect chiplet register FFDC -->
-    <collectRegisterFfdc>
-       <id>REG_FFDC_TEST_X_MBA_REGISTERS</id>
-       <target>UNIT_TEST_MBA_TARGET</target>
-    </collectRegisterFfdc>
-
-    <!-- Collect child chiplet register FFDC -->
-    <collectRegisterFfdc>
-       <id>REG_FFDC_TEST_X_EX_REGISTERS</id>
-       <childTargets>
-         <parent>UNIT_TEST_CHIP_TARGET</parent>
-         <childType>TARGET_TYPE_EX_CHIPLET</childType>
-       </childTargets>
-    </collectRegisterFfdc>
-
-    <!-- Collect register FFDC based on present children -->
-    <collectRegisterFfdc>
-       <id>REG_FFDC_TEST_X_PROC_REGISTERS_PRES_CHILDREN</id>
-       <basedOnPresentChildren>
-         <target>UNIT_TEST_CHIP_TARGET</target>
-         <childType>TARGET_TYPE_EX_CHIPLET</childType>
-         <childPosOffsetMultiplier>0x01000000</childPosOffsetMultiplier>
-       </basedOnPresentChildren>
-    </collectRegisterFfdc>
-
-    <!-- Call hwpTestFfdc1 to collect additional FFDC from the master chip -->
-    <collectFfdc>hwpTestFfdc1, UNIT_TEST_CHIP_TARGET</collectFfdc>
-    <!-- Add some integer data as FFDC -->
-    <ffdc>UNIT_TEST_FFDC_DATA_INTEGER</ffdc>
-    <!-- Add an ecmdDataBufferBase as FFDC -->
-    <ffdc>UNIT_TEST_FFDC_DATA_BUF</ffdc>
-    <!-- Add a Target as FFDC -->
-    <ffdc>UNIT_TEST_CHIP_TARGET</ffdc>
-    <!-- Callout next level of support -->
-    <callout>
-        <procedure>LVL_SUPPORT</procedure>
-        <priority>MEDIUM</priority>
-    </callout>
-    <!-- Callout a bus - in reality, the two targets would be different -->
-    <!-- Commented out to avoid actually calling out a bus in UT
-        <callout>
-            <bus>UNIT_TEST_CHIP_TARGET,UNIT_TEST_CHIP_TARGET</bus>
-            <priority>MEDIUM</priority>
-        </callout>
-    -->
-    <!-- Callout MASTER_CHIP HIGH -->
-    <!-- Commented out to avoid actually calling out a chip in UT
-        <callout>
-            <target>UNIT_TEST_CHIP_TARGET</target>
-            <priority>HIGH</priority>
-        </callout>
-    -->
-    <!-- Deconfigure MASTER_CHIP -->
-    <!-- Commented out to avoid actually deconfiuring a chip in UT
-        <deconfigure>
-            <target>UNIT_TEST_CHIP_TARGET</target>
-        </deconfigure>
-    -->
-    <!-- Create GARD record for MASTER_CHIP -->
-    <!-- Commented out to avoid actually GARDing a chip in UT
-        <gard>
-            <target>UNIT_TEST_CHIP_TARGET</target>
-        </gard>
-    -->
-    <!-- Callout MASTER_CHIP's EX chiplets MEDIUM -->
-    <!-- Commented out to avoid actually calling out chiplets in UT
-        <callout>
-            <childTargets>
-                <parent>UNIT_TEST_CHIP_TARGET</parent>
-                <childType>TARGET_TYPE_EX_CHIPLET</childType>
-            </childTargets>
-            <priority>MEDIUM</priority>
-        </callout>
-    -->
-    <!-- Callout MASTER_CHIP's EX4 chiplet MEDIUM -->
-    <!-- Commented out to avoid actually calling out chiplets in UT
-        <callout>
-            <childTargets>
-                <parent>UNIT_TEST_CHIP_TARGET</parent>
-                <childType>TARGET_TYPE_EX_CHIPLET</childType>
-                <childNumber>4</childNumber>
-            </childTargets>
-            <priority>MEDIUM</priority>
-        </callout>
-    -->
-    <!-- Callout MASTER_CHIP's associated Centaur4 chip MEDIUM -->
-    <!-- Commented out to avoid actually calling out chips in UT
-        <callout>
-            <childTargets>
-                <parent>UNIT_TEST_CHIP_TARGET</parent>
-                <childType>TARGET_TYPE_MEMBUF_CHIP</childType>
-                <childNumber>4</childNumber>
-            </childTargets>
-            <priority>MEDIUM</priority>
-        </callout>
-    -->
-    <!-- Deconfigure MASTER_CHIP's ABUS endpoints -->
-    <!-- Commented out to avoid actually deconfiguring chiplets in UT
-        <deconfigure>
-            <childTargets>
-                <parent>UNIT_TEST_CHIP_TARGET</parent>
-                <childType>TARGET_TYPE_ABUS_ENDPOINT</childType>
-            </childTargets>
-        </deconfigure>
-    -->
-    <!-- Callout the PCI ref-clock -->
-    <!-- Commented out to avoid actually calling out the ref-clock in UT
-        <callout>
-            <hw>
-                <hwid>PCI_REF_CLOCK</hwid>
-                <refTarget>UNIT_TEST_CHIP_TARGET</refTarget>
-            </hw>
-            <priority>MEDIUM</priority>
-        </callout>
-        <callout>
-             <hw>
-                <hwid>PNOR_PART</hwid>
-                <refTarget>UNIT_TEST_CHIP_TARGET</refTarget>
-            </hw>
-            <priority>MEDIUM</priority>
-        </callout>
--->
- </hwpError>
-
- <hwpError>
-    <rc>RC_TEST_DIMM_CALLOUT_MBA_A</rc>
-    <description>DIMM Callout generated by Unit Test, passing in
-                 MBA target and port number.</description>
-    <!-- Callout ALL dimms on specified MBA port with MEDIUM priority-->
-        <callout>
-            <childTargets>
-                <parent>UNIT_TEST_MBA_TARGET</parent>
-                <childType>TARGET_TYPE_DIMM</childType>
-                <childPort>UNIT_TEST_MBA_PORT_NUMBER</childPort>
-            </childTargets>
-            <priority>MEDIUM</priority>
-        </callout>
- </hwpError>
- <!-- Callout a specific DIMM  on a specified PORT of MBA  -->
- <hwpError>
-    <rc>RC_TEST_DIMM_CALLOUT_MBA_B</rc>
-    <description>DIMM Callout generated by Unit Test, passing in
-                 MBA target,port number and specific DIMM number.</description>
-        <callout>
-            <childTargets>
-                <parent>UNIT_TEST_MBA_TARGET</parent>
-                <childType>TARGET_TYPE_DIMM</childType>
-                <childPort>UNIT_TEST_MBA_PORT_NUMBER</childPort>
-                <childNumber>UNIT_TEST_DIMM_NUMBER</childNumber>
-            </childTargets>
-            <priority>LOW</priority>
-        </callout>
-    </hwpError>
- <!-- Callout all dimms on all ports of a specfied MBA  -->
- <hwpError>
-    <rc>RC_TEST_DIMM_CALLOUT_MBA_C</rc>
-    <description>DIMM Callout generated by Unit Test, passing in
-                 only MBA target to callout all dimms under it.</description>
-        <callout>
-            <childTargets>
-                <parent>UNIT_TEST_MBA_TARGET</parent>
-                <childType>TARGET_TYPE_DIMM</childType>
-            </childTargets>
-            <priority>HIGH</priority>
-        </callout>
- </hwpError>
- <!-- Deconfigure ALL dimms on specified MBA port with MEDIUM priority-->
- <hwpError>
-     <rc>RC_TEST_DIMM_DECONFIGURE_MBA_A</rc>
- <description>DIMM DECONFIGURE generated by Unit Test, passing in
-              MBA target and port number.</description>
- <!-- Commented out to avoid actually calling out chiplets in UT
-     <deconfigure>
-         <childTargets>
-             <parent>UNIT_TEST_MBA_TARGET</parent>
-             <childType>TARGET_TYPE_DIMM</childType>
-             <childPort>UNIT_TEST_MBA_PORT_NUMBER</childPort>
-         </childTargets>
-         <priority>MEDIUM</priority>
-     </deconfigure>
- -->
- </hwpError>
- <!-- Gard a specific DIMM  on a specified PORT of MBA -->
- <hwpError>
-    <rc>RC_TEST_DIMM_GARD_MBA_B</rc>
-    <description>DIMM Callout generated by Unit Test, passing in
-        MBA target,port number and specific DIMM number.</description>
-    <!--
-        <gard>
-            <childTargets>
-                <parent>UNIT_TEST_MBA_TARGET</parent>
-                <childType>TARGET_TYPE_DIMM</childType>
-                <childPort>UNIT_TEST_MBA_PORT_NUMBER</childPort>
-                <childNumber>UNIT_TEST_DIMM_NUMBER</childNumber>
-            </childTargets>
-            <priority>LOW</priority>
-        </gard>
-        -->
-    </hwpError>
-    -->
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_TEST_ERROR_B</rc>
-    <description>HWP Error B used to add FFDC to an existing ReturnCode</description>
-    <ffdc>UNIT_TEST_FFDC_DATA</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_TEST_CONFIG_NO_MCS_CHIPLETS</rc>
-    <description>HWP Config Unit Test found no MCS chiplets</description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_TEST_CONFIG_PARENT_CHIP_MISMATCH</rc>
-    <description>HWP Config Unit Test found a parent chip mismatch</description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_TEST_DQ_NO_ERR_ON_BAD_PARAMS</rc>
-    <description>HWP DQ Unit Test did not get an expected error</description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_TEST_DQ_BAD_DATA</rc>
-    <description>HWP DQ Unit Test got bad data</description>
-    <ffdc>FFDC_DATA1</ffdc>
-    <ffdc>FFDC_DATA2</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_INITFILE_INCORRECT_VER</rc>
-    <description>InitFile has incorrect version</description>
-    <!-- Collect local FFDC FFDC_IF_VER -->
-    <ffdc>FFDC_IF_VER</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_INITFILE_ATTR_ID_OUT_OF_RANGE</rc>
-    <description>InitFile's attribute id is out of range </description>
-    <!-- Collect local FFDC FFDC_IF_ATTR_ID_OUT_OF_RANGE -->
-    <ffdc>FFDC_IF_ATTR_ID_OUT_OF_RANGE</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_INITFILE_LIT_ID_OUT_OF_RANGE</rc>
-    <description>InitFile's literal id is out of range </description>
-    <!-- Collect local FFDC FFDC_IF_LIT_ID_OUT_OF_RANGE -->
-    <ffdc>FFDC_IF_LIT_ID_OUT_OF_RANGE</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_INITFILE_TGT_NUM_OUT_OF_RANGE</rc>
-    <description>InitFile's target number is out of range </description>
-    <!-- Collect local FFDC -->
-    <ffdc>FFDC_IF_TGT_NUM</ffdc>
-    <ffdc>FFDC_IF_NUM_TGTS_PASSED_IN</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_HWP_EXEC_INITFILE_TEST_FAILED</rc>
-    <description>HWP Exec InitFile test case failed </description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_HWP_EXEC_INITFILE_TEST_INCORRECT_NUM_MBAS_FOUND</rc>
-    <description>HWP Exec InitFile test incorrect number of MBA chiplets found</description>
-    <!-- Collect local FFDC -->
-        <ffdc>FFDC_IF_TEST_NUM_MBAS_FOUND</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_HWP_EXEC_INITFILE_TEST_NO_MEMBUF_FOUND</rc>
-    <description>HWP Exec Initfile test no MEMBUF chips found</description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_HWP_ATTR_UNIT_TEST_FAIL</rc>
-    <description>HWP Attribute Unit Test failed</description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_TEST_WRONG_MCS_RETURNED</rc>
-    <description>HWP Config Unit Test returned wrong MCS for memory buffer</description>
-  </hwpError>
-  <!-- ************************************************************ -->
-  <hwpError>
-    <rc>RC_INITFILE_EXECUTION_ERROR</rc>
-    <description>
-        The initFile has encountered an unusual error and dumped
-        error information.
-        See the FFDC and trace for diagnostic information.
-     </description>
-    <!-- Collect local FFDC -->
-    <ffdc>FFDC_SCOM_ADDRID</ffdc>
-    <ffdc>FFDC_SCOM_OFFSET</ffdc>
-    <ffdc>FFDC_SCOM_LEN</ffdc>
-    <ffdc>FFDC_COLUMN</ffdc>
-    <ffdc>FFDC_ROW</ffdc>
-  </hwpError>
-  <!-- ************************************************************ -->
-  <hwpError>
-    <rc>RC_TEST_COLLECT_TRACE</rc>
-    <description>Test adding firmware traces</description>
-    <ffdc>FFDC_VALUE</ffdc>
-    <collectTrace>FSI</collectTrace>
-    <collectTrace>SCOM</collectTrace>
-    <collectTrace>SCAN</collectTrace>
-    <collectTrace>MBOX</collectTrace>
-  </hwpError>
-  <!-- ************************************************************ -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/freq_attributes.xml b/src/usr/hwpf/hwp/freq_attributes.xml
deleted file mode 100644
index 2e5118be4..000000000
--- a/src/usr/hwpf/hwp/freq_attributes.xml
+++ /dev/null
@@ -1,142 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/freq_attributes.xml $                        -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: freq_attributes.xml,v 1.8 2013/10/16 20:42:30 jmcgill Exp $ -->
-<!--
-    XML file specifying HWPF attributes.
-    These are frequency attributes.
--->
-
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FREQ_PROC_REFCLOCK</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      The frequency of the processor refclock in MHz.
-      Provided by the Machine Readable Workbook.
-      This is read by the set_ref_clock HWP to find out the desired frequency.
-      This can be overridden to adjust the refclock frequency.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FREQ_PROC_REFCLOCK_KHZ</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      The frequency of the processor refclock in kHz.
-      Provided by the Machine Readable Workbook.
-      This is read by the procedures needing kHz precision of the refclock value set
-      into ATTR_FREQ_PROC_REFCLOCK.
-      This can be overridden to adjust the refclock frequency.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FREQ_MEM_REFCLOCK</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      The frequency of the memory refclock in MHz.
-      Provided by the Machine Readable Workbook.
-      This is read by the set_ref_clock HWP to find out the desired frequency.
-      This can be overridden to adjust the refclock frequency.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FREQ_CORE_FLOOR</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      The lowest frequency that a core can be set to in MHz.
-      This is the same for all cores in the system.
-      Provided by the Machine Readable Workbook.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FREQ_CORE_NOMINAL</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      The nominal core frequency in MHz.
-      This is the same for all cores in the system.
-      Provided by the Machine Readable Workbook.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FREQ_PB</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      The frequency of a processor's PB chiplet in MHz.
-      This is the same for all PB chiplets in the system.
-      Provided by the MRW.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FREQ_A</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      The frequency of a processor's A-bus chiplet in MHz.
-      This is the same for all A-bus chiplets in the system.
-      Provided by the MRW.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FREQ_X</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      The frequency of a processor's X-bus chiplet in MHz.
-      This is the same for all X-bus chiplets in the system.
-      Provided by the MRW.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FREQ_PCIE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      The frequency of a processor's PCI-e bus in MHz.
-      This is the same for all PCI-e busses in the system.
-      Provided by the MRW.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-</attributes>
diff --git a/src/usr/hwpf/hwp/include/cen_scom_addresses.H b/src/usr/hwpf/hwp/include/cen_scom_addresses.H
deleted file mode 100755
index f9229dfd7..000000000
--- a/src/usr/hwpf/hwp/include/cen_scom_addresses.H
+++ /dev/null
@@ -1,2147 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/include/cen_scom_addresses.H $               */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: cen_scom_addresses.H,v 1.72 2015/06/03 14:04:20 sglancy Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/cen_scom_addresses.H,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! TITLE       : cen_scom_addresses.H
-// *! DESCRIPTION : Defines for Centaur chip scom addresses
-// *! OWNER NAME  : Mark Fredrickson  Email: mfred@us.ibm.com
-// *! BACKUP NAME :                   Email:      @us.ibm.com
-// #! ADDITIONAL COMMENTS :
-//
-// The purpose of this header is to define scom addresses for use by procedures.
-// This will help catch address typos at compile time, and will make it easy
-// to track down which procedures use each address
-//
-//------------------------------------------------------------------------------
-// Don't forget to create CVS comments when you check in your changes!
-//------------------------------------------------------------------------------
-// CHANGE HISTORY:
-//------------------------------------------------------------------------------
-// Version:|  Author: |  Date:  | Comment:
-//---------|----------|---------|-----------------------------------------------
-//  1.72   | sglancy  |03-JUN-15| Updated to include DQS_OFFSET registers - needed for DDR4 training
-//  1.71   | gollub   |12-FEB-15| Added MBACALFIR_OR, MBACALFIR_AND
-//         |          |         | Added MBA_DSM0
-//         |          |         | Added MBA_FARB0
-//  1.69   | gollub   |07-APR-14| Added MBSCFGQ so we can enable/disable exit point 1
-//  1.64   | jdsloat  |28-MAR-14| ADDED MEM SCOM CCS MODEQ, STATQ, and CAL FIR addresses.
-//  1.63   | mwuu     |18-Jun-13| Fixed naming of IO_FET_SLICE_EN_MAP1_P0_ADR0:3
-//  1.62   | mwuu     |18-Jun-13| Fixed naming of IO_FET_SLICE_EN_MAP1_P0_ADR0_3
-//         |          |         | _0x80007C210301143F and for port 1 as well
-//  1.61   | lapietra |10-Jun-13| Added DP18 Cfg 5 Regs
-//  1.60   | dcadiga  |10-Jun-13| Added DP18 Read Diagnostic Configuration 5
-//  1.59   | mwuu     |07-Jun-13| Added PHY N/PFET SLICE broadcast regs,
-//         |          |         | renamed DATA_BIT_ENABLE1 regs to match address,
-//         |          |         | added DATA_BIT_DIR0, and ADR_BIT_ENABLE regs,
-//         |          |         | added ADR_OUTPUT_DRIVER_FORCE_VALUE regs,
-//         |          |         | added ADR_OUTPUT_FORCE_ATEST_CNTL regs,
-//         |          |         | added ADR_IO_FET_SLICE_EN_MAP regs,
-//         |          |         | for ADR/DP18 flush workaround.
-//  1.58   | bellows  |28-May-13| Added PHY power down regs
-//  1.57   | jdsloat  |15-May-13| Added WC_CONFIG1 and WC_CONFIG2 regs
-//  1.56   | jdsloat  |11-Apr-13| Added DQS Gate Delay Values
-//  1.55   | jdsloat  |04-Apr-13| Added DPHY01_DDRPHY_WC_CONFIG3 regs
-//  1.54   | jdsloat  |03-Apr-13| Fixed MR Sec shadow regs
-//  1.53   | jdsloat  |08-Mar-13| Added MBA01_MBARPC0Q_0x03010434
-//  1.52   | jdsloat  |27-Feb-13| Fixed additional typos in READ TIMING REF
-//  1.51   | sglancy  |27-Feb-13| Fixed typos in READ TIMING REF
-//  1.50   | jdsloat  |27-Feb-13| Added READ TIMING REFERENCE REGS
-//  1.49   | jdsloat  |23-Jan-13| Added PC_RANK_GROUP and PC_RANK_GROUP_EXT
-//  1.48   | jdsloat  |09-Jan-13| Fixed typos.  Excuse me.
-//  1.47   | jdsloat  |09-Jan-13| Added DQS READ Phase select regs for RP 1-3
-//  1.46   | gollub   |19-Dec-12| Added:
-//         |          |         | MCBERRPTQ
-//         |          |         | MBA_MAINT_BUFF
-//         |          |         | MBA_MAINT_BUFF_65TH_BYTE_64B_ECC
-//         |          |         | MBA_ERR_REPORTQ
-//         |          |         | MBSECCERR
-//         |          |         | MBMMRQ
-//         |          |         | MBS_MAINT_BUFF0_DATA
-//         |          |         | MBS_MAINT_BUFF0_DATA_ECC
-//         |          |         | MBSEC
-//         |          |         | MBSSYMEC
-//         |          |         | MBSEVRQ
-//         |          |         | MBNCERQ
-//         |          |         | MBRCERQ
-//         |          |         | MBMPERQ
-//         |          |         | MBUERQ
-//  1.44   | sglancy  |19-Nov-12| added ECID addresses
-//  1.42   | pardeik  |09-Nov-12| add N/M throttle register in (again)
-//  1.41   | gollub   |26-Oct-12| Added MBECCFIR AND/OR MASK registers
-//         |          |         | Added MBSPA AND/OR MASK registers
-//  1.38   | pardeik  |31-Oct-12| Added N/M Throttling Control Register
-//  1.37   | aditya   |26-Oct-12| Added MCBIST Random Data Seed Registers
-//  1.36   | menlowuu |25-Oct-12| Added PHY port 1 disable bit registers
-//  1.35   | menlowuu |25-Oct-12| Added PHY disable bit registers
-//  1.34   | aditya   |12-Oct-12| Added MCBIST and DPHY registers
-//  1.33   | baysah   |11-Oct-12| Added MBI FIR mask and action registers
-//  1.32   | menlowuu |11-Oct-12| Added PHY slew calibration registers
-//  1.31   | bellows  |10-Oct-12| Per Joab Request, remove duplicate trace_data reg
-//  1.30   | menlowuu |09-Oct-12| Added PHY slew registers
-//  1.29   | sglancy  |28-Sep-12| Added registers for loopback
-//  1.28   | jdsloat  |10-Sep-12| Fixed MBA CAL Names
-//  1.27   | gollub   |07-Sep-12| Fixed address for MBA01_MBA_WRD_MODE
-//         |          |         | Added Maint Read Buffers 65th Byte
-//  1.26   | jdsloat  |06-Sep-12| Added MBA CAL Registers
-//  1.25   | gollub   |31-Aug-12| Added MBACALFIR Registers
-//         |          |         | Added MBSFIR Registers
-//         |          |         | Added MBAFIR Registers
-//         |          |         | Added MBSPA Registers
-//         |          |         | Added MBECCFIR Registers
-//         |          |         | Added SCAC Registers
-//  1.24   | jdsloat  |20-Aug-12| Added Primary Rank Pair MRS Shadow Regs
-//  1.23   | gollub   |27-Jul-12| Added MBS FIR Registers
-//         |          |         | Added DDRPHY FIR Registers
-//         |          |         | Added MBA_RRQ Register
-//  1.22   | jmcgill  |17-Jun-12| Added trace related SCOM addresses
-//  1.21   | gollub   |23-May-12| Added regs needed for mss_maint_cmds
-//  1.20   | jdsloat  |17-May-12| Added MBA/MBS level PM, REF register addresses
-//  1.19   | gollub   |25-Apr-12| Added MBS ECC regs
-//  1.15   | divyakum |06-Mar-12| Added calibration status regs
-//  1.14   | divyakum |22-Feb-12| Added CALIBRATION registers.
-//         |          |         | Added Change history table
-//  1.13   | mfred    |24-Jan-12| Moved common multicast address constants to common_scom_accresses.H
-//  1.12   | mfred    |24-Jan-12| Move multicast group 1 to group 3 for consistency with P8
-//  1.11   | jmcgill  |06-Jan-12| move shared/common addresses to common_scom_addresses.H, general cleanup
-//  1.10   | mfred    |26-Oct-12| Fix error.  Extra space in an address was causing compile failure.
-//  1.9    | mfred    |25-Oct-12| Added MEM chiplet indirect scom addresses (DPHY registers).
-//  1.8    | venton   |20-Sep-12| Add missing SCOMs from P8
-//  1.7    | mfred    |02-Aug-12| added some 8-bit constants for use with P0 and P1
-//  1.6    | mfred    |28-Aug-12| Added more multicast addresses.
-//  1.5    | mfred    |27-Jul-12| Added multicast addresses for OPCG, etc.
-//  1.3    | gweber   |25-Jul-12| moved centaur constants from p8_scom_addresses.H
-//  1.2    | mfred    |13-Jul-12| Get rid of some temp lines and comments.
-//  1.1    | mfred    |07-Jul-12| Adding first version of scom address file.  Was created from P8 version.
-
-
-#ifndef CEN_SCOM_ADDRESSES
-#define CEN_SCOM_ADDRESSES
-
-//----------------------------------------------------------------------
-//  Scom address overview
-//----------------------------------------------------------------------
-// Centaur uses 64-bit scom addresses, which are classified into two formats:
-//
-// "Normal" (legacy) format
-//
-//            111111 11112222 22222233 33333333 44444444 44555555 55556666
-// 01234567 89012345 67890123 45678901 23456789 01234567 89012345 67890123
-// -------- -------- -------- -------- -------- -------- -------- --------
-// 00000000 00000000 00000000 00000000 0MCCCCCC ????PPPP 00LLLLLL LLLLLLLL
-//                                      ||          |    |
-//                                      ||          |    `-> Local Address*
-//                                      ||          |
-//                                      ||          `-> Port
-//                                      ||
-//                                      |`-> Chiplet ID**
-//                                      |
-//                                      `-> Multicast bit
-//
-//  * Local address is composed of "00" + 4-bit ring + 10-bit ID
-//    The 10-bit ID is usually 4-bit sat_id and 6-bit reg_id
-//
-// ** Chiplet ID turns into multicast operation type and group number
-//    if the multicast bit is set
-//
-// "Indirect" format
-//
-//
-//            111111 11112222 22222233 33333333 44444444 44555555 55556666
-// 01234567 89012345 67890123 45678901 23456789 01234567 89012345 67890123
-// -------- -------- -------- -------- -------- -------- -------- --------
-// 10000000 0000IIII IIIIIGGG GGGLLLLL 0MCCCCCC ????PPPP 00LLLLLL LLLLLLLL
-//              |         |      |      ||          |    |
-//              |         |      |      ||          |    `-> Local Address*
-//              |         |      |      ||          |
-//              |         |      |      ||          `-> Port
-//              |         |      |      ||
-//              |         |      |      |`-> Chiplet ID**
-//              |         |      |      |
-//              |         |      |      `-> Multicast bit
-//              |         |      |
-//              |         |      `-> Lane ID
-//              |         |
-//              |         `-> RX or TX Group ID
-//              |
-//              `-> Indirect Register Address
-//
-//  * Local address is composed of "00" + 4-bit ring + 4-bit sat_id + "111111"
-//
-// ** Chiplet ID turns into multicast operation type and group number
-//    if the multicast bit is set
-//
-
-#include "common_scom_addresses.H"
-#include "fapi_sbe_common.H"
-
-
-/******************************************************************************/
-/************************************  ECID  **********************************/
-/******************************************************************************/
-CONST_UINT64_T( ECID_PART_0_0x00010000                , ULL(0x00010000) );
-CONST_UINT64_T( ECID_PART_1_0x00010001                , ULL(0x00010001) );
-
-/******************************************************************************/
-/**********************************  CHIPLET  *********************************/
-/******************************************************************************/
-//      use for lpcs P0, <chipletID>
-CONST_UINT64_T( MEM_CHIPLET_0x03000000                , ULL(0x03000000) );
-
-
-/******************************************************************************/
-/********************************  TP CHIPLET  ********************************/
-/******************************************************************************/
-
-//------------------------------------------------------------------------------
-//      CENTAUR REPAIR LOADER REGISTERS
-//------------------------------------------------------------------------------
-CONST_UINT64_T( CEN_WRITE_ARRAY_REPAIR_REG_0x00050000,     ULL(0x00050000) );
-CONST_UINT64_T( CEN_REPAIR_FRONTEND_REG_0x00050001,        ULL(0x00050001) );
-CONST_UINT64_T( CEN_WRITE_ARRAY_REPAIR_CMD_0x00050002,     ULL(0x00050002) );
-CONST_UINT64_T( CEN_READ_ARRAY_REPAIR_STATUS_0x00050003,   ULL(0x00050003) );
-CONST_UINT64_T( CEN_READ_ECC_TRAP_REGISTER_0x00050004,     ULL(0x00050004) );
-CONST_UINT64_T( CEN_REPAIR_CONFIG_REG_0x00050005,          ULL(0x00050005) );
-
-CONST_UINT64_T( TP_TRACE_DATA_HI_0x01010440            , ULL(0x01010440) );
-CONST_UINT64_T( TP_TRACE_DATA_LO_0x01010441            , ULL(0x01010441) );
-
-/******************************************************************************/
-/*******************************  NEST CHIPLET  *******************************/
-/******************************************************************************/
-
-//------------------------------------------------------------------------------
-//      MBU
-//------------------------------------------------------------------------------
-// MBI
-CONST_UINT64_T( MBI_FIR_0x02010800                     , ULL(0x02010800) );
-CONST_UINT64_T( MBI_FIR_AND_0x02010801                 , ULL(0x02010801) );
-CONST_UINT64_T( MBI_FIRMASK_0x02010803                 , ULL(0x02010803) );
-CONST_UINT64_T( MBI_FIRACT0_0x02010806                 , ULL(0x02010806) );
-CONST_UINT64_T( MBI_FIRACT1_0x02010807                 , ULL(0x02010807) );
-CONST_UINT64_T( MBI_CFG_0x0201080A                     , ULL(0x0201080A) );
-CONST_UINT64_T( MBI_STAT_0x0201080B                    , ULL(0x0201080B) );
-CONST_UINT64_T( MBI_CRCSYN_0x0201080C                  , ULL(0x0201080C) );
-
-CONST_UINT64_T( NEST_TRACE_DATA_HI_MBI_0x02010C40      , ULL(0x02010C40) );
-CONST_UINT64_T( NEST_TRACE_DATA_LO_MBI_0x02010C41	   , ULL(0x02010C41) );
-// MBS
-CONST_UINT64_T( MBSSQ_0x02011417                       , ULL(0x02011417) );
-
-CONST_UINT64_T( NEST_TRACE_DATA_HI_MBS1_0x02011880	   , ULL(0x02011880) );
-CONST_UINT64_T( NEST_TRACE_DATA_LO_MBS1_0x02011881	   , ULL(0x02011881) );
-CONST_UINT64_T( NEST_TRACE_DATA_HI_MBS2_0x020118C0	   , ULL(0x020118C0) );
-CONST_UINT64_T( NEST_TRACE_DATA_LO_MBS2_0x020118C1     , ULL(0x020118C1) );
-
-// MBA
-CONST_UINT64_T( MBA01_REF0Q_0x03010432                 , ULL(0x03010432) );
-CONST_UINT64_T( MBA01_PM0Q_0x03010434                  , ULL(0x03010434) );
-
-/******************************************************************************/
-/******************************  MEM CHIPLET  *********************************/
-/******************************************************************************/
-
-//------------------------------------------------------------------------------
-//      MEM GPIO
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MEM_GP0_0x03000000                     , ULL(0x03000000) );
-CONST_UINT64_T( MEM_GP1_0x03000001                     , ULL(0x03000001) );
-CONST_UINT64_T( MEM_GP2_0x03000002                     , ULL(0x03000002) );
-CONST_UINT64_T( MEM_GP4_0x03000003                     , ULL(0x03000003) );
-CONST_UINT64_T( MEM_GP0_AND_0x03000004                 , ULL(0x03000004) );
-CONST_UINT64_T( MEM_GP0_OR_0x03000005                  , ULL(0x03000005) );
-CONST_UINT64_T( MEM_GP4_AND_0x03000006                 , ULL(0x03000006) );
-CONST_UINT64_T( MEM_GP4_OR_0x03000007                  , ULL(0x03000007) );
-
-//------------------------------------------------------------------------------
-//      MEM SCOM
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MEM_SCOM_0x03010000                    , ULL(0x03010000) );
-
-CONST_UINT64_T( MEM_MBA01_CCS_MODEQ_0x030106A7         , ULL(0x030106A7) );
-CONST_UINT64_T( MEM_MBA23_CCS_MODEQ_0x03010EA7         , ULL(0x03010EA7) );
-
-CONST_UINT64_T( MEM_MBA01_STATQ_0x030106A6             , ULL(0x030106A6) );
-CONST_UINT64_T( MEM_MBA23_STATQ_0x03010EA6             , ULL(0x03010EA6) );
-
-CONST_UINT64_T( MEM_MBA01_CCS_CNTLQ_0x030106A5         , ULL(0x030106A5) );
-CONST_UINT64_T( MEM_MBA23_CCS_CNTLQ_0x03010EA5         , ULL(0x03010EA5) );
-
-CONST_UINT64_T( MEM_MBA01_CALFIR_0x03010402            , ULL(0x03010402) );
-CONST_UINT64_T( MEM_MBA23_CALFIR_0x03010C00            , ULL(0x03010C00) );
-
-//------------------------------------------------------------------------------
-//      MEM TRACE
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MEM_TRACE_STATUS_0x03010004            , ULL(0x03010004) );
-CONST_UINT64_T( MEM_TRACE_DATA_HI_MBA01_0x03010880     , ULL(0x03010880) );
-CONST_UINT64_T( MEM_TRACE_DATA_LO_MBA01_0x03010881     , ULL(0x03010881) );
-CONST_UINT64_T( MEM_TRACE_DATA_HI_MBA23_0x030110C0     , ULL(0x030110C0) );
-CONST_UINT64_T( MEM_TRACE_DATA_LO_MBA23_0x030110C1     , ULL(0x030110C1) );
-
-//------------------------------------------------------------------------------
-//      MEM CLOCK CONTROL
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MEM_OPCG_CNTL0_0x03030002              , ULL(0x03030002) );
-CONST_UINT64_T( MEM_OPCG_CNTL1_0x03030003              , ULL(0x03030003) );
-CONST_UINT64_T( MEM_OPCG_CNTL2_0x03030004              , ULL(0x03030004) );
-CONST_UINT64_T( MEM_OPCG_CNTL3_0x03030005              , ULL(0x03030005) );
-CONST_UINT64_T( MEM_CLK_REGION_0x03030006              , ULL(0x03030006) );
-CONST_UINT64_T( MEM_CLK_SCANSEL_0x03030007             , ULL(0x03030007) );
-CONST_UINT64_T( MEM_CLK_STATUS_0x03030008              , ULL(0x03030008) );
-
-//------------------------------------------------------------------------------
-//      MEM FIR
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MEM_XSTOP_0x03040000                   , ULL(0x03040000) );
-CONST_UINT64_T( MEM_RECOV_0x03040001                   , ULL(0x03040001) );
-CONST_UINT64_T( MEM_FIR_MASK_0x03040002                , ULL(0x03040002) );
-CONST_UINT64_T( MEM_SPATTN_0x03040004                  , ULL(0x03040004) );
-CONST_UINT64_T( MEM_SPATTN_AND_0x03040005              , ULL(0x03040005) );
-CONST_UINT64_T( MEM_SPATTN_OR_0x03040006               , ULL(0x03040006) );
-CONST_UINT64_T( MEM_SPATTN_MASK_0x03040007             , ULL(0x03040007) );
-CONST_UINT64_T( MEM_FIR_MODE_0x03040008                , ULL(0x03040008) );
-CONST_UINT64_T( MEM_PERV_LFIR_0x0304000A               , ULL(0x0304000A) );
-CONST_UINT64_T( MEM_PERV_LFIR_AND_0x0304000B           , ULL(0x0304000B) );
-CONST_UINT64_T( MEM_PERV_LFIR_OR_0x0304000C            , ULL(0x0304000C) );
-CONST_UINT64_T( MEM_PERV_LFIR_MASK_0x0304000D          , ULL(0x0304000D) );
-CONST_UINT64_T( MEM_PERV_LFIR_MASK_AND_0x0304000E      , ULL(0x0304000E) );
-CONST_UINT64_T( MEM_PERV_LFIR_MASK_OR_0x0304000F       , ULL(0x0304000F) );
-CONST_UINT64_T( MEM_PERV_LFIR_ACT0_0x03040010          , ULL(0x03040010) );
-CONST_UINT64_T( MEM_PERV_LFIR_ACT1_0x03040011          , ULL(0x03040011) );
-
-//------------------------------------------------------------------------------
-//      MEM THERMAL
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MEM_THERM_0x03050000                   , ULL(0x03050000) );
-
-//------------------------------------------------------------------------------
-//      MEM PCB SLAVE
-//------------------------------------------------------------------------------
-//Multicast Group Registers
-CONST_UINT64_T( MEM_MCGR1_0x030F0001                   , ULL(0x030F0001) );
-CONST_UINT64_T( MEM_MCGR2_0x030F0002                   , ULL(0x030F0002) );
-CONST_UINT64_T( MEM_MCGR3_0x030F0003                   , ULL(0x030F0003) );
-CONST_UINT64_T( MEM_MCGR4_0x030F0004                   , ULL(0x030F0004) );
-//GP3 Register
-CONST_UINT64_T( MEM_GP3_0x030F0012                     , ULL(0x030F0012) );
-CONST_UINT64_T( MEM_GP3_AND_0x030F0013                 , ULL(0x030F0013) );
-CONST_UINT64_T( MEM_GP3_OR_0x030F0014                  , ULL(0x030F0014) );
-
-//------------------------------------------------------------------------------
-//      MEM CHIPLET INDIRECT SCOM ADDRESSES (DPHY REGISTERS)
-//------------------------------------------------------------------------------
-// Note - on March 30,2012, at the request of the GFW team, I removed all the DPHY23 addresses that were listed below.
-// These adddresses should not be needed because the procedures are written using DPHY01 as the target and
-// the platform translates the address for DPHY23.
-// If you should need these dphy23 address for some reason, I have saved a copy of them here:
-//  /afs/rchland.ibm.com/usr5/mfred/vbu_files/cen_scom_addresses.H.dphy23               Mark Fredrickson
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_P0_0_0x800000070301143F,                ULL(0x800000070301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_P1_0_0x800100070301143F,                ULL(0x800100070301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG0_P0_0_0x800000760301143F,              ULL(0x800000760301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG0_P1_0_0x800100760301143F,              ULL(0x800100760301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG1_P0_0_0x800000770301143F,              ULL(0x800000770301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG1_P1_0_0x800100770301143F,              ULL(0x800100770301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_P0_1_0x800004070301143F,                ULL(0x800004070301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_P1_1_0x800104070301143F,                ULL(0x800104070301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG0_P0_1_0x800004760301143F,              ULL(0x800004760301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG0_P1_1_0x800104760301143F,              ULL(0x800104760301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG1_P0_1_0x800004770301143F,              ULL(0x800004770301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG1_P1_1_0x800104770301143F,              ULL(0x800104770301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_P0_2_0x800008070301143F,                ULL(0x800008070301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_P1_2_0x800108070301143F,                ULL(0x800108070301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG0_P0_2_0x800008760301143F,              ULL(0x800008760301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG0_P1_2_0x800108760301143F,              ULL(0x800108760301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG1_P0_2_0x800008770301143F,              ULL(0x800008770301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG1_P1_2_0x800108770301143F,              ULL(0x800108770301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_P0_3_0x80000C070301143F,                ULL(0x80000C070301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_P1_3_0x80010C070301143F,                ULL(0x80010C070301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG0_P0_3_0x80000C760301143F,              ULL(0x80000C760301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG0_P1_3_0x80010C760301143F,              ULL(0x80010C760301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG1_P0_3_0x80000C770301143F,              ULL(0x80000C770301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG1_P1_3_0x80010C770301143F,              ULL(0x80010C770301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_P0_4_0x800010070301143F,                ULL(0x800010070301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_P1_4_0x800110070301143F,                ULL(0x800110070301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG0_P0_4_0x800010760301143F,              ULL(0x800010760301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG0_P1_4_0x800110760301143F,              ULL(0x800110760301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG1_P0_4_0x800010770301143F,              ULL(0x800010770301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_PLL_CONFIG1_P1_4_0x800110770301143F,              ULL(0x800110770301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S0_0x800080300301143F,   ULL(0x800080300301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S0_0x800180300301143F,   ULL(0x800180300301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S0_0x800080310301143F,   ULL(0x800080310301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S0_0x800180310301143F,   ULL(0x800180310301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S0_0x800080320301143F,      ULL(0x800080320301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S0_0x800180320301143F,      ULL(0x800180320301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S1_0x800084300301143F,   ULL(0x800084300301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S1_0x800184300301143F,   ULL(0x800184300301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S1_0x800084310301143F,   ULL(0x800084310301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S1_0x800184310301143F,   ULL(0x800184310301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S1_0x800084320301143F,      ULL(0x800084320301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S1_0x800184320301143F,      ULL(0x800184320301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P0_0x8000C0000301143F,         ULL(0x8000C0000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P1_0x8001C0000301143F,         ULL(0x8001C0000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P0_0x8000C0010301143F,        ULL(0x8000C0010301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P1_0x8001C0010301143F,        ULL(0x8001C0010301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_CONFIG0_P0_0x8000C00C0301143F,                      ULL(0x8000C00C0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_CONFIG0_P1_0x8001C00C0301143F,                      ULL(0x8001C00C0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_RESETS_P0_0x8000C00E0301143F,                       ULL(0x8000C00E0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_RESETS_P1_0x8001C00E0301143F,                       ULL(0x8001C00E0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_0x8000C0140301143F,           ULL(0x8000C0140301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_IO_PVT_FET_CONTROL_P1_0x8001C0140301143F,           ULL(0x8001C0140301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_IO_PVT_FET_STATUS_P0_0x8000C01B0301143F,            ULL(0x8000C01B0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_IO_PVT_FET_STATUS_P1_0x8001C01B0301143F,            ULL(0x8001C01B0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR0_PRI_RP0_P0_0x8000C01C0301143F,                  ULL(0x8000C01C0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR1_PRI_RP0_P0_0x8000C01D0301143F,                  ULL(0x8000C01D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR2_PRI_RP0_P0_0x8000C01E0301143F,                  ULL(0x8000C01E0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR3_PRI_RP0_P0_0x8000C01F0301143F,                  ULL(0x8000C01F0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR0_PRI_RP1_P0_0x8000C11C0301143F,                  ULL(0x8000C11C0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR1_PRI_RP1_P0_0x8000C11D0301143F,                  ULL(0x8000C11D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR2_PRI_RP1_P0_0x8000C11E0301143F,                  ULL(0x8000C11E0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR3_PRI_RP1_P0_0x8000C11F0301143F,                  ULL(0x8000C11F0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR0_PRI_RP2_P0_0x8000C21C0301143F,                  ULL(0x8000C21C0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR1_PRI_RP2_P0_0x8000C21D0301143F,                  ULL(0x8000C21D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR2_PRI_RP2_P0_0x8000C21E0301143F,                  ULL(0x8000C21E0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR3_PRI_RP2_P0_0x8000C21F0301143F,                  ULL(0x8000C21F0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR0_PRI_RP3_P0_0x8000C31C0301143F,                  ULL(0x8000C31C0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR1_PRI_RP3_P0_0x8000C31D0301143F,                  ULL(0x8000C31D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR2_PRI_RP3_P0_0x8000C31E0301143F,                  ULL(0x8000C31E0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR3_PRI_RP3_P0_0x8000C31F0301143F,                  ULL(0x8000C31F0301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR0_SEC_RP0_P0_0x8000C0200301143F,                  ULL(0x8000C0200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR1_SEC_RP0_P0_0x8000C0210301143F,                  ULL(0x8000C0210301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR2_SEC_RP0_P0_0x8000C0220301143F,                  ULL(0x8000C0220301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR3_SEC_RP0_P0_0x8000C0230301143F,                  ULL(0x8000C0230301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR0_SEC_RP1_P0_0x8000C1200301143F,                  ULL(0x8000C1200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR1_SEC_RP1_P0_0x8000C1210301143F,                  ULL(0x8000C1210301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR2_SEC_RP1_P0_0x8000C1220301143F,                  ULL(0x8000C1220301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR3_SEC_RP1_P0_0x8000C1230301143F,                  ULL(0x8000C1230301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR0_SEC_RP2_P0_0x8000C2200301143F,                  ULL(0x8000C2200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR1_SEC_RP2_P0_0x8000C2210301143F,                  ULL(0x8000C2210301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR2_SEC_RP2_P0_0x8000C2220301143F,                  ULL(0x8000C2220301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR3_SEC_RP2_P0_0x8000C2230301143F,                  ULL(0x8000C2230301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR0_SEC_RP3_P0_0x8000C3200301143F,                  ULL(0x8000C3200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR1_SEC_RP3_P0_0x8000C3210301143F,                  ULL(0x8000C3210301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR2_SEC_RP3_P0_0x8000C3220301143F,                  ULL(0x8000C3220301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR3_SEC_RP3_P0_0x8000C3230301143F,                  ULL(0x8000C3230301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR0_PRI_RP0_P1_0x8001C01C0301143F,                  ULL(0x8001C01C0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR1_PRI_RP0_P1_0x8001C01D0301143F,                  ULL(0x8001C01D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR2_PRI_RP0_P1_0x8001C01E0301143F,                  ULL(0x8001C01E0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR3_PRI_RP0_P1_0x8001C01F0301143F,                  ULL(0x8001C01F0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR0_PRI_RP1_P1_0x8001C11C0301143F,                  ULL(0x8001C11C0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR1_PRI_RP1_P1_0x8001C11D0301143F,                  ULL(0x8001C11D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR2_PRI_RP1_P1_0x8001C11E0301143F,                  ULL(0x8001C11E0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR3_PRI_RP1_P1_0x8001C11F0301143F,                  ULL(0x8001C11F0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR0_PRI_RP2_P1_0x8001C21C0301143F,                  ULL(0x8001C21C0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR1_PRI_RP2_P1_0x8001C21D0301143F,                  ULL(0x8001C21D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR2_PRI_RP2_P1_0x8001C21E0301143F,                  ULL(0x8001C21E0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR3_PRI_RP2_P1_0x8001C21F0301143F,                  ULL(0x8001C21F0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR0_PRI_RP3_P1_0x8001C31C0301143F,                  ULL(0x8001C31C0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR1_PRI_RP3_P1_0x8001C31D0301143F,                  ULL(0x8001C31D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR2_PRI_RP3_P1_0x8001C31E0301143F,                  ULL(0x8001C31E0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR3_PRI_RP3_P1_0x8001C31F0301143F,                  ULL(0x8001C31F0301143F) );
-
-
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR0_SEC_RP0_P1_0x8001C0200301143F,                  ULL(0x8001C0200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR1_SEC_RP0_P1_0x8001C0210301143F,                  ULL(0x8001C0210301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR2_SEC_RP0_P1_0x8001C0220301143F,                  ULL(0x8001C0220301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR3_SEC_RP0_P1_0x8001C0230301143F,                  ULL(0x8001C0230301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR0_SEC_RP1_P1_0x8001C1200301143F,                  ULL(0x8001C1200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR1_SEC_RP1_P1_0x8001C1210301143F,                  ULL(0x8001C1210301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR2_SEC_RP1_P1_0x8001C1220301143F,                  ULL(0x8001C1220301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR3_SEC_RP1_P1_0x8001C1230301143F,                  ULL(0x8001C1230301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR0_SEC_RP2_P1_0x8001C2200301143F,                  ULL(0x8001C2200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR1_SEC_RP2_P1_0x8001C2210301143F,                  ULL(0x8001C2210301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR2_SEC_RP2_P1_0x8001C2220301143F,                  ULL(0x8001C2220301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR3_SEC_RP2_P1_0x8001C2230301143F,                  ULL(0x8001C2230301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR0_SEC_RP3_P1_0x8001C3200301143F,                  ULL(0x8001C3200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR1_SEC_RP3_P1_0x8001C3210301143F,                  ULL(0x8001C3210301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR2_SEC_RP3_P1_0x8001C3220301143F,                  ULL(0x8001C3220301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_MR3_SEC_RP3_P1_0x8001C3230301143F,                  ULL(0x8001C3230301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_PC_RANK_GROUP_P0_0x8000C0110301143F,                  ULL(0x8000C0110301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_RANK_GROUP_P1_0x8001C0110301143F,                  ULL(0x8001C0110301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_RANK_GROUP_EXT_P0_0x8000C0350301143F,                  ULL(0x8000C0350301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_RANK_GROUP_EXT_P1_0x8001C0350301143F,                  ULL(0x8001C0350301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_WC_CONFIG1_P0_0x8000CC010301143F,                  ULL(0x8000CC010301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_WC_CONFIG1_P1_0x8001CC010301143F,                  ULL(0x8001CC010301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_WC_CONFIG2_P0_0x8000CC020301143F,                  ULL(0x8000CC020301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_WC_CONFIG2_P1_0x8001CC020301143F,                  ULL(0x8001CC020301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_WC_CONFIG3_P0_0x8000CC050301143F,                  ULL(0x8000CC050301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_WC_CONFIG3_P1_0x8001CC050301143F,                  ULL(0x8001CC050301143F) );
-
-
-//------------------------------------------------------------------------------
-//   DISABLE BIT SCOM ADDRESSES (DPHY REGISTERS)
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_0_0x8000007c0301143F,		ULL(0x8000007c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_1_0x8000047c0301143F,		ULL(0x8000047c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_2_0x8000087c0301143F,		ULL(0x8000087c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_3_0x80000c7c0301143F,		ULL(0x80000c7c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_4_0x8000107c0301143F,		ULL(0x8000107c0301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_0_0x8000017c0301143F,		ULL(0x8000017c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_1_0x8000057c0301143F,		ULL(0x8000057c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_2_0x8000097c0301143F,		ULL(0x8000097c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_3_0x80000d7c0301143F,		ULL(0x80000d7c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_4_0x8000117c0301143F,		ULL(0x8000117c0301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_0_0x8000027c0301143F,		ULL(0x8000027c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_1_0x8000067c0301143F,		ULL(0x8000067c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_2_0x80000a7c0301143F,		ULL(0x80000a7c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_3_0x80000e7c0301143F,		ULL(0x80000e7c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_4_0x8000127c0301143F,		ULL(0x8000127c0301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_0_0x8000037c0301143F,		ULL(0x8000037c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_1_0x8000077c0301143F,		ULL(0x8000077c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_2_0x80000b7c0301143F,		ULL(0x80000b7c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_3_0x80000f7c0301143F,		ULL(0x80000f7c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_4_0x8000137c0301143F,		ULL(0x8000137c0301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_0_0x8001007c0301143F,		ULL(0x8001007c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_1_0x8001047c0301143F,		ULL(0x8001047c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_2_0x8001087c0301143F,		ULL(0x8001087c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_3_0x80010c7c0301143F,		ULL(0x80010c7c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_4_0x8001107c0301143F,		ULL(0x8001107c0301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_0_0x8001017c0301143F,		ULL(0x8001017c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_1_0x8001057c0301143F,		ULL(0x8001057c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_2_0x8001097c0301143F,		ULL(0x8001097c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_3_0x80010d7c0301143F,		ULL(0x80010d7c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_4_0x8001117c0301143F,		ULL(0x8001117c0301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_0_0x8001027c0301143F,		ULL(0x8001027c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_1_0x8001067c0301143F,		ULL(0x8001067c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_2_0x80010a7c0301143F,		ULL(0x80010a7c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_3_0x80010e7c0301143F,		ULL(0x80010e7c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_4_0x8001127c0301143F,		ULL(0x8001127c0301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_0_0x8001037c0301143F,		ULL(0x8001037c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_1_0x8001077c0301143F,		ULL(0x8001077c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_2_0x80010b7c0301143F,		ULL(0x80010b7c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_3_0x80010f7c0301143F,		ULL(0x80010f7c0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_4_0x8001137c0301143F,		ULL(0x8001137c0301143F) );
-//------------------------------------------------------------------------------
-//      CALIBRATION SCOM ADDRESSES (DPHY REGISTERS)
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_PC_INIT_CAL_CONFIG0_P0_0x8000C0160301143F,             ULL(0x8000C0160301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_INIT_CAL_CONFIG0_P1_0x8001C0160301143F,             ULL(0x8001C0160301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_PC_INIT_CAL_CONFIG1_P0_0x8000C0170301143F,             ULL(0x8000C0170301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_INIT_CAL_CONFIG1_P1_0x8001C0170301143F,             ULL(0x8001C0170301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_PC_INIT_CAL_STATUS_P0_0x8000C0190301143F,              ULL(0x8000C0190301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_INIT_CAL_STATUS_P1_0x8001C0190301143F,              ULL(0x8001C0190301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_PC_INIT_CAL_ERROR_P0_0x8000C0180301143F,               ULL(0x8000C0180301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_INIT_CAL_ERROR_P1_0x8001C0180301143F,               ULL(0x8001C0180301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_PC_INIT_CAL_MASK_P0_0x8000C01A0301143F,                ULL(0x8000C01A0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_INIT_CAL_MASK_P1_0x8001C01A0301143F,                ULL(0x8001C01A0301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_PC_PER_CAL_CONFIG_P0_0x8000C00B0301143F,               ULL(0x8000C00B0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_PER_CAL_CONFIG_P1_0x8001C00B0301143F,               ULL(0x8001C00B0301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_PC_PER_ZCAL_CONFIG_P0_0x8000C00F0301143F,              ULL(0x8000C00F0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_PER_ZCAL_CONFIG_P1_0x8001C00F0301143F,              ULL(0x8001C00F0301143F) );
-
-//------------------------------------------------------------------------------
-// PHY POWER Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_PC_POWERDOWN_1_P0_0x8000C0100301143F,              ULL(0x8000C0100301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_POWERDOWN_1_P1_0x8001C0100301143F,              ULL(0x8001C0100301143F) );
-
-CONST_UINT64_T( DPHY23_DDRPHY_PC_POWERDOWN_1_P0_0x8000C0100301183F,              ULL(0x8000C0100301183F) );
-CONST_UINT64_T( DPHY23_DDRPHY_PC_POWERDOWN_1_P1_0x8001C0100301183F,              ULL(0x8001C0100301183F) );
-//------------------------------------------------------------------------------
-// Delay Line Power control Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_0_0x8000006f0301143f,              ULL(0x8000006f0301143f) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_1_0x8000046f0301143f,              ULL(0x8000046f0301143f) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_2_0x8000086f0301143f,              ULL(0x8000086f0301143f) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_3_0x80000c6f0301143f,              ULL(0x80000c6f0301143f) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_4_0x8000106f0301143f,              ULL(0x8000106f0301143f) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_0_0x8001006f0301143f,              ULL(0x8001006f0301143f) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_1_0x8001046f0301143f,              ULL(0x8001046f0301143f) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_2_0x8001086f0301143f,              ULL(0x8001086f0301143f) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_3_0x80010c6f0301143f,              ULL(0x80010c6f0301143f) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_4_0x8001106f0301143f,              ULL(0x8001106f0301143f) );
-
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_0_0x8000006f0301183f,              ULL(0x8000006f0301183f) );
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_1_0x8000046f0301183f,              ULL(0x8000046f0301183f) );
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_2_0x8000086f0301183f,              ULL(0x8000086f0301183f) );
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_3_0x80000c6f0301183f,              ULL(0x80000c6f0301183f) );
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_4_0x8000106f0301183f,              ULL(0x8000106f0301183f) );
-                                                                                                               
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_0_0x8001006f0301183f,              ULL(0x8001006f0301183f) );
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_1_0x8001046f0301183f,              ULL(0x8001046f0301183f) );
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_2_0x8001086f0301183f,              ULL(0x8001086f0301183f) );
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_3_0x80010c6f0301183f,              ULL(0x80010c6f0301183f) );
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_4_0x8001106f0301183f,              ULL(0x8001106f0301183f) );
-//------------------------------------------------------------------------------
-//      MBA Fault Isolation Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBAFIRQ_0x03010600           , ULL(0x03010600) );
-CONST_UINT64_T( MBA01_MBAFIRMASK_0x03010603        , ULL(0x03010603) );
-CONST_UINT64_T( MBA01_MBAFIRMASK_AND_0x03010604    , ULL(0x03010604) );
-CONST_UINT64_T( MBA01_MBAFIRMASK_OR_0x03010605     , ULL(0x03010605) );
-CONST_UINT64_T( MBA01_MBAFIRACT0_0x03010606        , ULL(0x03010606) );
-CONST_UINT64_T( MBA01_MBAFIRACT1_0x03010607        , ULL(0x03010607) );
-
-//------------------------------------------------------------------------------
-//      MBA Error Report Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBA_MCBERRPTQ_0x030106e7     , ULL(0x030106e7) );
-
-//------------------------------------------------------------------------------
-//      MBA Maintenance Command Type Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBMCTQ_0x0301060A           , ULL(0x0301060A) );
-
-//------------------------------------------------------------------------------
-//      MBA Maintenance Command Control Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBMCCQ_0x0301060B           , ULL(0x0301060B) );
-
-//------------------------------------------------------------------------------
-//      MBA Maintenance Command Status Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBMSRQ_0x0301060C           , ULL(0x0301060C) );
-
-//------------------------------------------------------------------------------
-//      MBA Maintenance Command Address Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBMACAQ_0x0301060D           , ULL(0x0301060D) );
-
-//------------------------------------------------------------------------------
-//      MBA Maintenance Command End Address Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBMEAQ_0x0301060E           , ULL(0x0301060E) );
-
-//------------------------------------------------------------------------------
-//      MBA Memory Scrub/Read Control Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBASCTLQ_0x0301060F           , ULL(0x0301060F) );
-
-//------------------------------------------------------------------------------
-//      MBA Error Control Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBECTLQ_0x03010610           , ULL(0x03010610) );
-
-//------------------------------------------------------------------------------
-//      MBA Special Attention Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBSPAQ_0x03010611           , ULL(0x03010611) );
-CONST_UINT64_T( MBA01_MBSPAQ_AND_0x03010612       , ULL(0x03010612) );
-CONST_UINT64_T( MBA01_MBSPAQ_OR_0x03010613        , ULL(0x03010613) );
-CONST_UINT64_T( MBA01_MBSPAMSKQ_0x03010614        , ULL(0x03010614) );
-
-//------------------------------------------------------------------------------
-//      MBA Maint Read Buffers corresponding to ports 0/1
-//------------------------------------------------------------------------------
-
-// Maint Read Buffer0
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF0_DATA0_0x03010655           , ULL(0x03010655) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF0_DATA1_0x03010656           , ULL(0x03010656) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF0_DATA2_0x03010657           , ULL(0x03010657) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF0_DATA3_0x03010658           , ULL(0x03010658) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF0_DATA4_0x03010659           , ULL(0x03010659) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF0_DATA5_0x0301065a           , ULL(0x0301065a) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF0_DATA6_0x0301065b           , ULL(0x0301065b) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF0_DATA7_0x0301065c           , ULL(0x0301065c) );
-
-// Maint Read Buffer1
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF1_DATA0_0x03010665           , ULL(0x03010665) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF1_DATA1_0x03010666           , ULL(0x03010666) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF1_DATA2_0x03010667           , ULL(0x03010667) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF1_DATA3_0x03010668           , ULL(0x03010668) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF1_DATA4_0x03010669           , ULL(0x03010669) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF1_DATA5_0x0301066a           , ULL(0x0301066a) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF1_DATA6_0x0301066b           , ULL(0x0301066b) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF1_DATA7_0x0301066c           , ULL(0x0301066c) );
-
-// Maint Read Buffer2
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF2_DATA0_0x03010675           , ULL(0x03010675) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF2_DATA1_0x03010676           , ULL(0x03010676) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF2_DATA2_0x03010677           , ULL(0x03010677) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF2_DATA3_0x03010678           , ULL(0x03010678) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF2_DATA4_0x03010679           , ULL(0x03010679) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF2_DATA5_0x0301067a           , ULL(0x0301067a) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF2_DATA6_0x0301067b           , ULL(0x0301067b) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF2_DATA7_0x0301067c           , ULL(0x0301067c) );
-
-// Maint Read Buffer3
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF3_DATA0_0x03010685           , ULL(0x03010685) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF3_DATA1_0x03010686           , ULL(0x03010686) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF3_DATA2_0x03010687           , ULL(0x03010687) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF3_DATA3_0x03010688           , ULL(0x03010688) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF3_DATA4_0x03010689           , ULL(0x03010689) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF3_DATA5_0x0301068a           , ULL(0x0301068a) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF3_DATA6_0x0301068b           , ULL(0x0301068b) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF3_DATA7_0x0301068c           , ULL(0x0301068c) );
-
-// Maint Read Buffers 65th Byte
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF_65TH_BYTE_64B_ECC0_0x03010695 , ULL(0x03010695) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF_65TH_BYTE_64B_ECC1_0x03010696 , ULL(0x03010696) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF_65TH_BYTE_64B_ECC2_0x03010697 , ULL(0x03010697) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF_65TH_BYTE_64B_ECC3_0x03010698 , ULL(0x03010698) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF_65TH_BYTE_64B_ECC4_0x03010699 , ULL(0x03010699) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF_65TH_BYTE_64B_ECC5_0x0301069a , ULL(0x0301069a) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF_65TH_BYTE_64B_ECC6_0x0301069b , ULL(0x0301069b) );
-CONST_UINT64_T( MAINT0_MBA_MAINT_BUFF_65TH_BYTE_64B_ECC7_0x0301069c , ULL(0x0301069c) );
-
-
-//------------------------------------------------------------------------------
-//      MBA Write Bit Steer Control Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBABS0_0x03010440           , ULL(0x03010440) );
-CONST_UINT64_T( MBA01_MBABS1_0x03010441           , ULL(0x03010441) );
-CONST_UINT64_T( MBA01_MBABS2_0x03010442           , ULL(0x03010442) );
-CONST_UINT64_T( MBA01_MBABS3_0x03010443           , ULL(0x03010443) );
-CONST_UINT64_T( MBA01_MBABS4_0x03010444           , ULL(0x03010444) );
-CONST_UINT64_T( MBA01_MBABS5_0x03010445           , ULL(0x03010445) );
-CONST_UINT64_T( MBA01_MBABS6_0x03010446           , ULL(0x03010446) );
-CONST_UINT64_T( MBA01_MBABS7_0x03010447           , ULL(0x03010447) );
-
-//------------------------------------------------------------------------------
-//      MBA CAL FIR Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBACALFIR_0x03010400           , ULL(0x03010400) );
-CONST_UINT64_T( MBA01_MBACALFIR_AND_0x03010401       , ULL(0x03010401) );
-CONST_UINT64_T( MBA01_MBACALFIR_OR_0x03010402        , ULL(0x03010402) );
-CONST_UINT64_T( MBA01_MBACALFIR_MASK_0x03010403      , ULL(0x03010403) );
-CONST_UINT64_T( MBA01_MBACALFIR_MASK_AND_0x03010404  , ULL(0x03010404) );
-CONST_UINT64_T( MBA01_MBACALFIR_MASK_OR_0x03010405   , ULL(0x03010405) );
-CONST_UINT64_T( MBA01_MBACALFIR_ACTION0_0x03010406   , ULL(0x03010406) );
-CONST_UINT64_T( MBA01_MBACALFIR_ACTION1_0x03010407   , ULL(0x03010407) );
-
-//------------------------------------------------------------------------------
-//      MBA Data State Machine Configurations Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBA_DSM0_0x0301040a           , ULL(0x0301040a) );
-
-
-//------------------------------------------------------------------------------
-//      MBA Error report register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBA_ERR_REPORTQ_0x0301041A     , ULL(0x0301041A) );
-
-//------------------------------------------------------------------------------
-//      MBA WRD Mode Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBA_WRD_MODE_0x03010449           , ULL(0x03010449) );
-
-
-//------------------------------------------------------------------------------
-//      MBA Power Control Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBARPC0Q_0x03010434		,ULL(0x03010434) );
-
-//------------------------------------------------------------------------------
-//      DMI FIR Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( CEN_DMIFIR_0x02010400                  , ULL(0x02010400) );
-CONST_UINT64_T( CEN_DMIFIR_MASK_0x02010403             , ULL(0x02010403) );
-CONST_UINT64_T( CEN_DMIFIR_MASK_AND_0x02010404         , ULL(0x02010404) );
-CONST_UINT64_T( CEN_DMIFIR_MASK_OR_0x02010405          , ULL(0x02010405) );
-CONST_UINT64_T( CEN_DMIFIR_ACT0_0x02010406             , ULL(0x02010406) );
-CONST_UINT64_T( CEN_DMIFIR_ACT1_0x02010407             , ULL(0x02010407) );
-CONST_UINT64_T( CEN_DMIFIR_WOF_0x02010408              , ULL(0x02010408) );
-
-//------------------------------------------------------------------------------
-//      Address Translate Control Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBAXCR01Q_0x0201140B           , ULL(0x0201140B) );
-CONST_UINT64_T( MBAXCR23Q_0x0201140C           , ULL(0x0201140C) );
-
-//------------------------------------------------------------------------------
-//      MBS Configuration Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBSCFGQ_0x02011411             , ULL(0x02011411) );
-
-//------------------------------------------------------------------------------
-//      MBS ECC Decoder FIR Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS_ECC0_MBECCFIR_0x02011440           , ULL(0x02011440) );
-CONST_UINT64_T( MBS_ECC0_MBECCFIR_AND_0x02011441       , ULL(0x02011441) );
-CONST_UINT64_T( MBS_ECC0_MBECCFIR_OR_0x02011442        , ULL(0x02011442) );
-CONST_UINT64_T( MBS_ECC0_MBECCFIR_MASK_0x02011443      , ULL(0x02011443) );
-CONST_UINT64_T( MBS_ECC0_MBECCFIR_MASK_AND_0x02011444  , ULL(0x02011444) );
-CONST_UINT64_T( MBS_ECC0_MBECCFIR_MASK_OR_0x02011445   , ULL(0x02011445) );
-CONST_UINT64_T( MBS_ECC0_MBECCFIR_ACTION0_0x02011446   , ULL(0x02011446) );
-CONST_UINT64_T( MBS_ECC0_MBECCFIR_ACTION1_0x02011447   , ULL(0x02011447) );
-CONST_UINT64_T( MBS_ECC0_MBECCFIR_WOF_0x02011448       , ULL(0x02011448) );
-
-CONST_UINT64_T( MBS_ECC1_MBECCFIR_0x02011480           , ULL(0x02011480) );
-CONST_UINT64_T( MBS_ECC0_MBECCFIR_AND_0x02011481       , ULL(0x02011481) );
-CONST_UINT64_T( MBS_ECC0_MBECCFIR_OR_0x02011482        , ULL(0x02011482) );
-CONST_UINT64_T( MBS_ECC1_MBECCFIR_MASK_0x02011483      , ULL(0x02011483) );
-CONST_UINT64_T( MBS_ECC1_MBECCFIR_MASK_AND_0x02011484  , ULL(0x02011484) );
-CONST_UINT64_T( MBS_ECC1_MBECCFIR_MASK_OR_0x02011485   , ULL(0x02011485) );
-CONST_UINT64_T( MBS_ECC1_MBECCFIR_ACTION0_0x02011486   , ULL(0x02011486) );
-CONST_UINT64_T( MBS_ECC1_MBECCFIR_ACTION1_0x02011487   , ULL(0x02011487) );
-CONST_UINT64_T( MBS_ECC1_MBECCFIR_WOF_0x02011488       , ULL(0x02011488) );
-
-//------------------------------------------------------------------------------
-//      MBS ECC Error Report Hold Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS_ECC0_MBSECCERR0_0x02011466           , ULL(0x02011466) );
-CONST_UINT64_T( MBS_ECC0_MBSECCERR1_0x02011467           , ULL(0x02011467) );
-CONST_UINT64_T( MBS_ECC1_MBSECCERR0_0x020114A6           , ULL(0x020114A6) );
-CONST_UINT64_T( MBS_ECC1_MBSECCERR1_0x020114A7           , ULL(0x020114A7) );
-
-//------------------------------------------------------------------------------
-//      MBS Memory ECC Mark Store Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS_ECC0_MBMS0_0x0201144B           , ULL(0x0201144B) );
-CONST_UINT64_T( MBS_ECC0_MBMS1_0x0201144C           , ULL(0x0201144C) );
-CONST_UINT64_T( MBS_ECC0_MBMS2_0x0201144D           , ULL(0x0201144D) );
-CONST_UINT64_T( MBS_ECC0_MBMS3_0x0201144E           , ULL(0x0201144E) );
-CONST_UINT64_T( MBS_ECC0_MBMS4_0x0201144F           , ULL(0x0201144F) );
-CONST_UINT64_T( MBS_ECC0_MBMS5_0x02011450           , ULL(0x02011450) );
-CONST_UINT64_T( MBS_ECC0_MBMS6_0x02011451           , ULL(0x02011451) );
-CONST_UINT64_T( MBS_ECC0_MBMS7_0x02011452           , ULL(0x02011452) );
-
-CONST_UINT64_T( MBS_ECC1_MBMS0_0x0201148B           , ULL(0x0201148B) );
-CONST_UINT64_T( MBS_ECC1_MBMS1_0x0201148C           , ULL(0x0201148C) );
-CONST_UINT64_T( MBS_ECC1_MBMS2_0x0201148D           , ULL(0x0201148D) );
-CONST_UINT64_T( MBS_ECC1_MBMS3_0x0201148E           , ULL(0x0201148E) );
-CONST_UINT64_T( MBS_ECC1_MBMS4_0x0201148F           , ULL(0x0201148F) );
-CONST_UINT64_T( MBS_ECC1_MBMS5_0x02011490           , ULL(0x02011490) );
-CONST_UINT64_T( MBS_ECC1_MBMS6_0x02011491           , ULL(0x02011491) );
-CONST_UINT64_T( MBS_ECC1_MBMS7_0x02011492           , ULL(0x02011492) );
-
-//------------------------------------------------------------------------------
-//      MBS Maintenance Mark Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS_ECC0_MBMMRQ_0x0201145B          , ULL(0x0201145B) );
-CONST_UINT64_T( MBS_ECC1_MBMMRQ_0x0201149B          , ULL(0x0201149B) );
-
-//------------------------------------------------------------------------------
-//      MBS Read Bit Steer Control Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS_ECC0_MBSBS0_0x0201145E           , ULL(0x0201145E) );
-CONST_UINT64_T( MBS_ECC0_MBSBS1_0x0201145F           , ULL(0x0201145F) );
-CONST_UINT64_T( MBS_ECC0_MBSBS2_0x02011460           , ULL(0x02011460) );
-CONST_UINT64_T( MBS_ECC0_MBSBS3_0x02011461           , ULL(0x02011461) );
-CONST_UINT64_T( MBS_ECC0_MBSBS4_0x02011462           , ULL(0x02011462) );
-CONST_UINT64_T( MBS_ECC0_MBSBS5_0x02011463           , ULL(0x02011463) );
-CONST_UINT64_T( MBS_ECC0_MBSBS6_0x02011464           , ULL(0x02011464) );
-CONST_UINT64_T( MBS_ECC0_MBSBS7_0x02011465           , ULL(0x02011465) );
-
-CONST_UINT64_T( MBS_ECC1_MBSBS0_0x0201149E           , ULL(0x0201149E) );
-CONST_UINT64_T( MBS_ECC1_MBSBS1_0x0201149F           , ULL(0x0201149F) );
-CONST_UINT64_T( MBS_ECC1_MBSBS2_0x020114A0           , ULL(0x020114A0) );
-CONST_UINT64_T( MBS_ECC1_MBSBS3_0x020114A1           , ULL(0x020114A1) );
-CONST_UINT64_T( MBS_ECC1_MBSBS4_0x020114A2           , ULL(0x020114A2) );
-CONST_UINT64_T( MBS_ECC1_MBSBS5_0x020114A3           , ULL(0x020114A3) );
-CONST_UINT64_T( MBS_ECC1_MBSBS6_0x020114A4           , ULL(0x020114A4) );
-CONST_UINT64_T( MBS_ECC1_MBSBS7_0x020114A5           , ULL(0x020114A5) );
-
-
-//------------------------------------------------------------------------------
-//      MBS Maint Write Buffers corresponding to ports 0/1
-//------------------------------------------------------------------------------
-
-// Maint Write Buffer 0
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF0_DATA0_0x0201160A				, ULL(0x0201160A) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF0_DATA1_0x0201160B				, ULL(0x0201160B) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF0_DATA2_0x0201160C				, ULL(0x0201160C) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF0_DATA3_0x0201160D				, ULL(0x0201160D) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF0_DATA4_0x0201160E				, ULL(0x0201160E) );
-
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF0_DATA_ECC0_0x02011612			, ULL(0x02011612) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF0_DATA_ECC1_0x02011613			, ULL(0x02011613) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF0_DATA_ECC2_0x02011614			, ULL(0x02011614) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF0_DATA_ECC3_0x02011615			, ULL(0x02011615) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF0_DATA_ECC4_0x02011616			, ULL(0x02011616) );
-
-// Maint Write Buffer 1
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF1_DATA0_0x0201161A				, ULL(0x0201161A) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF1_DATA1_0x0201161B				, ULL(0x0201161B) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF1_DATA2_0x0201161C				, ULL(0x0201161C) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF1_DATA3_0x0201161D				, ULL(0x0201161D) );
-
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF1_DATA_ECC0_0x02011622			, ULL(0x02011622) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF1_DATA_ECC1_0x02011623			, ULL(0x02011623) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF1_DATA_ECC2_0x02011624			, ULL(0x02011624) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF1_DATA_ECC3_0x02011625			, ULL(0x02011625) );
-
-// Maint Write Buffer 2
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF2_DATA0_0x0201162A				, ULL(0x0201162A) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF2_DATA1_0x0201162B				, ULL(0x0201162B) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF2_DATA2_0x0201162C				, ULL(0x0201162C) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF2_DATA3_0x0201162D				, ULL(0x0201162D) );
-
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF2_DATA_ECC0_0x02011632			, ULL(0x02011632) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF2_DATA_ECC1_0x02011633			, ULL(0x02011633) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF2_DATA_ECC2_0x02011634			, ULL(0x02011634) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF2_DATA_ECC3_0x02011635			, ULL(0x02011635) );
-		
-// Maint Write Buffer 3
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF3_DATA0_0x0201163A				, ULL(0x0201163A) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF3_DATA1_0x0201163B				, ULL(0x0201163B) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF3_DATA2_0x0201163C				, ULL(0x0201163C) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF3_DATA3_0x0201163D				, ULL(0x0201163D) );
-
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF3_DATA_ECC0_0x02011642			, ULL(0x02011642) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF3_DATA_ECC1_0x02011643			, ULL(0x02011643) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF3_DATA_ECC2_0x02011644			, ULL(0x02011644) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF3_DATA_ECC3_0x02011645			, ULL(0x02011645) );
-
-// Maint Write Buffer 65th Byte
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF_65TH_BYTE_64B_ECC0_0x0201164A , ULL(0x0201164A) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF_65TH_BYTE_64B_ECC1_0x0201164B , ULL(0x0201164B) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF_65TH_BYTE_64B_ECC2_0x0201164C , ULL(0x0201164C) );
-CONST_UINT64_T( MAINT0_MBS_MAINT_BUFF_65TH_BYTE_64B_ECC3_0x0201164D , ULL(0x0201164D) );
-
-
-//------------------------------------------------------------------------------
-//      MBS Maint Write Buffers corresponding to ports 2/3
-//------------------------------------------------------------------------------
-
-// Maint Write Buffer 0
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF0_DATA0_0x0201170A				, ULL(0x0201170A) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF0_DATA1_0x0201170B				, ULL(0x0201170B) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF0_DATA2_0x0201170C				, ULL(0x0201170C) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF0_DATA3_0x0201170D				, ULL(0x0201170D) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF0_DATA4_0x0201170E				, ULL(0x0201170E) );
-
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF0_DATA_ECC0_0x02011712			, ULL(0x02011712) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF0_DATA_ECC1_0x02011713			, ULL(0x02011713) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF0_DATA_ECC2_0x02011714			, ULL(0x02011714) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF0_DATA_ECC3_0x02011715			, ULL(0x02011715) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF0_DATA_ECC4_0x02011716			, ULL(0x02011716) );
-
-// Maint Write Buffer 1
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF1_DATA0_0x0201171A				, ULL(0x0201171A) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF1_DATA1_0x0201171B				, ULL(0x0201171B) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF1_DATA2_0x0201171C				, ULL(0x0201171C) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF1_DATA3_0x0201171D				, ULL(0x0201171D) );
-
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF1_DATA_ECC0_0x02011722			, ULL(0x02011722) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF1_DATA_ECC1_0x02011723			, ULL(0x02011723) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF1_DATA_ECC2_0x02011724			, ULL(0x02011724) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF1_DATA_ECC3_0x02011725			, ULL(0x02011725) );
-
-// Maint Write Buffer 2
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF2_DATA0_0x0201172A				, ULL(0x0201172A) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF2_DATA1_0x0201172B				, ULL(0x0201172B) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF2_DATA2_0x0201172C				, ULL(0x0201172C) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF2_DATA3_0x0201172D				, ULL(0x0201172D) );
-
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF2_DATA_ECC0_0x02011732			, ULL(0x02011732) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF2_DATA_ECC1_0x02011733			, ULL(0x02011733) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF2_DATA_ECC2_0x02011734			, ULL(0x02011734) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF2_DATA_ECC3_0x02011735			, ULL(0x02011735) );
-	
-// Maint Write Buffer 3
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF3_DATA0_0x0201173A				, ULL(0x0201173A) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF3_DATA1_0x0201173B				, ULL(0x0201173B) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF3_DATA2_0x0201173C				, ULL(0x0201173C) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF3_DATA3_0x0201173D				, ULL(0x0201173D) );
-
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF3_DATA_ECC0_0x02011742			, ULL(0x02011742) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF3_DATA_ECC1_0x02011743			, ULL(0x02011743) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF3_DATA_ECC2_0x02011744			, ULL(0x02011744) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF3_DATA_ECC3_0x02011745			, ULL(0x02011745) );
-
-// Maint Write Buffer 65th Byte
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF_65TH_BYTE_64B_ECC0_0x0201174A , ULL(0x0201174A) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF_65TH_BYTE_64B_ECC1_0x0201174B , ULL(0x0201174B) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF_65TH_BYTE_64B_ECC2_0x0201174C , ULL(0x0201174C) );
-CONST_UINT64_T( MAINT1_MBS_MAINT_BUFF_65TH_BYTE_64B_ECC3_0x0201174D , ULL(0x0201174D) );
-
-//------------------------------------------------------------------------------
-//      MBS Memory ECC Control Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS_ECC0_MBSECCQ_0x0201144A           , ULL(0x0201144A) );
-CONST_UINT64_T( MBS_ECC1_MBSECCQ_0x0201148A           , ULL(0x0201148A) );
-
-//------------------------------------------------------------------------------
-//      MBS Memory Scrub/Read Error Threshold Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS01_MBSTRQ_0x02011655           , ULL(0x02011655) );
-CONST_UINT64_T( MBS23_MBSTRQ_0x02011755           , ULL(0x02011755) );
-
-//------------------------------------------------------------------------------
-//	    MBS Memory Scrub/Read Error Count Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS01_MBSEC0Q_0x02011653           , ULL(0x02011653) );
-CONST_UINT64_T( MBS01_MBSEC1Q_0x02011654           , ULL(0x02011654) );
-CONST_UINT64_T( MBS23_MBSEC0Q_0x02011753           , ULL(0x02011753) );
-CONST_UINT64_T( MBS23_MBSEC1Q_0x02011754           , ULL(0x02011754) );
-
-//------------------------------------------------------------------------------
-//      MBS Memory Scrub/Read Symbol Error Count Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS01_MBSSYMEC0Q_0x02011656           , ULL(0x02011656) );
-CONST_UINT64_T( MBS01_MBSSYMEC1Q_0x02011657           , ULL(0x02011657) );
-CONST_UINT64_T( MBS01_MBSSYMEC2Q_0x02011658           , ULL(0x02011658) );
-CONST_UINT64_T( MBS01_MBSSYMEC3Q_0x02011659           , ULL(0x02011659) );
-CONST_UINT64_T( MBS01_MBSSYMEC4Q_0x0201165A           , ULL(0x0201165A) );
-CONST_UINT64_T( MBS01_MBSSYMEC5Q_0x0201165B           , ULL(0x0201165B) );
-CONST_UINT64_T( MBS01_MBSSYMEC6Q_0x0201165C           , ULL(0x0201165C) );
-CONST_UINT64_T( MBS01_MBSSYMEC7Q_0x0201165D           , ULL(0x0201165D) );
-CONST_UINT64_T( MBS01_MBSSYMEC8Q_0x0201165E           , ULL(0x0201165E) );
-CONST_UINT64_T( MBS23_MBSSYMEC0Q_0x02011756           , ULL(0x02011756) );
-CONST_UINT64_T( MBS23_MBSSYMEC1Q_0x02011757           , ULL(0x02011757) );
-CONST_UINT64_T( MBS23_MBSSYMEC2Q_0x02011758           , ULL(0x02011758) );
-CONST_UINT64_T( MBS23_MBSSYMEC3Q_0x02011759           , ULL(0x02011759) );
-CONST_UINT64_T( MBS23_MBSSYMEC4Q_0x0201175A           , ULL(0x0201175A) );
-CONST_UINT64_T( MBS23_MBSSYMEC5Q_0x0201175B           , ULL(0x0201175B) );
-CONST_UINT64_T( MBS23_MBSSYMEC6Q_0x0201175C           , ULL(0x0201175C) );
-CONST_UINT64_T( MBS23_MBSSYMEC7Q_0x0201175D           , ULL(0x0201175D) );
-CONST_UINT64_T( MBS23_MBSSYMEC8Q_0x0201175E           , ULL(0x0201175E) );
-
-
-//------------------------------------------------------------------------------
-//      MBS Memory Error Vector Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS01_MBSEVRQ_0x0201165F              , ULL(0x0201165F) );
-CONST_UINT64_T( MBS23_MBSEVRQ_0x0201175F              , ULL(0x0201175F) );
-
-//------------------------------------------------------------------------------
-//      MBS Memory NCE Error Address Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS01_MBNCERQ_0x02011660              , ULL(0x02011660) );
-CONST_UINT64_T( MBS23_MBNCERQ_0x02011760              , ULL(0x02011760) );
-
-//------------------------------------------------------------------------------
-//      MBS Memory RCE Error Address Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS01_MBRCERQ_0x02011661              , ULL(0x02011661) );
-CONST_UINT64_T( MBS23_MBRCERQ_0x02011761              , ULL(0x02011761) );
-
-//------------------------------------------------------------------------------
-//      MBS Memory MPE Error Address Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS01_MBMPERQ_0x02011662              , ULL(0x02011662) );
-CONST_UINT64_T( MBS23_MBMPERQ_0x02011762              , ULL(0x02011762) );
-
-//------------------------------------------------------------------------------
-//      MBS Memory UE Error Address Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS01_MBUERQ_0x02011663               , ULL(0x02011663) );
-CONST_UINT64_T( MBS23_MBUERQ_0x02011763               , ULL(0x02011763) );
-
-
-//------------------------------------------------------------------------------
-//      MBS FIR Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS_FIR_REG_0x02011400              , ULL(0x02011400) );
-CONST_UINT64_T( MBS_FIR_MASK_REG_0x02011403         , ULL(0x02011403) );
-CONST_UINT64_T( MBS_FIR_MASK_REG_AND_0x02011404     , ULL(0x02011404) );
-CONST_UINT64_T( MBS_FIR_MASK_REG_OR_0x02011405      , ULL(0x02011405) );
-CONST_UINT64_T( MBS_FIR_ACTION0_REG_0x02011406      , ULL(0x02011406) );
-CONST_UINT64_T( MBS_FIR_ACTION1_REG_0x02011407      , ULL(0x02011407) );
-CONST_UINT64_T( MBS_FIR_WOF_REG_0x02011408          , ULL(0x02011408) );
-
-//------------------------------------------------------------------------------
-//      FBIST NEST FIR Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( FBISTN_FIR_REG_0x02010880              , ULL(0x02010880) );
-CONST_UINT64_T( FBISTN_FIR_MASK_REG_0x02010883         , ULL(0x02010883) );
-CONST_UINT64_T( FBISTN_FIR_MASK_REG_AND_0x02010884     , ULL(0x02010884) );
-CONST_UINT64_T( FBISTN_FIR_MASK_REG_OR_0x02010885      , ULL(0x02010885) );
-CONST_UINT64_T( FBISTN_FIR_ACTION0_REG_0x02010886      , ULL(0x02010886) );
-CONST_UINT64_T( FBISTN_FIR_ACTION1_REG_0x02010887      , ULL(0x02010887) );
-
-//------------------------------------------------------------------------------
-//      FBIST MEM FIR Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( FBISTM_FIR_REG_0x03010480              , ULL(0x03010480) );
-CONST_UINT64_T( FBISTM_FIR_MASK_REG_0x03010483         , ULL(0x03010483) );
-CONST_UINT64_T( FBISTM_FIR_MASK_REG_AND_0x03010484     , ULL(0x03010484) );
-CONST_UINT64_T( FBISTM_FIR_MASK_REG_OR_0x03010485      , ULL(0x03010485) );
-CONST_UINT64_T( FBISTM_FIR_ACTION0_REG_0x03010486      , ULL(0x03010486) );
-CONST_UINT64_T( FBISTM_FIR_ACTION1_REG_0x03010487      , ULL(0x03010487) );
-
-//------------------------------------------------------------------------------
-//      MBS Secure FIR Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBSS_FIR_REG_0x0201141E              , ULL(0x0201141E) );
-CONST_UINT64_T( MBSS_FIR_MASK_REG_0x02011421         , ULL(0x02011421) );
-CONST_UINT64_T( MBSS_FIR_ACTION0_REG_0x02011424      , ULL(0x02011424) );
-CONST_UINT64_T( MBSS_FIR_ACTION1_REG_0x02011425      , ULL(0x02011425) );
-
-//------------------------------------------------------------------------------
-//      MBA Secure FIR Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBAS_FIR_REG_0x0301041B              , ULL(0x0301041B) );
-CONST_UINT64_T( MBAS_FIR_MASK_REG_0x0301041E         , ULL(0x0301041E) );
-CONST_UINT64_T( MBAS_FIR_ACTION0_REG_0x03010421      , ULL(0x03010421) );
-CONST_UINT64_T( MBAS_FIR_ACTION1_REG_0x03010422      , ULL(0x03010422) );
-
-//------------------------------------------------------------------------------
-//      DDRPHY FIR Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PHY01_DDRPHY_FIR_REG_0x800200900301143f             , ULL(0x800200900301143f) );
-CONST_UINT64_T( PHY01_DDRPHY_FIR_MASK_REG_0x800200930301143f        , ULL(0x800200930301143f) );
-CONST_UINT64_T( PHY01_DDRPHY_FIR_MASK_REG_AND_0x800200940301143f    , ULL(0x800200940301143f) );
-CONST_UINT64_T( PHY01_DDRPHY_FIR_MASK_REG_OR_0x800200950301143f     , ULL(0x800200950301143f) );
-CONST_UINT64_T( PHY01_DDRPHY_FIR_ACTION0_REG_0x800200960301143f     , ULL(0x800200960301143f) );
-CONST_UINT64_T( PHY01_DDRPHY_FIR_ACTION1_REG_0x800200970301143f     , ULL(0x800200970301143f) );
-CONST_UINT64_T( PHY01_DDRPHY_FIR_WOF_REG_0x800200980301143f         , ULL(0x800200980301143f) );
-
-//------------------------------------------------------------------------------
-//      MBA RRQ0 Register - DDR read command parameters
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBA_RRQ0Q_0x0301040E               , ULL(0x0301040e) );
-
-//------------------------------------------------------------------------------
-//      MBA CAL Registers - DDR CAL REGs
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBA_CAL0Q_0x0301040F               , ULL(0x0301040F) );
-CONST_UINT64_T( MBA01_MBA_CAL1Q_0x03010410               , ULL(0x03010410) );
-CONST_UINT64_T( MBA01_MBA_CAL2Q_0x03010411               , ULL(0x03010411) );
-CONST_UINT64_T( MBA01_MBA_CAL3Q_0x03010412               , ULL(0x03010412) );
-
-
-//------------------------------------------------------------------------------
-//      MBSFIR Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS01_MBSFIRQ_0x02011600            , ULL(0x02011600) );
-CONST_UINT64_T( MBS01_MBSFIRMASK_0x02011603         , ULL(0x02011603) );
-CONST_UINT64_T( MBS01_MBSFIRMASK_AND_0x02011604     , ULL(0x02011604) );
-CONST_UINT64_T( MBS01_MBSFIRMASK_OR_0x02011605      , ULL(0x02011605) );
-CONST_UINT64_T( MBS01_MBSFIRACT0_0x02011606         , ULL(0x02011606) );
-CONST_UINT64_T( MBS01_MBSFIRACT1_0x02011607         , ULL(0x02011607) );
-CONST_UINT64_T( MBS01_MBSFIRWOF_0x02011608          , ULL(0x02011608) );
-
-CONST_UINT64_T( MBS23_MBSFIRQ_0x02011700            , ULL(0x02011700) );
-CONST_UINT64_T( MBS23_MBSFIRMASK_0x02011703         , ULL(0x02011703) );
-CONST_UINT64_T( MBS23_MBSFIRMASK_AND_0x02011704     , ULL(0x02011704) );
-CONST_UINT64_T( MBS23_MBSFIRMASK_OR_0x02011705      , ULL(0x02011705) );
-CONST_UINT64_T( MBS23_MBSFIRACT0_0x02011706         , ULL(0x02011706) );
-CONST_UINT64_T( MBS23_MBSFIRACT1_0x02011707         , ULL(0x02011707) );
-CONST_UINT64_T( MBS23_MBSFIRWOF_0x02011708          , ULL(0x02011708) );
-
-//------------------------------------------------------------------------------
-//      SCAC Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( SCAC_LFIR_0x020115C0            , ULL(0x020115C0) );
-CONST_UINT64_T( SCAC_FIRMASK_0x020115C3         , ULL(0x020115C3) );
-CONST_UINT64_T( SCAC_FIRMASK_AND_0x020115C4     , ULL(0x020115C4) );
-CONST_UINT64_T( SCAC_FIRMASK_OR_0x020115C5      , ULL(0x020115C5) );
-CONST_UINT64_T( SCAC_FIRACTION0_0x020115C6      , ULL(0x020115C6) );
-CONST_UINT64_T( SCAC_FIRACTION1_0x020115C7      , ULL(0x020115C7) );
-CONST_UINT64_T( SCAC_FIRWOF_0x020115C8          , ULL(0x020115C8) );
-
-//------------------------------------------------------------------------------
-//      DQ/DQS Slew Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_0_0x800000750301143F , ULL(0x800000750301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_1_0x800004750301143F , ULL(0x800004750301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_2_0x800008750301143F , ULL(0x800008750301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_3_0x80000C750301143F , ULL(0x80000C750301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_4_0x800010750301143F , ULL(0x800010750301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_0_0x800100750301143F , ULL(0x800100750301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_1_0x800104750301143F , ULL(0x800104750301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_2_0x800108750301143F , ULL(0x800108750301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_3_0x80010C750301143F , ULL(0x80010C750301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_4_0x800110750301143F , ULL(0x800110750301143F) );
-
-//------------------------------------------------------------------------------
-//      ADR Slew Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR0_0x8000401A0301143F , ULL(0x8000401A0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR1_0x8000441A0301143F , ULL(0x8000441A0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR2_0x8000481A0301143F , ULL(0x8000481A0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR3_0x80004C1A0301143F , ULL(0x80004C1A0301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR0_0x8001401A0301143F , ULL(0x8001401A0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR1_0x8001441A0301143F , ULL(0x8001441A0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR2_0x8001481A0301143F , ULL(0x8001481A0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR3_0x80014C1A0301143F , ULL(0x80014C1A0301143F) );
-
-//------------------------------------------------------------------------------
-//      ADR Slew Calibration Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S0_0x800080390301143F , ULL(0x800080390301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S1_0x800084390301143F , ULL(0x800084390301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S0_0x800180390301143F , ULL(0x800180390301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S1_0x800184390301143F , ULL(0x800184390301143F) );
-
-//------------------------------------------------------------------------------
-//      DQ/DQS Slew Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_0_0x800000730301143F , ULL(0x800000730301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_1_0x800004730301143F , ULL(0x800004730301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_2_0x800008730301143F , ULL(0x800008730301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_3_0x80000C730301143F , ULL(0x80000C730301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_4_0x800010730301143F , ULL(0x800010730301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_0_0x800100730301143F , ULL(0x800100730301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_1_0x800104730301143F , ULL(0x800104730301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_2_0x800108730301143F , ULL(0x800108730301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_3_0x80010C730301143F , ULL(0x80010C730301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_4_0x800110730301143F , ULL(0x800110730301143F) );
-
-//------------------------------------------------------------------------------
-//      ADR Slew Calibration Status Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_0x800080340301143F , ULL(0x800080340301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S1_0x800084340301143F , ULL(0x800084340301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S0_0x800180340301143F , ULL(0x800180340301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S1_0x800184340301143F , ULL(0x800184340301143F) );
-
-//------------------------------------------------------------------------------
-// DP18 IO Driver N FET Slice Termination Enable Registers
-//------------------------------------------------------------------------------
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_TERM_P0_0_0x8000007A0301143F,	           ULL(0x8000007A0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_TERM_P0_1_0x8000047A0301143F,	           ULL(0x8000047A0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_TERM_P0_2_0x8000087A0301143F,	           ULL(0x8000087A0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_TERM_P0_3_0x80000C7A0301143F,	           ULL(0x80000C7A0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_TERM_P0_4_0x8000107A0301143F,	           ULL(0x8000107A0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_TERM_P1_0_0x8001007A0301143F,	           ULL(0x8001007A0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_TERM_P1_1_0x8001047A0301143F,	           ULL(0x8001047A0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_TERM_P1_2_0x8001087A0301143F,	           ULL(0x8001087A0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_TERM_P1_3_0x80010C7A0301143F,	           ULL(0x80010C7A0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_TERM_P1_4_0x8001107A0301143F,	           ULL(0x8001107A0301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_TERM_P0_0_0x8000007B0301143F,	           ULL(0x8000007B0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_TERM_P0_1_0x8000047B0301143F,	           ULL(0x8000047B0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_TERM_P0_2_0x8000087B0301143F,	           ULL(0x8000087B0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_TERM_P0_3_0x80000C7B0301143F,	           ULL(0x80000C7B0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_TERM_P0_4_0x8000107B0301143F,	           ULL(0x8000107B0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_TERM_P1_0_0x8001007B0301143F,	           ULL(0x8001007B0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_TERM_P1_1_0x8001047B0301143F,	           ULL(0x8001047B0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_TERM_P1_2_0x8001087B0301143F,	           ULL(0x8001087B0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_TERM_P1_3_0x80010C7B0301143F,	           ULL(0x80010C7B0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_TERM_P1_4_0x8001107B0301143F,	           ULL(0x8001107B0301143F) );
-
-//------------------------------------------------------------------------------
-// PC VREF Driver Control Registers
-//------------------------------------------------------------------------------
-
-CONST_UINT64_T( DPHY01_DDRPHY_PC_VREF_DRV_CONTROL_P0_0x8000C0150301143F,  ULL(0x8000c0150301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_VREF_DRV_CONTROL_P1_0x8001C0150301143F,  ULL(0x8001c0150301143F) );
-
-//------------------------------------------------------------------------------
-// DP18 IO RX Configuration Registers
-//------------------------------------------------------------------------------
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_0_0x800000060301143F,    ULL(0x800000060301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_1_0x800004060301143F,	   ULL(0x800004060301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_2_0x800008060301143F,	   ULL(0x800008060301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_3_0x80000c060301143F,	   ULL(0x80000c060301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_4_0x800010060301143F,	   ULL(0x800010060301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_0_0x800100060301143F,	   ULL(0x800100060301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_1_0x800104060301143F,	   ULL(0x800104060301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_2_0x800108060301143F,	   ULL(0x800108060301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_3_0x80010c060301143F,	   ULL(0x80010c060301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_4_0x800110060301143F,	   ULL(0x800110060301143F) );
-
-
-//------------------------------------------------------------------------------
-//      NFET Slice Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_0_5_0x80003C780301143F , ULL(0x80003C780301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_0_5_0x80013C780301143F , ULL(0x80013C780301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_0_0x800000780301143F , ULL(0x800000780301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_1_0x800004780301143F , ULL(0x800004780301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_2_0x800008780301143F , ULL(0x800008780301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_3_0x80000C780301143F , ULL(0x80000C780301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_4_0x800010780301143F , ULL(0x800010780301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_0_0x800100780301143F , ULL(0x800100780301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_1_0x800104780301143F , ULL(0x800104780301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_2_0x800108780301143F , ULL(0x800108780301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_3_0x80010C780301143F , ULL(0x80010C780301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_4_0x800110780301143F , ULL(0x800110780301143F) );
-
-//------------------------------------------------------------------------------
-//      PFET Slice Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_0_5_0x80003C790301143F , ULL(0x80003C790301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_0_5_0x80013C790301143F , ULL(0x80013C790301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_0_0x800000790301143F , ULL(0x800000790301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_1_0x800004790301143F , ULL(0x800004790301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_2_0x800008790301143F , ULL(0x800008790301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_3_0x80000C790301143F , ULL(0x80000C790301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_4_0x800010790301143F , ULL(0x800010790301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_0_0x800100790301143F , ULL(0x800100790301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_1_0x800104790301143F , ULL(0x800104790301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_2_0x800108790301143F , ULL(0x800108790301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_3_0x80010C790301143F , ULL(0x80010C790301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_4_0x800110790301143F , ULL(0x800110790301143F) );
-
-//------------------------------------------------------------------------------
-//      ADR IO FET Slice Enable Map Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_3_0x80007C200301143F , ULL(0x80007C200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_3_0x80007C210301143F , ULL(0x80007C210301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_3_0x80017C200301143F , ULL(0x80017C200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_3_0x80017C210301143F , ULL(0x80017C210301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_0x800040200301143F , ULL(0x800040200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_0x800044200301143F , ULL(0x800044200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_0x800048200301143F , ULL(0x800048200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_0x80004C200301143F , ULL(0x80004C200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_0x800040210301143F , ULL(0x800040210301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_0x800044210301143F , ULL(0x800044210301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_0x800048210301143F , ULL(0x800048210301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_0x80004C210301143F , ULL(0x80004C210301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_0x800140200301143F , ULL(0x800140200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_0x800144200301143F , ULL(0x800144200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_0x800148200301143F , ULL(0x800148200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_0x80014C200301143F , ULL(0x80014C200301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_0x800140210301143F , ULL(0x800140210301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_0x800144210301143F , ULL(0x800144210301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_0x800148210301143F , ULL(0x800148210301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_0x80014C210301143F , ULL(0x80014C210301143F) );
-
-
-//------------------------------------------------------------------------------
-//      DFT Wrap Status Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DFT_WRAP_STATUS_P0_0_0x8000001D0301143F , ULL(0x8000001D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DFT_WRAP_STATUS_P0_1_0x8000041D0301143F , ULL(0x8000041D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DFT_WRAP_STATUS_P0_2_0x8000081D0301143F , ULL(0x8000081D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DFT_WRAP_STATUS_P0_3_0x80000C1D0301143F , ULL(0x80000C1D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DFT_WRAP_STATUS_P0_4_0x8000101D0301143F , ULL(0x8000101D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DFT_WRAP_STATUS_P1_0_0x8001001D0301143F , ULL(0x8001001D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DFT_WRAP_STATUS_P1_1_0x8001041D0301143F , ULL(0x8001041D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DFT_WRAP_STATUS_P1_2_0x8001081D0301143F , ULL(0x8001081D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DFT_WRAP_STATUS_P1_3_0x80010C1D0301143F , ULL(0x80010C1D0301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DFT_WRAP_STATUS_P1_4_0x8001101D0301143F , ULL(0x8001101D0301143F) );
-
-//------------------------------------------------------------------------------
-//      ADR Output Force ATEST Control Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_OFFSET_P0_0_0x800000370301143F , ULL(0x800000370301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_OFFSET_P0_1_0x800004370301143F , ULL(0x800004370301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_OFFSET_P0_2_0x800008370301143F , ULL(0x800008370301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_OFFSET_P0_3_0x80000C370301143F , ULL(0x80000C370301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_OFFSET_P0_4_0x800010370301143F , ULL(0x800010370301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_OFFSET_P1_0_0x800100370301143F , ULL(0x800100370301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_OFFSET_P1_1_0x800104370301143F , ULL(0x800104370301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_OFFSET_P1_2_0x800108370301143F , ULL(0x800108370301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_OFFSET_P1_3_0x80010C370301143F , ULL(0x80010C370301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_OFFSET_P1_4_0x800110370301143F , ULL(0x800110370301143F) );
-
-
-//------------------------------------------------------------------------------
-//      ADR Output Force ATEST Control Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S0_0x800080350301143F , ULL(0x800080350301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S1_0x800084350301143F , ULL(0x800084350301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S0_0x800180350301143F , ULL(0x800180350301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S1_0x800184350301143F , ULL(0x800184350301143F) );
-
-//------------------------------------------------------------------------------
-//      ADR Output Driver Force Value Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P0_ADR32S0_0x800080360301143F , ULL(0x800080360301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P0_ADR32S1_0x800084360301143F , ULL(0x800084360301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P0_ADR32S0_0x800080370301143F , ULL(0x800080370301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P0_ADR32S1_0x800084370301143F , ULL(0x800084370301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P1_ADR32S0_0x800180360301143F , ULL(0x800180360301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P1_ADR32S1_0x800184360301143F , ULL(0x800184360301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P1_ADR32S0_0x800180370301143F , ULL(0x800180370301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P1_ADR32S1_0x800184370301143F , ULL(0x800184370301143F) );
-
-//------------------------------------------------------------------------------
-//      ADR Bit Enable Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_BIT_ENABLE_P0_ADR0_3_0x80007C000301143F , ULL(0x80007C000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_BIT_ENABLE_P1_ADR0_3_0x80017C000301143F , ULL(0x80017C000301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_BIT_ENABLE_P0_ADR0_0x800040000301143F , ULL(0x800040000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_BIT_ENABLE_P0_ADR1_0x800044000301143F , ULL(0x800044000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_BIT_ENABLE_P0_ADR2_0x800048000301143F , ULL(0x800048000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_BIT_ENABLE_P0_ADR3_0x80004C000301143F , ULL(0x80004C000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_BIT_ENABLE_P1_ADR0_0x800140000301143F , ULL(0x800140000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_BIT_ENABLE_P1_ADR1_0x800144000301143F , ULL(0x800144000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_BIT_ENABLE_P1_ADR2_0x800148000301143F , ULL(0x800148000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_ADR_BIT_ENABLE_P1_ADR3_0x80014C000301143F , ULL(0x80014C000301143F) );
-
-//------------------------------------------------------------------------------
-//      Data Bit Enable 0 Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_0_0x800000000301143F , ULL(0x800000000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_1_0x800004000301143F , ULL(0x800004000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_2_0x800008000301143F , ULL(0x800008000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_3_0x80000C000301143F , ULL(0x80000C000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_4_0x800010000301143F , ULL(0x800010000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_0_0x800100000301143F , ULL(0x800100000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_1_0x800104000301143F , ULL(0x800104000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_2_0x800108000301143F , ULL(0x800108000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_3_0x80010C000301143F , ULL(0x80010C000301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_4_0x800110000301143F , ULL(0x800110000301143F) );
-
-//------------------------------------------------------------------------------
-//      Data Bit Enable 1 Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_0x800000010301143F , ULL(0x800000010301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_0x800004010301143F , ULL(0x800004010301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_0x800008010301143F , ULL(0x800008010301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_0x80000C010301143F , ULL(0x80000C010301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_0x800010010301143F , ULL(0x800010010301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_0x800100010301143F , ULL(0x800100010301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_0x800104010301143F , ULL(0x800104010301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_0x800108010301143F , ULL(0x800108010301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_0x80010C010301143F , ULL(0x80010C010301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_0x800110010301143F , ULL(0x800110010301143F) );
-
-//------------------------------------------------------------------------------
-//      Data Bit Direction 0 Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DIR0_P0_0_5_0x80003C020301143F , ULL(0x80003C020301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DIR0_P1_0_5_0x80013C020301143F , ULL(0x80013C020301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DIR0_P0_0_0x800000020301143F , ULL(0x800000020301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DIR0_P0_1_0x800004020301143F , ULL(0x800004020301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DIR0_P0_2_0x800008020301143F , ULL(0x800008020301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DIR0_P0_3_0x80000C020301143F , ULL(0x80000C020301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DIR0_P0_4_0x800010020301143F , ULL(0x800010020301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DIR0_P1_0_0x800100020301143F , ULL(0x800100020301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DIR0_P1_1_0x800104020301143F , ULL(0x800104020301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DIR0_P1_2_0x800108020301143F , ULL(0x800108020301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DIR0_P1_3_0x80010C020301143F , ULL(0x80010C020301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DATA_BIT_DIR0_P1_4_0x800110020301143F , ULL(0x800110020301143F) );
-
-//------------------------------------------------------------------------------
-//      DQS CLK Phase Rotators 0
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_0_0x800000300301143F , ULL(0x800000300301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_1_0x800004300301143F , ULL(0x800004300301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_2_0x800008300301143F , ULL(0x800008300301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_3_0x80000C300301143F , ULL(0x80000C300301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_4_0x800010300301143F , ULL(0x800010300301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_0_0x800100300301143F , ULL(0x800100300301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_1_0x800104300301143F , ULL(0x800104300301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_2_0x800108300301143F , ULL(0x800108300301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_3_0x80010C300301143F , ULL(0x80010C300301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_4_0x800110300301143F , ULL(0x800110300301143F) );
-
-//------------------------------------------------------------------------------
-//      DQS CLK Phase Rotators 1
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_0_0x800000310301143F , ULL(0x800000310301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_1_0x800004310301143F , ULL(0x800004310301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_2_0x800008310301143F , ULL(0x800008310301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_3_0x80000C310301143F , ULL(0x80000C310301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_4_0x800010310301143F , ULL(0x800010310301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_0_0x800100310301143F , ULL(0x800100310301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_1_0x800104310301143F , ULL(0x800104310301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_2_0x800108310301143F , ULL(0x800108310301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_3_0x80010C310301143F , ULL(0x80010C310301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_4_0x800110310301143F , ULL(0x800110310301143F) );
-
-
-//------------------------------------------------------------------------------
-//      Read clock Address for all rank pairs and all ports and all DP18s
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0_0x800000040301143F , ULL(0x800000040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0_0x800001040301143F , ULL(0x800001040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0_0x800002040301143F , ULL(0x800002040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0_0x800003040301143F , ULL(0x800003040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1_0x800004040301143F , ULL(0x800004040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1_0x800005040301143F , ULL(0x800005040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1_0x800006040301143F , ULL(0x800006040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1_0x800007040301143F , ULL(0x800007040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2_0x800008040301143F , ULL(0x800008040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2_0x800009040301143F , ULL(0x800009040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2_0x80000A040301143F , ULL(0x80000A040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2_0x80000B040301143F , ULL(0x80000B040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3_0x80000C040301143F , ULL(0x80000C040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3_0x80000D040301143F , ULL(0x80000D040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3_0x80000E040301143F , ULL(0x80000E040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3_0x80000F040301143F , ULL(0x80000F040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4_0x800010040301143F , ULL(0x800010040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4_0x800011040301143F , ULL(0x800011040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4_0x800012040301143F , ULL(0x800012040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4_0x800013040301143F , ULL(0x800013040301143F));
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0_0x800100040301143F , ULL(0x800100040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0_0x800101040301143F , ULL(0x800101040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0_0x800102040301143F , ULL(0x800102040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0_0x800103040301143F , ULL(0x800103040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1_0x800104040301143F , ULL(0x800104040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1_0x800105040301143F , ULL(0x800105040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1_0x800106040301143F , ULL(0x800106040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1_0x800107040301143F , ULL(0x800107040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2_0x800108040301143F , ULL(0x800108040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2_0x800109040301143F , ULL(0x800109040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2_0x80010A040301143F , ULL(0x80010A040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2_0x80010B040301143F , ULL(0x80010B040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3_0x80010C040301143F , ULL(0x80010C040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3_0x80010D040301143F , ULL(0x80010D040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3_0x80010E040301143F , ULL(0x80010E040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3_0x80010F040301143F , ULL(0x80010F040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4_0x800110040301143F , ULL(0x800110040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4_0x800111040301143F , ULL(0x800111040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4_0x800112040301143F , ULL(0x800112040301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4_0x800113040301143F , ULL(0x800113040301143F));
-
-//------------------------------------------------------------------------------
-//     Write Clock Enable registers for Rank Pair 0
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_0x800000050301143F , ULL(0x800000050301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_0x800004050301143F , ULL(0x800004050301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_0x800008050301143F , ULL(0x800008050301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_0x80000C050301143F , ULL(0x80000C050301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_0x800010050301143F , ULL(0x800010050301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_0x800100050301143F , ULL(0x800100050301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_0x800104050301143F , ULL(0x800104050301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_0x800108050301143F , ULL(0x800108050301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_0x80010C050301143F , ULL(0x80010C050301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_0x800110050301143F , ULL(0x800110050301143F) );
-
-//------------------------------------------------------------------------------
-//     DQS Phase Select Rank Pair 0
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_0x800000090301143F , ULL(0x800000090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_0x800004090301143F , ULL(0x800004090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_0x800008090301143F , ULL(0x800008090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_0x80000C090301143F , ULL(0x80000C090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_0x800010090301143F , ULL(0x800010090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_0x800100090301143F , ULL(0x800100090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_0x800104090301143F , ULL(0x800104090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_0x800108090301143F , ULL(0x800108090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_0x80010C090301143F , ULL(0x80010C090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_0x800110090301143F , ULL(0x800110090301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_0x800001090301143F , ULL(0x800001090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_0x800005090301143F , ULL(0x800005090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_0x800009090301143F , ULL(0x800009090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_0x80000D090301143F , ULL(0x80000D090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_0x800011090301143F , ULL(0x800011090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_0x800101090301143F , ULL(0x800101090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_0x800105090301143F , ULL(0x800105090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_0x800109090301143F , ULL(0x800109090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_0x80010D090301143F , ULL(0x80010D090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_0x800111090301143F , ULL(0x800111090301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_0x800002090301143F , ULL(0x800002090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_0x800006090301143F , ULL(0x800006090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_0x80000A090301143F , ULL(0x80000A090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_0x80000E090301143F , ULL(0x80000E090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_0x800012090301143F , ULL(0x800012090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_0x800102090301143F , ULL(0x800102090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_0x800106090301143F , ULL(0x800106090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_0x80010A090301143F , ULL(0x80010A090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_0x80010E090301143F , ULL(0x80010E090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_0x800112090301143F , ULL(0x800112090301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_0x800003090301143F , ULL(0x800003090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_0x800007090301143F , ULL(0x800007090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_0x80000B090301143F , ULL(0x80000B090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_0x80000F090301143F , ULL(0x80000F090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_0x800013090301143F , ULL(0x800013090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_0x800103090301143F , ULL(0x800103090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_0x800107090301143F , ULL(0x800107090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_0x80010B090301143F , ULL(0x80010B090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_0x80010F090301143F , ULL(0x80010F090301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_0x800113090301143F , ULL(0x800113090301143F) );
-
-//------------------------------------------------------------------------------
-//     READ TIMING REFERENCE REGS
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_0_0x800000700301143F , ULL(0x800000700301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_1_0x800004700301143F , ULL(0x800004700301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_2_0x800008700301143F , ULL(0x800008700301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_3_0x80000C700301143F , ULL(0x80000C700301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_4_0x800010700301143F , ULL(0x800010700301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_0_0x800000710301143F , ULL(0x800000710301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_1_0x800004710301143F , ULL(0x800004710301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_2_0x800008710301143F , ULL(0x800008710301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_3_0x80000C710301143F , ULL(0x80000C710301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_4_0x800010710301143F , ULL(0x800010710301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_0_0x800100700301143F , ULL(0x800100700301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_1_0x800104700301143F , ULL(0x800104700301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_2_0x800108700301143F , ULL(0x800108700301143F	) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_3_0x80010C700301143F , ULL(0x80010C700301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_4_0x800110700301143F , ULL(0x800110700301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_0_0x800100710301143F , ULL(0x800100710301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_1_0x800104710301143F , ULL(0x800104710301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_2_0x800108710301143F , ULL(0x800108710301143F	) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_3_0x80010C710301143F , ULL(0x80010C710301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_4_0x800110710301143F , ULL(0x800110710301143F) );
-
-
-//------------------------------------------------------------------------------
-//     DQS Gate Delay
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP0_P0_0_0x800000130301143F , ULL(0x800000130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP0_P0_1_0x800004130301143F , ULL(0x800004130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP0_P0_2_0x800008130301143F , ULL(0x800008130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP0_P0_3_0x80000C130301143F , ULL(0x80000C130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP0_P0_4_0x800010130301143F , ULL(0x800010130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP0_P1_0_0x800100130301143F , ULL(0x800100130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP0_P1_1_0x800104130301143F , ULL(0x800104130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP0_P1_2_0x800108130301143F , ULL(0x800108130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP0_P1_3_0x80010C130301143F , ULL(0x80010C130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP0_P1_4_0x800110130301143F , ULL(0x800110130301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP1_P0_0_0x800001130301143F , ULL(0x800001130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP1_P0_1_0x800005130301143F , ULL(0x800005130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP1_P0_2_0x800009130301143F , ULL(0x800009130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP1_P0_3_0x80000D130301143F , ULL(0x80000D130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP1_P0_4_0x800011130301143F , ULL(0x800011130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP1_P1_0_0x800101130301143F , ULL(0x800101130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP1_P1_1_0x800105130301143F , ULL(0x800105130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP1_P1_2_0x800109130301143F , ULL(0x800109130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP1_P1_3_0x80010D130301143F , ULL(0x80010D130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP1_P1_4_0x800111130301143F , ULL(0x800111130301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP2_P0_0_0x800002130301143F , ULL(0x800002130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP2_P0_1_0x800006130301143F , ULL(0x800006130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP2_P0_2_0x80000A130301143F , ULL(0x80000A130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP2_P0_3_0x80000E130301143F , ULL(0x80000E130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP2_P0_4_0x800012130301143F , ULL(0x800012130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP2_P1_0_0x800102130301143F , ULL(0x800102130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP2_P1_1_0x800106130301143F , ULL(0x800106130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP2_P1_2_0x80010A130301143F , ULL(0x80010A130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP2_P1_3_0x80010E130301143F , ULL(0x80010E130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP2_P1_4_0x800112130301143F , ULL(0x800112130301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP3_P0_0_0x800003130301143F , ULL(0x800003130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP3_P0_1_0x800007130301143F , ULL(0x800007130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP3_P0_2_0x80000B130301143F , ULL(0x80000B130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP3_P0_3_0x80000F130301143F , ULL(0x80000F130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP3_P0_4_0x800013130301143F , ULL(0x800013130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP3_P1_0_0x800103130301143F , ULL(0x800103130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP3_P1_1_0x800107130301143F , ULL(0x800107130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP3_P1_2_0x80010B130301143F , ULL(0x80010B130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP3_P1_3_0x80010F130301143F , ULL(0x80010F130301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_GATE_DELAY_RP3_P1_4_0x800113130301143F , ULL(0x800113130301143F) );
-
-
-//------------------------------------------------------------------------------
-//    RC config registers 0 and 3
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_RC_CONFIG0_P0_0x8000C8000301143F , ULL (0x8000C8000301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_RC_CONFIG0_P1_0x8001C8000301143F , ULL (0x8001C8000301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_RC_CONFIG3_P0_0x8000C8070301143F , ULL (0x8000C8070301143F));
-CONST_UINT64_T( DPHY01_DDRPHY_RC_CONFIG3_P1_0x8001C8070301143F , ULL (0x8001C8070301143F));
-//------------------------------------------------------------------------------
-//     MBS Fixed Data Seed Registers
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS_MCBIST01_MBS_MCBFD0Q_0x02011681  , ULL(0x02011681) );
-CONST_UINT64_T( MBS_MCBIST01_MBS_MCBFD1Q_0x02011682  , ULL(0x02011682) );
-CONST_UINT64_T( MBS_MCBIST01_MBS_MCBFD2Q_0x02011683  , ULL(0x02011683) );
-CONST_UINT64_T( MBS_MCBIST01_MBS_MCBFD3Q_0x02011684  , ULL(0x02011684) );
-CONST_UINT64_T( MBS_MCBIST01_MBS_MCBFD4Q_0x02011685  , ULL(0x02011685) );
-CONST_UINT64_T( MBS_MCBIST01_MBS_MCBFD5Q_0x02011686  , ULL(0x02011686) );
-CONST_UINT64_T( MBS_MCBIST01_MBS_MCBFD6Q_0x02011687  , ULL(0x02011687) );
-CONST_UINT64_T( MBS_MCBIST01_MBS_MCBFD7Q_0x02011688  , ULL(0x02011688) );
-CONST_UINT64_T( MBS_MCBIST01_MBS_MCBFDQ_0x02011689   , ULL(0x02011689) );
-CONST_UINT64_T( MBS_MCBIST01_MBS_MCBFDSPQ_0x0201168A , ULL(0x0201168A) );
-
-
-CONST_UINT64_T( MBS_MCBIST23_MBS_MCBFD0Q_0x02011781  , ULL(0x02011781) );
-CONST_UINT64_T( MBS_MCBIST23_MBS_MCBFD1Q_0x02011782  , ULL(0x02011782) );
-CONST_UINT64_T( MBS_MCBIST23_MBS_MCBFD2Q_0x02011783  , ULL(0x02011783) );
-CONST_UINT64_T( MBS_MCBIST23_MBS_MCBFD3Q_0x02011784  , ULL(0x02011784) );
-CONST_UINT64_T( MBS_MCBIST23_MBS_MCBFD4Q_0x02011785  , ULL(0x02011785) );
-CONST_UINT64_T( MBS_MCBIST23_MBS_MCBFD5Q_0x02011786  , ULL(0x02011786) );
-CONST_UINT64_T( MBS_MCBIST23_MBS_MCBFD6Q_0x02011787  , ULL(0x02011787) );
-CONST_UINT64_T( MBS_MCBIST23_MBS_MCBFD7Q_0x02011788  , ULL(0x02011788) );
-CONST_UINT64_T( MBS_MCBIST23_MBS_MCBFDQ_0x02011789   , ULL(0x02011789) );
-CONST_UINT64_T( MBS_MCBIST23_MBS_MCBFDSPQ_0x0201178A , ULL(0x0201178A) );
-//------------------------------------------------------------------------------
-//     MBA Configured Command Sequence Registers
-//------------------------------------------------------------------------------
-
-CONST_UINT64_T( MBA01_CCS_MODEQ_0x030106a7       		, ULL(0x030106a7) );
-CONST_UINT64_T( MBA01_MCBIST_MCB_CNTLSTATQ_0x030106dc	, ULL(0x030106dc) );
-//------------------------------------------------------------------------------
-//     MBA MCBIST Configuration Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MCBIST_MCBCFGQ_0x030106e0  		, ULL(0x030106e0) );
-
-//------------------------------------------------------------------------------
-//     MBS Error Map Register
-
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS_MCBIST01_MCBEMA1Q_0x0201166a 		, ULL(0x0201166a) );
-CONST_UINT64_T( MBS_MCBIST01_MCBEMA2Q_0x0201166b 		, ULL(0x0201166b) );
-CONST_UINT64_T( MBS_MCBIST01_MCBEMA3Q_0x0201166c 		, ULL(0x0201166c) );
-CONST_UINT64_T( MBS_MCBIST01_MCBEMB1Q_0x0201166d 		, ULL(0x0201166d) );
-CONST_UINT64_T( MBS_MCBIST01_MCBEMB2Q_0x0201166e 		, ULL(0x0201166e) );
-CONST_UINT64_T( MBS_MCBIST01_MCBEMB3Q_0x0201166f 		, ULL(0x0201166f) );
-//------------------------------------------------------------------------------
-//     MBA MCBIST Memory Register
-
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MCBIST_MCBMR0Q_0x030106a8  		, ULL(0x030106a8) );
-CONST_UINT64_T( MBA01_MCBIST_MCBMR1Q_0x030106a9  		, ULL(0x030106a9) );
-CONST_UINT64_T( MBA01_MCBIST_MCBMR2Q_0x030106aa  		, ULL(0x030106aa) );
-CONST_UINT64_T( MBA01_MCBIST_MCBMR3Q_0x030106ab  		, ULL(0x030106ab) );
-CONST_UINT64_T( MBA01_MCBIST_MCBMR4Q_0x030106ac  		, ULL(0x030106ac) );
-CONST_UINT64_T( MBA01_MCBIST_MCBMR5Q_0x030106ad  		, ULL(0x030106ad) );
-CONST_UINT64_T( MBA01_MCBIST_MCBMR6Q_0x030106ae  		, ULL(0x030106ae) );
-CONST_UINT64_T( MBA01_MCBIST_MCBMR7Q_0x030106df  		, ULL(0x030106df) );
-CONST_UINT64_T( MBA01_MCBIST_RUNTIMECTRQ_0x030106b0		, ULL(0x030106b0) );
-//------------------------------------------------------------------------------
-//     MBA Fixed Data Seed Registers
-
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MCBIST_MCBFD0Q_0x030106be  		, ULL(0x030106be) );
-CONST_UINT64_T( MBA01_MCBIST_MCBFD1Q_0x030106bf  		, ULL(0x030106bf) );
-CONST_UINT64_T( MBA01_MCBIST_MCBFD2Q_0x030106c0  		, ULL(0x030106c0) );
-CONST_UINT64_T( MBA01_MCBIST_MCBFD3Q_0x030106c1  		, ULL(0x030106c1) );
-CONST_UINT64_T( MBA01_MCBIST_MCBFD4Q_0x030106c2  		, ULL(0x030106c2) );
-CONST_UINT64_T( MBA01_MCBIST_MCBFD5Q_0x030106c3  		, ULL(0x030106c3) );
-CONST_UINT64_T( MBA01_MCBIST_MCBFD6Q_0x030106c4  		, ULL(0x030106c4) );
-CONST_UINT64_T( MBA01_MCBIST_MCBFD7Q_0x030106c5  		, ULL(0x030106c5) );
-CONST_UINT64_T( MBA01_MCBIST_MCBFDQ_0x030106c6   		, ULL(0x030106c6) );
-CONST_UINT64_T( MBA01_MCBIST_MCBFDSPQ_0x030106c7 		, ULL(0x030106c7) );
-//------------------------------------------------------------------------------
-//     MBA Data Rotate Configuration Register
-
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MCBIST_MCBDRCRQ_0x030106bd 		, ULL(0x030106bd) );
-//------------------------------------------------------------------------------
-//    MBS Compare Mask Registers
-
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS_MCBIST01_MCBCMA1Q_0x02011672 		, ULL(0x02011672) );
-
-CONST_UINT64_T( MBS_MCBIST01_MCBCMB1Q_0x02011673 		, ULL(0x02011673) );
-CONST_UINT64_T( MBS_MCBIST01_MCBCMABQ_0x02011674 		, ULL(0x02011674) );
-//------------------------------------------------------------------------------
-//    MBA MCBIST Control Register
-
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MCBIST_MCB_CNTLQ_0x030106db		, ULL(0x030106db) );
-//------------------------------------------------------------------------------
-//    MBA MCBIST Memory Parameter Register
-
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MCBIST_MCBPARMQ_0x030106af 		, ULL(0x030106af) );
-//------------------------------------------------------------------------------
-//    MBA Address Map Registers
-
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MCBIST_MCBAMR0A0Q_0x030106c8, ULL(0x030106c8) );
-CONST_UINT64_T( MBA01_MCBIST_MCBAMR1A0Q_0x030106c9, ULL(0x030106c9) );
-CONST_UINT64_T( MBA01_MCBIST_MCBAMR2A0Q_0x030106ca, ULL(0x030106ca) );
-CONST_UINT64_T( MBA01_MCBIST_MCBAMR3A0Q_0x030106cb, ULL(0x030106cb) );
-
-CONST_UINT64_T( MBA01_MCBIST_MCBAMR0A1Q_0x030106d7, ULL(0x030106d7) );
-
-CONST_UINT64_T( MBA01_MCBIST_MCBAMR1A1Q_0x030106d8, ULL(0x030106d8) );
-CONST_UINT64_T( MBA01_MCBIST_MCBAMR2A1Q_0x030106d9, ULL(0x030106d9) );
-CONST_UINT64_T( MBA01_MCBIST_MCBAMR3A1Q_0x030106da, ULL(0x030106da) );
-
-CONST_UINT64_T( MBA01_MCBIST_MCBLFSRA0Q_0x030106d4, ULL(0x030106d4) );
-CONST_UINT64_T( MBA01_MCBIST_MCBLFSRA1Q_0x030106d5, ULL(0x030106d5) );
-CONST_UINT64_T( MBA01_MCBIST_MCBSEARA0Q_0x030106d2, ULL(0x030106d2) );
-CONST_UINT64_T( MBA01_MCBIST_MCBSEARA1Q_0x030106d3, ULL(0x030106d3) );
-CONST_UINT64_T( MBA01_MCBIST_MCBRSARA0Q_0x030106cc, ULL(0x030106cc) );
-
-CONST_UINT64_T( MBA01_MCBIST_MCBRSARA1Q_0x030106cd, ULL(0x030106cd) );
-
-CONST_UINT64_T( MBA01_MCBIST_MCBREARA0Q_0x030106ce, ULL(0x030106ce) );
-CONST_UINT64_T( MBA01_MCBIST_MCBREARA1Q_0x030106cf, ULL(0x030106cf) );
-CONST_UINT64_T( MBA01_MCBIST_MCBSSARA0Q_0x030106d0, ULL(0x030106d0) );
-CONST_UINT64_T( MBA01_MCBIST_MCBSSARA1Q_0x030106d1, ULL(0x030106d1) );
-CONST_UINT64_T( MBA01_MCBIST_MCBAGRAQ_0x030106d6  , ULL(0x030106d6) );
-//------------------------------------------------------------------------------
-//    MBA Performance monitor  Registers
-
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBA_PMU0Q_0x03010437        , ULL(0x03010437) );
-//------------------------------------------------------------------------------
-//    MBA Maintenance Buffer Registers
-
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBS_MCBIST01_MCB_ERRCNTA1Q_0x02011664, ULL(0x02011664) );
-CONST_UINT64_T( MBS_MCBIST01_MCB_ERRCNTA2Q_0x02011665, ULL(0x02011665) );
-CONST_UINT64_T( MBS_MCBIST01_MCB_ERRCNTB1Q_0x02011667, ULL(0x02011667) );
-CONST_UINT64_T( MBS_MCBIST01_MCB_ERRCNTB2Q_0x02011668, ULL(0x02011668) );
-//------------------------------------------------------------------------------
-//    DPHY01 PC Rank Pair Registers
-
-//------------------------------------------------------------------------------
-CONST_UINT64_T( DPHY01_DDRPHY_PC_RANK_PAIR0_P0, ULL(0x8000c0020301143f) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_RANK_PAIR0_P1, ULL(0x8001c0020301143f) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_RANK_PAIR1_P0, ULL(0x8000c0030301143f) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_RANK_PAIR1_P1, ULL(0x8001c0030301143f) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_RANK_PAIR2_P0, ULL(0x8000c0300301143f) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_RANK_PAIR2_P1, ULL(0x8001c0300301143f) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_RANK_PAIR3_P0, ULL(0x8000c0310301143f) );
-CONST_UINT64_T( DPHY01_DDRPHY_PC_RANK_PAIR3_P1, ULL(0x8001c0310301143f) );
-//------------------------------------------------------------------------------
-//    MCBIST Random Data Seed Registers
-
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MCBIST_MCBRDS0Q_0x030106b2                     , ULL(0x030106b2) );
-CONST_UINT64_T( MBA01_MCBIST_MCBRDS1Q_0x030106b3                     , ULL(0x030106b3) );
-CONST_UINT64_T( MBA01_MCBIST_MCBRDS2Q_0x030106b4                     , ULL(0x030106b4) );
-CONST_UINT64_T( MBA01_MCBIST_MCBRDS3Q_0x030106b5                     , ULL(0x030106b5) );
-CONST_UINT64_T( MBA01_MCBIST_MCBRDS4Q_0x030106b6                     , ULL(0x030106b6) );
-CONST_UINT64_T( MBA01_MCBIST_MCBRDS5Q_0x030106b7                     , ULL(0x030106b7) );
-CONST_UINT64_T( MBA01_MCBIST_MCBRDS6Q_0x030106b8                     , ULL(0x030106b8) );
-CONST_UINT64_T( MBA01_MCBIST_MCBRDS7Q_0x030106b9                     , ULL(0x030106b9) );
-CONST_UINT64_T( MBA01_MCBIST_MCBRDS8Q_0x030106ba                     , ULL(0x030106ba) );
-CONST_UINT64_T( MBA01_MCBIST_MCBDRSRQ_0x030106bc                     , ULL(0x030106bc) );
-
-//------------------------------------------------------------------------------
-//    Final ARB Parameters
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBA_FARB0Q_0x03010413, ULL(0x03010413) );
-
-//------------------------------------------------------------------------------
-//    N/M Throttling Control Register
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBA01_MBA_FARB3Q_0x03010416, ULL(0x03010416) );
-
-
-/******************************************************************************/
-/*********  MULTICAST REGISTER DEFINITIONS FOR PERVASIVE INITs ****************/
-/******************************************************************************/
-// moved to common_scom_addresses.H       1/24/2010   mfred
-
-
-//******************************************************************************/
-//*********  ADDRESS PREFIXES FOR SUBROUTINE SCAN0_MODULE CALLS ****************/
-//******************************************************************************/
-// moved to common_scom_addresses.H       1/24/2010   mfred
-CONST_UINT64_T( CEN_SCAN_CLK_PLL,                   ULL(0x08100E0000000000) );
-CONST_UINT64_T( CEN_SCAN_PLL_GPTR,                  ULL(0x0810020000000000) );
-CONST_UINT64_T( CEN_SCAN_PLL_BNDY_FUNC,             ULL(0x0810080800000000) );
-
-CONST_UINT64_T( SCAN_ALL_BUT_VITALPLLGPTRTIME,      ULL(0x0FE00DCE00000000) );
-CONST_UINT64_T( SCAN_GPTR_TIME_REP_NO_PLL,          ULL(0x0FE0023000000000) );
-
-//------------------------------------------------------------------------------
-////    DPHYXX_DDRPHY_DP18_RD_DIA_CONFIG5 Registers
-////------------------------------------------------------------------------------
-//
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_0x800000120301143F , ULL(0x800000120301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_0x800004120301143F , ULL(0x800004120301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_0x800008120301143F , ULL(0x800008120301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_0x80000C120301143F , ULL(0x80000C120301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_0x800010120301143F , ULL(0x800010120301143F) );
-
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_0x800100120301143F , ULL(0x800100120301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_0x800104120301143F , ULL(0x800104120301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_0x800108120301143F , ULL(0x800108120301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_0x80010C120301143F , ULL(0x80010C120301143F) );
-CONST_UINT64_T( DPHY01_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_0x800110120301143F,  ULL(0x800110120301143F) );
-
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_0x800000120301183F , ULL(0x800000120301183F) );
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_0x800004120301183F , ULL(0x800004120301183F) );
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_0x800008120301183F , ULL(0x800008120301183F) );
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_0x80000C120301183F , ULL(0x80000C120301183F) );
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_0x800010120301183F , ULL(0x800010120301183F) );
-                                                                                               
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_0x800100120301183F , ULL(0x800100120301183F) );
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_0x800104120301183F , ULL(0x800104120301183F) );
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_0x800108120301183F , ULL(0x800108120301183F) );
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_0x80010C120301183F , ULL(0x80010C120301183F) );
-CONST_UINT64_T( DPHY23_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_0x800110120301183F,  ULL(0x800110120301183F) );
-
-
-
-#endif
-
-
-/*
-*************** Do not edit this area ***************
-This section is automatically updated by CVS when you check in this file.
-Be sure to create CVS comments when you commit so that they can be included here.
-
-$Log: cen_scom_addresses.H,v $
-Revision 1.72  2015/06/03 14:04:20  sglancy
-Added DQS_OFFSET registers for training.C
-
-Revision 1.71  2015/02/12 22:05:07  gollub
-
-/!/  1.71   | gollub   |12-FEB-15| Added MBACALFIR_OR, MBACALFIR_AND
-/!/         |          |         | Added MBA_DSM0
-/!/         |          |         | Added MBA_FARB0
-
-Revision 1.70  2014/07/15 13:42:27  jmcgill
-add FIR/repair loader register definitions for FFDC collection (SW260441)
-
-Revision 1.69  2014/04/07 17:59:13  gollub
-
-/!/  1.69   | gollub   |07-APR-14| Added MBSCFGQ so we can enable/disable exit point 1
-
-Revision 1.68  2014/03/28 21:06:47  jdsloat
-ADDED MEM SCOM CCS MODEQ, STATQ, and CAL FIR addresses.
-
-Revision 1.67  2013/12/16 19:38:35  dsanner
-Fix compile error for proc_mpipl_clear_xstop.C
-
-Revision 1.66  2013/12/16 10:16:45  sasethur
-added power control registers
-
-Revision 1.65  2013/11/05 20:33:31  bellows
-Added MBI_CRCSYN
-
-Revision 1.64  2013/08/22 19:46:32  mjjones
-Added DMI-FIR and WOF registers
-
-Revision 1.63  2013/06/18 15:20:21  mwuu
-Fixed naming of IO_FET_SLICE_EN_MAP1_P0_ADR0:3
-
-Revision 1.62  2013/06/18 15:13:47  mwuu
-Fixed naming of IO_FET_SLICE_EN_MAP1_P0_ADR0_3_0x80007C210301143F and for port 1 as well
-
-Revision 1.61  2013/06/10 22:36:15  lapietra
-Added DP18 Cfg 5 Regs
-
-Revision 1.60  2013/06/10 14:51:12  mwuu
-Added PHY N/PFET SLICE broadcast regs,
-renamed DATA_BIT_ENABLE1 regs to match address,
-added DATA_BIT_DIR0, and ADR_BIT_ENABLE regs,
-added ADR_OUTPUT_DRIVER_FORCE_VALUE regs,
-added ADR_OUTPUT_FORCE_ATEST_CNTL regs,
-added ADR_IO_FET_SLICE_EN_MAP regs
-for ADR/DP18 flush workaround.
-
-Revision 1.59  2013/05/28 12:59:24  bellows
-Added power down regs
-
-Revision 1.58  2013/05/15 14:49:54  jdsloat
-
-Added WC_CONFIG1 and WC_CONFIG2 regs
-
-Revision 1.57  2013/04/11 23:41:36  jdsloat
-Added DQS Gate Delay Values
-
-Revision 1.56  2013/04/04 20:32:53  jdsloat
-Added DPHY01_DDRPHY_WC_CONFIG3 regs
-
-Revision 1.55  2013/04/03 20:43:25  jdsloat
-Fixed MR Sec shadow regs
-
-Revision 1.54  2013/03/08 23:25:10  jdsloat
-added MBA01_MBARPC0Q_0x03010434
-
-Revision 1.53  2013/03/07 17:01:39  gweber
-added centaur-only SCAN_ constants
-
-Revision 1.52  2013/02/27 20:36:18  jdsloat
-
-Fixed additional typos in READ TIMING REF
-
-Revision 1.51  2013/02/27 19:03:22  lapietra
-Fixed typos
-
-Revision 1.50  2013/02/27 16:43:31  jdsloat
-Added READ TIMING REFERENCE REGS
-
-Revision 1.49  2013/01/24 00:56:27  jdsloat
-Added PC_RANK_GROUP and PC_RANK_GROUP_EXT
-
-Revision 1.48  2013/01/09 20:32:14  jdsloat
-
-Fixed typos.  Excuse me.
-
-Revision 1.47  2013/01/09 20:10:20  jdsloat
-Added DQS READ Phase select regs for RP 1-3
-
-Revision 1.46  2012/12/19 15:31:24  gollub
-
-Added:
-MCBERRPTQ
-MBA_MAINT_BUFF
-MBA_MAINT_BUFF_65TH_BYTE_64B_ECC
-MBA_ERR_REPORTQ
-MBSECCERR
-MBMMRQ
-MBS_MAINT_BUFF0_DATA
-MBS_MAINT_BUFF0_DATA_ECC
-MBSEC
-MBSSYMEC
-MBSEVRQ
-MBNCERQ
-MBRCERQ
-MBMPERQ
-MBUERQ
-
-Revision 1.45  2012/11/20 18:51:15  lapietra
-Fixed errors in get_data
-
-Revision 1.44  2012/11/19 16:17:47  lapietra
-Added ECID Addresses
-
-Revision 1.43  2012/11/19 05:08:15  jmcgill
-add mem chiplet debug status register
-
-Revision 1.42  2012/11/09 14:53:43  pardeik
-added N/M throttle register back in... somehow it was removed
-
-Revision 1.41  2012/11/09 14:47:30  gollub
-
-Added MBECCFIR AND/OR MASK registers
-Added MBSPA AND/OR MASK registers
-
-Revision 1.40  2012/11/08 15:54:21  lapietra
-Added addresses necessary for loopback characerization test
-
-Revision 1.39  2012/10/31 13:44:30  pardeik
-Added N/M throttling control register
-
-Revision 1.38  2012/10/26 09:44:56  sasethur
- Added MCBIST Random Data Seed Registers
-
-Revision 1.37  2012/10/26 02:05:07  mwuu
-Added PHY port 1 disable bit registers
-
-Revision 1.36  2012/10/26 00:19:53  mwuu
-Added PHY disable bit registers
-
-Revision 1.35  2012/10/16 03:44:53  jmcgill
-restore TP trace array address constants (Centaur addresses here are unique and are not the same as those included in common_scom_addresses header)
-
-Revision 1.34  2012/10/12 12:43:32  sasethur
-Added MCBIST and DPHY registers
-
-Revision 1.33  2012/10/12 03:17:07  baysah
-Added MBI FIR mask and action registers.
-
-Revision 1.32  2012/10/11 22:39:53  mwuu
-Added PHY slew calibration registers
-
-Revision 1.31  2012/10/10 21:26:29  bellows
-removed duplicate scom address
-
-Revision 1.30  2012/10/09 18:15:46  mwuu
-Added PHY slew registers
-
-Revision 1.29  2012/09/28 13:32:34  lapietra
-Added registers for loopback (NFET/PFET Slice, DFT Wrap Status, Data Bit Enable 0/1, Read clock, write clock, and RC config 0 and 3 registers)
-
-Revision 1.28  2012/09/10 14:34:14  jdsloat
-Fixed MBA CAL Names
-
-Revision 1.27  2012/09/07 21:29:39  gollub
-
-Fixed address for MBA01_MBA_WRD_MODE
-Added Maint Read Buffers 65th Byte
-
-Revision 1.26  2012/09/06 18:39:34  jdsloat
-Added MBA CAL Registers
-
-Revision 1.25  2012/09/06 13:28:25  gollub
-
-Added more FIR registers.
-
-Revision 1.24  2012/08/20 17:12:23  jdsloat
-Added Primary Rank Pair MRS Shadow Regs
-
-Revision 1.23  2012/08/17 20:15:03  gollub
-
-Added MBS FIR Registers
-Added DDRPHY FIR Registers
-Added MBA_RRQ Register
-
-Revision 1.22  2012/06/18 01:58:44  jmcgill
-added trace related SCOM addresses
-
-Revision 1.21  2012/05/23 15:54:03  gollub
-
-Added regs needed for mss_maint_cmds.
-
-Revision 1.20  2012/05/17 21:55:05  jdsloat
-Added MBA/MBS level PM, REF register addresses
-
-Revision 1.19  2012/04/25 22:28:06  gollub
-Added MBS ECC regs
-
-Revision 1.18  2012/04/16 23:56:39  bcbrock
-Corrected problems related to C/C++ and 32-bit/64-bit portability and Host
-Boot after initial review by FW team.
-
-o Renamed fapi_sbe_common.h to fapi_sbe_common.H
-
-Revision 1.17  2012/03/30 19:59:23  mfred
-removing dphy23 addresses completely.  Should not be needed.
-
-Revision 1.16  2012/03/30 19:29:44  mfred
-Fix some DPHY23 addresses and comment out all the DPHY23 addresses.  Should not be needed.
-
-Revision 1.15  2012/03/06 16:40:00  divyakum
-Added calibration status regs
-
-Revision 1.14  2012/02/22 22:50:52  divyakum
-Added CALIBRATION registers. Added Change history table.
-
-Revision 1.13  2012/01/24 21:58:33  mfred
-Moved common multicast address constants to common_scom_accresses.H
-
-Revision 1.12  2012/01/24 20:50:01  mfred
-Move multicast group 1 to group 3 for consistency with P8
-
-Revision 1.11  2012/01/06 22:34:45  jmcgill
-move shared/common addresses to common_scom_addresses.H, general cleanup
-
-Revision 1.10  2011/10/26 21:37:03  mfred
-Fix error.  Extra space in an address was causing compile failure.
-
-Revision 1.9  2011/10/25 22:53:46  mfred
-Added MEM chiplet indirect scom addresses (DPHY registers).
-
-Revision 1.8  2011/09/20 15:51:30  venton
-Add missing SCOMs from P8
-
-Revision 1.7  2011/08/02 20:28:40  mfred
-added some 8-bit constants for use with P0 and P1
-
-Revision 1.6  2011/07/28 14:44:51  mfred
-Added more multicast addresses.
-
-Revision 1.5  2011/07/27 20:08:01  mfred
-Added multicast addresses for OPCG, etc.
-
-Revision 1.3  2011/07/25 13:03:53  gweber
-moved centaur constants from p8_scom_addresses.H
-
-Revision 1.2  2011/07/13 18:35:13  mfred
-Get rid of some temp lines and comments.
-
-Revision 1.1  2011/07/07 13:07:52  mfred
-Adding first version of scom address file.  Was created from P8 version.
-
-
-
-
-*/
diff --git a/src/usr/hwpf/hwp/include/common_scom_addresses.H b/src/usr/hwpf/hwp/include/common_scom_addresses.H
deleted file mode 100755
index 439eea9fc..000000000
--- a/src/usr/hwpf/hwp/include/common_scom_addresses.H
+++ /dev/null
@@ -1,806 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/include/common_scom_addresses.H $            */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: common_scom_addresses.H,v 1.49 2014/01/30 16:19:26 mfred Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/common_scom_addresses.H,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-//------------------------------------------------------------------------------
-// *! TITLE : common_scom_addresses.H
-// *! DESCRIPTION : Defines for common/generic scom addresses shared between P8/Centaur
-// *! OWNER NAME  : Jeshua Smith  Email: jeshua@us.ibm.com
-// *! BACKUP NAME :               Email:       @us.ibm.com
-// #! ADDITIONAL COMMENTS :
-//
-// The purpose of this header is to define scom addresses for use by procedures.
-// This will help catch address typos at compile time, and will make it easy
-// to track down which procedures use each address
-//
-
-#ifndef COMMON_SCOM_ADDRESSES
-#define COMMON_SCOM_ADDRESSES
-
-//----------------------------------------------------------------------
-//  Scom address overview
-//----------------------------------------------------------------------
-// P8 uses 64-bit scom addresses, which are classified into two formats:
-//
-// "Normal" (legacy) format
-//
-//            111111 11112222 22222233 33333333 44444444 44555555 55556666
-// 01234567 89012345 67890123 45678901 23456789 01234567 89012345 67890123
-// -------- -------- -------- -------- -------- -------- -------- --------
-// 00000000 00000000 00000000 00000000 0MCCCCCC ????PPPP 00LLLLLL LLLLLLLL
-//                                      ||          |    |
-//                                      ||          |    `-> Local Address*
-//                                      ||          |
-//                                      ||          `-> Port
-//                                      ||
-//                                      |`-> Chiplet ID**
-//                                      |
-//                                      `-> Multicast bit
-//
-//  * Local address is composed of "00" + 4-bit ring + 10-bit ID
-//    The 10-bit ID is usually 4-bit sat_id and 6-bit reg_id
-//
-// ** Chiplet ID turns into multicast operation type and group number
-//    if the multicast bit is set
-//
-// "Indirect" format
-//
-//
-//            111111 11112222 22222233 33333333 44444444 44555555 55556666
-// 01234567 89012345 67890123 45678901 23456789 01234567 89012345 67890123
-// -------- -------- -------- -------- -------- -------- -------- --------
-// 10000000 0000IIII IIIIIGGG GGGLLLLL 0MCCCCCC ????PPPP 00LLLLLL LLLLLLLL
-//              |         |      |      ||          |    |
-//              |         |      |      ||          |    `-> Local Address*
-//              |         |      |      ||          |
-//              |         |      |      ||          `-> Port
-//              |         |      |      ||
-//              |         |      |      |`-> Chiplet ID**
-//              |         |      |      |
-//              |         |      |      `-> Multicast bit
-//              |         |      |
-//              |         |      `-> Lane ID
-//              |         |
-//              |         `-> RX or TX Group ID
-//              |
-//              `-> Indirect Register Address
-//
-//  * Local address is composed of "00" + 4-bit ring + 4-bit sat_id + "111111"
-//
-// ** Chiplet ID turns into multicast operation type and group number
-//    if the multicast bit is set
-//
-
-#include "fapi_sbe_common.H"
-
-
-/******************************************************************************/
-/**********************************  CHIPLET  *********************************/
-/******************************************************************************/
-//      use for lpcs P0, <chipletID>
-CONST_UINT64_T( STBY_CHIPLET_0x00000000               , ULL(0x00000000) );
-CONST_UINT64_T( TP_CHIPLET_0x01000000                 , ULL(0x01000000) );
-CONST_UINT64_T( NEST_CHIPLET_0x02000000               , ULL(0x02000000) );
-CONST_UINT64_T( XBUS_CHIPLET_0x04000000               , ULL(0x04000000) );
-
-
-/******************************************************************************/
-/******************************  GENERIC CHIPLET  *****************************/
-/******************************************************************************/
-
-//------------------------------------------------------------------------------
-//      GENERIC GP
-//------------------------------------------------------------------------------
-CONST_UINT64_T( GENERIC_GP0_0x00000000                , ULL(0x00000000) );
-CONST_UINT64_T( GENERIC_GP1_0x00000001                , ULL(0x00000001) );
-CONST_UINT64_T( GENERIC_GP2_0x00000002                , ULL(0x00000002) );
-CONST_UINT64_T( GENERIC_GP4_0x00000003                , ULL(0x00000003) );
-CONST_UINT64_T( GENERIC_GP0_AND_0x00000004            , ULL(0x00000004) );
-CONST_UINT64_T( GENERIC_GP0_OR_0x00000005             , ULL(0x00000005) );
-
-//------------------------------------------------------------------------------
-//      GENERIC DEBUG
-//------------------------------------------------------------------------------
-CONST_UINT64_T( GENERIC_DBG_MODE_REG_0x000107C0        , ULL(0x000107C0) );
-CONST_UINT64_T( GENERIC_DBG_INST1_COND_REG1_0x000107C1 , ULL(0x000107C1) );
-CONST_UINT64_T( GENERIC_DBG_INST1_COND_REG2_0x000107C2 , ULL(0x000107C2) );
-CONST_UINT64_T( GENERIC_DBG_INST2_COND_REG1_0x000107C3 , ULL(0x000107C3) );
-CONST_UINT64_T( GENERIC_DBG_INST2_COND_REG2_0x000107C4 , ULL(0x000107C4) );
-CONST_UINT64_T( GENERIC_DBG_TRACE_REG0_0x000107C9      , ULL(0x000107C9) );
-CONST_UINT64_T( GENERIC_DBG_TRACE_REG1_0x000107CA      , ULL(0x000107CA) );
-CONST_UINT64_T( GENERIC_DBG_TRACE_REG2_0x000107CB      , ULL(0x000107CB) );
-
-//------------------------------------------------------------------------------
-//      GENERIC CLOCK CONTROL
-//------------------------------------------------------------------------------
-CONST_UINT64_T( GENERIC_OPCG_CNTL0_0x00030002         , ULL(0x00030002) );
-CONST_UINT64_T( GENERIC_OPCG_CNTL1_0x00030003         , ULL(0x00030003) );
-CONST_UINT64_T( GENERIC_OPCG_CNTL2_0x00030004         , ULL(0x00030004) );
-CONST_UINT64_T( GENERIC_OPCG_CNTL3_0x00030005         , ULL(0x00030005) );
-CONST_UINT64_T( GENERIC_CLK_SYNC_CONFIG_0x00030000    , ULL(0x00030000) );
-CONST_UINT64_T( GENERIC_CLK_REGION_0x00030006         , ULL(0x00030006) );
-CONST_UINT64_T( GENERIC_CLK_SCANSEL_0x00030007        , ULL(0x00030007) );
-CONST_UINT64_T( GENERIC_CLK_STATUS_0x00030008         , ULL(0x00030008) );
-CONST_UINT64_T( GENERIC_CLK_ERROR_0x00030009          , ULL(0x00030009) );
-CONST_UINT64_T( GENERIC_CLK_SCANDATA0_0x00038000      , ULL(0x00038000) );
-CONST_UINT64_T( GENERIC_CLK_SCAN_UPDATEDR_0x0003A000  , ULL(0x0003A000) );
-CONST_UINT64_T( GENERIC_CLK_SCAN_CAPTUREDR_0x0003C000 , ULL(0x0003C000) );
-
-//------------------------------------------------------------------------------
-//      GENERIC FIR
-//------------------------------------------------------------------------------
-CONST_UINT64_T( GENERIC_XSTOP_0x00040000              , ULL(0x00040000) );
-CONST_UINT64_T( GENERIC_RECOV_0x00040001              , ULL(0x00040001) );
-CONST_UINT64_T( GENERIC_FIR_MASK_0x00040002           , ULL(0x00040002) );
-CONST_UINT64_T( GENERIC_SPATTN_0x00040004             , ULL(0x00040004) );
-CONST_UINT64_T( GENERIC_SPATTN_AND_0x00040005         , ULL(0x00040005) );
-CONST_UINT64_T( GENERIC_SPATTN_OR_0x00040006          , ULL(0x00040006) );
-CONST_UINT64_T( GENERIC_SPATTN_MASK_0x00040007        , ULL(0x00040007) );
-CONST_UINT64_T( GENERIC_FIR_MODE_0x00040008           , ULL(0x00040008) );
-CONST_UINT64_T( GENERIC_PERV_LFIR_0x0004000A          , ULL(0x0004000A) );
-CONST_UINT64_T( GENERIC_PERV_LFIR_AND_0x0004000B      , ULL(0x0004000B) );
-CONST_UINT64_T( GENERIC_PERV_LFIR_OR_0x0004000C       , ULL(0x0004000C) );
-CONST_UINT64_T( GENERIC_PERV_LFIR_MASK_0x0004000D     , ULL(0x0004000D) );
-CONST_UINT64_T( GENERIC_PERV_LFIR_MASK_AND_0x0004000E , ULL(0x0004000E) );
-CONST_UINT64_T( GENERIC_PERV_LFIR_MASK_OR_0x0004000F  , ULL(0x0004000F) );
-CONST_UINT64_T( GENERIC_PERV_LFIR_ACT0_0x00040010     , ULL(0x00040010) );
-CONST_UINT64_T( GENERIC_PERV_LFIR_ACT1_0x00040011     , ULL(0x00040011) );
-
-//------------------------------------------------------------------------------
-//      GENERIC PCB SLAVE
-//------------------------------------------------------------------------------
-//Multicast Group Registers
-CONST_UINT64_T( GENERIC_MCGR1_0x000F0001              , ULL(0x000F0001) );
-CONST_UINT64_T( GENERIC_MCGR2_0x000F0002              , ULL(0x000F0002) );
-CONST_UINT64_T( GENERIC_MCGR3_0x000F0003              , ULL(0x000F0003) );
-CONST_UINT64_T( GENERIC_MCGR4_0x000F0004              , ULL(0x000F0004) );
-
-//GP3 Register
-CONST_UINT64_T( GENERIC_GP3_0x000F0012                , ULL(0x000F0012) );
-CONST_UINT64_T( GENERIC_GP3_AND_0x000F0013            , ULL(0x000F0013) );
-CONST_UINT64_T( GENERIC_GP3_OR_0x000F0014             , ULL(0x000F0014) );
-
-// PM GP0 Register
-CONST_UINT64_T( GENERIC_PMGP0_OR_0x000F0102           , ULL(0x000F0102) );
-
-// PCB ERROR
-CONST_UINT64_T( GENERIC_PCB_ERR_0x000F001F            , ULL(0x000F001F) );
-
-//------------------------------------------------------------------------------
-//      GENERIC PLLLOCK REG
-//------------------------------------------------------------------------------
-CONST_UINT64_T( GENERIC_PLLLOCKREG_0x000F0019         , ULL(0x000F0019) );
-
-//------------------------------------------------------------------------------
-//      GENERIC HANG PULSE CONTROL
-//------------------------------------------------------------------------------
-CONST_UINT64_T( GENERIC_HANG_P0_0x000F0020            , ULL(0x000F0020) );
-CONST_UINT64_T( GENERIC_HANG_P1_0x000F0021            , ULL(0x000F0021) );
-CONST_UINT64_T( GENERIC_HANG_P2_0x000F0022            , ULL(0x000F0022) );
-CONST_UINT64_T( GENERIC_HANG_PRE_0x000F0028           , ULL(0x000F0028) );
-
-
-/******************************************************************************/
-/********************************  TP CHIPLET  ********************************/
-/******************************************************************************/
-
-//------------------------------------------------------------------------------
-//      CFAM Registers
-//------------------------------------------------------------------------------
-CONST_UINT32_T( CFAM_FSI_SHIFT_CTRL_0x00000C10        , ULL(0x00000C10) );
-CONST_UINT32_T( CFAM_FSI_DATA_0_0x00001000            , ULL(0x00001000) );
-CONST_UINT32_T( CFAM_FSI_DATA_1_0x00001001            , ULL(0x00001001) );
-CONST_UINT32_T( CFAM_FSI_CMD_REG_0x00001002           , ULL(0x00001002) );
-CONST_UINT32_T( CFAM_FSI_RESET_0x00001006             , ULL(0x00001006) );
-CONST_UINT32_T( CFAM_FSI_STATUS_0x00001007            , ULL(0x00001007) );
-CONST_UINT32_T( CFAM_FSI_GP1_0x00001010               , ULL(0x00001010) );
-CONST_UINT32_T( CFAM_FSI_GP2_0x00001011               , ULL(0x00001011) );
-CONST_UINT32_T( CFAM_FSI_GP3_0x00001012               , ULL(0x00001012) );
-CONST_UINT32_T( CFAM_FSI_GP4_0x00001013               , ULL(0x00001013) );
-CONST_UINT32_T( CFAM_FSI_GP5_0x00001014               , ULL(0x00001014) );
-CONST_UINT32_T( CFAM_FSI_GP6_0x00001015               , ULL(0x00001015) );
-CONST_UINT32_T( CFAM_FSI_GP7_0x00001016               , ULL(0x00001016) );
-CONST_UINT32_T( CFAM_FSI_GP8_0x00001017               , ULL(0x00001017) );
-CONST_UINT32_T( CFAM_FSI_GP3_MIRROR_0x0000101B        , ULL(0x0000101B) );
-
-//------------------------------------------------------------------------------
-//      OTPROM
-//------------------------------------------------------------------------------
-CONST_UINT64_T( OTPROM_0x00010000                     , ULL(0x00010000) );
-
-//------------------------------------------------------------------------------
-//      MFSI0
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MFSI0_0x00020000                      , ULL(0x00020000) );
-
-//------------------------------------------------------------------------------
-//      MFSI1
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MFSI1_0x00030000                      , ULL(0x00030000) );
-
-//------------------------------------------------------------------------------
-//      TOD
-//------------------------------------------------------------------------------
-CONST_UINT64_T( TOD_0x00040000                        , ULL(0x00040000) );
-
-//------------------------------------------------------------------------------
-//      FSI MBOX
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MBOX_FSIRESET_0x00050006              , ULL(0x00050006) );
-CONST_UINT64_T( MBOX_FSISTATUS_0x00050007             , ULL(0x00050007) );
-CONST_UINT64_T( MBOX_CFAMID_0x0005000A                , ULL(0x0005000A) );
-CONST_UINT64_T( MBOX_TMASK_0x0005000D                 , ULL(0x0005000D) );
-CONST_UINT64_T( MBOX_CMASK_0x0005000C                 , ULL(0x0005000C) );
-CONST_UINT64_T( MBOX_FSIGP3_0x00050012                , ULL(0x00050012) );
-CONST_UINT64_T( MBOX_FSIGP4_0x00050013                , ULL(0x00050013) );
-CONST_UINT64_T( MBOX_FSIGP5_0x00050014                , ULL(0x00050014) );
-CONST_UINT64_T( MBOX_FSIGP6_0x00050015                , ULL(0x00050015) );
-CONST_UINT64_T( MBOX_FSIGP7_0x00050016                , ULL(0x00050016) );
-CONST_UINT64_T( MBOX_FSIGP8_0x00050017                , ULL(0x00050017) );
-CONST_UINT64_T( MBOX_OSC_S1_0x00050019                , ULL(0x00050019) );
-CONST_UINT64_T( MBOX_OSC_S2_0x0005001A                , ULL(0x0005001A) );
-CONST_UINT64_T( MBOX_GP3MIR_0x0005001B                , ULL(0x0005001B) );
-CONST_UINT64_T( MBOX_SBEVITAL_0x0005001C              , ULL(0x0005001C) );
-CONST_UINT64_T( MBOX_SCRATCH_REG0_0x00050038          , ULL(0x00050038) );
-CONST_UINT64_T( MBOX_SCRATCH_REG1_0x00050039          , ULL(0x00050039) );
-CONST_UINT64_T( MBOX_SCRATCH_REG2_0x0005003A          , ULL(0x0005003A) );
-CONST_UINT64_T( MBOX_SCRATCH_REG3_0x0005003B          , ULL(0x0005003B) );
-
-//------------------------------------------------------------------------------
-//      TP ADDITIONAL REGISTER
-//------------------------------------------------------------------------------
-CONST_UINT64_T( TP_PLL_LOCK_0x010F0019                , ULL(0x010F0019) );
-CONST_UINT64_T( TP_CLK_ADJ_SET_0x010F0016             , ULL(0x010F0016) );
-
-//------------------------------------------------------------------------------
-//      ECCB REGISTERS
-//------------------------------------------------------------------------------
-
-CONST_UINT64_T( ECCB_ECC_ADDR_REG_0x000C0004          , ULL(0x000C0004) );
-
-//------------------------------------------------------------------------------
-//      I2C MASTER (MEMS0)
-//------------------------------------------------------------------------------
-CONST_UINT64_T( I2CMS_MEMS0_CONTROL_0x000A0000        , ULL(0x000A0000) );
-CONST_UINT64_T( I2CMS_MEMS0_RESET_0x000A0001          , ULL(0x000A0001) );
-CONST_UINT64_T( I2CMS_MEMS0_STATUS_0x000A0002         , ULL(0x000A0002) );
-CONST_UINT64_T( I2CMS_MEMS0_DATA_0x000A0003           , ULL(0x000A0003) );
-CONST_UINT64_T( I2CMS_MEMS0_COMMAND_0x000A0005        , ULL(0x000A0005) );
-CONST_UINT64_T( I2CMS_MEMS0_MODE_0x000A0006           , ULL(0x000A0006) );
-CONST_UINT64_T( I2CMS_MEMS0_STATUS_0x000A000B         , ULL(0x000A000B) );
-
-//------------------------------------------------------------------------------
-//      PCB MASTER
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PCBMS_0x000F0000                      , ULL(0x000F0000) );
-CONST_UINT64_T( PCBMS_REC_ACK_REG_0x000F0010          , ULL(0x000F0010) );
-CONST_UINT64_T( PCBMS_REC_ERR_REG0_0x000F0011         , ULL(0x000F0011) );
-CONST_UINT64_T( PCBMS_REC_ERR_REG1_0x000F0012         , ULL(0x000F0012) );
-CONST_UINT64_T( PCBMS_DEVICE_ID_0x000F000F            , ULL(0x000F000F) );
-CONST_UINT64_T( PCB_TIMEOUT_0x000F0019                , ULL(0x000F0019) );
-CONST_UINT64_T( MASTER_PCB_INT_0x000F001A             , ULL(0x000F001A) );
-CONST_UINT64_T( PRV_PIB_PCBMS_RESET_REG_0x000F001D    , ULL(0x000F001D) );
-CONST_UINT64_T( PCBMS_FIRST_ERR_REG_0x000F001E        , ULL(0x000F001E) );
-CONST_UINT64_T( MASTER_PCB_ERR_0x000F001F             , ULL(0x000F001F) );
-CONST_UINT64_T( PCBSL_ERROR_REG_ALL_0x400F001F        , ULL(0x400F001F) );
-
-//------------------------------------------------------------------------------
-//      TP GPIO
-//------------------------------------------------------------------------------
-CONST_UINT64_T( TP_GP0_0x01000000                     , ULL(0x01000000) );
-CONST_UINT64_T( TP_GP1_0x01000001                     , ULL(0x01000001) );
-CONST_UINT64_T( TP_GP2_0x01000002                     , ULL(0x01000002) );
-CONST_UINT64_T( TP_GP4_0x01000003                     , ULL(0x01000003) );
-CONST_UINT64_T( TP_GP0_AND_0x01000004                 , ULL(0x01000004) );
-CONST_UINT64_T( TP_GP0_OR_0x01000005                  , ULL(0x01000005) );
-CONST_UINT64_T( TP_GP4_AND_0x01000006                 , ULL(0x01000006) );
-CONST_UINT64_T( TP_GP4_OR_0x01000007                  , ULL(0x01000007) );
-
-//------------------------------------------------------------------------------
-//      TP SCOM
-//------------------------------------------------------------------------------
-CONST_UINT64_T( TP_SCOM_0x01010000                    , ULL(0x01010000) );
-
-//------------------------------------------------------------------------------
-//      TP TRACE
-//------------------------------------------------------------------------------
-CONST_UINT64_T( TP_TRACE_STATUS_0x01010004            , ULL(0x01010004) );
-CONST_UINT64_T( TP_TRACE_DATA_HI_0x01010400           , ULL(0x01010400) );
-CONST_UINT64_T( TP_TRACE_DATA_LO_0x01010401           , ULL(0x01010401) );
-
-//------------------------------------------------------------------------------
-//      TP ITR
-//------------------------------------------------------------------------------
-CONST_UINT64_T( TP_INTRPT_PRES_TYP1_0x01020000        , ULL(0x01020000) );
-CONST_UINT64_T( TP_INTRPT_PRES_TYP1_OR_0x01020001     , ULL(0x01020001) );
-CONST_UINT64_T( TP_INTRPT_PRES_TYP1_AND_0x01020002    , ULL(0x01020002) );
-CONST_UINT64_T( TP_INTRPT_PRES_TYP2_0x01020003        , ULL(0x01020003) );
-CONST_UINT64_T( TP_INTRPT_PRES_TYP2_OR_0x01020004     , ULL(0x01020004) );
-CONST_UINT64_T( TP_INTRPT_PRES_TYP2_AND_0x01020005    , ULL(0x01020005) );
-CONST_UINT64_T( TP_INTRPT_PRES_TYP3_0x01020006        , ULL(0x01020006) );
-CONST_UINT64_T( TP_INTRPT_PRES_TYP3_OR_0x01020007     , ULL(0x01020007) );
-CONST_UINT64_T( TP_INTRPT_PRES_TYP3_AND_0x01020008    , ULL(0x01020008) );
-CONST_UINT64_T( TP_INTRPT_PRES_TYP4_0x01020009        , ULL(0x01020009) );
-CONST_UINT64_T( TP_INTRPT_PRES_TYP4_OR_0x0102000A     , ULL(0x0102000A) );
-CONST_UINT64_T( TP_INTRPT_PRES_TYP4_AND_0x0102000B    , ULL(0x0102000B) );
-
-CONST_UINT64_T( TP_INTRPT_TYP_MSK_0x0102000C          , ULL(0x0102000C) );
-CONST_UINT64_T( TP_INTRPT_TYP_MSK_OR_0x0102000D       , ULL(0x0102000D) );
-CONST_UINT64_T( TP_INTRPT_TYP_MSK_AND_0x0102000E      , ULL(0x0102000E) );
-
-CONST_UINT64_T( TP_INTRPT_CONFIG_0x0102000F           , ULL(0x0102000F) );
-CONST_UINT64_T( TP_INTRPT_CONFIG_OR_0x01020010        , ULL(0x01020010) );
-CONST_UINT64_T( TP_INTRPT_CONFIG_AND_0x01020011       , ULL(0x01020011) );
-
-CONST_UINT64_T( TP_INTRPT_HOLD_0x01020012             , ULL(0x01020012) );
-CONST_UINT64_T( TP_IPOLL_MSK_0x01020013               , ULL(0x01020013) );
-CONST_UINT64_T( TP_ITR_ERR_STAT_0x01020014            , ULL(0x01020014) );
-CONST_UINT64_T( TP_OSCERR_HOLD_0x01020019             , ULL(0x01020019) );
-CONST_UINT64_T( TP_OSC_MSK_0x0102001A                 , ULL(0x0102001A) );
-
-//------------------------------------------------------------------------------
-//      TP CLOCK CONTROL
-//------------------------------------------------------------------------------
-CONST_UINT64_T( TP_OPCG_CNTL0_0x01030002              , ULL(0x01030002) );
-CONST_UINT64_T( TP_OPCG_CNTL1_0x01030003              , ULL(0x01030003) );
-CONST_UINT64_T( TP_OPCG_CNTL2_0x01030004              , ULL(0x01030004) );
-CONST_UINT64_T( TP_OPCG_CNTL3_0x01030005              , ULL(0x01030005) );
-CONST_UINT64_T( TP_CLK_REGION_0x01030006              , ULL(0x01030006) );
-
-CONST_UINT64_T( TP_CLK_SCANSEL_0x01030007             , ULL(0x01030007) );
-CONST_UINT64_T( TP_CLK_STATUS_0x01030008              , ULL(0x01030008) );
-CONST_UINT64_T( TP_CC_ERROR_STATUS_0x01030009         , ULL(0x01030009) );
-CONST_UINT64_T( TP_CC_PROTECT_MODE_0x010303FE         , ULL(0x010303FE) );
-
-//------------------------------------------------------------------------------
-//      TP FIR
-//------------------------------------------------------------------------------
-CONST_UINT64_T( TP_XSTOP_0x01040000                   , ULL(0x01040000) );
-CONST_UINT64_T( TP_RECOV_0x01040001                   , ULL(0x01040001) );
-CONST_UINT64_T( TP_FIR_MASK_0x01040002                , ULL(0x01040002) );
-CONST_UINT64_T( TP_SPATTN_0x01040004                  , ULL(0x01040004) );
-CONST_UINT64_T( TP_SPATTN_AND_0x01040005              , ULL(0x01040005) );
-CONST_UINT64_T( TP_SPATTN_OR_0x01040006               , ULL(0x01040006) );
-CONST_UINT64_T( TP_SPATTN_MASK_0x01040007             , ULL(0x01040007) );
-CONST_UINT64_T( TP_FIR_MODE_0x01040008                , ULL(0x01040008) );
-CONST_UINT64_T( TP_PERV_LFIR_0x0104000A               , ULL(0x0104000A) );
-CONST_UINT64_T( TP_PERV_LFIR_AND_0x0104000B           , ULL(0x0104000B) );
-CONST_UINT64_T( TP_PERV_LFIR_OR_0x0104000C            , ULL(0x0104000C) );
-CONST_UINT64_T( TP_PERV_LFIR_MASK_0x0104000D          , ULL(0x0104000D) );
-CONST_UINT64_T( TP_PERV_LFIR_MASK_AND_0x0104000E      , ULL(0x0104000E) );
-CONST_UINT64_T( TP_PERV_LFIR_MASK_OR_0x0104000F       , ULL(0x0104000F) );
-CONST_UINT64_T( TP_PERV_LFIR_ACT0_0x01040010          , ULL(0x01040010) );
-CONST_UINT64_T( TP_PERV_LFIR_ACT1_0x01040011          , ULL(0x01040011) );
-
-//------------------------------------------------------------------------------
-//      TP PCB SLAVE
-//------------------------------------------------------------------------------
-//Multicast Group Registers
-CONST_UINT64_T( TP_MCGR1_0x010F0001                   , ULL(0x010F0001) );
-CONST_UINT64_T( TP_MCGR2_0x010F0002                   , ULL(0x010F0002) );
-CONST_UINT64_T( TP_MCGR3_0x010F0003                   , ULL(0x010F0003) );
-CONST_UINT64_T( TP_MCGR4_0x010F0004                   , ULL(0x010F0004) );
-//GP3 Register
-//Figtree says GP3 register doesn't exist in TP chiplet
-//CONST_UINT64_T( TP_GP3_0x010F0012                    , ULL(0x010F0012) );
-//CONST_UINT64_T( TP_GP3_AND_0x010F0013                , ULL(0x010F0013) );
-//CONST_UINT64_T( TP_GP3_OR_0x010F0014                 , ULL(0x010F0014) );
-
-//------------------------------------------------------------------------------
-//      TP HANG DETECTION
-//------------------------------------------------------------------------------
-CONST_UINT64_T( TP_HANG_P0_0x010F0020                  , ULL(0x010F0020) );     // PRV: setup hang pulse register0
-CONST_UINT64_T( TP_HANG_P1_0x010F0021                  , ULL(0x010F0021) );     // PRV: setup hang pulse register1
-CONST_UINT64_T( TP_HANG_P2_0x010F0022                  , ULL(0x010F0022) );     // PRV: setup hang pulse register2
-CONST_UINT64_T( TP_HANG_P3_0x010F0023                  , ULL(0x010F0023) );     // PRV: setup hang pulse register3
-CONST_UINT64_T( TP_HANG_P4_0x010F0024                  , ULL(0x010F0024) );     // PRV: setup hang pulse register4
-CONST_UINT64_T( TP_HANG_P5_0x010F0025                  , ULL(0x010F0025) );     // PRV: setup hang pulse register5
-CONST_UINT64_T( TP_HANG_P6_0x010F0026                  , ULL(0x010F0026) );     // PRV: setup hang pulse register6
-CONST_UINT64_T( TP_HANG_PRE_0x010F0028                 , ULL(0x010F0028) );     // PRV: setup hang precounter (HEX:01)
-
-
-/******************************************************************************/
-/*******************************  NEST CHIPLET  *******************************/
-/******************************************************************************/
-
-//------------------------------------------------------------------------------
-//      NEST GPIO
-//------------------------------------------------------------------------------
-CONST_UINT64_T( NEST_GP0_0x02000000                   , ULL(0x02000000) );
-CONST_UINT64_T( NEST_GP1_0x02000001                   , ULL(0x02000001) );
-CONST_UINT64_T( NEST_GP2_0x02000002                   , ULL(0x02000002) );
-CONST_UINT64_T( NEST_GP0_AND_0x02000004               , ULL(0x02000004) );
-CONST_UINT64_T( NEST_GP0_OR_0x02000005                , ULL(0x02000005) );
-CONST_UINT64_T( NEST_GP4_AND_0x02000006               , ULL(0x02000006) );
-CONST_UINT64_T( NEST_GP4_OR_0x02000007                , ULL(0x02000007) );
-
-//------------------------------------------------------------------------------
-//      NEST SCOM
-//------------------------------------------------------------------------------
-CONST_UINT64_T( NEST_SCOM_0x02010000                  , ULL(0x02010000) );
-
-//------------------------------------------------------------------------------
-//      NEST TRACE
-//------------------------------------------------------------------------------
-CONST_UINT64_T( NEST_TRACE_STATUS_0x02010004          , ULL(0x02010004) );
-
-//------------------------------------------------------------------------------
-//      NEST CLOCK CONTROL
-//------------------------------------------------------------------------------
-CONST_UINT64_T( NEST_OPCG_CNTL0_0x02030002            , ULL(0x02030002) );
-CONST_UINT64_T( NEST_OPCG_CNTL1_0x02030003            , ULL(0x02030003) );
-CONST_UINT64_T( NEST_OPCG_CNTL2_0x02030004            , ULL(0x02030004) );
-CONST_UINT64_T( NEST_OPCG_CNTL3_0x02030005            , ULL(0x02030005) );
-CONST_UINT64_T( NEST_CLK_REGION_0x02030006            , ULL(0x02030006) );
-CONST_UINT64_T( NEST_CLK_SCANSEL_0x02030007           , ULL(0x02030007) );
-CONST_UINT64_T( NEST_CLK_STATUS_0x02030008            , ULL(0x02030008) );
-CONST_UINT64_T( NEST_CC_ERROR_STATUS_0x02030009       , ULL(0x02030009) );
-CONST_UINT64_T( NEST_CC_PROTECT_MODE_0x020303FE       , ULL(0x020303FE) );
-
-//------------------------------------------------------------------------------
-//      NEST FIR
-//------------------------------------------------------------------------------
-CONST_UINT64_T( NEST_XSTOP_0x02040000                 , ULL(0x02040000) );
-CONST_UINT64_T( NEST_RECOV_0x02040001                 , ULL(0x02040001) );
-CONST_UINT64_T( NEST_FIR_MASK_0x02040002              , ULL(0x02040002) );
-CONST_UINT64_T( NEST_SPATTN_0x02040004                , ULL(0x02040004) );
-CONST_UINT64_T( NEST_SPATTN_AND_0x02040005            , ULL(0x02040005) );
-CONST_UINT64_T( NEST_SPATTN_OR_0x02040006             , ULL(0x02040006) );
-CONST_UINT64_T( NEST_SPATTN_MASK_0x02040007           , ULL(0x02040007) );
-CONST_UINT64_T( NEST_FIR_MODE_0x02040008              , ULL(0x02040008) );
-CONST_UINT64_T( NEST_PERV_LFIR_0x0204000A             , ULL(0x0204000A) );
-CONST_UINT64_T( NEST_PERV_LFIR_AND_0x0204000B         , ULL(0x0204000B) );
-CONST_UINT64_T( NEST_PERV_LFIR_OR_0x0204000C          , ULL(0x0204000C) );
-CONST_UINT64_T( NEST_PERV_LFIR_MASK_0x0204000D        , ULL(0x0204000D) );
-CONST_UINT64_T( NEST_PERV_LFIR_MASK_AND_0x0204000E    , ULL(0x0204000E) );
-CONST_UINT64_T( NEST_PERV_LFIR_MASK_OR_0x0204000F     , ULL(0x0204000F) );
-CONST_UINT64_T( NEST_PERV_LFIR_ACT0_0x02040010        , ULL(0x02040010) );
-CONST_UINT64_T( NEST_PERV_LFIR_ACT1_0x02040011        , ULL(0x02040011) );
-
-//------------------------------------------------------------------------------
-//      NEST PCB SLAVE
-//------------------------------------------------------------------------------
-//Multicast Group Registers
-CONST_UINT64_T( NEST_MCGR1_0x020F0001                 , ULL(0x020F0001) );
-CONST_UINT64_T( NEST_MCGR2_0x020F0002                 , ULL(0x020F0002) );
-CONST_UINT64_T( NEST_MCGR3_0x020F0003                 , ULL(0x020F0003) );
-CONST_UINT64_T( NEST_MCGR4_0x020F0004                 , ULL(0x020F0004) );
-//GP3 Register
-CONST_UINT64_T( NEST_GP3_0x020F0012                   , ULL(0x020F0012) );
-CONST_UINT64_T( NEST_GP3_AND_0x020F0013               , ULL(0x020F0013) );
-CONST_UINT64_T( NEST_GP3_OR_0x020F0014                , ULL(0x020F0014) );
-
-//------------------------------------------------------------------------------
-//      NEST HANG DETECTION
-//------------------------------------------------------------------------------
-CONST_UINT64_T( NEST_HANG_P0_0x020F0020               , ULL(0x020F0020) );     // NEST (PB): setup hang pulse register0
-CONST_UINT64_T( NEST_HANG_P1_0x020F0021               , ULL(0x020F0021) );     // NEST     : setup hang pulse register1
-CONST_UINT64_T( NEST_HANG_P2_0x020F0022               , ULL(0x020F0022) );     // NEST     : setup hang pulse register2
-CONST_UINT64_T( NEST_HANG_P3_0x020F0023               , ULL(0x020F0023) );     // NEST     : setup hang pulse register3
-CONST_UINT64_T( NEST_HANG_P4_0x020F0024               , ULL(0x020F0024) );     // NEST     : setup hang pulse register4
-CONST_UINT64_T( NEST_HANG_P5_0x020F0025               , ULL(0x020F0025) );     // NEST     : setup hang pulse register5
-CONST_UINT64_T( NEST_HANG_P6_0x020F0026               , ULL(0x020F0026) );     // NEST     : setup hang pulse register6
-CONST_UINT64_T( NEST_HANG_PRE_0x020F0028              , ULL(0x020F0028) );     // NEST (PB): setup hang precounter (HEX:01)
-
-
-/******************************************************************************/
-/*********  MULTICAST REGISTER DEFINITIONS FOR PERVASIVE INITs ****************/
-/******************************************************************************/
-
-CONST_UINT64_T( READ_ALL_GP0_0x43000000               , ULL(0x43000000) );       // all GP0 but not PRV
-CONST_UINT64_T( WRITE_ALL_GP0_0x6B000000              , ULL(0x6B000000) );       // all GP0 but not PRV
-CONST_UINT64_T( WRITE_ALL_GP0_AND_0x6B000004          , ULL(0x6B000004) );       // all GP0 AND but not PRV
-CONST_UINT64_T( WRITE_ALL_GP0_OR_0x6B000005           , ULL(0x6B000005) );       // all GP0 OR but not PRV
-
-CONST_UINT64_T( READ_ALL_GP1_AND_0x4B000001           , ULL(0x4B000001) );       // and all GP1 but not PRV
-
-CONST_UINT64_T( WRITE_ALL_CLK_REGION_0x6B030006       , ULL(0x6B030006) );       // all GP3 but not PRV
-
-CONST_UINT64_T( READ_ALL_OPCG_CNTL0_0x43030002        , ULL(0x43030002) );       // all OPCG0 but not PRV
-CONST_UINT64_T( WRITE_ALL_OPCG_CNTL0_0x6B030002       , ULL(0x6B030002) );       // all OPCG0 but not PRV
-
-CONST_UINT64_T( READ_ALL_OPCG_CNTL2_0x43030004        , ULL(0x43030004) );       // all OPCG2 but not PRV
-CONST_UINT64_T( WRITE_ALL_OPCG_CNTL2_0x6B030004       , ULL(0x6B030004) );       // all OPCG2 but not PRV
-
-CONST_UINT64_T( READ_ALL_FUNC_GP3_0x430F0012          , ULL(0x430F0012) );       // all GP3 but not PRV
-
-CONST_UINT64_T( SLAVE_PCB_ERR_0x6B0F001F              , ULL(0x6B0F001F) );
-
-
-CONST_UINT64_T( READ_OR_ALL_FUNC_GP0_0x43000000         , ULL(0x43000000) ); // group3: all except PRV: GP0
-CONST_UINT64_T( READ_OR_ALL_FUNC_GP1_0x43000001         , ULL(0x43000001) ); // group3: all except PRV: GP1
-CONST_UINT64_T( READ_OR_ALL_FUNC_GP2_0x43000002         , ULL(0x43000002) ); // group3: all except PRV: GP2
-CONST_UINT64_T( READ_OR_ALL_FUNC_GP4_0x43000003         , ULL(0x43000003) ); // group3: all except PRV: GP4
-CONST_UINT64_T( READ_OR_ALL_FUNC_OPCG_CNTL0_0x43030002  , ULL(0x43030002) ); // group3: all except PRV: OPCG_CNTL0
-CONST_UINT64_T( READ_OR_ALL_FUNC_OPCG_CNTL1_0x43030003  , ULL(0x43030003) ); // group3: all except PRV: OPCG_CNTL1
-CONST_UINT64_T( READ_OR_ALL_FUNC_OPCG_CNTL2_0x43030004  , ULL(0x43030004) ); // group3: all except PRV: OPCG_CNTL2
-CONST_UINT64_T( READ_OR_ALL_FUNC_OPCG_CNTL3_0x43030005  , ULL(0x43030005) ); // group3: all except PRV: OPCG_CNTL3
-CONST_UINT64_T( READ_OR_ALL_FUNC_CLK_REGION_0x43030006  , ULL(0x43030006) ); // group3: all except PRV: CLK_REGION
-CONST_UINT64_T( READ_OR_ALL_FUNC_CLK_SCANSEL_0x43030007 , ULL(0x43030007) ); // group3: all except PRV: CLK_SCANSEL
-CONST_UINT64_T( READ_OR_ALL_FUNC_CLK_STATUS_0x43030008  , ULL(0x43030008) ); // group3: all except PRV: CLK_STATUS
-CONST_UINT64_T( READ_OR_ALL_FUNC_GP3_0x430F0012         , ULL(0x430F0012) ); // group3: all except PRV: GP3
-CONST_UINT64_T( READ_OR_ALL_PCB_SLAVE_ERRREG_0x430F001F , ULL(0x430F001F) ); // group3: all except PRV:
-
-CONST_UINT64_T( READ_AND_ALL_FUNC_GP0_0x4B000000         , ULL(0x4B000000) ); // group3: all except PRV: GP0
-CONST_UINT64_T( READ_AND_ALL_FUNC_GP1_0x4B000001         , ULL(0x4B000001) ); // group3: all except PRV: GP1
-CONST_UINT64_T( READ_AND_ALL_FUNC_GP2_0x4B000002         , ULL(0x4B000002) ); // group3: all except PRV: GP2
-CONST_UINT64_T( READ_AND_ALL_FUNC_GP4_0x4B000003         , ULL(0x4B000003) ); // group3: all except PRV: GP4
-CONST_UINT64_T( READ_AND_ALL_FUNC_OPCG_CNTL0_0x4B030002  , ULL(0x4B030002) ); // group3: all except PRV: OPCG_CNTL0
-CONST_UINT64_T( READ_AND_ALL_FUNC_OPCG_CNTL1_0x4B030003  , ULL(0x4B030003) ); // group3: all except PRV: OPCG_CNTL1
-CONST_UINT64_T( READ_AND_ALL_FUNC_OPCG_CNTL2_0x4B030004  , ULL(0x4B030004) ); // group3: all except PRV: OPCG_CNTL2
-CONST_UINT64_T( READ_AND_ALL_FUNC_OPCG_CNTL3_0x4B030005  , ULL(0x4B030005) ); // group3: all except PRV: OPCG_CNTL3
-CONST_UINT64_T( READ_AND_ALL_FUNC_CLK_REGION_0x4B030006  , ULL(0x4B030006) ); // group3: all except PRV: CLK_REGION
-CONST_UINT64_T( READ_AND_ALL_FUNC_CLK_SCANSEL_0x4B030007 , ULL(0x4B030007) ); // group3: all except PRV: CLK_SCANSEL
-CONST_UINT64_T( READ_AND_ALL_FUNC_CLK_STATUS_0x4B030008  , ULL(0x4B030008) ); // group3: all except PRV: CLK_STATUS
-CONST_UINT64_T( READ_AND_ALL_FUNC_GP3_0x4B0F0012         , ULL(0x4B0F0012) ); // group3: all except PRV: GP3
-CONST_UINT64_T( READ_AND_ALL_PCB_SLAVE_ERRREG_0x4B0F001F , ULL(0x4B0F001F) ); // group3: all except PRV:
-
-CONST_UINT64_T( READ_ALL_PCB_SLAVE_ATTN_INT_0x500F001A   , ULL(0x500F001A) ); // group0: all chiplets
-CONST_UINT64_T( READ_ALL_PCB_SLAVE_RECOV_INT_0x500F001B  , ULL(0x500F001B) ); // group0: all chiplets
-CONST_UINT64_T( READ_ALL_PCB_SLAVE_XSTOP_INT_0x500F001C  , ULL(0x500F001C) ); // group0: all chiplets
-
-CONST_UINT64_T( WRITE_ALL_GP0_OR_0x68000005              , ULL(0x68000005) ); // group0: all chiplets
-
-CONST_UINT64_T( WRITE_ALL_FUNC_GP0_0x6B000000            , ULL(0x6B000000) ); // group3: all except PRV: GP0
-CONST_UINT64_T( WRITE_ALL_FUNC_GP1_0x6B000001            , ULL(0x6B000001) ); // group3: all except PRV: GP1
-CONST_UINT64_T( WRITE_ALL_FUNC_GP2_0x6B000002            , ULL(0x6B000002) ); // group3: all except PRV: GP2
-CONST_UINT64_T( WRITE_ALL_FUNC_GP4_0x6B000003            , ULL(0x6B000003) ); // group3: all except PRV: GP4
-CONST_UINT64_T( WRITE_ALL_FUNC_GP0_AND_0x6B000004        , ULL(0x6B000004) ); // group3: all except PRV: GP0 AND (for clearing bits)
-CONST_UINT64_T( WRITE_ALL_FUNC_GP0_OR_0x6B000005         , ULL(0x6B000005) ); // group3: all except PRV: GP0 OR  (for setting bits)
-CONST_UINT64_T( WRITE_ALL_FUNC_GP4_AND_0x6B000006        , ULL(0x6B000006) ); // group3: all except PRV: GP4 AND (for clearing bits)
-CONST_UINT64_T( WRITE_ALL_FUNC_GP4_OR_0x6B000007         , ULL(0x6B000007) ); // group3: all except PRV: GP4 OR  (for setting bits)
-CONST_UINT64_T( WRITE_ALL_FUNC_OPCG_CNTL0_0x6B030002     , ULL(0x6B030002) ); // group3: all except PRV: OPCG_CNTL0
-CONST_UINT64_T( WRITE_ALL_FUNC_OPCG_CNTL1_0x6B030003     , ULL(0x6B030003) ); // group3: all except PRV: OPCG_CNTL1
-CONST_UINT64_T( WRITE_ALL_FUNC_OPCG_CNTL2_0x6B030004     , ULL(0x6B030004) ); // group3: all except PRV: OPCG_CNTL2
-CONST_UINT64_T( WRITE_ALL_FUNC_OPCG_CNTL3_0x6B030005     , ULL(0x6B030005) ); // group3: all except PRV: OPCG_CNTL3
-CONST_UINT64_T( WRITE_ALL_FUNC_CLK_REGION_0x6B030006     , ULL(0x6B030006) ); // group3: all except PRV: CLK_REGION
-CONST_UINT64_T( WRITE_ALL_FUNC_CLK_SCANSEL_0x6B030007    , ULL(0x6B030007) ); // group3: all except PRV: CLK_SCANSEL
-CONST_UINT64_T( WRITE_ALL_FUNC_CLK_STATUS_0x6B030008     , ULL(0x6B030008) ); // group3: all except PRV: CLK_STATUS
-CONST_UINT64_T( WRITE_ALL_FUNC_GP3_0x6B0F0012            , ULL(0x6B0F0012) ); // group3: all except PRV: GP3
-CONST_UINT64_T( WRITE_ALL_FUNC_GP3_AND_0x6B0F0013        , ULL(0x6B0F0013) ); // group3: all except PRV: GP3 AND (for clearing bits)
-CONST_UINT64_T( WRITE_ALL_FUNC_GP3_OR_0x6B0F0014         , ULL(0x6B0F0014) ); // group3: all except PRV: GP3 OR  (for setting bits)
-CONST_UINT64_T( WRITE_ALL_PCB_SLAVE_ERRREG_0x6B0F001F    , ULL(0x6B0F001F) ); // group3: all except PRV:
-
-
-//******************************************************************************/
-//*********  ADDRESS PREFIXES FOR SUBROUTINE SCAN0_MODULE CALLS ****************/
-//******************************************************************************/
-
-
-CONST_UINT64_T( SCAN_ALLREGIONEXVITAL,              ULL(0x0FF00E0000000000) );
-CONST_UINT64_T( SCAN_CLK_ALL,                       ULL(0x0FF00E0000000000) );
-CONST_UINT64_T( SCAN_CLK_ALLEXDPLL,                 ULL(0x0FE00E0000000000) );
-CONST_UINT64_T( SCAN_CLK_ALL_BUT_PLL,               ULL(0x0FE00E0000000000) );
-CONST_UINT64_T( SCAN_CLK_PLL,                       ULL(0x00100E0000000000) );
-CONST_UINT64_T( SCAN_CLK_CORE_ONLY,                 ULL(0x06000E0000000000) );
-
-
-CONST_UINT64_T( SCAN_ALLSCANEXVITAL,                ULL(0x0FF00DCE00000000) );  // Looking to be deprecated
-CONST_UINT64_T( SCAN_ALLSCANEXPRV,                  ULL(0x0FF00DCE00000000) );  // Looking to be deprecated
-CONST_UINT64_T( SCAN_ALL_BUT_GPTRTIMEREP,           ULL(0x0FF00DCE00000000) );
-CONST_UINT64_T( SCAN_ALL_BUT_VITALDPLLGPTRTIME,     ULL(0x0FE00DCE00000000) );
-CONST_UINT64_T( SCAN_GPTR_TIME_REP,                 ULL(0x0FF0023000000000) );
-CONST_UINT64_T( SCAN_PLL_GPTR,                      ULL(0x0010020000000000) );
-CONST_UINT64_T( SCAN_PLL_BNDY_FUNC,                 ULL(0x0010080800000000) );
-CONST_UINT64_T( SCAN_TIME_REP,                      ULL(0x0CF0003000000000) );
-
-CONST_UINT64_T( SCAN_CORE_ALL,                      ULL(0x06000FFE00000000) );
-CONST_UINT64_T( SCAN_CORE_ALL_BUT_GPTRTIMEREP,      ULL(0x06000DCE00000000) );
-CONST_UINT64_T( SCAN_CORE_GPTR_TIME_REP,            ULL(0x0600023000000000) );
-CONST_UINT64_T( SCAN_CORE_TIME_REP,                 ULL(0x0600003000000000) );
-
-CONST_UINT64_T( SCAN_TP_ARRAY_INIT_REGIONS,         ULL(0x09000e0000000000) );
-CONST_UINT64_T( SCAN_TP_REGIONS_EXCEPT_PIB_PCB,     ULL(0x09e00e0000000000) );
-CONST_UINT64_T( SCAN_TP_SCAN_SELECTS,               ULL(0x09e00dce00000000) );
-
-CONST_UINT8_T( SCAN_CHIPLET_STBY,                   ULL(0x00) );
-CONST_UINT8_T( SCAN_CHIPLET_TP,                     ULL(0x01) );
-CONST_UINT8_T( SCAN_CHIPLET_NEST,                   ULL(0x02) );
-CONST_UINT8_T( SCAN_CHIPLET_MEM,                    ULL(0x03) );
-CONST_UINT8_T( SCAN_CHIPLET_ALL,                    ULL(0x68) );
-CONST_UINT8_T( SCAN_CHIPLET_GROUP1,                 ULL(0x69) );
-CONST_UINT8_T( SCAN_CHIPLET_GROUP3,                 ULL(0x6B) );
-
-
-CONST_UINT8_T( READ_OR_ALL_CHIPLETS,                ULL(0x40) );   // group 0: all chiplets
-CONST_UINT8_T( READ_OR_ALL_FUNC_CHIPLETS,           ULL(0x43) );   // group 3: all functional chiplets
-// CONST_UINT8_T( READ_AND_ALL_CHIPLETS,              ULL(0x48) );   // group 0: all chiplets
-CONST_UINT8_T( READ_AND_ALL_FUNC_CHIPLETS,          ULL(0x4B) );   // group 3: all functional chiplets
-CONST_UINT8_T( WRITE_ALL_CHIPLETS,                  ULL(0x68) );   // group 0: all chiplets
-CONST_UINT8_T( WRITE_ALL_FUNC_CHIPLETS,             ULL(0x6B) );   // group 3: all functional chiplets
-
-#endif
-
-
-/*
-*************** Do not edit this area ***************
-This section is automatically updated by CVS when you check in this file.
-Be sure to create CVS comments when you commit so that they can be included here.
-
-$Log: common_scom_addresses.H,v $
-Revision 1.49  2014/01/30 16:19:26  mfred
-Add some clock control regs for FFDC.
-
-Revision 1.48  2013/11/04 14:31:08  kahnevan
-Added missing addresses used by proc_perv_registers.xml
-
-Revision 1.47  2013/07/10 15:30:36  jmcgill
-add entries for SCOM debug resources
-
-Revision 1.46  2013/05/06 21:03:10  jeshua
-Added GENERIC_PCB_ERR_0x000F001F
-
-Revision 1.45  2013/04/16 22:16:16  jeshua
-Moved P8 cfam addresses and PIBMEM_REPAIR_0x00088007 to p8_scom_addresses.H
-
-Revision 1.44  2013/03/18 19:43:27  jeshua
-Removed OTPROM_SECURE_SWITCHES_0x00010005 because it's not common between P8 and Centaur. P8 code should use OTPC_M_SECURITY_SWITCH_0x00010005
-
-Revision 1.43  2013/03/07 17:02:58  gweber
-moved centaur-only SCAN_ constants to cen_scom_addresses.H
-
-Revision 1.42  2013/03/06 12:43:59  gweber
-Set CLOCK_REGION_PERV for scan0 perv
-
-Revision 1.41  2013/02/20 17:44:46  cmolsen
-Added CC error reg 30009.
-
-Revision 1.40  2013/01/08 18:24:16  koenig
-Updates - AK
-
-Revision 1.39  2012/12/10 22:02:51  mfred
-Adding addresses for interrupt macro.
-
-Revision 1.38  2012/11/17 19:53:05  jmcgill
-add trace status registers
-
-Revision 1.37  2012/11/16 15:19:48  jeshua
-Added defines for PLL scan0
-
-Revision 1.36  2012/11/16 04:06:18  jmcgill
-add FSI2PIB reset register
-
-Revision 1.35  2012/10/30 15:28:50  koenig
-New ECCB register for ecc enable - AK
-
-Revision 1.34  2012/10/25 11:54:47  koenig
-Added some hangcounter register - AK
-
-Revision 1.33  2012/10/24 12:36:18  gweber
-added FSI_DATA reg addresses
-
-Revision 1.32  2012/10/23 12:45:50  koenig
-Added Secure Switches in OTPROM - AK
-
-Revision 1.31  2012/09/28 15:00:35  rkoester
-add FSI SBE VITAL REG
-
-Revision 1.30  2012/09/13 19:55:40  mfred
-Move group 1 multicast definitions (EX chiplet) to p8_scom_addresses.H.
-
-Revision 1.29  2012/09/13 19:42:43  mfred
-fix misleading comment.
-
-Revision 1.28  2012/09/12 17:10:18  jmcgill
-add remainder of mailbox scratch registers
-
-Revision 1.27  2012/08/17 16:46:50  mfred
-Committing common PLL lock address for EX cores.
-
-Revision 1.26  2012/08/16 13:06:19  gweber
-added remaining CFAM-addresses 28xx
-
-Revision 1.25  2012/08/11 22:20:37  jmcgill
-add multicast GP0 OR address (all chiplets)
-
-Revision 1.24  2012/08/08 13:28:18  gweber
-added CFAM-addresses 28xx
-
-Revision 1.23  2012/08/07 09:09:43  koenig
-Added TP skewadjust register - AK
-
-Revision 1.22  2012/07/24 15:52:06  koenig
-Added EX GP3 OR codepoint - AK
-
-Revision 1.21  2012/07/06 09:49:48  rkoester
-add clock region / scan region for tp_arrayinit, make this common
-
-Revision 1.20  2012/07/03 09:38:25  rkoester
-add address for Centaur Scan0
-
-Revision 1.19  2012/07/02 16:43:47  rkoester
-add vector for scan_no_pll
-
-Revision 1.18  2012/06/25 17:52:34  bcbrock
-Modified proc_sbe_decompress_scan.S: 1) Removed comments and code related to
-the "polling" protocol. 2) Added a final SCOM to always issue a "setpulse"
-after acanning.
-
-Revision 1.17  2012/06/20 14:49:29  rkoester
-add plllock register
-
-Revision 1.16  2012/06/17 20:25:57  jmcgill
-update trace SCOM addresses
-
-Revision 1.15  2012/06/14 14:21:03  koenig
-Added MBOX scratch and I2CMS status - AK
-
-Revision 1.14  2012/06/11 16:14:56  rkoester
-FSI GP8 CFAM address added
-
-Revision 1.13  2012/06/05 17:05:41  mfred
-Added constants for reading PCB interrupt regs.
-
-Revision 1.12  2012/05/31 12:15:24  stillgs
-Update constant names for (ex) scan0 routines that do real scanning
-
-Revision 1.11  2012/05/23 17:03:25  rkoester
-scan0 vectors for scan0 module modified, Option 1 wrong
-
-Revision 1.10  2012/04/27 15:08:29  koenig
-Added GENERIC_CLK_SYNC - AK
-
-Revision 1.9  2012/04/19 22:05:35  koenig
-Added AND write to EX MCGR GP3 - AK
-
-Revision 1.8  2012/04/16 23:55:34  bcbrock
-Corrected problems related to C/C++ and 32-bit/64-bit portability and Host
-Boot after initial review by FW team.
-
-o Renamed fapi_sbe_common.h to fapi_sbe_common.H
-o Renamed p8_scan_compression.[ch] to .[CH] since these are for use by C++
-  procedures only (no requirement to execute on OCC).
-o Modified sbe_xip_image.c to use the C99 standard way to print uint64_t
-  variables.
-o Added __cplusplus guards to sbe_xip_image.h
-
-Revision 1.7  2012/04/04 11:41:15  koenig
-Added TP hangcounter 6 and MBOX_FSIGP8
-
-Revision 1.6  2012/03/26 15:16:52  stillgs
-Added SCAN_CORE_ALL, SCAN_CORE_GPTR_TIME_REP, SCAN_CORE_TIME_REP constants for use by Sleep Exit
-
-Revision 1.5  2012/02/10 23:09:50  jmcgill
-add trace array addresses
-
-Revision 1.4  2012/01/30 10:07:53  gweber
-changed SCAN_CHIPLET_ALL to 0x68
-
-Revision 1.3  2012/01/27 09:36:42  koenig
-Added a region vector for scan0 module
-
-Revision 1.2  2012/01/24 21:59:39  mfred
-Moved common multicast address constants to common_scom_accresses.H
-
-Revision 1.1  2012/01/06 22:21:10  jmcgill
-initial release
-
-
-
-
-*/
diff --git a/src/usr/hwpf/hwp/include/fapi_sbe_common.H b/src/usr/hwpf/hwp/include/fapi_sbe_common.H
deleted file mode 100644
index cf0e76f92..000000000
--- a/src/usr/hwpf/hwp/include/fapi_sbe_common.H
+++ /dev/null
@@ -1,71 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/include/fapi_sbe_common.H $                  */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#ifndef __FAPI_SBE_COMMON_H
-#define __FAPI_SBE_COMMON_H
-
-// $Id: fapi_sbe_common.H,v 1.1 2012/04/16 23:55:37 bcbrock Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/fapi_sbe_common.H,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME  :               Email:
-
-/// \file fapi_sbe_common.H
-/// \brief Definitions common to FAPI and SBE procedures
-///
-/// Several preprocessor macros are required to have different definitions in
-/// C, C++ and SBE assembly procedures.  These common forms are collected here.
-
-#if defined __ASSEMBLER__
-
-#define CONST_UINT8_T(name, expr) .set name, (expr)
-#define CONST_UINT32_T(name, expr) .set name, (expr)
-#define CONST_UINT64_T(name, expr) .set name, (expr)
-
-#define ULL(x) x
-
-#elif defined __cplusplus
-
-#include <stdint.h>
-
-#define CONST_UINT8_T(name, expr) const uint8_t name = (expr);
-#define CONST_UINT32_T(name, expr) const uint32_t name = (expr);
-#define CONST_UINT64_T(name, expr) const uint64_t name = (expr);
-
-#define ULL(x) x##ull
-
-#else // C code
-
-// CONST_UINT[8,3,64]_T() can't be used in C code/headers; Use 
-//
-//     #define <symbol> <value> [ or ULL(<value>) for 64-bit constants
-
-#define ULL(x) x##ull
-
-#endif  // __ASSEMBLER__
-
-#endif  // __FAPI_SBE_COMMON_H
diff --git a/src/usr/hwpf/hwp/include/mss_unmask_errors.H b/src/usr/hwpf/hwp/include/mss_unmask_errors.H
deleted file mode 100644
index 1bbc37769..000000000
--- a/src/usr/hwpf/hwp/include/mss_unmask_errors.H
+++ /dev/null
@@ -1,300 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/include/mss_unmask_errors.H $                */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_unmask_errors.H,v 1.2 2014/04/09 19:49:26 gollub Exp $
-//------------------------------------------------------------------------------
-// Don't forget to create CVS comments when you check in your changes!
-//------------------------------------------------------------------------------
-// CHANGE HISTORY:
-//------------------------------------------------------------------------------
-// Version:|   Date:  | Author: | Comment:
-//---------|----------|---------|-----------------------------------------------
-//   1.1   | 09/05/12 | gollub  | Created
-//   1.2   |07-APR-14 | gollub  | Added mss_unmask_pervasive_errors
-//         |          |         | Version was set back from 1.2 to 1.1 when I moved from procedures/ipl/fapi to procedures/
-//   1.2   |09-APR-14 | gollub  | Checked in a second time just to get version to 1.2
-
-#ifndef _MSS_UNMASK_ERRORS_H
-#define _MSS_UNMASK_ERRORS_H
-
-/** @file  mss_unmask_errors.H
- *  @brief Utility functions to set action regs and unmask FIR bits 
- *         at the end of various mss IPL procedures.
- */
-
-
-//------------------------------------------------------------------------------
-//  Includes
-//------------------------------------------------------------------------------
-
-#include <fapi.H>
-#include <ecmdDataBufferBase.H>
-
-
-
-//------------------------------------------------------------------------------
-// Constants and enums
-//------------------------------------------------------------------------------
-
-
-
-//------------------------------------------------------------------------------
-// mss_unmask_pervasive_errors
-//------------------------------------------------------------------------------
-
-
-/**
- * @brief  To be called at the end of cen_mem_startclocks.C
- *         Sets action regs and mask settings for pervasive errors to their 
- *         runtime settings.
- *
- * @param  i_target         Centaur target
- * @param  i_bad_rc         If cen_mem_startclocks.C already has a bad rc
- *                          before it calls this function, we pass it in as 
- *                          i_bad_rc. If this function gets it's own bad local 
- *                          l_rc, i_bad_rc will be commited, and l_rc will be 
- *                          passed back as return value. Else if no l_rc, 
- *                          i_bad_rc will be passed back as return value.
- * @return Non-SUCCESS if i_bad_rc Non_SUCCESS, or if internal function fails, 
- *         SUCCESS otherwise.
- */
-fapi::ReturnCode mss_unmask_pervasive_errors( const fapi::Target & i_target,
-                                              fapi::ReturnCode i_bad_rc );
-
-
-
-//------------------------------------------------------------------------------
-// mss_unmask_inband_errors
-//------------------------------------------------------------------------------
-
-
-/**
- * @brief  To be called at the end of proc_cen_framelock.C
- *         Sets action regs and mask settings for inband errors to their 
- *         runtime settings.
- *
- * @param  i_target         Centaur target
- * @param  i_bad_rc         If proc_cen_framelock.C already has a bad rc
- *                          before it calls this function, we pass it in as 
- *                          i_bad_rc. If this function gets it's own bad local 
- *                          l_rc, i_bad_rc will be commited, and l_rc will be 
- *                          passed back as return value. Else if no l_rc, 
- *                          i_bad_rc will be be passed back as return value.
- * @return Non-SUCCESS if i_bad_rc Non_SUCCESS, or if internal function fails, 
- *         SUCCESS otherwise.
- */
-fapi::ReturnCode mss_unmask_inband_errors( const fapi::Target & i_target,
-                                           fapi::ReturnCode i_bad_rc );
-
-
-//------------------------------------------------------------------------------
-// mss_unmask_ddrphy_errors
-//------------------------------------------------------------------------------
-
-
-/**
- * @brief  To be called at the end of mss_ddr_phy_reset.C.
- *         Sets action regs and mask settings for ddr phy errors to their 
- *         runtime settings.
- *
- * @param  i_target         MBA target
- * @param  i_bad_rc         If mss_ddr_phy_reset.C already has a bad rc
- *                          before it calls this function, we pass it in as 
- *                          i_bad_rc. If this function gets it's own bad local 
- *                          l_rc, i_bad_rc will be commited, and l_rc will be 
- *                          passed back as return value. Else if no l_rc, 
- *                          i_bad_rc will be be passed back as return value.
- * @return Non-SUCCESS if i_bad_rc Non_SUCCESS, or if internal function fails, 
- *         SUCCESS otherwise.
- */
-fapi::ReturnCode mss_unmask_ddrphy_errors( const fapi::Target & i_target,
-                                           fapi::ReturnCode i_bad_rc );
-
-
-//------------------------------------------------------------------------------
-// mss_unmask_draminit_errors
-//------------------------------------------------------------------------------
-
-
-/**
- * @brief  To be called at the end of mss_draminit.C.
- *         Sets MBACALFIR action regs to their runtime settings, and unmasks
- *         errors that are valid for PRD to handle after mss_draminit procedure.
- *
- * @param  i_target         MBA target
- * @param  i_bad_rc         If mss_draminit.C already has a bad rc
- *                          before it calls this function, we pass it in as 
- *                          i_bad_rc. If this function gets it's own bad local 
- *                          l_rc, i_bad_rc will be commited, and l_rc will be 
- *                          passed back as return value. Else if no l_rc, 
- *                          i_bad_rc will be be passed back as return value.
- * @return Non-SUCCESS if i_bad_rc Non_SUCCESS, or if internal function fails, 
- *         SUCCESS otherwise.
- */
-fapi::ReturnCode mss_unmask_draminit_errors( const fapi::Target & i_target,
-                                             fapi::ReturnCode i_bad_rc );
-
-
-//------------------------------------------------------------------------------
-// mss_unmask_draminit_training_errors
-//------------------------------------------------------------------------------
-
-
-/**
- * @brief  To be called at the end of mss_draminit_training.C.
- *         Unmasks MBACALFIR errors that are valid for PRD to handle after
- *         mss_draminit_training procedure.
- *
- * @param  i_target         MBA target
- * @param  i_bad_rc         If mss_draminit_training.C already has a bad rc
- *                          before it calls this function, we pass it in as 
- *                          i_bad_rc. If this function gets it's own bad local 
- *                          l_rc, i_bad_rc will be commited, and l_rc will be 
- *                          passed back as return value. Else if no l_rc, 
- *                          i_bad_rc will be be passed back as return value.
- * @return Non-SUCCESS if i_bad_rc Non_SUCCESS, or if internal function fails, 
- *         SUCCESS otherwise.
- */
-fapi::ReturnCode mss_unmask_draminit_training_errors( 
-                                            const fapi::Target & i_target,
-                                            fapi::ReturnCode i_bad_rc );
-
-
-//------------------------------------------------------------------------------
-// mss_unmask_draminit_training_advanced_errors
-//------------------------------------------------------------------------------
-
-
-/**
- * @brief  To be called at the end of mss_draminit_training_advanced.C.
- *         Unmasks MBACALFIR errors that are valid for PRD to handle after
- *         mss_draminit_training_advanced procedure.
- *
- * @param  i_target         MBA target
- * @param  i_bad_rc         If mss_draminit_training_advanced.C already has a 
- *                          bad rc before it calls this function, we pass it in 
- *                          as i_bad_rc. If this function gets it's own bad  
- *                          local l_rc, i_bad_rc will be commited, and l_rc will 
- *                          be passed back as return value. Else if no l_rc, 
- *                          i_bad_rc will be be passed back as return value.
- * @return Non-SUCCESS if i_bad_rc Non_SUCCESS, or if internal function fails, 
- *         SUCCESS otherwise.
- */
-fapi::ReturnCode mss_unmask_draminit_training_advanced_errors( 
-                                            const fapi::Target & i_target,
-                                            fapi::ReturnCode i_bad_rc );
-
-
-//------------------------------------------------------------------------------
-// mss_unmask_maint_errors
-//------------------------------------------------------------------------------
-
-
-/**
- * @brief  To be called at the end of mss_draminit_mc.C.
- *         Sets action regs and unmasks maint errors prior to the maint logic
- *         being used in memdiags so that PRD will be able to handle them 
- *         if they happen during memdiags.
- *
- * @param  i_target         MBA target
- * @param  i_bad_rc         If mss_draminit_mc already has a 
- *                          bad rc before it calls this function, we pass it in 
- *                          as i_bad_rc. If this function gets it's own bad  
- *                          local l_rc, i_bad_rc will be commited, and l_rc will 
- *                          be passed back as return value. Else if no l_rc, 
- *                          i_bad_rc will be be passed back as return value.
- * @return Non-SUCCESS if i_bad_rc Non_SUCCESS, or if internal function fails, 
- *         SUCCESS otherwise.
- */
-fapi::ReturnCode mss_unmask_maint_errors(const fapi::Target & i_target,
-                                         fapi::ReturnCode i_bad_rc );
-
-
-//------------------------------------------------------------------------------
-// mss_unmask_fetch_errors
-//------------------------------------------------------------------------------
-
-
-/**
- * @brief  To be called at the end of mss_thermal_init.C.
- *         Sets action regs and unmasks fetch errors prior to the start of
- *         mainline traffic.
- *
- * @param  i_target         Centaur target
- * @param  i_bad_rc         If mss_thermal_init already has a 
- *                          bad rc before it calls this function, we pass it in 
- *                          as i_bad_rc. If this function gets it's own bad  
- *                          local l_rc, i_bad_rc will be commited, and l_rc will 
- *                          be passed back as return value. Else if no l_rc, 
- *                          i_bad_rc will be be passed back as return value.
- * @return Non-SUCCESS if i_bad_rc Non_SUCCESS, or if internal function fails, 
- *         SUCCESS otherwise.
- */
-fapi::ReturnCode mss_unmask_fetch_errors(const fapi::Target & i_target,
-                                         fapi::ReturnCode i_bad_rc );
-
-
-
-//------------------------------------------------------------------------------
-// fapiGetScom_w_retry
-//------------------------------------------------------------------------------
-
-/**
- * @brief     Reads a SCOM register from a Chip and retries once if SCOM fails.
- *            Retry is done with assumption that hostboot will switch from
- *            inband SCOM to FSI, so if inband failed due to channel fail,
- *            FSI may still work.
- * @param[in] i_target      Target to operate on
- * @param[in] i_address     Scom address to read from
- * @param[out] o_data       ecmdDataBufferBase object that holds data read from
- *                             address
- * @return ReturnCode. Zero on success, else platform specified error
- */
-fapi::ReturnCode fapiGetScom_w_retry(const fapi::Target& i_target,
-                                     const uint64_t i_address,
-                                     ecmdDataBufferBase & o_data);
-
-//------------------------------------------------------------------------------
-// fapiPutScom_w_retry
-//------------------------------------------------------------------------------
-
-/**
- * @brief     Writes a SCOM register on a Chip and retries once if SCOM fails.
- *            Retry is done with assumption that hostboot will switch from
- *            inband SCOM to FSI, so if inband failed due to channel fail,
- *            FSI may still work.
- * @param[in] i_target Target to operate on
- * @param[in] i_address Scom address to write to
- * @param[in] i_data ecmdDataBufferBase object that holds data to write into
- *                   address
- * @return ReturnCode. Zero on success, else platform specified error
- */
-fapi::ReturnCode fapiPutScom_w_retry(const fapi::Target& i_target,
-                                     const uint64_t i_address,
-                                     ecmdDataBufferBase & i_data);
-
-
-
-
-
-
-#endif /* _MSS_UNMASK_ERRORS_H */
diff --git a/src/usr/hwpf/hwp/include/p8_istep_num.H b/src/usr/hwpf/hwp/include/p8_istep_num.H
deleted file mode 100644
index b30396074..000000000
--- a/src/usr/hwpf/hwp/include/p8_istep_num.H
+++ /dev/null
@@ -1,117 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/include/p8_istep_num.H $                     */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#ifndef __P8_ISTEP_NUM_H
-#define __P8_ISTEP_NUM_H
-
-// $Id: p8_istep_num.H,v 1.29 2015/05/28 20:45:55 jmcgill Exp $
-
-/// Istep number encoding for all SEEPROM and PNOR procedures.  Used to update
-/// the SBEVITAL register to record procedure progress and to create unique
-/// hooki bind points on procedure completion.
-
-CONST_UINT64_T(proc_sbe_enable_seeprom_istep_num,           ULL(0x0101));
-
-CONST_UINT64_T(proc_sbe_security_setup_istep_num,           ULL(0x0201));
-CONST_UINT64_T(proc_sbe_standalone_setup_istep_num,         ULL(0x0202));
-CONST_UINT64_T(proc_sbe_tp_chiplet_init1_istep_num,         ULL(0x0203));
-CONST_UINT64_T(proc_sbe_tp_ld_image_istep_num,              ULL(0x0204));
-CONST_UINT64_T(proc_sbe_npll_initf_istep_num,               ULL(0x0205));
-CONST_UINT64_T(proc_sbe_npll_setup_istep_num,               ULL(0x0206));
-CONST_UINT64_T(proc_sbe_tp_switch_gears_istep_num,          ULL(0x0207));
-CONST_UINT64_T(proc_sbe_tp_chiplet_init2_istep_num,         ULL(0x0208));
-CONST_UINT64_T(proc_sbe_tp_arrayinit_istep_num,             ULL(0x0209));
-CONST_UINT64_T(proc_sbe_tp_initf_istep_num,                 ULL(0x020A));
-CONST_UINT64_T(proc_sbe_tp_chiplet_init3_istep_num,         ULL(0x020B));
-CONST_UINT64_T(proc_sbe_chiplet_init_istep_num,             ULL(0x020C));
-CONST_UINT64_T(proc_sbe_nest_skewadjust_istep_num,          ULL(0x020D));
-CONST_UINT64_T(proc_sbe_arrayinit_istep_num,                ULL(0x020E));
-CONST_UINT64_T(proc_sbe_setup_evid_istep_num,               ULL(0x020F));
-CONST_UINT64_T(proc_sbe_initf_istep_num,                    ULL(0x0210));
-CONST_UINT64_T(proc_sbe_pb_startclocks_istep_num,           ULL(0x0211));
-CONST_UINT64_T(proc_sbe_scominit_istep_num,                 ULL(0x0212));
-CONST_UINT64_T(proc_sbe_fabricinit_istep_num,               ULL(0x0213));
-CONST_UINT64_T(proc_sbe_check_master_istep_num,             ULL(0x0214));
-CONST_UINT64_T(proc_sbe_select_ex_istep_num,                ULL(0x0215));
-CONST_UINT64_T(proc_sbe_run_exinit_istep_num,               ULL(0x0216));
-
-CONST_UINT64_T(proc_sbe_pnor_setup_istep_num,               ULL(0x0301));
-
-CONST_UINT64_T(proc_sbe_ex_chiplet_reset_istep_num,         ULL(0x0401));
-CONST_UINT64_T(proc_sbe_ex_gptr_time_initf_istep_num,       ULL(0x0402));
-CONST_UINT64_T(proc_sbe_ex_core_gptr_time_initf_istep_num,  ULL(0x0403));
-CONST_UINT64_T(proc_sbe_ex_dpll_initf_istep_num,            ULL(0x0404));
-CONST_UINT64_T(proc_sbe_ex_dpll_setup_istep_num,            ULL(0x0405));
-CONST_UINT64_T(proc_sbe_ex_chiplet_init_istep_num,          ULL(0x0406));
-CONST_UINT64_T(proc_sbe_ex_repair_initf_istep_num,          ULL(0x0407));
-CONST_UINT64_T(proc_sbe_ex_core_repair_initf_istep_num,     ULL(0x0408));
-CONST_UINT64_T(proc_sbe_ex_arrayinit_istep_num,             ULL(0x0409));
-CONST_UINT64_T(proc_sbe_ex_initf_istep_num,                 ULL(0x040A));
-CONST_UINT64_T(proc_sbe_ex_core_initf_istep_num,            ULL(0x040B));
-CONST_UINT64_T(proc_sbe_ex_do_manual_inits_istep_num,       ULL(0x040C));
-CONST_UINT64_T(proc_sbe_ex_startclocks_istep_num,           ULL(0x040D));
-CONST_UINT64_T(proc_sbe_ex_scominit_istep_num,              ULL(0x040E));
-CONST_UINT64_T(proc_sbe_ex_core_scominit_istep_num,         ULL(0x040F));
-CONST_UINT64_T(proc_sbe_ex_init_escape_istep_num,           ULL(0x0410));
-CONST_UINT64_T(proc_sbe_ex_sp_runtime_scom_istep_num,       ULL(0x0411));
-CONST_UINT64_T(proc_sbe_ex_occ_runtime_scom_istep_num,      ULL(0x0412));
-CONST_UINT64_T(proc_sbe_ex_host_runtime_scom_istep_num,     ULL(0x0413));
-
-CONST_UINT64_T(proc_sbe_enable_pnor_istep_num,              ULL(0x0500));
-CONST_UINT64_T(proc_sbe_lco_loader_istep_num,               ULL(0x0501));
-CONST_UINT64_T(proc_sbe_instruct_start_istep_num,           ULL(0x0502));
-
-//NOTE: The following values must stay constant as HB looks for them
-CONST_UINT64_T(proc_sbe_trigger_winkle_istep_num,            ULL(0x0F01));
-CONST_UINT64_T(proc_sbe_scan_service_istep_num,              ULL(0x0FA0));
-CONST_UINT64_T(proc_sbe_intr_service_istep_num,              ULL(0x0FB0));
-CONST_UINT64_T(proc_sbe_check_master_magic_istep_num,        ULL(0x02FF));
-CONST_UINT64_T(proc_sbe_ex_host_runtime_scom_magic_istep_num,ULL(0x04FF));
-CONST_UINT64_T(proc_sbe_enable_pnor_magic_istep_num,         ULL(0x05FF));
-
-// The following record progress through the SLW process and only are 
-// logged in the virtual SBEVITAL in the OCC SRAM;  these are not recorded
-// in the real SBEVITAL as they are not executed during the master core IPL.
-CONST_UINT64_T(slw_fast_sleep_enter_istep_num,              ULL(0x0F80));
-CONST_UINT64_T(slw_fast_sleep_exit_istep_num,               ULL(0x0F81));
-CONST_UINT64_T(slw_fast_winkle_enter_istep_num,             ULL(0x0F82));
-CONST_UINT64_T(slw_fast_winkle_exit_istep_num,              ULL(0x0F83));
-CONST_UINT64_T(slw_deep_sleep_enter_istep_num,              ULL(0x0F84));
-CONST_UINT64_T(slw_deep_sleep_exit_istep_num,               ULL(0x0F85));
-CONST_UINT64_T(slw_deep_winkle_enter_istep_num,             ULL(0x0F86));
-CONST_UINT64_T(slw_deep_winkle_exit_istep_num,              ULL(0x0F87));
-
-
-#define PROC_SBE_TRIGGER_WINKLE_ISTEP_NUM proc_sbe_trigger_winkle_istep_num
-#define PROC_SBE_CHECK_MASTER_ISTEP_NUM proc_sbe_check_master_istep_num
-#define PROC_SBE_CHECK_MASTER_MAGIC_ISTEP_NUM proc_sbe_check_master_magic_istep_num
-#define PROC_SBE_ENABLE_PNOR_ISTEP_NUM proc_sbe_enable_pnor_istep_num
-#define PROC_SBE_ENABLE_PNOR_MAGIC_ISTEP_NUM proc_sbe_enable_pnor_magic_istep_num
-#define PROC_SBE_EX_HOST_RUNTIME_SCOM_ISTEP_NUM proc_sbe_ex_host_runtime_scom_istep_num
-#define PROC_SBE_EX_HOST_RUNTIME_SCOM_MAGIC_ISTEP_NUM proc_sbe_ex_host_runtime_scom_magic_istep_num
-#define PROC_SBE_TP_LD_IMAGE_ISTEP_NUM proc_sbe_tp_ld_image_istep_num
-#define PROC_SBE_SCAN_SERVICE_ISTEP_NUM proc_sbe_scan_service_istep_num
-#define PROC_SBE_INTR_SERVICE_ISTEP_NUM proc_sbe_intr_service_istep_num
-
-#endif  // __P8_ISTEP_NUM_H
diff --git a/src/usr/hwpf/hwp/include/p8_scom_addresses.H b/src/usr/hwpf/hwp/include/p8_scom_addresses.H
deleted file mode 100755
index b0f9f52fe..000000000
--- a/src/usr/hwpf/hwp/include/p8_scom_addresses.H
+++ /dev/null
@@ -1,2909 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/include/p8_scom_addresses.H $                */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_scom_addresses.H,v 1.199 2015/09/16 19:33:47 jmcgill Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/p8_scom_addresses.H,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! TITLE : p8_scom_addresses.H
-// *! DESCRIPTION : Defines for P8 scom addresses
-// *! OWNER NAME  : Jeshua Smith  Email: jeshua@us.ibm.com
-// *! BACKUP NAME :               Email:       @us.ibm.com
-// #! ADDITIONAL COMMENTS :
-//
-// The purpose of this header is to define scom addresses for use by procedures.
-// This will help catch address typos at compile time, and will make it easy
-// to track down which procedures use each address
-//
-
-#ifndef P8_SCOM_ADDRESSES
-#define P8_SCOM_ADDRESSES
-
-//----------------------------------------------------------------------
-//  Scom address overview
-//----------------------------------------------------------------------
-// P8 uses 64-bit scom addresses, which are classified into two formats:
-//
-// "Normal" (legacy) format
-//
-//            111111 11112222 22222233 33333333 44444444 44555555 55556666
-// 01234567 89012345 67890123 45678901 23456789 01234567 89012345 67890123
-// -------- -------- -------- -------- -------- -------- -------- --------
-// 00000000 00000000 00000000 00000000 0MCCCCCC ????PPPP 00LLLLLL LLLLLLLL
-//                                      ||          |    |
-//                                      ||          |    `-> Local Address*
-//                                      ||          |
-//                                      ||          `-> Port
-//                                      ||
-//                                      |`-> Chiplet ID**
-//                                      |
-//                                      `-> Multicast bit
-//
-//  * Local address is composed of "00" + 4-bit ring + 10-bit ID
-//    The 10-bit ID is usually 4-bit sat_id and 6-bit reg_id
-//
-// ** Chiplet ID turns into multicast operation type and group number
-//    if the multicast bit is set
-//
-// "Indirect" format
-//
-//
-//            111111 11112222 22222233 33333333 44444444 44555555 55556666
-// 01234567 89012345 67890123 45678901 23456789 01234567 89012345 67890123
-// -------- -------- -------- -------- -------- -------- -------- --------
-// 10000000 0000IIII IIIIIGGG GGGLLLLL 0MCCCCCC ????PPPP 00LLLLLL LLLLLLLL
-//              |         |      |      ||          |    |
-//              |         |      |      ||          |    `-> Local Address*
-//              |         |      |      ||          |
-//              |         |      |      ||          `-> Port
-//              |         |      |      ||
-//              |         |      |      |`-> Chiplet ID**
-//              |         |      |      |
-//              |         |      |      `-> Multicast bit
-//              |         |      |
-//              |         |      `-> Lane ID
-//              |         |
-//              |         `-> RX or TX Group ID
-//              |
-//              `-> Indirect Register Address
-//
-//  * Local address is composed of "00" + 4-bit ring + 4-bit sat_id + "111111"
-//
-// ** Chiplet ID turns into multicast operation type and group number
-//    if the multicast bit is set
-//
-
-#include "common_scom_addresses.H"
-#include "fapi_sbe_common.H"
-
-/******************************************************************************/
-/**********************************  CHIPLET  *********************************/
-/******************************************************************************/
-//      use for lpcs P0, <chipletID>
-CONST_UINT64_T( X_BUS_CHIPLET_0x04000000              , ULL(0x04000000) );
-CONST_UINT64_T( PCIE_CHIPLET_0x09000000               , ULL(0x09000000) );
-CONST_UINT64_T( A_BUS_CHIPLET_0x08000000              , ULL(0x08000000) );
-// EX00_CHIPLET - EX15_CHIPLET defined in the EX CHIPLET section
-// "Multicast" chiplets
-CONST_UINT64_T( ALL_CHIPLETS_OR_0x40000000            , ULL(0x40000000) );
-CONST_UINT64_T( ALL_CHIPLETS_AND_0x48000000           , ULL(0x48000000) );
-CONST_UINT64_T( ALL_CHIPLETS_BITX_0x50000000          , ULL(0x50000000) );
-CONST_UINT64_T( ALL_CHIPLETS_COMP_0x60000000          , ULL(0x60000000) );
-CONST_UINT64_T( ALL_CHIPLETS_WRITE_0x68000000         , ULL(0x68000000) );
-
-// Group 1 : EX chiplets
-CONST_UINT64_T( ALL_EXS_OR_0x41000000                 , ULL(0x41000000) );
-CONST_UINT64_T( ALL_EXS_AND_0x49000000                , ULL(0x49000000) );
-CONST_UINT64_T( ALL_EXS_BITX_0x51000000               , ULL(0x51000000) );
-CONST_UINT64_T( ALL_EXS_COMP_0x61000000               , ULL(0x61000000) );
-CONST_UINT64_T( ALL_EXS_WRITE_0x69000000              , ULL(0x69000000) );
-CONST_UINT64_T( WRITE_ALL_EXS_GP0_AND_0x69000004      , ULL(0x69000004) );
-CONST_UINT64_T( WRITE_ALL_EXS_GP0_OR_0x69000005       , ULL(0x69000005) );
-CONST_UINT64_T( WRITE_ALL_EXS_CLK_REGION_0x69030006   , ULL(0x69030006) );
-CONST_UINT64_T( WRITE_ALL_EXS_CLK_SCANSEL_0x69030007  , ULL(0x69030007) );
-CONST_UINT64_T( READ_OR_ALL_EXS_CLK_STATUS_0x41030008 , ULL(0x41030008) );
-CONST_UINT64_T( WRITE_ALL_EXS_GP3_AND_0x690F0013      , ULL(0x690F0013) );
-CONST_UINT64_T( WRITE_ALL_EXS_GP3_OR_0x690F0014       , ULL(0x690F0014) );
-//CONST_UINT64_T( WRITE_EX_GP3_AND_0x690F0013           , ULL(0x690F0013) );       // and all EX GP3
-//CONST_UINT64_T( WRITE_EX_GP3_OR_0x690F0014            , ULL(0x690F0014) );       // or all EX GP3
-//CONST_UINT64_T( WRITE_EX_PMGP0_OR_0x690F0102          , ULL(0x690F0102) );       // or all EX PMGP0
-
-CONST_UINT64_T( ALL_CORES_OR_0x42000000               , ULL(0x42000000) );
-CONST_UINT64_T( ALL_CORES_AND_0x4A000000              , ULL(0x4A000000) );
-CONST_UINT64_T( ALL_CORES_BITX_0x52000000             , ULL(0x52000000) );
-CONST_UINT64_T( ALL_CORES_COMP_0x62000000             , ULL(0x62000000) );
-CONST_UINT64_T( ALL_CORES_WRITE_0x6A000000            , ULL(0x6A000000) );
-
-
-CONST_UINT64_T( DEVICE_ID_REG_0x000F000F            , ULL(0x000F000F) );
-
-
-/******************************************************************************/
-/********************************  TP CHIPLET  ********************************/
-/******************************************************************************/
-
-
- //------------------------------------------------------------------------------
- //      MULTICAST REGISTER DEFINITION
- //------------------------------------------------------------------------------
- CONST_UINT64_T( WRITE_ALL_EX_PMGP1_REG_0_RWx690F0103                             , ULL(0x690F0103) );
- CONST_UINT64_T( WRITE_ALL_EX_PMGP1_REG_0_WANDx690F0104                           , ULL(0x690F0104) );
- CONST_UINT64_T( WRITE_ALL_EX_PMGP1_REG_0_WORx690F0105                            , ULL(0x690F0105) );
- CONST_UINT64_T( WRITE_ALL_PCBSPM_MODE_REG_0x690F0156                             , ULL(0x690F0156) );
- CONST_UINT64_T( WRITE_ALL_PCBS_Power_Management_Bounds_Reg_0x690F015D            , ULL(0x690F015D) );
-
-
-//------------------------------------------------------------------------------
-//      FSI MBOX (CFAM)
-//------------------------------------------------------------------------------
-CONST_UINT32_T( CFAM_FSI_INTR_MASK_0x0000081C         , ULL(0x0000081C) );
-CONST_UINT32_T( CFAM_FSI_INTR_STATUS_0x0000100B       , ULL(0x0000100B) );
-CONST_UINT32_T( CFAM_FSI_TRUE_MASK_0x0000100D         , ULL(0x0000100D) );
-CONST_UINT32_T( CFAM_FSI_GP3_0x00002812               , ULL(0x00002812) );
-CONST_UINT32_T( CFAM_FSI_GP4_0x00002813               , ULL(0x00002813) );
-CONST_UINT32_T( CFAM_FSI_GP5_0x00002814               , ULL(0x00002814) );
-CONST_UINT32_T( CFAM_FSI_GP6_0x00002815               , ULL(0x00002815) );
-CONST_UINT32_T( CFAM_FSI_GP7_0x00002816               , ULL(0x00002816) );
-CONST_UINT32_T( CFAM_FSI_GP8_0x00002817               , ULL(0x00002817) );
-CONST_UINT32_T( CFAM_FSI_WRITE_PROTECT_0x00002818     , ULL(0x00002818) );
-CONST_UINT32_T( CFAM_OSCSW_SENSE1_0x00002819          , ULL(0x00002819) );
-CONST_UINT32_T( CFAM_OSCSW_SENSE2_0x0000281A          , ULL(0x0000281A) );
-CONST_UINT32_T( CFAM_FSI_GP3_MIRROR_0x0000281B        , ULL(0x0000281B) );
-CONST_UINT32_T( CFAM_FSI_SBE_VITAL_0x0000281C         , ULL(0x0000281C) );
-
-CONST_UINT64_T( MBOX_SCRATCH_REG0_0x00002838          , ULL(0x00002838) );
-CONST_UINT64_T( MBOX_SCRATCH_REG1_0x00002839          , ULL(0x00002839) );
-CONST_UINT64_T( MBOX_SCRATCH_REG2_0x0000283A          , ULL(0x0000283A) );
-CONST_UINT64_T( MBOX_SCRATCH_REG3_0x0000283B          , ULL(0x0000283B) );
-
-//------------------------------------------------------------------------------
-//      OTPROM
-//------------------------------------------------------------------------------
-CONST_UINT64_T( OTPC_M_COMMAND_REGISTER_0x00010000    , ULL(0x00010000) );
-CONST_UINT64_T( OTPC_M_STATUS_REGISTER_0x00010002     , ULL(0x00010002) );
-CONST_UINT64_T( OTPC_M_DATA_REGISTER_0x00010003       , ULL(0x00010003) );
-CONST_UINT64_T( OTPC_M_SECURITY_SWITCH_0x00010005     , ULL(0x00010005) );
-CONST_UINT64_T( OTPC_M_MODE_REGISTER_0x00010008       , ULL(0x00010008) );
-CONST_UINT64_T( OTPC_M_PRGM_REGISTER_0x00010009       , ULL(0x00010009) );
-CONST_UINT64_T( ECID_PART_0_0x00018000                , ULL(0x00018000) );
-CONST_UINT64_T( ECID_PART_1_0x00018001                , ULL(0x00018001) );
-CONST_UINT64_T( ECID_PART_12_0x0001800C               , ULL(0x0001800C) );
-CONST_UINT64_T( ECID_PART_13_0x0001800D               , ULL(0x0001800D) );
-CONST_UINT64_T( ECID_PART_14_0x0001800E               , ULL(0x0001800E) );
-CONST_UINT64_T( ECID_PART_15_0x0001800F               , ULL(0x0001800F) );
-CONST_UINT64_T( ECID_PART_16_0x00018010               , ULL(0x00018010) );
-CONST_UINT64_T( ECID_PART_17_0x00018011               , ULL(0x00018011) );
-CONST_UINT64_T( ECID_PART_18_0x00018012               , ULL(0x00018012) );
-CONST_UINT64_T( ECID_PART_19_0x00018013               , ULL(0x00018013) );
-CONST_UINT64_T( ECID_PART_20_0x00018014               , ULL(0x00018014) );
-CONST_UINT64_T( ECID_PART_21_0x00018015               , ULL(0x00018015) );
-CONST_UINT64_T( ECID_PART_22_0x00018016               , ULL(0x00018016) );
-CONST_UINT64_T( ECID_PART_23_0x00018017               , ULL(0x00018017) );
-
-
-//------------------------------------------------------------------------------
-//      Time of Day (TOD)
-//------------------------------------------------------------------------------
-CONST_UINT64_T( TOD_M_PATH_CTRL_REG_00040000          , ULL(0x00040000) );
-CONST_UINT64_T( TOD_PRI_PORT_0_CTRL_REG_00040001      , ULL(0x00040001) );
-CONST_UINT64_T( TOD_PRI_PORT_1_CTRL_REG_00040002      , ULL(0x00040002) );
-CONST_UINT64_T( TOD_SEC_PORT_0_CTRL_REG_00040003      , ULL(0x00040003) );
-CONST_UINT64_T( TOD_SEC_PORT_1_CTRL_REG_00040004      , ULL(0x00040004) );
-CONST_UINT64_T( TOD_S_PATH_CTRL_REG_00040005          , ULL(0x00040005) );
-CONST_UINT64_T( TOD_I_PATH_CTRL_REG_00040006          , ULL(0x00040006) );
-CONST_UINT64_T( TOD_PSS_MSS_CTRL_REG_00040007         , ULL(0x00040007) );
-CONST_UINT64_T( TOD_PSS_MSS_STATUS_REG_00040008       , ULL(0x00040008) );
-CONST_UINT64_T( TOD_M_PATH_STATUS_REG_00040009        , ULL(0x00040009) );
-CONST_UINT64_T( TOD_S_PATH_STATUS_REG_0004000A        , ULL(0x0004000A) );
-CONST_UINT64_T( TOD_MISC_RESET_REG_0004000B           , ULL(0x0004000B) );
-CONST_UINT64_T( TOD_PROBE_SELECT_REG_0004000C         , ULL(0x0004000C) );
-CONST_UINT64_T( TOD_CHIP_CTRL_REG_00040010            , ULL(0x00040010) );
-CONST_UINT64_T( TOD_TX_TTYPE_0_REG_00040011           , ULL(0x00040011) );
-CONST_UINT64_T( TOD_TX_TTYPE_1_REG_00040012           , ULL(0x00040012) );
-CONST_UINT64_T( TOD_TX_TTYPE_2_REG_00040013           , ULL(0x00040013) );
-CONST_UINT64_T( TOD_TX_TTYPE_3_REG_00040014           , ULL(0x00040014) );
-CONST_UINT64_T( TOD_TX_TTYPE_4_REG_00040015           , ULL(0x00040015) );
-CONST_UINT64_T( TOD_TX_TTYPE_5_REG_00040016           , ULL(0x00040016) );
-CONST_UINT64_T( TOD_MOVE_TOD_TO_TB_REG_00040017       , ULL(0x00040017) );
-CONST_UINT64_T( TOD_LOAD_TOD_MOD_REG_00040018         , ULL(0x00040018) );
-CONST_UINT64_T( TOD_TRACE_DATA_1_REG_0004001D         , ULL(0x0004001D) );
-CONST_UINT64_T( TOD_TRACE_DATA_2_REG_0004001E         , ULL(0x0004001E) );
-CONST_UINT64_T( TOD_TRACE_DATA_3_REG_0004001F         , ULL(0x0004001F) );
-CONST_UINT64_T( TOD_VALUE_REG_00040020                , ULL(0x00040020) );
-CONST_UINT64_T( TOD_LOAD_TOD_REG_00040021             , ULL(0x00040021) );
-CONST_UINT64_T( TOD_START_TOD_REG_00040022            , ULL(0x00040022) );
-CONST_UINT64_T( TOD_LOW_ORDER_STEP_REG_00040023       , ULL(0x00040023) );
-CONST_UINT64_T( TOD_FSM_REG_00040024                  , ULL(0x00040024) );
-CONST_UINT64_T( TOD_TX_TTYPE_CTRL_REG_00040027        , ULL(0x00040027) );
-CONST_UINT64_T( TOD_RX_TTYPE_CTRL_REG_00040029        , ULL(0x00040029) );
-CONST_UINT64_T( TOD_ERROR_REG_00040030                , ULL(0x00040030) );
-CONST_UINT64_T( TOD_ERROR_INJECT_REG_00040031         , ULL(0x00040031) );
-CONST_UINT64_T( TOD_ERROR_MASK_STATUS_REG_00040032    , ULL(0x00040032) );
-CONST_UINT64_T( TOD_ERROR_ROUTING_REG_00040033        , ULL(0x00040033) );
-
-
-//------------------------------------------------------------------------------
-//      SBE VITAL REG
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PORE_SBE_VITAL_0x0005001C             , ULL(0x0005001C) );
-
-
-
-//------------------------------------------------------------------------------
-//      PORE-GPE0
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PORE_GPE0_0x00060000                   , ULL(0x00060000) );
-CONST_UINT64_T( PORE_GPE0_STATUS_0x00060000            , ULL(0x00060000) );
-CONST_UINT64_T( PORE_GPE0_CONTROL_0x00060001           , ULL(0x00060001) );
-CONST_UINT64_T( PORE_GPE0_RESET_0x00060002             , ULL(0x00060002) );
-CONST_UINT64_T( PORE_GPE0_ERROR_MASK_0x00060003        , ULL(0x00060003) );
-CONST_UINT64_T( PORE_GPE0_PRV_BASE_ADDRESS0_0x00060004 , ULL(0x00060004) );
-CONST_UINT64_T( PORE_GPE0_PRV_BASE_ADDRESS1_0x00060005 , ULL(0x00060005) );
-CONST_UINT64_T( PORE_GPE0_OCI_BASE_ADDRESS0_0x00060006 , ULL(0x00060006) );
-CONST_UINT64_T( PORE_GPE0_OCI_BASE_ADDRESS1_0x00060007 , ULL(0x00060007) );
-CONST_UINT64_T( PORE_GPE0_TABLE_BASE_ADDR_0x00060008   , ULL(0x00060008) );
-CONST_UINT64_T( PORE_GPE0_EXE_TRIGGER_0x00060009       , ULL(0x00060009) );
-CONST_UINT64_T( PORE_GPE0_SCRATCH0_0x0006000A          , ULL(0x0006000A) );
-CONST_UINT64_T( PORE_GPE0_SCRATCH1_0x0006000B          , ULL(0x0006000B) );
-CONST_UINT64_T( PORE_GPE0_SCRATCH2_0x0006000C          , ULL(0x0006000C) );
-CONST_UINT64_T( PORE_GPE0_IBUF_01_0x0006000D           , ULL(0x0006000D) );
-CONST_UINT64_T( PORE_GPE0_IBUF_2_0x0006000E            , ULL(0x0006000E) );
-CONST_UINT64_T( PORE_GPE0_DBG0_0x0006000F              , ULL(0x0006000F) );
-CONST_UINT64_T( PORE_GPE0_DBG1_0x00060010              , ULL(0x00060010) );
-CONST_UINT64_T( PORE_GPE0_PC_STACK0_0x00060011         , ULL(0x00060011) );
-CONST_UINT64_T( PORE_GPE0_PC_STACK1_0x00060012         , ULL(0x00060012) );
-CONST_UINT64_T( PORE_GPE0_PC_STACK2_0x00060013         , ULL(0x00060013) );
-CONST_UINT64_T( PORE_GPE0_ID_FLAGS_0x00060014          , ULL(0x00060014) );
-CONST_UINT64_T( PORE_GPE0_DATA0_0x00060015             , ULL(0x00060015) );
-CONST_UINT64_T( PORE_GPE0_MEMORY_RELOC_0x00060016      , ULL(0x00060016) );
-CONST_UINT64_T( PORE_GPE0_I2C_E0_PARAM_0x00060017      , ULL(0x00060017) );
-CONST_UINT64_T( PORE_GPE0_I2C_E1_PARAM_0x00060018      , ULL(0x00060018) );
-CONST_UINT64_T( PORE_GPE0_I2C_E2_PARAM_0x00060019      , ULL(0x00060019) );
-
-//------------------------------------------------------------------------------
-//      PORE-GPE1
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PORE_GPE1_0x00060020                   , ULL(0x00060020) );
-CONST_UINT64_T( PORE_GPE1_STATUS_0x00060020            , ULL(0x00060020) );
-CONST_UINT64_T( PORE_GPE1_CONTROL_0x00060021           , ULL(0x00060021) );
-CONST_UINT64_T( PORE_GPE1_RESET_0x00060022             , ULL(0x00060022) );
-CONST_UINT64_T( PORE_GPE1_ERROR_MASK_0x00060023        , ULL(0x00060023) );
-CONST_UINT64_T( PORE_GPE1_PRV_BASE_ADDRESS0_0x00060024 , ULL(0x00060024) );
-CONST_UINT64_T( PORE_GPE1_PRV_BASE_ADDRESS1_0x00060025 , ULL(0x00060025) );
-CONST_UINT64_T( PORE_GPE1_OCI_BASE_ADDRESS0_0x00060026 , ULL(0x00060026) );
-CONST_UINT64_T( PORE_GPE1_OCI_BASE_ADDRESS1_0x00060027 , ULL(0x00060027) );
-CONST_UINT64_T( PORE_GPE1_TABLE_BASE_ADDR_0x00060028   , ULL(0x00060028) );
-CONST_UINT64_T( PORE_GPE1_EXE_TRIGGER_0x00060029       , ULL(0x00060029) );
-CONST_UINT64_T( PORE_GPE1_SCRATCH0_0x0006002A          , ULL(0x0006002A) );
-CONST_UINT64_T( PORE_GPE1_SCRATCH1_0x0006002B          , ULL(0x0006002B) );
-CONST_UINT64_T( PORE_GPE1_SCRATCH2_0x0006002C          , ULL(0x0006002C) );
-CONST_UINT64_T( PORE_GPE1_IBUF_01_0x0006002D           , ULL(0x0006002D) );
-CONST_UINT64_T( PORE_GPE1_IBUF_2_0x0006002E            , ULL(0x0006002E) );
-CONST_UINT64_T( PORE_GPE1_DBG0_0x0006002F              , ULL(0x0006002F) );
-CONST_UINT64_T( PORE_GPE1_DBG1_0x00060030              , ULL(0x00060030) );
-CONST_UINT64_T( PORE_GPE1_PC_STACK0_0x00060031         , ULL(0x00060031) );
-CONST_UINT64_T( PORE_GPE1_PC_STACK1_0x00060032         , ULL(0x00060032) );
-CONST_UINT64_T( PORE_GPE1_PC_STACK2_0x00060033         , ULL(0x00060033) );
-CONST_UINT64_T( PORE_GPE1_ID_FLAGS_0x00060034          , ULL(0x00060034) );
-CONST_UINT64_T( PORE_GPE1_DATA0_0x00060035             , ULL(0x00060035) );
-CONST_UINT64_T( PORE_GPE1_MEMORY_RELOC_0x00060036      , ULL(0x00060036) );
-CONST_UINT64_T( PORE_GPE1_I2C_E0_PARAM_0x00060037      , ULL(0x00060037) );
-CONST_UINT64_T( PORE_GPE1_I2C_E1_PARAM_0x00060038      , ULL(0x00060038) );
-CONST_UINT64_T( PORE_GPE1_I2C_E2_PARAM_0x00060039      , ULL(0x00060039) );
-
-//------------------------------------------------------------------------------
-//      PORE-SLW
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PORE_SLW_0x00068000                   , ULL(0x00068000) );
-CONST_UINT64_T( PORE_SLW_STATUS_0x00068000            , ULL(0x00068000) );
-CONST_UINT64_T( PORE_SLW_CONTROL_0x00068001           , ULL(0x00068001) );
-CONST_UINT64_T( PORE_SLW_RESET_0x00068002             , ULL(0x00068002) );
-CONST_UINT64_T( PORE_SLW_ERROR_MASK_0x00068003        , ULL(0x00068003) );
-CONST_UINT64_T( PORE_SLW_PRV_BASE_ADDRESS0_0x00068004 , ULL(0x00068004) );
-CONST_UINT64_T( PORE_SLW_PRV_BASE_ADDRESS1_0x00068005 , ULL(0x00068005) );
-CONST_UINT64_T( PORE_SLW_OCI_BASE_ADDRESS0_0x00068006 , ULL(0x00068006) );
-CONST_UINT64_T( PORE_SLW_OCI_BASE_ADDRESS1_0x00068007 , ULL(0x00068007) );
-CONST_UINT64_T( PORE_SLW_TABLE_BASE_ADDR_0x00068008   , ULL(0x00068008) );
-CONST_UINT64_T( PORE_SLW_EXE_TRIGGER_0x00068009       , ULL(0x00068009) );
-CONST_UINT64_T( PORE_SLW_SCRATCH0_0x0006800A          , ULL(0x0006800A) );
-CONST_UINT64_T( PORE_SLW_SCRATCH1_0x0006800B          , ULL(0x0006800B) );
-CONST_UINT64_T( PORE_SLW_SCRATCH2_0x0006800C          , ULL(0x0006800C) );
-CONST_UINT64_T( PORE_SLW_IBUF_01_0x0006800D           , ULL(0x0006800D) );
-CONST_UINT64_T( PORE_SLW_IBUF_2_0x0006800E            , ULL(0x0006800E) );
-CONST_UINT64_T( PORE_SLW_DBG0_0x0006800F              , ULL(0x0006800F) );
-CONST_UINT64_T( PORE_SLW_DBG1_0x00068010              , ULL(0x00068010) );
-CONST_UINT64_T( PORE_SLW_PC_STACK0_0x00068011         , ULL(0x00068011) );
-CONST_UINT64_T( PORE_SLW_PC_STACK1_0x00068012         , ULL(0x00068012) );
-CONST_UINT64_T( PORE_SLW_PC_STACK2_0x00068013         , ULL(0x00068013) );
-CONST_UINT64_T( PORE_SLW_ID_FLAGS_0x00068014          , ULL(0x00068014) );
-CONST_UINT64_T( PORE_SLW_DATA0_0x00068015             , ULL(0x00068015) );
-CONST_UINT64_T( PORE_SLW_MEMORY_RELOC_0x00068016      , ULL(0x00068016) );
-CONST_UINT64_T( PORE_SLW_I2C_E0_PARAM_0x00068017      , ULL(0x00068017) );
-CONST_UINT64_T( PORE_SLW_I2C_E1_PARAM_0x00068018      , ULL(0x00068018) );
-CONST_UINT64_T( PORE_SLW_I2C_E2_PARAM_0x00068019      , ULL(0x00068019) );
-
-//------------------------------------------------------------------------------
-//      OCC/OCB
-//------------------------------------------------------------------------------
-
-CONST_UINT64_T( OCC_CONTROL_0x0006B000                , ULL(0x0006B000) );
-CONST_UINT64_T( OCC_CONTROL_AND_0x0006B001            , ULL(0x0006B001) );
-CONST_UINT64_T( OCC_CONTROL_OR_0x0006B002             , ULL(0x0006B002) );
-CONST_UINT64_T( OCC_DEBUG_MODE_0x0006B003             , ULL(0x0006B003) );
-CONST_UINT64_T( OCC_JTG_PIB_OJCFG_0x0006B004          , ULL(0x0006B004) );
-CONST_UINT64_T( OCC_JTG_PIB_OJCFG_AND_0x0006B005      , ULL(0x0006B005) );
-CONST_UINT64_T( OCC_JTG_PIB_OJCFG_OR_0x0006B006       , ULL(0x0006B006) );
-
-CONST_UINT64_T( OCB0_ADDRESS_0x0006B010               , ULL(0x0006B010) );
-CONST_UINT64_T( OCB0_STATUS_CONTROL_0x0006B011        , ULL(0x0006B011) );
-CONST_UINT64_T( OCB0_STATUS_CONTROL_AND_0x0006B012    , ULL(0x0006B012) );
-CONST_UINT64_T( OCB0_STATUS_CONTROL_OR_0x0006B013     , ULL(0x0006B013) );
-CONST_UINT64_T( OCB0_ERROR_STATUS_0x0006B014          , ULL(0x0006B014) );
-CONST_UINT64_T( OCB0_DATA_0x0006B015                  , ULL(0x0006B015) );
-CONST_UINT64_T( OCB0_PULL_BASE_0x0006A200             , ULL(0x0006A200) );
-CONST_UINT64_T( OCB0_PULL_STATUS_CONTROL_0x0006A201   , ULL(0x0006A201) );
-CONST_UINT64_T( OCB0_PUSH_BASE_0x0006A203             , ULL(0x0006A203) );
-CONST_UINT64_T( OCB0_PUSH_STATUS_CONTROL_0x0006A204   , ULL(0x0006A204) );
-CONST_UINT64_T( OCB0_STREAM_ERR_STATUS_0x0006A206     , ULL(0x0006A206) );
-CONST_UINT64_T( OCB0_UNTRUSTED_CONTROL_0x0006A207     , ULL(0x0006A207) );
-CONST_UINT64_T( OCB0_LIN_WINDOW_CONTROL_0x0006A208    , ULL(0x0006A208) );
-CONST_UINT64_T( OCB0_LIN_WINDOW_BASE_0x0006A20C       , ULL(0x0006A20C) );
-
-CONST_UINT64_T( OCB1_ADDRESS_0x0006B030               , ULL(0x0006B030) );
-CONST_UINT64_T( OCB1_STATUS_CONTROL_0x0006B031        , ULL(0x0006B031) );
-CONST_UINT64_T( OCB1_STATUS_CONTROL_AND_0x0006B032    , ULL(0x0006B032) );
-CONST_UINT64_T( OCB1_STATUS_CONTROL_OR_0x0006B033     , ULL(0x0006B033) );
-CONST_UINT64_T( OCB1_ERROR_STATUS_0x0006B034          , ULL(0x0006B034) );
-CONST_UINT64_T( OCB1_DATA_0x0006B035                  , ULL(0x0006B035) );
-CONST_UINT64_T( OCB1_PULL_BASE_0x0006A210             , ULL(0x0006A210) );
-CONST_UINT64_T( OCB1_PULL_STATUS_CONTROL_0x0006A211   , ULL(0x0006A211) );
-CONST_UINT64_T( OCB1_PUSH_BASE_0x0006A213             , ULL(0x0006A213) );
-CONST_UINT64_T( OCB1_PUSH_STATUS_CONTROL_0x0006A214   , ULL(0x0006A214) );
-CONST_UINT64_T( OCB1_STREAM_ERR_STATUS_0x0006A216     , ULL(0x0006A216) );
-CONST_UINT64_T( OCB1_UNTRUSTED_CONTROL_0x0006A217     , ULL(0x0006A217) );
-CONST_UINT64_T( OCB1_LIN_WINDOW_CONTROL_0x0006A218    , ULL(0x0006A218) );
-CONST_UINT64_T( OCB1_LIN_WINDOW_BASE_0x0006A21C       , ULL(0x0006A21C) );
-
-CONST_UINT64_T( OCB2_ADDRESS_0x0006B050               , ULL(0x0006B050) );
-CONST_UINT64_T( OCB2_STATUS_CONTROL_0x0006B051        , ULL(0x0006B051) );
-CONST_UINT64_T( OCB2_STATUS_CONTROL_AND_0x0006B052    , ULL(0x0006B052) );
-CONST_UINT64_T( OCB2_STATUS_CONTROL_OR_0x0006B053     , ULL(0x0006B053) );
-CONST_UINT64_T( OCB2_ERROR_STATUS_0x0006B054          , ULL(0x0006B054) );
-CONST_UINT64_T( OCB2_DATA_0x0006B055                  , ULL(0x0006B055) );
-CONST_UINT64_T( OCB2_PULL_BASE_0x0006A220             , ULL(0x0006A220) );
-CONST_UINT64_T( OCB2_PULL_STATUS_CONTROL_0x0006A221   , ULL(0x0006A221) );
-CONST_UINT64_T( OCB2_PUSH_BASE_0x0006A223             , ULL(0x0006A223) );
-CONST_UINT64_T( OCB2_PUSH_STATUS_CONTROL_0x0006A224   , ULL(0x0006A224) );
-CONST_UINT64_T( OCB2_STREAM_ERR_STATUS_0x0006A226     , ULL(0x0006A226) );
-CONST_UINT64_T( OCB2_UNTRUSTED_CONTROL_0x0006A227     , ULL(0x0006A227) );
-CONST_UINT64_T( OCB2_LIN_WINDOW_CONTROL_0x0006A228    , ULL(0x0006A228) );
-CONST_UINT64_T( OCB2_LIN_WINDOW_BASE_0x0006A22C       , ULL(0x0006A22C) );
-
-CONST_UINT64_T( OCB3_ADDRESS_0x0006B070               , ULL(0x0006B070) );
-CONST_UINT64_T( OCB3_STATUS_CONTROL_0x0006B071        , ULL(0x0006B071) );
-CONST_UINT64_T( OCB3_STATUS_CONTROL_AND_0x0006B072    , ULL(0x0006B072) );
-CONST_UINT64_T( OCB3_STATUS_CONTROL_OR_0x0006B073     , ULL(0x0006B073) );
-CONST_UINT64_T( OCB3_ERROR_STATUS_0x0006B074          , ULL(0x0006B074) );
-CONST_UINT64_T( OCB3_DATA_0x0006B075                  , ULL(0x0006B075) );
-
-CONST_UINT64_T( OCC_LFIR_0x01010800                   , ULL(0x01010800) );
-CONST_UINT64_T( OCC_LFIR_AND_0x01010801               , ULL(0x01010801) );
-CONST_UINT64_T( OCC_LFIR_OR_0x01010802                , ULL(0x01010802) );
-CONST_UINT64_T( OCC_LFIR_MASK_0x01010803              , ULL(0x01010803) );
-CONST_UINT64_T( OCC_LFIR_MASK_AND_0x01010804          , ULL(0x01010804) );
-CONST_UINT64_T( OCC_LFIR_MASK_OR_0x01010805           , ULL(0x01010805) );
-CONST_UINT64_T( OCC_LFIR_ACT0_0x01010806              , ULL(0x01010806) );
-CONST_UINT64_T( OCC_LFIR_ACT1_0x01010807              , ULL(0x01010807) );
-
-CONST_UINT64_T( OCC_PMC_LFIR_0x01010C00               , ULL(0x01010C00) );
-CONST_UINT64_T( OCC_PMC_LFIR_AND_0x01010C01           , ULL(0x01010C01) );
-CONST_UINT64_T( OCC_PMC_LFIR_MASK_0x01010C03          , ULL(0x01010C03) );
-
-// sram registers
-CONST_UINT64_T( OCC_SRAM_BOOT_VEC0_0x00066004         , ULL(0x00066004) );
-CONST_UINT64_T( OCC_SRAM_BOOT_VEC1_0x00066005         , ULL(0x00066005) );
-CONST_UINT64_T( OCC_SRAM_BOOT_VEC2_0x00066006         , ULL(0x00066006) );
-CONST_UINT64_T( OCC_SRAM_BOOT_VEC3_0x00066007         , ULL(0x00066007) );
-
-// interrupt controller registers
-CONST_UINT64_T( OCC_ITP_SOURCE0_MASK_AND_0x0006A001   , ULL(0x0006A001) );
-CONST_UINT64_T( OCC_ITP_SOURCE1_MASK_AND_0x0006A011   , ULL(0x0006A011) );
-CONST_UINT64_T( OCC_ITP_MASK0_MASK_OR_0x0006A006      , ULL(0x0006A006) );
-CONST_UINT64_T( OCC_ITP_MASK1_MASK_OR_0x0006A016      , ULL(0x0006A016) );
-CONST_UINT64_T( OCC_ITP_TYPE0_0x0006A008              , ULL(0x0006A008) );
-CONST_UINT64_T( OCC_ITP_TYPE1_0x0006A018              , ULL(0x0006A018) );
-CONST_UINT64_T( OCC_ITP_EDGE_POLARITY0_0x0006A009     , ULL(0x0006A009) );
-CONST_UINT64_T( OCC_ITP_EDGE_POLARITY1_0x0006A019     , ULL(0x0006A019) );
-CONST_UINT64_T( OCC_ITP_CRITICAL_EN0_0x0006A00A       , ULL(0x0006A00A) );
-CONST_UINT64_T( OCC_ITP_CRITICAL_EN1_0x0006A01A       , ULL(0x0006A01A) );
-CONST_UINT64_T( OCC_ITP_DEBUG_HALT_EN0_0x0006A00E     , ULL(0x0006A00E) );
-CONST_UINT64_T( OCC_ITP_DEBUG_HALT_EN1_0x0006A01E     , ULL(0x0006A01E) );
-CONST_UINT64_T( OCC_ITP_UNCOND_DEBUG_EN0_0x0006A00C   , ULL(0x0006A00C) );
-CONST_UINT64_T( OCC_ITP_UNCOND_DEBUG_EN1_0x0006A01C   , ULL(0x0006A01C) );
-CONST_UINT64_T( OCC_ITP_MISC_0x0006A020               , ULL(0x0006A020) );
-CONST_UINT64_T( OCC_ITP_MISC_AND_0x0006A021           , ULL(0x0006A021) );
-CONST_UINT64_T( OCC_ITP_MISC_OR_0x0006A022            , ULL(0x0006A022) );
-CONST_UINT64_T( OCC_ITP_TIMER0_0x0006A100             , ULL(0x0006A100) );
-CONST_UINT64_T( OCC_ITP_TIMER1_0x0006A101             , ULL(0x0006A101) );
-
-//------------------------------------------------------------------------------
-//      PMC
-//------------------------------------------------------------------------------
-
-// PIB Space Addresses
-
-CONST_UINT64_T( PMC_MODE_REG_0x00062000               , ULL(0x00062000) );
-CONST_UINT64_T( PMC_PSTATE_MONITOR_AND_CTRL_REG_0x00062002, ULL(0x00062002)) ;
-CONST_UINT64_T( PMC_RAIL_BOUNDS_0x00062003            , ULL(0x00062003) );
-CONST_UINT64_T( PMC_GLOBAL_PSTATE_BOUNDS_0x00062004   , ULL(0x00062004) );
-CONST_UINT64_T( PMC_PARAMETER_REG1_0x00062006         , ULL(0x00062006) );
-CONST_UINT64_T( PMC_EFF_GLOBAL_ACTUAL_VOLTAGE_REG_0x00062007, ULL(0x00062007) );
-CONST_UINT64_T( PMC_STATUS_REG_0x00062009             , ULL(0x00062009) );
-CONST_UINT64_T( PMC_OCC_HEARTBEAT_REG_0x00062066      , ULL(0x00062066) );
-CONST_UINT64_T( PMC_CORE_DECONFIG_REG_0x0006200D      , ULL(0x0006200D) );
-CONST_UINT64_T( PMC_FSMSTATE_STATUS_REG_0x00062020    , ULL(0x00062020) );
-CONST_UINT64_T( PMC_PIRR0_REG_0x00062080              , ULL(0x00062080) );
-CONST_UINT64_T( PMC_PIRR0_REG_0x00062081              , ULL(0x00062081) );
-CONST_UINT64_T( PMC_PIRR0_REG_0x00062082              , ULL(0x00062082) );
-CONST_UINT64_T( PMC_PIRR0_REG_0x00062083              , ULL(0x00062083) );
-CONST_UINT64_T( PMC_PORRR0_REG_0x0006208E             , ULL(0x0006208E) );
-CONST_UINT64_T( PMC_PORRR1_REG_0x0006208F             , ULL(0x0006208F) );
-CONST_UINT64_T( PMC_PORRS_REG_0x00062090              , ULL(0x00062090) );
-CONST_UINT64_T( PMC_DEEPEXIT_MASK_0x00062092          , ULL(0x00062092) );
-CONST_UINT64_T( PMC_DEEPEXIT_MASK_WAND_0x000620A0     , ULL(0x000620A0) );
-CONST_UINT64_T( PMC_DEEPEXIT_MASK_WOR_0x000620A1      , ULL(0x000620A1) );
-CONST_UINT64_T( PMC_INTCHP_PSTATE_REG_0x00062017      , ULL(0x00062017) );
-CONST_UINT64_T( PMC_INTCHP_COMMAND_REG_0x00062014     , ULL(0x00062014) );
-CONST_UINT64_T( PMC_INTCHP_STATUS_REG_0x00062013      , ULL(0x00062013) );
-CONST_UINT64_T( PMC_INTCHP_CTRL_REG1_0x00062010       , ULL(0x00062010) );
-CONST_UINT64_T( PMC_INTCHP_CTRL_REG4_0x00062012       , ULL(0x00062012) );
-CONST_UINT64_T( PMC_PORE_REQ_REG0_0x0006208E          , ULL(0x0006208E) );
-CONST_UINT64_T( PMC_PARAMETER_REG0_0x00062005         , ULL(0x00062005) );
-CONST_UINT64_T( PMC_O2P_CTRL_STATUS_REG_0x00062061  , ULL (0x00062061));
-
-CONST_UINT64_T( OCB_OCI_OIMR1_0x0006a014                    , ULL(0x0006a014) );
-CONST_UINT64_T( OCB_OCI_OIMR0_0x0006a004                    , ULL(0x0006a004) );
-
-// SPIVID Controller
-CONST_UINT64_T( PMC_SPIV_CTRL_REG0A_0x00062040        , ULL(0x00062040) );
-CONST_UINT64_T( PMC_SPIV_CTRL_REG0B_0x00062041        , ULL(0x00062041) );
-CONST_UINT64_T( PMC_SPIV_CTRL_REG1_0x00062042         , ULL(0x00062042) );
-CONST_UINT64_T( PMC_SPIV_CTRL_REG2_0x00062043         , ULL(0x00062043) );
-CONST_UINT64_T( PMC_SPIV_CTRL_REG3_0x00062044         , ULL(0x00062044) );
-CONST_UINT64_T( PMC_SPIV_CTRL_REG4_0x00062045         , ULL(0x00062045) );
-CONST_UINT64_T( PMC_SPIV_STATUS_REG_0x00062046        , ULL(0x00062046) );
-CONST_UINT64_T( PMC_SPIV_COMMAND_REG_0x00062047       , ULL(0x00062047) );
-// OCI to SPI (O2S)
-CONST_UINT64_T( PMC_O2S_CTRL_REG0A_0x00062050         , ULL(0x00062050) );
-CONST_UINT64_T( PMC_O2S_CTRL_REG0B_0x00062051         , ULL(0x00062051) );
-CONST_UINT64_T( PMC_O2S_CTRL_REG1_0x00062052          , ULL(0x00062052) );
-CONST_UINT64_T( PMC_O2S_CTRL_REG2_0x00062053          , ULL(0x00062053) );
-CONST_UINT64_T( PMC_O2S_CTRL_REG4_0x00062055          , ULL(0x00062055) );
-CONST_UINT64_T( PMC_O2S_STATUS_REG_0x00062056         , ULL(0x00062056) );
-CONST_UINT64_T( PMC_O2S_COMMAND_REG_0x00062057        , ULL(0x00062057) );
-CONST_UINT64_T( PMC_O2S_WDATA_REG_0x00062058          , ULL(0x00062058) );
-CONST_UINT64_T( PMC_O2S_RDATA_REG_0x00062059          , ULL(0x00062059) );
-// PORE interface
-CONST_UINT64_T( PMC_PORE_REQ_STAT_REG_0x00062090      , ULL(0x00062090) );
-// PMC LFIR
-CONST_UINT64_T( PMC_LFIR_0x01010840                   , ULL(0x01010840) );
-CONST_UINT64_T( PMC_LFIR_AND_0x01010841               , ULL(0x01010841) );
-CONST_UINT64_T( PMC_LFIR_OR_0x01010842                , ULL(0x01010842) );
-CONST_UINT64_T( PMC_LFIR_MASK_0x01010843              , ULL(0x01010843) );
-CONST_UINT64_T( PMC_LFIR_MASK_AND_0x01010844          , ULL(0x01010844) );
-CONST_UINT64_T( PMC_LFIR_MASK_OR_0x01010845           , ULL(0x01010845) );
-CONST_UINT64_T( PMC_LFIR_ACT0_0x01010846              , ULL(0x01010846) );
-CONST_UINT64_T( PMC_LFIR_ACT1_0x01010847              , ULL(0x01010847) );
-CONST_UINT64_T( PMC_ERROR_INT_MASK_HI_0x00062067      , ULL(0x00062067) );
-CONST_UINT64_T( PMC_ERROR_INT_MASK_LO_0x00062068      , ULL(0x00062068) );
-
-// OCI Space Addresses
-
-CONST_UINT32_T( OCI_PMC_PORE_REQ_STAT_REG_0x40010480  , ULL(0x40010480) );
-CONST_UINT32_T( OCI_PMC_PORE_SCRATCH0_REG_0x400104E8  , ULL(0x400104E8) );
-CONST_UINT32_T( OCI_PMC_PORE_SCRATCH1_REG_0x400104F0  , ULL(0x400104F0) );
-CONST_UINT32_T( OCI_OCB_OTR0_REG_0x40050800           , ULL(0x40050800) );
-
-//------------------------------------------------------------------------------
-//      SPIADC
-//------------------------------------------------------------------------------
-CONST_UINT64_T( SPIPSS_ADC_CTRL_REG0_0x00070000       , ULL(0x00070000) );
-CONST_UINT64_T( SPIPSS_ADC_CTRL_REG1_0x00070001       , ULL(0x00070001) );
-CONST_UINT64_T( SPIPSS_ADC_CTRL_REG2_0x00070002       , ULL(0x00070002) );
-CONST_UINT64_T( SPIPSS_ADC_STATUS_REG_0x00070003      , ULL(0x00070003) );
-CONST_UINT64_T( SPIPSS_ADC_CMD_REG_0x00070004         , ULL(0x00070004) );
-CONST_UINT64_T( SPIPSS_ADC_WDATA_REG_0x00070010       , ULL(0x00070010) );
-CONST_UINT64_T( SPIPSS_ADC_RDATA_REG0_0x00070020      , ULL(0x00070020) );
-CONST_UINT64_T( SPIPSS_ADC_RDATA_REG1_0x00070021      , ULL(0x00070021) );
-CONST_UINT64_T( SPIPSS_ADC_RDATA_REG2_0x00070022      , ULL(0x00070022) );
-CONST_UINT64_T( SPIPSS_ADC_RDATA_REG3_0x00070023      , ULL(0x00070023) );
-CONST_UINT64_T( SPIPSS_100NS_REG_0x00070028           , ULL(0x00070028) );
-CONST_UINT64_T( SPIPSS_P2S_CTRL_REG0_0x00070040       , ULL(0x00070040) );
-CONST_UINT64_T( SPIPSS_P2S_CTRL_REG1_0x00070041       , ULL(0x00070041) );
-CONST_UINT64_T( SPIPSS_P2S_CTRL_REG2_0x00070042       , ULL(0x00070042) );
-CONST_UINT64_T( SPIPSS_P2S_STATUS_REG_0x00070043      , ULL(0x00070043) );
-CONST_UINT64_T( SPIPSS_P2S_COMMAND_REG_0x00070044     , ULL(0x00070044) );
-CONST_UINT64_T( SPIPSS_P2S_WDATA_REG_0x00070050       , ULL(0x00070050) );
-CONST_UINT64_T( SPIPSS_P2S_RDATA_REG_0x00070060       , ULL(0x00070060) );
-CONST_UINT64_T( SPIPSS_ADC_RESET_REGISTER_0x00070005  , ULL(0x00070005) );
-CONST_UINT64_T( SPIPSS_P2S_RESET_REGISTER_0x00070045  , ULL(0x00070045) );
-
-//------------------------------------------------------------------------------
-//      PIB-ATTACHED MEMORY
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PIBMEM0_0x00080000                    , ULL(0x00080000) );
-CONST_UINT64_T( PIBMEM_CONTROL_0x00088000             , ULL(0x00088000) );
-CONST_UINT64_T( PIBMEM_ADDRESS_0x00088001             , ULL(0x00088001) );
-CONST_UINT64_T( PIBMEM_DATA_0x00088002                , ULL(0x00088002) );
-CONST_UINT64_T( PIBMEM_DATA_INC_0x00088003            , ULL(0x00088003) );
-CONST_UINT64_T( PIBMEM_DATA_DEC_0x00088004            , ULL(0x00088004) );
-CONST_UINT64_T( PIBMEM_STATUS_0x00088005              , ULL(0x00088005) );
-CONST_UINT64_T( PIBMEM_RESET_0x00088006               , ULL(0x00088006) );
-CONST_UINT64_T( PIBMEM_REPAIR_0x00088007              , ULL(0x00088007) );
-
-//------------------------------------------------------------------------------
-//      I2C MASTER (MODE)
-//------------------------------------------------------------------------------
-CONST_UINT64_T( I2CM_MODE_REGISTER_0_0x000A0006          , ULL(0x000A0006) );
-CONST_UINT64_T( I2CM_WATER_MARK_0_0x000A0007             , ULL(0x000A0007) );
-CONST_UINT64_T( I2CM_INTERRUPT_MASK_0_0x000A0008         , ULL(0x000A0008) );
-CONST_UINT64_T( I2CM_INTERRUPT_COND_0_0x000A0009         , ULL(0x000A0009) );
-CONST_UINT64_T( I2CM_INTERRUPTS_0_0x000A000A             , ULL(0x000A000A) );
-CONST_UINT64_T( I2CM_STATUS_REGISTER_ENGINE_0_0x000A000B , ULL(0x000A000B) );
-CONST_UINT64_T( I2CM_EXTENDED_STATUS_0_0x000A000C        , ULL(0x000A000C) );
-CONST_UINT64_T( I2CM_RESIDUAL_FE_BE_LENGTH_0_0x000A000D  , ULL(0x000A000D) );
-CONST_UINT64_T( I2CM_BUSY_REGISTER_0_0x000A000E          , ULL(0x000A000E) );
-
-//------------------------------------------------------------------------------
-//      I2C MASTER (MEMS1)
-//------------------------------------------------------------------------------
-CONST_UINT64_T( I2CMS_MEMS1_CONTROL_0x000A0020        , ULL(0x000A0020) );
-CONST_UINT64_T( I2CMS_MEMS1_RESET_0x000A0021          , ULL(0x000A0021) );
-CONST_UINT64_T( I2CMS_MEMS1_STATUS_0x000A0022         , ULL(0x000A0022) );
-CONST_UINT64_T( I2CMS_MEMS1_DATA_0x000A0023           , ULL(0x000A0023) );
-CONST_UINT64_T( I2CMS_MEMS1_COMMAND_0x000A0025        , ULL(0x000A0025) );
-
-//------------------------------------------------------------------------------
-//      I2C MASTER (PCI)
-//------------------------------------------------------------------------------
-CONST_UINT64_T( I2CMS_PCI_0x000A0040                  , ULL(0x000A0040) );
-CONST_UINT64_T( I2CMS_PCI_CONTROL_0x000A0040          , ULL(0x000A0040) );
-CONST_UINT64_T( I2CMS_PCI_RESET_0x000A0041            , ULL(0x000A0041) );
-CONST_UINT64_T( I2CMS_PCI_STATUS_0x000A0042           , ULL(0x000A0042) );
-CONST_UINT64_T( I2CMS_PCI_DATA_0x000A0043             , ULL(0x000A0043) );
-CONST_UINT64_T( I2CMS_PCI_COMMAND_0x000A0045          , ULL(0x000A0045) );
-
-//------------------------------------------------------------------------------
-//      LPC
-//------------------------------------------------------------------------------
-CONST_UINT64_T( LPC_CONTROL_0x000B0000                , ULL(0x000B0000) );
-CONST_UINT64_T( LPC_RESET_0x000B0001                  , ULL(0x000B0001) );
-CONST_UINT64_T( LPC_STATUS_0x000B0002                 , ULL(0x000B0002) );
-CONST_UINT64_T( LPC_DATA_0x000B0003                   , ULL(0x000B0003) );
-CONST_UINT64_T( LPC_ECC_ADDRESS_0x000B0004            , ULL(0x000B0004) );
-CONST_UINT64_T( LPC_I2C_ADDRESS_0x000B0005            , ULL(0x000B0005) );
-CONST_UINT64_T( LPC_FW_CONTROL_0x000B0020             , ULL(0x000B0020) );
-CONST_UINT64_T( LPC_FW_RESET_0x000B0021               , ULL(0x000B0021) );
-CONST_UINT64_T( LPC_FW_STATUS_0x000B0022              , ULL(0x000B0022) );
-CONST_UINT64_T( LPC_FW_DATA_0x000B0023                , ULL(0x000B0023) );
-
-//------------------------------------------------------------------------------
-//    PORE_ECCB
-//------------------------------------------------------------------------------
-
-CONST_UINT64_T( PORE_ECCB_CONTROL_REGISTER_0x000C0000 , ULL(0x000C0000) );
-CONST_UINT64_T( PORE_ECCB_STATUS_REGISTER_READ_0x000C0002, ULL(0x000C0002) );
-CONST_UINT64_T( PORE_ECCB_DATA_REGISTER_0x000C0003    , ULL(0x000C0003) );
-CONST_UINT64_T( PORE_ECCB_ECC_ADDRESS_REGISTER_0x000C0004    , ULL(0x000C0004) );
-
-//------------------------------------------------------------------------------
-//    I2CS
-//------------------------------------------------------------------------------
-CONST_UINT64_T( I2C_SLAVE_CONFIG_REG_0x000D0000       , ULL(0x000D0000) );
-
-//------------------------------------------------------------------------------
-//      PORE-SBE
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PORE_SBE_0x000E0000                   , ULL(0x000E0000) );
-CONST_UINT64_T( PORE_SBE_STATUS_0x000E0000            , ULL(0x000E0000) );
-CONST_UINT64_T( PORE_SBE_CONTROL_0x000E0001           , ULL(0x000E0001) );
-CONST_UINT64_T( PORE_SBE_RESET_0x000E0002             , ULL(0x000E0002) );
-CONST_UINT64_T( PORE_SBE_ERROR_MASK_0x000E0003        , ULL(0x000E0003) );
-CONST_UINT64_T( PORE_SBE_PRV_BASE_ADDRESS0_0x000E0004 , ULL(0x000E0004) );
-CONST_UINT64_T( PORE_SBE_PRV_BASE_ADDRESS1_0x000E0005 , ULL(0x000E0005) );
-CONST_UINT64_T( PORE_SBE_OCI_BASE_ADDRESS0_0x000E0006 , ULL(0x000E0006) );
-CONST_UINT64_T( PORE_SBE_OCI_BASE_ADDRESS1_0x000E0007 , ULL(0x000E0007) );
-CONST_UINT64_T( PORE_SBE_TABLE_BASE_ADDR_0x000E0008   , ULL(0x000E0008) );
-CONST_UINT64_T( PORE_SBE_EXE_TRIGGER_0x000E0009       , ULL(0x000E0009) );
-CONST_UINT64_T( PORE_SBE_SCRATCH0_0x000E000A          , ULL(0x000E000A) );
-CONST_UINT64_T( PORE_SBE_SCRATCH1_0x000E000B          , ULL(0x000E000B) );
-CONST_UINT64_T( PORE_SBE_SCRATCH2_0x000E000C          , ULL(0x000E000C) );
-CONST_UINT64_T( PORE_SBE_IBUF_01_0x000E000D           , ULL(0x000E000D) );
-CONST_UINT64_T( PORE_SBE_IBUF_2_0x000E000E            , ULL(0x000E000E) );
-CONST_UINT64_T( PORE_SBE_DBG0_0x000E000F              , ULL(0x000E000F) );
-CONST_UINT64_T( PORE_SBE_DBG1_0x000E0010              , ULL(0x000E0010) );
-CONST_UINT64_T( PORE_SBE_PC_STACK0_0x000E0011         , ULL(0x000E0011) );
-CONST_UINT64_T( PORE_SBE_PC_STACK1_0x000E0012         , ULL(0x000E0012) );
-CONST_UINT64_T( PORE_SBE_PC_STACK2_0x000E0013         , ULL(0x000E0013) );
-CONST_UINT64_T( PORE_SBE_ID_FLAGS_0x000E0014          , ULL(0x000E0014) );
-CONST_UINT64_T( PORE_SBE_DATA0_0x000E0015             , ULL(0x000E0015) );
-CONST_UINT64_T( PORE_SBE_MEMORY_RELOC_0x000E0016      , ULL(0x000E0016) );
-CONST_UINT64_T( PORE_SBE_I2C_E0_PARAM_0x000E0017      , ULL(0x000E0017) );
-CONST_UINT64_T( PORE_SBE_I2C_E1_PARAM_0x000E0018      , ULL(0x000E0018) );
-CONST_UINT64_T( PORE_SBE_I2C_E2_PARAM_0x000E0019      , ULL(0x000E0019) );
-
-//------------------------------------------------------------------------------
-//      LPC
-//------------------------------------------------------------------------------
-CONST_UINT64_T( LPC_FIR_0x01010C00                    , ULL(0x01010C00) );
-CONST_UINT64_T( LPC_FIR_AND_0x01010C01                , ULL(0x01010C01) );
-CONST_UINT64_T( LPC_FIR_OR_0x01010C02                 , ULL(0x01010C02) );
-CONST_UINT64_T( LPC_FIR_MASK_0x01010C03               , ULL(0x01010C03) );
-CONST_UINT64_T( LPC_FIR_MASK_AND_0x01010C04           , ULL(0x01010C04) );
-CONST_UINT64_T( LPC_FIR_MASK_OR_0x01010C05            , ULL(0x01010C05) );
-CONST_UINT64_T( LPC_FIR_ACTION0_0x01010C06            , ULL(0x01010C06) );
-CONST_UINT64_T( LPC_FIR_ACTION1_0x01010C07            , ULL(0x01010C07) );
-
-//------------------------------------------------------------------------------
-//      PCB Master
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PCBMS_RESET_REG_0x000F001D            , ULL(0x000F001D) );
-
-//------------------------------------------------------------------------------
-//      TP Chiplet PCB slave
-//------------------------------------------------------------------------------
-CONST_UINT64_T( HANG_PULSE_0_REG_0x010F0020           , ULL(0x010F0020) );
-CONST_UINT64_T( HANG_PULSE_1_REG_0x010F0021           , ULL(0x010F0021) );
-CONST_UINT64_T( HANG_PULSE_2_REG_0x010F0022           , ULL(0x010F0022) );
-CONST_UINT64_T( HANG_PULSE_3_REG_0x010F0023           , ULL(0x010F0023) );
-CONST_UINT64_T( HANG_PULSE_4_REG_0x010F0024           , ULL(0x010F0024) );
-CONST_UINT64_T( HANG_PULSE_5_REG_0x010F0025           , ULL(0x010F0025) );
-CONST_UINT64_T( HANG_PULSE_6_REG_0x010F0026           , ULL(0x010F0026) );
-CONST_UINT64_T( PRE_COUNTER_REG_0x010F0028            , ULL(0x010F0028) );
-
-//------------------------------------------------------------------------------
-//      TP SCOM
-//         ring 1  = Trace
-//         ring 2  = OCC
-//         ring 3  = PIB
-//         ring 15 = OCCSEC
-//------------------------------------------------------------------------------
-
-
-/******************************************************************************/
-/*******************************  NEST CHIPLET  *******************************/
-/******************************************************************************/
-
-//------------------------------------------------------------------------------
-//      NEST SCOM
-//         ring  1 = Trace
-//         ring  2 = TCBR
-//         ring  3 = PB
-//         ring  6 = MCL
-//                   MC0 MCS0   = 0x02011800
-//                   MC0 MCS1   = 0x02011880
-//                   MC1 MCS0   = 0x02011900
-//                   MC1 MCS0   = 0x02011980
-//                   IOMC0      = 0x02011A00
-//         ring  7 = MCR
-//                   MC2 MCS0   = 0x02011C00
-//                   MC2 MCS1   = 0x02011C80
-//                   MC3 MCS0   = 0x02011D00
-//                   MC3 MCS1   = 0x02011D80
-//                   IOMC1      = 0x02011E00
-//         ring  8 = PCIS0
-//         ring  9 = PCIS1
-//         ring 10 = PCIS2
-//         ring 11 = PCIS3
-//         ring 12 = NX
-//         ring 13 = MCD
-//         ring 15 = TCBRSEC
-//------------------------------------------------------------------------------
-
-//------------------------------------------------------------------------------
-//      NEST TRACE
-//------------------------------------------------------------------------------
-CONST_UINT64_T( NEST_TRACE_DATA_HI_PB_T1_0x02010440   , ULL(0x02010440) );
-CONST_UINT64_T( NEST_TRACE_DATA_LO_PB_T1_0x02010441   , ULL(0x02010441) );
-CONST_UINT64_T( NEST_TRACE_DATA_HI_PB_T2_0x02010480   , ULL(0x02010480) );
-CONST_UINT64_T( NEST_TRACE_DATA_LO_PB_T2_0x02010481   , ULL(0x02010481) );
-CONST_UINT64_T( NEST_TRACE_DATA_HI_PB_T3_0x020104C0   , ULL(0x020104C0) );
-CONST_UINT64_T( NEST_TRACE_DATA_LO_PB_T3_0x020104C1   , ULL(0x020104C1) );
-CONST_UINT64_T( NEST_TRACE_DATA_HI_PB_T4_0x02010500   , ULL(0x02010500) );
-CONST_UINT64_T( NEST_TRACE_DATA_LO_PB_T4_0x02010501   , ULL(0x02010501) );
-CONST_UINT64_T( NEST_TRACE_DATA_HI_PB_T5_0x02010540   , ULL(0x02010540) );
-CONST_UINT64_T( NEST_TRACE_DATA_LO_PB_T5_0x02010541   , ULL(0x02010541) );
-CONST_UINT64_T( NEST_TRACE_DATA_HI_PB_T6_0x02010580   , ULL(0x02010580) );
-CONST_UINT64_T( NEST_TRACE_DATA_LO_PB_T6_0x02010581   , ULL(0x02010581) );
-CONST_UINT64_T( NEST_TRACE_DATA_HI_PB_T7_0x020105C0   , ULL(0x020105C0) );
-CONST_UINT64_T( NEST_TRACE_DATA_LO_PB_T7_0x020105C1   , ULL(0x020105C1) );
-CONST_UINT64_T( NEST_TRACE_DATA_HI_PB_T8_0x02010600   , ULL(0x02010600) );
-CONST_UINT64_T( NEST_TRACE_DATA_LO_PB_T8_0x02010601   , ULL(0x02010601) );
-CONST_UINT64_T( NEST_TRACE_DATA_HI_PB_T9_0x02010640   , ULL(0x02010640) );
-CONST_UINT64_T( NEST_TRACE_DATA_LO_PB_T9_0x02010641   , ULL(0x02010641) );
-CONST_UINT64_T( NEST_TRACE_DATA_HI_NX_0x02010A00      , ULL(0x02010A00) );
-CONST_UINT64_T( NEST_TRACE_DATA_LO_NX_0x02010A01      , ULL(0x02010A01) );
-
-//------------------------------------------------------------------------------
-//      POWERBUS ACCESS BRIDGE (PBA)
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PBA_CC_SYNC_CONF_0x02030000           , ULL(0x02030000) );
-
-CONST_UINT64_T( PBA_FIR_0x02010840                    , ULL(0x02010840) );
-CONST_UINT64_T( PBA_FIR_AND_0x02010841                , ULL(0x02010841) );
-CONST_UINT64_T( PBA_FIR_OR_0x02010842                 , ULL(0x02010842) );
-CONST_UINT64_T( PBA_FIR_MASK_0x02010843               , ULL(0x02010843) );
-CONST_UINT64_T( PBA_FIR_MASK_AND_0x02010844           , ULL(0x02010844) );
-CONST_UINT64_T( PBA_FIR_MASK_OR_0x02010845            , ULL(0x02010845) );
-CONST_UINT64_T( PBA_FIR_ACTION0_0x02010846            , ULL(0x02010846) );
-CONST_UINT64_T( PBA_FIR_ACTION1_0x02010847            , ULL(0x02010847) );
-
-CONST_UINT64_T( PBA_OCC_ACTION_0x0201084A             , ULL(0x0201084A) );
-CONST_UINT64_T( PBA_CONFIG_0x0201084B                 , ULL(0x0201084B) );
-CONST_UINT64_T( PBA_ERR_RPT0_0x0201084C               , ULL(0x0201084C) );
-CONST_UINT64_T( PBA_ERR_RPT1_0x0201084D               , ULL(0x0201084D) );
-CONST_UINT64_T( PBA_ERR_RPT2_0x0201084E               , ULL(0x0201084E) );
-CONST_UINT64_T( PBA_RBUFVAL0_0x02010850               , ULL(0x02010850) );
-CONST_UINT64_T( PBA_RBUFVAL1_0x02010851               , ULL(0x02010851) );
-CONST_UINT64_T( PBA_RBUFVAL2_0x02010852               , ULL(0x02010852) );
-CONST_UINT64_T( PBA_RBUFVAL3_0x02010853               , ULL(0x02010853) );
-CONST_UINT64_T( PBA_RBUFVAL4_0x02010854               , ULL(0x02010854) );
-CONST_UINT64_T( PBA_RBUFVAL5_0x02010855               , ULL(0x02010855) );
-CONST_UINT64_T( PBA_WBUFVAL0_0x02010858               , ULL(0x02010858) );
-CONST_UINT64_T( PBA_WBUFVAL1_0x02010859               , ULL(0x02010859) );
-
-CONST_UINT64_T( PBA_MODE_0x00064000                   , ULL(0x00064000) );
-CONST_UINT64_T( PBA_SLVRST_0x00064001                 , ULL(0x00064001) );
-CONST_UINT64_T( PBA_SLVCTL0_0x00064004                , ULL(0x00064004) );
-CONST_UINT64_T( PBA_SLVCTL1_0x00064005                , ULL(0x00064005) );
-CONST_UINT64_T( PBA_SLVCTL2_0x00064006                , ULL(0x00064006) );
-CONST_UINT64_T( PBA_SLVCTL3_0x00064007                , ULL(0x00064007) );
-CONST_UINT64_T( PBA_BCDE_CTL_0x00064010               , ULL(0x00064010) );
-CONST_UINT64_T( PBA_BCDE_SET_0x00064011               , ULL(0x00064011) );
-CONST_UINT64_T( PBA_BCDE_STAT_0x00064012              , ULL(0x00064012) );
-CONST_UINT64_T( PBA_BCDE_PBADR_0x00064013             , ULL(0x00064013) );
-CONST_UINT64_T( PBA_BCDE_OCIBAR_0x00064014            , ULL(0x00064014) );
-CONST_UINT64_T( PBA_BCUE_CTL_0x00064015               , ULL(0x00064015) );
-CONST_UINT64_T( PBA_BCUE_SET_0x00064016               , ULL(0x00064016) );
-CONST_UINT64_T( PBA_BCUE_STAT_0x00064017              , ULL(0x00064017) );
-CONST_UINT64_T( PBA_BCUE_PBADR_0x00064018             , ULL(0x00064018) );
-CONST_UINT64_T( PBA_BCUE_OCIBAR_0x00064019            , ULL(0x00064019) );
-CONST_UINT64_T( PBA_PBOCR0_0x00064020                 , ULL(0x00064020) );
-CONST_UINT64_T( PBA_PBOCR1_0x00064021                 , ULL(0x00064021) );
-CONST_UINT64_T( PBA_PBOCR2_0x00064022                 , ULL(0x00064022) );
-CONST_UINT64_T( PBA_PBOCR3_0x00064023                 , ULL(0x00064023) );
-CONST_UINT64_T( PBA_PBOCR4_0x00064024                 , ULL(0x00064024) );
-CONST_UINT64_T( PBA_PBOCR5_0x00064025                 , ULL(0x00064025) );
-
-CONST_UINT64_T( PBA_BAR0_0x02013F00                   , ULL(0x02013F00) );
-CONST_UINT64_T( PBA_BARMSK0_0x02013F04                , ULL(0x02013F04) );
-CONST_UINT64_T( PBA_BAR1_0x02013F01                   , ULL(0x02013F01) );
-CONST_UINT64_T( PBA_BARMSK1_0x02013F05                , ULL(0x02013F05) );
-CONST_UINT64_T( PBA_BAR2_0x02013F02                   , ULL(0x02013F02) );
-CONST_UINT64_T( PBA_BARMSK2_0x02013F06                , ULL(0x02013F06) );
-CONST_UINT64_T( PBA_BAR3_0x02013F03                   , ULL(0x02013F03) );
-CONST_UINT64_T( PBA_BARMSK3_0x02013F07                , ULL(0x02013F07) );
-CONST_UINT64_T( PBA_TRUSTMODE_0x02013F08              , ULL(0x02013F08) );
-
-//------------------------------------------------------------------------------
-//      PBAX
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PBAXSNDTX_00064020                    , ULL(0x00064020) );
-CONST_UINT64_T( PBAXCFG_00064021                      , ULL(0x00064021) );
-CONST_UINT64_T( PBAXSHBR0_00064026                    , ULL(0x00064026) );
-CONST_UINT64_T( PBAXSHCS0_00064027                    , ULL(0x00064027) );
-CONST_UINT64_T( PBAXSHBR1_0006402A                    , ULL(0x0006402A) );
-CONST_UINT64_T( PBAXSHBR1_0006402B                    , ULL(0x0006402B) );
-
-//------------------------------------------------------------------------------
-//      PSI
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PSI_TXCSR_0x02010800                  , ULL(0x02010800) );
-CONST_UINT64_T( PSI_TXERR_0x02010802                  , ULL(0x02010802) );
-CONST_UINT64_T( PSI_TXDFSM_0x2010806                  , ULL(0x02010806) );
-CONST_UINT64_T( PSI_RXCSR_0x02010808                  , ULL(0x02010808) );
-CONST_UINT64_T( PSI_RXERR_0x0201080A                  , ULL(0x0201080A) );
-CONST_UINT64_T( PSI_RXDFSM_0x201080E                  , ULL(0x0201080E) );
-CONST_UINT64_T( PSI_TXCIAR_0x02010810                 , ULL(0x02010810) );
-CONST_UINT64_T( PSI_TXCMISC_0x02010813                , ULL(0x02010813) );
-CONST_UINT64_T( PSI_RXCIAR_0x02010818                 , ULL(0x02010818) );
-CONST_UINT64_T( PSI_RXCMISC_0x0201081B                , ULL(0x0201081B) );
-CONST_UINT64_T( PSI_BRIDGE_BAR_0x0201090A             , ULL(0x0201090A) );
-CONST_UINT64_T( PSI_FSP_BAR_0x0201090B                , ULL(0x0201090B) );
-CONST_UINT64_T( PSI_FSP_MMR_0x0201090C                , ULL(0x0201090C) );
-CONST_UINT64_T( PSI_BRIDGE_STATUS_CTL_0x0201090E      , ULL(0x0201090E) );
-CONST_UINT64_T( PSI_BRIDGE_STATUS_CTL_OR_0x02010912   , ULL(0x02010912) );
-CONST_UINT64_T( PSI_BRIDGE_STATUS_CTL_AND_0x02010913  , ULL(0x02010913) );
-
-CONST_UINT64_T( PSI_NOTRUST_BAR0_0x02013F40           , ULL(0x02013F40) );
-CONST_UINT64_T( PSI_NOTRUST_BAR1_0x02013F41           , ULL(0x02013F41) );
-CONST_UINT64_T( PSI_NOTRUST_BAR0_MASK_0x02013F42      , ULL(0x02013F42) );
-CONST_UINT64_T( PSI_NOTRUST_BAR1_MASK_0x02013F43      , ULL(0x02013F43) );
-
-CONST_UINT64_T( PSI_HB_FIR_0x02010900                 , ULL(0x02010900) );
-CONST_UINT64_T( PSI_HB_FIR_AND_0x02010901             , ULL(0x02010901) );
-CONST_UINT64_T( PSI_HB_FIR_OR_0x02010902              , ULL(0x02010902) );
-CONST_UINT64_T( PSI_HB_FIR_MASK_0x02010903            , ULL(0x02010903) );
-
-//------------------------------------------------------------------------------
-//      HCA
-//------------------------------------------------------------------------------
-CONST_UINT64_T( HCA_EN_FIR_0x02010940                 , ULL(0x02010940) );
-CONST_UINT64_T( HCA_EN_FIR_AND_0x02010941             , ULL(0x02010941) );
-CONST_UINT64_T( HCA_EN_FIR_MASK_0x02010943            , ULL(0x02010943) );
-CONST_UINT64_T( HCA_EN_BAR_0x0201094A                 , ULL(0x0201094A) );
-CONST_UINT64_T( HCA_EN_COUNT_BAR_0x0201094B           , ULL(0x0201094B) );
-CONST_UINT64_T( HCA_EN_DECAY1_0x0201094C              , ULL(0x0201094C) );
-CONST_UINT64_T( HCA_EN_DECAY2_0x0201094D              , ULL(0x0201094D) );
-CONST_UINT64_T( HCA_EN_REF_BAR_0x0201094E             , ULL(0x0201094E) );
-CONST_UINT64_T( HCA_MODE_0x0201094F                   , ULL(0x0201094F) );
-CONST_UINT64_T( HCA_EN_RESET_0x02010952               , ULL(0x02010952) );
-CONST_UINT64_T( HCA_EN_MIRROR_BAR_0x02010953          , ULL(0x02010953) );
-
-CONST_UINT64_T( HCA_EN_EHHCA_FIR_0x02010980           , ULL(0x02010980) );
-CONST_UINT64_T( HCA_EN_EHHCA_FIR_AND_0x02010981       , ULL(0x02010981) );
-CONST_UINT64_T( HCA_EN_EHHCA_FIR_MASK_0x02010983      , ULL(0x02010983) );
-CONST_UINT64_T( HCA_EH_BAR_0x0201098A                 , ULL(0x0201098A) );
-CONST_UINT64_T( HCA_EH_COUNT_BAR_0x0201098B           , ULL(0x0201098B) );
-CONST_UINT64_T( HCA_EH_REF_BAR_0x0201098E             , ULL(0x0201098E) );
-CONST_UINT64_T( HCA_EH_MODE_REG_0x0201098F            , ULL(0x0201098F) );
-CONST_UINT64_T( HCA_EH_FLUSH_0x02010990               , ULL(0x02010990) );
-CONST_UINT64_T( HCA_EH_RESET_0x02010992               , ULL(0x02010992) );
-CONST_UINT64_T( HCA_EH_MIRROR_BAR_0x02010993          , ULL(0x02010993) );
-
-//------------------------------------------------------------------------------
-//     INTERRUPT CONTROL PRESENTER  (ICP)
-//------------------------------------------------------------------------------
-CONST_UINT64_T( ICP_BAR_0x020109CA                    , ULL(0x020109CA) );
-CONST_UINT64_T( ICP_SYNC_MODE_REG0_0x020109CB         , ULL(0x020109CB) );
-CONST_UINT64_T( ICP_INTR_INJECT_0x020109CC            , ULL(0x020109CC) );
-
-CONST_UINT64_T( EN_TPC_INTP_SYNC_FIR_0x020109C0       , ULL(0x020109C0) );
-CONST_UINT64_T( EN_TPC_INTP_SYNC_FIR_AND_0x020109C1   , ULL(0x020109C1) );
-CONST_UINT64_T( EN_TPC_INTP_SYNC_FIR_MASK_0x020109C3  , ULL(0x020109C3) );
-
-
-//------------------------------------------------------------------------------
-//      NEST PB EH
-//------------------------------------------------------------------------------
-// registers with multiple physical/shadow copies
-// west
-CONST_UINT64_T( PB_MODE_WEST_0x02010C0A               , ULL(0x02010C0A) );
-CONST_UINT64_T( PB_HP_MODE_NEXT_WEST_0x02010C0B       , ULL(0x02010C0B) );
-CONST_UINT64_T( PB_HP_MODE_CURR_WEST_0x02010C0C       , ULL(0x02010C0C) );
-CONST_UINT64_T( PB_HPX_MODE_NEXT_WEST_0x02010C0D      , ULL(0x02010C0D) );
-CONST_UINT64_T( PB_HPX_MODE_CURR_WEST_0x02010C0E      , ULL(0x02010C0E) );
-CONST_UINT64_T( PB_FLMCFG0_WEST_0x02010C12            , ULL(0x02010C12) );
-CONST_UINT64_T( PB_FLMCFG1_WEST_0x02010C13            , ULL(0x02010C13) );
-CONST_UINT64_T( PB_FRMCFG0_WEST_0x02010C14            , ULL(0x02010C14) );
-CONST_UINT64_T( PB_FRMCFG1_WEST_0x02010C15            , ULL(0x02010C15) );
-CONST_UINT64_T( PB_SCONFIG_LOAD_WEST_0x02010C16       , ULL(0x02010C16) );
-// center
-CONST_UINT64_T( PB_MODE_CENT_0x02010C4A               , ULL(0x02010C4A) );
-CONST_UINT64_T( PB_HP_MODE_NEXT_CENT_0x02010C4B       , ULL(0x02010C4B) );
-CONST_UINT64_T( PB_HP_MODE_CURR_CENT_0x02010C4C       , ULL(0x02010C4C) );
-CONST_UINT64_T( PB_HPX_MODE_NEXT_CENT_0x02010C4D      , ULL(0x02010C4D) );
-CONST_UINT64_T( PB_HPX_MODE_CURR_CENT_0x02010C4E      , ULL(0x02010C4E) );
-CONST_UINT64_T( PB_FLMCFG0_CENT_0x02010C5E            , ULL(0x02010C5E) );
-CONST_UINT64_T( PB_FLMCFG1_CENT_0x02010C5F            , ULL(0x02010C5F) );
-CONST_UINT64_T( PB_FRMCFG0_CENT_0x02010C60            , ULL(0x02010C60) );
-CONST_UINT64_T( PB_FRMCFG1_CENT_0x02010C61            , ULL(0x02010C61) );
-CONST_UINT64_T( PB_SCONFIG_LOAD_CENT_0x02010C6D       , ULL(0x02010C6D) );
-// east
-CONST_UINT64_T( PB_MODE_EAST_0x02010C8A               , ULL(0x02010C8A) );
-CONST_UINT64_T( PB_HP_MODE_NEXT_EAST_0x02010C8B       , ULL(0x02010C8B) );
-CONST_UINT64_T( PB_HP_MODE_CURR_EAST_0x02010C8C       , ULL(0x02010C8C) );
-CONST_UINT64_T( PB_HPX_MODE_NEXT_EAST_0x02010C8D      , ULL(0x02010C8D) );
-CONST_UINT64_T( PB_HPX_MODE_CURR_EAST_0x02010C8E      , ULL(0x02010C8E) );
-CONST_UINT64_T( PB_FLMCFG0_EAST_0x02010C92            , ULL(0x02010C92) );
-CONST_UINT64_T( PB_FLMCFG1_EAST_0x02010C93            , ULL(0x02010C93) );
-CONST_UINT64_T( PB_FRMCFG0_EAST_0x02010C94            , ULL(0x02010C94) );
-CONST_UINT64_T( PB_FRMCFG1_EAST_0x02010C95            , ULL(0x02010C95) );
-CONST_UINT64_T( PB_SCONFIG_LOAD_EAST_0x02010C96       , ULL(0x02010C96) );
-
-// registers without shadow copies
-// center
-CONST_UINT64_T( PB_TRACE_0x02010C4F                   , ULL(0x02010C4F) );
-CONST_UINT64_T( PB_NMPM_COUNT_0x02010C50              , ULL(0x02010C50) );
-CONST_UINT64_T( PB_LMPM_COUNT_0x02010C51              , ULL(0x02010C51) );
-CONST_UINT64_T( PB_RCMD_INTDAT_COUNT_0x02010C52       , ULL(0x02010C52) );
-CONST_UINT64_T( PB_EXTDAT_COUNT_0x02010C53            , ULL(0x02010C53) );
-CONST_UINT64_T( PB_PMU_COUNT0_0x02010C54              , ULL(0x02010C54) );
-CONST_UINT64_T( PB_PMU_COUNT1_0x02010C55              , ULL(0x02010C55) );
-CONST_UINT64_T( PB_PMU_COUNT2_0x02010C56              , ULL(0x02010C56) );
-CONST_UINT64_T( PB_PMU_COUNT3_0x02010C57              , ULL(0x02010C57) );
-CONST_UINT64_T( PB_RGMCFG00_0x02010C58                , ULL(0x02010C58) );
-CONST_UINT64_T( PB_RGMCFG01_0x02010C59                , ULL(0x02010C59) );
-CONST_UINT64_T( PB_RGMCFG10_0x02010C5A                , ULL(0x02010C5A) );
-CONST_UINT64_T( PB_RGMCFGM00_0x02010C5B               , ULL(0x02010C5B) );
-CONST_UINT64_T( PB_RGMCFGM01_0x02010C5C               , ULL(0x02010C5C) );
-CONST_UINT64_T( PB_RGMCFGM10_0x02010C5D               , ULL(0x02010C5D) );
-CONST_UINT64_T( PB_GP_CMD_RATE_DP_LO_0x02010C62       , ULL(0x02010C62) );
-CONST_UINT64_T( PB_GP_CMD_RATE_DP_HI_0x02010C63       , ULL(0x02010C63) );
-CONST_UINT64_T( PB_RGP_CMD_RATE_DP_LO_0x02010C64      , ULL(0x02010C64) );
-CONST_UINT64_T( PB_RGP_CMD_RATE_DP_HI_0x02010C65      , ULL(0x02010C65) );
-CONST_UINT64_T( PB_SP_CMD_RATE_DP_LO_0x02010C66       , ULL(0x02010C66) );
-CONST_UINT64_T( PB_SP_CMD_RATE_DP_HI_0x02010C67       , ULL(0x02010C67) );
-CONST_UINT64_T( PB_PMU_0x02010C68                     , ULL(0x02010C68) );
-CONST_UINT64_T( PB_EVENT_SEL_0x02010C69               , ULL(0x02010C69) );
-CONST_UINT64_T( PB_EVENT_COMPA_0x02010C6A             , ULL(0x02010C6A) );
-CONST_UINT64_T( PB_EVENT_COMPB_0x02010C6B             , ULL(0x02010C6B) );
-CONST_UINT64_T( PB_CR_ERROR_0x02010C6C                , ULL(0x02010C6C) );
-
-//------------------------------------------------------------------------------
-//      NEST PB EH FIR
-//------------------------------------------------------------------------------
-// west FIR
-CONST_UINT64_T( PB_FIR_WEST_0x02010C00                , ULL(0x02010C00) );
-CONST_UINT64_T( PB_FIR_AND_WEST_0x02010C01            , ULL(0x02010C01) );
-CONST_UINT64_T( PB_FIR_OR_WEST_0x02010C02             , ULL(0x02010C02) );
-CONST_UINT64_T( PB_FIR_MASK_WEST_0x02010C03           , ULL(0x02010C03) );
-CONST_UINT64_T( PB_FIR_MASK_AND_WEST_0x02010C04       , ULL(0x02010C04) );
-CONST_UINT64_T( PB_FIR_MASK_OR_WEST_0x02010C05        , ULL(0x02010C05) );
-CONST_UINT64_T( PB_FIR_ACTION0_WEST_0x02010C06        , ULL(0x02010C06) );
-CONST_UINT64_T( PB_FIR_ACTION1_WEST_0x02010C07        , ULL(0x02010C07) );
-// center FIR
-CONST_UINT64_T( PB_FIR_CENT_0x02010C40                , ULL(0x02010C40) );
-CONST_UINT64_T( PB_FIR_AND_CENT_0x02010C41            , ULL(0x02010C41) );
-CONST_UINT64_T( PB_FIR_OR_CENT_0x02010C42             , ULL(0x02010C42) );
-CONST_UINT64_T( PB_FIR_MASK_CENT_0x02010C43           , ULL(0x02010C43) );
-CONST_UINT64_T( PB_FIR_MASK_AND_CENT_0x02010C44       , ULL(0x02010C44) );
-CONST_UINT64_T( PB_FIR_MASK_OR_CENT_0x02010C45        , ULL(0x02010C45) );
-CONST_UINT64_T( PB_FIR_ACTION0_CENT_0x02010C46        , ULL(0x02010C46) );
-CONST_UINT64_T( PB_FIR_ACTION1_CENT_0x02010C47        , ULL(0x02010C47) );
-// east FIR
-CONST_UINT64_T( PB_FIR_EAST_0x02010C80                , ULL(0x02010C80) );
-CONST_UINT64_T( PB_FIR_AND_EAST_0x02010C81            , ULL(0x02010C81) );
-CONST_UINT64_T( PB_FIR_OR_EAST_0x02010C82             , ULL(0x02010C82) );
-CONST_UINT64_T( PB_FIR_MASK_EAST_0x02010C83           , ULL(0x02010C83) );
-CONST_UINT64_T( PB_FIR_MASK_AND_EAST_0x02010C84       , ULL(0x02010C84) );
-CONST_UINT64_T( PB_FIR_MASK_OR_EAST_0x02010C85        , ULL(0x02010C85) );
-CONST_UINT64_T( PB_FIR_ACTION0_EAST_0x02010C86        , ULL(0x02010C86) );
-CONST_UINT64_T( PB_FIR_ACTION1_EAST_0x02010C87        , ULL(0x02010C87) );
-// RAS FIR
-CONST_UINT64_T( PB_RAS_FIR_0x02010C6E                 , ULL(0x02010C6E) );
-CONST_UINT64_T( PB_RAS_FIR_AND_0x02010C6F             , ULL(0x02010C6F) );
-CONST_UINT64_T( PB_RAS_FIR_OR_0x02010C70              , ULL(0x02010C70) );
-CONST_UINT64_T( PB_RAS_FIR_MASK_0x02010C71            , ULL(0x02010C71) );
-CONST_UINT64_T( PB_RAS_FIR_MASK_AND_0x02010C72        , ULL(0x02010C72) );
-CONST_UINT64_T( PB_RAS_FIR_MASK_OR_0x02010C73         , ULL(0x02010C73) );
-CONST_UINT64_T( PB_RAS_FIR_ACTION0_0x02010C74         , ULL(0x02010C74) );
-CONST_UINT64_T( PB_RAS_FIR_ACTION1_0x02010C75         , ULL(0x02010C75) );
-//------------------------------------------------------------------------------
-//      PLL LOCK
-//------------------------------------------------------------------------------
-// PLL lock information
-CONST_UINT64_T( PB_PLLLOCKREG_0x020F0019              , ULL(0x020F0019) );
-CONST_UINT64_T( PCBMS_INTERRUPT_TYPE_REG_0x000F001A ,   ULL(0x000F001A));
-//------------------------------------------------------------------------------
-//      CAPP
-//------------------------------------------------------------------------------
-CONST_UINT64_T( CAPP_APC_MASTER_PB_CTL_0x02013018     , ULL(0x02013018) );
-CONST_UINT64_T( CAPP_APC_MASTER_CAPI_CTL_0x02013019   , ULL(0x02013019) );
-CONST_UINT64_T( CAPP_CXA_SNOOP_CFG_0x0201301A         , ULL(0x0201301A) );
-CONST_UINT64_T( CAPP_CXA_SNOOP_CTL_0x0201301B         , ULL(0x0201301B) );
-CONST_UINT64_T( CAPP_APC_MASTER_LCO_TARGET_0x02013021 , ULL(0x02013021) );
-CONST_UINT64_T( CAPP_CXA_SNP_ARRAY_ADDR_0x02013028    , ULL(0x02013028) );
-CONST_UINT64_T( CAPP_CXA_SNP_ARRAY_DATA_0x02013029    , ULL(0x02013029) );
-
-CONST_UINT64_T( CAPP1_APC_MASTER_PB_CTL_0x02013198    , ULL(0x02013198) );
-CONST_UINT64_T( CAPP1_CXA_SNOOP_CFG_0x0201319A        , ULL(0x0201319A) );
-CONST_UINT64_T( CAPP1_CXA_SNOOP_CTL_0x0201319B        , ULL(0x0201319B) );
-CONST_UINT64_T( CAPP1_APC_MASTER_LCO_TARGET_0x020131A1, ULL(0x020131A1) );
-CONST_UINT64_T( CAPP1_CXA_SNP_ARRAY_ADDR_0x020131A8   , ULL(0x020131A8) );
-CONST_UINT64_T( CAPP1_CXA_SNP_ARRAY_DATA_0x020131A9   , ULL(0x020131A9) );
-
-//------------------------------------------------------------------------------
-//      MCS
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MCS_MCFGP_0x02011800                  , ULL(0x02011800) );
-CONST_UINT64_T( MCS_MCFGPM_0x02011801                 , ULL(0x02011801) );
-CONST_UINT64_T( MCS_MCFGPR_0x02011802                 , ULL(0x02011802) );
-CONST_UINT64_T( MCS_MCSMODE0_0x02011807               , ULL(0x02011807) );
-CONST_UINT64_T( MCS_MCSMODE1_0x02011808               , ULL(0x02011808) );
-CONST_UINT64_T( MCS_MCSYNC_0x0201180B                 , ULL(0x0201180B) );
-CONST_UINT64_T( MCS_MODE3_REGISTER_0x0201180A         , ULL(0x0201180A) );
-CONST_UINT64_T( MCS_MCSMODE4_0x0201181A               , ULL(0x0201181A) );
-CONST_UINT64_T( MCS_MCFGPA_0x02011814                 , ULL(0x02011814) );
-CONST_UINT64_T( MCS_MCFGPMA_0x02011815                , ULL(0x02011815) );
-CONST_UINT64_T( MCS_MCEPS_0x02011816                  , ULL(0x02011816) );
-
-CONST_UINT64_T( MCS_MCIFIR_0x02011840                 , ULL(0x02011840) );
-CONST_UINT64_T( MCS_MCIFIR_AND_0x02011841             , ULL(0x02011841) );
-CONST_UINT64_T( MCS_MCIFIR_OR_0x02011842              , ULL(0x02011842) );
-CONST_UINT64_T( MCS_MCIFIRMASK_0x02011843             , ULL(0x02011843) );
-CONST_UINT64_T( MCS_MCIFIRMASK_AND_0x02011844         , ULL(0x02011844) );
-CONST_UINT64_T( MCS_MCIFIRMASK_OR_0x02011845          , ULL(0x02011845) );
-CONST_UINT64_T( MCS_MCIFIRACT0_0x02011846             , ULL(0x02011846) );
-CONST_UINT64_T( MCS_MCIFIRACT1_0x02011847             , ULL(0x02011847) );
-
-CONST_UINT64_T( MCS_MCICFG_0x0201184A                 , ULL(0x0201184A) );
-CONST_UINT64_T( MCS_MCISTAT_0x0201184B                , ULL(0x0201184B) );
-CONST_UINT64_T( MCS_MCICRCSYN_0x0201184C              , ULL(0x0201184C) );
-
-CONST_UINT64_T( IOMC_SCOM_MODE_PB_0x02011A20          , ULL(0x02011A20) );
-
-CONST_UINT64_T( IOMC0_BUSCNTL_FIR_0x02011A00          , ULL(0x02011A00) );
-CONST_UINT64_T( IOMC0_BUSCNTL_FIR_AND_0x02011A01      , ULL(0x02011A01) );
-CONST_UINT64_T( IOMC0_BUSCNTL_FIR_MASK_0x02011A03     , ULL(0x02011A03) );
-
-CONST_UINT64_T( MC1_BUSCNTL_FIR_0x02011E00            , ULL(0x02011E00) );
-CONST_UINT64_T( MC1_BUSCNTL_FIR_AND_0x02011E01        , ULL(0x02011E01) );
-
-CONST_UINT64_T( MC2_MCS0_RIGHT_FIR_0x02011C40         , ULL(0x02011C40) );
-CONST_UINT64_T( MC2_MCS0_RIGHT_FIR_AND_0x02011C41     , ULL(0x02011C41) );
-
-CONST_UINT64_T( MC2_MCS1_RIGHT_FIR_0x02011CC0         , ULL(0x02011CC0) );
-CONST_UINT64_T( MC2_MCS1_RIGHT_FIR_AND_0x02011CC1     , ULL(0x02011CC1) );
-
-CONST_UINT64_T( MC3_MCS0_RIGHT_FIR_0x02011D40         , ULL(0x02011D40) );
-CONST_UINT64_T( MC3_MCS0_RIGHT_FIR_AND_0x02011D41     , ULL(0x02011D41) );
-
-CONST_UINT64_T( MC3_MCS1_RIGHT_FIR_0x02011DC0         , ULL(0x02011DC0) );
-CONST_UINT64_T( MC3_MCS1_RIGHT_FIR_AND_0x02011DC1     , ULL(0x02011DC1) );
-
-//------------------------------------------------------------------------------
-//      NEST Alter-Diplay Unit (ADU)
-//------------------------------------------------------------------------------
-CONST_UINT64_T( ADU_CONTROL_0x02020000                , ULL(0x02020000) );
-CONST_UINT64_T( ADU_COMMAND_0x02020001                , ULL(0x02020001) );
-CONST_UINT64_T( ADU_STATUS_0x02020002                 , ULL(0x02020002) );
-CONST_UINT64_T( ADU_DATA_0x02020003                   , ULL(0x02020003) );
-CONST_UINT64_T( ADU_XSCOM_BASE_0x02020005             , ULL(0x02020005) );
-CONST_UINT64_T( ADU_FORCE_ECC_0x02020010              , ULL(0x02020010) );
-CONST_UINT64_T( ADU_MALF_REG_0x02020011               , ULL(0x02020011) );
-CONST_UINT64_T( ADU_PMISC_MODE_0x0202000B             , ULL(0x0202000B) );
-CONST_UINT64_T( ADU_UNTRUSTED_BAR_0x02020015          , ULL(0x02020015) );
-CONST_UINT64_T( ADU_UNTRUSTED_BAR_MASK_0x02020016     , ULL(0x02020016) );
-CONST_UINT64_T( ADU_TBROM_BAR_0x02020017              , ULL(0x02020017) );
-CONST_UINT64_T( ADU_HANG_DIV_0x02020018               , ULL(0x02020018) );
-CONST_UINT64_T( ADU_IOS_LINK_EN_0x02020019            , ULL(0x02020019) );
-
-//------------------------------------------------------------------------------
-//      PCIe
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PCIE0_FIR_0x02012000                  , ULL(0x02012000) );
-CONST_UINT64_T( PCIE0_FIR_AND_0x02012001              , ULL(0x02012001) );
-CONST_UINT64_T( PCIE0_FIR_MASK_0x02012003             , ULL(0x02012003) );
-CONST_UINT64_T( PCIE0_FIR_ACTION0_0x02012006          , ULL(0x02012006) );
-CONST_UINT64_T( PCIE0_FIR_ACTION1_0x02012007          , ULL(0x02012007) );
-CONST_UINT64_T( PCIE0_FIR_ACTION2_0x02012020          , ULL(0x02012020) );
-CONST_UINT64_T( PCIE0_FIR_WOF_0x02012008              , ULL(0x02012008) );
-CONST_UINT64_T( PCIE0_NODAL_BAR0_0x02012010           , ULL(0x02012010) );
-CONST_UINT64_T( PCIE0_NODAL_BAR1_0x02012011           , ULL(0x02012011) );
-CONST_UINT64_T( PCIE0_GROUP_BAR0_0x02012012           , ULL(0x02012012) );
-CONST_UINT64_T( PCIE0_GROUP_BAR1_0x02012013           , ULL(0x02012013) );
-CONST_UINT64_T( PCIE0_NEAR_BAR_F0_0x02012014          , ULL(0x02012014) );
-CONST_UINT64_T( PCIE0_FAR_BAR_F0_0x02012015           , ULL(0x02012015) );
-CONST_UINT64_T( PCIE0_NEAR_BAR_F1_0x02012016          , ULL(0x02012016) );
-CONST_UINT64_T( PCIE0_FAR_BAR_F1_0x02012017           , ULL(0x02012017) );
-CONST_UINT64_T( PCIE0_IO_BAR0_0x02012040              , ULL(0x02012040) );
-CONST_UINT64_T( PCIE0_IO_BAR1_0x02012041              , ULL(0x02012041) );
-CONST_UINT64_T( PCIE0_IO_BAR2_0x02012042              , ULL(0x02012042) );
-CONST_UINT64_T( PCIE0_IO_MASK0_0x02012043             , ULL(0x02012043) );
-CONST_UINT64_T( PCIE0_IO_MASK1_0x02012044             , ULL(0x02012044) );
-CONST_UINT64_T( PCIE0_IO_BAR_EN_0x02012045            , ULL(0x02012045) );
-
-CONST_UINT64_T( PCIE1_FIR_0x02012400                  , ULL(0x02012400) );
-CONST_UINT64_T( PCIE1_FIR_AND_0x02012401              , ULL(0x02012401) );
-CONST_UINT64_T( PCIE1_FIR_MASK_0x02012403             , ULL(0x02012403) );
-CONST_UINT64_T( PCIE1_FIR_ACTION0_0x02012406          , ULL(0x02012406) );
-CONST_UINT64_T( PCIE1_FIR_ACTION1_0x02012407          , ULL(0x02012407) );
-CONST_UINT64_T( PCIE1_FIR_ACTION2_0x02012420          , ULL(0x02012420) );
-CONST_UINT64_T( PCIE1_FIR_WOF_0x02012408              , ULL(0x02012408) );
-CONST_UINT64_T( PCIE1_NODAL_BAR0_0x02012410           , ULL(0x02012410) );
-CONST_UINT64_T( PCIE1_NODAL_BAR1_0x02012411           , ULL(0x02012411) );
-CONST_UINT64_T( PCIE1_GROUP_BAR0_0x02012412           , ULL(0x02012412) );
-CONST_UINT64_T( PCIE1_GROUP_BAR1_0x02012413           , ULL(0x02012413) );
-CONST_UINT64_T( PCIE1_NEAR_BAR_F0_0x02012414          , ULL(0x02012414) );
-CONST_UINT64_T( PCIE1_FAR_BAR_F0_0x02012415           , ULL(0x02012415) );
-CONST_UINT64_T( PCIE1_NEAR_BAR_F1_0x02012416          , ULL(0x02012416) );
-CONST_UINT64_T( PCIE1_FAR_BAR_F1_0x02012417           , ULL(0x02012417) );
-CONST_UINT64_T( PCIE1_IO_BAR0_0x02012440              , ULL(0x02012440) );
-CONST_UINT64_T( PCIE1_IO_BAR1_0x02012441              , ULL(0x02012441) );
-CONST_UINT64_T( PCIE1_IO_BAR2_0x02012442              , ULL(0x02012442) );
-CONST_UINT64_T( PCIE1_IO_MASK0_0x02012443             , ULL(0x02012443) );
-CONST_UINT64_T( PCIE1_IO_MASK1_0x02012444             , ULL(0x02012444) );
-CONST_UINT64_T( PCIE1_IO_BAR_EN_0x02012445            , ULL(0x02012445) );
-
-CONST_UINT64_T( PCIE2_FIR_0x02012800                  , ULL(0x02012800) );
-CONST_UINT64_T( PCIE2_FIR_AND_0x02012801              , ULL(0x02012801) );
-CONST_UINT64_T( PCIE2_FIR_MASK_0x02012803             , ULL(0x02012803) );
-CONST_UINT64_T( PCIE2_FIR_ACTION0_0x02012806          , ULL(0x02012806) );
-CONST_UINT64_T( PCIE2_FIR_ACTION1_0x02012807          , ULL(0x02012807) );
-CONST_UINT64_T( PCIE2_FIR_ACTION2_0x02012820          , ULL(0x02012820) );
-CONST_UINT64_T( PCIE2_FIR_WOF_0x02012808              , ULL(0x02012808) );
-CONST_UINT64_T( PCIE2_NODAL_BAR0_0x02012810           , ULL(0x02012810) );
-CONST_UINT64_T( PCIE2_NODAL_BAR1_0x02012811           , ULL(0x02012811) );
-CONST_UINT64_T( PCIE2_GROUP_BAR0_0x02012812           , ULL(0x02012812) );
-CONST_UINT64_T( PCIE2_GROUP_BAR1_0x02012813           , ULL(0x02012813) );
-CONST_UINT64_T( PCIE2_NEAR_BAR_F0_0x02012814          , ULL(0x02012814) );
-CONST_UINT64_T( PCIE2_FAR_BAR_F0_0x02012815           , ULL(0x02012815) );
-CONST_UINT64_T( PCIE2_NEAR_BAR_F1_0x02012816          , ULL(0x02012816) );
-CONST_UINT64_T( PCIE2_FAR_BAR_F1_0x02012817           , ULL(0x02012817) );
-CONST_UINT64_T( PCIE2_IO_BAR0_0x02012840              , ULL(0x02012840) );
-CONST_UINT64_T( PCIE2_IO_BAR1_0x02012841              , ULL(0x02012841) );
-CONST_UINT64_T( PCIE2_IO_BAR2_0x02012842              , ULL(0x02012842) );
-CONST_UINT64_T( PCIE2_IO_MASK0_0x02012843             , ULL(0x02012843) );
-CONST_UINT64_T( PCIE2_IO_MASK1_0x02012844             , ULL(0x02012844) );
-CONST_UINT64_T( PCIE2_IO_BAR_EN_0x02012845            , ULL(0x02012845) );
-
-CONST_UINT64_T( PCIE3_FIR_0x02012C00                  , ULL(0x02012C00) );
-CONST_UINT64_T( PCIE3_FIR_AND_0x02012C01              , ULL(0x02012C01) );
-CONST_UINT64_T( PCIE3_FIR_MASK_0x02012C03             , ULL(0x02012C03) );
-CONST_UINT64_T( PCIE3_FIR_ACTION0_0x02012C06          , ULL(0x02012C06) );
-CONST_UINT64_T( PCIE3_FIR_ACTION1_0x02012C07          , ULL(0x02012C07) );
-CONST_UINT64_T( PCIE3_FIR_ACTION2_0x02012C20          , ULL(0x02012C20) );
-CONST_UINT64_T( PCIE3_FIR_WOF_0x02012C08              , ULL(0x02012C08) );
-CONST_UINT64_T( PCIE3_NODAL_BAR0_0x02012C10           , ULL(0x02012C10) );
-CONST_UINT64_T( PCIE3_NODAL_BAR1_0x02012C11           , ULL(0x02012C11) );
-CONST_UINT64_T( PCIE3_GROUP_BAR0_0x02012C12           , ULL(0x02012C12) );
-CONST_UINT64_T( PCIE3_GROUP_BAR1_0x02012C13           , ULL(0x02012C13) );
-CONST_UINT64_T( PCIE3_NEAR_BAR_F0_0x02012C14          , ULL(0x02012C14) );
-CONST_UINT64_T( PCIE3_FAR_BAR_F0_0x02012C15           , ULL(0x02012C15) );
-CONST_UINT64_T( PCIE3_NEAR_BAR_F1_0x02012C16          , ULL(0x02012C16) );
-CONST_UINT64_T( PCIE3_FAR_BAR_F1_0x02012C17           , ULL(0x02012C17) );
-CONST_UINT64_T( PCIE3_IO_BAR0_0x02012C40              , ULL(0x02012C40) );
-CONST_UINT64_T( PCIE3_IO_BAR1_0x02012C41              , ULL(0x02012C41) );
-CONST_UINT64_T( PCIE3_IO_BAR2_0x02012C42              , ULL(0x02012C42) );
-CONST_UINT64_T( PCIE3_IO_MASK0_0x02012C43             , ULL(0x02012C43) );
-CONST_UINT64_T( PCIE3_IO_MASK1_0x02012C44             , ULL(0x02012C44) );
-CONST_UINT64_T( PCIE3_IO_BAR_EN_0x02012C45            , ULL(0x02012C45) );
-
-//------------------------------------------------------------------------------
-//      NX
-//------------------------------------------------------------------------------
-CONST_UINT64_T( NX_APC_NODAL_BAR0_0x0201302D          , ULL(0x0201302D) );
-CONST_UINT64_T( NX_APC_NODAL_BAR1_0x0201302E          , ULL(0x0201302E) );
-CONST_UINT64_T( NX_APC_GROUP_BAR0_0x0201302F          , ULL(0x0201302F) );
-CONST_UINT64_T( NX_APC_GROUP_BAR1_0x02013030          , ULL(0x02013030) );
-CONST_UINT64_T( NX_APC_NEAR_BAR_F0_0x02013031         , ULL(0x02013031) );
-CONST_UINT64_T( NX_APC_FAR_BAR_F0_0x02013032          , ULL(0x02013032) );
-CONST_UINT64_T( NX_APC_NEAR_BAR_F1_0x02013033         , ULL(0x02013033) );
-CONST_UINT64_T( NX_APC_FAR_BAR_F1_0x02013034          , ULL(0x02013034) );
-CONST_UINT64_T( NX_MMIO_BAR_0x0201308D                , ULL(0x0201308D) );
-CONST_UINT64_T( NX_NODAL_BAR0_0x02013095              , ULL(0x02013095) );
-CONST_UINT64_T( NX_NODAL_BAR1_0x02013096              , ULL(0x02013096) );
-CONST_UINT64_T( NX_GROUP_BAR0_0x02013097              , ULL(0x02013097) );
-CONST_UINT64_T( NX_GROUP_BAR1_0x02013098              , ULL(0x02013098) );
-CONST_UINT64_T( NX_NEAR_BAR_F0_0x02013099             , ULL(0x02013099) );
-CONST_UINT64_T( NX_FAR_BAR_F0_0x0201309A              , ULL(0x0201309A) );
-CONST_UINT64_T( NX_NEAR_BAR_F1_0x0201309B             , ULL(0x0201309B) );
-CONST_UINT64_T( NX_FAR_BAR_F1_0x0201309C              , ULL(0x0201309C) );
-CONST_UINT64_T( NX_CQ_EPS_0x0201309D                  , ULL(0x0201309D) );
-CONST_UINT64_T( NX_AS_MMIO_BAR_0x0201309E             , ULL(0x0201309E) );
-
-CONST_UINT64_T( NX_CXA1_APC_NODAL_BAR0_0x020131AD     , ULL(0x020131AD) );
-CONST_UINT64_T( NX_CXA1_APC_NODAL_BAR1_0x020131AE     , ULL(0x020131AE) );
-CONST_UINT64_T( NX_CXA1_APC_GROUP_BAR0_0x020131AF     , ULL(0x020131AF) );
-CONST_UINT64_T( NX_CXA1_APC_GROUP_BAR1_0x020131B0     , ULL(0x020131B0) );
-CONST_UINT64_T( NX_CXA1_APC_NEAR_BAR_F0_0x020131B1    , ULL(0x020131B1) );
-CONST_UINT64_T( NX_CXA1_APC_FAR_BAR_F0_0x020131B2     , ULL(0x020131B2) );
-CONST_UINT64_T( NX_CXA1_APC_NEAR_BAR_F1_0x020131B3    , ULL(0x020131B3) );
-CONST_UINT64_T( NX_CXA1_APC_FAR_BAR_F1_0x020131B4     , ULL(0x020131B4) );
-
-CONST_UINT64_T( NX_CAPP_FIR_0x02013000                , ULL(0x02013000) );
-CONST_UINT64_T( NX_CAPP_FIR_AND_0x02013001            , ULL(0x02013001) );
-CONST_UINT64_T( NX_CAPP_FIR_MASK_0x02013003           , ULL(0x02013003) );
-CONST_UINT64_T( NX_CAPP_FIR_ACTION0_0x02013006        , ULL(0x02013006) );
-CONST_UINT64_T( NX_CAPP_FIR_ACTION1_0x02013007        , ULL(0x02013007) );
-CONST_UINT64_T( NX_CAPP_SNOOP_ERR_REPORT_0x0201300A   , ULL(0x0201300A) );
-CONST_UINT64_T( NX_CAPP_APC_MASTER_ERR_REPORT_0x0201300B, ULL(0x0201300B) );
-CONST_UINT64_T( NX_CAPP_TRANSPORT_ERR_HOLD_0x0201300C , ULL(0x0201300C) );
-CONST_UINT64_T( NX_CAPP_TLBI_ERR_HOLD_0x0201300D      , ULL(0x0201300D) );
-CONST_UINT64_T( NX_CAPP_ERR_STAT_CTRL_0x0201300E      , ULL(0x0201300E) );
-CONST_UINT64_T( NX_CAPP_FLUSH_SUE_STATE_MAP_0x0201300F, ULL(0x0201300F) );
-CONST_UINT64_T( NX_CAPP_ERR_INJECT_0x02013010         , ULL(0x02013010) );
-CONST_UINT64_T( NX_CAPP_DEBUG_CTRL_0x02013011         , ULL(0x02013011) );
-CONST_UINT64_T( NX_CAPP_EPOCH_RECOV_TIMERS_CTRL_0x0201302C, ULL(0x0201302C) );
-CONST_UINT64_T( NX_CAPP_FLUSH_SUE_UOP1_0x02013803     , ULL(0x02013803) );
-CONST_UINT64_T( NX_CAPP_FLUSH_SUE_UOP2_0x02013804     , ULL(0x02013804) );
-
-CONST_UINT64_T( NX_CAPP1_FIR_0x02013180               , ULL(0x02013180) );
-CONST_UINT64_T( NX_CAPP1_FIR_AND_0x02013181           , ULL(0x02013181) );
-CONST_UINT64_T( NX_CAPP1_FIR_MASK_0x02013183          , ULL(0x02013183) );
-CONST_UINT64_T( NX_CAPP1_FIR_ACTION0_0x02013186       , ULL(0x02013186) );
-CONST_UINT64_T( NX_CAPP1_FIR_ACTION1_0x02013187       , ULL(0x02013187) );
-CONST_UINT64_T( NX_CAPP1_SNOOP_ERR_REPORT_0x0201318A  , ULL(0x0201318A) );
-CONST_UINT64_T( NX_CAPP1_APC_MASTER_ERR_REPORT_0x0201318B, ULL(0x0201318B) );
-CONST_UINT64_T( NX_CAPP1_TRANSPORT_ERR_HOLD_0x0201318C, ULL(0x0201318C) );
-CONST_UINT64_T( NX_CAPP1_TLBI_ERR_HOLD_0x0201318D     , ULL(0x0201318D) );
-CONST_UINT64_T( NX_CAPP1_ERR_STAT_CTRL_0x0201318E     , ULL(0x0201318E) );
-CONST_UINT64_T( NX_CAPP1_FLUSH_SUE_STATE_MAP_0x0201318F, ULL(0x0201318F) );
-CONST_UINT64_T( NX_CAPP1_ERR_INJECT_0x02013190        , ULL(0x02013190) );
-CONST_UINT64_T( NX_CAPP1_DEBUG_CTRL_0x02013191        , ULL(0x02013191) );
-CONST_UINT64_T( NX_CAPP1_EPOCH_RECOV_TIMERS_CTRL_0x020131AC, ULL(0x020131AC) );
-CONST_UINT64_T( NX_CAPP1_FLUSH_SUE_UOP1_0x02013983    , ULL(0x02013983) );
-CONST_UINT64_T( NX_CAPP1_FLUSH_SUE_UOP2_0x02013984    , ULL(0x02013984) );
-
-CONST_UINT64_T( NX_PB_DEBUG_0x02013090                , ULL(0x02013090) );
-CONST_UINT64_T( NX_DEBUG_SNAPSHOT0_0x020130A4         , ULL(0x020130A4) );
-CONST_UINT64_T( NX_DEBUG_SNAPSHOT1_0x020130A5         , ULL(0x020130A5) );
-
-CONST_UINT64_T( NX_DMA_ENG_FIR_0x02013100             , ULL(0x02013100) );
-CONST_UINT64_T( NX_DMA_ENG_FIR_AND_0x02013101         , ULL(0x02013101) );
-CONST_UINT64_T( NX_DMA_ENG_FIR_MASK_0x02013103        , ULL(0x02013103) );
-
-CONST_UINT64_T( NX_DEBUGMUX_CTRL_0x0201310A           , ULL(0x0201310A) );
-
-CONST_UINT64_T( NX_CQ_FIR_0x02013080                  , ULL(0x02013080) );
-CONST_UINT64_T( NX_CQ_FIR_AND_0x02013081              , ULL(0x02013081) );
-CONST_UINT64_T( NX_CQ_FIR_MASK_0x02013083             , ULL(0x02013083) );
-
-CONST_UINT64_T( NX_AS_FIR_0x020130C0                  , ULL(0x020130C0) );
-CONST_UINT64_T( NX_AS_FIR_AND_0x020130C1              , ULL(0x020130C1) );
-CONST_UINT64_T( NX_AS_FIR_MASK_0x020130C3             , ULL(0x020130C3) );
-
-//------------------------------------------------------------------------------
-//      MCD
-//------------------------------------------------------------------------------
-CONST_UINT64_T( MCD_FIR_0x02013400                    , ULL(0x02013400) );
-CONST_UINT64_T( MCD_FIR_AND_0x02013401                , ULL(0x02013401) );
-CONST_UINT64_T( MCD_FIR_OR_0x02013402                 , ULL(0x02013402) );
-CONST_UINT64_T( MCD_FIR_MASK_0x02013403               , ULL(0x02013403) );
-CONST_UINT64_T( MCD_FIR_MASK_AND_0x02013404           , ULL(0x02013404) );
-CONST_UINT64_T( MCD_FIR_MASK_OR_0x02013405            , ULL(0x02013405) );
-CONST_UINT64_T( MCD_FIR_ACTION0_0x02013406            , ULL(0x02013406) );
-CONST_UINT64_T( MCD_FIR_ACTION1_0x02013407            , ULL(0x02013407) );
-
-CONST_UINT64_T( MCD_PRE_EPS_0x0201340B                , ULL(0x0201340B) );
-CONST_UINT64_T( MCD_CN00_0x0201340C                   , ULL(0x0201340C) );
-CONST_UINT64_T( MCD_CN01_0x0201340D                   , ULL(0x0201340D) );
-CONST_UINT64_T( MCD_CN10_0x0201340E                   , ULL(0x0201340E) );
-CONST_UINT64_T( MCD_CN11_0x0201340F                   , ULL(0x0201340F) );
-CONST_UINT64_T( MCD_REC_EVEN_0x02013410               , ULL(0x02013410) );
-CONST_UINT64_T( MCD_REC_ODD_0x02013411                , ULL(0x02013411) );
-
-
-/******************************************************************************/
-/******************************  X-BUS CHIPLET  *******************************/
-/******************************************************************************/
-
-//------------------------------------------------------------------------------
-//      X-BUS GPIO
-//------------------------------------------------------------------------------
-CONST_UINT64_T( X_GP0_0x04000000                      , ULL(0x04000000) );
-CONST_UINT64_T( X_GP1_0x04000001                      , ULL(0x04000001) );
-CONST_UINT64_T( X_GP2_0x04000002                      , ULL(0x04000002) );
-
-CONST_UINT64_T( X_CLK_ADJ_DAT_REG_0x040F0015          , ULL(0x040F0015) );
-CONST_UINT64_T( X_CLK_ADJ_SET_0x040F0016              , ULL(0x040F0016) );
-
-//------------------------------------------------------------------------------
-//      X-BUS SCOM
-//            ring 1 = Trace 0
-//            ring 2 = Trace 1
-//            ring 3 = PBEN
-//            ring 4 = IOX0
-//            ring 5 = IOX1
-//            ring 6 = IOX3
-//            ring 7 = IOX2
-//            ring 9 = IOPSI
-//------------------------------------------------------------------------------
-CONST_UINT64_T( X_SCOM_0x04010000                     , ULL(0x04010000) );
-
-//------------------------------------------------------------------------------
-//      X-BUS TRACE
-//------------------------------------------------------------------------------
-CONST_UINT64_T( X_TRACE_STATUS_0x04010004             , ULL(0x04010004) );
-CONST_UINT64_T( X_TRACE_DATA_HI_T0_0x04010400         , ULL(0x04010400) );
-CONST_UINT64_T( X_TRACE_DATA_LO_T0_0x04010401         , ULL(0x04010401) );
-CONST_UINT64_T( X_TRACE_DATA_HI_T1_0x04010800         , ULL(0x04010800) );
-CONST_UINT64_T( X_TRACE_DATA_LO_T1_0x04010801         , ULL(0x04010801) );
-
-
-
-//------------------------------------------------------------------------------
-//      X-BUS PBEN
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PB_X_FIR_0x04010C00                   , ULL(0x04010C00) );
-CONST_UINT64_T( PB_X_FIR_AND_0x04010C01               , ULL(0x04010C01) );
-CONST_UINT64_T( PB_X_FIR_OR_0x04010C02                , ULL(0x04010C02) );
-CONST_UINT64_T( PB_X_FIR_MASK_0x04010C03              , ULL(0x04010C03) );
-CONST_UINT64_T( PB_X_FIR_MASK_AND_0x04010C04          , ULL(0x04010C04) );
-CONST_UINT64_T( PB_X_FIR_MASK_OR_0x04010C05           , ULL(0x04010C05) );
-CONST_UINT64_T( PB_X_FIR_ACTION0_0x04010C06           , ULL(0x04010C06) );
-CONST_UINT64_T( PB_X_FIR_ACTION1_0x04010C07           , ULL(0x04010C07) );
-
-CONST_UINT64_T( PB_X_MODE_0x04010C0A                  , ULL(0x04010C0A) );
-
-//------------------------------------------------------------------------------
-//      X-BUS IOPSI
-//------------------------------------------------------------------------------
-CONST_UINT64_T( X_PSI_FIR_0x04012400                  , ULL(0x04012400) );
-CONST_UINT64_T( X_PSI_FIR_MASK_0x04012403             , ULL(0x04012403) );
-CONST_UINT64_T( X_PSI_RXCNTL_0x04012420               , ULL(0x04012420) );
-CONST_UINT64_T( X_PSI_RXSTATUS_0x04012422             , ULL(0x04012422) );
-CONST_UINT64_T( X_PSI_TXCNTL_0x04012430               , ULL(0x04012430) );
-
-//------------------------------------------------------------------------------
-//      X-BUS CLOCK CONTROL
-//------------------------------------------------------------------------------
-CONST_UINT64_T( X_OPCG_CNTL0_0x04030002               , ULL(0x04030002) );
-CONST_UINT64_T( X_OPCG_CNTL1_0x04030003               , ULL(0x04030003) );
-CONST_UINT64_T( X_OPCG_CNTL2_0x04030004               , ULL(0x04030004) );
-CONST_UINT64_T( X_OPCG_CNTL3_0x04030005               , ULL(0x04030005) );
-CONST_UINT64_T( X_CLK_REGION_0x04030006               , ULL(0x04030006) );
-CONST_UINT64_T( X_CLK_SCANSEL_0x04030007              , ULL(0x04030007) );
-CONST_UINT64_T( X_CLK_STATUS_0x04030008               , ULL(0x04030008) );
-CONST_UINT64_T( X_CC_ERROR_STATUS_0x04030009          , ULL(0x04030009) );
-CONST_UINT64_T( X_CC_PROTECT_MODE_0x040303FE          , ULL(0x040303FE) );
-
-//------------------------------------------------------------------------------
-//      X-BUS FIR
-//------------------------------------------------------------------------------
-CONST_UINT64_T( X_XSTOP_0x04040000                    , ULL(0x04040000) );
-CONST_UINT64_T( X_RECOV_0x04040001                    , ULL(0x04040001) );
-CONST_UINT64_T( X_FIR_MASK_0x04040002                 , ULL(0x04040002) );
-CONST_UINT64_T( X_SPATTN_0x04040004                   , ULL(0x04040004) );
-CONST_UINT64_T( X_SPATTN_AND_0x04040005               , ULL(0x04040005) );
-CONST_UINT64_T( X_SPATTN_OR_0x04040006                , ULL(0x04040006) );
-CONST_UINT64_T( X_SPATTN_MASK_0x04040007              , ULL(0x04040007) );
-CONST_UINT64_T( X_FIR_MODE_0x04040008                 , ULL(0x04040008) );
-CONST_UINT64_T( X_PERV_LFIR_0x0404000A                , ULL(0x0404000A) );
-CONST_UINT64_T( X_PERV_LFIR_AND_0x0404000B            , ULL(0x0404000B) );
-CONST_UINT64_T( X_PERV_LFIR_OR_0x0404000C             , ULL(0x0404000C) );
-CONST_UINT64_T( X_PERV_LFIR_MASK_0x0404000D           , ULL(0x0404000D) );
-CONST_UINT64_T( X_PERV_LFIR_MASK_AND_0x0404000E       , ULL(0x0404000E) );
-CONST_UINT64_T( X_PERV_LFIR_MASK_OR_0x0404000F        , ULL(0x0404000F) );
-CONST_UINT64_T( X_PERV_LFIR_ACT0_0x04040010           , ULL(0x04040010) );
-CONST_UINT64_T( X_PERV_LFIR_ACT1_0x04040011           , ULL(0x04040011) );
-
-CONST_UINT64_T( X_XBUS0_BUSCNTL_FIR_0x04011000        , ULL(0x04011000) );
-CONST_UINT64_T( X_XBUS0_BUSCNTL_FIR_AND_0x04011001    , ULL(0x04011001) );
-CONST_UINT64_T( X_XBUS0_BUSCNTL_FIR_MASK_0x04011003   , ULL(0x04011003) );
-
-CONST_UINT64_T( X_XBUS1_BUSCNTL_FIR_0x04011400        , ULL(0x04011400) );
-CONST_UINT64_T( X_XBUS1_BUSCNTL_FIR_AND_0x04011401    , ULL(0x04011401) );
-
-CONST_UINT64_T( X_XBUS_SCOM_MODE_PB_0x04011020        , ULL(0x04011020) );
-
-//------------------------------------------------------------------------------
-//      X-BUS THERMAL
-//------------------------------------------------------------------------------
-CONST_UINT64_T( X_THERM_0x04050000                    , ULL(0x04050000) );
-
-//------------------------------------------------------------------------------
-//      X-BUS PCB SLAVE
-//------------------------------------------------------------------------------
-//Multicast Group Registers
-CONST_UINT64_T( X_MCGR1_0x040F0001                    , ULL(0x040F0001) );
-CONST_UINT64_T( X_MCGR2_0x040F0002                    , ULL(0x040F0002) );
-CONST_UINT64_T( X_MCGR3_0x040F0003                    , ULL(0x040F0003) );
-CONST_UINT64_T( X_MCGR4_0x040F0004                    , ULL(0x040F0004) );
-//GP0 Register
-CONST_UINT64_T( X_GP0_AND_0x04000004                  , ULL(0x04000004) );
-CONST_UINT64_T( X_GP0_OR_0x04000005                   , ULL(0x04000005) );
-//GP3 Register
-CONST_UINT64_T( X_GP3_0x040F0012                      , ULL(0x040F0012) );
-CONST_UINT64_T( X_GP3_AND_0x040F0013                  , ULL(0x040F0013) );
-CONST_UINT64_T( X_GP3_OR_0x040F0014                   , ULL(0x040F0014) );
-// PLL lock information
-CONST_UINT64_T( X_PLLLOCKREG_0x040F0019               , ULL(0x040F0019) );
-
-//------------------------------------------------------------------------------
-//      X-BUS HANG DETECTION
-//------------------------------------------------------------------------------
-CONST_UINT64_T( X_HANG_P0_XBUS_0x040F0020             , ULL(0x040F0020) );   // XBUS     : setup hang pulse register0
-CONST_UINT64_T( X_HANG_P6_XBUS_0x040F0026             , ULL(0x040F0026) );   // XBUS     : setup hang pulse register6
-CONST_UINT64_T( X_HANG_PRE_XBUS_0x040F0028            , ULL(0x040F0028) );   // XBUS     : setup hang precounter (HEX:01)
-
-
-/******************************************************************************/
-/******************************  A-BUS CHIPLET  *******************************/
-/******************************************************************************/
-//------------------------------------------------------------------------------
-//      A-BUS GPIO
-//------------------------------------------------------------------------------
-CONST_UINT64_T( A_GP0_0x08000000                      , ULL(0x08000000) );
-CONST_UINT64_T( A_GP1_0x08000001                      , ULL(0x08000001) );
-CONST_UINT64_T( A_GP2_0x08000002                      , ULL(0x08000002) );
-
-//------------------------------------------------------------------------------
-//      A-BUS SCOM
-//            ring 1 = trace
-//            ring 2 = PBES
-//            ring 3 = IOA
-//------------------------------------------------------------------------------
-CONST_UINT64_T( A_SCOM_0x08010000                     , ULL(0x08010000) );
-
-//------------------------------------------------------------------------------
-//      A-BUS TRACE[0,1]
-//------------------------------------------------------------------------------
-CONST_UINT64_T( A_TRACE_STATUS_0x08010004             , ULL(0x08010004) );
-CONST_UINT64_T( A_TRACE_DATA_HI_0x08010400            , ULL(0x08010400) );
-CONST_UINT64_T( A_TRACE_DATA_LO_0x08010401            , ULL(0x08010401) );
-CONST_UINT64_T( A_TRACE_DATA_HI_0x08010440            , ULL(0x08010440) );
-CONST_UINT64_T( A_TRACE_DATA_LO_0x08010441            , ULL(0x08010441) );
-
-//------------------------------------------------------------------------------
-//      A-BUS CLOCK CONTROL
-//------------------------------------------------------------------------------
-CONST_UINT64_T( A_OPCG_CNTL0_0x08030002               , ULL(0x08030002) );
-CONST_UINT64_T( A_OPCG_CNTL1_0x08030003               , ULL(0x08030003) );
-CONST_UINT64_T( A_OPCG_CNTL2_0x08030004               , ULL(0x08030004) );
-CONST_UINT64_T( A_OPCG_CNTL3_0x08030005               , ULL(0x08030005) );
-CONST_UINT64_T( A_CLK_REGION_0x08030006               , ULL(0x08030006) );
-CONST_UINT64_T( A_CLK_SCANSEL_0x08030007              , ULL(0x08030007) );
-CONST_UINT64_T( A_CLK_STATUS_0x08030008               , ULL(0x08030008) );
-CONST_UINT64_T( A_CC_ERROR_STATUS_0x08030009          , ULL(0x08030009) );
-CONST_UINT64_T( A_CC_PROTECT_MODE_0x080303FE          , ULL(0x080303FE) );
-
-//------------------------------------------------------------------------------
-//      A-BUS FIR
-//------------------------------------------------------------------------------
-CONST_UINT64_T( A_XSTOP_0x08040000                    , ULL(0x08040000) );
-CONST_UINT64_T( A_RECOV_0x08040001                    , ULL(0x08040001) );
-CONST_UINT64_T( A_FIR_MASK_0x08040002                 , ULL(0x08040002) );
-CONST_UINT64_T( A_SPATTN_0x08040004                   , ULL(0x08040004) );
-CONST_UINT64_T( A_SPATTN_AND_0x08040005               , ULL(0x08040005) );
-CONST_UINT64_T( A_SPATTN_OR_0x08040006                , ULL(0x08040006) );
-CONST_UINT64_T( A_SPATTN_MASK_0x08040007              , ULL(0x08040007) );
-CONST_UINT64_T( A_FIR_MODE_0x08040008                 , ULL(0x08040008) );
-CONST_UINT64_T( A_PERV_LFIR_0x0804000A                , ULL(0x0804000A) );
-CONST_UINT64_T( A_PERV_LFIR_AND_0x0804000B            , ULL(0x0804000B) );
-CONST_UINT64_T( A_PERV_LFIR_OR_0x0804000C             , ULL(0x0804000C) );
-CONST_UINT64_T( A_PERV_LFIR_MASK_0x0804000D           , ULL(0x0804000D) );
-CONST_UINT64_T( A_PERV_LFIR_MASK_AND_0x0804000E       , ULL(0x0804000E) );
-CONST_UINT64_T( A_PERV_LFIR_MASK_OR_0x0804000F        , ULL(0x0804000F) );
-CONST_UINT64_T( A_PERV_LFIR_ACT0_0x08040010           , ULL(0x08040010) );
-CONST_UINT64_T( A_PERV_LFIR_ACT1_0x08040011           , ULL(0x08040011) );
-
-CONST_UINT64_T( A_ABUS_BUSCNTL_FIR_0x08010C00         , ULL(0x08010C00) );
-CONST_UINT64_T( A_ABUS_BUSCNTL_FIR_AND_0x08010C01     , ULL(0x08010C01) );
-CONST_UINT64_T( A_ABUS_BUSCNTL_FIR_MASK_0x08010C03    , ULL(0x08010C03) );
-
-CONST_UINT64_T( A_ABUS_SCOM_MODE_PB_0x08010C20        , ULL(0x08010C20) );
-
-//------------------------------------------------------------------------------
-//      NV/NPU
-//------------------------------------------------------------------------------
-CONST_UINT64_T( NV0_BUSCNTL_FIR_0x08010C00            , ULL(0x08010C00) );
-CONST_UINT64_T( NV1_BUSCNTL_FIR_0x08010C40            , ULL(0x08010C40) );
-
-CONST_UINT64_T( NPU0_MMIO_BAR0_0x08013C02             , ULL(0x08013C02) );
-CONST_UINT64_T( NPU0_MMIO_BAR1_0x08013C03             , ULL(0x08013C03) );
-CONST_UINT64_T( NPU0_NODAL_BAR0_0x08013C04            , ULL(0x08013C04) );
-CONST_UINT64_T( NPU0_NODAL_BAR1_0x08013C05            , ULL(0x08013C05) );
-CONST_UINT64_T( NPU0_GROUP_BAR0_0x08013C06            , ULL(0x08013C06) );
-CONST_UINT64_T( NPU0_GROUP_BAR1_0x08013C07            , ULL(0x08013C07) );
-CONST_UINT64_T( NPU0_CQ_EPS_0x08013C08                , ULL(0x08013C08) );
-
-CONST_UINT64_T( NPU1_MMIO_BAR0_0x08013C42             , ULL(0x08013C42) );
-CONST_UINT64_T( NPU1_MMIO_BAR1_0x08013C43             , ULL(0x08013C43) );
-CONST_UINT64_T( NPU1_NODAL_BAR0_0x08013C44            , ULL(0x08013C44) );
-CONST_UINT64_T( NPU1_NODAL_BAR1_0x08013C45            , ULL(0x08013C45) );
-CONST_UINT64_T( NPU1_GROUP_BAR0_0x08013C46            , ULL(0x08013C46) );
-CONST_UINT64_T( NPU1_GROUP_BAR1_0x08013C47            , ULL(0x08013C47) );
-CONST_UINT64_T( NPU1_CQ_EPS_0x08013C48                , ULL(0x08013C48) );
-
-CONST_UINT64_T( NPU2_MMIO_BAR0_0x08013D02             , ULL(0x08013D02) );
-CONST_UINT64_T( NPU2_MMIO_BAR1_0x08013D03             , ULL(0x08013D03) );
-CONST_UINT64_T( NPU2_NODAL_BAR0_0x08013D04            , ULL(0x08013D04) );
-CONST_UINT64_T( NPU2_NODAL_BAR1_0x08013D05            , ULL(0x08013D05) );
-CONST_UINT64_T( NPU2_GROUP_BAR0_0x08013D06            , ULL(0x08013D06) );
-CONST_UINT64_T( NPU2_GROUP_BAR1_0x08013D07            , ULL(0x08013D07) );
-CONST_UINT64_T( NPU2_CQ_EPS_0x08013D08                , ULL(0x08013D08) );
-
-CONST_UINT64_T( NPU3_MMIO_BAR0_0x08013D42             , ULL(0x08013D42) );
-CONST_UINT64_T( NPU3_MMIO_BAR1_0x08013D43             , ULL(0x08013D43) );
-CONST_UINT64_T( NPU3_NODAL_BAR0_0x08013D44            , ULL(0x08013D44) );
-CONST_UINT64_T( NPU3_NODAL_BAR1_0x08013D45            , ULL(0x08013D45) );
-CONST_UINT64_T( NPU3_GROUP_BAR0_0x08013D46            , ULL(0x08013D46) );
-CONST_UINT64_T( NPU3_GROUP_BAR1_0x08013D47            , ULL(0x08013D47) );
-CONST_UINT64_T( NPU3_CQ_EPS_0x08013D48                , ULL(0x08013D48) );
-
-CONST_UINT64_T( NPU_FIR_0x08013D80                    , ULL(0x08013D80) );
-CONST_UINT64_T( NPU_FIR_AND_0x08013D81                , ULL(0x08013D81) );
-CONST_UINT64_T( NPU_FIR_OR_0x08013D82                 , ULL(0x08013D82) );
-CONST_UINT64_T( NPU_FIR_MASK_0x08013D83               , ULL(0x08013D83) );
-CONST_UINT64_T( NPU_FIR_MASK_AND_0x08013D84           , ULL(0x08013D84) );
-CONST_UINT64_T( NPU_FIR_MASK_OR_0x08013D85            , ULL(0x08013D85) );
-
-//------------------------------------------------------------------------------
-//      PLL LOCK
-//------------------------------------------------------------------------------
-// PLL lock information
-CONST_UINT64_T( A_PLLLOCKREG_0x080F0019              , ULL(0x080F0019) );
-
-//------------------------------------------------------------------------------
-//      A-BUS THERMAL
-//------------------------------------------------------------------------------
-CONST_UINT64_T( A_THERM_0x08050000                    , ULL(0x08050000) );
-
-//------------------------------------------------------------------------------
-//      A-BUS PCB SLAVE
-//------------------------------------------------------------------------------
-//Multicast Group Registers
-CONST_UINT64_T( A_MCGR1_0x080F0001                    , ULL(0x080F0001) );
-CONST_UINT64_T( A_MCGR2_0x080F0002                    , ULL(0x080F0002) );
-CONST_UINT64_T( A_MCGR3_0x080F0003                    , ULL(0x080F0003) );
-CONST_UINT64_T( A_MCGR4_0x080F0004                    , ULL(0x080F0004) );
-//GP0 Register
-CONST_UINT64_T( A_GP0_AND_0x08000004                  , ULL(0x08000004) );
-CONST_UINT64_T( A_GP0_OR_0x08000005                   , ULL(0x08000005) );
-//GP3 Register
-CONST_UINT64_T( A_GP3_0x080F0012                      , ULL(0x080F0012) );
-CONST_UINT64_T( A_GP3_AND_0x080F0013                  , ULL(0x080F0013) );
-CONST_UINT64_T( A_GP3_OR_0x080F0014                   , ULL(0x080F0014) );
-
-//------------------------------------------------------------------------------
-//      A-BUS HANG DETECTION
-//------------------------------------------------------------------------------
-CONST_UINT64_T( A_HANG_P0_0x080F0020                  , ULL(0x080F0020) ); // ABUS     : setup hang pulse register0
-CONST_UINT64_T( A_HANG_P6_0x080F0026                  , ULL(0x080F0026) ); // ABUS     : setup hang pulse register6
-CONST_UINT64_T( A_HANG_PRE_0x080F0028                 , ULL(0x080F0028) ); // ABUS     : setup hang precounter (HEX:01)
-
-//------------------------------------------------------------------------------
-//      A-BUS PBES
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PB_A_FIR_0x08010800                   , ULL(0x08010800) );
-CONST_UINT64_T( PB_A_FIR_AND_0x08010801               , ULL(0x08010801) );
-CONST_UINT64_T( PB_A_FIR_OR_0x08010802                , ULL(0x08010802) );
-CONST_UINT64_T( PB_A_FIR_MASK_0x08010803              , ULL(0x08010803) );
-CONST_UINT64_T( PB_A_FIR_MASK_AND_0x08010804          , ULL(0x08010804) );
-CONST_UINT64_T( PB_A_FIR_MASK_OR_0x08010805           , ULL(0x08010805) );
-CONST_UINT64_T( PB_A_FIR_ACTION0_0x08010806           , ULL(0x08010806) );
-CONST_UINT64_T( PB_A_FIR_ACTION1_0x08010807           , ULL(0x08010807) );
-
-CONST_UINT64_T( PB_A_MODE_0x0801080A                  , ULL(0x0801080A) );
-CONST_UINT64_T( PB_A_TRACE_0x08010812                 , ULL(0x08010812) );
-CONST_UINT64_T( PB_A_FMR_CFG_0x08010813               , ULL(0x08010813) );
-
-/******************************************************************************/
-/*****************************  PCIE-BUS CHIPLET  *****************************/
-/******************************************************************************/
-//------------------------------------------------------------------------------
-//      PCIE-BUS GPIO
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PCIE_GP0_0x09000000                   , ULL(0x09000000) );
-CONST_UINT64_T( PCIE_GP1_0x09000001                   , ULL(0x09000001) );
-CONST_UINT64_T( PCIE_GP2_0x09000002                   , ULL(0x09000002) );
-CONST_UINT64_T( PCIE_GP3_0x09000003                   , ULL(0x09000003) );
-
-CONST_UINT64_T( PCIE_GP0_AND_0x09000004               , ULL(0x09000004) );
-CONST_UINT64_T( PCIE_GP0_OR_0x09000005                , ULL(0x09000005) );
-CONST_UINT64_T( PCIE_GP4_AND_0x09000006               , ULL(0x09000006) );
-CONST_UINT64_T( PCIE_GP4_OR_0x09000007                , ULL(0x09000007) );
-
-//------------------------------------------------------------------------------
-//      PCIE-BUS SCOM
-//            ring  1 = trace
-//            ring  2 = PBF
-//            ring  5 = IOPCI0
-//            ring  6 = IOPCI1
-//            ring  7 = IOPCI2
-//            ring  8 = PCI0
-//            ring  9 = PCI1
-//            ring 10 = PCI2
-//            ring 11 = PCI3
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PCIE_SCOM_0x09010000                  , ULL(0x09010000) );
-
-//------------------------------------------------------------------------------
-//      PCIE-BUS PB
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PB_F_TRACE_0x09010812                 , ULL(0x09010812) );
-CONST_UINT64_T( PB_F_FMR_CFG_0x09010813               , ULL(0x09010813) );
-
-//------------------------------------------------------------------------------
-//      PCIE-BUS TRACE
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PCIE_TRACE_STATUS_0x09010004          , ULL(0x09010004) );
-CONST_UINT64_T( PCIE_TRACE_DATA_HI_0x09010400         , ULL(0x09010400) );
-CONST_UINT64_T( PCIE_TRACE_DATA_LO_0x09010401         , ULL(0x09010401) );
-
-//------------------------------------------------------------------------------
-//      PCIE-BUS PHB
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PCIE0_ETU_RESET_0x0901200A            , ULL(0x0901200A) );
-CONST_UINT64_T( PCIE0_ASB_BAR_0x0901200B              , ULL(0x0901200B) );
-
-CONST_UINT64_T( PCIE1_ETU_RESET_0x0901240A            , ULL(0x0901240A) );
-CONST_UINT64_T( PCIE1_ASB_BAR_0x0901240B              , ULL(0x0901240B) );
-
-CONST_UINT64_T( PCIE2_ETU_RESET_0x0901280A            , ULL(0x0901280A) );
-CONST_UINT64_T( PCIE2_ASB_BAR_0x0901280B              , ULL(0x0901280B) );
-
-CONST_UINT64_T( PCIE3_ETU_RESET_0x09012C0A            , ULL(0x09012C0A) );
-CONST_UINT64_T( PCIE3_ASB_BAR_0x09012C0B              , ULL(0x09012C0B) );
-
-//------------------------------------------------------------------------------
-//      PCIE-BUS PB
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PB_IOF_MODE_0x09011C0A                , ULL(0x09011C0A) );
-
-//------------------------------------------------------------------------------
-//      PCIE-BUS CLOCK CONTROL
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PCIE_OPCG_CNTL0_0x09030002            , ULL(0x09030002) );
-CONST_UINT64_T( PCIE_OPCG_CNTL1_0x09030003            , ULL(0x09030003) );
-CONST_UINT64_T( PCIE_OPCG_CNTL2_0x09030004            , ULL(0x09030004) );
-CONST_UINT64_T( PCIE_OPCG_CNTL3_0x09030005            , ULL(0x09030005) );
-CONST_UINT64_T( PCIE_CLK_REGION_0x09030006            , ULL(0x09030006) );
-CONST_UINT64_T( PCIE_CLK_SCANSEL_0x09030007           , ULL(0x09030007) );
-CONST_UINT64_T( PCIE_CLK_STATUS_0x09030008            , ULL(0x09030008) );
-CONST_UINT64_T( PCIE_CC_ERROR_STATUS_0x09030009       , ULL(0x09030009) );
-CONST_UINT64_T( PCIE_CC_PROTECT_MODE_0x090303FE       , ULL(0x090303FE) );
-
-//------------------------------------------------------------------------------
-//      PCIE-BUS FIR
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PCIE_XSTOP_0x09040000                 , ULL(0x09040000) );
-CONST_UINT64_T( PCIE_RECOV_0x09040001                 , ULL(0x09040001) );
-CONST_UINT64_T( PCIE_FIR_MASK_0x09040002              , ULL(0x09040002) );
-CONST_UINT64_T( PCIE_SPATTN_0x09040004                , ULL(0x09040004) );
-CONST_UINT64_T( PCIE_SPATTN_AND_0x09040005            , ULL(0x09040005) );
-CONST_UINT64_T( PCIE_SPATTN_OR_0x09040006             , ULL(0x09040006) );
-CONST_UINT64_T( PCIE_SPATTN_MASK_0x09040007           , ULL(0x09040007) );
-CONST_UINT64_T( PCIE_FIR_MODE_0x09040008              , ULL(0x09040008) );
-CONST_UINT64_T( PCIE_PERV_LFIR_0x0904000A             , ULL(0x0904000A) );
-CONST_UINT64_T( PCIE_PERV_LFIR_AND_0x0904000B         , ULL(0x0904000B) );
-CONST_UINT64_T( PCIE_PERV_LFIR_OR_0x0904000C          , ULL(0x0904000C) );
-CONST_UINT64_T( PCIE_PERV_LFIR_MASK_0x0904000D        , ULL(0x0904000D) );
-CONST_UINT64_T( PCIE_PERV_LFIR_MASK_AND_0x0904000E    , ULL(0x0904000E) );
-CONST_UINT64_T( PCIE_PERV_LFIR_MASK_OR_0x0904000F     , ULL(0x0904000F) );
-CONST_UINT64_T( PCIE_PERV_LFIR_ACT0_0x09040010        , ULL(0x09040010) );
-CONST_UINT64_T( PCIE_PERV_LFIR_ACT1_0x09040011        , ULL(0x09040011) );
-
-CONST_UINT64_T( ES_PBES_WRAP_TOP_FIR_0x09010800       , ULL(0x09010800) );
-CONST_UINT64_T( ES_PBES_WRAP_TOP_FIR_AND_0x09010801   , ULL(0x09010801) );
-CONST_UINT64_T( ES_PBES_WRAP_TOP_FIR_MASK_0x09010803  , ULL(0x09010803) );
-
-CONST_UINT64_T( PCIE_IOP0_PLL_FIR_0x09011400          , ULL(0x09011400) );
-CONST_UINT64_T( PCIE_IOP0_PLL_FIR_AND_0x09011401      , ULL(0x09011401) );
-CONST_UINT64_T( PCIE_IOP0_PLL_FIR_OR_0x09011402       , ULL(0x09011402) );
-CONST_UINT64_T( PCIE_IOP0_PLL_FIR_MASK_0x09011403     , ULL(0x09011403) );
-CONST_UINT64_T( PCIE_IOP0_PLL_FIR_MASK_AND_0x09011404 , ULL(0x09011404) );
-CONST_UINT64_T( PCIE_IOP0_PLL_FIR_MASK_OR_0x09011405  , ULL(0x09011405) );
-CONST_UINT64_T( PCIE_IOP0_PLL_FIR_ACTION0_0x09011406  , ULL(0x09011406) );
-CONST_UINT64_T( PCIE_IOP0_PLL_FIR_ACTION1_0x09011407  , ULL(0x09011407) );
-CONST_UINT64_T( PCIE_IOP0_PLL_FIR_WOF_0x09011408      , ULL(0x09011408) );
-
-CONST_UINT64_T( PCIE_IOP1_PLL_FIR_0x09011840          , ULL(0x09011840) );
-CONST_UINT64_T( PCIE_IOP1_PLL_FIR_AND_0x09011841      , ULL(0x09011841) );
-CONST_UINT64_T( PCIE_IOP1_PLL_FIR_OR_0x09011842       , ULL(0x09011842) );
-CONST_UINT64_T( PCIE_IOP1_PLL_FIR_MASK_0x09011843     , ULL(0x09011843) );
-CONST_UINT64_T( PCIE_IOP1_PLL_FIR_MASK_AND_0x09011844 , ULL(0x09011844) );
-CONST_UINT64_T( PCIE_IOP1_PLL_FIR_MASK_OR_0x09011845  , ULL(0x09011845) );
-CONST_UINT64_T( PCIE_IOP1_PLL_FIR_ACTION0_0x09011846  , ULL(0x09011846) );
-CONST_UINT64_T( PCIE_IOP1_PLL_FIR_ACTION1_0x09011847  , ULL(0x09011847) );
-CONST_UINT64_T( PCIE_IOP1_PLL_FIR_WOF_0x09011848      , ULL(0x09011848) );
-
-CONST_UINT64_T( PCIE_IOP2_PLL_FIR_0x09011C40          , ULL(0x09011C40) );
-CONST_UINT64_T( PCIE_IOP2_PLL_FIR_AND_0x09011C41      , ULL(0x09011C41) );
-CONST_UINT64_T( PCIE_IOP2_PLL_FIR_OR_0x09011C42       , ULL(0x09011C42) );
-CONST_UINT64_T( PCIE_IOP2_PLL_FIR_MASK_0x09011C43     , ULL(0x09011C43) );
-CONST_UINT64_T( PCIE_IOP2_PLL_FIR_MASK_AND_0x09011C44 , ULL(0x09011C44) );
-CONST_UINT64_T( PCIE_IOP2_PLL_FIR_MASK_OR_0x09011C45  , ULL(0x09011C45) );
-CONST_UINT64_T( PCIE_IOP2_PLL_FIR_ACTION0_0x09011C46  , ULL(0x09011C46) );
-CONST_UINT64_T( PCIE_IOP2_PLL_FIR_ACTION1_0x09011C47  , ULL(0x09011C47) );
-CONST_UINT64_T( PCIE_IOP2_PLL_FIR_WOF_0x09011C48      , ULL(0x09011C48) );
-
-//------------------------------------------------------------------------------
-//      PLL LOCK
-//------------------------------------------------------------------------------
-// PLL lock information
-CONST_UINT64_T( PCIE_PLLLOCKREG_0x090F0019             , ULL(0x090F0019) );
-
-//------------------------------------------------------------------------------
-//      PCIE-BUS THERMAL
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PCIE_THERM_0x09050000                 , ULL(0x09050000) );
-
-//------------------------------------------------------------------------------
-//      PCIE-BUS PCB SLAVE
-//------------------------------------------------------------------------------
-//Multicast Group Registers
-CONST_UINT64_T( PCIE_MCGR1_0x090F0001                 , ULL(0x090F0001) );
-CONST_UINT64_T( PCIE_MCGR2_0x090F0002                 , ULL(0x090F0002) );
-CONST_UINT64_T( PCIE_MCGR3_0x090F0003                 , ULL(0x090F0003) );
-CONST_UINT64_T( PCIE_MCGR4_0x090F0004                 , ULL(0x090F0004) );
-//GP3 Register
-CONST_UINT64_T( PCIE_GP3_0x090F0012                   , ULL(0x090F0012) );
-CONST_UINT64_T( PCIE_GP3_AND_0x090F0013               , ULL(0x090F0013) );
-CONST_UINT64_T( PCIE_GP3_OR_0x090F0014                , ULL(0x090F0014) );
-
-//------------------------------------------------------------------------------
-//      PCIE-BUS HANG DETECTION
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PCIE_HANG_P6_0x090F0026               , ULL(0x090F0026) );       // PCIE     : setup hang counter 6
-CONST_UINT64_T( PCIE_HANG_PRE_0x090F0028              , ULL(0x090F0028) );       // PCIE     : setup hang precounter (HEX:01)
-
-//------------------------------------------------------------------------------
-//      PCIE-BUS INDIRECT SCOM ADDRESSES (IOP)
-//------------------------------------------------------------------------------
-CONST_UINT64_T( PCIE_IOP0_PLL_GLOBAL_CONTROL2_0x8000080A0901143F, ULL(0x8000080A0901143F) );
-CONST_UINT64_T( PCIE_IOP1_PLL_GLOBAL_CONTROL2_0x8000080A0901187F, ULL(0x8000080A0901187F) );
-CONST_UINT64_T( PCIE_IOP2_PLL_GLOBAL_CONTROL2_0x8000080A09011C7F, ULL(0x8000080A09011C7F) );
-
-
-/******************************************************************************/
-/********************************  EX CHIPLET  ********************************/
-/******************************************************************************/
-// Note: ECMD will require the use of these addresses, and it will update them
-//       under the covers to point to the actual EX chiplet in question.
-//
-//       Example: getscom pu.ex 10000001 -c3   ---> scom address 0x13000001
-
-//------------------------------------------------------------------------------
-//      EX CHIPLET ID
-//      use for lpcs P0, <chipletID>
-//------------------------------------------------------------------------------
-CONST_UINT64_T( EX00_CHIPLET_0x10000000               , ULL(0x10000000) );
-CONST_UINT64_T( EX01_CHIPLET_0x11000000               , ULL(0x11000000) );
-CONST_UINT64_T( EX02_CHIPLET_0x12000000               , ULL(0x12000000) );
-CONST_UINT64_T( EX03_CHIPLET_0x13000000               , ULL(0x13000000) );
-CONST_UINT64_T( EX04_CHIPLET_0x14000000               , ULL(0x14000000) );
-CONST_UINT64_T( EX05_CHIPLET_0x15000000               , ULL(0x15000000) );
-CONST_UINT64_T( EX06_CHIPLET_0x16000000               , ULL(0x16000000) );
-CONST_UINT64_T( EX07_CHIPLET_0x17000000               , ULL(0x17000000) );
-CONST_UINT64_T( EX08_CHIPLET_0x18000000               , ULL(0x18000000) );
-CONST_UINT64_T( EX09_CHIPLET_0x19000000               , ULL(0x19000000) );
-CONST_UINT64_T( EX10_CHIPLET_0x1A000000               , ULL(0x1A000000) );
-CONST_UINT64_T( EX11_CHIPLET_0x1B000000               , ULL(0x1B000000) );
-CONST_UINT64_T( EX12_CHIPLET_0x1C000000               , ULL(0x1C000000) );
-CONST_UINT64_T( EX13_CHIPLET_0x1D000000               , ULL(0x1D000000) );
-CONST_UINT64_T( EX14_CHIPLET_0x1E000000               , ULL(0x1E000000) );
-CONST_UINT64_T( EX15_CHIPLET_0x1F000000               , ULL(0x1F000000) );
-
-//------------------------------------------------------------------------------
-//      EX GPIO
-//------------------------------------------------------------------------------
-CONST_UINT64_T( EX_GP0_0x10000000                     , ULL(0x10000000) );
-CONST_UINT64_T( EX_GP0_AND_0x10000004                 , ULL(0x10000004) );
-CONST_UINT64_T( EX_GP0_OR_0x10000005                  , ULL(0x10000005) );
-CONST_UINT64_T( EX_GP1_0x10000001                     , ULL(0x10000001) );
-CONST_UINT64_T( EX_GP2_0x10000002                     , ULL(0x10000002) );
-
-//------------------------------------------------------------------------------
-//      EX SCOM
-//         ring 1  = ECO trace
-//         ring 2  = L3
-//         ring 3  = NC
-//         ring 4  = HTM
-//         ring 8  = L2 trace 0
-//         ring 9  = L2 trace 1
-//         ring 10 = L2
-//         ring 11 = PC trace
-//         ring 12 = PC
-//         ring 15 = PC sec
-//------------------------------------------------------------------------------
-//L3
-CONST_UINT64_T( EX_L3_FIR_REG_0x10010800              , ULL(0x10010800) );
-CONST_UINT64_T( EX_L3_FIR_AND_REG_0x10010801          , ULL(0x10010801) );
-CONST_UINT64_T( EX_L3_FIR_OR_REG_0x10010802           , ULL(0x10010802) );
-CONST_UINT64_T( EX_L3_FIR_MASK_REG_0x10010803         , ULL(0x10010803) );
-CONST_UINT64_T( EX_L3_FIR_ACTION0_REG_0x10010806      , ULL(0x10010806) );
-CONST_UINT64_T( EX_L3_FIR_ACTION1_REG_0x10010807      , ULL(0x10010807) );
-CONST_UINT64_T( EX_L3_MODE_REG1_0x1001080A            , ULL(0x1001080A) );
-CONST_UINT64_T( EX_L3_BAR1_REG_0x1001080B             , ULL(0x1001080B) );
-CONST_UINT64_T( EX_L3_PRD_PURGE_REG_0x1001080E        , ULL(0x1001080E) );
-CONST_UINT64_T( EX_L3_CERRS_REG0_0x10010810           , ULL(0x10010810) );
-CONST_UINT64_T( EX_L3_BAR2_REG_0x10010813             , ULL(0x10010813) );
-CONST_UINT64_T( EX_L3_PHYP_PURGE_REG_0x10010814       , ULL(0x10010814) );
-CONST_UINT64_T( EX_L3_BAR_GROUP_MASK_REG_0x10010816   , ULL(0x10010816) );
-CONST_UINT64_T( EX_L3_CERRS_REG1_0x10010817           , ULL(0x10010817) );
-CONST_UINT64_T( EX_L3_CERRS_RD_EPS_REG_0x10010829     , ULL(0x10010829) );//p8_xip_customize
-CONST_UINT64_T( EX_L3_CERRS_WR_EPS_REG_0x1001082A     , ULL(0x1001082A) );//p8_xip_customize
-CONST_UINT64_T( EX_L3_MODE_REG0_0x1001082B            , ULL(0x1001082B) );
-CONST_UINT64_T( EX_L3_RD_EPSILON_CFG_REG_0x10010829   , ULL(0x10010829) );//??
-CONST_UINT64_T( EX_L3_WR_EPSILON_CFG_REG_0x1001082A   , ULL(0x1001082A) );//??
-CONST_UINT64_T( EX_L3_HA_DIRTY_ADDR_WR_PTR_0x10010832 , ULL(0x10010832) );
-
-//NCU
-CONST_UINT64_T( EX_NCU_FIR_REG_0x10010C00              , ULL(0x10010C00) );
-CONST_UINT64_T( EX_NCU_FIR_AND_REG_0x10010C01          , ULL(0x10010C01) );
-CONST_UINT64_T( EX_NCU_FIR_OR_REG_0x10010C02           , ULL(0x10010C02) );
-CONST_UINT64_T( EX_NCU_FIR_MASK_REG_0x10010C03         , ULL(0x10010C03) );
-CONST_UINT64_T( EX_NCU_FIR_ACTION0_REG_0x10010C06      , ULL(0x10010C06) );
-CONST_UINT64_T( EX_NCU_FIR_ACTION1_REG_0x10010C07      , ULL(0x10010C07) );
-CONST_UINT64_T( EX_NCU_MODE_REG_0x10010C0A             , ULL(0x10010C0A) );
-
-//CHTM, IMA
-CONST_UINT64_T( EX_CHTM_MODE_REG_0x10011000            , ULL(0x10011000) );
-CONST_UINT64_T( EX_CHTM_IMA_PDBAR_REG_0x1001100B       , ULL(0x1001100B) );
-CONST_UINT64_T( EX_IMA_EVENT_MASK_0x100132CF           , ULL(0x100132CF) );
-
-//L2
-CONST_UINT64_T( EX_L2_FIR_REG_0x10012800              , ULL(0x10012800) );
-CONST_UINT64_T( EX_L2_FIR_AND_REG_0x10012801          , ULL(0x10012801) );
-CONST_UINT64_T( EX_L2_FIR_OR_REG_0x10012802           , ULL(0x10012802) );
-CONST_UINT64_T( EX_L2_FIR_MASK_REG_0x10012803         , ULL(0x10012803) );
-CONST_UINT64_T( EX_L2_FIR_ACTION0_REG_0x10012806      , ULL(0x10012806) );
-CONST_UINT64_T( EX_L2_FIR_ACTION1_REG_0x10012807      , ULL(0x10012807) );
-CONST_UINT64_T( EX_L2_CERRS_RD_EPS_REG_0x10012814     , ULL(0x10012814) );
-CONST_UINT64_T( EX_L2_CERRS_REG0_0x10012815           , ULL(0x10012815) );
-CONST_UINT64_T( EX_L2_CERRS_REG1_0x10012816           , ULL(0x10012816) );
-CONST_UINT64_T( EX_L2_MODE_REG0_0x1001280A            , ULL(0x1001280A) );
-CONST_UINT64_T( EX_L2_PURGE_CMD_PRD_0x1001280E        , ULL(0x1001280E) );
-CONST_UINT64_T( EX_L2_PURGE_CMD_PHYP_0x1001280F       , ULL(0x1001280F) );
-
-
-//------------------------------------------------------------------------------
-//      EX/CORE TRACE
-//------------------------------------------------------------------------------
-CONST_UINT64_T( EX_TRACE_STATUS_0x10010004            , ULL(0x10010004) );
-CONST_UINT64_T( EX_TRACE_DATA_HI_ECO_0x10010400       , ULL(0x10010400) );
-CONST_UINT64_T( EX_TRACE_DATA_LO_ECO_0x10010401       , ULL(0x10010401) );
-CONST_UINT64_T( EX_TRACE_DATA_HI_L2_T0_0x10012000     , ULL(0x10012000) );
-CONST_UINT64_T( EX_TRACE_DATA_LO_L2_T0_0x10012001     , ULL(0x10012001) );
-CONST_UINT64_T( EX_TRACE_DATA_HI_L2_T1_0x10012400     , ULL(0x10012400) );
-CONST_UINT64_T( EX_TRACE_DATA_LO_L2_T1_0x10012401     , ULL(0x10012401) );
-CONST_UINT64_T( EX_TRACE_DATA_HI_CORE_T0_0x10012C00   , ULL(0x10012C00) );
-CONST_UINT64_T( EX_TRACE_DATA_LO_CORE_T0_0x10012C01   , ULL(0x10012C01) );
-CONST_UINT64_T( EX_TRACE_DATA_HI_CORE_T1_0x10012C40   , ULL(0x10012C40) );
-CONST_UINT64_T( EX_TRACE_DATA_LO_CORE_T1_0x10012C41   , ULL(0x10012C41) );
-CONST_UINT64_T( EX_TRACE_DATA_HI_CORE_T2_0x10012C80   , ULL(0x10012C80) );
-CONST_UINT64_T( EX_TRACE_DATA_LO_CORE_T2_0x10012C81   , ULL(0x10012C81) );
-CONST_UINT64_T( EX_TRACE_DATA_HI_CORE_T3_0x10012CC0   , ULL(0x10012CC0) );
-CONST_UINT64_T( EX_TRACE_DATA_LO_CORE_T3_0x10012CC1   , ULL(0x10012CC1) );
-CONST_UINT64_T( EX_TRACE_DATA_HI_CORE_T4_0x10012D00   , ULL(0x10012D00) );
-CONST_UINT64_T( EX_TRACE_DATA_LO_CORE_T4_0x10012D01   , ULL(0x10012D01) );
-CONST_UINT64_T( EX_TRACE_DATA_HI_CORE_T5_0x10012D40   , ULL(0x10012D40) );
-CONST_UINT64_T( EX_TRACE_DATA_LO_CORE_T5_0x10012D41   , ULL(0x10012D41) );
-CONST_UINT64_T( EX_CORE_DIRECT_DEBUG_CTL_0x100132AF   , ULL(0x100132AF) );
-
-//------------------------------------------------------------------------------
-//      EX/CORE PERVASIVE THREAD CONTROLS
-//        (chiplet/core set by P0 register)
-//------------------------------------------------------------------------------
-// TCTL Direct Controls (for each thread)
-CONST_UINT64_T( EX_PERV_TCTL0_DIRECT_0x10013000       , ULL(0x10013000) );
-CONST_UINT64_T( EX_PERV_TCTL1_DIRECT_0x10013010       , ULL(0x10013010) );
-CONST_UINT64_T( EX_PERV_TCTL2_DIRECT_0x10013020       , ULL(0x10013020) );
-CONST_UINT64_T( EX_PERV_TCTL3_DIRECT_0x10013030       , ULL(0x10013030) );
-CONST_UINT64_T( EX_PERV_TCTL4_DIRECT_0x10013040       , ULL(0x10013040) );
-CONST_UINT64_T( EX_PERV_TCTL5_DIRECT_0x10013050       , ULL(0x10013050) );
-CONST_UINT64_T( EX_PERV_TCTL6_DIRECT_0x10013060       , ULL(0x10013060) );
-CONST_UINT64_T( EX_PERV_TCTL7_DIRECT_0x10013070       , ULL(0x10013070) );
-
-// TCTL RAS Mode (for each thread)
-CONST_UINT64_T( EX_PERV_TCTL0_R_MODE_0x10013001       , ULL(0x10013001) );
-CONST_UINT64_T( EX_PERV_TCTL1_R_MODE_0x10013011       , ULL(0x10013011) );
-CONST_UINT64_T( EX_PERV_TCTL2_R_MODE_0x10013021       , ULL(0x10013021) );
-CONST_UINT64_T( EX_PERV_TCTL3_R_MODE_0x10013031       , ULL(0x10013031) );
-CONST_UINT64_T( EX_PERV_TCTL4_R_MODE_0x10013041       , ULL(0x10013041) );
-CONST_UINT64_T( EX_PERV_TCTL5_R_MODE_0x10013051       , ULL(0x10013051) );
-CONST_UINT64_T( EX_PERV_TCTL6_R_MODE_0x10013061       , ULL(0x10013061) );
-CONST_UINT64_T( EX_PERV_TCTL7_R_MODE_0x10013071       , ULL(0x10013071) );
-
-// TCTL RAS Status (for each thread)
-CONST_UINT64_T( EX_PERV_TCTL0_R_STAT_0x10013002       , ULL(0x10013002) );
-CONST_UINT64_T( EX_PERV_TCTL1_R_STAT_0x10013012       , ULL(0x10013012) );
-CONST_UINT64_T( EX_PERV_TCTL2_R_STAT_0x10013022       , ULL(0x10013022) );
-CONST_UINT64_T( EX_PERV_TCTL3_R_STAT_0x10013032       , ULL(0x10013032) );
-CONST_UINT64_T( EX_PERV_TCTL4_R_STAT_0x10013042       , ULL(0x10013042) );
-CONST_UINT64_T( EX_PERV_TCTL5_R_STAT_0x10013052       , ULL(0x10013052) );
-CONST_UINT64_T( EX_PERV_TCTL6_R_STAT_0x10013062       , ULL(0x10013062) );
-CONST_UINT64_T( EX_PERV_TCTL7_R_STAT_0x10013072       , ULL(0x10013072) );
-
-// TCTL POW Status (for each thread)
-CONST_UINT64_T( EX_PERV_TCTL0_POW_STAT_0x10013004     , ULL(0x10013004) );
-CONST_UINT64_T( EX_PERV_TCTL1_POW_STAT_0x10013014     , ULL(0x10013014) );
-CONST_UINT64_T( EX_PERV_TCTL2_POW_STAT_0x10013024     , ULL(0x10013024) );
-CONST_UINT64_T( EX_PERV_TCTL3_POW_STAT_0x10013034     , ULL(0x10013034) );
-CONST_UINT64_T( EX_PERV_TCTL4_POW_STAT_0x10013044     , ULL(0x10013044) );
-CONST_UINT64_T( EX_PERV_TCTL5_POW_STAT_0x10013054     , ULL(0x10013054) );
-CONST_UINT64_T( EX_PERV_TCTL6_POW_STAT_0x10013064     , ULL(0x10013064) );
-CONST_UINT64_T( EX_PERV_TCTL7_POW_STAT_0x10013074     , ULL(0x10013074) );
-
-// TCL Spattn Status (for each thread)
-CONST_UINT64_T( EX_PERV_TCTL0_SPATTN_0x10013007       , ULL(0x10013007) );
-CONST_UINT64_T( EX_PERV_TCTL1_SPATTN_0x10013017       , ULL(0x10013017) );
-CONST_UINT64_T( EX_PERV_TCTL2_SPATTN_0x10013027       , ULL(0x10013027) );
-CONST_UINT64_T( EX_PERV_TCTL3_SPATTN_0x10013037       , ULL(0x10013037) );
-CONST_UINT64_T( EX_PERV_TCTL4_SPATTN_0x10013047       , ULL(0x10013047) );
-CONST_UINT64_T( EX_PERV_TCTL5_SPATTN_0x10013057       , ULL(0x10013057) );
-CONST_UINT64_T( EX_PERV_TCTL6_SPATTN_0x10013067       , ULL(0x10013067) );
-CONST_UINT64_T( EX_PERV_TCTL7_SPATTN_0x10013077       , ULL(0x10013077) );
-
-CONST_UINT64_T( EX_PCNE_REG0_HOLD_OUT_0x1001300D      , ULL(0x1001300D) );
-CONST_UINT64_T( EX_PCNE_REG1_HOLD_OUT_0x1001301D      , ULL(0x1001301D) );
-CONST_UINT64_T( EX_PCNE_REG2_HOLD_OUT_0x1001302D      , ULL(0x1001302D) );
-CONST_UINT64_T( EX_PCNE_REG3_HOLD_OUT_0x1001303D      , ULL(0x1001303D) );
-CONST_UINT64_T( EX_PCNE_REG4_HOLD_OUT_0x1001304D      , ULL(0x1001304D) );
-CONST_UINT64_T( EX_PCNE_REG5_HOLD_OUT_0x1001305D      , ULL(0x1001305D) );
-CONST_UINT64_T( EX_PCNE_REG6_HOLD_OUT_0x1001306D      , ULL(0x1001306D) );
-CONST_UINT64_T( EX_PCNE_REG7_HOLD_OUT_0x1001307D      , ULL(0x1001307D) );
-
-// Thread Active Status
-CONST_UINT64_T( EX_PERV_THREAD_ACTIVE_0x1001310E      , ULL(0x1001310E) );
-
-// RAM Registers
-CONST_UINT64_T( EX_PERV_RAM_MODE_0x10013C00           , ULL(0x10013C00) );
-CONST_UINT64_T( EX_PERV_RAM_CTRL_0x10013C01           , ULL(0x10013C01) );
-CONST_UINT64_T( EX_PERV_RAM_STAT_0x10013C02           , ULL(0x10013C02) );
-
-// SPRC/SPRD/Scratch
-CONST_UINT64_T( EX_PERV_L0_SCOM_SPRC_10013280         , ULL(0x10013280) );
-CONST_UINT64_T( EX_PERV_SPR_MODE_10013281             , ULL(0x10013281) );
-CONST_UINT64_T( EX_PERV_SCRATCH0_10013283             , ULL(0x10013283) );
-CONST_UINT64_T( EX_PERV_SCRATCH1_10013284             , ULL(0x10013284) );
-CONST_UINT64_T( EX_PERV_SCRATCH2_10013285             , ULL(0x10013285) );
-CONST_UINT64_T( EX_PERV_SCRATCH3_10013286             , ULL(0x10013286) );
-CONST_UINT64_T( EX_PERV_SCRATCH4_10013287             , ULL(0x10013287) );
-CONST_UINT64_T( EX_PERV_SCRATCH5_10013288             , ULL(0x10013288) );
-CONST_UINT64_T( EX_PERV_SCRATCH6_10013289             , ULL(0x10013289) );
-CONST_UINT64_T( EX_PERV_SCRATCH7_1001328A             , ULL(0x1001328A) );
-CONST_UINT64_T( EX_PERV_SPRD_L0_100132A3              , ULL(0x100132A3) );
-CONST_UINT64_T( EX_PERV_SPRD_L1_100132A4              , ULL(0x100132A4) );
-CONST_UINT64_T( EX_PERV_SPRD_L2_100132A5              , ULL(0x100132A5) );
-CONST_UINT64_T( EX_PERV_SPRD_L3_100132A6              , ULL(0x100132A6) );
-
-// SPURR regs
-CONST_UINT64_T( EX_PERV_SPURR_FREQ_SCALE_0x1001329F   , ULL(0x1001329F) );
-CONST_UINT64_T( EX_PERV_SPURR_FREQ_REF_0x100132A0     , ULL(0x100132A0) );
-
-// Performance Throttle Mode
-CONST_UINT64_T( EX_PERV_PFTH_THROT_0x100132AD         , ULL(0x100132AD) );
-
-
-//------------------------------------------------------------------------------
-//      EX OHA
-//------------------------------------------------------------------------------
-CONST_UINT64_T( EX_SCOM_0x10020000                    , ULL(0x10020000) );
-CONST_UINT64_T( EX_OHA_ACTIVITY_SAMPLE_MODE_REG_RWx10020000                 , ULL(0x10020000) );
-CONST_UINT64_T( EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG_RWx10020003             , ULL(0x10020003) );
-CONST_UINT64_T( EX_OHA_PROXY_REG_0x10020006                                 , ULL(0x10020006) );
-CONST_UINT64_T( EX_OHA_PROXY_LEGACY_REG_0x10020007                          , ULL(0x10020007) );
-CONST_UINT64_T( EX_OHA_SKITTER_CTRL_MODE_REG_0x10020008                     , ULL(0x10020008) );
-CONST_UINT64_T( EX_OHA_CPM_CTRL_REG_0x1002000A                              , ULL(0x1002000A) );
-CONST_UINT64_T( EX_OHA_RO_STATUS_REG_0x1002000B                             , ULL(0x1002000B) );
-CONST_UINT64_T( EX_OHA_MODE_REG_RWx1002000D                                 , ULL(0x1002000D) );
-CONST_UINT64_T( EX_OHA_ERROR_ERROR_MASK_REG_RWx1002000E                     , ULL(0x1002000E) );
-CONST_UINT64_T( EX_OHA_ARCH_IDLE_STATE_REG_RWx10020011                      , ULL(0x10020011) );
-CONST_UINT64_T( EX_OHA_AISS_IO_REG_0x10020014                               , ULL(0x10020014) );
-
-//------------------------------------------------------------------------------
-//      EX CLOCK CONTROL
-//------------------------------------------------------------------------------
-CONST_UINT64_T( EX_SYNC_CONFIG_0x10030000             , ULL(0x10030000) );
-CONST_UINT64_T( EX_OPCG_CNTL0_0x10030002              , ULL(0x10030002) );
-CONST_UINT64_T( EX_OPCG_CNTL1_0x10030003              , ULL(0x10030003) );
-CONST_UINT64_T( EX_OPCG_CNTL2_0x10030004              , ULL(0x10030004) );
-CONST_UINT64_T( EX_OPCG_CNTL3_0x10030005              , ULL(0x10030005) );
-CONST_UINT64_T( EX_CLK_REGION_0x10030006              , ULL(0x10030006) );
-CONST_UINT64_T( EX_CLK_SCANSEL_0x10030007             , ULL(0x10030007) );
-CONST_UINT64_T( EX_CLK_STATUS_0x10030008              , ULL(0x10030008) );
-CONST_UINT64_T( EX_CC_ERROR_STATUS_0x10030009         , ULL(0x10030009) );
-CONST_UINT64_T( EX_CC_PROTECT_MODE_0x100303FE         , ULL(0x100303FE) );
-
-//------------------------------------------------------------------------------
-//      EX FIR
-//------------------------------------------------------------------------------
-CONST_UINT64_T( EX_CORE_FIR_0x10013100                , ULL(0x10013100) );
-CONST_UINT64_T( EX_CORE_FIR_AND_0x10013101            , ULL(0x10013101) );
-CONST_UINT64_T( EX_CORE_FIR_OR_0x10013102             , ULL(0x10013102) );
-CONST_UINT64_T( EX_CORE_FIR_MASK_0x10013103           , ULL(0x10013103) );
-CONST_UINT64_T( EX_CORE_FIR_MASK_AND_0x10013104       , ULL(0x10013104) );
-CONST_UINT64_T( EX_CORE_FIR_MASK_OR_0x10013105        , ULL(0x10013105) );
-CONST_UINT64_T( EX_CORE_FIR_ACTION0_0x10013106        , ULL(0x10013106) );
-CONST_UINT64_T( EX_CORE_FIR_ACTION1_0x10013107        , ULL(0x10013107) );
-CONST_UINT64_T( EX_CORE_FIR_WOF_0x10013108            , ULL(0x10013108) );
-CONST_UINT64_T( EX_XSTOP_0x10040000                   , ULL(0x10040000) );
-CONST_UINT64_T( EX_RECOV_0x10040001                   , ULL(0x10040001) );
-CONST_UINT64_T( EX_FIR_MASK_0x10040002                , ULL(0x10040002) );
-CONST_UINT64_T( EX_SPATTN_0x10040004                  , ULL(0x10040004) );
-CONST_UINT64_T( EX_SPATTN_AND_0x10040005              , ULL(0x10040005) );
-CONST_UINT64_T( EX_SPATTN_OR_0x10040006               , ULL(0x10040006) );
-CONST_UINT64_T( EX_SPATTN_MASK_0x10040007             , ULL(0x10040007) );
-CONST_UINT64_T( EX_FIR_MODE_0x10040008                , ULL(0x10040008) );
-CONST_UINT64_T( EX_PERV_LFIR_0x1004000A               , ULL(0x1004000A) );
-CONST_UINT64_T( EX_PERV_LFIR_AND_0x1004000B           , ULL(0x1004000B) );
-CONST_UINT64_T( EX_PERV_LFIR_OR_0x1004000C            , ULL(0x1004000C) );
-CONST_UINT64_T( EX_PERV_LFIR_MASK_0x1004000D          , ULL(0x1004000D) );
-CONST_UINT64_T( EX_PERV_LFIR_MASK_AND_0x1004000E      , ULL(0x1004000E) );
-CONST_UINT64_T( EX_PERV_LFIR_MASK_OR_0x1004000F       , ULL(0x1004000F) );
-CONST_UINT64_T( EX_PERV_LFIR_ACT0_0x10040010          , ULL(0x10040010) );
-CONST_UINT64_T( EX_PERV_LFIR_ACT1_0x10040011          , ULL(0x10040011) );
-
-//------------------------------------------------------------------------------
-//      EX THERMAL
-//------------------------------------------------------------------------------
-CONST_UINT64_T( EX_THERM_0x10050000                   , ULL(0x10050000) );
-CONST_UINT64_T( EX_THERM_DTS_RESULT0_0x10050000       , ULL(0x10050000) );
-CONST_UINT64_T( EX_THERM_DTS_RESULT1_0x10050001       , ULL(0x10050001) );
-CONST_UINT64_T( EX_THERM_MODE_REG_0x1005000F          , ULL(0x1005000F) );
-CONST_UINT64_T( EX_THERM_CONTROL_REG_0x10050012       , ULL(0x10050012) );
-CONST_UINT64_T( EX_THERM_ERR_STATUS_REG_0x10050013    , ULL(0x10050013) );
-CONST_UINT64_T( EX_CPM_CONFIG_WRITE_REG0_0x10050000   , ULL(0x10050000) );
-CONST_UINT64_T( EX_CPM_CONFIG_WRITE_REG1_0x10050001   , ULL(0x10050001) );
-CONST_UINT64_T( EX_CPM_RAW_RESULT0_10050005           , ULL(0x10050005) );
-CONST_UINT64_T( EX_CPM_RAW_RESULT1_10050006           , ULL(0x10050006) );
-CONST_UINT64_T( EX_CPM_ENCODED_RESULT0_10050008       , ULL(0x10050008) );
-CONST_UINT64_T( EX_CPM_ENCODED_RESULT1_10050009       , ULL(0x10050009) );
-
-//------------------------------------------------------------------------------
-//      EX Security
-//------------------------------------------------------------------------------
-CONST_UINT64_T( EX_TRUSTED_BOOT_EN_0x10013C03         , ULL(0x10013C03) );
-
-//------------------------------------------------------------------------------
-//      EX PCB SLAVE
-//------------------------------------------------------------------------------
-//Generic names (need to add in (cuTarget.chipUnitNum * 0x01000000)) when being used
-// special wakeup registers
-CONST_UINT64_T( PM_SPECIAL_WKUP_FSP_0x100F010B         , ULL(0x100F010B) );
-CONST_UINT64_T( PM_SPECIAL_WKUP_OCC_0x100F010C         , ULL(0x100F010C) );
-CONST_UINT64_T( PM_SPECIAL_WKUP_PHYP_0x100F010D        , ULL(0x100F010D) );
-
-//Multicast Group Registers
-CONST_UINT64_T( EX_MCGR1_0x100F0001                   , ULL(0x100F0001) );
-CONST_UINT64_T( EX_MCGR2_0x100F0002                   , ULL(0x100F0002) );
-CONST_UINT64_T( EX_MCGR3_0x100F0003                   , ULL(0x100F0003) );
-CONST_UINT64_T( EX_MCGR4_0x100F0004                   , ULL(0x100F0004) );
-
-//GP3 Register
-CONST_UINT64_T( EX_GP3_0x100F0012                     , ULL(0x100F0012) );
-CONST_UINT64_T( EX_GP3_AND_0x100F0013                 , ULL(0x100F0013) );
-CONST_UINT64_T( EX_GP3_OR_0x100F0014                  , ULL(0x100F0014) );
-
-CONST_UINT64_T( EX_CLK_ADJ_SET_0x100F0016             , ULL(0x100F0016) );
-
-//Slave Configuration Register
-CONST_UINT64_T( EX_SLAVE_CONFIG_0x100F001E            , ULL(0x100F001E) );
-
-//Hang counter registers
-CONST_UINT64_T( EX_HANG_P0_0x100F0020                 , ULL(0x100F0020) );
-CONST_UINT64_T( EX_HANG_P1_0x100F0021                 , ULL(0x100F0021) );
-CONST_UINT64_T( EX_HANG_P2_0x100F0022                 , ULL(0x100F0022) );
-CONST_UINT64_T( EX_HANG_P3_0x100F0023                 , ULL(0x100F0023) );
-CONST_UINT64_T( EX_HANG_P4_0x100F0024                 , ULL(0x100F0024) );
-CONST_UINT64_T( EX_HANG_P5_0x100F0025                 , ULL(0x100F0025) );
-CONST_UINT64_T( EX_HANG_P6_0x100F0026                 , ULL(0x100F0026) );
-CONST_UINT64_T( EX_HANG_PRE_0x100F0028                , ULL(0x100F0028) );
-
-//PCB Error Capture
-CONST_UINT64_T( EX_PCBS_ATTN_REG_0x100F001A           , ULL(0x100F001A) );
-CONST_UINT64_T( EX_PCBS_RECOV_REG_0x100F001B          , ULL(0x100F001B) );
-CONST_UINT64_T( EX_PCBS_XSTOP_REG_0x100F001C          , ULL(0x100F001C) );
-CONST_UINT64_T( EX_PCBS_SLAVE_CONFIG_REG_0x100F001E   , ULL(0x100F001E) );
-CONST_UINT64_T( EX_PCBS_ERROR_REG_0x100F001F          , ULL(0x100F001F) );
-
-// Atomic Lock
-CONST_UINT64_T( EX_ATOMIC_LOCK_0x100F03FF             , ULL(0x100F03FF) );
-
-//Chiplet specific names (probably won't ever be used)
-CONST_UINT64_T( EX00_GP3_0x100F0012                   , ULL(0x100F0012) );
-CONST_UINT64_T( EX00_GP3_AND_0x100F0013               , ULL(0x100F0013) );
-CONST_UINT64_T( EX00_GP3_OR_0x100F0014                , ULL(0x100F0014) );
-
-CONST_UINT64_T( EX01_GP3_0x110F0012                   , ULL(0x110F0012) );
-CONST_UINT64_T( EX01_GP3_AND_0x110F0013               , ULL(0x110F0013) );
-CONST_UINT64_T( EX01_GP3_OR_0x110F0014                , ULL(0x110F0014) );
-
-CONST_UINT64_T( EX02_GP3_0x120F0012                   , ULL(0x120F0012) );
-CONST_UINT64_T( EX02_GP3_AND_0x120F0013               , ULL(0x120F0013) );
-CONST_UINT64_T( EX02_GP3_OR_0x120F0014                , ULL(0x120F0014) );
-
-CONST_UINT64_T( EX03_GP3_0x130F0012                   , ULL(0x130F0012) );
-CONST_UINT64_T( EX03_GP3_AND_0x130F0013               , ULL(0x130F0013) );
-CONST_UINT64_T( EX03_GP3_OR_0x130F0014                , ULL(0x130F0014) );
-
-CONST_UINT64_T( EX04_GP3_0x140F0012                   , ULL(0x140F0012) );
-CONST_UINT64_T( EX04_GP3_AND_0x140F0013               , ULL(0x140F0013) );
-CONST_UINT64_T( EX04_GP3_OR_0x140F0014                , ULL(0x140F0014) );
-
-CONST_UINT64_T( EX05_GP3_0x150F0012                   , ULL(0x150F0012) );
-CONST_UINT64_T( EX05_GP3_AND_0x150F0013               , ULL(0x150F0013) );
-CONST_UINT64_T( EX05_GP3_OR_0x150F0014                , ULL(0x150F0014) );
-
-CONST_UINT64_T( EX06_GP3_0x160F0012                   , ULL(0x160F0012) );
-CONST_UINT64_T( EX06_GP3_AND_0x160F0013               , ULL(0x160F0013) );
-CONST_UINT64_T( EX06_GP3_OR_0x160F0014                , ULL(0x160F0014) );
-
-CONST_UINT64_T( EX07_GP3_0x170F0012                   , ULL(0x170F0012) );
-CONST_UINT64_T( EX07_GP3_AND_0x170F0013               , ULL(0x170F0013) );
-CONST_UINT64_T( EX07_GP3_OR_0x170F0014                , ULL(0x170F0014) );
-
-CONST_UINT64_T( EX08_GP3_0x180F0012                   , ULL(0x180F0012) );
-CONST_UINT64_T( EX08_GP3_AND_0x180F0013               , ULL(0x180F0013) );
-CONST_UINT64_T( EX08_GP3_OR_0x180F0014                , ULL(0x180F0014) );
-
-CONST_UINT64_T( EX09_GP3_0x190F0012                   , ULL(0x190F0012) );
-CONST_UINT64_T( EX09_GP3_AND_0x190F0013               , ULL(0x190F0013) );
-CONST_UINT64_T( EX09_GP3_OR_0x190F0014                , ULL(0x190F0014) );
-
-CONST_UINT64_T( EX10_GP3_0x1A0F0012                   , ULL(0x1A0F0012) );
-CONST_UINT64_T( EX10_GP3_AND_0x1A0F0013               , ULL(0x1A0F0013) );
-CONST_UINT64_T( EX10_GP3_OR_0x1A0F0014                , ULL(0x1A0F0014) );
-
-CONST_UINT64_T( EX11_GP3_0x1B0F0012                   , ULL(0x1B0F0012) );
-CONST_UINT64_T( EX11_GP3_AND_0x1B0F0013               , ULL(0x1B0F0013) );
-CONST_UINT64_T( EX11_GP3_OR_0x1B0F0014                , ULL(0x1B0F0014) );
-
-CONST_UINT64_T( EX12_GP3_0x1C0F0012                   , ULL(0x1C0F0012) );
-CONST_UINT64_T( EX12_GP3_AND_0x1C0F0013               , ULL(0x1C0F0013) );
-CONST_UINT64_T( EX12_GP3_OR_0x1C0F0014                , ULL(0x1C0F0014) );
-
-CONST_UINT64_T( EX13_GP3_0x1D0F0012                   , ULL(0x1D0F0012) );
-CONST_UINT64_T( EX13_GP3_AND_0x1D0F0013               , ULL(0x1D0F0013) );
-CONST_UINT64_T( EX13_GP3_OR_0x1D0F0014                , ULL(0x1D0F0014) );
-
-CONST_UINT64_T( EX14_GP3_0x1E0F0012                   , ULL(0x1E0F0012) );
-CONST_UINT64_T( EX14_GP3_AND_0x1E0F0013               , ULL(0x1E0F0013) );
-CONST_UINT64_T( EX14_GP3_OR_0x1E0F0014                , ULL(0x1E0F0014) );
-
-CONST_UINT64_T( EX15_GP3_0x1F0F0012                   , ULL(0x1F0F0012) );
-CONST_UINT64_T( EX15_GP3_AND_0x1F0F0013               , ULL(0x1F0F0013) );
-CONST_UINT64_T( EX15_GP3_OR_0x1F0F0014                , ULL(0x1F0F0014) );
-
-//------------------------------------------------------------------------------
-//      EX PCB SLAVE PM
-//------------------------------------------------------------------------------
-//Generic names (need to add in (cuTarget.chipUnitNum * 0x01000000)) when being used
-
-//PMGP0 Register
-CONST_UINT64_T( EX_PMGP0_0x100F0100                   , ULL(0x100F0100) );
-CONST_UINT64_T( EX_PMGP0_AND_0x100F0101               , ULL(0x100F0101) );
-CONST_UINT64_T( EX_PMGP0_OR_0x100F0102                , ULL(0x100F0102) );
-//PMGP1 Register
-CONST_UINT64_T( EX_PMGP1_0x100F0103                   , ULL(0x100F0103) );
-CONST_UINT64_T( EX_PMGP1_AND_0x100F0104               , ULL(0x100F0104) );
-CONST_UINT64_T( EX_PMGP1_OR_0x100F0105                , ULL(0x100F0105) );
-
-CONST_UINT64_T( EX_PFET_CTL_REG_0x100F0106            , ULL(0x100F0106) );
-CONST_UINT64_T( EX_PFET_STAT_REG_0x100F0107           , ULL(0x100F0107) );
-CONST_UINT64_T( EX_PFET_CTL_REG_0x100F010E            , ULL(0x100F010E) );
-
-
-CONST_UINT64_T( EX_IDLEGOTO_0x100F0114                , ULL(0x100F0114) );
-CONST_UINT64_T( EX_FREQCNTL_0x100F0151                , ULL(0x100F0151) );
-CONST_UINT64_T( EX_PMGP1_REG_0_RWXx100F0103                                         , ULL(0x100F0103) );
-CONST_UINT64_T( EX_PMGP1_REG_0_WANDx100F0104                                        , ULL(0x100F0104) );
-CONST_UINT64_T( EX_PMGP1_REG_0_WORx100F0105                                         , ULL(0x100F0105) );
-CONST_UINT64_T( EX_PFVddCntlStat_REG_0x100F0106                                     , ULL(0x100F0106) );
-CONST_UINT64_T( EX_PFVcsCntlStat_REG_0x100F010E                                     , ULL(0x100F010E) );
-CONST_UINT64_T( EX_PMErr_REG_0x100F0109                                             , ULL(0x100F0109) );
-CONST_UINT64_T( EX_PMErrMask_REG_0x100F010A                                         , ULL(0x100F010A) );
-CONST_UINT64_T( EX_PMSpcWkupFSP_REG_0x100F010B                                      , ULL(0x100F010B) );
-CONST_UINT64_T( EX_PMSpcWkupOCC_REG_0x100F010C                                      , ULL(0x100F010C) );
-CONST_UINT64_T( EX_PMSpcWkupPHYP_REG_0x100F010D                                     , ULL(0x100F010D) );
-CONST_UINT64_T( EX_PMSTATEHISTPHYP_REG_0x100F0110                                   , ULL(0x100F0110) );
-CONST_UINT64_T( EX_PMSTATEHISTFSP_REG_0x100F0111                                    , ULL(0x100F0111) );
-CONST_UINT64_T( EX_PMSTATEHISTOCC_REG_0x100F0112                                    , ULL(0x100F0112) );
-CONST_UINT64_T( EX_PMSTATEHISTPERF_REG_0x100F0113                                   , ULL(0x100F0113) );
-CONST_UINT64_T( EX_IdleFSMGotoCmd_REG_0x100F0114                                    , ULL(0x100F0114) );
-CONST_UINT64_T( EX_CorePFPUDly_REG_0x100F012C                                       , ULL(0x100F012C) );
-CONST_UINT64_T( EX_CorePFPDDly_REG_0x100F012D                                       , ULL(0x100F012D) );
-CONST_UINT64_T( EX_CorePFVRET_REG_0x100F0130                                        , ULL(0x100F0130) );
-CONST_UINT64_T( EX_ECOPFPUDly_REG_0x100F014C                                        , ULL(0x100F014C) );
-CONST_UINT64_T( EX_ECOPFPDDly_REG_0x100F014D                                        , ULL(0x100F014D) );
-CONST_UINT64_T( EX_ECOPFVRET_REG_0x100F0150                                         , ULL(0x100F0150) );
-CONST_UINT64_T( EX_DPLL_CPM_PARM_REG_0x100F0152                                     , ULL(0x100F0152) );
-CONST_UINT64_T( EX_PCBS_POWER_MANAGEMENT_STATUS_REG_0x100F0153                      , ULL(0x100F0153) );   //ROX
-CONST_UINT64_T( EX_PCBS_iVRM_Control_Status_Reg_0x100F0154                          , ULL(0x100F0154) );
-CONST_UINT64_T( EX_PCBS_iVRM_Value_Setting_Reg_0x100F0155                           , ULL(0x100F0155) );
-CONST_UINT64_T( EX_PCBSPM_MODE_REG_0x100F0156                                       , ULL(0x100F0156) );
-CONST_UINT64_T( EX_PCBS_iVRM_PFETSTR_Sense_Reg_0x100F0157                           , ULL(0x100F0157) );
-CONST_UINT64_T( EX_PCBS_Power_Management_Idle_Control_Reg_0x100F0158                , ULL(0x100F0158) );
-CONST_UINT64_T( EX_PCBS_Power_Management_Control_Reg_0x100F0159                     , ULL(0x100F0159) );
-CONST_UINT64_T( EX_PCBS_PMC_VF_CTRL_REG_0x100F015A                                  , ULL(0x100F015A) );
-CONST_UINT64_T( EX_PCBS_UNDERVOLTING_REG_0x100F015B                                 , ULL(0x100F015B) );
-CONST_UINT64_T( EX_PCBS_Pstate_Index_Bound_Reg_0x100F015C                           , ULL(0x100F015C) );
-CONST_UINT64_T( EX_PCBS_Power_Management_Bounds_Reg_0x100F015D                      , ULL(0x100F015D) );
-CONST_UINT64_T( EX_PCBS_PSTATE_TABLE_CTRL_REG_0x100F015E                            , ULL(0x100F015E) );
-CONST_UINT64_T( EX_PCBS_PSTATE_TABLE_REG_0x100F015F                                 , ULL(0x100F015F) );
-CONST_UINT64_T( EX_PCBS_Pstate_Step_Target_Register_0x100F0160                      , ULL(0x100F0160) );
-CONST_UINT64_T( EX_PCBS_iVRM_VID_Control_Reg0_0x100F0162                            , ULL(0x100F0162) );
-CONST_UINT64_T( EX_PCBS_DPLL_STATUS_REG_100F0161                                    , ULL(0x100F0161) );
-CONST_UINT64_T( EX_PCBS_iVRM_VID_Control_Reg1_0x100F0163                            , ULL(0x100F0163) );
-CONST_UINT64_T( EX_PCBS_OCC_Heartbeat_Reg_0x100F0164                                , ULL(0x100F0164) );
-CONST_UINT64_T( EX_PCBS_Resonant_Clock_Control_Reg0_0x100F0165                      , ULL(0x100F0165) );
-CONST_UINT64_T( EX_PCBS_Resonant_Clock_Control_Reg1_0x100F0166                      , ULL(0x100F0166) );
-CONST_UINT64_T( EX_PCBS_Resonant_Clock_Status_Reg_0x100F0167                        , ULL(0x100F0167) );
-CONST_UINT64_T( EX_PCBS_Local_Pstate_Frequency_Target_Control_Register_0x100F0168   , ULL(0x100F0168) );
-CONST_UINT64_T( EX_PCBS_FSM_MONITOR1_REG_0x100F0170                                 , ULL(0x100F0170) );
-CONST_UINT64_T( EX_PCBS_FSM_MONITOR2_REG_0x100F0171                                 , ULL(0x100F0171) );
-
-//------------------------------------------------------------------------------
-//      MULTICAST REGISTER DEFINITION
-//------------------------------------------------------------------------------
-CONST_UINT64_T( EX_WRITE_ALL_EX_PMGP1_REG_0_RWx690F0103                             , ULL(0x690F0103) );       // PM GP1 Multicast Group1
-CONST_UINT64_T( EX_WRITE_ALL_EX_PMGP1_REG_0_WANDx690F0104                           , ULL(0x690F0104) );       // PM GP1 Multicast Group1
-CONST_UINT64_T( EX_WRITE_ALL_EX_PMGP1_REG_0_WORx690F0105                            , ULL(0x690F0105) );       // PM GP1 Multicast Group1
-CONST_UINT64_T( EX_WRITE_ALL_PCBSPM_MODE_REG_0x690F0156                             , ULL(0x690F0156) );       // PCBSLV Mode Multicast Group1
-CONST_UINT64_T( EX_WRITE_ALL_PCBS_Power_Management_Bounds_Reg_0x690F015D            , ULL(0x690F015D) );       // PCBSLV PM Bounds Multicast Group1
-
-CONST_UINT64_T( EX_PARTIAL_GOOD_0x520F0012            , ULL(0x520F0012) );       // EX GP3 bit 0s
-
-
-//******************************************************************************/
-//*********  ADDRESS PREFIXES FOR SUBROUTINE SCAN0_MODULE CALLS ****************/
-//******************************************************************************/
-CONST_UINT8_T( SCAN_CHIPLET_XBUS,                   ULL(0x04) );
-CONST_UINT8_T( SCAN_CHIPLET_ABUS,                   ULL(0x08) );
-CONST_UINT8_T( SCAN_CHIPLET_PCIE,                   ULL(0x09) );
-
-//******************************************************************************/
-//*********  MULTICAST REGISTER DEFINITIONS FOR PERVASIVE INITs ****************/
-//******************************************************************************/
-
-CONST_UINT64_T( WRITE_ALL_HPRE0_0x690F0020            , ULL(0x690F0020) );       // hang pulse register 0
-CONST_UINT64_T( WRITE_ALL_HPRE1_0x690F0021            , ULL(0x690F0021) );       // hang pulse register 1
-CONST_UINT64_T( WRITE_ALL_HPRE2_0x690F0022            , ULL(0x690F0022) );       // hang pulse register 2
-CONST_UINT64_T( WRITE_ALL_HPRE3_0x690F0023            , ULL(0x690F0023) );       // hang pulse register 3
-CONST_UINT64_T( WRITE_ALL_HPRE4_0x690F0024            , ULL(0x690F0024) );       // hang pulse register 4
-CONST_UINT64_T( WRITE_ALL_HPRE5_0x690F0025            , ULL(0x690F0025) );       // hang pulse register 5
-CONST_UINT64_T( WRITE_ALL_HPRE6_0x690F0026            , ULL(0x690F0026) );       // hang pulse register 6
-CONST_UINT64_T( WRITE_ALL_HPCRE_0x690F0028            , ULL(0x690F0028) );       // hang pulse count register
-
-CONST_UINT64_T( READ_GLOBAL_SPATT_FIR_0x570F001A      , ULL(0x570F001A) );       // Bitwise read
-CONST_UINT64_T( READ_GLOBAL_XSTOP_FIR_0x570F001B      , ULL(0x570F001B) );       // Bitwise read
-CONST_UINT64_T( READ_GLOBAL_RECOV_FIR_0x570F001C      , ULL(0x570F001C) );       // Bitwise read
-
-CONST_UINT64_T( WRITE_EX_PMGP0_AND_0x690F0101         , ULL(0x690F0101) );       // PM G0 initialization
-
-
-
-// other multicast constants were moved to common_scom_addresses.H       1/24/2010   mfred
-
-#endif
-
-
-/*
-*************** Do not edit this area ***************
-This section is automatically updated by CVS when you check in this file.
-Be sure to create CVS comments when you commit so that they can be included here.
-
-$Log: p8_scom_addresses.H,v $
-Revision 1.199  2015/09/16 19:33:47  jmcgill
-add I2CM registers for SBE FFDC collection
-
-Revision 1.198  2015/08/04 22:06:23  baiocchi
-Updating Support for starting the SBEs without a FSP
-
-Revision 1.197  2015/06/29 01:43:56  jmcgill
-add definition for PCIE NEST FIR Action2 Registers (Naples only)
-
-Revision 1.196  2015/05/19 19:19:40  jmcgill
-add OCC core external interrupt register
-
-Revision 1.195  2015/05/01 17:40:55  belldi
-
-- Added constant: CONST_UINT64_T( CAPP_APC_MASTER_CAPI_CTL_0x02013019   , ULL(0x02013019) );
-
-Revision 1.194  2015/03/17 18:55:38  jmcgill
-add NPU FIR register constants
-
-Revision 1.193  2015/02/02 18:57:13  jmcgill
-add 2nd CAPP unit memory BAR/NPU MMIO BAR address definitions
-
-Revision 1.192  2015/01/26 15:07:09  jmcgill
-add NPU SCOM addresses
-
-Revision 1.191  2014/12/18 20:44:35  jmcgill
-add NPU/NVlink SCOM address definitions
-
-Revision 1.190  2014/12/18 16:10:45  jmcgill
-add entry for CAPP snoop config registers
-
-Revision 1.189  2014/11/20 17:56:55  jmcgill
-add definition for I2C_SLAVE_CONFIG register
-
-Revision 1.188  2014/11/18 17:30:54  jmcgill
-added definitions for PCIe PHB3/IOP2 & CAPP SCOM addresses referenced by Naples HWP updates
-
-Revision 1.187  2014/09/30 13:59:57  gweber
-added A_TRA1 support for Naples
-
-Revision 1.186  2014/09/17 13:58:45  jmcgill
-add EX clk adjust register definition (SW278630)
-
-Revision 1.185  2014/09/01 20:16:49  jmcgill
-add support for CAPI directory dump
-
-Revision 1.184  2014/07/15 21:12:03  jmcgill
-add PC_NE error report hold register definitions for FFDC collection (SW261816)
-
-Revision 1.183  2014/06/08 19:49:24  jmcgill
-add XBUS skew adjust data register definition
-
-Revision 1.182  2014/04/24 23:14:55  cmolsen
-Added four PIRR reg defs.
-
-Revision 1.181  2014/04/22 03:47:27  jmcgill
-reset HCA logic for MPIPL (SW257953)
-
-Revision 1.180  2014/04/12 03:14:16  cmolsen
-Added two SPURR regs.
-
-Revision 1.179  2014/03/27 03:43:43  jmcgill
-updates for proc_mpipl_clear_xstop (SW252842)
-
-Revision 1.178  2014/03/12 18:55:47  jmcgill
-add IO SCOM_MODE_PB register constant definitions (DMI/XBUS/ABUS)
-
-Revision 1.177  2014/03/05 00:13:59  belldi
-
-Added following CAPP Error Reporting and Handling regs. FFDC is collected from them in proc_suspend_io.
-NX_CAPP_FIR_MASK_0x02013003
-NX_CAPP_FIR_ACTION0_0x02013006
-NX_CAPP_FIR_ACTION1_0x02013007
-NX_CAPP_SNOOP_ERR_REPORT_0x0201300A
-NX_CAPP_APC_MASTER_ERR_REPORT_0x0201300B
-NX_CAPP_TRANSPORT_ERR_HOLD_0x0201300C
-NX_CAPP_TLBI_ERR_HOLD_0x0201300D
-NX_CAPP_ERR_STAT_CTRL_0x0201300E
-NX_CAPP_FLUSH_SUE_STATE_MAP_0x0201300F
-NX_CAPP_ERR_INJECT_0x02013010
-NX_CAPP_EPOCH_RECOV_TIMERS_CTRL_0x0201302C
-NX_CAPP_FLUSH_SUE_UOP1_0x02013803
-NX_CAPP_FLUSH_SUE_UOP2_0x02013804
-
-Revision 1.176  2014/03/03 23:41:45  stillgs
-Add PMC Error Mask to OCC per RAS review; Add JTAG Accelerator regs
-
-Revision 1.175  2014/03/03 15:52:06  cmolsen
-Added IMA_EVENT_MASK_0x100132CF
-
-Revision 1.174  2014/03/03 00:04:13  cmolsen
-Added CHTM_IMA_PDBAR_REG_0x1001100B
-
-Revision 1.173  2014/02/10 14:36:30  jmcgill
-add NX addresses for debug bus/NXD trace collection
-
-Revision 1.172  2014/01/30 16:19:24  mfred
-Add some clock control regs for FFDC.
-
-Revision 1.171  2014/01/20 22:17:37  jdavidso
-Added additional pmc registers for SW239845.
-
-Revision 1.170  2013/11/13 21:21:53  bellows
-updates for running centaur throttling sync support
-
-Revision 1.169  2013/11/05 20:29:39  bellows
-Added MCS_MCIARCSYN register
-
-Revision 1.168  2013/10/31 15:36:58  jmcgill
-add address for CAPP APC Master LCO Target register
-
-Revision 1.167  2013/10/21 12:39:19  stillgs
-
-- Add base FIR registers for reading during MPIPL clear xstop processing
-- Add bitwise multicast read addresses for xstop, recoverable and special attention.
-  Xstop and Recoverable reads used for MPIPL clear xstop
-
-Revision 1.166  2013/10/17 13:41:10  jmcgill
-correct PB PMU register definitions
-
-Revision 1.165  2013/10/15 16:10:39  jeshua
-Added PCBMS_RESET_REG_0x000F001D
-
-Revision 1.164  2013/10/07 14:17:57  jeshua
-Added some L3 registers and ECID (OTPROM) registers
-
-Revision 1.163  2013/10/04 15:50:56  jmcgill
-add TCTL special attention status registers
-
-Revision 1.162  2013/10/03 14:56:38  stillgs
-
-Added EX PCB Slave error capture registers
-
-Revision 1.161  2013/08/21 15:11:23  gweber
-added CFAM_OSCSW_SENSE1,2
-
-Revision 1.160  2013/08/08 02:48:33  stillgs
-
-Add NCU and CHTM mode registers
-
-Revision 1.159  2013/06/28 16:50:17  stillgs
-
-Adde PBAX Push Control/Status 1 registers for pba_init -reset
-
-Revision 1.158  2013/06/21 18:23:33  jeshua
-Added EX_PARTIAL_GOOD_0x520F0012 for FFDC
-
-Revision 1.157  2013/06/21 15:17:24  jmcgill
-support HCA EN/EH BAR and Range registers
-
-Revision 1.156  2013/06/20 16:10:16  campisan
-Added SCOM addresses for CPM calibration code not previously defined.
-
-Revision 1.155  2013/06/13 13:22:10  jmcgill
-add HCA BAR and Range registers
-
-Revision 1.154  2013/06/05 21:06:58  stillgs
-
-Add PMC Rail Bounds, Global Pstate Bounds and PCBS FSM monitor1 registers
-
-Revision 1.153  2013/05/31 18:02:44  jmcgill
-add LPC addresses
-
-Revision 1.152  2013/05/30 13:13:45  jmcgill
-add MCSMODE0 register
-
-Revision 1.151  2013/05/23 19:49:59  jmcgill
-add PSI addresses, fix PB X bus FIR constant names per FW review
-
-Revision 1.150  2013/05/15 04:22:35  jmcgill
-add PB X/A, PCI IOP PLL FIR register addresses
-
-Revision 1.149  2013/05/09 04:05:36  jmcgill
-add AS MMIO BAR
-
-Revision 1.148  2013/04/28 02:30:41  jmcgill
-add MCD recovery config register definitions
-
-Revision 1.147  2013/04/23 16:30:27  jimyac
-added additional OCC interrupt registers
-
-Revision 1.146  2013/04/17 16:16:32  jimyac
-added OCC registers - OUDER0/1 & OTR0/1
-
-Revision 1.145  2013/04/16 22:15:34  jeshua
-Moved in cfam addresses from common file
-Added in write protect cfam address
-Renamed PIBMEM_REPAIR_LOAD_0x00088007 to PIBMEM_REPAIR_0x00088007
-
-Revision 1.144  2013/04/15 19:28:23  jmcgill
-add MCD FIR entries
-
-Revision 1.143  2013/04/08 14:56:05  jmcgill
-add PCIE ETU reset registers
-
-Revision 1.142  2013/03/26 12:17:16  stillgs
-
-Added EX DTS/Therm registers
-
-Revision 1.141  2013/03/26 11:45:14  pchatnah
-adding some more registers from prep_for_reset
-
-Revision 1.140  2013/03/21 13:50:57  pchatnah
-ading checkstop register
-
-Revision 1.139  2013/03/17 22:07:53  jmcgill
-add L3 BAR registers
-
-Revision 1.138  2013/03/07 17:21:18  jmcgill
-add ADU hang divider register
-
-Revision 1.137  2013/03/07 06:29:23  pchatnah
-adding intchip address
-
-Revision 1.136  2013/03/04 02:51:38  jmcgill
-fix PB RAS/EXTFIR addresses, add ADU secure iovalid register
-
-Revision 1.135  2013/03/01 03:05:38  pchatnah
-adding device_id register
-
-Revision 1.134  2013/02/20 19:04:32  cmolsen
-Added L2/L3 Epsilon registers.
-
-Revision 1.133  2013/02/05 14:33:50  koenig
-Added XBus skew adjust register - AK
-
-Revision 1.132  2013/01/23 15:46:10  pchatnah
-fixing address mistakes
-
-Revision 1.130  2013/01/17 11:39:08  pchatnah
-updating the pmc_init registers
-
-Revision 1.129  2013/01/10 01:17:27  stillgs
-Fix ID line typo
-
-Revision 1.128  2013/01/09 22:04:52  stillgs
-Fix PMC_FSMSTATE_STATU_REG name with correct value to match the address
-
-Revision 1.127  2013/01/09 16:21:54  stillgs
-Fix PMC_DEEPEXIT_MASK_WOR name typo --- make name match the actual address
-
-Revision 1.126  2012/12/20 18:55:31  stillgs
-Added PC POW STATUS regs
-
-Revision 1.125  2012/12/12 04:55:22  stillgs
-Added EX PCBS Slave Configuration register
-
-Revision 1.124  2012/12/07 21:32:13  stillgs
-Fix ECO PFET Delay register name problem
-
-Revision 1.123  2012/12/03 22:28:51  baysah
-Added mcs mode4 register.
-
-Revision 1.122  2012/11/30 03:39:35  klhillp8
-Added the FIR_AND register addresses for mpipl_clear_xstop.
-
-Revision 1.121  2012/11/26 03:16:48  stillgs
-Add PMC LFIR and other addresses needed for SLW recovery
-
-Revision 1.120  2012/11/17 19:52:43  jmcgill
-add trace status registers, chiplet scan constants
-
-Revision 1.119  2012/11/16 11:14:43  koenig
-Corrected ABUS and PCI chiplet offsets - AK
-
-Revision 1.118  2012/11/16 04:05:59  jmcgill
-remove FSI2PIB addresses already in common address file
-
-Revision 1.117  2012/11/12 18:46:14  jmcgill
-updates for FSI2IB cfam registers, MCS SCOM registers
-
-Revision 1.116  2012/11/06 20:22:39  klhillp8
-Kevin Hill - Updated FIR OR and AND addresses for L2_FIR, L3_FIR, and NCU_FIR
-
-Revision 1.115  2012/11/05 01:39:53  jmcgill
-add entries needed for proc_pcie_scominit and proc_pcie_config procedures
-
-Revision 1.114  2012/10/25 21:52:47  bgass
-Added EX trusted boot scom.
-
-Revision 1.113  2012/10/25 11:55:05  koenig
-Added some hangcounter register - AK
-
-Revision 1.112  2012/10/15 16:37:47  jklazyns
- - Added TP chiplet PCB slave hang pulse registers
-
-Revision 1.111  2012/10/15 04:18:10  stillgs
-Added L3 HA Dirty Address Write Pointer reg for SLW save/restore
-
-Revision 1.110  2012/10/15 01:17:12  jklazyns
- - Added TOD registers
- - Added SPRD registers for each LPAR (pg 105 of PC Workbook)
-
-Revision 1.109  2012/10/12 03:27:42  baysah
-Added MCI FIR mask register.
-
-Revision 1.108  2012/10/11 13:44:27  jimyac
-removed channel3 OCI register addresses - they were removed in the logic a while ago
-
-Revision 1.107  2012/10/10 01:39:17  jmcgill
-add EX chiplet FIR register SCOM addresses
-
-Revision 1.106  2012/10/04 22:44:00  szhong
-commented out WRITE_EX_GP3_AND_0x690F0013 WRITE_EX_GP3_OR_0x690F0014 WRITE_EX_PMGP0_OR_0x690F0102 due to duplicated definition
-
-added OTP rom related scom addresses
-
-Revision 1.105  2012/09/26 17:53:25  jklazyns
-
-Added EX_L3_PRD_PURGE_REG to support L3 purge procedure
-
-Revision 1.104  2012/09/26 15:11:07  jklazyns
-
-Added addresses for Core FIR, Mask, Action, and WOF
-
-Revision 1.103  2012/09/24 03:06:59  jmcgill
-add security switch register, PSI notrust BARs
-
-Revision 1.102  2012/09/21 10:54:18  stillgs
-Clean up old PMC entries
-
-Revision 1.101  2012/09/20 10:43:03  rmaier
-Added TOD_FSM_REG_00040024
-
-Revision 1.100  2012/09/15 21:26:14  jmcgill
-add cfam addresses for mailbox scratch registers
-
-Revision 1.99  2012/09/13 20:27:35  mfred
-Added some multicast group 1 addresses to the file.
-
-Revision 1.98  2012/09/13 19:54:41  mfred
-Move group 1 (ex chiplet) multicast group definitions to this file.
-
-Revision 1.97  2012/09/12 17:19:36  jmcgill
-add LPC SCOM registers
-
-Revision 1.96  2012/09/11 14:20:23  szhong
-added: SBE VITAL REG
-       I2C MASTER (MODE)
-       PORE_ECCB CONTROL REG
-       PORE_ECCB STATUS REG
-       PORE_ECCB DATA REG
-
-Revision 1.95  2012/09/04 15:40:09  jimyac
-added OCC LFIR registers
-
-Revision 1.94  2012/08/28 07:56:27  pchatnah
-updating
-
-Revision 1.93  2012/08/26 01:54:37  jmcgill
-add EX hang pulse register definitions
-
-Revision 1.92  2012/08/21 03:30:37  jmcgill
-add A/F link framer config registers
-
-Revision 1.91  2012/08/20 19:25:19  jmcgill
-add entry from ADU TBROM BAR
-
-Revision 1.90  2012/08/15 15:03:12  jmcgill
-add PB A/F link trace register addresses
-
-Revision 1.89  2012/08/11 22:21:04  jmcgill
-add addresses for proc_build_smp procedure
-
-Revision 1.88  2012/08/08 14:25:13  kgungl
-pbax updates
-
-Revision 1.87  2012/08/08 13:18:30  stillgs
-Added PMC monitoring registers
-
-Revision 1.86  2012/08/08 11:32:16  pchatnah
-updating register address for vsafe mode
-
-Revision 1.85  2012/08/06 18:35:34  karm
-added EX_SYNC_CONFIG
-
-Revision 1.84  2012/07/30 15:34:53  bellows
-Updates for set up bars
-
-Revision 1.83  2012/07/23 14:42:39  jmcgill
-add addresses needed proc_psi_init
-
-Revision 1.82  2012/06/27 07:43:32  rkoester
-add remaining PLLLOCK register
-
-Revision 1.80  2012/06/20 14:49:32  rkoester
-add plllock register
-
-Revision 1.79  2012/06/17 20:26:00  jmcgill
-update trace SCOM addresses
-
-Revision 1.78  2012/06/17 19:00:37  jmcgill
-add core direct debug control register
-
-Revision 1.77  2012/06/09 19:24:39  jmcgill
-add ADU BAR registers
-
-Revision 1.76  2012/06/05 06:03:04  jmcgill
-add ADU XSCOM BAR register
-
-Revision 1.75  2012/06/01 02:45:26  jmcgill
-updates for MCS registers
-
-Revision 1.74  2012/05/30 12:28:52  kgungl
-issues resolved: scom addresses for pba
-
-Revision 1.73  2012/05/23 16:31:18  karm
-added EX core RAS_MODE
-
-Revision 1.72  2012/05/23 11:04:28  pchatnah
-updating pss spivid spwkup registers
-
-Revision 1.71  2012/05/18 17:59:24  jmcgill
-add addresses for proc_setup_bars
-
-Revision 1.70  2012/05/11 21:15:05  jeshua
-Added EX_PCBS_FSM_MONITOR2_REG
-
-Revision 1.69  2012/05/08 13:31:46  karm
-changes to RAM registers in EX PC unit
-
-Revision 1.68  2012/05/08 11:55:20  stillgs
-Added some additional PCBS-PM addresses
-
-Revision 1.67  2012/05/03 21:36:59  karm
-added core thread_active
-
-Revision 1.66  2012/05/02 21:37:42  jeshua
-Added ECID_PART_0 and ECID_PART_1
-
-Revision 1.65  2012/05/01 14:30:39  stillgs
-Add additional OHA registers
-
-Revision 1.64  2012/04/27 14:48:20  rmaier
-Added RESCLK_status_reg
-
-Revision 1.63  2012/04/26 22:47:18  karm
-added EX_PERV registers for ram and thread ctrl
-
-Revision 1.62  2012/04/16 23:55:37  bcbrock
-Corrected problems related to C/C++ and 32-bit/64-bit portability and Host
-Boot after initial review by FW team.
-
-o Renamed fapi_sbe_common.h to fapi_sbe_common.H
-o Renamed p8_scan_compression.[ch] to .[CH] since these are for use by C++
-  procedures only (no requirement to execute on OCC).
-o Modified sbe_xip_image.c to use the C99 standard way to print uint64_t
-  variables.
-o Added __cplusplus guards to sbe_xip_image.h
-
-Revision 1.61  2012/04/09 22:35:14  jeshua
-Added L2 FIR and CERR registers
-
-Revision 1.60  2012/03/21 08:15:53  rmaier
-Added OHA_ARCH_IDLE_STATE_REG
-
-Revision 1.59  2012/03/14 11:50:03  stillgs
-Added PMC O2S and SPIVID control regs for use by proc_pmc_init.C and proc_sbe_set_pvid.S
-
-Revision 1.58  2012/03/02 21:41:45  jimyac
-added additional OCB Indirect Channel 0-3 Registers
-
-Revision 1.57  2012/03/01 16:09:20  rmaier
-Added PCBS/OHA constants
-
-Revision 1.56  2012/02/29 22:57:24  bcbrock
-Added PIBMEM control registers to p8_scom_addresses.H
-
-Revision 1.55  2012/02/10 23:09:52  jmcgill
-add trace array addresses
-
-Revision 1.54  2012/01/30 16:08:40  jimyac
-added OCC SRAM Boot Vector0-3 registers
-
-Revision 1.53  2012/01/30 15:59:43  jimyac
-added ocb channel0-3 push & pull register and fixed typo in ocb addressed where address in variable name did not match actual address value
-
-Revision 1.52  2012/01/24 21:59:42  mfred
-Moved common multicast address constants to common_scom_accresses.H
-
-Revision 1.51  2012/01/18 12:55:03  koenig
-Added PBA clock sync reg
-
-Revision 1.50  2012/01/06 22:20:53  jmcgill
-move shared/common addresses to common_scom_addresses.H, general cleanup
-
-Revision 1.49  2012/01/05 22:07:47  jeshua
-Updated ring numbers for most chiplets
-
-Revision 1.48  2012/01/05 21:38:17  jmcgill
-adjust EX SCOM ring comments, pervasive thread control/status register addresses
-
-Revision 1.47  2012/01/05 20:18:16  jmcgill
-adjust L2 SCOM addresses
-
-Revision 1.46  2011/12/15 17:49:30  bcbrock
-Added the PIBMEM base address to p8_scom_addresses.H
-
-Revision 1.45  2011/11/07 23:52:21  bcbrock
-Added GENERIC_CLK_SCANDATA0_0x00038000
-
-Revision 1.44  2011/11/07 05:49:06  jmcgill
-update PBA trusted SCOM ring and PB X mode register addresses, add GP0 and/or addresses for A bus chiplet
-
-Revision 1.43  2011/09/28 12:49:47  stillgs
-Added some PCBS-PM addresses for early PM FAPI work
-
-Revision 1.42  2011/09/16 16:01:34  jeshua
-Added MBOX_SBEVITAL
-
-Revision 1.41  2011/09/16 16:00:26  jeshua
-Undo Ralph's X-bus change. The X-bus is now chiplet 4, not chiplet 3.
-
-Revision 1.40  2011/09/16 10:28:56  rkoester
-wrong X-BUS addresses corrected, changed from 0b04 to 0b03
-
-Revision 1.39  2011/09/09 21:00:33  jeshua
-X_BUS is now chiplet 4 (as of 051 chip)
-
-Revision 1.37  2011/09/02 18:45:46  dan
-Added scan_time_rep
-
-Revision 1.36  2011/09/01 20:37:17  jmcgill
-add PBA config register, shift L2 scom addresses for HW170113, fix L3 Mode Reg0 address
-
-Revision 1.35  2011/08/30 22:07:37  jeshua
-Added NEST_GP0_AND
-
-Revision 1.34  2011/08/29 21:11:31  jmcgill
-add generic PM GP0 OR constant
-
-Revision 1.33  2011/08/26 15:51:38  jeshua
-Added chiplet defines for multicast operations
-
-Revision 1.32  2011/08/26 12:53:27  gweber
-added constant SCAN_ALLSCANEXPRV_IMM
-
-Revision 1.31  2011/08/11 20:56:24  dan
-removed redundant GENERIC_PMGP0_AND_0x000F0101.
-added WRITE_ALL_GP0_AND_0x6B000004, WRITE_ALL_GP0_OR_0x6B000005
-
-Revision 1.30  2011/07/28 16:36:30  jmcgill
-add comment regarding L2 SCOM addresses which need to be adjusted when model fixes arrive (HW170113)
-
-Revision 1.29  2011/07/27 12:28:55  dan
-Added scan0 defines.
-
-Revision 1.28  2011/07/25 22:31:03  venton
-Added back in global addresses still used in SBe procs from version 1.24
-
-Revision 1.27  2011/07/25 20:52:58  jmcgill
-temporary workaround for L2 Purge Register SCOM access
-
-Revision 1.26  2011/07/25 17:30:35  dan
-Added some generic registers.
-
-Revision 1.25  2011/07/25 13:05:09  gweber
-moved centaur constants to cen_scom_addresses.H
-
-Revision 1.23  2011/07/20 15:32:10  gweber
-added some centaur constants
-
-Revision 1.22  2011/07/15 20:50:13  jeshua
-Added chiplet and some generic addresses
-
-Revision 1.21  2011/07/15 20:24:14  jeshua
-TP_GP3_0x01000003 should be TP_GP4_0x01000003
-
-Revision 1.20  2011/07/08 19:49:01  jeshua
-Moved some addresses to their appropriate sections
-Fixes some addresses that didn't match their name
-Added EX08-15 generics
-Removed some non-generic EX01 addresses
-
-Revision 1.19  2011/07/07 21:36:11  rkoester
-more addresses added
-
-Revision 1.18  2011/07/07 16:27:49  karm
-added chiplet_core_pervasive registers for start and status, added chiplet id
-
-Revision 1.17  2011/07/07 12:24:49  rkoester
-addresses added
-
-Revision 1.16  2011/07/06 20:03:46  jmcgill
-updates to handle TP design modifications which changed SCOM access method for subset of PBA facilities
-
-Revision 1.15  2011/07/06 15:01:36  bcbrock
-Fix header file name
-
-Revision 1.14  2011/07/06 04:06:49  bcbrock
-Added a common header for FAPI/SBE #defines, fapi_sbe_common.h
-
-Revision 1.13  2011/07/01 15:13:16  rkoester
-addresses added for mailbox register
-
-Revision 1.12  2011/06/30 09:50:28  rkoester
-private version of .H file released back to LIB, MBOX addresses added
-
-Revision 1.11  2011/06/15 22:46:26  jeshua
-Added Mailbox registers
-
-Revision 1.10  2011/06/14 15:55:46  rkoester
-move SCOM addresses from porinit.C to p8_scom_addresses.H
-
-Revision 1.9  2011/06/14 04:57:04  bcbrock
-Latest version of PGAS and PORE inline tools; Added PORE SCOM addresses
-
-Revision 1.8  2011/06/07 21:26:49  jeshua
-Updated OCB names to have the correct addresses
-
-Revision 1.7  2011/06/02 14:28:26  jmcgill
-add PB EH scom addresses, L3 mode register1 address
-
-Revision 1.6  2011/05/31 22:09:47  jeshua
-Updated the ULL macro, because the previous one didn't work with the assembler
-
-Revision 1.5  2011/05/27 21:49:13  jeshua
-Switch to constants instead of #defines
-Added in a macro to allow PORE assembler to use this header as well
-
-Revision 1.4  2011/05/24 19:01:58  jmcgill
-add addresses from OCC/OCB/PBA
-
-Revision 1.3  2011/04/21 19:48:23  jeshua
-Added L2 and L3 Mode Reg 0
-
-Revision 1.2  2011/04/06 18:27:01  jmcgill
-fixup ADU Control Register name, add ADU PMISC Mode Register address
-
-Revision 1.1  2011/02/23 17:09:44  jeshua
-Initial version
-
-
-
-*/
diff --git a/src/usr/hwpf/hwp/include/pgp_common.h b/src/usr/hwpf/hwp/include/pgp_common.h
deleted file mode 100644
index 5754758bb..000000000
--- a/src/usr/hwpf/hwp/include/pgp_common.h
+++ /dev/null
@@ -1,665 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/include/pgp_common.h $                       */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: pgp_common.h,v 1.2 2012/08/13 16:11:58 stillgs Exp $
-
-#ifndef __PGP_COMMON_H__
-#define __PGP_COMMON_H__
-
-/// \file pgp_common.h
-/// \brief Common header for SSX and PMX versions of PgP
-///
-/// This header is maintained as part of the SSX port for PgP, but needs to be
-/// physically present in the PMX area to allow dropping PMX code as a whole
-/// to other teams.
-
-// -*- WARNING: This file is maintained as part of SSX.  Do not edit in -*-
-// -*- the PMX area as your edits will be lost.                         -*-
-
-#ifndef __ASSEMBLER__
-#include <stdint.h>
-#endif
-
-////////////////////////////////////////////////////////////////////////////
-// Configuration
-////////////////////////////////////////////////////////////////////////////
-
-#define PGP_NCORES  16
-#define PGP_NMCS     8
-#define PGP_NCENTAUR 8
-#define PGP_NTHREADS 8
-
-////////////////////////////////////////////////////////////////////////////
-// Clocking
-////////////////////////////////////////////////////////////////////////////
-
-/// PgP nest runs at 2.4 GHz
-///
-/// \todo This drives the pervasive domain clocking, and there is some idea to
-/// make this frequency variable.  If so then this will be a system-specific
-/// constant.  Thus it's a good idea to keep as much timing information as
-/// possible relative to the nest frequency.
-///
-/// \bug This constant needs to be read and handled as an attribute
-#define NEST_FREQUENCY_KHZ 2400000
-
-/// Pervasive clock is nest / 4
-#define PERVASIVE_FREQUENCY_HZ (NEST_FREQUENCY_KHZ * 250)
-
-/// PgP/OCC uses the pervasive frequency directly to drive PPC405 timers
-#define SSX_TIMEBASE_FREQUENCY_HZ PERVASIVE_FREQUENCY_HZ
-
-/// The pervasive hang timer divider used for the OCB
-#define OCB_TIMER_DIVIDER 512
-
-/// The OCB timer frequency
-///
-/// The frequency is based on a pervasive hang timer that is formed by
-/// dividing the nominal 600 MHz pervasive clock by 512 to yield a 1.1719 MHz
-/// clock (853ns period).  This is a dynamic configuration option, but is
-/// assumed to be initialized as the given frequency.  If not, then firmware
-/// will have to do some SCOMs to figure out what the real divider and
-/// frequency are.
-#define OCB_TIMER_FREQUENCY_HZ (PERVASIVE_FREQUENCY_HZ / OCB_TIMER_DIVIDER)
-
-
-/// The pervasive hang timer divider used for the PMC
-#define PMC_HANG_PULSE_DIVIDER (32 * 1024)
-
-/// The PMC Hang Pulse Frequency
-///
-/// The frequency is based on a pervasive hang timer that is formed by
-/// dividing the nominal 600 MHz pervasive clock by 32K to yield a 18.3 KHz
-/// clock (54.6us period).  This is a dynamic configuration option, but is
-/// assumed to be initialized as the given frequency.  If not, then firmware
-/// will have to do some SCOMs to figure out what the real divider and
-/// frequency are.
-#define PMC_HANG_PULSE_FREQUENCY_HZ \
-    (PERVASIVE_FREQUENCY_HZ / PMC_HANG_PULSE_DIVIDER)
-
-
-////////////////////////////////////////////////////////////////////////////
-// OCI
-////////////////////////////////////////////////////////////////////////////
-
-// OCI Master Id assigments - required for PBA slave programming.  These Ids
-// also appear as bits 12:15 of the OCI register space addresses of the OCI
-// registers for each device that contains OCI-addressable registers (GPE,
-// PMC, PBA, SLW and OCB).
-
-#define OCI_MASTER_ID_PORE_GPE 0
-#define OCI_MASTER_ID_PMC      1
-#define OCI_MASTER_ID_PBA      2
-#define OCI_MASTER_ID_UNUSED   3
-#define OCI_MASTER_ID_PORE_SLW 4
-#define OCI_MASTER_ID_OCB      5
-#define OCI_MASTER_ID_OCC_ICU  6
-#define OCI_MASTER_ID_OCC_DCU  7
-
-
-////////////////////////////////////////////////////////////////////////////
-// IRQ
-////////////////////////////////////////////////////////////////////////////
-
-// The OCB interrupt controller consists of 2 x 32-bit controllers.  Unlike
-// PPC ASICs, the OCB controllers are _not_ cascaded.  The combined
-// controllers are presented to the application as if there were a single
-// 64-bit interrupt controller, while the code underlying the abstraction
-// manipulates the 2 x 32-bit controllers independently.
-//
-// Note that the bits named *RESERVED* are actually implemented in the
-// controller, but the interrupt input is tied low. That means they can also
-// be used as IPI targets. Logical bits 32..63 are not implemented.
-
-#define PGP_IRQ_DEBUGGER                        0 /* 0x00 */
-#define PGP_IRQ_TRACE_TRIGGER                   1 /* 0x01 */
-#define PGP_IRQ_RESERVED_2                      2 /* 0x02 */
-#define PGP_IRQ_PBA_ERROR                       3 /* 0x03 */
-#define PGP_IRQ_SRT_ERROR                       4 /* 0x04 */
-#define PGP_IRQ_PORE_SW_ERROR                   5 /* 0x05 */
-#define PGP_IRQ_PORE_GPE0_FATAL_ERROR           6 /* 0x06 */
-#define PGP_IRQ_PORE_GPE1_FATAL_ERROR           7 /* 0x07 */
-#define PGP_IRQ_PORE_SBE_FATAL_ERROR            8 /* 0x08 */
-#define PGP_IRQ_PMC_ERROR                       9 /* 0x09 */
-#define PGP_IRQ_OCB_ERROR                      10 /* 0x0a */
-#define PGP_IRQ_SPIPSS_ERROR                   11 /* 0x0b */
-#define PGP_IRQ_CHECK_STOP                     12 /* 0x0c */
-#define PGP_IRQ_PMC_MALF_ALERT                 13 /* 0x0d */
-#define PGP_IRQ_ADU_MALF_ALERT                 14 /* 0x0e */
-#define PGP_IRQ_EXTERNAL_TRAP                  15 /* 0x0f */
-#define PGP_IRQ_OCC_TIMER0                     16 /* 0x10 */
-#define PGP_IRQ_OCC_TIMER1                     17 /* 0x11 */
-#define PGP_IRQ_PORE_GPE0_ERROR                18 /* 0x12 */
-#define PGP_IRQ_PORE_GPE1_ERROR                19 /* 0x13 */
-#define PGP_IRQ_PORE_SBE_ERROR                 20 /* 0x14 */
-#define PGP_IRQ_PMC_INTERCHIP_MSG_RECV         21 /* 0x15 */
-#define PGP_IRQ_RESERVED_22                    22 /* 0x16 */
-#define PGP_IRQ_PORE_GPE0_COMPLETE             23 /* 0x17 */
-#define PGP_IRQ_PORE_GPE1_COMPLETE             24 /* 0x18 */
-#define PGP_IRQ_ADCFSM_ONGOING                 25 /* 0x19 */
-#define PGP_IRQ_RESERVED_26                    26 /* 0x1a */
-#define PGP_IRQ_PBA_OCC_PUSH0                  27 /* 0x1b */
-#define PGP_IRQ_PBA_OCC_PUSH1                  28 /* 0x1c */
-#define PGP_IRQ_PBA_BCDE_ATTN                  29 /* 0x1d */
-#define PGP_IRQ_PBA_BCUE_ATTN                  30 /* 0x1e */
-#define PGP_IRQ_RESERVED_31                    31 /* 0x1f */
-
-#define PGP_IRQ_RESERVED_32                    32 /* 0x20 */
-#define PGP_IRQ_RESERVED_33                    33 /* 0x21 */
-#define PGP_IRQ_STRM0_PULL                     34 /* 0x22 */
-#define PGP_IRQ_STRM0_PUSH                     35 /* 0x23 */
-#define PGP_IRQ_STRM1_PULL                     36 /* 0x24 */
-#define PGP_IRQ_STRM1_PUSH                     37 /* 0x25 */
-#define PGP_IRQ_STRM2_PULL                     38 /* 0x26 */
-#define PGP_IRQ_STRM2_PUSH                     39 /* 0x27 */
-#define PGP_IRQ_STRM3_PULL                     40 /* 0x28 */
-#define PGP_IRQ_STRM3_PUSH                     41 /* 0x29 */
-#define PGP_IRQ_RESERVED_42                    42 /* 0x2a */
-#define PGP_IRQ_RESERVED_43                    43 /* 0x2b */
-#define PGP_IRQ_PMC_VOLTAGE_CHANGE_ONGOING     44 /* 0x2c */
-#define PGP_IRQ_PMC_PROTOCOL_ONGOING           45 /* 0x2d */
-#define PGP_IRQ_PMC_SYNC                       46 /* 0x2e */
-#define PGP_IRQ_PMC_PSTATE_REQUEST             47 /* 0x2f */
-#define PGP_IRQ_RESERVED_48                    48 /* 0x30 */
-#define PGP_IRQ_RESERVED_49                    49 /* 0x31 */
-#define PGP_IRQ_PMC_IDLE_EXIT                  50 /* 0x32 */
-#define PGP_IRQ_PORE_SW_COMPLETE               51 /* 0x33 */
-#define PGP_IRQ_PMC_IDLE_ENTER                 52 /* 0x34 */
-#define PGP_IRQ_RESERVED_53                    53 /* 0x35 */
-#define PGP_IRQ_PMC_INTERCHIP_MSG_SEND_ONGOING 54 /* 0x36 */
-#define PGP_IRQ_OCI2SPIVID_ONGOING             55 /* 0x37 */
-#define PGP_IRQ_PMC_OCB_O2P_ONGOING            56 /* 0x38 */
-#define PGP_IRQ_PSSBRIDGE_ONGOING              57 /* 0x39 */
-#define PGP_IRQ_PORE_SBE_COMPLETE              58 /* 0x3a */
-#define PGP_IRQ_IPI0                           59 /* 0x3b */
-#define PGP_IRQ_IPI1                           60 /* 0x3c */
-#define PGP_IRQ_IPI2                           61 /* 0x3d */
-#define PGP_IRQ_IPI3                           62 /* 0x3e */
-#define PGP_IRQ_RESERVED_63                    63 /* 0x3f */
-
-
-// Note: All standard-product IPI uses are declared here to avoid conflicts
-// Validation- and lab-only IPI uses are documented in validation.h
-
-/// The deferred callback queue interrupt
-///
-/// This IPI is reserved for use of the async deferred callback mechanism.
-/// This IPI is used by both critical and noncritical async handlers to
-/// activate the deferred callback mechanism.
-#define PGP_IRQ_ASYNC_IPI PGP_IRQ_IPI3
-
-
-// Please keep the string definitions up-to-date as they are used for
-// reporting in the Simics simulation.
-
-#define PGP_IRQ_STRINGS(var)                      \
-    const char* var[64] = {                       \
-        "PGP_IRQ_DEBUGGER",                       \
-        "PGP_IRQ_TRACE_TRIGGER",                  \
-        "PGP_IRQ_RESERVED_2",                     \
-        "PGP_IRQ_PBA_ERROR",                      \
-        "PGP_IRQ_SRT_ERROR",                      \
-        "PGP_IRQ_PORE_SW_ERROR",                  \
-        "PGP_IRQ_PORE_GPE0_FATAL_ERROR",          \
-        "PGP_IRQ_PORE_GPE1_FATAL_ERROR",          \
-        "PGP_IRQ_PORE_SBE_FATAL_ERROR",           \
-        "PGP_IRQ_PMC_ERROR",                      \
-        "PGP_IRQ_OCB_ERROR",                      \
-        "PGP_IRQ_SPIPSS_ERROR",                   \
-        "PGP_IRQ_CHECK_STOP",                     \
-        "PGP_IRQ_PMC_MALF_ALERT",                 \
-        "PGP_IRQ_ADU_MALF_ALERT",                 \
-        "PGP_IRQ_EXTERNAL_TRAP",                  \
-        "PGP_IRQ_OCC_TIMER0",                     \
-        "PGP_IRQ_OCC_TIMER1",                     \
-        "PGP_IRQ_PORE_GPE0_ERROR",                \
-        "PGP_IRQ_PORE_GPE1_ERROR",                \
-        "PGP_IRQ_PORE_SBE_ERROR",                 \
-        "PGP_IRQ_PMC_INTERCHIP_MSG_RECV",         \
-        "PGP_IRQ_RESERVED_22",                    \
-        "PGP_IRQ_PORE_GPE0_COMPLETE",             \
-        "PGP_IRQ_PORE_GPE1_COMPLETE",             \
-        "PGP_IRQ_ADCFSM_ONGOING",                 \
-        "PGP_IRQ_RESERVED_26",                    \
-        "PGP_IRQ_PBA_OCC_PUSH0",                  \
-        "PGP_IRQ_PBA_OCC_PUSH1",                  \
-        "PGP_IRQ_PBA_BCDE_ATTN",                  \
-        "PGP_IRQ_PBA_BCUE_ATTN",                  \
-        "PGP_IRQ_RESERVED_31",                    \
-        "PGP_IRQ_RESERVED_32",                    \
-        "PGP_IRQ_RESERVED_33",                    \
-        "PGP_IRQ_STRM0_PULL",                     \
-        "PGP_IRQ_STRM0_PUSH",                     \
-        "PGP_IRQ_STRM1_PULL",                     \
-        "PGP_IRQ_STRM1_PUSH",                     \
-        "PGP_IRQ_STRM2_PULL",                     \
-        "PGP_IRQ_STRM2_PUSH",                     \
-        "PGP_IRQ_STRM3_PULL",                     \
-        "PGP_IRQ_STRM3_PUSH",                     \
-        "PGP_IRQ_RESERVED_42",                    \
-        "PGP_IRQ_RESERVED_43",                    \
-        "PGP_IRQ_PMC_VOLTAGE_CHANGE_ONGOING",     \
-        "PGP_IRQ_PMC_PROTOCOL_ONGOING",           \
-        "PGP_IRQ_PMC_SYNC",                       \
-        "PGP_IRQ_PMC_PSTATE_REQUEST",             \
-        "PGP_IRQ_RESERVED_48",                    \
-        "PGP_IRQ_RESERVED_49",                    \
-        "PGP_IRQ_PMC_IDLE_EXIT",                  \
-        "PGP_IRQ_PORE_SW_COMPLETE",               \
-        "PGP_IRQ_PMC_IDLE_ENTER",                 \
-        "PGP_IRQ_RESERVED_53",                    \
-        "PGP_IRQ_PMC_INTERCHIP_MSG_SEND_ONGOING", \
-        "PGP_IRQ_OCI2SPIVID_ONGOING",             \
-        "PGP_IRQ_PMC_OCB_O2P_ONGOING",            \
-        "PGP_IRQ_PSSBRIDGE_ONGOING",              \
-        "PGP_IRQ_PORE_SBE_COMPLETE",              \
-        "PGP_IRQ_IPI0",                           \
-        "PGP_IRQ_IPI1",                           \
-        "PGP_IRQ_IPI2",                           \
-        "PGP_IRQ_IPI3 (ASYNC-IPI)",               \
-        "PGP_IRQ_RESERVED_63"                     \
-    };
-
-
-/// This constant is used to define the size of the table of interrupt handler
-/// structures as well as a limit for error checking.  The entire 64-bit
-/// vector is now in use.
-
-#define PPC405_IRQS 64
-
-#ifndef __ASSEMBLER__
-
-/// This expression recognizes only those IRQ numbers that have named
-/// (non-reserved) interrupts in the OCB interrupt controller.
-
-// There are so many invalid interrupts now that it's a slight improvement in
-// code size to let the compiler optimize the invalid IRQs to a bit mask for
-// the comparison.
-
-#define PGP_IRQ_VALID(irq) \
-    ({unsigned __irq = (unsigned)(irq); \
-        ((__irq < PPC405_IRQS) &&                               \
-         ((PGP_IRQ_MASK64(__irq) &                              \
-           (PGP_IRQ_MASK64(PGP_IRQ_RESERVED_2)  |               \
-            PGP_IRQ_MASK64(PGP_IRQ_RESERVED_22) |               \
-            PGP_IRQ_MASK64(PGP_IRQ_RESERVED_26) |               \
-            PGP_IRQ_MASK64(PGP_IRQ_RESERVED_31) |               \
-            PGP_IRQ_MASK64(PGP_IRQ_RESERVED_32) |               \
-            PGP_IRQ_MASK64(PGP_IRQ_RESERVED_33) |               \
-            PGP_IRQ_MASK64(PGP_IRQ_RESERVED_42) |               \
-            PGP_IRQ_MASK64(PGP_IRQ_RESERVED_43) |               \
-            PGP_IRQ_MASK64(PGP_IRQ_RESERVED_48) |               \
-            PGP_IRQ_MASK64(PGP_IRQ_RESERVED_49) |               \
-            PGP_IRQ_MASK64(PGP_IRQ_RESERVED_53) |               \
-            PGP_IRQ_MASK64(PGP_IRQ_RESERVED_63))) == 0));})
-
-/// This is a 32-bit mask, with big-endian bit (irq % 32) set.
-#define PGP_IRQ_MASK32(irq) (((uint32_t)0x80000000) >> ((irq) % 32))
-
-/// This is a 64-bit mask, with big-endian bit 'irq' set.
-#define PGP_IRQ_MASK64(irq) (0x8000000000000000ull >> (irq))
-
-#endif  /* __ASSEMBLER__ */
-
-
-////////////////////////////////////////////////////////////////////////////
-// OCB
-////////////////////////////////////////////////////////////////////////////
-
-/// The base address of the OCI control register space
-#define OCI_REGISTER_SPACE_BASE 0x40000000
-
-/// The base address of the entire PIB port mapped by the OCB.  The
-/// OCB-contained PIB registers are based at OCB_PIB_BASE.
-#define OCB_PIB_SLAVE_BASE 0x00060000
-
-/// The size of the OCI control register address space
-///
-/// There are at most 8 slaves, each of which maps 2**16 bytes of register
-/// address space.
-#define OCI_REGISTER_SPACE_SIZE POW2_32(19)
-
-/// This macro converts an OCI register space address into a PIB address as
-/// seen through the OCB direct bridge.
-#define OCI2PIB(addr) ((((addr) & 0x0007ffff) >> 3) + OCB_PIB_SLAVE_BASE)
-
-
-// OCB communication channel constants
-
-#define OCB_INDIRECT_CHANNELS 4
-
-#define OCB_RW_READ  0
-#define OCB_RW_WRITE 1
-
-#define OCB_STREAM_MODE_DISABLED 0
-#define OCB_STREAM_MODE_ENABLED  1
-
-#define OCB_STREAM_TYPE_LINEAR   0
-#define OCB_STREAM_TYPE_CIRCULAR 1
-
-#define OCB_INTR_ACTION_FULL      0
-#define OCB_INTR_ACTION_NOT_FULL  1
-#define OCB_INTR_ACTION_EMPTY     2
-#define OCB_INTR_ACTION_NOT_EMPTY 3
-
-#ifndef __ASSEMBLER__
-
-// These macros select OCB interrupt controller registers based on the IRQ
-// number.
-
-#define OCB_OIMR_AND(irq) (((irq) & 0x20) ? OCB_OIMR1_AND : OCB_OIMR0_AND)
-#define OCB_OIMR_OR(irq)  (((irq) & 0x20) ? OCB_OIMR1_OR  : OCB_OIMR0_OR)
-
-#define OCB_OISR(irq)     (((irq) & 0x20) ? OCB_OISR1     : OCB_OISR0)
-#define OCB_OISR_AND(irq) (((irq) & 0x20) ? OCB_OISR1_AND : OCB_OISR0_AND)
-#define OCB_OISR_OR(irq)  (((irq) & 0x20) ? OCB_OISR1_OR  : OCB_OISR0_OR)
-
-#define OCB_OIEPR(irq) (((irq) & 0x20) ? OCB_OIEPR1 : OCB_OIEPR0)
-#define OCB_OITR(irq)  (((irq) & 0x20) ? OCB_OITR1  : OCB_OITR0)
-#define OCB_OCIR(irq)  (((irq) & 0x20) ? OCB_OCIR1  : OCB_OCIR0)
-#define OCB_OUDER(irq) (((irq) & 0x20) ? OCB_OUDER1 : OCB_OUDER0)
-
-#endif  /* __ASSEMBLER__ */
-
-
-////////////////////////////////////////////////////////////////////////////
-// PMC
-////////////////////////////////////////////////////////////////////////////
-
-#ifndef __ASSEMBLER__
-
-/// A Pstate type
-///
-/// Pstates are signed, but our register access macros operate on unsigned
-/// values.  To avoid bugs, Pstate register fields should always be extracted
-/// to a variable of type Pstate.  If the size of Pstate variables ever
-/// changes we will have to revisit this convention.
-typedef int8_t Pstate;
-
-/// A DPLL frequency code
-///
-/// DPLL frequency codes moved from 8 to 9 bits going from P7 to P8
-typedef uint16_t DpllCode;
-
-/// A VRM11 VID code
-typedef uint8_t Vid11;
-
-#endif  /* __ASSEMBLER__ */
-
-/// The minimum Pstate
-#define PSTATE_MIN -128
-
-/// The maximum Pstate
-#define PSTATE_MAX 127
-
-/// The minimum \e legal DPLL frequency code
-///
-/// This is ~1GHz with a 16.6MHz tick frequency.
-#define DPLL_MIN 0x03c
-
-/// The maximum DPLL frequency code
-#define DPLL_MAX 0x1ff
-
-/// The minimum \a legal (non-power-off) VRM11 VID code
-#define VID11_MIN 0x02
-
-/// The maximum \a legal (non-power-off) VRM11 VID code
-#define VID11_MAX 0xfd
-
-
-////////////////////////////////////////////////////////////////////////////
-// PCB
-////////////////////////////////////////////////////////////////////////////
-
-/// Convert a core chiplet 0 SCOM address to the equivalent address for any
-/// other core chiplet.
-///
-/// Note that it is unusual to address core chiplet SCOMs directly.  Normally
-/// this is done as part of a GPE program where the program iterates over core
-/// chiplets, using the chiplet-0 address + a programmable offset held in a
-/// chiplet address register.  Therefore the only address macro defined is the
-/// chiplet-0 address. This macro is used for the rare cases of explicit
-/// getscom()/ putscom() to a particular chiplet.
-
-#define CORE_CHIPLET_ADDRESS(addr, core) ((addr) + ((core) << 24))
-
-
-// PCB Error codes
-
-#define PCB_ERROR_NONE              0
-#define PCB_ERROR_RESOURCE_OCCUPIED 1
-#define PCB_ERROR_CHIPLET_OFFLINE   2
-#define PCB_ERROR_PARTIAL_GOOD      3
-#define PCB_ERROR_ADDRESS_ERROR     4
-#define PCB_ERROR_CLOCK_ERROR       5
-#define PCB_ERROR_PACKET_ERROR      6
-#define PCB_ERROR_TIMEOUT           7
-
-// PCB Multicast modes
-
-#define PCB_MULTICAST_OR      0
-#define PCB_MULTICAST_AND     1
-#define PCB_MULTICAST_SELECT  2
-#define PCB_MULTICAST_COMPARE 4
-#define PCB_MULTICAST_WRITE   5
-
-/// \defgroup pcb_multicast_groups PCB Multicast Groups
-///
-/// Technically the multicast groups are programmable; This is the multicast
-/// grouping established by proc_sbe_chiplet_init().
-///
-/// - Group 0 : All functional chiplets (PRV PB XBUS ABUS PCIE TPCEX)
-/// - Group 1 : All functional EX chiplets (no cores)
-/// - Group 2 : All functional EX chiplets (core only)
-/// - Group 3 : All functional chiplets except pervasive (PRV)
-///
-/// @{
-
-#define MC_GROUP_ALL         0
-#define MC_GROUP_EX          1
-#define MC_GROUP_EX_CORE     2
-#define MC_GROUP_ALL_BUT_PRV 3
-
-/// @}
-
-
-/// Convert any SCOM address to a multicast address
-#define MC_ADDRESS(address, group, mode) \
-    (((address) & 0x00ffffff) | ((0x40 | ((mode) << 3) | (group)) << 24))
-
-
-
-////////////////////////////////////////////////////////////////////////////
-// PBA
-////////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////
-// Macros for fields of PBA_MODECTL
-////////////////////////////////////
-
-/// The 64KB OCI HTM marker space is enabled by default at 0x40070000
-///
-/// See the comments for pgp_trace.h
-
-#define PBA_OCI_MARKER_BASE 0x40070000
-
-
-// SSX Kernel reserved trace addresses, see pgp_trace.h.
-
-#define SSX_TRACE_CRITICAL_IRQ_ENTRY_BASE           0xf000
-#define SSX_TRACE_CRITICAL_IRQ_EXIT_BASE            0xf100
-#define SSX_TRACE_NONCRITICAL_IRQ_ENTRY_BASE        0xf200
-#define SSX_TRACE_NONCRITICAL_IRQ_EXIT_BASE         0xf300
-#define SSX_TRACE_THREAD_SWITCH_BASE                0xf400
-#define SSX_TRACE_THREAD_SLEEP_BASE                 0xf500
-#define SSX_TRACE_THREAD_WAKEUP_BASE                0xf600
-#define SSX_TRACE_THREAD_SEMAPHORE_PEND_BASE        0xf700
-#define SSX_TRACE_THREAD_SEMAPHORE_POST_BASE        0xf800
-#define SSX_TRACE_THREAD_SEMAPHORE_TIMEOUT_BASE     0xf900
-#define SSX_TRACE_THREAD_SUSPENDED_BASE             0xfa00
-#define SSX_TRACE_THREAD_DELETED_BASE               0xfb00
-#define SSX_TRACE_THREAD_COMPLETED_BASE             0xfc00
-#define SSX_TRACE_THREAD_MAPPED_RUNNABLE_BASE       0xfd00
-#define SSX_TRACE_THREAD_MAPPED_SEMAPHORE_PEND_BASE 0xfe00
-#define SSX_TRACE_THREAD_MAPPED_SLEEPING_BASE       0xff00
-
-
-// Please keep the string definitions up to date as they are used for
-// reporting in the Simics simulation.
-
-#define SSX_TRACE_STRINGS(var)                  \
-    const char* var[16] = {                     \
-        "Critical IRQ Entry             ",      \
-        "Critical IRQ Exit              ",      \
-        "Noncritical IRQ Entry          ",      \
-        "Noncritical IRQ Exit           ",      \
-        "Thread Switch                  ",      \
-        "Thread Blocked : Sleep         ",      \
-        "Thread Unblocked : Wakeup      ",      \
-        "Thread Blocked : Semaphore     ",      \
-        "Thread Unblocked : Semaphore   ",      \
-        "Thread Unblocked : Sem. Timeout",      \
-        "Thread Suspended               ",      \
-        "Thread Deleted                 ",      \
-        "Thread Completed               ",      \
-        "Thread Mapped Runnable         ",      \
-        "Thread Mapped Semaphore Pend.  ",      \
-        "Thread Mapped Sleeping         ",      \
-    };
-
-
-// PBA transaction sizes for the block copy engines
-
-#define PBA_BCE_OCI_TRANSACTION_32_BYTES 0
-#define PBA_BCE_OCI_TRANSACTION_64_BYTES 1
-#define PBA_BCE_OCI_TRANSACTION_8_BYTES  2
-
-
-// PBAX communication channel constants
-
-#define PBAX_CHANNELS 2
-
-#define PBAX_INTR_ACTION_FULL      0
-#define PBAX_INTR_ACTION_NOT_FULL  1
-#define PBAX_INTR_ACTION_EMPTY     2
-#define PBAX_INTR_ACTION_NOT_EMPTY 3
-
-
-////////////////////////////////////////////////////////////////////////////
-// VRM
-////////////////////////////////////////////////////////////////////////////
-
-// These are the command types recognized by the VRMs
-
-#define VRM_WRITE_VOLTAGE  0x0
-#define VRM_READ_STATE     0xc
-#define VRM_READ_VOLTAGE   0x3
-
-// Voltage rail designations for the read voltage command
-#define VRM_RD_VDD_RAIL    0x0
-#define VRM_RD_VCS_RAIL    0x1
-
-
-////////////////////////////////////////////////////////////////////////////
-// OHA
-////////////////////////////////////////////////////////////////////////////
-
-// Power proxy trace record idle state encodings.  These encodings are unique
-// to the Power proxy trace record.
-
-#define PPT_IDLE_NON_IDLE     0x0
-#define PPT_IDLE_NAP          0x1
-#define PPT_IDLE_LIGHT_SLEEP  0x2
-#define PPT_IDLE_FAST_SLEEP   0x3
-#define PPT_IDLE_DEEP_SLEEP   0x4
-#define PPT_IDLE_LIGHT_WINKLE 0x5
-#define PPT_IDLE_FAST_WINKLE  0x6
-#define PPT_IDLE_DEEP_WINKLE  0x7
-
-
-////////////////////////////////////////////////////////////////////////////
-// PC
-////////////////////////////////////////////////////////////////////////////
-
-// SPRC numbers for PC counters.  The low-order 3 bits are always defined as
-// 0. The address can also be modifed to indicate auto-increment addressing.
-// Note that the frequency-sensitivity counters are called "workrate" counters
-// in the hardware documentation.
-
-#define SPRN_CORE_INSTRUCTION_DISPATCH         0x200
-#define SPRN_CORE_INSTRUCTION_COMPLETE         0x208
-#define SPRN_CORE_FREQUENCY_SENSITIVITY_BUSY   0x210
-#define SPRN_CORE_FREQUENCY_SENSITIVITY_FINISH 0x218
-#define SPRN_CORE_RUN_CYCLE                    0x220
-#define SPRN_CORE_RAW_CYCLE                    0x228
-#define SPRN_CORE_MEM_HIER_A                   0x230
-#define SPRN_CORE_MEM_HIER_B                   0x238
-#define SPRN_CORE_MEM_C_LPAR(p)                (0x240 + (8 * (p)))
-#define SPRN_WEIGHTED_INSTRUCTION_PROCESSING   0x260
-#define SPRN_WEIGHTED_GPR_REGFILE_ACCESS       0x268
-#define SPRN_WEIGHTED_VRF_REGFILE_ACCESS       0x270
-#define SPRN_WEIGHTED_FLOATING_POINT_ISSUE     0x278
-#define SPRN_WEIGHTED_CACHE_READ               0x280
-#define SPRN_WEIGHTED_CACHE_WRITE              0x288
-#define SPRN_WEIGHTED_ISSUE                    0x290
-#define SPRN_WEIGHTED_CACHE_ACCESS             0x298
-#define SPRN_WEIGHTED_VSU_ISSUE                0x2a0
-#define SPRN_WEIGHTED_FXU_ISSUE                0x2a8
-
-#define SPRN_THREAD_RUN_CYCLES(t)              (0x2b0 + (0x20 * (t)))
-#define SPRN_THREAD_INSTRUCTION_COMPLETE(t)    (0x2b8 + (0x20 * (t)))
-#define SPRN_THREAD_MEM_HIER_A(t)              (0x2c0 + (0x20 * (t)))
-#define SPRN_THREAD_MEM_HIER_B(t)              (0x2c8 + (0x20 * (t)))
-
-#define SPRN_PC_AUTOINCREMENT                  0x400
-
-
-////////////////////////////////////////////////////////////////////////////
-// Centaur
-////////////////////////////////////////////////////////////////////////////
-
-// DIMM sensor status codes
-
-/// The next sampling period began before this sensor was read or the master
-/// enable is off, or the individual sensor is disabled. If the subsequent
-/// read completes on time, this will return to valid reading. Sensor data may
-/// be accurate, but stale.  If due to a stall, the StallError FIR will be
-/// set.
-#define DIMM_SENSOR_STATUS_STALLED 0
-
-/// The sensor data was not returned correctly either due to parity
-/// error or PIB bus error code. Will return to valid if the next PIB
-/// access to this sensor is valid, but a FIR will be set; Refer to FIR
-/// for exact error. Sensor data should not be considered valid while
-/// this code is present.
-#define DIMM_SENSOR_STATUS_ERROR 1
-
-/// Sensor data is valid, and has been valid since the last time this
-/// register was read.
-#define DIMM_SENSOR_STATUS_VALID_OLD 2
-
-/// Sensor data is valid and has not yet been read by a SCOM. The status code
-/// return to DIMM_SENSOR_STATUS_VALID_OLD after this register is read.
-#define DIMM_SENSOR_STATUS_VALID_NEW 3
-
-
-#endif  /* __PGP_COMMON_H__ */
diff --git a/src/usr/hwpf/hwp/include/sbe_vital.H b/src/usr/hwpf/hwp/include/sbe_vital.H
deleted file mode 100644
index 4e1292d0b..000000000
--- a/src/usr/hwpf/hwp/include/sbe_vital.H
+++ /dev/null
@@ -1,40 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/include/sbe_vital.H $                        */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: sbe_vital.H,v 1.1 2012/09/10 20:51:30 jeshua Exp $
-
-/// Bit locations and lengths of the fields in the SBE vital register
-
-#ifndef __SBE_VITAL_H
-#define __SBE_VITAL_H
-
-#include "fapi_sbe_common.H"
-
-CONST_UINT8_T(HALT_CODE_BIT_POSITION,       ULL(12));
-CONST_UINT8_T(HALT_CODE_BIT_LENGTH,         ULL(4));
-CONST_UINT8_T(ISTEP_NUM_BIT_POSITION,       ULL(16));
-CONST_UINT8_T(ISTEP_NUM_BIT_LENGTH,         ULL(12));
-CONST_UINT8_T(SUBSTEP_NUM_BIT_POSITION,     ULL(28));
-CONST_UINT8_T(SUBSTEP_NUM_BIT_LENGTH,       ULL(4));
-
-
-#endif  // __SBE_VITAL_H
diff --git a/src/usr/hwpf/hwp/lab_dimm_attributes.xml b/src/usr/hwpf/hwp/lab_dimm_attributes.xml
deleted file mode 100644
index cf6f3842d..000000000
--- a/src/usr/hwpf/hwp/lab_dimm_attributes.xml
+++ /dev/null
@@ -1,104 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/lab_dimm_attributes.xml $                    -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2014                             -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- XML file specifying DIMM attributes used by HW Procedures. -->
-<!-- $Id: dimm_attributes.xml,v 1.4 2013/10/03 20:40:52 dedahle Exp $ -->
-<attributes>
-
-<attribute>
-    <id>ATTR_CEN_DQ_TO_DIMM_CONN_DQ</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Centaur DQ to DIMM connector DQ mapping.
-        Uint8 value for each Centaur DQ (0-79).
-        The value is the corresponding DIMM Connector DQ.
-        Therefore if (data[2] == 60) then Centaur DQ 2 maps to DIMM DQ 60
-        If the logical DIMM is on a Centaur-DIMM then the value is the same as the
-        array index because there is no DIMM connector.
-        If the logical DIMM is an IS-DIMM then the value depends on board wiring.
-    </description>
-    <valueType>uint8</valueType>
-    <array>80</array>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MBA_PORT</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>MBA Chiplet port this DIMM is connected to</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MBA_DIMM</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>MBA port DIMM number of this DIMM</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_BAD_DQ_BITMAP</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Bad DQ bitmap from a Centaur:MBA point of view.
-        The data is a 10 byte bitmap for each of 4 possible ranks.
-        The bad DQ data is stored in DIMM SPD, it is stored in a special format
-        and is translated to a DIMM Connector point of view for IS-DIMMs.
-        All of these details are hidden from the user of this attribute.
-    </description>
-    <valueType>uint8</valueType>
-    <array>4 10</array>
-    <platInit/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DIMM_SPARE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>
-        Spare DRAM availability for all DIMMs connected to the target MBA.
-        For each rank on a DIMM, there are 8 DQ lines to spare DRAMs.
-        - NO_SPARE: No spare DRAMs
-        - LOW_NIBBLE:  x4 DRAMs in use, one spare DRAM connected to SP_DQ0-3
-        - HIGH_NIBBLE: x4 DRAMs in use, one spare DRAM connected to SP_DQ4-7
-        - FULL_BYTE: Either
-          1/ x4 DRAMs in use, two spare DRAMs connected to SP_DQ0-7
-          2/ x8 DRAMs in use, one spare DRAM connected to SP_DQ0-7
-        For C-DIMMs, this is in a VPD field : Record:VSPD, Keyword:AM
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-        NO_SPARE = 0x00,
-        LOW_NIBBLE = 0x01,
-        HIGH_NIBBLE = 0x02,
-        FULL_BYTE = 0x03
-    </enum>
-    <array>2 2 4</array>
-    <platInit/>
-    <writeable/>
-</attribute>
-
-</attributes>
diff --git a/src/usr/hwpf/hwp/lab_dimm_spd_attributes.xml b/src/usr/hwpf/hwp/lab_dimm_spd_attributes.xml
deleted file mode 100755
index 8e4af3c93..000000000
--- a/src/usr/hwpf/hwp/lab_dimm_spd_attributes.xml
+++ /dev/null
@@ -1,3079 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/lab_dimm_spd_attributes.xml $                -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2014,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: lab_dimm_spd_attributes.xml,v 1.25 2015/09/28 12:09:12 mklight Exp $ -->
-<!-- XML file specifying DIMM SPD attributes used by HW Procedures. -->
-<attributes>
-
-<!--
-*******************************************************************************
-The following attributes can be queried from both DDR3 and DDR4 DIMMs
-*******************************************************************************
--->
-
-<attribute>
-    <id>ATTR_SPD_DRAM_DEVICE_TYPE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM Device Type.
-        Located in DDR3/DDR4 SPD byte 2.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DDR3 = 0x0b, DDR4 = 0x0c</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_TYPE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Type.
-        Located in DDR3/DDR4 SPD byte 3, bits 3-0.
-        Note that CDIMM designation here is obsolete.  See ATTR_SPD_CUSTOM
-    </description>
-    <valueType>uint8</valueType>
-    <enum>CDIMM = 0x00, RDIMM = 0x01, UDIMM = 0x02, SO_DIMM=0x03, LRDIMM = 0x0b, INVALID = 0xff</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_CUSTOM</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Type is CUSTOM
-        Located in DDR3/DDR4 SPD byte 3, bit 7. (Most significant bit)
-        If bit 7 (reserved) is a '1' then this attribute value should be set to YES
-    </description>
-    <valueType>uint8</valueType>
-    <enum>NO = 0x0, YES = 0x1</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_DENSITY</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM Density.
-        Located in DDR3/DDR4 SPD byte 4, bits 3-0.
-        0x00 = 256MB
-        0x01 = 512MB
-        0x02 = 1GB
-        0x03 = 2GB
-        0x04 = 4GB
-        0x05 = 8GB
-        0x06 = 16GB
-        0x07 = 32GB
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-        D256MB = 0x00, D512Mb = 0x01, D1GB = 0x02, D2GB = 0x03, D4GB = 0x04,
-        D8GB = 0x05, D16GB = 0x06, D32GB=0x07
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_BANKS</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Number of banks.
-        Located in DDR3 SPD byte 4, bits 6-4.
-        Located in DDR4 SPD byte 4, bits 5-4.
-        The raw data has different meanings for DDR3 and DDR4.
-        HWPs must use this DDR neutral enumeration to decode.
-        Platform support must call an Accessor HWP.
-        For DDR4 , Values can be B4 and B8 based on bits 5-4
-        For DDR3 , Values can be B8,B16,B32,B64 based on bits 6-4
-    </description>
-    <valueType>uint8</valueType>
-    <enum>B8 = 0x00, B16 = 0x01, B32 = 0x02, B64 = 0x03, B4 = 0x04, UNKNOWN = 0xff</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_ROWS</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Number of Rows.
-        Located in DDR3/DDR4 SPD byte 5, bits 5-3.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>R12 = 0x00, R13 = 0x01, R14 = 0x02, R15 = 0x03, 
-          R16 = 0x04, R17 = 0x05, R18 = 0x06
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_COLUMNS</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Number of Columns.
-        Located in DDR3/DDR4 SPD byte 5, bits 2-0.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>C9 = 0x00, C10 = 0x01, C11 = 0x02, C12 = 0x03</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_NOMINAL_VOLTAGE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Nominal voltage (bitmap).
-        Located in DDR3 SPD byte 6, bits 2-0.
-        Located in DDR4 SPD byte 11, bits 5-0.
-        The raw data has different meanings for DDR3 and DDR4.
-        HWPs must use this DDR neutral enumeration to decode.
-        Platform support must call an Accessor HWP.
-        For DDR3, values would be NOTOP1_5,OP1_35,OP1_2X based on byte 6, bits 2-0
-        For DDR4, values would be OP1_2V,END1_2V, based on byte 6, bits 5-0
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-         NOTOP1_5 = 0x01,
-         OP1_35 = 0x02,
-         OP1_2X = 0x04,
-         OP1_2V = 0x08,
-         END1_2V = 0x10
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_NUM_RANKS</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Number of ranks.
-        Located in DDR3 SPD byte 7, bits 5-3.
-        Located in DDR4 SPD byte 12, bits 5-3.
-    </description>
-    <valueType>uint8</valueType>
-    <!-- RX means an invalid value, only used to init vars -->
-    <enum>R1 = 0x00, R2 = 0x01, R4 = 0x03, RX = 0xFF</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_DRAM_WIDTH</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM Width.
-        Located in DDR3 SPD byte 7, bits 2-0.
-        Located in DDR4 SPD byte 12, bits 2-0.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>W4 = 0x00, W8 = 0x01, W16 = 0x02, W32 = 0x03</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_MEMORY_BUS_WIDTH</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Memory Bus Width.
-        Located in DDR3 SPD byte 8, bits 4-0
-        Located in DDR4 SPD byte 13, bits 4-0.
-           Bits 4-3 contain the Bus Width Extension (ECC)
-           Bits 2-0 contain the Primary Bus Width
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-        W8 = 0x00, W16 = 0x01, W32 = 0x02, W64 = 0x03,
-        WE8 = 0x08, WE16 = 0x09, WE32 = 0x0a, WE64 = 0x0b
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TCKMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum cycle time (tCKmin).
-        Located in DDR3 SPD byte 12.
-        Located in DDR4 SPD byte 18.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_CAS_LATENCIES_SUPPORTED</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        CAS Latencies supported (bitmap).
-        Located in DDR3 SPD byte 14 (LSB) and byte 15.
-        Located in DDR4 SPD byte 20 (LSB) through byte 23
-        The raw data has different meanings for DDR3 and DDR4.
-        HWPs must use this DDR neutral enumeration to decode.
-        Platform support must call an Accessor HWP.
-        For DDR3, the values would be from CL_4 through CL_18
-        For DDR4, the values would be from CL_7 through CL_24
-    </description>
-    <valueType>uint32</valueType>
-    <enum>
-        CL_24 = 0x00100000,
-        CL_23 = 0x00080000,
-        CL_22 = 0x00040000,
-        CL_21 = 0x00020000,
-        CL_20 = 0x00010000,
-        CL_19 = 0x00008000,
-        CL_18 = 0x00004000,
-        CL_17 = 0x00002000,
-        CL_16 = 0x00001000,
-        CL_15 = 0x00000800,
-        CL_14 = 0x00000400,
-        CL_13 = 0x00000200,
-        CL_12 = 0x00000100,
-        CL_11 = 0x00000080,
-        CL_10 = 0x00000040,
-        CL_9  = 0x00000020,
-        CL_8  = 0x00000010,
-        CL_7  = 0x00000008,
-        CL_6  = 0x00000004,
-        CL_5  = 0x00000002,
-        CL_4  = 0x00000001
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TAAMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum CAS Latency Time (tAAmin).
-        Located in DDR3 SPD byte 16.
-        Located in DDR4 SPD byte 24.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRCDMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum RAS# to CAS# Delay Time (tRCDmin).
-        Located in DDR3 SPD byte 18.
-        Located in DDR4 SPD byte 25.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRPMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Row Precharge Delay Time (tRPmin).
-        Located in DDR3 SPD byte 20.
-        Located in DDR4 SPD byte 26.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRASMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Active to Precharge Delay Time (tRASmin).
-        Located in DDR3 SPD byte 21, bits 3-0 and byte 22 (LSB).
-        Located in DDR4 SPD byte 27, bits 3-0 and byte 28 (LSB)
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRCMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Active to Active/Refresh Delay Time (tRCmin).
-        Located in DDR3 SPD byte 21, bits 7-4 and byte 23 (LSB).
-        Located in DDR4 SPD byte 27, bits 7-4 and byte 29 (LSB)
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TFAWMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Four Activate Window Delay Time (tFAWmin).
-        Located in DDR3 SPD byte 28, bits 3-0 and byte 29 (LSB).
-        Located in DDR4 SPD byte 36, bits 3-0 and byte 37 (LSB).
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_OPTIONAL_FEATURES</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        SDRAM Optional Features (bitmap).
-        Located in DDR3 SPD byte 30.
-        Located in DDR4 SPD byte 7, will be reserved and set to 0x0.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DLL_OFF = 0x80, RZQ7 = 0x02, RZQ6 = 0x01</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_THERMAL_AND_REFRESH_OPTIONS</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        SDRAM Thermal and Refresh Options (bitmap).
-        Located in DDR3 SPD byte 31.
-        Located in DDR4 SPD byte 8, will be reserved and set to 0x0.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>PASR = 0x80, ODTS = 0x08, ASR = 0x05, ETRR = 0x02, ETR = 0x01</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_THERMAL_SENSOR</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Thermal Sensor.
-        Located in DDR3 SPD byte 32.
-        Located in DDR4 SPD byte 14.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>PRESENT = 0x80, ACCURACY_MASK = 0x7F</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_DEVICE_TYPE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        SDRAM Device Type.
-        Located in DDR3 SPD byte 33, bit 7.
-        Located in DDR4 SPD byte 6, bit 7.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>STANDARD_MONOLITHIC = 0x00, NON_STANDARD = 0x01</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_DEVICE_TYPE_SIGNAL_LOADING</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        SDRAM Device Type Signal Loading for stacked DRAMs.
-        Located in DDR3 SPD byte 33, bits 1-0.
-        Located in DDR4 SPD byte 6, bit 1-0.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>NOT_SPECIFIED = 0x00, MULTI_LOAD_STACK = 0x01, SINGLE_LOAD_STACK = 0x02</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_SDRAM_DIE_COUNT</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        SDRAM Device Type Die Count.
-        Located in DDR3 SPD byte 33, bits 6-4.
-        Located in DDR4 SPD byte 6, bit 6-4.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>DIE1 = 0x00, DIE2 = 0x01, DIE4 = 0x02, DIE8 = 0x03</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TCKMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Fine Offset for SDRAM Minimum Cycle Time (tCKmin).
-        Located in DDR3 SPD byte 34.
-        Located in DDR4 SPD byte 125.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TAAMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Fine Offset for Minimum CAS Latency Time (tAAmin).
-        Located in DDR3 SPD byte 35.
-        Located in DDR4 SPD byte 123.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TRCDMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Fine Offset for Minimum RAS# to CAS# Delay Time (tRCDmin).
-        Located in DDR3 SPD byte 36.
-        Located in DDR4 SPD byte 122.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TRPMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Fine Offset for Minimum Row Precharge Delay Time (tRPmin).
-        Located in DDR3 SPD byte 37.
-        Located in DDR4 SPD byte 121.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TRCMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Fine Offset for Minimum Active to Active/Refresh Delay Time (tRCmin).
-        Located in DDR3 SPD byte 38.
-        Located in DDR4 SPD byte 120.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_NUM_OF_REGISTERS_USED_ON_RDIMM</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Number of Registers used on RDIMM.
-        Located in DDR3 SPD byte 63 bits 1-0.
-    </description> 
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_SPECIFIC_SECTION</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Specific Section.
-        Located in DDR3 SPD bytes 60d - 116d.
-        Located in DDR4 SPD bytes 128 - 255d.
-    </description>
-    <valueType>uint8</valueType>
-    <array>57</array>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_ID_MODULE_MANUFACTURERS_JEDEC_ID_CODE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module ID: Module Manufacturer's JEDEC ID Code.
-        Located in DDR3 SPD bytes 117 (LSB) to 118.
-        Located in DDR4 SPD bytes 320 (LSB) to 321.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_ID_MODULE_MANUFACTURING_LOCATION</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module ID: Module Manufacturing Location.
-        Located in DDR3 SPD byte 119.
-        Located in DDR4 SPD byte 322.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_ID_MODULE_MANUFACTURING_DATE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module ID: Module Manufacturing Date.
-        Located in DDR3 SPD bytes 120 (BCD year) to byte 121 (BCD week) (LSB).
-        Located in DDR4 SPD bytes 323 (BCD year) to byte 324 (BCD week) (LSB).
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_ID_MODULE_SERIAL_NUMBER</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module ID: Module Serial Number.
-        Located in DDR3 SPD bytes 122 (LSB) to 125.
-        Located in DDR4 SPD bytes 325 (LSB) to 328.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_CYCLICAL_REDUNDANCY_CODE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Cyclical Redundancy Code.
-        Located in DDR3 SPD bytes 126 (LSB) to 127.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_PART_NUMBER</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Part Number.
-        Located in DDR3 SPD bytes 128 - 145.
-        Located in DDR4 SPD bytes 329 - 348.
-    </description>
-    <valueType>uint8</valueType>
-    <array>18</array>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_REVISION_CODE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Revision Code.
-        Located in DDR3 SPD bytes 146 (LSB) to 147.
-        Located in DDR4 SPD byte 349
-        The raw data has a different size for DDR3 and DDR4.
-        HWPs must use this DDR neutral attribute.
-        Platform support must call an Accessor HWP.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_DRAM_MANUFACTURER_JEDEC_ID_CODE</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM Manufacturer JEDEC ID Code.
-        Located in DDR3 SPD bytes 148 (LSB) to 149.
-        Located in DDR4 SPD bytes 350 (LSB) to 351.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_BAD_DQ_DATA</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Bad DQ pin data stored in DIMM SPD. This data is in a special fomat.
-        This must only be called by a firmware HWP that knows how to
-        decode the data. HWP/PLAT firmware that needs to get/set the
-        Bad DQ Bitmap from a Centaur DQ point of view must use the
-        ATTR_BAD_DQ_BITMAP attribute.
-    </description>
-    <valueType>uint8</valueType>
-    <array>80</array>
-    <platInit/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_DIMM_RCD_CNTL_WORD_0_15</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>RCD Control Word. Supplied by SPD, used by mss_eff_config.C and mss_draminit.C . Each dimm will have a value.
-        consumer: mss_dram_init, mss_eff_config firmware notes: In order to make this readable to the OpenPower: It is necessary
-        to swap the nibbles for a given byte.  IE this is pulled from SPD bytes 69 - 76. (DDR3)
-        The attribute would contain byte 69 nibble 1, followed by byte 69 nibble 0, followed by byte 70 nibble 1, and so forth.
-   </description>
-    <valueType>uint64</valueType>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DIMM_RCD_CNTL_WORD_0_15</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>This will be replaced by ATTR_SPD_DIMM_RCD_CNTL_WORD_0_15. Until migration is complete USE as is. (Will be deleted soon)
-	IE this is pulled from SPD bytes 69 - 76. (DDR3)
-    The attribute would contain byte 69 nibble 1, followed by byte 69 nibble 0, followed by byte 70 nibble 1, and so forth.
-   </description>
-    <valueType>uint64</valueType>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DIMM_RCD_OUTPUT_TIMING</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RCD Timing. Supplied by VPD, used by mss_eff_config.C. Each dimm will have a value.
-        consumer: mss_eff_config
-   </description>
-    <valueType>uint8</valueType>
-    <enum>1T = 0x01, 3T = 0x03</enum>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<!--
-*******************************************************************************
-The following attributes can be queried from DDR3 DIMMs only
-Querying them from DDR4 DIMMs will result in an error
-*******************************************************************************
--->
-
-<attribute>
-    <id>ATTR_SPD_FTB_DIVIDEND</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Fine Timebase Dividend.
-        Located in DDR3 SPD byte 9, bits 7-4.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FTB_DIVISOR</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Fine Timebase Divisor.
-        Located in DDR3 SPD byte 9, bits 3-0.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MTB_DIVIDEND</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Medium Timebase Dividend.
-        Located in DDR3 SPD byte 10.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MTB_DIVISOR</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Medium Timebase Divisor.
-        Located in DDR3 SPD byte 11.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TWRMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Write Recovery Time (tWRmin).
-        Located in DDR3 SPD byte 17.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRRDMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Row Active to Row Active Delay Time (tRRDmin).
-        Located in DDR3 SPD byte 19.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRFCMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Refresh Recovery Delay Time (tRFCmin).
-        Located in DDR3 SPD byte 24 (LSB) and byte 25.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TWTRMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Internal Write to Read Command Delay Time (tWTRmin).
-        Located in DDR3 SPD byte 26.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRTPMIN</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum Internal Read to Precharge Command Delay Time (tRTPmin).
-        Located in DDR3 SPD byte 27.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_ADDR_MIRRORING</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced address mirroring attribute.
-        Located in DDR3 SPD byte 63 bits 1-0.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-        NO_RANKS = 0x00,
-        ODD_RANKS = 0x01
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F0RC3_F0RC2</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F0RC3/F0RC2.
-        Timing control AND Drive strength, Address/Command AND QxCS_n
-        Located in DDR3 SPD byte 67.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F0RC5_F0RC4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F0RC5/F0RC4.
-        Drive strength, QxODT AND QxCKE and Clock.
-        Located in DDR3 SPD byte 68.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F1RC11_F1RC8</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F1RC11/F1RC8.
-        Extended delay for clocks, QxCS_n and QxODT AND QxCKE.
-        Located in DDR3 SPD byte 69.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F1RC13_F1RC12</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F1RC13/F1RC12.
-        Additive delay for QxCS_n and QxCA.
-        Located in DDR3 SPD byte 70.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F1RC15_F1RC14</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F1RC15/F1RC14.
-        Additive delay for QxODT and QxCKE.
-        Located in DDR3 SPD byte 71.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F3RC9_F3RC8_FOR_800_1066</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F3RC9/F3RC8 for 800 AND 1066.
-        DRAM interface MDQ Termination and Drive strength.
-        Located in DDR3 SPD byte 72.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F34RC11_F34RC10_FOR_800_1066</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[3,4]RC11/F[3,4]RC10 for 800 AND 1066.
-        Rank 0AND1 Read and Write QxODT control.
-        Located in DDR3 SPD byte 73.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F56RC11_F56RC10_FOR_800_1066</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[5,6]RC11/F[5,6]RC10 for 800 AND 1066.
-        Rank 2AND3 Read and Write QxODT control.
-        Located in DDR3 SPD byte 74.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F78RC11_F78RC10_FOR_800_1066</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[7,8]RC11/F[7,8]RC10 for 800 AND 1066.
-        Rank 4AND5 Read and Write QxODT control.
-        Located in DDR3 SPD byte 75.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F910RC11_F910RC10_FOR_800_1066</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[9,10]RC11/F[9,10]RC10 for 800 AND 1066.
-        Rank 6AND7 Read and Write QxODT control.
-        Located in DDR3 SPD byte 76.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_MR12_FOR_800_1066</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced MR1,2 registers for 800 AND 1066.
-        DRAM Rtt_WR for all ranks, DRAM Rtt_Nom for ranks 0 and 1, DRAM driver impedance for all ranks.
-        Located in DDR3 SPD byte 77.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F3RC9_F3RC8_FOR_1333_1600</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F3RC9/F3RC8 for 1333 AND 1600.
-        DRAM interface MDQ Termination and Drive strength.
-        Located in DDR3 SPD byte 78.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F34RC11_F34RC10_FOR_1333_1600</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[3,4]RC11/F[3,4]RC10 for 1333 AND 1600.
-        Rank 0AND1 Read and Write QxODT control.
-        Located in DDR3 SPD byte 79.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F56RC11_F56RC10_FOR_1333_1600</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[5,6]RC11/F[5,6]RC10 for 1333 AND 1600.
-        Rank 2AND3 Read and Write QxODT control.
-        Located in DDR3 SPD byte 80.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F78RC11_F78RC10_FOR_1333_1600</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[7,8]RC11/F[7,8]RC10 for 1333 AND 1600.
-        Rank 4AND5 Read and Write QxODT control.
-        Located in DDR3 SPD byte 81.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F910RC11_F910RC10_FOR_1333_1600</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[9,10]RC11/F[9,10]RC10 for 1333 AND 1600.
-        Rank 6AND7 Read and Write QxODT control.
-        Located in DDR3 SPD byte 82.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_MR12_FOR_1333_1600</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced MR1,2 registers for 1333 AND 1600.
-        DRAM Rtt_WR for all ranks, DRAM Rtt_Nom for ranks 0 and 1, DRAM driver impedance for all ranks.
-        Located in DDR3 SPD byte 83.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F3RC9_F3RC8_FOR_1866_2133</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F3RC9/F3RC8 for 1866 AND 2133.
-        DRAM interface MDQ Termination and Drive strength.
-        Located in DDR3 SPD byte 84.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F34RC11_F34RC10_FOR_1866_2133</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[3,4]RC11/F[3,4]RC10 for 1866 AND 2133.
-        Rank 0AND1 Read and Write QxODT control.
-        Located in DDR3 SPD byte 85.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F56RC11_F56RC10_FOR_1866_2133</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[5,6]RC11/F[5,6]RC10 for 1866 AND 2133.
-        Rank 2AND3 Read and Write QxODT control.
-        Located in DDR3 SPD byte 86.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F78RC11_F78RC10_FOR_1866_2133</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[7,8]RC11/F[7,8]RC10 for 1866 AND 2133.
-        Rank 4AND5 Read and Write QxODT control.
-        Located in DDR3 SPD byte 87.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_F910RC11_F910RC10_FOR_1866_2133</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced F[9,10]RC11/F[9,10]RC10 for 1866 AND 2133.
-        Rank 6AND7 Read and Write QxODT control.
-        Located in DDR3 SPD byte 88.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_MR12_FOR_1866_2133</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Load Reduced MR1,2 registers for 1866 AND 2133.
-        DRAM Rtt_WR for all ranks, DRAM Rtt_Nom for ranks 0 and 1, DRAM driver impedance for all ranks.
-        Located in DDR3 SPD byte 89.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<!--
-*******************************************************************************
-The following attributes can be queried from DDR4 DIMMs only
-Querying them from DDR3 DIMMs will result in an error
-*******************************************************************************
--->
-<attribute>
-    <id>ATTR_SPD_SDRAM_BANKGROUPS_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Number of bank groups.
-        Located in DDR4 SPD byte 4, bits 7-6.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>BG0 = 0x00, BG2 = 0x01, BG4 = 0x02</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TIMEBASE_MTB_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        defines a value in picoseconds that represents the fundamental timebase
-        for medium grain timing calculations. This value is used as a multiplier
-        for formulating subsequent timing parameters.
-        Located in DDR4 SPD byte 17, bits 3-2.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>PS125 = 0x00</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TIMEBASE_FTB_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        defines a value in picoseconds that represents the fundamental timebase
-        for fine grain timing calculations. This value is used as a multiplier
-        for formulating subsequent timing parameters.
-        Located in DDR4 SPD byte 17, bits 1-0.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>PS1 = 0x00</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TCKMAX_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Maximum cycle time (tCKmax).
-        Located in DDR4 SPD byte 19.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRFC1MIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum SDRAM Refresh Recovery Time Delay in medium timebase (MTB) units
-        Located in DDR4 SPD bytes 31(MSB) bits 15-8 and SPD byte 30(LSB) 7-0.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRFC2MIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum SDRAM Refresh Recovery Time Delay in medium timebase (MTB) units
-        Located in DDR4 SPD bytes 33(MSB) bits 15-8 and SPD byte 32(LSB) 7-0.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRFC4MIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Minimum SDRAM Refresh Recovery Time Dealy in medium timebase (MTB) units.
-        Located in DDR4 SPD byte 35(MSB) bits 15-8 and SPD byte 34(LSB) 7-0.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRRDSMIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        The minimum SDRAM Activate to Activate Delay Time to different bank 
-        groups in medium timebase (MTB) units. Controller designers must also 
-        note that at some frequencies, a minimum number of clocks may be required
-        resulting in a larger tRRD_Smin value than indicated in the SPD. 
-        For example, tRRD_Smin for DDR4-1600 must be 4 clocks.
-        Located in DDR4 SPD byte 38
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TRRDLMIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        The minimum SDRAM Activate to Activate Delay Time to same  bank 
-        groups in medium timebase (MTB) units. Controller designers must also 
-        note that at some frequencies, a minimum number of clocks may be required
-        resulting in a larger tRRD_Smin value than indicated in the SPD. 
-        For example, tRRD_Lmin for DDR4-1600 must be 4 clocks.
-        Located in DDR4 SPD byte 39
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_TCCDLMIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        The minimum SDRAM CAS to CAS Delay Time to same  bank 
-        groups in medium timebase (MTB) units. Controller designers must also 
-        note that at some frequencies, a minimum number of clocks may be required
-        resulting in a larger tCCD_Lmin value than indicated in the SPD. 
-        For example, tCCD_Lmin for DDR4-2133 must be 6 clocks.
-        Located in DDR4 SPD byte 40 
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TCCDLMIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Modifies the calculation of SPD Byte 40 with a fine correction 
-        using FTB units. The value of tCCD_Lmin comes from the SDRAM data 
-        sheet. This value is a two.s complement multiplier for FTB units, 
-        ranging from +127 to -128.
-        Located in DDR4 SPD byte 117 
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TRRDLMIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Modifies the calculation of SPD Byte 39 with a fine correction using 
-        FTB units. The value of tRRD_Lmin comes from the SDRAM data sheet. 
-        This value is a two.s complement multiplier for FTB units, 
-        ranging from +127 to -128.
-        Located in DDR4 SPD byte 118 
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TRRDSMIN_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Modifies the calculation of SPD Byte 38 (MTB units) with a fine 
-        correction using FTB units. The value of tRRD_Smin comes from the 
-        SDRAM data sheet. This value is a two.s complement multiplier for 
-        FTB units, ranging from +127 to -128.
-        Located in DDR4 SPD byte 119 
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_FINE_OFFSET_TCKMAX_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Fine Offset for SDRAM Minimum Cycle Time (tCKAVGmax).
-        Located in DDR4 SPD byte 124.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_CRC_BASE_CONFIG_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        contains the calculated CRC for bytes 0~125 (0x000~0x07D) in the SPD
-        Located in DDR4 SPD byte 126(LSB) and 127(MSB).
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_DRAM_STEPPING_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Defines the vendor die revision level (often called the .stepping.)
-        of the DRAMs on the module. This byte is optional. 
-        For modules without DRAM stepping information, this byte should
-        be programmed to 0xFF.
-        Located in DDR4 SPD byte 352
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_CRC_MNFG_SEC_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        contains the calculated CRC for bytes 320~381 (0x140~0x17D) in the SPD
-        Located in DDR4 SPD byte 382(LSB) and 383(MSB).
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_VERSION</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        The VPD Version of this DIMM.  The version number can be an indication of when different DIMM keywords are valid and is loaded from the platform. The version represented here represents one of three distinct vintages of parts : unknown/error, early build CDIMMs with VZ less than 10, everything else.  In other words, this attribute does NOT equate to the VZ keyword.
-    </description>
-    <valueType>uint32</valueType>
-    <!-- Values are ASCII numbers to match previous VZ usage -->
-    <enum>UNKNOWN = 0x3030, OLD_CDIMM = 0x3031, CURRENT = 0x3230</enum>
-    <platInit/>
-    <writeable/>
-</attribute>
-
-<!--
-*******************************************************************************
-The following attributes can be queried from LRDIMM type DDR4 DIMMs only
-*******************************************************************************
--->
-
-<attribute>
-    <id>ATTR_SPD_DIMM_MODULE_ATTRIBUTES</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Indicates number of registers used and number of rows of DRAM's on LRDIMM.
-	     Byte 131, Bits 1-0 for # of registers used on LRDIMM. 
-  	     00 - Undefined , 01 - 1 Register , 10,11 -Reserved.
-        Byte 131, Bits 3-2 for # of rows of DRAM's on LRDIMM
-         00,11- Undefined, 01- 1 Row, 10 - 2 Rows.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_REGISTER_MANF_ID</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Manufacturer of the memory buffer on DIMM module. 
-	     Located in DDR4 SPD bytes 133(LSB) and 134(MSB).
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_ADDR_MAP_REG_TO_DRAM</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Address mapping from Register to DRAM and Drive strength.
-	     Located in DDR4 SPD bytes 136 and 137.
-        Byte 136 bit 0, 0 - Standard, 1 - Mirrored.
-        Byte 137 has drive strength for control and command/Address.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_REG_OUTPUT_DRV_STRENGTH_CK</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Drive strength for clock outputs of the registering clock driver.
-	     Located in DDR4 SPD bytes 138.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_VREF_DQ_RANK0</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        VREFDQ value for the package rank 0 DRAM's.
-	     Located in DDR4 SPD bytes 140.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_VREF_DQ_RANK1</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        VREFDQ value for the package rank 1 DRAM's.
- 	     Located in DDR4 SPD bytes 141.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_VREF_DQ_RANK2</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        VREFDQ value for the package rank 2 DRAM's.
-	     Located in DDR4 SPD bytes 142.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_VREF_DQ_RANK3</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        VREFDQ value for the package rank 3 DRAM's.
-	     Located in DDR4 SPD bytes 143.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_BUF_VREF_DQ_FOR_DRAM</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        VREFDQ value for the data buffer component.
-	     Located in DDR4 SPD bytes 144.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_BUF_MDQ_DRV_LESS_THAN_1866</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Data Buffer MDQ Drive strength and RTT for data rate less than 1866.
-	     Located in DDR4 SPD bytes 145.
-        Bits 2-0 for MDQ Read Termination strength.
-        Bits 6-4 for MDQ Drive strength.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_BUF_MDQ_DRV_1866_2400</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Data Buffer MDQ Drive strength and RTT for data rate between 1866 and 2400.
-	     Located in DDR4 SPD bytes 146.
-        Bits 2-0 for MDQ Read Termination strength.
-        Bits 6-4 for MDQ Drive strength.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_BUF_MDQ_DRV_2400_3200</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Data Buffer MDQ Drive strength and RTT for data rate between 2400 and 3200.
-	     Located in DDR4 SPD bytes 147.
-        Bits 2-0 for MDQ Read Termination strength.
-        Bits 6-4 for MDQ Drive strength.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_DRV_STRENGTH</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM Drive strength for all the data rates between 1866 and 3200.
-	     Located in DDR4 SPD bytes 148.
-        Bits 1-0 for Datarate less than 1866.
-        Bits 3-2 for Data rate between 1866 and 2400.
-        Bits 5-4 for data rate between 2400 and 3200.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_WR_LESS_THAN_1866</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_WR) for data rates less than 1866
-	     Located in DDR4 SPD bytes 149 bits 2-0.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_NOM_LESS_THAN_1866</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_NOM)for data rates less than 1866
-	     Located in DDR4 SPD bytes 149 bits 5-3.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_WR_1866_2400</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_WR) for data rates between 1866 and 2400.
-	     Located in DDR4 SPD bytes 150 bits 2-0.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_NOM_1866_2400</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_NOM)for data rates between 1866 and 2400.
-	     Located in DDR4 SPD bytes 150 bits 5-3.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_WR_2400_3200</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_WR) for data rates between 2400 and 3200.
-	     Located in DDR4 SPD bytes 151 bits 2-0.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_NOM_2400_3200</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_NOM)for data rates between 2400 and 3200.
-	     Located in DDR4 SPD bytes 151 bits 5-3.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_PARK_LESS_THAN_1866</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_PARK)for data rates less than 1866.
-	     Located in DDR4 SPD bytes 152.
-	     Bit 2-0 for package ranks 0 and 1.
-	     Bit 5-3 for package ranks 2 and 3.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_PARK_1866_2400</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_PARK)for data rates between 1866 and 2400.
-	     Located in DDR4 SPD bytes 153.
-	     Bit 2-0 for package ranks 0 and 1.
-  	     Bit 5-3 for package ranks 2 and 3.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_LR_DRAM_ODT_RTT_PARK_2400_3200</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        DRAM ODT (RTT_PARK)for data rates between 2400 and 3200.
-	     Located in DDR4 SPD bytes 154.
-	     Bit 2-0 for package ranks 0 and 1.
-	     Bit 5-3 for package ranks 2 and 3.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<!--
-*******************************************************************************
-The following attributes are DDR3 specific. Regular HWPs should query the DDR
-neutral attribute, these attributes should only be queried by the Accessor HWP
-that handles the DDR neutral attribute.
-*******************************************************************************
--->
-<attribute>
-    <id>ATTR_SPD_SDRAM_BANKS_DDR3</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Number of banks.
-        Located in DDR3 SPD byte 4, bits 6-4.
-        This attribute must only be used by an Accessor HWP.
-        Regular HWPs must use ATTR_SPD_SDRAM_BANKS.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>B8 = 0x00, B16 = 0x01, B32 = 0x02, B64 = 0x03</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_NOMINAL_VOLTAGE_DDR3</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Nominal voltage (bitmap).
-        Located in DDR3 SPD byte 6, bits 2-0.
-        This attribute must only be used by an Accessor HWP.
-        Regular HWPs must use ATTR_SPD_MODULE_NOMINAL_VOLTAGE.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>NOTOP1_5 = 0x01, OP1_35 = 0x02, OP1_2X = 0x04</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_CAS_LATENCIES_SUPPORTED_DDR3</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        CAS Latencies supported (bitmap).
-        Located in DDR3 SPD byte 14 (LSB) and byte 15.
-        This attribute must only be used by an Accessor HWP.
-        Regular HWPs must use ATTR_SPD_CAS_LATENCIES_SUPPORTED.
-    </description>
-    <valueType>uint32</valueType>
-    <enum>
-        CL_18 = 0x00004000,
-        CL_17 = 0x00002000,
-        CL_16 = 0x00001000,
-        CL_15 = 0x00000800,
-        CL_14 = 0x00000400,
-        CL_13 = 0x00000200,
-        CL_12 = 0x00000100,
-        CL_11 = 0x00000080,
-        CL_10 = 0x00000040,
-        CL_9  = 0x00000020,
-        CL_8  = 0x00000010,
-        CL_7  = 0x00000008,
-        CL_6  = 0x00000004,
-        CL_5  = 0x00000002,
-        CL_4  = 0x00000001
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_REVISION_CODE_DDR3</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Revision Code.
-        Located in DDR3 SPD bytes 146 (LSB) to 147.
-        This attribute must only be used by an Accessor HWP.
-        Regular HWPs must use ATTR_SPD_MODULE_REVISION_CODE.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-</attribute>
-
-<!--
-*******************************************************************************
-The following attributes are DDR4 specific. Regular HWPs should query the DDR
-neutral attribute, these attributes should only be queried by the Accessor HWP
-that handles the DDR neutral attribute.
-*******************************************************************************
--->
-<attribute>
-    <id>ATTR_SPD_SDRAM_BANKS_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Number of banks.
-        Located in DDR4 SPD byte 4, bits 5-4.
-        This attribute must only be used by an Accessor HWP.
-        Regular HWPs must use ATTR_SPD_SDRAM_BANKS.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>B4 = 0x00, B8 = 0x01</enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_NOMINAL_VOLTAGE_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Nominal voltage (bitmap).
-        Located in DDR4 SPD byte 11, bits 5-0.
-        This attribute must only be used by an Accessor HWP.
-        Regular HWPs must use ATTR_SPD_MODULE_NOMINAL_VOLTAGE.
-    </description>
-    <valueType>uint8</valueType>
-    <!-- Note that current DDR4 spec has TBD for bits 2-5 -->
-    <enum>
-        OP1_2V = 0x01, END1_2V = 0x02,
-        OPTBD1V = 0x04, ENDTBD1V = 0x08,
-        OPTBD2V = 0x10, ENDTBD2V = 0x20
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_CAS_LATENCIES_SUPPORTED_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        CAS Latencies supported (bitmap).
-        Located in DDR4 SPD byte 20 (LSB) through byte 23.
-        This attribute must only be used by an Accessor HWP.
-        Regular HWPs must use ATTR_SPD_CAS_LATENCIES_SUPPORTED.
-    </description>
-    <valueType>uint32</valueType>
-    <enum>
-        CL_24 = 0x00020000,
-        CL_23 = 0x00010000,
-        CL_22 = 0x00008000,
-        CL_21 = 0x00004000,
-        CL_20 = 0x00002000,
-        CL_19 = 0x00001000,
-        CL_18 = 0x00000800,
-        CL_17 = 0x00000400,
-        CL_16 = 0x00000200,
-        CL_15 = 0x00000100,
-        CL_14 = 0x00000080,
-        CL_13 = 0x00000040,
-        CL_12 = 0x00000020,
-        CL_11 = 0x00000010,
-        CL_10 = 0x00000008,
-        CL_9  = 0x00000004,
-        CL_8  = 0x00000002,
-        CL_7  = 0x00000001
-    </enum>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODULE_REVISION_CODE_DDR4</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Module Revision Code.
-        Located in DDR4 SPD byte 349
-        This attribute must only be used by an Accessor HWP.
-        Regular HWPs must use ATTR_SPD_MODULE_REVISION_CODE.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<!--
-*******************************************************************************
-The following attributes are from Centaur VPD. Consider moving them from this
-file
-*******************************************************************************
--->
-
-<attribute>
-    <id>ATTR_VPD_DRAM_ADDRESS_MIRRORING</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>
-        The C-DIMM ranks that have address mirroring.
-        This data is in the Record:VSPD, Keyword:AM field in C-DIMM VPD.
-        This attribute is only valid for C-DIMMs, an error should be returned if queried from IS-DIMMs.
-    Note: Muliple ranks can be mirrored.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-        RANK0_MIRRORED = 0x08,
-        RANK1_MIRRORED = 0x04,
-        RANK2_MIRRORED = 0x02,
-        RANK3_MIRRORED = 0x01
-    </enum>
-    <platInit/>
-    <writeable/>
-    <array> 2 2</array>
-</attribute>
-
-<!-- Attributes added to support the VPD which was formally using the EFF settings -->
-
-<attribute>
-    <id>ATTR_VPD_ODT_RD</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Read ODT. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT),mss_eff_cnfg_termination
-consumer: various.C files and initfiles
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_ODT_WR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Write ODT. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-Creator: VPD(MT)/ mss_eff_cnfg_termination
-consumer: various.C and initfile
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DRAM_RON</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DRAM Ron. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-OHM48 is for DDR4.
-creator: VPD(MT)/mss_eff_cnfg_termination
-consumer: various.C files (no initfile)
-firmware notes: none
-This Attribute is to be interpreted as an Integer </description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 0, OHM34 = 34, OHM40 = 40, OHM48 = 48</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DRAM_RTT_NOM</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DRAM Rtt_Nom. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT),mss_eff_cnfg_termination
-consumer: various.C files (no initfiles)
-firmware notes: none
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, OHM20 = 20, OHM30 = 30, OHM34 = 34, OHM40 = 40, OHM48 = 48, OHM60 = 60, OHM80 = 80, OHM120 = 120, OHM240 = 240</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DRAM_RTT_WR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DRAM Rtt_WR. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-Creator: VPD(MT), mss_eff_cnfg_termination
-consumer: various.C files (no initfiles)
-firmware notes: none
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, OHM60 = 60, OHM120 = 120, OHM240 = 240, HIGHZ = 1</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DRAM_RTT_PARK</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DRAM Rtt_PARK. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-	RTT_Park value. This is for DDR4 MRS5.Each memory channel will have a value.
-Creator: VPD(MT), mss_eff_cnfg_termination
-consumer: various.C files (no initfiles)
-firmware notes: none
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, 60OHM = 60, 120OHM = 120, 40OHM = 40, 240OHM = 240, 48OHM = 48, 80OHM = 80, 34OHM = 34</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DRAM_WR_VREF</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DRAM Write Vref. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT) or mss_eff_cnfg_termination
-consumer: various.C and initfile
-firmware notes: none
-This is the nominal value
-This is for DDR3
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint32</valueType>
-    <enum>VDD420 = 420, VDD425 = 425, VDD430 = 430, VDD435 = 435, VDD440 = 440, VDD445 = 445, VDD450 = 450, VDD455 = 455, VDD460 = 460, VDD465 = 465, VDD470 = 470, VDD475 = 475, VDD480 = 480, VDD485 = 485, VDD490 = 490, VDD495 = 495, VDD500 = 500, VDD505 = 505, VDD510 = 510, VDD515 = 515, VDD520 = 520, VDD525 = 525, VDD530 = 530, VDD535 = 535, VDD540 = 540, VDD545 = 545, VDD550 = 550, VDD555 = 555, VDD560 = 560, VDD565 = 565, VDD570 = 570, VDD575 = 575</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DRAM_WRDDR4_VREF</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DRAM Write Vref. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT) or mss_eff_cnfg_termination
-consumer: various
-firmware notes: none
-This is the nominal value
-This is for DDR4
-The value is from 0 to 50</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_DRV_IMP_DQ_DQS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur DQ and DQS Drive Impedance Used in various locations and comes from the MT Keyword of the VPD or  is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT)/mss_eff_cnfg_termination
-consumer: initfile,various.C files
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>OHM24_FFE0 = 0x0A, OHM30_FFE0 = 0x08,
-OHM30_FFE480 = 0x48, OHM30_FFE240 = 0x38, OHM30_FFE160 = 0x28, OHM30_FFE120 = 0x18, OHM34_FFE0 = 0x07, OHM34_FFE480 = 0x47, OHM34_FFE240 = 0x37, OHM34_FFE160 = 0x27, OHM34_FFE120 = 0x17, OHM40_FFE0 = 0x06, OHM40_FFE480 = 0x46, OHM40_FFE240 = 0x36, OHM40_FFE160 = 0x26, OHM40_FFE120 = 0x16</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_DRV_IMP_ADDR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Address Drive Impedance Used in various locations and comes from the MT keyword of the VPD or  is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_termination
-consumer: initfile and various.C
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>OHM15 = 15, OHM20 = 20, OHM30 = 30, OHM40 = 40</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_DRV_IMP_CNTL</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Control Drive Impedance Used in various locations and comes from the MT keyword of the VPD or  is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT)/mss_eff_cnfg_termination
-consumer: initfile,various .C
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>OHM15 = 15, OHM20 = 20, OHM30 = 30, OHM40 = 40</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_DRV_IMP_CLK</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Clock Drive Impedance Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT),mss_eff_cnfg_termination
-consumer: initfiles,various
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>OHM15 = 15, OHM20 = 20, OHM30 = 30, OHM40 = 40</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_DRV_IMP_SPCKE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Spare Clock Drive Impedance Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT) , mss_eff_cnfg_termination
-consumer: initfiles, various.C
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>OHM15 = 15, OHM20 = 20, OHM30 = 30, OHM40 = 40</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_RCV_IMP_DQ_DQS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur DQ and DQS Receiver Impedance Used in various locations and it comes from the VPD MT keyword for custom DIMMs or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD, mss_eff_cnfg_termination
-Consumer: initfile + C code
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint8</valueType>
-    <enum>OHM15 = 15, OHM20 = 20, OHM30 = 30, OHM40 = 40, OHM48 = 48, OHM60 = 60,  OHM80 = 80, OHM120 = 120, OHM160 = 160, OHM240 = 240</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_SLEW_RATE_DQ_DQS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur DQ and DQS Slew Rate Used in various locations and comes from the MT keyword of the VPD or  is computed in mss_eff_cnfg_termination. Slowest slew rate is 0, incrementing by one. The lower the number the slower the slew rate the higher the faster. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT), mss_eff_cnfg_termination
-consumer: initfiles,various.C
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer except MAX</description>
-    <valueType>uint8</valueType>
-    <enum>SLEW_3V_NS = 3,
-SLEW_4V_NS = 4,
-SLEW_5V_NS = 5,
-SLEW_6V_NS = 6,
-SLEW_MAXV_NS = 7</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_SLEW_RATE_ADDR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Address Slew Rate Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Slowest slew rate is 0, incrementing by one. The lower the number the slower the slew rate the higher the faster. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT),mss_eff_cnfg_termination
-consumer: initfile,various .C files
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer except Max</description>
-    <valueType>uint8</valueType>
-    <enum>SLEW_3V_NS = 3,
-SLEW_4V_NS = 4,
-SLEW_5V_NS = 5,
-SLEW_6V_NS = 6,
-SLEW_MAXV_NS = 7</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_SLEW_RATE_CLK</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Clock Slew Rate Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Slowest slew rate is 0, incrementing by one. The lower the number the slower the slew rate the higher the faster. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT)mss_eff_cnfg_termination
-consumer: initfile,various.C files
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer except max</description>
-    <valueType>uint8</valueType>
-    <enum>SLEW_3V_NS = 3,
-SLEW_4V_NS = 4,
-SLEW_5V_NS = 5,
-SLEW_6V_NS = 6,
-SLEW_MAXV_NS = 7</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_SLEW_RATE_SPCKE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Spare Clock Slew Rate Used in various locations and comes from the MT keyword or is computed in mss_eff_cnfg_termination. Slowest slew rate is 0, incrementing by one. The lower the number the slower the slew rate the higher the faster. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT) or mss_eff_cnfg_termination
-consumer: initfile,various.C
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer except max</description>
-    <valueType>uint8</valueType>
-    <enum>SLEW_3V_NS = 3,
-SLEW_4V_NS = 4,
-SLEW_5V_NS = 5,
-SLEW_6V_NS = 6,
-SLEW_MAXV_NS = 7
-</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_SLEW_RATE_CNTL</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Control Slew Rate Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Slowest slew rate is 0, incrementing by one. The lower the number the slower the slew rate the higher the faster. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT),mss_eff_cnfg_termination
-consumer:initfile, various .C files
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer except for max</description>
-    <valueType>uint8</valueType>
-    <enum>SLEW_3V_NS = 3,
-SLEW_4V_NS = 4,
-SLEW_5V_NS = 5,
-SLEW_6V_NS = 6,
-SLEW_MAXV_NS = 7
-</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_RD_VREF</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Read Vref. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-Creator: VPD(MT) or mss_eff_cnfg_termination
-consumer: various.C and initfiles
-firmware notes: none
-This is the nominal value
-This Attribute is to be interpreted as an Integer</description>
-    <valueType>uint32</valueType>
-    <enum>VDD40375 = 40375, VDD41750 = 41750, VDD43125 = 43125, VDD44500 = 44500, VDD45875 = 45875, VDD47250 = 47250, VDD48625 = 48625, VDD50000 = 50000, VDD51375 = 51375, VDD52750 = 52750, VDD54125 = 54125, VDD55500 = 55500, VDD56875 = 56875, VDD58250 = 58250, VDD59625 = 59625, VDD61000 = 61000, VDD60375 = 60375, VDD61750 = 61750, VDD63125 = 63125, VDD64500 = 64500, VDD65875 = 65875, VDD67250 = 67250, VDD68625 = 68625, VDD70000 = 70000, VDD71375 = 71375, VDD72750 = 72750, VDD74125 = 74125, VDD75500 = 75500, VDD76875 = 76875, VDD78250 = 78250, VDD79625 = 79625, VDD81000 = 81000</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CLK_P0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CLK_P0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CLK_P1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CLK_P1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CLK_P0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CLK_P0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CLK_P1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CLK_P1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A2</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A3</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A3</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A4</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A4</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A5</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A5</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A6</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A6</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A7</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A7</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A8</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A8</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A9</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A9</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A10</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A10</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A11</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A11</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A12</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A12</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A13</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A13</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A14</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A14</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_A15</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_A15</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_BA0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_BA0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_BA1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_BA1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_BA2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_BA2</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_CASN</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_CASN</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_RASN</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_RASN</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_CMD_WEN</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_CMD_WEN</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_PAR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_PAR</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M_ACTN</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M_ACTN</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CKE0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_CKE0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CKE1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_CKE1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CKE2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_CKE2</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CKE3</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_CKE3</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CSN0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_CSN0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CSN1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_CSN1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CSN2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_CSN2</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CSN3</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_CSN3</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_ODT0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_ODT0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_ODT1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M0_CNTL_ODT1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CKE0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_CKE0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CKE1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_CKE1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CKE2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_CKE2</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CKE3</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_CKE3</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CSN0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_CSN0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CSN1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_CSN1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CSN2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_CSN2</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CSN3</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_CSN3</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_ODT0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_ODT0</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_ODT1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Phase rotator value that comes from MR keyword on the CDIMM VPD.  This controls the IO M1_CNTL_ODT1</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_PERIODIC_MEMCAL_MODE_OPTIONS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Settings for periodic CAL - zcal 1, syscal 1, centering 0, rdclk 1, dqs align 1, rdclk_update_dis 0, dutycycle 0, and power dis (dqs) 1. Second byte has repeat as 000, mpr mode as 0, mba as 11, and the spares as 00
-</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<!-- Spare attribute found in eclipz/hwpf/hwp/xml/attribute_info/dimm_attributes.xml -->
-<!-- <attribute> -->
-<!--     <id>ATTR_VPD_DIMM_SPARE</id>  -->
-<!--     <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>  -->
-<!--     <description>Spare DRAM availability. It comes from the VPD or SPD in ISDIMM systems</description>  -->
-<!--     <valueType>uint8</valueType>  -->
-<!--     <enum>NO_SPARE = 0, LOW_NIBBLE = 1, HIGH_NIBBLE = 2, FULL_BYTE = 3</enum>  -->
-<!--     <platInit/>  -->
-<!--     <odmVisable/>  -->
-<!--     <odmChangeable/>  -->
-<!--     <array> 2 2 4</array>  -->
-<!-- </attribute>  -->
-
-<attribute>
-    <id>ATTR_VPD_CKE_PRI_MAP</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD keyword MT bytes 54 and 55 MT(54:55) for the Logical DIMM associated with port A.  Bytes 118:119 for port B, 182:183 for port C and 246:247 for port D.  In the end, the AB and CD portions form a 32 bit word for each mba to write into the corresponding ddrphy register</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <array>2</array>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CKE_PWR_MAP</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD keyword MT bytes 56 to 59 MT(56:59) for the Logical DIMM associated with port A.  Bytes 120:123 for port B, 184:187 for port C and 248:251 for port D. The values for Port A concatenated with port B forms the value for one MBA.  C concat D forms the value for the other MBA</description>
-    <valueType>uint64</valueType>
-    <platInit/>
-    <odmVisable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_GPO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD keyword MT bytes 61 MT(61) for the Logical DIMM associated with port A.  Bytes 125 for port B, 189 for port C and 253 for port D</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <array>2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_RLO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD keyword MT byte 60 bits 4:7 for the Logical DIMM associated with port A.  Byte 124 bits 4:7 for port B, 188 bits 4:7 for port C and 252 bits 4:7 for port D</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <array>2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_WLO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD keyword MT byte 60 bits 0:3 for the Logical DIMM associated with port A.  Byte 124 bits 0:3 for port B, 188 bits 0:3 for port C and 252 bits 0:3 for port D</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <array>2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_TSYS_ADR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD MR keyword byte 49 for ports A and B and byte 177 for port C and D.    This means that all ADR blocks use this value on an mba level</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <array>2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_TSYS_DP18</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD MR keyword byte 113 for ports A and B and byte 241 for port C and D.  This means all DP18 blocks use this value on a mba level</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <array>2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CDIMM_SENSOR_MAP_PRIMARY</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Custom DIMM Sensor Map for Primary I2C Port (1 byte of data):
-0x00 No sensors attached
-0x01 DIMM sensor 0 attached
-0x02 DIMM sensor 1 attached
-0x04 DIMM sensor 2 attached
-0x08 DIMM sensor 3 attached
-0x10 DIMM sensor 4 attached
-0x20 DIMM sensor 5 attached
-0x40 DIMM sensor 6 attached
-0x80 DIMM sensor 7 attached
-Comes from the VPD MW Keyword</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_CDIMM_SENSOR_MAP_SECONDARY</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Custom DIMM Sensor Map for Secondary I2C Port (1 byte of data):
-0x00 No sensors attached
-0x01 DIMM sensor 0 attached
-0x02 DIMM sensor 1 attached
-0x04 DIMM sensor 2 attached
-0x08 DIMM sensor 3 attached
-0x10 DIMM sensor 4 attached
-0x20 DIMM sensor 5 attached
-0x40 DIMM sensor 6 attached
-0x80 DIMM sensor 7 attached
-Comes from the VPD MW Keyword</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_DRAM_2N_MODE_ENABLED</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Describes if this MBA is in 2N address mode.  The DIMM attributes associated with this MBA describes if this mode is needed for SI. Come from the VPD and consumed in the mba_def.initfile.</description>
-    <valueType>uint8</valueType>
-    <enum>FALSE = 0, TRUE = 1</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_CDIMM_VPD_MASTER_POWER_SLOPE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Master Power Slope that comes from the VPD MW Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_CDIMM_VPD_MASTER_POWER_INTERCEPT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Master Power Intercept that comes from the VPD MW Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_CDIMM_VPD_SUPPLIER_POWER_SLOPE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Supplier Power Slope that comes from the VPD the MV Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_CDIMM_VPD_SUPPLIER_POWER_INTERCEPT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Supplier Power Intercept that comes from MV Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_L4_BANK_DELETE_VPD</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>L4 Bank Delete settings in VPD.
-Denotes what banks have been deleted from the L4.
-Data will be pulled from CDIMM VPD if CDIMM present.
-Data will be pulled from backplane VPD if IS DIMMs present.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <persistent/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_MT_VERSION_BYTE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Describes the Version of MT Keyword</description>
-    <valueType>uint8</valueType>
-   <platInit/>
-     <odmVisable/>
- </attribute>
-
-<attribute>
-    <id>ATTR_VPD_MR_VERSION_BYTE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Describes the Version of MR Keyword</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-     <odmVisable/>
- </attribute>
- 
- <attribute>
-    <id>ATTR_VPD_MR_DATA_CONTROL_BYTE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Describes the DATA control byte from MR</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-     <odmVisable/>
- </attribute>
- 
- <attribute>
-    <id>ATTR_VPD_MT_DATA_CONTROL_BYTE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Describes the DATA control byte from MT</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-     <odmVisable/>
- </attribute>
- 
- <attribute>
-    <id>ATTR_VPD_VM_KEYWORD</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Fetches the VM Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-     <odmVisable/>
- </attribute>
- 
- <attribute>
-    <id>ATTR_VPD_VD_KEYWORD</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Fetch the VD keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-     <odmVisable/>
- </attribute>
- 
- <attribute>
-    <id>ATTR_VPD_DW_KEYWORD</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Describes Centaur Voltage from DW keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-     <odmVisable/>
- </attribute>
- 
-
-<attribute>
-    <id>ATTR_SPD_MODSPEC_COM_REF_RAW_CARD_REV</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Reference Raw Card Revision
-        Located in DDR3 SPD byte 62 bits 6-5.
-        Located in DDR4 SPD byte 130 bits 6-5.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SPD_MODSPEC_COM_REF_RAW_CARD</id>
-    <targetType>TARGET_TYPE_DIMM</targetType>
-    <description>
-        Reference Raw Card
-        Located in DDR3 SPD byte 62 bit 7 + bits 4-0.
-        Located in DDR4 SPD byte 130 bit 7 + bits 4-0.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-    A = 0x00, B = 0x01, C = 0x02, D = 0x03, E = 0x04, F = 0x05, G = 0x06, H = 0x07, J = 0x08, K = 0x09, L = 0x0a, M = 0x0b, N = 0x0c, P = 0x0d, R = 0x0e, T = 0x0f, U = 0x10, V = 0x11, W = 0x12, Y = 0x13, AA = 0x14, AB = 0x15, AC = 0x16, AD = 0x17, AE = 0x18, AF = 0x19, AG = 0x1a, AH = 0x1b, AJ = 0x1c, AK = 0x1d, AL = 0x1e, AM = 0x20, AN = 0x21, AP = 0x22, AR = 0x23, AT = 0x24, AU = 0x25, AV = 0x26, AW = 0x27, AY = 0x28, BA = 0x29, BB = 0x2a, BC = 0x2b, BD = 0x2c, BE = 0x2d, BF = 0x2e, BG = 0x2f, BH = 0x30, BJ = 0x31, BK = 0x32, BL = 0x33, BM = 0x34, BN = 0x35, BP = 0x36, BR = 0x37, BT = 0x38, BU = 0x39, BV = 0x3a, BW = 0x3b, BY = 0x3c, CA = 0x3d, CB = 0x3e, ZZ = 0x3f
-    </enum>
-    <platInit/>
-</attribute>
-
- <attribute>
-     <id>ATTR_VPD_POWER_CONTROL_CAPABLE</id>
-     <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-     <description>Capable power control settings.</description>
-     <valueType>uint8</valueType>
-     <enum>NONE = 0x00, SLOWEXIT_CAPABLE = 0x01, FASTEXIT_CAPABLE = 0x02, FASTSLOW_CAPABLE = 0x03</enum>
-     <platInit/>
-     <odmVisable/>
- </attribute>
-
- <attribute>
-     <id>ATTR_VPD_DIMM_RCD_IBT</id>
-     <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RCD IBT. Used in mss_dram_init and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each dimm will have a value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint32</valueType>
-    <enum>IBT_OFF = 0, IBT_100 = 100, IBT_150 = 150, IBT_200 = 200, IBT_300 = 300</enum>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
- <attribute>
-     <id>ATTR_VPD_RD_CTR_WINDAGE_OFFSET</id>
-     <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Derived from calibration/characterization of read centering. Number of windage offset in units of pico-seconds[ps] with sign bit0 (0b0=positive, 0b1=negative) and value in bits1..31, so 0x80000023 for example would mean "-35ps". Can be overwritten by ODM vendors if done from VPD.  Each port will have a value.
-creator: VPD
-consumer: mss_draminit_training_adv
-firmware notes: none</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-    <writeable/>
-</attribute>
-
-
-<attribute>
-    <id>ATTR_ISDIMM_MBVPD_INDEX</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>VPD index for associated chip's memory buffer VPD</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_CDIMM_VPD_MASTER_TOTAL_POWER_SLOPE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Master Total Power Slope that comes from the VPD MW Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_CDIMM_VPD_MASTER_TOTAL_POWER_INTERCEPT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Master Total Power Intercept that comes from the VPD MW Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_CDIMM_VPD_SUPPLIER_TOTAL_POWER_SLOPE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Supplier Total Power Slope that comes from the VPD MV Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_CDIMM_VPD_SUPPLIER_TOTAL_POWER_INTERCEPT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Supplier Total Power Intercept that comes from the VPD MV Keyword</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-</attributes>
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_bulk_pwr_throttles.xml b/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_bulk_pwr_throttles.xml
deleted file mode 100644
index 600e0c49b..000000000
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_bulk_pwr_throttles.xml
+++ /dev/null
@@ -1,56 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_bulk_pwr_throttles.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2013,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_bulk_pwr_throttles.xml,v 1.5 2014/06/02 13:11:07 pardeik Exp $ -->
-<!-- For file ../../ipl/fapi/mss_bulk_pwr_throttles.C -->
-<!-- // *! OWNER NAME  : Michael Pardeik   Email: pardeik@us.ibm.com -->
-<!-- // *! BACKUP NAME : Jacob Sloat       Email: jdsloat@us.ibm.com -->
-
-<!-- Original Source for RC_MSS_NOT_ENOUGH_AVAILABLE_DIMM_POWER memory_errors.xml -->
-  <hwpError>
-    <rc>RC_MSS_NOT_ENOUGH_AVAILABLE_DIMM_POWER</rc>
-    <description>Unable to find throttle setting that has DIMM power underneath the limit.</description>
-  <ffdc>PAIR_POWER</ffdc>
-  <ffdc>PAIR_WATT_TARGET</ffdc>
-  <callout>
-    <childTargets>
-      <parent>MEM_MBA</parent>
-      <childType>TARGET_TYPE_DIMM</childType>
-    </childTargets>
-    <priority>MEDIUM</priority>
-  </callout>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-  <deconfigure>
-    <childTargets>
-      <parent>MEM_MBA</parent>
-      <childType>TARGET_TYPE_DIMM</childType>
-    </childTargets>
-  </deconfigure>
-</hwpError>
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config.xml b/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config.xml
deleted file mode 100644
index a0cb54bbd..000000000
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config.xml
+++ /dev/null
@@ -1,976 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2013,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: memory_mss_eff_config.xml,v 1.6 2015/08/04 21:30:25 asaetow Exp $ -->
-<!-- For file ../../ipl/fapi/mss_eff_config.C -->
-<!-- // *! OWNER NAME  : Anuwat Saetow     Email: asaetow@us.ibm.com -->
-<!-- // *! BACKUP NAME : Mark Bellows      Email: bellows@us.ibm.com -->
-<hwpErrors>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_INVALID_DDR4_SPD_TB</rc>
-    <description>Invalid DDR4 MTB/FTB Timebase received from SPD attribute</description>
-    <FFDC>TARGET_DIMM</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_DIMM</target>
-        <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-        <target>TARGET_DIMM</target>
-    </deconfigure>
-  </hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_SPD_DRAM_GEN</rc>
-    <description>Incompatable SPD DRAM generation</description>
-    <FFDC>TARGET_DIMM</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_DIMM</target>
-        <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-        <target>TARGET_DIMM</target>
-    </deconfigure>
-  </hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_INVALID_RDIMM_FREQ</rc>
-    <description>Invalid RDIMM ATTR_MSS_FREQ, freq is higher than 1600Mbps</description>
-    <FFDC>TARGET_MBA</FFDC>
-        <ffdc>INVALID_RDIMM_FREQ</ffdc>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_INVALID_RDIMM_VOLT</rc>
-    <description>Invalid RDIMM ATTR_MSS_VOLT, Volt is less than 1.2V</description>
-    <FFDC>TARGET_MBA</FFDC>
-        <ffdc>INVALID_RDIMM_VOLT</ffdc>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_INVALID_RDIMM_RCD_IBT</rc>
-    <description>Invalid RDIMM_RCD_IBT</description>
-    <FFDC>TARGET_MBA</FFDC>
-        <ffdc>INVALID_RDIMM_RCD_IBT_U32ARRAY_0_0</ffdc>
-        <ffdc>INVALID_RDIMM_RCD_IBT_U32ARRAY_0_1</ffdc>
-        <ffdc>INVALID_RDIMM_RCD_IBT_U32ARRAY_1_0</ffdc>
-        <ffdc>INVALID_RDIMM_RCD_IBT_U32ARRAY_1_1</ffdc>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_INVALID_RDIMM_RCD_OUTPUT_TIMING</rc>
-    <description>Invalid RDIMM_RCD_OUTPUT_TIMING</description>
-    <FFDC>TARGET_MBA</FFDC>
-        <ffdc>INVALID_RDIMM_RCD_OUTPUT_TIMING_U8ARRAY_0_0</ffdc>
-        <ffdc>INVALID_RDIMM_RCD_OUTPUT_TIMING_U8ARRAY_0_1</ffdc>
-        <ffdc>INVALID_RDIMM_RCD_OUTPUT_TIMING_U8ARRAY_1_0</ffdc>
-        <ffdc>INVALID_RDIMM_RCD_OUTPUT_TIMING_U8ARRAY_1_1</ffdc>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_LRDIMM_INVALID_EXEC</rc>
-    <description>Invalid exec of mss_lrdimm_eff_config function in
-        mss_eff_config </description>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_INVALID_TERM_EXEC</rc>
-    <description>Invalid exec of mss_eff_config_termination function in
-         mss_eff_config </description>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_DDR4_INVALID_EXEC</rc>
-    <description>Invalid exec of mss_eff_config_ddr4 function in
-         mss_eff_config </description>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_MISMATCH_EMPTY</rc>
-    <description>Plug rule violation, one position is empty but other are present
-        </description>
-    <FFDC>TARGET_MBA</FFDC>
-	<ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_0</ffdc>
-	<ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_1</ffdc>
-	<ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_0</ffdc>
-	<ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_1</ffdc>
-    <callout>
-        <procedure>MEMORY_PLUGGING_ERROR</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_MISMATCH_SIDE</rc>
-    <description>Plug rule violation, sides do not match
-        </description>
-    <FFDC>TARGET_MBA</FFDC>
-	<ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_0</ffdc>
-	<ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_1</ffdc>
-	<ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_0</ffdc>
-	<ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_1</ffdc>
-
-    <callout>
-        <procedure>MEMORY_PLUGGING_ERROR</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_MISMATCH_TOP</rc>
-    <description>Plug rule violation,  top and bottom do not match
-        </description>
-    <FFDC>TARGET_MBA</FFDC>
-	<ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_0</ffdc>
-	<ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_1</ffdc>
-	<ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_0</ffdc>
-	<ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_1</ffdc>
-
-    <callout>
-        <procedure>MEMORY_PLUGGING_ERROR</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_GEN</rc>
-    <description>Incompatable DRAM generation 
-        </description>
-    <FFDC>TARGET_MBA</FFDC>
-	<ffdc>DRAM_DEVICE_TYPE_0_0</ffdc>
-	<ffdc>DRAM_DEVICE_TYPE_0_1</ffdc>
-	<ffdc>DRAM_DEVICE_TYPE_1_0</ffdc>
-	<ffdc>DRAM_DEVICE_TYPE_1_1</ffdc>
-
-    <callout>
-        <procedure>MEMORY_PLUGGING_ERROR</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_TYPE</rc>
-    <description>Incompatable DIMM type
-        </description>
-    <FFDC>TARGET_MBA</FFDC>
-	<ffdc>MODULE_TYPE_0_0</ffdc>
-	<ffdc>MODULE_TYPE_0_1</ffdc>
-	<ffdc>MODULE_TYPE_1_0</ffdc>
-	<ffdc>MODULE_TYPE_1_1</ffdc>
-
-    <callout>
-        <procedure>MEMORY_PLUGGING_ERROR</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_RANKS</rc>
-    <description>Incompatable DIMM ranks
-        </description>
-    <FFDC>TARGET_MBA</FFDC>
-	<ffdc>NUM_RANKS_0_0</ffdc>
-	<ffdc>NUM_RANKS_0_1</ffdc>
-	<ffdc>NUM_RANKS_1_0</ffdc>
-	<ffdc>NUM_RANKS_1_1</ffdc>
-
-    <callout>
-        <procedure>MEMORY_PLUGGING_ERROR</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_BANKS</rc>
-    <description>Incompatable DIMM banks
-        </description>
-    <FFDC>TARGET_MBA</FFDC>
-	<ffdc>SDRAM_BANKS_0_0</ffdc>
-	<ffdc>SDRAM_BANKS_0_1</ffdc>
-	<ffdc>SDRAM_BANKS_1_0</ffdc>
-	<ffdc>SDRAM_BANKS_1_1</ffdc>
-
-    <callout>
-        <procedure>MEMORY_PLUGGING_ERROR</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_ROWS</rc>
-    <description>Incompatable DIMM rows
-        </description>
-    <FFDC>TARGET_MBA</FFDC>
-	<ffdc>SDRAM_ROWS_0_0</ffdc>
-	<ffdc>SDRAM_ROWS_0_1</ffdc>
-	<ffdc>SDRAM_ROWS_1_0</ffdc>
-	<ffdc>SDRAM_ROWS_1_1</ffdc>
-
-    <callout>
-        <procedure>MEMORY_PLUGGING_ERROR</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_COLUMNS</rc>
-    <description>Incompatable DIMM columns
-        </description>
-    <FFDC>TARGET_MBA</FFDC>
-	<ffdc>SDRAM_COLS_0_0</ffdc>
-	<ffdc>SDRAM_COLS_0_1</ffdc>
-	<ffdc>SDRAM_COLS_1_0</ffdc>
-	<ffdc>SDRAM_COLS_1_1</ffdc>
-
-    <callout>
-        <procedure>MEMORY_PLUGGING_ERROR</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_BUS_WIDTH</rc>
-    <description>Incompatable DRAM primary bus width
-        </description>
-    <FFDC>TARGET_MBA</FFDC>
-	<ffdc>BUS_WIDTH_0_0</ffdc>
-	<ffdc>BUS_WIDTH_0_1</ffdc>
-	<ffdc>BUS_WIDTH_1_0</ffdc>
-	<ffdc>BUS_WIDTH_1_1</ffdc>
-
-    <callout>
-        <procedure>MEMORY_PLUGGING_ERROR</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_UNSUPPORTED_MODULE_MEMORY_BUS_WIDTH</rc>
-    <description>Unsupported DRAM bus width, only 64bit with ECC extension is allowed
-        </description>
-    <ffdc>MODULE_MEMORY_BUS_WIDTH</ffdc>
-    <FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_WIDTH</rc>
-    <description>Incompatable DRAM width
-        </description>
-    <FFDC>TARGET_MBA</FFDC>
-	<ffdc>DRAM_WIDTH_0_0</ffdc>
-	<ffdc>DRAM_WIDTH_0_1</ffdc>
-	<ffdc>DRAM_WIDTH_1_0</ffdc>
-	<ffdc>DRAM_WIDTH_1_1</ffdc>
-
-    <callout>
-        <procedure>MEMORY_PLUGGING_ERROR</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_DRAM_DEVICE_ERROR</rc>
-    <description>Unknown DRAM type
-        </description>
-    <ffdc>DRAM_DEVICE_TYPE</ffdc>
-    <FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_MOD_TYPE_ERROR</rc>
-    <description>Unknown DIMM type
-        </description>
-    <ffdc>MOD_TYPE</ffdc>
-    <FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_SDRAM_BANK_ERROR</rc>
-    <description>Unknown DRAM bank
-        </description>
-    <ffdc>SDRAM_BANKS</ffdc>
-    <FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_SDRAM_ROWS_ERROR</rc>
-    <description>Unknown DRAM rows
-        </description>
-    <ffdc>SDRAM_ROWS</ffdc>
-    <FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_SDRAM_COLS_ERROR</rc>
-    <description>Unknown DRAM cols
-        </description>
-    <ffdc>SDRAM_COLS</ffdc>
-    <FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_DRAM_WIDTH_16_ERROR</rc>
-    <description>Unsupported DRAM width x16
-        </description>
-    <ffdc>DRAM_WIDTH</ffdc>
-    <FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_DRAM_WIDTH_32_ERROR</rc>
-    <description>Unsupported DRAM width x32
-        </description>
-    <ffdc>DRAM_WIDTH</ffdc>
-    <FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_DRAM_WIDTH_ERROR</rc>
-    <description>Unknown DRAM width
-        </description>
-    <FFDC>DRAM_WIDTH</FFDC>
-    <FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_DRAM_DENSITY_ERR</rc>
-    <description>Unsupported DRAM density
-        </description>
-    <ffdc>SDRAM_DENSITY</ffdc>
-    <FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_CWL_CALC_ERR</rc>
-    <description>Error calculating CWL
-        </description>
-    <ffdc>CWL_VAL</ffdc>
-    <FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_RDIMM_UNSUPPORTED_TYPE</rc>
-    <description>Currently unsupported IBM_TYPE
-        </description>
-    <ffdc>UNSUPPORTED_VAL</ffdc>
-    <FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_UDIMM_UNSUPPORTED_TYPE</rc>
-    <description>Currently unsupported IBM_TYPE
-        </description>
-    <ffdc>UNSUPPORTED_VAL</ffdc>
-    <FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_DIMM_UNSUPPORTED_TYPE</rc>
-    <description>Currently unsupported IBM_TYPE
-        </description>
-    <ffdc>UNSUPPORTED_VAL</ffdc>
-    <FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_MSS_FREQ</rc>
-    <description>Invalid ATTR_MSS_FREQ
-        </description>
-    <FFDC>TARGET_MBA</FFDC>
-    <ffdc>FREQ_VAL</ffdc>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>LOW</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-        <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-        <childTargets>
-        <parent>TARGET_MBA</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-
-</hwpError>
-
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config_cke_map.xml b/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config_cke_map.xml
deleted file mode 100644
index 06b6821ff..000000000
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config_cke_map.xml
+++ /dev/null
@@ -1,30 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config_cke_map.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_eff_config_cke_map.xml,v 1.1 2013/06/19 18:27:55 bellows Exp $ -->
-<!-- For file ../../ipl/fapi/mss_eff_config_cke_map.C -->
-<!-- // *! OWNER NAME  : Anuwat Saetow     Email: asaetow@us.ibm.com -->
-<!-- // *! BACKUP NAME : Mark Bellows      Email: bellows@us.ibm.com -->
-
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config_rank_group.xml b/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config_rank_group.xml
deleted file mode 100644
index b229cf18d..000000000
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config_rank_group.xml
+++ /dev/null
@@ -1,93 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config_rank_group.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: memory_mss_eff_config_rank_group.xml,v 1.2 2014/04/01 17:06:22 asaetow Exp $ -->
-<!-- For file ../../ipl/fapi/mss_eff_config_rank_group.C -->
-<!-- // *! OWNER NAME  : Anuwat Saetow     Email: asaetow@us.ibm.com -->
-<!-- // *! BACKUP NAME : Mark Bellows      Email: bellows@us.ibm.com -->
-<!-- //         |          |         | Changed BACKUP to Mark Bellows. -->
-
-<hwpErrors>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_RANK_GROUP_NON_MATCH_RANKS</rc>
-    <description>Plug rule violation in mss_eff_config_rank_group 
-		due to num_ranks_per_dimm not matching.</description>
-    <FFDC>TARGET_MBA</FFDC>
-	<callout>	
-		<procedure>MEMORY_PLUGGING_ERROR</procedure>
-		<priority>HIGH</priority>
-	</callout>
-	
-	<callout>
-		<target>TARGET_MBA</target>
-		<priority>MEDIUM</priority>
-	</callout>
-	
-	<deconfigure>
-		<target>TARGET_MBA</target>
-	</deconfigure>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_RANK_GROUP_NUM_RANKS_NEQ1</rc>
-    <description>Plug rule violation in mss_eff_config_rank_group 
-		due to num_ranks_per_dimm not being set correctly.</description>
-    <FFDC>TARGET_MBA</FFDC>
-	<callout>	
-		<procedure>MEMORY_PLUGGING_ERROR</procedure>
-		<priority>HIGH</priority>
-	</callout>
-
-	<callout>
-		<target>TARGET_MBA</target>
-		<priority>MEDIUM</priority>
-	</callout>	
-
-	<deconfigure>
-		<target>TARGET_MBA</target>
-	</deconfigure>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_RANK_GROUP_NO_MATCH</rc>
-    <description>Plug rule violation in mss_eff_config_rank_group 
-		due to no matching case.</description>
-    <FFDC>TARGET_MBA</FFDC>
-	<callout>	
-		<procedure>MEMORY_PLUGGING_ERROR</procedure>
-		<priority>HIGH</priority>
-	</callout>
-
-	<callout>
-		<target>TARGET_MBA</target>
-		<priority>MEDIUM</priority>
-	</callout>	
-
-	<deconfigure>
-		<target>TARGET_MBA</target>
-	</deconfigure>
-</hwpError>
-<!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config_termination.xml b/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config_termination.xml
deleted file mode 100644
index 9f3c89ce8..000000000
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config_termination.xml
+++ /dev/null
@@ -1,853 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config_termination.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: memory_mss_eff_config_termination.xml,v 1.2 2014/04/07 23:02:10 lapietra Exp $ -->
-<!-- For file ../../ipl/fapi/mss_eff_config_termination.C -->
-<!-- // *! OWNER NAME  : Dave Cadigan      Email: dcadiga@us.ibm.com -->
-<!-- // *! BACKUP NAME : Anuwat Saetow     Email: asaetow@us.ibm.com -->
-
-<hwpErrors>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_LRDIMM_REWRITE_INVALID_EXEC</rc>
-    <description>Invalid exec of LRDIMM function in mss_eff_config_termination
-        </description>
-	<FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_LRDIMM_TERM_INVALID_EXEC</rc>
-    <description>Invalid exec of LRDIMM function in mss_eff_config_termination
-        </description>
-	<FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_LRDIMM_DDR4_TERM_INVALID_EXEC</rc>
-    <description>Invalid exec of DDR4 LRDIMM function in mss_eff_config_termination
-        </description>
-	<FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_DDR4_TERM_ATTS_INVALID_EXEC</rc>
-    <description>Invalid exec of DDR4 term attrs function in mss_eff_config_termination
-        </description>
-	<FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_CREATE_DB_DDR4_INVALID_EXEC</rc>
-    <description>Invalid exec of DDR4 DB function in mss_eff_config_termination
-        </description>
-	<FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_CREATE_RCD_DDR4_INVALID_EXEC</rc>
-    <description>Invalid exec of DDR4 RCD function in mss_eff_config_termination
-        </description>
-	<FFDC>TARGET_MBA</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_FREQ</rc>
-    <description>Invalid ATTR_MSS_FREQ value 
-        </description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-	</callout>
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-  </hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_DIMM_USE_ERROR</rc>
-    <description>Invalid Dimm SIM this should not have happened
-        </description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>DIMM_TYPE_U8</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_KG3_FREQ_1333Mbps</rc>
-    <description>Invalid Dimm Type KG3 FREQ MBA0 where freq is less than equal
-        1333Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_KG3_FREQ_1600Mbps</rc>
-    <description>Invalid Dimm Type KG3 FREQ MBA0 where freq is less than equal
-        1600Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_KG3_FREQ_1333Mbps_MBA1</rc>
-    <description>Invalid Dimm Type KG3 FREQ MBA1 where freq is less than equal
-        1333Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_KG3_FREQ_1600Mbps_MBA1</rc>
-    <description>Invalid Dimm Type KG3 FREQ MBA1 where freq is less than equal
-        1600Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-	<callout>
-		<procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_B4_1600Mbps</rc>
-    <description>Invalid Dimm Type B4 CDIMM 1600 MBA0/1 where freq is less than equal
-        1600Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_UDIMM_1600Mbps_MBA0</rc>
-    <description>Invalid Dimm Type UDIMM FREQ MBA1 where freq is less than equal
-        1600Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_UDIMM_MBA0</rc>
-    <description>Invalid Dimm Type UDIMM FREQ MBA0 where freq is greater than 
-        1600Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_UDIMM_1600Mbps_MBA1</rc>
-    <description>Invalid Dimm Type UDIMM FREQ MBA1 where freq is less than equal
-        1600Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_UDIMM_MBA1</rc>
-    <description>Invalid Dimm Type UDIMM FREQ MBA1 where freq is greater than 
-        1600Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_RDIMM_MBA0_1333Mbps</rc>
-    <description>Invalid Dimm Type RDIMM FREQ MBA0 where freq is less than equal
-        1333Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_RDIMM_MBA0_1600Mbps</rc>
-    <description>Invalid Dimm Type RDIMM FREQ MBA0 where freq is less than equal
-        1600Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_RDIMM_MBA1_1066Mbps</rc>
-    <description>Invalid Dimm Type RDIMM FREQ MBA1 where freq is less than equal
-        1066Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-	    <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_RDIMM_MBA1_1333Mbps</rc>
-    <description>Invalid Dimm Type RDIMM FREQ MBA1 where freq is less than equal
-        1333Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_RDIMM_MBA1_1600Mbps</rc>
-    <description>Invalid Dimm Type RDIMM FREQ MBA1 where freq is less than equal
-        1600Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_LRDIMM_MBA1_1333Mbps</rc>
-    <description>Invalid Dimm Type LRDIMM FREQ MBA1 where freq is less than equal
-        1333Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>HIGH</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_LRDIMM_MBA1_1600Mbps</rc>
-    <description>Invalid Dimm Type LRDIMM FREQ MBA1 where freq is less than equal
-        1600Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_ERROR_RETRIEVING_DIMMS</rc>
-    <description>Could Not get termination information for dimm</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-	<FFDC>DIMM_TYPE_U8</FFDC>
-	<callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_SETTING_LRDIMM_TERM_ATTRS</rc>
-    <description>Termination ATTR Setup LRDIMM</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-	<FFDC>DIMM_TYPE_U8</FFDC>
-	<callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_LRDIMM_ODT_RD</rc>
-    <description>FAILED ODT Setup LRDIMM</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-	<FFDC>DIMM_TYPE_U8</FFDC>
-	<callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-</hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_DDR4_RCD</rc>
-    <description>DDR4 RCD Setup Failed</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-	<FFDC>DIMM_TYPE_U8</FFDC>
-	<callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_DIMM_TYPE</rc>
-    <description>Invalid Dimm Type</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-	<FFDC>DIMM_TYPE_U8</FFDC>
-	<callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_RDIMM_FREQ</rc>
-    <description>Invalid RDIMM ATTR_MSS_FREQ, freq is 1866Mbps </description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-	<callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_RDIMM_VOLT</rc>
-    <description>Invalid RDIMM ATTR_MSS_VOLT, Volt is less than 1.2V 
-         </description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_VOLT</FFDC>
-	<callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_DIMM_RCD_IBT</rc>
-    <description>Invalid DIMM_RCD_IBT
-         </description>
-	<FFDC>TARGET_MBA</FFDC>
-	<callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_DIMM_RCD_MIRROR_MODE</rc>
-    <description>Invalid DIMM_RCD_MIRROR_MODE
-         </description>
-	<FFDC>TARGET_MBA</FFDC>
-	<callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_CARD_TYPE_RLO</rc>
-    <description>Invalid Card Type RLO Settings 
-         </description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>DIMM_TYPE_U8</FFDC>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_KG4_FREQ_1333Mbps</rc>
-    <description>Invalid Dimm Type KG4 FREQ MBA0 where freq is less than equal
-        1333Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_KG4_FREQ_1600Mbps</rc>
-    <description>Invalid Dimm Type KG4 FREQ MBA0 where freq is less than equal
-        1600Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_KG4_FREQ_1333Mbps_MBA1</rc>
-    <description>Invalid Dimm Type KG4 FREQ MBA1 where freq is less than equal
-        1333Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_MSS_EFF_CONFIG_TERMINATION_INVALID_KG4_FREQ_1600Mbps_MBA1</rc>
-    <description>Invalid Dimm Type KG4 FREQ MBA1 where freq is less than equal
-        1600Mbps</description>
-	<FFDC>TARGET_MBA</FFDC>
-	<FFDC>MSS_FREQ</FFDC>
-	<callout>
-		<procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>TARGET_MBA</target>
-        <priority>LOW</priority>
-    </callout>
-
-    <deconfigure>
-        <target>TARGET_MBA</target>
-    </deconfigure>
-
-    <gard>
-        <target>TARGET_MBA</target>
-    </gard>
-</hwpError>
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config_thermal.xml b/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config_thermal.xml
deleted file mode 100644
index 061dda75b..000000000
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config_thermal.xml
+++ /dev/null
@@ -1,51 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config_thermal.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_eff_config_thermal.xml,v 1.2 2014/06/02 15:01:56 pardeik Exp $ -->
-<!-- For file ../../ipl/fapi/mss_eff_config_thermal.C -->
-<!-- // *! OWNER NAME  : Joab Henderson    Email: joabhend@us.ibm.com -->
-<!-- // *! BACKUP NAME : Michael Pardeik   Email: pardeik@us.ibm.com -->
-
-<!-- Original Source for RC_MSS_DIMM_POWER_CURVE_DATA_INVALID memory_errors.xml -->
-  <hwpError>
-    <rc>RC_MSS_DIMM_POWER_CURVE_DATA_INVALID</rc>
-    <description>DIMM power curve data is invalid</description>
-    <ffdc>FFDC_DATA_1</ffdc>	
-    <ffdc>FFDC_DATA_2</ffdc>	
-    <ffdc>FFDC_DATA_3</ffdc>	
-    <ffdc>FFDC_DATA_4</ffdc>	
-    <callout><target>MEM_CHIP</target><priority>HIGH</priority></callout>
-</hwpError>
-
-<!-- Original Source for RC_MSS_DIMM_NOT_FOUND_IN_POWER_TABLE memory_errors.xml -->
-  <hwpError>
-    <rc>RC_MSS_DIMM_NOT_FOUND_IN_POWER_TABLE</rc>
-    <description>Unable to find matching entry in DIMM power table</description>
-    <ffdc>FFDC_DATA_1</ffdc>	
-    <ffdc>FFDC_DATA_2</ffdc>	
-    <ffdc>FFDC_DATA_3</ffdc>	
-    <callout><target>MEM_DIMM</target><priority>HIGH</priority></callout>
-</hwpError>
-
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_grouping.xml b/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_grouping.xml
deleted file mode 100644
index bb8a0ac61..000000000
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_grouping.xml
+++ /dev/null
@@ -1,176 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_grouping.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2013,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<hwpErrors>
-<!-- $Id: memory_mss_eff_grouping.xml,v 1.6 2015/07/15 21:41:12 asaetow Exp $ -->
-<!-- For file ../../ipl/fapi/mss_eff_grouping.C -->
-
-<hwpError>
-    <rc>RC_MSS_EFF_CONFIG_MIRROR_DISABLED</rc>
-    <description>
-        mss_eff_grouping found that mirroring is disabled but mirror placement
-        policy is selective or  flipped. Firmware error
-        - ATTR_MRW_ENHANCED_GROUPING_NO_MIRRORING is true
-        - ATTR_MEM_MIRROR_PLACEMENT_POLICY is SELECTIVE or FLIPPED
-    </description>
-    <ffdc>MIRROR_PLACEMENT_POLICY</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-</hwpError>
-
-<hwpError>
-    <rc>RC_MSS_EFF_CONFIG_INTERLEAVE_MODE_INVALID_MCS_PER_GROUP</rc>
-    <description>
-        mss_eff_grouping found that ATTR_ALL_MCS_IN_INTERLEAVING_GROUP
-        indicates interleaving mode. but ATTR_MSS_INTERLEAVE_ENABLE does not
-        contain a valid (>1) MCS per group number 
-    </description>
-    <ffdc>ALL_MCS_IN_INTERLEAVING_GROUP</ffdc>
-    <ffdc>MSS_INTERLEAVE_ENABLE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-</hwpError>
-
-<hwpError>
-    <rc>RC_MSS_EFF_CONFIG_CHECKERBOARD_MODE_INVALID_MCS_PER_GROUP</rc>
-    <description>
-        mss_eff_grouping found that ATTR_ALL_MCS_IN_INTERLEAVING_GROUP
-        indicates checkerboard mode. but ATTR_MSS_INTERLEAVE_ENABLE does not
-        contain a valid (>=1) MCS per group number 
-    </description>
-    <ffdc>ALL_MCS_IN_INTERLEAVING_GROUP</ffdc>
-    <ffdc>MSS_INTERLEAVE_ENABLE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-</hwpError>
-
-<hwpError>
-    <rc>RC_MSS_EFF_GROUPING_SELCTIVE_MODE_HTM_OCC_BAR</rc>
-    <description>
-        mss_eff_grouping found that there is an HTM or OCC Sandbox bar in
-        selective mode. This is not allowed
-        - ATTR_MEM_MIRROR_PLACEMENT_POLICY is SELECTIVE
-    </description>
-    <ffdc>HTM_BAR_SIZE</ffdc>
-    <ffdc>OCC_SANDBOX_BAR_SIZE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-</hwpError>
-
-<hwpError>
-    <rc>RC_MSS_EFF_GROUPING_UNABLE_TO_GROUP_MCS</rc>
-    <description>
-        mss_eff_grouping found an MCS that could not be grouped.
-        This is a memory plugging error. Refer to memory plugging rules.
-        The attached Memory Buffer Chip is deconfigured as a result
-    </description>
-    <callout>
-        <procedure>MEMORY_PLUGGING_ERROR</procedure>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <childTargets>
-        <parent>MEMBUF</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets> 
-        <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-        <childTargets>
-        <parent>MEMBUF</parent>
-        <childType>TARGET_TYPE_DIMM</childType>
-        </childTargets>
-    </deconfigure>
-</hwpError>
-
-<hwpError>
-    <rc>RC_MSS_EFF_GROUPING_UNABLE_TO_GROUP</rc>
-    <description>
-        mss_eff_grouping found that one or more MCS could not be grouped.
-        Other errors have been logged for each MCS to deconfigure their
-        associated membuf chip and callout the MEMORY_PLUGGING_ERROR procedure.
-    </description>
-    <callout>
-        <procedure>MEMORY_PLUGGING_ERROR</procedure>
-        <priority>HIGH</priority>
-    </callout>
-</hwpError>
-
-<hwpError>
-    <rc>RC_MSS_EFF_GROUPING_BASE_ADDRESS_OVERLAPS_MIRROR_ADDRESS</rc>
-    <description>
-        mss_eff_grouping found that the base address overlaps with the
-        mirror base address
-    </description>
-    <ffdc>PROC_CHIP</ffdc>
-    <ffdc>MEM_BASE_ADDR</ffdc>
-    <ffdc>MIRROR_BASE_ADDR</ffdc>
-    <ffdc>SIZE_NON_MIRROR</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-</hwpError>
-
-<hwpError>
-    <rc>RC_MSS_EFF_GROUPING_NO_SPACE_FOR_HTM_OCC_BAR</rc>
-    <description>
-        mss_eff_grouping found that there is not enough space available for
-        the HTM and OCC Sandbox bars
-    </description>
-    <ffdc>TOTAL_SIZE</ffdc>
-    <ffdc>HTM_BAR_SIZE</ffdc>
-    <ffdc>OCC_SANDBOX_BAR_SIZE</ffdc>
-    <ffdc>MIRROR_PLACEMENT_POLICY</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-</hwpError>
-
-<hwpError>
-    <rc>RC_MSS_EFF_GROUPING_HTM_OCC_BAR_NOT_POSSIBLE</rc>
-    <description>
-        mss_eff_grouping found that the HTM and OCC Sandbox bars are not
-        possible
-    </description>
-    <ffdc>TOTAL_SIZE</ffdc>
-    <ffdc>HTM_BAR_SIZE</ffdc>
-    <ffdc>OCC_SANDBOX_BAR_SIZE</ffdc>
-    <ffdc>MIRROR_PLACEMENT_POLICY</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-</hwpError>
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/opt_memmap_errors.xml b/src/usr/hwpf/hwp/mc_config/mss_eff_config/opt_memmap_errors.xml
deleted file mode 100644
index 9ac15fca1..000000000
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/opt_memmap_errors.xml
+++ /dev/null
@@ -1,60 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/mc_config/mss_eff_config/opt_memmap_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2013,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: opt_memmap_errors.xml,v 1.5 2015/01/23 01:58:43 jmcgill Exp $ -->
-<!-- Error definitions for proc_setup_bars -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_OPT_MEMMAP_MEM_BASE_ERR</rc>
-    <description>Unexpected value for ATTR_PROC_MEM_BASE returned after mss_eff_grouping execution.</description>
-    <ffdc>ADDR</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->  
-  <hwpError>
-    <rc>RC_OPT_MEMMAP_MIRROR_BASE_ERR</rc>
-    <description>Unexpected value for ATTR_PROC_MIRROR_BASE returned after mss_eff_grouping execution.</description>
-    <ffdc>ADDR</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_OPT_MEMMAP_GROUP_ERR</rc>
-    <description>Internal error, chip matched multiple Group IDs.</description>
-    <ffdc>GROUP_ID</ffdc>
-    <ffdc>MATCH_COUNT</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/mcbist_attributes.xml b/src/usr/hwpf/hwp/mcbist_attributes.xml
deleted file mode 100644
index 8038b3dc0..000000000
--- a/src/usr/hwpf/hwp/mcbist_attributes.xml
+++ /dev/null
@@ -1,179 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/mcbist_attributes.xml $                      -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<attributes>
-  <!-- $Id: mcbist_attributes.xml,v 1.4 2013/05/21 18:51:21 bellows Exp $ -->
-
-<attribute>
-    <id>ATTR_MCBIST_ADDR_MODES</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Can choose mcbist address mode for full,half or quarter addressing mode.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_RANK</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description></description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_START_ADDR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Defines the start address for the Mcbist address range</description>
-    <valueType>uint64</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_END_ADDR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Defines the end address for the Mcbist address range</description>
-    <valueType>uint64</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_ERROR_CAPTURE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Enables error capture; basically a flag.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_MAX_TIMEOUT</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Define mcbist Max timeout</description>
-    <valueType>uint64</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_PRINT_PORT</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Enable which port prints are required.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_STOP_ON_ERROR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Flag to stop Mcbist on Error.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_DATA_SEED</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Define data seed for the random data pattern or test</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_ADDR_INTER</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>The address interleave map with user cases or deafult cases of BANK_RANK,RANK_BANK,BANK_ONLY,RANK_ONLYRANKS_DIMM0,RANKS_DIMM1,USER_PATTERN.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_ADDR_NUM_ROWS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>User defined constraint for limiting number of rows for addressing.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_ADDR_NUM_COLS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>User defined constraint for limiting number of columns for addressing.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_ADDR_RANK</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>User defined constraint for limiting number of ranks for addressing.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_ADDR_BANK</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>User defined constraint for limiting number of banks for addressing.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_ADDR_SLAVE_RANK_ON</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>If slave ranks exists;Restrict usage or enable addressing on them as well.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_ADDR_STR_MAP</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>To Define custom addressing map ; Input by user.</description>
-    <valueType>uint64</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_ADDR_RAND</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Flag for Addressing to go sequential manner or random.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-</attributes>
diff --git a/src/usr/hwpf/hwp/memory_attributes.xml b/src/usr/hwpf/hwp/memory_attributes.xml
deleted file mode 100644
index 50635c187..000000000
--- a/src/usr/hwpf/hwp/memory_attributes.xml
+++ /dev/null
@@ -1,3466 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/memory_attributes.xml $                      -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2016                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<attributes>
-<!-- $Id: memory_attributes.xml,v 1.159AL_custom 2014/11/18 17:35:29 aalugore Exp $ -->
-<!-- DO NOT EDIT THIS FILE DIRECTLY PLEASE UPDATE THE ODS FILE AND FOLLOW THE INSTRUCTION TAB -->
-<!-- PLEASE SEE MARK BELLOWS (BELLOWS.IBM.COM) OR OTHERS ON MEMORY TEAM FOR HELP -->
-<!-- *********************************************************************** -->
-
-<attribute>
-    <id>ATTR_MSS_VOLT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>DRAM Voltage, each voltage rail would need to have a value.  Computed in mss_volt C code - in millivolts
-creator: mss_volt
-consumer: mss_eff_cnfg, others
-firmware notes: none</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VOLT_VPP</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>DRAM VPP Voltage, each voltage rail would need to have a value.  Computed in mss_volt C code - in millivolts.  0V - DDR3, 2.5V - DDR4
-creator: mss_volt
-consumer: mss_eff_cnfg, others
-firmware notes: none</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_FREQ_OVERRIDE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>FOR LAB USE ONLY: Frequency override of this memory channel in MHz, comprising of up to three DIMMs.  Set by config file or an attribute writing program.  Consumed by mss_freq.  The default of AUTO means mss_freq will find the best frequencies given the DIMMs plugged in and other rules.  Otherwise, this is the system frequency.
-firmware notes: Platforms should initialize this attribute to AUTO (0)</description>
-    <valueType>uint32</valueType>
-    <enum>AUTO = 0</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_FREQ</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Frequency of this memory channel in MHz, comprising of three DIMMs.  Computed in mss_freq
-creator: mss_freq
-consumer: mss_eff_cnfg, others
-firmware notes: none</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_FREQ_BIAS_PERCENTAGE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Percentage to increase/decrease MEM frequency - two's complement number.  Measured in 100's.  So the value of 100 is one percent increase.
-This frequency change comes from changing multipliers and dividers to  get the desired frequency.  The supported frequencies come from Tim Diemoz.
-Creator: platform set this to 0.  Users can set this to a valid value.
-VALID Values: (TBD % to TBD %) (Tuleta) (TBD % to TBD %) (Glacier)
-Set by: PLL settings written by Dave Cadigan</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-<id>ATTR_MSS_VREF_CAL_CNTL</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Training Control over IPL - ENUM - 0x00=DISABLE /Skip V-ref Train; 0x01=DRAM - Enable V-Ref Train DRAM Level; 0x02=RANK Level Training; 0x03=PORT Level Training; 0x04=MBA Level; 0x05=CENTAUR level;
-        Default Value = 0x01;
-</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_DIMM_MFG_ID_CODE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Manufacturer ID Code RCD: bits(31:16), Module: bits(15:0)</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_RANKS_CONFIGED</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Bit wise representation of master ranks in each DIMM that are used for reads and writes. Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-Dimensions are [port][dimm]  A/B=Mba_0 C/D=Mba_1 There are only two DIMM ranks: DIMM0 and DIMM1 where DIMM0 is the furthest from the centaur.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_NUM_RANKS_PER_DIMM</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Number of ranks in each DIMM. Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-values are 0,1,2, 4 up to 32
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_TYPE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Type of DIMM: RDIMM, UDIMM, LRDIMM as specified by the JEDIC standard. Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none
-NOTE: Do not use the enum type of CDIMM.  Use the attribute EFF_DIMM_CUSTOM to test for a CUSTOM DIMM or CDIMM.</description>
-    <valueType>uint8</valueType>
-    <enum>CDIMM = 0, RDIMM = 1, UDIMM = 2, LRDIMM = 3</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CUSTOM_DIMM</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DIMM is a custom DIMM. This is commonly known as a CDIMM, but technically, we could support Custom DIMMs of different types than an UDIMM, such as RDIMM and LRDIMM.  Created in mss_eff_cnfg
-Use this attribute if you need to know if the Centaur is on the DIMM instead of on a planar.</description>
-    <valueType>uint8</valueType>
-    <enum>NO = 0, YES = 1</enum>
-    <platActionWrite/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_WIDTH</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DRAM Device Width: X4, X8, X16, X32. Used in various locations and is computed in mss_eff_cnfg.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>X4 = 4, X8 = 8, X16 = 16, X32 = 32</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_GEN</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Generation of memory: DDR3, DDR4. Used in various locations and is computed in mss_eff_cnfg.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>EMPTY = 0, DDR3 = 1, DDR4 = 2</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_PRIMARY_RANK_GROUP0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_rank_group
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 255</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_PRIMARY_RANK_GROUP1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_rank_group
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 255</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_PRIMARY_RANK_GROUP2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_rank_group
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 255</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_PRIMARY_RANK_GROUP3</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_rank_group
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 255</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_SECONDARY_RANK_GROUP0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_rank_group
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 255</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_SECONDARY_RANK_GROUP1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_rank_group
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 255</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_SECONDARY_RANK_GROUP2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_rank_group
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 255</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_SECONDARY_RANK_GROUP3</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_rank_group
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 255</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_TERTIARY_RANK_GROUP0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_rank_group
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 255</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_TERTIARY_RANK_GROUP1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_rank_group
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 255</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_TERTIARY_RANK_GROUP2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_rank_group
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 255</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_TERTIARY_RANK_GROUP3</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_rank_group
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 255</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_QUATERNARY_RANK_GROUP0</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_rank_group
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 255</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_QUATERNARY_RANK_GROUP1</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_rank_group
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 255</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_QUATERNARY_RANK_GROUP2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_rank_group
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 255</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_QUATERNARY_RANK_GROUP3</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: mss_eff_cnfg_rank_group
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>INVALID = 255</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_SPARE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Spare DRAM availability. Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.   creator: mss_eff_cnfg consumer: various firmware notes: load from spd
-OBSOLETE: Use ATTR_VPD_DIMM_SPARE
-</description>
-    <valueType>uint8</valueType>
-    <enum>NO_SPARE = 0, LOW_NIBBLE = 1, HIGH_NIBBLE = 2, FULL_BYTE = 3</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_WR_VREF</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DRAM Write Vref. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT) or mss_eff_cnfg_termination
-consumer: various.C and initfile
-firmware notes: none
-This is the nominal value
-This is for DDR3</description>
-    <valueType>uint32</valueType>
-    <enum>VDD420 = 420, VDD425 = 425, VDD430 = 430, VDD435 = 435, VDD440 = 440, VDD445 = 445, VDD450 = 450, VDD455 = 455, VDD460 = 460, VDD465 = 465, VDD470 = 470, VDD475 = 475, VDD480 = 480, VDD485 = 485, VDD490 = 490, VDD495 = 495, VDD500 = 500, VDD505 = 505, VDD510 = 510, VDD515 = 515, VDD520 = 520, VDD525 = 525, VDD530 = 530, VDD535 = 535, VDD540 = 540, VDD545 = 545, VDD550 = 550, VDD555 = 555, VDD560 = 560, VDD565 = 565, VDD570 = 570, VDD575 = 575</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_WR_VREF_SCHMOO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Enables for which VREF to use on the WR Schmoo.  The LSB corresponds to the highest WR Vref</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_WRDDR4_VREF_SCHMOO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Enables for which VREF to use on the WR Schmoo.  The LSB corresponds to the highest WR Vref</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CEN_DRV_IMP_DQ_DQS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur DQ and DQS Drive Impedance Used in various locations and comes from the MT Keyword of the VPD or  is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT)/mss_eff_cnfg_termination
-consumer: initfile,various.C files
-firmware notes: none
-This is the nominal value</description>
-    <valueType>uint8</valueType>
-    <enum>OHM24_FFE0 = 0x0A, OHM30_FFE0 = 0x08,
-OHM30_FFE480 = 0x48, OHM30_FFE240 = 0x38, OHM30_FFE160 = 0x28, OHM30_FFE120 = 0x18, OHM34_FFE0 = 0x07, OHM34_FFE480 = 0x47, OHM34_FFE240 = 0x37, OHM34_FFE160 = 0x27, OHM34_FFE120 = 0x17, OHM40_FFE0 = 0x06, OHM40_FFE480 = 0x46, OHM40_FFE240 = 0x36, OHM40_FFE160 = 0x26, OHM40_FFE120 = 0x16</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Enables for which impedance values can be used and tested in a timing test.  The bits have a one to one correspondence to the possible driver strengths and start with the first value down to the last (largest) impedance as the LSB of the 8 bit field.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CEN_DRV_IMP_CLK_SCHMOO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Enables for which impedance values can be used and tested in a timing test.  The bits have a one to one correspondence to the possible driver strengths and start with the first value down to the last (largest) impedance as the LSB of the 8 bit field.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CEN_DRV_IMP_SPCKE_SCHMOO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Enables for which impedance values can be used and tested in a timing test.  The bits have a one to one correspondence to the possible driver strengths and start with the first value down to the last (largest) impedance as the LSB of the 8 bit field.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CEN_DRV_IMP_CNTL_SCHMOO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Enables for which impedance values can be used and tested in a timing test.  The bits have a one to one correspondence to the possible driver strengths and start with the first value down to the last (largest) impedance as the LSB of the 8 bit field.
-This is the nominal value</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CEN_RCV_IMP_DQ_DQS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur DQ and DQS Receiver Impedance Used in various locations and it comes from the VPD MT keyword for custom DIMMs or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD, mss_eff_cnfg_termination
-Consumer: initfile + C code
-firmware notes: none
-This is the nominal value</description>
-    <valueType>uint8</valueType>
-    <enum>OHM15 = 15, OHM20 = 20, OHM30 = 30, OHM40 = 40, OHM48 = 48, OHM60 = 60,  OHM80 = 80, OHM120 = 120, OHM160 = 160, OHM240 = 240</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CEN_RCV_IMP_DQ_DQS_SCHMOO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Enables for which impedance values can be used and tested in a timing test.  The bits have a one to one correspondence to the possible receiver termination and start with the first value down to the last (largest) impedance as the LSB of the 32 bit field.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CEN_SLEW_RATE_DQ_DQS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur DQ and DQS Slew Rate Used in various locations and comes from the MT keyword of the VPD or  is computed in mss_eff_cnfg_termination. Slowest slew rate is 0, incrementing by one. The lower the number the slower the slew rate the higher the faster. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-creator: VPD(MT), mss_eff_cnfg_termination
-consumer: initfiles,various.C
-firmware notes: none
-This is the nominal value</description>
-    <valueType>uint8</valueType>
-    <enum>SLEW_3V_NS = 3,
-SLEW_4V_NS = 4,
-SLEW_5V_NS = 5,
-SLEW_6V_NS = 6,
-SLEW_MAXV_NS = 7</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CEN_SLEW_RATE_DQ_DQS_SCHMOO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Slew Rates that can be selected during timing adjustments.  The fastest rate is the LSB</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CEN_SLEW_RATE_CLK_SCHMOO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Slew Rates that can be selected during timing adjustments.  The fastest rate is the LSB</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CEN_SLEW_RATE_SPCKE_SCHMOO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Slew Rates that can be selected during timing adjustments.  The fastest rate is the LSB</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CEN_SLEW_RATE_ADDR_SCHMOO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Slew Rates that can be selected during timing adjustments.  The fastest rate is the LSB</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CEN_SLEW_RATE_CNTL_SCHMOO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Slew Rates that can be selected during timing adjustments.  The fastest rate is the LSB</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CEN_RD_VREF</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Centaur Read Vref. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.
-Creator: VPD(MT) or mss_eff_cnfg_termination
-consumer: various.C and initfiles
-firmware notes: none
-This is the nominal value</description>
-    <valueType>uint32</valueType>
-    <enum>VDD40375 = 40375, VDD41750 = 41750, VDD43125 = 43125, VDD44500 = 44500, VDD45875 = 45875, VDD47250 = 47250, VDD48625 = 48625, VDD50000 = 50000, VDD51375 = 51375, VDD52750 = 52750, VDD54125 = 54125, VDD55500 = 55500, VDD56875 = 56875, VDD58250 = 58250, VDD59625 = 59625, VDD61000 = 61000, VDD60375 = 60375, VDD61750 = 61750, VDD63125 = 63125, VDD64500 = 64500, VDD65875 = 65875, VDD67250 = 67250, VDD68625 = 68625, VDD70000 = 70000, VDD71375 = 71375, VDD72750 = 72750, VDD74125 = 74125, VDD75500 = 75500, VDD76875 = 76875, VDD78250 = 78250, VDD79625 = 79625, VDD81000 = 81000</enum>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CEN_RD_VREF_SCHMOO</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Enables for which VREF value can be used in timing adjustments.  The highest voltage corresponds to the LSB</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_SIZE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DIMM Size.  Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_BANKS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Number of DRAM banks.  Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_ROWS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Number of DRAM rows.  Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_COLS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Number of DRAM columns.  Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_DENSITY</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DRAM Density.  Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_TRCD</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RAS to CAS Delay.  Used in various locations and is computed in mss_eff_cnfg_timing. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg_timing
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_TRRD</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Row ACT to Row ACT Delay.  Used in various locations and is computed in mss_eff_cnfg_timing. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg_timing
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_TRP</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Row Precharge Delay.  Used in various locations and is computed in mss_eff_cnfg_timing. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg_timing
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_TRAS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>ACT to Precharge Delay.  Used in various locations and is computed in mss_eff_cnfg_timing. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg_timing
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_TRC</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>ACT to ACT/Refresh Delay.  Used in various locations and is computed in mss_eff_cnfg_timing. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg_timing
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_TRFI</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Refresh Interval. Used in various locations and is computed in mss_eff_cnfg_timing. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  In unit clock.
-creator: mss_eff_cnfg_timing
-consumer: various
-firmware notes: none</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_TRFC</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Refresh Recovery Delay. Used in various locations and is computed in mss_eff_cnfg_timing. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  In unit clock.
-creator: mss_eff_cnfg_timing
-consumer: various
-firmware notes: none</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_TWTR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Internal Write to Read Delay. Used in various locations and is computed in mss_eff_cnfg_timing. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg_timing
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_TRTP</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Internal Read to Precharge Delay. Used in various locations and is computed in mss_eff_cnfg_timing. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg_timing
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_TFAW</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Four ACT Window Delay. Used in various locations and is computed in mss_eff_cnfg_timing. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg_timing
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_BL</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Burst Length.  Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>BL8 = 0, OTF = 1, BC4 = 2</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_CL</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>CAS Latency.  Used in various locations and is computed in mss_eff_cnfg_timing. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg_timing
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_AL</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Additive Latency.  Used in various locations and is computed in mss_eff_cnfg_timing. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg_timing
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, CL_MINUS_1 = 1, CL_MINUS_2 = 2</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_CWL</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>CAS Write Latency.  Used in various locations and is computed in mss_eff_cnfg_timing. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg_timing
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_RBT</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Read Burst Type.  Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>SEQUENTIAL = 0, INTERLEAVE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_TM</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Test Mode.  Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>NORMAL= 0, TEST = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_DLL_RESET</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DLL Reset.  Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>NO = 0, YES = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_WR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Write Recovery.  Used in various locations and is computed in mss_eff_cnfg_timing. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg_timing
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_DLL_PPD</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DLL Precharge PD.  Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>SLOWEXIT = 0, FASTEXIT = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_DLL_ENABLE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DLL Enable.  Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>ENABLE = 0, DISABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_TDQS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>TDQS. Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, ENABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_WR_LVL_ENABLE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Write Level Enable. Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, ENABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_OUTPUT_BUFFER</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DRAM Qoff. Enables or disables DRAM output. Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>ENABLE = 0, DISABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_PASR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Partial Array Self-Refresh. Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>FULL = 0, FIRST_HALF = 1, FIRST_QUARTER = 2, FIRST_EIGHTH = 3, LAST_THREE_FOURTH = 4, LAST_HALF = 5, LAST_QUARTER = 6, LAST_EIGHTH = 7</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_ASR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Auto Self-Refresh. Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>SRT = 0, ASR = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_SRT</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Self-Refresh Temperature Range. Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>NORMAL = 0, EXTEND = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_MPR_LOC</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Multi Purpose Register Location. Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_MPR_MODE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Multi Purpose Register Mode. Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, ENABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_RCD_CNTL_WORD_0_15</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RCD Control Word. Used in mss_dram_init and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint64</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_RCD_CNTL_WORD_X</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Additional RCD Control Word for DDR4. Used in mss_dram_init and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint64</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC00</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC00: Global Features Control Word.For normal operation, output inversion is always enabled. For DIMM vendor test purpose, output inversion can be disabled. 
-When disabled, register tPDM is not guaranteed to be met. NOTE: Default value - 0x00. Values Range from 0-8.
-00 - Normal Operation; 01 - Output Inversion Disabled; 02 - Weak Drive Enabled; 04 - A outputs disabled; 08 - B outputs disabled; So on.
-No need to calculate; User can override with desired experimental value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC01</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC01 - Clock Driver Enable Control Word.1. Output clocks may be individually turned on or off to conserve power. The system must read the module SPD to determine which clock outputs are used by the module. The PLL remains locked on CK_t/CK_c unless the system stops the clock inputs to the DDR4RCD02 to enter the lowest power mode.
-        Default value - 0x00. Values Range from 0-8. No need to calculate; User can override with desired experimental value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC02</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC02: Timing and IBT Control Word; Default value - 0x00. Values Range from 0-8. No need to calculate; User can override with desired experimental value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC03</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC03 - CA and CS Signals Driver Characteristics Control Word;  Default value - 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD byte 137, 1st Nibble for CS and CA.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC04</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC04 - ODT and CKE Signals Driver Characteristics Control Word;  Default value - 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD byte 137, 2nd Nibble for ODT and CKE.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC05</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC05 - Clock Driver Characteristics Control Word;  Default value - 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD byte 138, 2nd Nibble for CK.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC06_07</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC06: Command Space Control Word definition;  Default value - 0xF0 (NOP). Values Range from 00 to F0. F0RC07 not used. RDIMM
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC08</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC08: Input/Output Configuration Control Word; Default value - 0x03. Values Range from 00 to 08 decimal. Check the stack height and calculate dynamically; 00 = Stack height_8; 01 = Stack height_4;
-        02 = Stack height_2;
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC09</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC09: Power Saving Settings Control Word; Default value - 0xF0 (NOP). Values Range from 00 to F0. No need to calculate; User can override with desired experimental value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC10</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RDIMM Operating Speed;  Read from ATTR_MSS_FREQ; Default value - 00. Values Range from 00 to 09. No need to calculate; User can override with desired experimental value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC11</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Operating Voltage VDD and VrefCA Source Control Word; Read from ATTR_MSS_VOLT. Default value - 14. Values Range from 00 to 15 decimal.  No need to calculate; User can override with desired experimental value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC12</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC0C - Training Control Word; Default value - 00. Values Range from 00 to 07 decimal.No need to calculate; User can override with desired experimental value. 
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC13</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC0D - DIMM Configuration Control Word; Default value - 0B. Values Range from 00 to 15 decimal. Dynamically calculated using 4 bits[0:3] Bit 0 - Address Mirroring; Bit 1 - Rdimm(1)/Lrdimm (0) ; Bit 2 - N/A ; Bit 3 - CS Mode (Direct / Quad CS mode etc); 
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC14</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC0E - Parity Control Word;  Default value - 00. Check from ATTR_EFF_CA_PARITY and assign; Values Range from 00 to 0F. 
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC15</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC0F - Command Latency Adder Control Word;  Default value - 04. Values Range from 00 to 04. No need to calculate; User can override with desired experimental value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC_1x</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC1x - Internal VrefCA Control Word; Default value - 00. Values Range from 00 to 3F.No need to calculate; User can override with desired experimental value. 
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC_2x</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC2x: I2C Bus Control Word; Default value - 00. Values Range from 00 to FF.No need to calculate; User can override with desired experimental value. 
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC_3x</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC3x - Fine Granularity RDIMM Operating Speed;  Default value = (Operating Freq - 1250)/20. Values Range from 00 to 61 Hex. 
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC_4x</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC4x: CW Source Selection Control Word; Default value - 00. Values Range from 00 to FF. No need to calculate; User can override with desired experimental value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC_5x</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC5x: CW Destination Selection and Write/Read Additional QxODT[1:0] Signal High; Default value - 00. Values Range from 00 to FF. No need to calculate; User can override with desired experimental value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC_6x</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC6x: CW Data Control Word;  Default value - 00. Values Range from 00 to FF.No need to calculate; User can override with desired experimental value. 
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC_7x</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC7x: IBT Control Word; Default value - 00. Values Range from 00 to FF.No need to calculate; User can override with desired experimental value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC_8x</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC8x: ODT Input Buffer/IBT, QxODT Output Buffer and Timing Control Word;  Default value - 00. Values Range from 00 to FF. No need to calculate; User can override with desired experimental value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC_9x</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RC9x1: QxODT[1:0] Write Pattern Control Word; Default value - 00. Values Range from 00 to FF.No need to calculate; User can override with desired experimental value. 
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC_Ax</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RCAx1: QxODT[1:0] Read Pattern Control Word; Default value - 00. Values Range from 00 to FF. No need to calculate; User can override with desired experimental value. 
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_DDR4_RC_Bx</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>F0RCBx: IBT and MRS Snoop Control Word;  Default value - 07. Values Range from 00 to FF. No need to calculate; User can override with desired experimental value. 
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_RCD_IBT</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RCD IBT. Used in mss_dram_init and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint32</valueType>
-    <enum>IBT_OFF = 0, IBT_100 = 100, IBT_150 = 150, IBT_200 = 200, IBT_300 = 300</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DIMM_RCD_MIRROR_MODE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RCD IBT. Used in mss_dram_init and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: mss_dram_init
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>IBT_BACK_OFF = 0, IBT_BACK_ON = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_SCHMOO_MODE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the schmoo mode to use during draminit_train_adv.</description>
-    <valueType>uint8</valueType>
-    <enum>FAST = 0, ONE_SLOW = 1, QUARTER_SLOW = 2, HALF_SLOW = 3, FULL_SLOW = 4, ONE_CHAR = 5, QUARTER_CHAR = 6, HALF_CHAR = 7, FULL_CHAR = 8</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_SCHMOO_ADDR_MODE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the schmoo mode to use during draminit_train_adv</description>
-    <valueType>uint8</valueType>
-    <enum>FEW_ADDR= 0, QUARTER_ADDR = 1, HALF_ADDR = 2, FULL_ADDR = 3</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_SCHMOO_TEST_VALID</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the schmoo test to run during draminit_train_adv. Bit wise.</description>
-    <valueType>uint8</valueType>
-    <enum> NONE = 0x00,
- MCBIST = 0x01,
- WR_EYE = 0x02,
- RD_EYE = 0x04,
- WR_DQS = 0x08,
- RD_DQS = 0x10</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_SCHMOO_PARAM_VALID</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the schmoo parameters to use during draminit_train_adv. Bit wise.</description>
-    <valueType>uint8</valueType>
-    <enum> PARAM_NONE = 0x00,
- DELAY_REG = 0x01,
- DRV_IMP = 0x02,
- SLEW_RATE = 0x04,
- WR_VREF = 0x08,
- RD_VREF = 0x10,
- RCV_IMP = 0x20</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_SCHMOO_WR_EYE_MIN_MARGIN</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the schmoo minimum margin to use during draminit_train_adv. Used to signal possible SI issues in memory.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_SCHMOO_RD_EYE_MIN_MARGIN</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the schmoo minimum margin to use during draminit_train_adv. Used to signal possible SI issues in memory.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_SCHMOO_DQS_CLK_MIN_MARGIN</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the schmoo minimum margin to use during draminit_train_adv. Used to signal possible SI issues in memory.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_SCHMOO_RD_GATE_MIN_MARGIN</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the schmoo minimum margin to use during draminit_train_adv. Used to signal possible SI issues in memory.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_SCHMOO_ADDR_CMD_MIN_MARGIN</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the schmoo minimum margin to use during draminit_train_adv. Used to signal possible SI issues in memory.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_MEMCAL_INTERVAL</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the memcal interval in clocks.</description>
-    <valueType>uint32</valueType>
-    <enum>DISABLE = 0</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_ZQCAL_INTERVAL</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the zqcal interval in clocks.</description>
-    <valueType>uint32</valueType>
-    <enum>DISABLE = 0</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_IBM_TYPE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the memory topology type. See centaur workbook.</description>
-    <valueType>uint8</valueType>
-    <enum>UNDEFINED = 0, TYPE_1A = 1, TYPE_1B = 2, TYPE_1C = 3, TYPE_1D = 4, TYPE_2A = 5, TYPE_2B = 6, TYPE_2C = 7, TYPE_3A = 8, TYPE_3B = 9, TYPE_3C = 10, TYPE_4A = 11, TYPE_4B = 12, TYPE_4C = 13, TYPE_5A = 14, TYPE_5B = 15, TYPE_5C = 16, TYPE_5D = 17, TYPE_6A = 18, TYPE_6B = 19, TYPE_6C = 20, TYPE_7A = 21, TYPE_7B = 22, TYPE_7C = 23, TYPE_8A = 24, TYPE_8B = 25, TYPE_8C = 26</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_NUM_DROPS_PER_PORT</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the number of DIMM dimensions that are valid per port. </description>
-    <valueType>uint8</valueType>
-    <enum>EMPTY = 0, SINGLE = 1, DUAL = 2</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_STACK_TYPE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the DRAM package type.</description>
-    <valueType>uint8</valueType>
-    <enum>NONE = 0, DDP_QDP = 1, STACK_3DS = 2</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the number of master ranks per DIMM.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_NUM_PACKAGES_PER_RANK</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the number of DRAM packages per rank.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_NUM_DIES_PER_PACKAGE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Specifies the number of DRAM dies per package.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_MBA</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This is the throttle numerator setting for cfg_nm_n_per_mba creator: mss_eff_cnfg consumer: mc_config firmware notes: none</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_MEM_THROTTLE_DENOMINATOR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This is the throttle denominator setting for cfg_nm_m creator: mss_eff_cnfg consumer: mc_config  firmware notes: none</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This is the throttle numerator setting for cfg_nm_n_per_chip creator: mss_eff_cnfg consumer: mc_config firmware notes: none</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_MEM_WATT_TARGET</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Total memory power limit in cW for the dimms on the memory channel pair. Used to compute the throttles on the channel and/or dimms creator: unknown consumer: mss_eff_config firmware notes: none</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_POWER_SLOPE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Master Power slope value for dimm</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_POWER_SLOPE2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Supplier Power slope value for dimm</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_POWER_INT</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Master Power intercept value for dimm</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_POWER_INT2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Supplier Power intercept value for dimm</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_TOTAL_POWER_SLOPE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Master Total Power slope value for dimm</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_TOTAL_POWER_SLOPE2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Supplier Total Power slope value for dimm</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_TOTAL_POWER_INT</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Master Total Power intercept value for dimm</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_TOTAL_POWER_INT2</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Supplier Total Power intercept value for dimm</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_DIMM_MAXBANDWIDTH_GBS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DIMM Max Bandwidth in GBs output from thermal procedures</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_DIMM_MAXBANDWIDTH_MRS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DIMM Max Bandwidth in MRs output from thermal procedures</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_GBS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Channel Pair Max Bandwidth in GBs output from thermal procedures</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_MRS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Channel Pair Max Bandwidth MRs output from thermal procedures</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_DIMM_MAXPOWER</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DIMM Max Power output from thermal procedures</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_CHANNEL_PAIR_MAXPOWER</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Channel Pair Max Power output from thermal procedures</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_MBA</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Runtime throttle numerator setting for cfg_nm_n_per_mba</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_RUNTIME_MEM_THROTTLE_DENOMINATOR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Runtime throttle denominator setting for cfg_nm_m</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_CHIP</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Runtime throttle numerator setting for cfg_nm_n_per_chip</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Machine Readable Workbook safe mode throttle value for numerator cfg_nm_n_per_mba</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Machine Readable Workbook safe mode throttle value for numerator cfg_nm_n_per_chip</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_THERMAL_MEMORY_POWER_LIMIT</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Machine Readable Workbook Thermal Memory Power Limit</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_INTERLEAVE_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Used in the setting of groups.  It is a bit vector.  If the value  BITWISE_AND  1 = 1 then groups of 1 are enabled with special checkerboard modes needed, if the value  BITWISE_AND  2 = 2, then groups of 2 are possible; if value  BITWISE_AND  4, the groups of 4 are possible; if value  BITWISE_AND  8, the groups of 8 are possible.  If no groups can formed according to this input, then an error will be thrown.</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_MBA_ADDR_INTERLEAVE_BIT</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>This dial sets the Centaur address bits used to interleave addresses between MBA01 and MBA23.  Valid values are 23 through 32.  See Centaur Spec Chapter 5 for details.   Used in the intifile. Will be obsolete when the MSS_DERIVED_MBA_ADDR_INTERLEAVE_BIT is set
-This attribute will only be found in a Tuelta system.
-</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_DERIVED_MBA_ADDR_INTERLEAVE_BIT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>This dial sets the Centaur address bits used to interleave addresses between MBA01 and MBA23.  Valid values are 23 through 32.  See Centaur Spec Chapter 5 for details.   Used in the intifile </description>
-    <valueType>uint8</valueType>
-    <odmVisable/>
-    <odmChangeable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_MBA_CACHELINE_INTERLEAVE_MODE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Value of on or off.  On is 256 bit interleave.  Off, the translation is on 128  bit interleave mode.  See centaur workbook chapter 5.  Will be obsolete when MSS_DERIVED_MBA_CACHELINE_INTERLEAVE_MODE is set.
-This attribute will only be alive in the Tuelta system.
-</description>
-    <valueType>uint8</valueType>
-    <enum>OFF = 0, ON = 1</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_DERIVED_MBA_CACHELINE_INTERLEAVE_MODE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Value of on or off.  On is 256 bit interleave.  Off, the translation is on 128  bit interleave mode.  See centaur workbook chapter 5.</description>
-    <valueType>uint8</valueType>
-    <enum>OFF = 0, ON = 1</enum>
-    <odmVisable/>
-    <odmChangeable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>At a system level, this attribute controls if interleaving is required, requested or never.  The MRW.</description>
-    <valueType>uint8</valueType>
-    <enum>NEVER = 0, REQUIRED = 1, REQUESTED = 2</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_CACHE_ENABLE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Reflects the functionality of the L4 Cache.  Determines if the L4 is enabled or not. See chapter 6 of the Centaur Workbook.  On means the full cache is enabled.  HALF_A (EVEN) means only A is enabled and HALF_B (ODD) means only B is enabled. For DD1X, the values of UNK_OFF, UNK_ON, UNK_HALF_A and UNK_HALFB were added because early parts did not have the fuses blown correctly, so the cache repairs may not have worked. This value is set by the platform which can get the chips value by running the mss_cen_get_ecid function.
-Note: Cronus and Firmware plus our initfiles do not really support any of the UNK values.  It is the responsibility of the platform to map the UNK values to the appropriate value of OFF/ON/HALF_A/HALF_B</description>
-    <valueType>uint8</valueType>
-    <enum>OFF = 0, ON = 1, HALF_A = 3, HALF_B = 5, UNK_OFF = 8, UNK_ON = 9, UNK_HALF_A = 0xB, UNK_HALF_B = 0xD</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_PREFETCH_ENABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Value of on or off.  Determines if prefetching enabled or not. See chapter 7 of the Centaur Workbook.</description>
-    <valueType>uint8</valueType>
-    <enum>OFF = 0, ON = 1</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_CLEANER_ENABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Value of on or off.  Determines if the cleaner of the L4 cache (write modified entries to memory on idle cycles)  enabled or not. See chapter 7 of the Centaur Workbook.</description>
-    <valueType>uint8</valueType>
-    <enum>OFF = 0, ON = 1</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_MEM_MC_IN_GROUP</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>A 8 bit vector that would be a designation of which MC are involved in the group. So the bits would represent MC0,MC1,MC2,MC3,MC4,MC5,MC6,MC7-what is grouped into the first would go into [0], the 2nd group into entry [1] and so on. set in the mss_setup_bars</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array>8</array>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_MCS_GROUP_32</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Data Structure from eff grouping to setup bars to help determine different groups
-   Non- Mirroring [0-7] 0 -- MCS size //1-- No of MCS/group //2-- Total group size //3 -- Base address// 4-11 - MCS ID number// 12 --Alter.Bar //13 - A.Group Size // 14 - A.Base address
- //  Mirroring      [8-15] 0 -- MCS size //1-- No of MCS/group //2-- Total group size //3 -- Base address// 4-11 - MCS ID number// 12 --Alter.Bar //13 - A.Group Size // 14 - A.Base address
-Measured in GB</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array>16 16</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_EFF_DIMM_FUNCTIONAL_VECTOR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>A bit vector (per Dean's request) specifying if a DIMM is functional.  DIMM attributes, such as SIZE, are qualified by this bit vector.  The attribute ANDed 0x80 means port 0, DIMM 0 is functional, 0x40 means port 0, DIMM 1 is functional.  0x08 means port 1, DIMM 0 is functional and 0x04 means port 1 DIMM 1 is functional.  A fully populated system would have the value of 0xCC. Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value. creator: mss_eff_cnfg consumer: various firmware notes: none
-This factors in functionality</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_LPASR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description> Low Power Auto Self-Refresh. This is for DDR4 MRS2.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>MANUAL_NORMAL =0, MANUAL_REDUCED = 1, MANUAL_EXTENDED = 2, ASR = 3</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_MPR_PAGE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>MPR Page Selection This is for DDR4 MRS3.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>PG0 = 0, PG1 = 1, PG2 = 2, PG3 = 3</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_GEARDOWN_MODE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Gear Down Mode. This is for DDR4 MRS3.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>HALF =0, QUARTER=1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_PER_DRAM_ACCESS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Per DRAM accessibility.  This is for DDR4 MRS3.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, ENABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_TEMP_READOUT</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Temperature sensor readout. This is for DDR4 MRS3.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, ENABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_FINE_REFRESH_MODE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Fine refresh mode. This is for DDR4 MRS3.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>NORMAL = 0, FIXED_2X = 1, FIXED_4X = 2, FLY_2X = 5, FLY_4X = 6</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CRC_WR_LATENCY</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>write latency for CRC and DM. This is for DDR4 MRS3.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>4NCK = 4, 5NCK = 5, 6NCK = 6</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_MPR_RD_FORMAT</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>MPR READ FORMAT. This is for DDR4 MRS3.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>SERIAL = 0, PARALLEL = 1, STAGGERED = 2, RESERVED_TEMP= 3</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_MAX_POWERDOWN_MODE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Max Power down mode. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, ENABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_TEMP_REF_RANGE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Temp ref range. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>NORMAL = 0, EXTEND = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_TEMP_REF_MODE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Temp controlled ref mode. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, ENABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_INT_VREF_MON</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Internal Vref Monitor.. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, ENABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CS_CMD_LATENCY</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>CS to CMD/ADDR Latency. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, 3CYC = 3, 4CYC = 4, 5CYC = 5, 6CYC = 6, 8CYC = 8</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_SELF_REF_ABORT</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Self Refresh Abort. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, ENABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_RD_PREAMBLE_TRAIN</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Read Pre amble Training Mode. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, ENABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_RD_PREAMBLE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Read Pre amble. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>1NCLK = 1, 2NCLK = 2</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_WR_PREAMBLE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Write Pre amble. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>1NCLK = 1, 2NCLK = 2</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CA_PARITY_LATENCY</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>C/A Parity Latency Mode. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, PL4 = 4, PL5 = 5, PL6 = 6, PL8 = 8</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CRC_ERROR_CLEAR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>CRC Error Clear. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>CLEAR = 0, ERROR = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CA_PARITY_ERROR_STATUS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>C/A Parity Error Status. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>CLEAR = 0, ERROR = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_ODT_INPUT_BUFF</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>ODT Input Buffer during power down. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DEACTIVATED = 0, ACTIVATED = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_RTT_PARK</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RTT_Park value. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, 60OHM = 60, 120OHM = 120, 40OHM = 40, 240OHM = 240, 48OHM = 48, 80OHM = 80, 34OHM = 34</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_CA_PARITY</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>CA Parity Persistance Error. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, ENABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DATA_MASK</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Data Mask. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, ENABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_WRITE_DBI</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Write DBI. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, ENABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_READ_DBI</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Read DBI. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-creator: mss_eff_cnfg
-consumer: various
-firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, ENABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VREF_DQ_TRAIN_VALUE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>vrefdq_train value. This is for DDR4 MRS6.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-Creator: mss_eff_cnfg
-Consumer:various
-Firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VREF_DQ_TRAIN_RANGE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>vrefdq_train range. This is for DDR4 MRS6.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-Creator: mss_eff_cnfg
-Consumer:various
-Firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>RANGE1 = 0, RANGE2 = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_VREF_DQ_TRAIN_ENABLE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>vrefdq_train enable. This is for DDR4 MRS6.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-Creator: mss_eff_cnfg
-Consumer:various
-Firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, ENABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_DRAM_TCCD_L</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>tccd_l. This is for DDR4 MRS6.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-Creator: mss_eff_cnfg
-Consumer:various
-Firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>4NCK = 4, 5NCK = 5, 6NCK = 6, 7NCK = 7, 8NCK = 8</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_TCCD_L</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>tccd_l. This is for DDR4 MRS6.  Computed in mss_eff_cnfg. Each memory channel will have a value.
-Creator: mss_eff_cnfg
-Consumer:various
-Firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>4NCK = 4, 5NCK = 5, 6NCK = 6, 7NCK = 7, 8NCK = 8</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_WRITE_CRC</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Write CRC control for DDR4 in MRS2.  Set in mss_eff_cnfg.  Each memory channel will have a value.
-Creator: mss_eff_cnfg
-Consumer:various
-Firmware notes: none</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 0, ENABLE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_CAL_STEP_ENABLE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>A bit vector denoting valid cal steps to run during dram_init_train. [0] EXT_ZQCAL
-[1] WR_LEVEL
-[2] DQS_ALIGN
-[3] RDCLK_ALIGN
-[4] READ_CTR
-[5] WRITE_CTR
-[6] COARSE_WR
-[7] COARSE_RD
-bits6:7  will be consumed together to form COARSE_LVL. </description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_DRAMINIT_RESET_DISABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>A disable switch for resetting the phy delay values at the beginning of calling mss_draminit_training.</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 1, ENABLE = 0</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_MEM_IPL_COMPLETE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>A numerical number indicating if the memory procedures are complete.  written by mss_setup_bars when the bars are now functional in the processor.  </description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_SLEW_RATE_DATA</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>The 4 bit result of running the slew calibration algorithm at various rates and impedances.  The first dimension is port, the second is the impedance of 24,30,34, and 40 Ohms.  The 3rd dimension is the rate: 3,4,5 or 6 V/ns.  Computed and sent to the correct data blocks in phy_reset.  Also used in advanced training</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 4 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_SLEW_RATE_ADR</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>The 4 bit result of running the slew calibration algorithm at various rates and impedances.  The first dimension is the port.  The second is the impedance of 15, 20, 30 and 40 Ohms.  The 3rd dimension is the rate:3, 4,5 or 6 V/ns.  Computed and sent to the correct data blocks in phy_reset.  Also used in advanced training</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 4 4</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_ALLOW_SINGLE_PORT</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>When this value is true, then mss_eff config will allow a single port to have one dimm and will allow ports to have different sizes.  Used in eff_config</description>
-    <valueType>uint8</valueType>
-    <enum>FALSE = 0, TRUE = 1</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_DQS_SWIZZLE_TYPE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>DQS Swizzle type is set by the platform to describe what kind of DQS connection is being used for register acceses. Type 0 is normal, type 1 is for systems with wiring like glacier 1, type 2 is for Pallmeto.  Additional types maybe defined if new boards have even different DQS swizzle features</description>
-    <valueType>uint8</valueType>
-    <enum>NORMAL_TYPE_0 = 0, GLACIER_TYPE_1 = 1, ISDIMM_TYPE_2 = 2</enum>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_PSRO</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Set by the centaur mss_get_cen_ecid function used diagnostic and chip characterization reporting</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_NWELL_MISPLACEMENT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Set by the platform depending on DD1 vs DD1.01.  If true, then SI settings affected by the NWELL problem are adjusted.  Used in eff_config</description>
-    <valueType>uint8</valueType>
-    <enum>FALSE = 0, TRUE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_BLUEWATERFALL_BROKEN</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Set by the platform depending on DD1.0X vs DD1.03 or newer.  If true, then draminit_train will modify dqs_clk_ps and gate to work around the issue. Set in get ecid which determines if we are at 1.03</description>
-    <valueType>uint8</valueType>
-    <enum>FALSE = 0, TRUE = 1</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_PATTERN</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Enables mcbist data pattern selection.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_TEST_TYPE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Enables mcbist test type selection.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_PRINTING_DISABLE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>MCBIST support for printing</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_DATA_ENABLE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>MCBIST support for enabling data</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_USER_RANK</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>MCBIST support for rank selection</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_USER_BANK</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>MCBIST support for bank selection</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_SCHMOO_MULTIPLE_SETUP_CALL</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>MCBIST for multiple setup</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_BUFFER_LATENCY</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Additional buffer latency in the case of RDIMMs and LRDIMMs.    It is expected that this value will come from the VPD</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_LRDIMM_WORD_X</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Additional buffer control word for LRDIMM building of the BCW</description>
-    <valueType>uint64</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-        <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_LRDIMM_MR12_REG</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>LRDIMM MR1,2 register.
-DRAM Rtt_WR for all ranks, DRAM Rtt_Nom for ranks 0 and 1, DRAM driver impedance for all ranks.  Eff config should set this up.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_EFF_LRDIMM_ADDITIONAL_CNTL_WORDS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>LRDIMM additional RCD control words as set by DIMM SPD:
-F[3,4]RC10, F[3,4]RC11, F[5,6]RC10, F[5,6]RC11, F[7,8]RC10, F[7,8]RC11, F[9,10]RC10, F[9,10]RC11,
-F[1]RC8, F[3]RC9, F[3]RC8, F[1]RC11, F[1]RC12, F[1]RC13, F[1]RC14, F[1]RC15.
-Eff config should set this up</description>
-    <valueType>uint64</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_LRDIMM_ADDITIONAL_CNTL_WORDS</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>LRDIMM additional RCD control words as set by DIMM SPD:
-F[3,4]RC10, F[3,4]RC11, F[5,6]RC10, F[5,6]RC11, F[7,8]RC10, F[7,8]RC11, F[9,10]RC10, F[9,10]RC11,
-F[1]RC8, F[3]RC9, F[3]RC8, F[1]RC11, F[1]RC12, F[1]RC13, F[1]RC14, F[1]RC15.
-Eff config should set this up</description>
-    <valueType>uint64</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <array> 2 2</array>
-</attribute>
-
-<attribute>
-    <id>ATTR_LRDIMM_RANK_MULT_MODE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>LRDIMM rank multiplication mode.
-Will be set at an MBA level with one policy to be used</description>
-    <valueType>uint8</valueType>
-    <enum>NORMAL = 0, 2X_MULT = 2, 4X_MULT = 4</enum>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_THROTTLE_CONTROL_RAS_WEIGHT</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RAS weight to use for memory throttle control - set in thermal procedures</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_THROTTLE_CONTROL_CAS_WEIGHT</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>CAS weight to use for memory throttle control - set in thermal procedures</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_RANDOM_SEED_VALUE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Controls the MCBIST engine in the centaur chip.  The value will be set in mss_eff_config_shmoo.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_RANDOM_SEED_TYPE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Controls the MCBIST engine in the centaur chip.  The value will be set in mss_eff_config_shmoo.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MCBIST_DDR4_PDA_ENABLE</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>Controls PDA train enable or PBA. 00 - Disable; 01 - PDA; 02 - PBA(Lrdimm)</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Machine Readable Workbook DIMM power curve percent uplift for this system at max utilization.</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT_IDLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Machine Readable Workbook DIMM power curve percent uplift for this system at idle utilization.</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_MEM_THROTTLE_DENOMINATOR</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Machine Readable Workbook throttle value for denominator cfg_nm_m</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_INIT_STATE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>How far into the ipl istep the centaur has been brought up</description>
-    <enum>COLD = 0, CLOCKS_ON = 1, DMI_ACTIVE = 2</enum>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_MAX_DRAM_DATABUS_UTIL</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Machine Readable Workbook value for maximum dram data bus utilization in centi percent (c%).  Used to determine memory throttle values.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_EFF_VPD_VERSION</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>
-        The lowest VPD Version of the DIMMs attached to the MBA. Comes directly (in ASCII) of the VINI VZ keyword
-    </description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_NEST_CAPABLE_FREQUENCIES</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        The NEST frequencies the memory chip can run at computed by the mss_freq.  The possibilities are ORed together.  The platform uses these value and the MRW to determine what frequency to boot the fabric (nest) if it can. There are two values: 8G and 9.6G
-    </description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <enum>NONE = 0, 8_0G = 1, 9_6G = 2, 8_0G_OR_9_6G = 3</enum>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_STRICT_MBA_PLUG_RULE_CHECKING</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-       The MRW for a system should set this to TRUE for systems that must obey plug rules.  Lab environments should default this to off and allow the user to override using normal methods to test.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <enum>FALSE = 0, TRUE = 1</enum>
-</attribute> 
-
-<attribute>
-    <id>ATTR_MRW_ENHANCED_GROUPING_NO_MIRRORING</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-       The MRW for a system should set this to TRUE for systems that do not want to suport MCS groupings larget than 2.  Mirroring  also must be disabled and is unusable. IBM systems, such as Tuleta, should set this attribute to FALSE.  Stradale based systems should set this to TRUE.  This instructs the grouping code to group contiguous memory controllers of the same size together.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <enum>FALSE = 0, TRUE = 1</enum>
-</attribute> 
-
-<attribute>
-    <id>ATTR_MRW_CDIMM_MASTER_I2C_TEMP_SENSOR_ENABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Used for Custom DIMMs to not enable the reading of the dimm temperature sensor on the master i2c bus</description>
-    <valueType>uint8</valueType>
-    <enum>OFF = 0, ON = 1</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_CDIMM_SPARE_I2C_TEMP_SENSOR_ENABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Used for Custom DIMMs to not enable the reading of the dimm temperature sensor on the spare i2c bus</description>
-    <valueType>uint8</valueType>
-    <enum>OFF = 0, ON = 1</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_AVDD_OFFSET_DISABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Used for to determine whether to apply an offset to AVDD. Supplied by MRW.</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 1, ENABLE = 0</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VDD_OFFSET_DISABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Used for to determine whether to apply an offset to VDD. Supplied by MRW.</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 1, ENABLE = 0</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VCS_OFFSET_DISABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Used for to determine whether to apply an offset to VCS. Supplied by MRW.</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 1, ENABLE = 0</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VPP_OFFSET_DISABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Used for to determine whether to apply an offset to VCS. Supplied by MRW.</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 1, ENABLE = 0</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VDDR_OFFSET_DISABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Used for to determine whether to apply an offset to VDDR. Supplied by MRW.</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 1, ENABLE = 0</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_AVDD_SLOPE_ACTIVE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Slope value used to determine the dynamic VID AVDD adjustment for ACTIVE parts. In uV/Centaur.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_AVDD_SLOPE_INACTIVE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Slope value used to determine the dynamic VID AVDD adjustment for INACTIVE parts. In uV/Centaur.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_AVDD_SLOPE_INTERCEPT</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Intercept value used to determine the dynamic VID AVDD adjustment for all parts. In mV.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VDD_SLOPE_ACTIVE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Slope value used to determine the dynamic VID VDD adjustment for ACTIVE parts. In uV/Centaur.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VDD_SLOPE_INACTIVE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Slope value used to determine the dynamic VID VDD adjustment for INACTIVE parts. In uV/Centaur.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VDD_SLOPE_INTERCEPT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Intercept value used to determine the dynamic VID VDD adjustment for all parts. In mV.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VCS_SLOPE_ACTIVE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Slope value used to determine the dynamic VID VCS adjustment for ACTIVE parts. In uV/Centaur.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VCS_SLOPE_INACTIVE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Slope value used to determine the dynamic VID VCS adjustment for INACTIVE parts. In uV/Centaur.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VCS_SLOPE_INTERCEPT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Intercept value used to determine the dynamic VID VCS adjustment for all parts. In mV.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VPP_SLOPE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Slope value used to determine the dynamic VID VPP adjustment for all parts. In uV/Centaur.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VPP_SLOPE_INTERCEPT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Intercept value used to determine the dynamic VID VPP adjustment for all parts. In mV.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_DDR3_VDDR_SLOPE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Slope value used to determine the dynamic VID DDR3 VDDR adjustment for all parts. In uV/Centaur.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_DDR3_VDDR_INTERCEPT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Intercept value used to determine the dynamic VID DDR3 VDDR adjustment for all parts. In mV.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_DDR4_VDDR_SLOPE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Slope value used to determine the dynamic VID DDR3 VDDR adjustment for all parts. In uV/Centaur.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_DDR4_VDDR_INTERCEPT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Intercept value used to determine the dynamic VID DDR3 VDDR adjustment for all parts. In mV.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VOLT_OVERRIDE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Possible DRAM voltage override.</description>
-    <valueType>uint8</valueType>
-    <enum>NONE = 0x00, VOLT_135 = 0x01, VOLT_120 = 0x02</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VOLT_COMPLIANT_DIMMS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>List of Voltages that are compliant with the system. DIMMs that do not have voltages listed in their SPD as supported are errored out.  Procedure defined is currently 1.2V and 1.35V only.</description>
-    <valueType>uint8</valueType>
-    <enum> PROCEDURE_DEFINED = 0x00, ALL_VOLTAGES = 0x01</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Option to control MCS prefetch retry threshold, for performance optimization. This attribute controls the number of retries in the prefetch engine. Retry threshold available ranges from 16 to 30. Note: Values outside those ranges will default to 30. In MRW.</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_POWER_CONTROL_REQUESTED</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Capable power control settings. In MRW.</description>
-    <valueType>uint8</valueType>
-    <enum>OFF = 0x00, SLOWEXIT = 0x01, FASTEXIT = 0x02</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_AVDD_OFFSET</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Dynamic VID offset applied to AVDD. In mV.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VDD_OFFSET</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Dynamic VID offset applied to VDD. In mV.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VCS_OFFSET</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Dynamic VID offset applied to VCS. In mV.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VPP_OFFSET</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Dynamic VID offset applied to VPP. In mV.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VDDR_OFFSET</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Dynamic VID offset applied to VDDR. In mV.</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VDDR_OVERIDE_SPD</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Possible VDDR voltage override.</description>
-    <valueType>uint8</valueType>
-    <enum>NONE = 0x00, VOLT_1350 = 0x01, VOLT_1200 = 0x02</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_ISDIMMTOC4DQ</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        ISDIMM DQ mapping that comes from QX keyword on the CDIMM VPD.
-    </description>
-    <valueType>uint8</valueType>
-    <array>4 80</array>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_VPD_ISDIMMTOC4DQS</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-        ISDIMM DQQ mapping that comes from QS keyword on the CDIMM VPD. 
-    </description>
-    <valueType>uint8</valueType>
-    <array>4 20</array>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_ISDIMM_POWER_CURVE_ALGORITHM_VERSION</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Version of algorithm and dependent attributes used to calculate ISDIMM power curve attributes</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <readable/>
-    <writeable/>
-    <persistent/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_DDR3_VDDR_MAX_LIMIT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Maximum voltage limit for the dynamic VID DDR3 VDDR voltage setpoint. In mV.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_DDR4_VDDR_MAX_LIMIT</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Maximum voltage limit for the dynamic VID DDR4 VDDR voltage setpoint. In mV.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_MEM_SENSOR_CACHE_ADDR_MAP</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Machine Readable Workbook value detailing the wiring of the 8 dimm temperature sensors for non custom dimms, in DIMM A0,A1,B0,B1,C0,C1,D0,D1 order. One nibble per sensor where bit0 (MSB) is the i2c bus the sensor is attached to (0 for master, 1 for spare) and bits 1:3 are for A2,A1,A0 of the sensor i2c address (where A2 is MSB)</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_VMEM_REGULATOR_MAX_DIMM_COUNT</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Maximum number of installed DIMMs per VMEM regulator for all VMEM regulators in the system.</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Machine Readable Workbook enablement of the HWP code to adjust the VMEM regulator power limit based on number of installed DIMMs.</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <enum>FALSE = 0, TRUE = 1</enum>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Machine Readable Workbook value for the maximum possible number of dimms that can be installed under any of the VMEM regulators.</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Machine Readable Workbook VMEM regulator power limit per CDIMM assuming a full configuration. Units in cW.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<!-- DO NOT EDIT THIS FILE DIRECTLY PLEASE UPDATE THE ODS FILE AND FOLLOW THE INSTRUCTION TAB -->
-<!-- PLEASE SEE MARK BELLOWS (BELLOWS.IBM.COM) OR OTHERS ON MEMORY TEAM FOR HELP -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/mvpd_accessors/mvpd_errors.xml b/src/usr/hwpf/hwp/mvpd_accessors/mvpd_errors.xml
deleted file mode 100644
index 29fe1ea31..000000000
--- a/src/usr/hwpf/hwp/mvpd_accessors/mvpd_errors.xml
+++ /dev/null
@@ -1,460 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/mvpd_accessors/mvpd_errors.xml $             -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: mvpd_errors.xml,v 1.23 2015/02/24 19:25:00 whs Exp $ -->
-<hwpErrors>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_REPAIR_RING_INVALID_RINGBUF_PTR</rc>
-    <description>
-        Invalid input parameter:  pointer to ringbuffer was NULL
-    </description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_REPAIR_RING_ALLOC_FAIL</rc>
-    <description>
-        Failed to allocate buffer space for repair ring data
-    </description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_REPAIR_RING_INVALID_SIZE</rc>
-    <description>
-        Invalid input parameter: buffer too small to copy repair ring data
-    </description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_REPAIR_RING_NOT_FOUND</rc>
-    <description>
-        The repair ring specified was not found.
-        Most likely reason is bad VPD
-    </description>
-    <ffdc>RING_MODIFIER</ffdc>
-    <ffdc>CHIPLET_ID</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP_TARGET</target>
-    </deconfigure>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MVPD_RING_FUNC_INVALID_PARAMETER</rc>
-    <description>
-        An invalid parameter was passed to a mvpd ring function.
-    </description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MVPD_RING_FUNC_INSUFFICIENT_RECORD_SPACE</rc>
-    <description>
-        Insufficient room in the record to set the requested ring.
-    </description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MVPD_EX_L2_SINGLE_MEMBER_ENABLE_BAD_FIELD_SIZE</rc>
-    <description>
-        VPD Field size too small to contain the EX_L2_SINGLE_MEMBER_ENABLE data
-    </description>
-    <ffdc>FIELD_SIZE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_INVALID_ATTRIBUTE_ID</rc>
-    <description>
-        Invalid attribute ID
-    </description>
-    <ffdc>ATTR_ID</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE</rc>
-    <description>
-        Output variable size must match size of expected output type.
-    </description>
-    <ffdc>ATTR_ID</ffdc>
-    <ffdc>EXPECTED_SIZE</ffdc>
-    <ffdc>PASSED_SIZE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_INSUFFICIENT_VPD_RETURNED</rc>
-    <description>
-        VPD keyword record returned is smaller than expected.
-        Probably a firmware bug, but could be bad VPD
-    </description>
-    <ffdc>KEYWORD</ffdc>
-    <ffdc>RETURNED_SIZE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_INVALID_VM_DATA_RETURNED</rc>
-    <description>
-        VM keyword data returned is out of range of supported version values.
-        Probably a firmware bug, but could be bad VPD
-    </description>
-    <ffdc>KEYWORD</ffdc>
-    <ffdc>RETURNED_VALUE</ffdc>
-    <ffdc>RECORD_NAME</ffdc>
-    <ffdc>DIMM_TYPE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_INVALID_VM_VERSION_RETURNED</rc>
-    <description>
-        VM version returned is out of range of supported version values.
-        Probably a firmware bug, but could be bad VPD
-    </description>
-    <ffdc>KEYWORD</ffdc>
-    <ffdc>RETURNED_VALUE</ffdc>
-    <ffdc>RECORD_NAME</ffdc>
-    <ffdc>DIMM_TYPE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>MEDIUM</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_UNEXPECTED_KEYWORD</rc>
-    <description>
-        Unexpected VPD keyword defined for the attribute in
-        attribute look up table , which doesn't have any layout properties.
-    </description>
-    <ffdc>ATTR_ID</ffdc>
-    <ffdc>KEYWORD</ffdc>
-    <ffdc>VERSION</ffdc>
-    <ffdc>DIMM_TYPE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_SUPPLIER_ID_NOT_IN_MV_VPD</rc>
-    <description>
-        The Module ID in the #I keyword is not in the list of supplier provided entries in the MV keyword.
-        Bad C-DIMM VPD.
-    </description>
-    <ffdc>MODULE_ID</ffdc>
-    <callout>
-      <target>MEMBUF_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_TARGET</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_TARGET</target>
-    </gard>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_RING_FUNC_INVALID_PARAMETER</rc>
-    <description>
-        An invalid parameter was passed to a mbvpd ring function.
-    </description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_TERM_DATA_UNSUPPORTED_VPD_ENCODE</rc>
-    <description>
-        The requested vpd value does not have a translation value.
-    </description>
-    <ffdc>ATTR_ID</ffdc>
-    <ffdc>VPD_VALUE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_DRAM_2N_MODE_NOT_EQUAL</rc>
-    <description>
-        The 2 ports of DRAM 2N MODE should be equal in VPD.
-        Bad C-DIMM VPD.
-    </description>
-    <ffdc>PORT0</ffdc>
-    <ffdc>PORT1</ffdc>
-    <callout>
-      <target>MBA_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>MBA_TARGET</target>
-    </deconfigure>
-    <gard>
-      <target>MBA_TARGET</target>
-    </gard>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_INVALID_MODE_PARAMETER</rc>
-    <description>
-        Mode must be Get or Set.
-    </description>
-    <ffdc>MODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_UNEXPECTED_MEM_TYPE</rc>
-    <description>
-        Memory type in VSPD keyword #I not DDR3 or DDR4
-        Unsupported C-DIMM VPD.
-    </description>
-    <ffdc>MEM_TYPE</ffdc>
-    <callout>
-      <target>MEMBUF_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>MEMBUF_TARGET</target>
-    </deconfigure>
-    <gard>
-      <target>MEMBUF_TARGET</target>
-    </gard>
-  </hwpError>
-  <hwpError>
-    <rc>RC_MBVPD_INVALID_MT_DATA</rc>
-    <description>
-        To get the proper MT data, we need a valid
-        dimm rank combination.
-    </description>
-    <ffdc>RANK_NUM</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <hwpError>
-    <rc>RC_MBVPD_INVALID_DQ_DATA</rc>
-    <description>
-        To get the proper DQ data, we have to be given
-        a valid copy to collect.
-    </description>
-    <ffdc>DQ_COPY</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <hwpError>
-    <rc>RC_MBVPD_DIMMS_NOT_FOUND</rc>
-    <description>
-        To get the proper MT data, we need to find the
-        dimm's to get a valid dimm rank combination
-    </description>
-    <ffdc>DIMM_P0S0</ffdc>
-    <ffdc>DIMM_P0S1</ffdc>
-    <ffdc>DIMM_P1S0</ffdc>
-    <ffdc>DIMM_P1S1</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <hwpError>
-    <rc>RC_MBVPD_INVALID_DIMM_FOUND</rc>
-    <description>
-        Something went very wrong in the dimm's and
-        the combination received is not valid
-    </description>
-    <ffdc>INVALID_DIMM_P0S0</ffdc>
-    <ffdc>INVALID_DIMM_P0S1</ffdc>
-    <ffdc>INVALID_DIMM_P1S0</ffdc>
-    <ffdc>INVALID_DIMM_P1S1</ffdc>
-    <callout>
-      <procedure>MEMORY_PLUGGING_ERROR</procedure>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>MBA</target>
-      <priority>MEDIUM</priority>
-    </callout>
-    <deconfigure>
-      <target>MBA</target>
-    </deconfigure>
-  </hwpError>
-  <hwpError>
-    <rc>RC_MBVPD_INVALID_M0_DATA</rc>
-    <description>
-         To get the proper MR data, we need to have the
-         correct M0 data.
-    </description>
-    <ffdc>M0_DATA</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <hwpError>
-    <rc>RC_MBVPD_INVALID_DQS_DATA</rc>
-    <description>
-        To get the proper DQS data, we have to be given
-        a valid copy to collect.
-    </description>
-    <ffdc>DQS_COPY</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_UNEXPECTED_ISDIMM_KEYWORD</rc>
-    <description>
-         ISDIMM Attribute definition has unexpected keyword value.
-    </description>
-    <ffdc>ATTR_ID</ffdc>
-    <ffdc>KEYWORD</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_DEFAULT_UNEXPECTED_OUTPUT_TYPE</rc>
-    <description>
-         Default attribute definition has unexpected output type.
-    </description>
-    <ffdc>ATTR_ID</ffdc>
-    <ffdc>DIMM_TYPE</ffdc>
-    <ffdc>OUTPUT_TYPE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_UINT64_UNEXPECTED_OUTPUT_TYPE</rc>
-    <description>
-         Uint64_t attribute definition has unexpected output type.
-    </description>
-    <ffdc>ATTR_ID</ffdc>
-    <ffdc>DIMM_TYPE</ffdc>
-    <ffdc>OUTPUT_TYPE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_UNEXPECTED_OUTPUT_TYPE</rc>
-    <description>
-         Attribute definition has unexpected output type.
-    </description>
-    <ffdc>ATTR_ID</ffdc>
-    <ffdc>DIMM_TYPE</ffdc>
-    <ffdc>OUTPUT_TYPE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_MBVPD_ATTRIBUTE_NOT_FOUND</rc>
-    <description>
-        Attribute not found in attribute look up table
-    </description>
-    <ffdc>ATTR_ID</ffdc>
-    <ffdc>DIMM_TYPE</ffdc>
-    <ffdc>VERSION</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_registers.xml b/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_registers.xml
deleted file mode 100755
index 25dcc9334..000000000
--- a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_registers.xml
+++ /dev/null
@@ -1,56 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_registers.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2014                   -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_a_x_pci_dmi_pll_registers.xml,v 1.1 2014/02/04 18:55:00 mfred Exp $ -->
-<!-- Definition of PLL registers to collect on some errors -->
-
-<hwpErrors>
-  <registerFfdc>
-    <id>REG_FFDC_DMI_PLL_NO_LOCK_REGISTERS</id>
-    <scomRegister>NEST_GP3_0x020F0012</scomRegister>
-    <scomRegister>PB_PLLLOCKREG_0x020F0019</scomRegister>
-    <cfamRegister>CFAM_FSI_GP3_0x00002812</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP4_0x00002813</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP6_0x00002815</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP7_0x00002816</cfamRegister>
-  </registerFfdc>
-
-  <registerFfdc>
-    <id>REG_FFDC_ABUS_PLL_NO_LOCK_REGISTERS</id>
-    <scomRegister>A_GP3_0x080F0012</scomRegister>
-    <scomRegister>A_PLLLOCKREG_0x080F0019</scomRegister>
-    <cfamRegister>CFAM_FSI_GP3_0x00002812</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP4_0x00002813</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP6_0x00002815</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP7_0x00002816</cfamRegister>
-  </registerFfdc>
-
-  <registerFfdc>
-    <id>REG_FFDC_PCIE_PLL_NO_LOCK_REGISTERS</id>
-    <scomRegister>PCIE_GP3_0x090F0012</scomRegister>
-    <scomRegister>PCIE_PLLLOCKREG_0x090F0019</scomRegister>
-    <cfamRegister>CFAM_FSI_GP3_0x00002812</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP4_0x00002813</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP6_0x00002815</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP7_0x00002816</cfamRegister>
-  </registerFfdc>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup_errors.xml b/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup_errors.xml
deleted file mode 100644
index db6e1782c..000000000
--- a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup_errors.xml
+++ /dev/null
@@ -1,186 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_a_x_pci_dmi_pll_setup_errors.xml,v 1.10 2015/06/01 01:54:08 rjknight Exp $ -->
-<!-- Halt codes for proc_a_x_pci_dmi_pll_setup -->
-<hwpErrors>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_P8_PLL_UTILS_SBE_STOPPED</rc>
-    <ffdc>TARGET</ffdc>
-    <ffdc>SBE_CONTROL</ffdc>
-    <description>SBE is not running, unable to service scan request.</description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
-      <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-      <target>TARGET</target>
-    </collectRegisterFfdc>
-    <deconfigure>
-      <target>TARGET</target>
-    </deconfigure>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_P8_PLL_UTILS_SBE_TIMEOUT_ERROR</rc>
-    <ffdc>TARGET</ffdc>
-    <ffdc>POLL_COUNT</ffdc>
-    <ffdc>SBE_VITAL</ffdc>
-    <description>After requesting SBE scan operation, timed out waiting for SBE to attain ready state.</description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
-      <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-      <target>TARGET</target>
-    </collectRegisterFfdc>
-    <deconfigure>
-      <target>TARGET</target>
-    </deconfigure>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_P8_PLL_UTILS_SBE_SCAN_ERROR</rc>
-    <ffdc>TARGET</ffdc>
-    <ffdc>PLL_RING_ADDR</ffdc>
-    <ffdc>PLL_RING_OP</ffdc>
-    <ffdc>PLL_BUS_ID</ffdc>
-    <ffdc>MBOX1_DATA</ffdc>
-    <description>SBE scan service indicated scan failure.</description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
-      <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-      <target>TARGET</target>
-    </collectRegisterFfdc>
-    <deconfigure>
-      <target>TARGET</target>
-    </deconfigure>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_P8_PLL_UTILS_INVALID_OPERATION</rc>
-    <ffdc>TARGET</ffdc>
-    <ffdc>PLL_RING_ADDR</ffdc>
-    <ffdc>PLL_RING_OP</ffdc>
-    <ffdc>PLL_BUS_ID</ffdc>
-    <ffdc>INVALID_RING_ADDRESS</ffdc>
-    <ffdc>INVALID_RING_OP</ffdc>
-    <ffdc>INVALID_BUS_ID</ffdc>
-    <description>Invalid PLL configuration action requested.</description>
-    <callout>
-        <procedure>CODE</procedure>
-        <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_A_X_PCI_DMI_PLL_SETUP_ABUS_PLL_NO_LOCK</rc>
-    <ffdc>LOCK_STATUS</ffdc>
-    <description>A_Bus PLL failed to lock.</description>
-    <collectRegisterFfdc>
-        <id>REG_FFDC_ABUS_PLL_NO_LOCK_REGISTERS</id>
-        <target>CHIP_IN_ERROR</target>
-    </collectRegisterFfdc>
-    <callout>
-        <hw>
-            <hwid>PROC_REF_CLOCK</hwid>
-            <refTarget>CHIP_IN_ERROR</refTarget>
-        </hw>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>CHIP_IN_ERROR</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <procedure>CODE </procedure>
-        <priority>LOW</priority>
-    </callout>
-    <!-- Deconfigure CHIP_IN_ERROR -->
-    <deconfigure>
-      <target>CHIP_IN_ERROR</target>
-    </deconfigure>
-    <!-- Create GARD record for CHIP_IN_ERROR -->
-    <gard>
-      <target>CHIP_IN_ERROR</target>
-    </gard>
-  </hwpError>
-
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_A_X_PCI_DMI_PLL_SETUP_DMI_PLL_NO_LOCK</rc>
-    <ffdc>LOCK_STATUS</ffdc>
-    <description>DMI PLL failed to lock.</description>
-    <collectRegisterFfdc>
-        <id>REG_FFDC_DMI_PLL_NO_LOCK_REGISTERS</id>
-        <target>CHIP_IN_ERROR</target>
-    </collectRegisterFfdc>
-    <callout>
-        <hw>
-            <hwid>PROC_REF_CLOCK</hwid>
-            <refTarget>CHIP_IN_ERROR</refTarget>
-        </hw>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>CHIP_IN_ERROR</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <procedure>CODE </procedure>
-        <priority>LOW</priority>
-    </callout>
-    <!-- Deconfigure CHIP_IN_ERROR -->
-    <deconfigure>
-      <target>CHIP_IN_ERROR</target>
-    </deconfigure>
-    <!-- Create GARD record for CHIP_IN_ERROR -->
-    <gard>
-      <target>CHIP_IN_ERROR</target>
-    </gard>
-  </hwpError>
-
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_A_X_PCI_DMI_PLL_SETUP_PCIE_PLL_NO_LOCK</rc>
-    <ffdc>LOCK_STATUS</ffdc>
-    <description>PCIE PLL failed to lock.</description>
-    <collectRegisterFfdc>
-        <id>REG_FFDC_PCIE_PLL_NO_LOCK_REGISTERS</id>
-        <target>CHIP_IN_ERROR</target>
-    </collectRegisterFfdc>
-    <callout>
-        <hw>
-            <hwid>PCI_REF_CLOCK</hwid>
-            <refTarget>CHIP_IN_ERROR</refTarget>
-        </hw>
-        <priority>HIGH</priority>
-    </callout>
-    <callout>
-        <target>CHIP_IN_ERROR</target>
-        <priority>MEDIUM</priority>
-    </callout>
-    <callout>
-        <procedure>CODE </procedure>
-        <priority>LOW</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_attributes.xml b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_attributes.xml
deleted file mode 100644
index 7efcf7449..000000000
--- a/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_attributes.xml
+++ /dev/null
@@ -1,380 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_attributes.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_pcie_scominit_attributes.xml,v 1.7 2014/11/18 17:46:06 jmcgill Exp $ -->
-<!-- proc_pcie_scominit_attributes.xml -->
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_NUM_PHB</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform
-        Number of PCIe PHB units present on target
-        Murano/Venice: 3
-        Naples: 4
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_NUM_IOP</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform
-        Number of PCIe IOP units present on target
-        Murano/Venice: 2
-        Naples: 3
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_NUM_LANES</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform
-        Number of PCIe I/O lanes supported by target
-        Murano: 24
-        Venice: 32
-        Naples: 40
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_CONFIG</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>PCIE IOP lane configuration
-      creator: platform
-      consumer: proc_pcie_scominit
-      firmware notes:
-        Encoded PCIE IOP lane configuration
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_SWAP</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>PCIE IOP swap configuration
-      creator: platform
-      consumer: proc_pcie_scominit
-      firmware notes:
-        Encoded PCIE IOP swap configuration
-        Array index: IOP number (0:2)
-    </description>
-    <valueType>uint8</valueType>
-    <array>3</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_PHB_ACTIVE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>PCIE PHB valid mask
-      creator: platform
-      consumer: proc_pcie_scominit
-      firmware notes:
-        Bit mask defining set of active/valid PHBs
-        bit0=PHB0, bit1=PHB1, bit2=PHB2, bit3=PHB3
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_REFCLOCK_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>PCIE refclock enable valid mask
-      creator: platform
-      consumer: proc_pcie_scominit
-      firmware notes:
-        Bit mask defining state of refclock drive enables
-        bit0=PCI0, bit1=PCI1, bit2=PCI2, bit3=PCI3
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_G3_PLL_CONTROL0</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform (MRW)
-      consumer: proc_pcie_scominit
-      firmware notes:
-        PCIe Gen3 PLL Control Register 0.
-        ATUNE/CPISEL.
-        Array index: IOP number(0:2)
-    </description>
-    <valueType>uint32</valueType>
-    <array>3</array>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_G2_PLL_CONTROL0</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform (MRW)
-      consumer: proc_pcie_scominit
-      notes:
-        PCIe Gen2/Gen1 PLL Control Register 0.
-        ATUNE/CPISEL.
-        Array index: IOP number (0:2)
-    </description>
-    <valueType>uint32</valueType>
-    <array>3</array>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform (MRW)
-      consumer: proc_pcie_scominit
-      notes:
-        PCIe PLL Global Control Register 0.
-        REFISRC/REFISINK.
-        Array index: IOP number (0:2)
-    </description>
-    <valueType>uint32</valueType>
-    <array>3</array>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform (MRW)
-      consumer: proc_pcie_scominit
-      notes:
-        PCIe PLL Global Control Register 1.
-	ENBGDOCPSRC/ENBGDOCAMP/REFVREG.
-        Array index: IOP number (0:2)
-    </description>
-    <valueType>uint32</valueType>
-    <array>3</array>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_PCS_CONTROL0</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform (MRW)
-      consumer: proc_pcie_scominit
-      notes:
-        PCIe PCS Control Register 0.
-        BITLOCKTIME/ADDDREMDELTA_810_B/STARTUPDELTA_810_B/ADDDREMDELTA_810_A/
-        STARTUPDELTA_A/RXREJECTHANDLING/EQCOMLETERESPONSE.
-        Array index: IOP number (0:2)
-    </description>
-    <valueType>uint32</valueType>
-    <array>3</array>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_PCS_CONTROL1</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform (MRW)
-      consumer: proc_pcie_scominit
-      notes:
-        PCIe PCS Control Register 1.
-	RXSIGDETSETTING/ADDDREMDELTA_128130_B/STARTUPDELTA_128130_B/
-        ADDDREMDELTA_128130_A/STARTUPDELTA_128130_A.
-        Array index: IOP number (0:2)
-    </description>
-    <valueType>uint32</valueType>
-    <array>3</array>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_TX_FIFO_OFFSET</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform (MRW)
-      consumer: proc_pcie_scominit
-      notes:
-        PCIe TX FIFO Offset Register.
-	G3OFFSET/G2OFFSET/G1OFFSET.
-        First array index: IOP number (0:2)
-        Second array index: Lane number (0:15)
-    </description>
-    <valueType>uint32</valueType>
-    <array>3 16</array>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_TX_RCVRDETCNTL</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform (MRW)
-      consumer: proc_pcie_scominit
-      notes:
-        PCIe TX Receiver Detect Control Register.
-        VREFSEL/RCVRDETCNT/DETDRVC/PH1WAIT.
-        First array index: IOP number (0:2)
-        Second array index: Lane number (0:15)
-    </description>
-    <valueType>uint32</valueType>
-    <array>3 16</array>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_TX_BWLOSS1</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform (MRW)
-      consumer: proc_pcie_scominit
-      notes:
-        PCIe TX Bandwidth Loss Coefficient Register.
-        GEN3BWCOEFF/GEN2BWCOEFF/GEN1BWCOEFF.
-        First array index: IOP number (0:2)
-        Second array index: Lane number (0:15)
-    </description>
-    <valueType>uint32</valueType>
-    <array>3 16</array>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_RX_VGA_CONTROL2</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform (MRW)
-      consumer: proc_pcie_scominit
-      notes:
-        PCIe RX VGA Control Register 2.
-        GAIN2/GAIN1.
-        First array index: IOP number (0:2)
-        Second array index: Lane number (0:15)
-    </description>
-    <valueType>uint32</valueType>
-    <array>3 16</array>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_RX_PEAK</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform (MRW)
-      consumer: proc_pcie_scominit
-      notes:
-        PCIe RX Receiver Peaking Value Register.
-	PEAK1/PEAK2/PEAK3.
-        First array index: IOP number (0:2)
-        Second array index: Lane number (0:15)
-    </description>
-    <valueType>uint32</valueType>
-    <array>3 16</array>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_RX_SDL</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform (MRW)
-      consumer: proc_pcie_scominit
-      notes:
-        PCIe RX Signal Detect Level Register.
-        SDLVL3/SDLVL2/SDLVL1.
-        First array index: IOP number (0:2)
-        Second array index: Lane number (0:15)
-    </description>
-    <valueType>uint32</valueType>
-    <array>3 16</array>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_TX_FFE_GEN1</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform (MRW)
-      consumer: proc_pcie_scominit
-      notes:
-        PCIe TX FFE (Gen1)
-        First array index: IOP number (0:2)
-        Second array index: Lane number (0:15)
-    </description>
-    <valueType>uint32</valueType>
-    <array>3 16</array>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_TX_FFE_GEN2</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform (MRW)
-      consumer: proc_pcie_scominit
-      notes:
-        PCIe TX FFE (Gen2)
-        First array index: IOP number (0:2)
-        Second array index: Lane number (0:15)
-    </description>
-    <valueType>uint32</valueType>
-    <array>3 16</array>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PCIE_IOP_ZCAL_CONTROL</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      creator: platform (MRW)
-      consumer: proc_pcie_scominit
-      notes:
-        PCIe ZCAL Control Register.
-        CMPEVALDLY.
-        Array index: IOP number (0:2)
-    </description>
-    <valueType>uint32</valueType>
-    <array>3</array>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_errors.xml b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_errors.xml
deleted file mode 100644
index 0b9c61140..000000000
--- a/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_errors.xml
+++ /dev/null
@@ -1,57 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_pcie_scominit_errors.xml,v 1.3 2013/10/28 03:58:29 jmcgill Exp $ -->
-<!-- Error definitions for proc_pcie_scominit -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_PCIE_SCOMINIT_INVALID_TARGET</rc>
-    <description>Invalid target type provided to HWP (expects TARGET_TYPE_PROC_CHIP).</description>
-    <ffdc>TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <hwpError>
-    <rc>RC_PROC_PCIE_SCOMINIT_IOP_CONFIG_ATTR_ERR</rc>
-    <description>Unsupported/invalid IOP lane configuration attribute value.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>ATTR_DATA</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <hwpError>
-    <rc>RC_PROC_PCIE_SCOMINIT_IOP_SWAP_ATTR_ERR</rc>
-    <description>Unsupported/invalid IOP swap configuration attribute value.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>IOP_DATA</ffdc>
-    <ffdc>ATTR_DATA</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_slot_power/proc_pcie_slot_power_errors.xml b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_slot_power/proc_pcie_slot_power_errors.xml
deleted file mode 100644
index 2b54b385e..000000000
--- a/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_slot_power/proc_pcie_slot_power_errors.xml
+++ /dev/null
@@ -1,65 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/activate_powerbus/proc_pcie_slot_power/proc_pcie_slot_power_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2014                             -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_pcie_slot_power_errors.xml,v 1.2 2014/07/28 20:26:11 ricmata Exp $ -->
-<!-- Error codes for proc_pcie_slot_power -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_I2C_FIFO_INCOMPLETE_RC</rc>
-    <description>I2C FIFO DID NOT FLUSH.</description>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>ADDRESS_VAL</ffdc>
-    <ffdc>DATA_REG</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>LOW</priority>
-    </callout>
-  </hwpError>
-    <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_I2C_ERROR_BIT_PRESENT_RC</rc>
-    <description>I2C Error encountered (via status bit in I2C Status Register.</description>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>ADDRESS_VAL</ffdc>
-    <ffdc>DATA_REG</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>LOW</priority>
-    </callout>
-  </hwpError>
-    <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_I2C_COMPLETE_BIT_TIMEOUT_RC</rc>
-    <description>Poll for I2C Command did not complete (via complete bit in I2C Status Register.</description>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>ADDRESS_VAL</ffdc>
-    <ffdc>DATA_REG</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>LOW</priority>
-    </callout>
-  </hwpError>
-    <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_start_clocks_chiplets/proc_start_clocks_chiplets_errors.xml b/src/usr/hwpf/hwp/nest_chiplets/proc_start_clocks_chiplets/proc_start_clocks_chiplets_errors.xml
deleted file mode 100644
index 24688ddb5..000000000
--- a/src/usr/hwpf/hwp/nest_chiplets/proc_start_clocks_chiplets/proc_start_clocks_chiplets_errors.xml
+++ /dev/null
@@ -1,102 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/nest_chiplets/proc_start_clocks_chiplets/proc_start_clocks_chiplets_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_start_clocks_chiplets_errors.xml,v 1.4 2013/05/06 12:33:48 rkoester Exp $ -->
-<!-- Error definitions for proc_start_clocks_chiplets procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_START_CLOCKS_XBUS_CHIPLET_CLK_STATUS_ERR</rc>
-    <description>Unexpected XBUS clock status register returned after clock start operation.</description>
-    <ffdc>STATUS_REG</ffdc>
-    <ffdc>EXPECTED_REG</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_START_CLOCKS_ABUS_CHIPLET_CLK_STATUS_ERR</rc>
-    <description>Unexpected ABUS clock status register returned after clock start operation.</description>
-    <ffdc>STATUS_REG</ffdc>
-    <ffdc>EXPECTED_REG</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_START_CLOCKS_PCIE_CHIPLET_CLK_STATUS_ERR</rc>
-    <description>Unexpected clock status register returned after clock start operation.</description>
-    <ffdc>STATUS_REG</ffdc>
-    <ffdc>EXPECTED_REG</ffdc>
-    <callout>
-     <target>CHIP_IN_ERROR</target>
-     <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP_IN_ERROR</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP_IN_ERROR</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_START_CLOCKS_XBUS_CHIPLET_FIR_ERR</rc>
-    <description>Unexpected chiplet FIR bit set after clock start operation.</description>
-    <ffdc>FIR_REG</ffdc>
-    <ffdc>FIR_EXP_REG</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_START_CLOCKS_ABUS_CHIPLET_FIR_ERR</rc>
-    <description>Unexpected chiplet FIR bit set after clock start operation.</description>
-    <ffdc>FIR_REG</ffdc>
-    <ffdc>FIR_EXP_REG</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_START_CLOCKS_PCIE_CHIPLET_FIR_ERR</rc>
-    <description>Unexpected chiplet FIR bit set after clock start operation.</description>
-    <ffdc>FIR_REG</ffdc>
-    <ffdc>FIR_EXP_REG</ffdc>
-    <callout>
-      <target>CHIP_IN_ERROR</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP_IN_ERROR</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP_IN_ERROR</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_START_CLOCKS_CHIPLETS_PARTIAL_GOOD_ERR</rc>
-    <description>Unexpected chiplet selection when reading the partial good vector.</description>
-    <ffdc>CHIPLET_BASE_SCOM_ADDR</ffdc>
-   <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-      </callout>
-  </hwpError>
-</hwpErrors>
-  <!-- *********************************************************************** -->
-  <!-- TODO Callout all chiplets of a specified type on a chip: story 69794    -->
-  <!-- TODO Callout the PCI refclock: story 69766                              -->
-  <!-- *********************************************************************** -->
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.C
deleted file mode 100644
index bbd929979..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.C
+++ /dev/null
@@ -1,392 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.C $   */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_ocb_indir_access.C,v 1.5 2014/07/28 21:34:47 daviddu Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_ocb_indir_access.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Greg Still         Email: stillgs@us.ibm.com
-// *!
-/// \file p8_ocb_indir_access.C
-/// \brief Performs the data transfer to/from an OCB indirect channel
-///
-///
-/// \todo add to required proc ENUM requests
-///
-/// High-level procedure flow:
-/// \verbatim
-///
-///
-///     Per HW220256, for Murano DD1, a push (Put) must first check for non-full
-///     condition to avoid a data corruption scenario.  This is fixed in
-///     Venice DD1.
-/// \endverbatim
-///
-/// buildfapiprcd -e "../../xml/error_info/proc_ocb_indir_access_errors.xml" p8_ocb_indir_access.C
-//------------------------------------------------------------------------------
-
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-#include "p8_pm.H"
-#include "p8_ocb_indir_access.H"
-
-
-using namespace fapi;
-
-extern "C" {
-
-// ----------------------------------------------------------------------
-// Constant definitions
-// ----------------------------------------------------------------------
-
-// Needed for HW220256 protection
-// Set to 10ms at 2us per read
-//#define OCB_FULL_POLL_MAX 10000/2
-// temp for sim
-#define OCB_FULL_POLL_MAX 4
-#define OCB_FULL_POLL_DELAY_HDW 0
-#define OCB_FULL_POLL_DELAY_SIM 0
-
-// ----------------------------------------------------------------------
-// Global variables
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Function prototypes
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Function definitions
-// ----------------------------------------------------------------------
-
-//------------------------------------------------------------------------------
-// Function prototype
-//------------------------------------------------------------------------------
-/// \param[in]      &i_target           Chip target
-/// \param[in]      i_ocb_chan          OCB channel number (0, 1, 2, 3)
-/// \param[in]      i_ocb_op            Operation (Get, Put)
-/// \param[in]      i_ocb_req_length    Requested length in the number of 8B
-///                                     elements to be accessed (unit origin)
-///                                     Number of bytes = (i_ocb_req_length) * 
-///                                     8B
-/// \param[in/out] &io_ocb_buffer       Reference to ecmdDataBuffer
-/// \param[out]    &o_ocb_act_length    Address containing to contain the actual
-///                                     length in the number of 8B elements to
-///                                     be accessed (zero origin)
-///                                     Number of bytes = (i_ocb_act_length+1) *
-///                                     8B
-/// \param[in]      i_oci_address_valid Indicator that oci_address is to be used
-/// \param[in]      i_oci_address       OCI Address to be used for the operation
-
-
-/// \retval ECMD_SUCCESS if something good happens,
-/// \retval BAD_RETURN_CODE otherwise
-fapi::ReturnCode
-p8_ocb_indir_access(  const fapi::Target& i_target, \
-                      uint32_t            i_ocb_chan, \
-                      uint32_t            i_ocb_op, \
-                      uint32_t            i_ocb_req_length, \
-                      ecmdDataBufferBase& io_ocb_buffer, \
-                      uint32_t&           o_ocb_act_length, \
-                      bool                i_oci_address_valid,  \
-                      uint32_t            i_oci_address)
-{
-    
-    fapi::ReturnCode    rc;
-    uint32_t            l_ecmdRc = 0;
-    ecmdDataBufferBase  data(64);
-    ecmdDataBufferBase  address(64);
-    
-    uint64_t            OCBAR_address = 0;
-    uint64_t            OCBDR_address = 0;
-    uint64_t            OCBCSR_address = 0;
-    uint64_t            OCBSHCR_address = 0;
-    uint64_t            temp_address = 0;
-
-    uint32_t            buffer_ptr;
-    
-    FAPI_INF("Executing p8_ocb_indir_access op %x channel %x of length (in 8B) %x....", 
-            i_ocb_op, i_ocb_chan, i_ocb_req_length);
-  
-    FAPI_DBG("Checking channel validity");
-    switch ( i_ocb_chan )
-    {
-        case 0:
-            OCBAR_address = OCB0_ADDRESS_0x0006B010;
-            OCBDR_address = OCB0_DATA_0x0006B015;
-            OCBCSR_address = OCB0_STATUS_CONTROL_0x0006B011;
-            OCBSHCR_address = OCB0_PUSH_STATUS_CONTROL_0x0006A204;
-            break;
-        case 1:
-            OCBAR_address = OCB1_ADDRESS_0x0006B030;
-            OCBDR_address = OCB1_DATA_0x0006B035;
-            OCBCSR_address = OCB1_STATUS_CONTROL_0x0006B031;
-            OCBSHCR_address = OCB1_PUSH_STATUS_CONTROL_0x0006A214;
-            break;
-        case 2:
-            OCBAR_address = OCB2_ADDRESS_0x0006B050;
-            OCBDR_address = OCB2_DATA_0x0006B055;
-            OCBCSR_address = OCB2_STATUS_CONTROL_0x0006B051;
-            OCBSHCR_address = OCB2_PUSH_STATUS_CONTROL_0x0006A224;
-            break;
-        case 3:
-            OCBAR_address = OCB3_ADDRESS_0x0006B070;
-            OCBDR_address = OCB3_DATA_0x0006B075;
-            OCBCSR_address = OCB3_STATUS_CONTROL_0x0006B071;
-            break;
-        default:
-            FAPI_ERR("Invalid OCB access channel %x", i_ocb_chan);
-            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCB_ACCESS_CHANNEL);
-            return rc;
-    }   
-
-    /// -------------------------------
-    /// Deal with oci_address_valid condition.
-    /// If address is valid, write the relevant channel OCBAR
-    if ( i_oci_address_valid )
-    {
-
-        /// The following cases apply:
-        ///     Circular Channel:   OCBAR is irrelevant; write it anyway
-        ///     Linear:             OCBAR will set the accessed location
-        ///     Linear Stream:      OCBAR will establish the address from which
-        ///                             auto-increment will commence after
-        ///                             the first access
-
-        /// \todo:  need to perform relevant error checking on the address value
-
-        FAPI_DBG("OCI Address Valid set with OCI Address =  %08x", 
-                i_oci_address);
- 
-        l_ecmdRc |= data.flushTo0();
-        l_ecmdRc |= data.setWord(0, i_oci_address);    
-        if (l_ecmdRc) 
-        {
-           FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_ecmdRc);
-           rc.setEcmdError(l_ecmdRc);
-           return rc;
-         }
-
-        rc=fapiPutScom(i_target, (const uint64_t)OCBAR_address, data);
-        if(rc) 
-        {
-            FAPI_ERR("OCBAR Putscom failed");
-            return rc;
-        }
-
-    }
-
-    /// The else case is to not touch the OCBAR.
-    /// The following cases apply:
-    ///     Circular Channel:   OCBAR is irrelevant
-    ///     Linear:             OCBAR will continue to access the same location
-    ///     Linear Stream:      OCBAR will auto-increment
-
-    // Initialize output length
-    o_ocb_act_length    = 0;
-
-    /// Based on the op, perform the data access
-    if ( i_ocb_op == OCB_PUT ) 
-    {
-
-        // Start HW220256 protection
-        
-        // Determine if the channel is in circular mode.  If so, proceed with
-        // checks.
-      
-        temp_address = OCBCSR_address;
-        rc=fapiGetScom(i_target, temp_address, data);
-        if (rc)
-        {
-            FAPI_ERR("Get SCOM error for address 0x%08llX", temp_address);
-            return rc;
-        }
-        //OCB Channel 3 doesnt do circular operation, therefore no need to check
-        if (data.isBitSet(4) && data.isBitSet(5) && (i_ocb_chan != 3))
-        {
-            FAPI_DBG("Put: (MurDD1) Circular mode Put detected.  Engage extra checks");
-            
-            // Check if push queue is enabled.  If not, let the store occur 
-            // anyway to let the PIB error response return occur.  (that is 
-            // what will happen if this checking code were not here)
-            temp_address = OCBSHCR_address;
-            rc=fapiGetScom(i_target, temp_address, data);
-            if (rc)
-            {
-                FAPI_ERR("Get SCOM error for address 0x%08llX", temp_address);
-                return rc;
-            }
-
-            if (data.isBitSet(31))
-            {           
-                FAPI_DBG("Put: (MurDD1) Poll for a non-full condition to a push "
-                            "queue to avoid data corruption problem");
-
-                bool push_ok_flag = false; 
-                int p = 0;
-                do
-                {
-                    // If the OCB_OCI_OCBSHCS0_PUSH_FULL bit (bit 0) is clear, proceed.
-                    // Otherwise, poll
-                    if (data.isBitClear(0))
-                    {
-                        push_ok_flag = true;
-                        FAPI_DBG("Put: (MurDD1) Push queue not full. Proceeding.");
-                        break;
-                    }            
-                    
-                    // Point to put in any needed delay.
-                    // rc=fapiDelay(OCB_FULL_POLL_DELAY_HDW, OCB_FULL_POLL_DELAY_SIM);
-                    
-                    rc=fapiGetScom(i_target, temp_address, data);
-                    if (rc)
-                    {
-                        FAPI_ERR("Get SCOM error for address 0x%08llX", temp_address);
-                        return rc;
-                    }
-                    
-                    p++;
-                
-                } while (p < OCB_FULL_POLL_MAX);
-                   
-                if (!push_ok_flag)
-                {
-                    FAPI_ERR("Put: Polling timeout waiting on push non-full");
-                    FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCB_PUT_DATA_POLL_NOT_FULL_ERROR);
-                    return rc;
-
-                }
-            }          
-        }
-        // End HW220256 protection
-
-        FAPI_DBG("Put: Doublewords in passed io_ocb_buffer %x", 
-                io_ocb_buffer.getDoubleWordLength());
-        if (io_ocb_buffer.getDoubleWordLength() == 0) 
-        {
-            FAPI_ERR("Put: No data passed in io_ocb_buffer");
-            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCB_PUT_DATA_LENGTH_ERROR);
-            return rc;
-        }
-        
-        FAPI_DBG("Put: Checking buffer lengths - i_ocb_req_length: %x; io_ocb_buffer: %x", 
-                i_ocb_req_length, io_ocb_buffer.getDoubleWordLength());
-        
-        if ((i_ocb_req_length) != io_ocb_buffer.getDoubleWordLength())
-        {
-            FAPI_ERR("Put: io_ocb_buffer length does not match i_ocb_req_length");
-            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCB_PUT_DATA_LENGTH_ERROR);
-            return rc;
-        }
-        
-        
-        // Walk the input buffer (io_ocb_buffer) 8B (64bits) at a time to write 
-        // the channel data register
-        for (buffer_ptr=0; buffer_ptr < (i_ocb_req_length)*64; buffer_ptr+=64)
-        {
-            
-            FAPI_DBG("Put: Copy 8B from parameter buffer at location %x into "
-                    "working data buffer.", buffer_ptr);
-           
-            l_ecmdRc |= data.insert(io_ocb_buffer, 0, 64, buffer_ptr);
-            if (l_ecmdRc)
-            {
-                FAPI_ERR("Put: data insert failed");
-                rc.setEcmdError(l_ecmdRc);
-                return rc;
-            }
-            
-            rc = fapiPutScom(i_target, (const uint64_t)OCBDR_address, data); 
-            if (rc)
-            { 
-                FAPI_ERR("Put SCOM error for OCB indirect access");
-                return rc;
-            }
-            o_ocb_act_length++;
-            FAPI_DBG("Put: Increment output length to %x", o_ocb_act_length);
-        }
-    }
-    else if ( i_ocb_op == OCB_GET )
-    {      
-        
-        FAPI_DBG("Get: Setting the io_ocb_buffer size to %x doublewords",
-                i_ocb_req_length);
-        // Note: i_ocb_req_length is unit origin (eg 8B = length of 1)
-        l_ecmdRc |= io_ocb_buffer.setDoubleWordLength(i_ocb_req_length); 
-        if (l_ecmdRc)
-           {
-               FAPI_ERR("Get: setDoubleWord failed");
-               rc.setEcmdError(l_ecmdRc);
-               return rc;
-           }
-
-        for (buffer_ptr=0; buffer_ptr < (i_ocb_req_length)*64; buffer_ptr+=64)
-        {
-            rc=fapiGetScom(i_target, (const uint64_t)OCBDR_address, data);
-            if (rc)
-            {
-                FAPI_ERR("Get SCOM error for OCB indirect access");
-                return rc;
-            }
-
-            FAPI_DBG("Get: Copy 8B from working data buffer into parameter "
-                "buffer at location: %x", buffer_ptr);
-            l_ecmdRc |= io_ocb_buffer.insert(data, buffer_ptr, 64, 0);
-            if (l_ecmdRc)
-            {
-                FAPI_ERR("Get Buffer copy error");
-                rc.setEcmdError(l_ecmdRc);
-                return rc;
-            }
-            o_ocb_act_length++;
-            FAPI_DBG("Get: Increment output length to %x", o_ocb_act_length);
-        }
-    }
-    else
-    {
-        FAPI_ERR("Invalid OCB access operation %x", i_ocb_op);
-        FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCB_ACCESS_OP);
-        return rc;
-    }
-    
-    // If not non-zero SCOM rc, check that the lengths match.
-    if (i_ocb_req_length != o_ocb_act_length)
-    {
-        FAPI_ERR("OCB access length check failure:  input = %8X; output = %8X", 
-                i_ocb_req_length, o_ocb_act_length);
-        FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCB_ACCESS_LENGTH_CHECK);
-        return rc;
-    }
-    
-    return rc;
-  
-}
-
-
-} // extern "C"
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.H
deleted file mode 100644
index 7d75d05f0..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.H
+++ /dev/null
@@ -1,124 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.H $   */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_ocb_indir_access.H,v 1.1 2012/08/23 04:58:50 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_ocb_indir_access.H,v $
-//------------------------------------------------------------------------------
-// *|
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-// *|
-// *! TITLE       : p8_ocb_indir_access.H
-// *! DESCRIPTION : Access procedure to the OCC OCB indirect channels
-// *!
-// *! OWNER NAME : Jim Yacynych  Email: jimyac@us.ibm.com
-// *! BACKUP NAME : Greg Still    Email: stillgs@us.ibm.com
-
-//------------------------------------------------------------------------------
-
-#ifndef _P8_OCBINDIRACC_H_
-#define _P8_OCBINDIRACC_H_
-
-
-extern "C" {
-
-
-//------------------------------------------------------------------------------
-// Includes
-//------------------------------------------------------------------------------
-
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_ocb_indir_access_FP_t) 
-                (   const fapi::Target&, 
-                    uint32_t,  
-                    uint32_t, 
-                    uint32_t, 
-                    ecmdDataBufferBase&, 
-                    uint32_t&, 
-                    bool, 
-                    uint32_t
-                );
-
-//------------------------------------------------------------------------------
-// Constant definitions
-//------------------------------------------------------------------------------
-
-#ifndef _P8_OCB_ACCESS_OP_
-#define _P8_OCB_ACCESS_OP_
-enum P8_OCB_ACCESS_OP {
-        OCB_GET     = 0x1,
-        OCB_PUT     = 0x2
-        };
-#endif  // _P8_OCB_ACCESS_OP_
-
-
-//------------------------------------------------------------------------------
-// Parameter structure definitions
-//------------------------------------------------------------------------------
-
-
-
-//------------------------------------------------------------------------------
-// Function prototype
-//------------------------------------------------------------------------------
-
-/// \brief Provides for the abstract access to an OCB indirect channel that has
-/// been configured previously via p8_ocb_indir_setup_[linear/circular] 
-/// procedures
-/// 
-/// \param[in]      &i_target           Chip target
-/// \param[in]      i_ocb_chan          OCB channel number (0, 1, 2, 3) 
-/// \param[in]      i_ocb_op            Operation (Get, Put)
-/// \param[in]      i_ocb_req_length    Requested length in the number of 8B 
-///                                     elements to be accessed (unit origin)
-///                                     Number of bytes = (i_ocb_req_length) * 
-///                                     8B
-/// \param[in/out] &io_ocb_buffer       Reference to ecmdDataBuffer
-/// \param[out]    &o_ocb_act_length    Address containing to contain the actual 
-///                                     length in the number of 8B elements to 
-///                                     be accessed (zero origin)
-///                                     Number of bytes = (i_ocb_act_length+1) *
-///                                     8B
-/// \param[in]      i_oci_address_valid Indicator that oci_address is to be used
-/// \param[in]      i_oci_address       OCI Address to be used for the operation
-
-/// \retval ECMD_SUCCESS if something good happens,
-/// \retval BAD_RETURN_CODE otherwise
-fapi::ReturnCode 
-p8_ocb_indir_access(const fapi::Target& i_target, 
-                    uint32_t            i_ocb_chan, 
-                    uint32_t            i_ocb_op, 
-                    uint32_t            i_ocb_req_length, 
-                    ecmdDataBufferBase& io_ocb_buffer,
-                    uint32_t&           o_ocb_act_length, 
-                    bool                i_oci_address_valid, 
-                    uint32_t            i_oci_address);
-
-                
-
-} // extern "C"
-
-#endif // _P8_OCBINDIRACC_H_
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.C
deleted file mode 100644
index 4bc38e2b0..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.C
+++ /dev/null
@@ -1,84 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.C $ */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_ocb_indir_setup_linear.C,v 1.2 2012/10/10 14:47:19 pchatnah Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_ocb_indir_setup_linear.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2012
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Jim Yacynych         Email: jimyac@us.ibm.com
-// *!
-/// \file p8_ocb_indir_setup_linear.C
-/// \brief  Configure OCB Channel for Linear Streaming or Non-streaming mode
-///
-/// High-level procedure flow:
-/// \verbatim
-///  Setup specified channel to linear streaming or non-streaming mode by calling proc proc_ocb_init
-///
-///  Procedure Prereq:
-///     - System clocks are running
-/// \endverbatim
-///
-//------------------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-
-#include "p8_pm.H"
-#include "p8_ocb_indir_setup_linear.H"
-
-extern "C" {
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Function definitions
-// ----------------------------------------------------------------------
-/// \param[in]  i_target              => Chip Target
-/// \param[in]  i_ocb_chan            => select channel 0-3 to set up      (see p8_ocb_init.H)
-/// \param[in]  i_ocb_type            => linear streaming or non-streaming (see p8_ocb_init.H)
-/// \param[in]  i_ocb_bar             => 32-bit channel base address (29 bits + "000")
-/// \retval FAPI_RC_SUCCESS
-/// \retval ERROR defined in xml for p8_ocb_init
-
-ReturnCode
-p8_ocb_indir_setup_linear(const Target& i_target, uint8_t i_ocb_chan, uint8_t i_ocb_type, uint32_t i_ocb_bar)
-{
-    ReturnCode rc;
-
-    FAPI_INF("Executing p8_ocb_indir_setup_linear for channel %x as type %x to address 0x%x\n", i_ocb_chan, i_ocb_type, i_ocb_bar);
-
-    FAPI_EXEC_HWP(rc, p8_ocb_init, i_target, PM_SETUP_PIB, i_ocb_chan, i_ocb_type, i_ocb_bar, 0, OCB_Q_ITPTYPE_NULL, OCB_Q_ITPTYPE_NULL);
-    if (!rc.ok()) {
-        FAPI_ERR("Error calling proc_ocb_init from p8_ocb_indir_setup_linear. \n");
-        return rc;
-    }
-
-    return rc;
-}
-
-} //end extern C
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.H
deleted file mode 100644
index 5320dde3d..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.H
+++ /dev/null
@@ -1,56 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.H $ */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2013,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_ocb_indir_setup_linear.H,v 1.3 2012/11/30 00:06:44 jimyac Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_ocb_indir_setup_linear.H,v $
-#ifndef _P8_OCB_INDIR_SETUP_LINEAR_H_
-#define _P8_OCB_INDIR_SETUP_LINEAR_H_
-
-#include <fapi.H>
-#include "p8_pm.H"
-#include "p8_ocb_init.H"
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_ocb_indir_setup_linear_FP_t) (const fapi::Target&,
-                                                            const uint8_t,
-                                                            const uint8_t,
-                                                            const uint32_t);
-
-extern "C" {
-
-//------------------------------------------------------------------------------
-// Function prototype
-//------------------------------------------------------------------------------
-/// \brief  Configure OCB Channel for Linear Streaming or Non-streaming mode
-/// \param[in]  i_target              => Chip Target
-/// \param[in]  i_ocb_chan            => select channel 0-3 to set up      (see p8_ocb_init.H)
-/// \param[in]  i_ocb_type            => linear streaming or non-streaming (see p8_ocb_init.H)
-/// \param[in]  i_ocb_bar             => 32-bit channel base address (29 bits + "000")
-
-fapi::ReturnCode p8_ocb_indir_setup_linear(const fapi::Target& i_target,
-                                           const uint8_t       i_ocb_chan,
-                                           const uint8_t       i_ocb_type,
-                                           const uint32_t      i_ocb_bar);
-
-} // extern "C"
-
-#endif
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_init.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_init.C
deleted file mode 100755
index dd3a9e379..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_init.C
+++ /dev/null
@@ -1,748 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_init.C $           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_ocb_init.C,v 1.7 2013/06/05 17:39:01 jimyac Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_ocb_init.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2012
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Jim Yacynych         Email: jimyac@us.ibm.com
-// *!
-
-/// \file p8_ocb_init.C
-/// \brief Setup and configure OCB channels
-///
-/// \todo add support for linear window mode
-///
-///   High-level procedure flow:
-/// \verbatim
-///   o if mode = PM_CONFIG
-///     o placeholder - currently do nothing
-///   o if mode = PM_INIT
-///     o placeholder - currently do nothing
-///   o if mode = PM_RESET
-///     o reset each register in each OCB channel to its scan0-flush state
-///   o if mode = PM_SETUP_PIB or PM_SETUP_ALL
-///     o process parameters passed to procedure
-///     o Set up channel control/status register based on passed parameters (OCBCSRn)
-///     o Set Base Address Register
-///       o linear streaming & non-streaming => OCBARn
-///       o push queue                       => OCBSHBRn  (only if PM_SETUP_ALL)
-///       o pull queue                       => OCBSLBRn  (only if PM_SETUP_ALL)
-///     o Set up queue control and status register (only if PM_SETUP_ALL)
-///       o push queue  => OCBSHCSn
-///       o pull queue  => OCBSLCSn
-///
-/// Procedure Prereq:
-///   o System clocks are running
-/// \endverbatim
-//------------------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-#include <fapi.H>
-#include "p8_scom_addresses.H"
-#include "p8_ocb_init.H"
-
-extern "C" {
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Function prototypes
-// ----------------------------------------------------------------------
-ReturnCode proc_ocb_reset(const Target& i_target);
-
-ReturnCode proc_ocb_setup(const Target& i_target, const uint8_t  i_ocb_chan,
-                                                  const uint8_t  i_ocb_type,
-                                                  const uint32_t i_ocb_bar,
-                                                  const uint8_t  i_ocb_upd_reg,
-                                                  const uint8_t  i_ocb_q_len,
-                                                  const uint8_t  i_ocb_ouflow_en,
-                                                  const uint8_t  i_ocb_itp_type);
-
-// ----------------------------------------------------------------------
-// Function definitions
-// ----------------------------------------------------------------------
-/// \param[in]   i_target          => Chip Target
-/// \param[in]   i_mode            => PM_CONFIG, PM_RESET, PM_INIT, or PM_SETUP
-/// \param[in]   i_ocb_chan        => select channel 0-3 to set up
-/// \param[in]   i_ocb_type        => 0=indirect  1=linear stream  2=circular push  3=circular pull
-/// \param[in]   i_ocb_bar         => 32-bit channel base address (29 bits + "000")
-/// \param[in]   i_ocb_q_len       => 0-31 length of push or pull queue in  (queue_length + 1) * 8B
-/// \param[in]   i_ocb_ouflow_en   => 0=disabled 1=enabled
-/// \param[in]   i_ocb_itp_type    => 0=full  1=not full  2=empty  3=not empty
-/// \retval FAPI_RC_SUCCESS
-/// \retval ERROR defined in xml
-
-ReturnCode
-p8_ocb_init(const Target& i_target, const uint32_t  i_mode,
-                                       const uint8_t  i_ocb_chan,
-                                       const uint8_t  i_ocb_type,
-                                       const uint32_t i_ocb_bar,
-                                       const uint8_t  i_ocb_q_len,
-                                       const uint8_t  i_ocb_ouflow_en,
-                                       const uint8_t  i_ocb_itp_type)
-{
-  ReturnCode rc;
-  uint8_t upd_reg = OCB_UPD_PIB_REG;
-
-  FAPI_INF("Executing p8_ocb_init ....");
-
-  // -------------------------------------------------------------------------------
-  // Config : perform translation of any Platform Attributes into Feature Attributes
-  //          that are applied during Initalization
-  // -------------------------------------------------------------------------------
-  if (i_mode == PM_CONFIG) {
-    FAPI_INF(" *** Configuring OCB Indirect Channels 0-3");
-  }
-
-  // --------------------------------------------------------------
-  // Init : perform order or dynamic operations to initialize
-  //        the PMC using necessary Platform or Feature attributes.
-  // --------------------------------------------------------------
-  else if (i_mode == PM_INIT) {
-    FAPI_INF(" *** Initializing OCB Indirect Channels 0-3");
-  }
-
-  // --------------------------------------------------------------
-  // Reset : perform order or dynamic operations to initialize
-  //        the PMC using necessary Platform or Feature attributes.
-  // --------------------------------------------------------------
-  else if (i_mode == PM_RESET) {
-    FAPI_INF(" *** Resetting OCB Indirect Channels 0-3");
-    rc = proc_ocb_reset(i_target);
-  }
-
-  // --------------------------------------------------------------
-  // Setup : perform user setup of an indirect channel
-  // --------------------------------------------------------------
-  else if (i_mode == PM_SETUP_PIB || i_mode == PM_SETUP_ALL ) {
-    FAPI_INF(" *** Setup OCB Indirect Channel %d",i_ocb_chan);
-
-    if (i_mode == PM_SETUP_ALL)
-      upd_reg = OCB_UPD_PIB_OCI_REG;
-
-    // call function to setup ocb channel
-    rc = proc_ocb_setup(i_target , i_ocb_chan,
-                                   i_ocb_type,
-                                   i_ocb_bar,
-                                   upd_reg,
-                                   i_ocb_q_len,
-                                   i_ocb_ouflow_en,
-                                   i_ocb_itp_type);
-  }
-  else {
-    FAPI_ERR("Unknown mode passed to proc_ocb_init. Mode %x ....\n", i_mode);
-    FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCBINIT_BAD_MODE);
-  }
-
-  FAPI_INF("Completing p8_ocb_init ....");
-
-  return rc;
-}
-
-// ---------------------
-// function definintions
-// ---------------------
-/// \brief Setup specified channel to type specified
-/// \param[in]   i_target          => Chip Target
-/// \param[in]   i_ocb_chan        => select channel 0-3 to set up
-/// \param[in]   i_ocb_type        => 0=indirect  1=linear stream  2=circular push  3=circular pull
-/// \param[in]   i_ocb_bar         => 32-bit channel base address (29 bits + "000")
-/// \param[in]   i_ocb_upd_reg     => 0=update PIB registers only  1=update PIB & OCI registers
-/// \param[in]   i_ocb_q_len       => 0-31 length of push or pull queue in  (queue_length + 1) * 8B
-/// \param[in]   i_ocb_ouflow_en   => 0=disabled 1=enabled
-/// \param[in]   i_ocb_itp_type    => 0=full  1=not full  2=empty  3=not empty
-
-ReturnCode proc_ocb_setup(const Target& i_target,  const uint8_t  i_ocb_chan,
-                                                   const uint8_t  i_ocb_type,
-                                                   const uint32_t i_ocb_bar,
-                                                   const uint8_t  i_ocb_upd_reg,
-                                                   const uint8_t  i_ocb_q_len,
-                                                   const uint8_t  i_ocb_ouflow_en,
-                                                   const uint8_t  i_ocb_itp_type)
-{
-  ReturnCode rc;
-  uint32_t   l_ecmdRc = 0;
-
-  ecmdDataBufferBase data(64);
-  ecmdDataBufferBase mask_or(64);
-  ecmdDataBufferBase mask_and(64);
-
-  uint32_t OCBASE = 0x0;
-
-  // --------------------------------------------
-  // verify paramater values for queues are valid
-  // --------------------------------------------
-  if (i_ocb_type == OCB_TYPE_PUSHQ || i_ocb_type == OCB_TYPE_PULLQ) {
-
-    // check queue_len
-    if (i_ocb_q_len > 31) {
-      FAPI_ERR("Bad Queue Length Passed to Procedure => %d", i_ocb_q_len);
-      FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCBINIT_BAD_Q_LENGTH_PARM);
-      return rc;
-    }
-
-    // check queue_itp_type
-    if (!(i_ocb_itp_type <= OCB_Q_ITPTYPE_NOTEMPTY)) {
-      FAPI_ERR("**** ERROR : Bad Interrupt Type Passed to Procedure => %d", i_ocb_itp_type);
-      FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCBINIT_BAD_ITP_TYPE_PARM);
-      return rc;
-    }
-
-    // check queue_overunderflow_en
-    if (i_ocb_ouflow_en != OCB_Q_OUFLOW_NULL && i_ocb_ouflow_en != OCB_Q_OUFLOW_EN && i_ocb_ouflow_en != OCB_Q_OUFLOW_DIS) {
-      FAPI_ERR("**** ERROR : Bad Queue Over/Under Flow Enable Passed to Procedure => %d", i_ocb_ouflow_en);
-      FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCBINIT_BAD_Q_OVER_UNDERFLOW_PARM);
-      return rc;
-    }
-  }
-
-  // check channel number
-  if (i_ocb_chan > OCB_CHAN3) {
-    FAPI_ERR("**** ERROR : Bad Channel Number Passed to Procedure => %d", i_ocb_chan);
-    FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCBINIT_BAD_CHAN_NUM_PARM);
-    return rc;
-  }
-
-  // check valid channel type for channel3
-  if (i_ocb_chan == OCB_CHAN3 && !(i_ocb_type == OCB_TYPE_LIN || i_ocb_type == OCB_TYPE_LINSTR) ) {
-    FAPI_ERR("**** ERROR : Bad Channel Type for Channel 3 Passed to Procedure => %d", i_ocb_type);
-    FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCBINIT_BAD_CHAN3_TYPE_PARM);
-    return rc;
-  }  
-
-  // --------------------------------------------------------------------
-  // Setup Status and Control Register (OCBCSRn, OCBCSRn_AND, OCBCSRn_OR)
-  //    bit 2 => pull_read_underflow_en (0=disabled 1=enabled)
-  //    bit 3 => push_write_overflow_en (0=disabled 1=enabled)
-  //    bit 4 => ocb_stream_mode        (0=disabled 1=enabled)
-  //    bit 5 => ocb_stream_type        (0=linear   1=circular)
-  // --------------------------------------------------------------------
-  l_ecmdRc |= mask_or.flushTo0();  
-  l_ecmdRc |= mask_and.flushTo1();
-
-  if (i_ocb_type == OCB_TYPE_LIN) {                    // linear non-streaming
-    l_ecmdRc |= mask_and.clearBit(4);
-    l_ecmdRc |= mask_and.clearBit(5);
-  }
-  else if (i_ocb_type == OCB_TYPE_LINSTR) {            // linear streaming
-    l_ecmdRc |= mask_or.setBit(4);
-    l_ecmdRc |= mask_and.clearBit(5);
-  }
-  else if (i_ocb_type == OCB_TYPE_CIRC) {              // circular
-    l_ecmdRc |= mask_or.setBit(4);
-    l_ecmdRc |= mask_or.setBit(5);
-  }
-  else if (i_ocb_type == OCB_TYPE_PUSHQ) {             // push queue
-    l_ecmdRc |= mask_or.setBit(4);
-    l_ecmdRc |= mask_or.setBit(5);
-
-    if    (i_ocb_ouflow_en == OCB_Q_OUFLOW_EN) {
-      l_ecmdRc |= mask_or.setBit(3);
-    }
-    else if (i_ocb_ouflow_en == OCB_Q_OUFLOW_DIS) {
-      l_ecmdRc |= mask_and.clearBit(3);
-    }
-
-  }
-  else if (i_ocb_type == OCB_TYPE_PULLQ) {             // pull queue
-    l_ecmdRc |= mask_or.setBit(4);
-    l_ecmdRc |= mask_or.setBit(5);
-
-    if (i_ocb_ouflow_en == OCB_Q_OUFLOW_EN) {
-      l_ecmdRc |= mask_or.setBit(2);
-    }
-    else if (i_ocb_ouflow_en == OCB_Q_OUFLOW_DIS) {
-      l_ecmdRc |= mask_and.clearBit(2);
-    }
-
-  }
-  else {
-    FAPI_ERR("**** ERROR : Bad Channel Type Passed to Procedure => %d", i_ocb_type);
-    FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCBINIT_BAD_CHAN_TYPE_PARM);
-    return rc;
-  }
-
-  if (l_ecmdRc) {
-    FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_ecmdRc);
-    rc.setEcmdError(l_ecmdRc);
-    return rc;
-  }
-
-  FAPI_DBG("Writing to Channel %d Register : OCB Channel Status & Control", i_ocb_chan);
-
-  // write using OR mask
-  rc = fapiPutScom(i_target, OCBCSRn_OR[i_ocb_chan] , mask_or);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel Status & Control");
-    return rc;
-  }
-
-  // write using AND mask
-  rc = fapiPutScom(i_target, OCBCSRn_AND[i_ocb_chan] , mask_and);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel Status & Control");
-    return rc;
-  }
-
-  // --------------------------------------------------------------------------------------
-  // set address base register for linear mode
-  //   bits 0:31  =>  32 bit base address
-  //                  bits 0:1   => OCI region  (00=PBA  01=Registers  10=reserved  11=SRAM)
-  //                  bits 29:31 => "000"
-  // --------------------------------------------------------------------------------------
-  if (!(i_ocb_type == OCB_TYPE_NULL || i_ocb_type == OCB_TYPE_CIRC)) {    // don't update bar if type null or circular
-
-    if (i_ocb_type == OCB_TYPE_LIN || i_ocb_type == OCB_TYPE_LINSTR) {
-      OCBASE = OCBARn[i_ocb_chan];
-    }
-    else if (i_ocb_type == OCB_TYPE_PUSHQ) {
-      OCBASE = OCBSHBRn[i_ocb_chan];
-    } else {                                // else PULL -- FIXME - need Linear Window Type Implemented
-      OCBASE = OCBSLBRn[i_ocb_chan];
-    }
-
-    l_ecmdRc |= data.flushTo0();
-    l_ecmdRc |= data.setWord(0, i_ocb_bar);
-
-    if (l_ecmdRc) {
-      FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_ecmdRc);
-      rc.setEcmdError(l_ecmdRc);
-      return rc;
-    }
-
-    FAPI_DBG("Writing to Channel %d Register : OCB Channel Base Address", i_ocb_chan);
-
-    rc = fapiPutScom(i_target, OCBASE , data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel Base Address");
-      return rc;
-    }
-
-  }
-  // -------------------------------------
-  // set up push queue control register
-  //    bits 4:5  => push interrupt action
-  //                   00=full
-  //                   01=not full
-  //                   10=empty
-  //                   11=not empty
-  //    bits 6:8 => push queue length
-  //    bit 31   => push queue enable
-  // -------------------------------------
-  if (i_ocb_type == OCB_TYPE_PUSHQ && i_ocb_upd_reg == OCB_UPD_PIB_OCI_REG) {
-    l_ecmdRc |= data.flushTo0();
-    l_ecmdRc |= data.insertFromRight(i_ocb_q_len,6,5);
-    l_ecmdRc |= data.insertFromRight(i_ocb_itp_type,4,2);
-    l_ecmdRc |= data.setBit(31);
-
-    if (l_ecmdRc) {
-      FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_ecmdRc);
-      rc.setEcmdError(l_ecmdRc);
-      return rc;
-    }
-
-    FAPI_DBG("Writing to Channel %d Register : OCB Channel Push Control/Status Address", i_ocb_chan);
-
-    rc = fapiPutScom(i_target, OCBSHCSn[i_ocb_chan] , data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel Push Address");
-      return rc;
-    }
-
-  }
-
-  // -------------------------------------
-  // set up pull queue control register
-  //    bits 4:5  => pull interrupt action
-  //                   00=full
-  //                   01=not full
-  //                   10=empty
-  //                   11=not empty
-  //    bits 6:8 => pull queue length
-  //    bit 31   => pull queue enable
-  // -------------------------------------
-  if (i_ocb_type == OCB_TYPE_PULLQ && i_ocb_upd_reg == OCB_UPD_PIB_OCI_REG) {
-    l_ecmdRc |= data.flushTo0();
-    l_ecmdRc |= data.insertFromRight(i_ocb_q_len,6,5);
-    l_ecmdRc |= data.insertFromRight(i_ocb_itp_type,4,2);
-    l_ecmdRc |= data.setBit(31);
-
-    if (l_ecmdRc) {
-      FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_ecmdRc);
-      rc.setEcmdError(l_ecmdRc);
-      return rc;
-    }
-
-    FAPI_DBG("Writing to Channel %d Register : OCB Channel Pull Control/Status Address", i_ocb_chan);
-
-    rc = fapiPutScom(i_target, OCBSLCSn[i_ocb_chan] , data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel Pull Address");
-      return rc;
-    }
-
-  }
-
-  // --------------------------------
-  // Print Channel Configuration Info
-  // --------------------------------
-  FAPI_IMP("-----------------------------------------------------");
-  FAPI_IMP("OCB Channel Configuration                            ");
-  FAPI_IMP("-----------------------------------------------------");
-  FAPI_IMP("  channel number             => %d ", i_ocb_chan);
-  FAPI_IMP("  channel type               => %d ", i_ocb_type);
-
-  if (i_ocb_type == OCB_TYPE_PUSHQ || i_ocb_type == OCB_TYPE_PULLQ) {
-    FAPI_IMP("  queue length               => %d ", i_ocb_q_len);
-    FAPI_IMP("  interrupt type             => %d ", i_ocb_itp_type);
-
-    if (i_ocb_type == OCB_TYPE_PUSHQ) {
-       FAPI_IMP("  push write overflow enable => %d ", i_ocb_ouflow_en);
-    }
-    else {
-      FAPI_IMP("  pull write overflow enable => %d ", i_ocb_ouflow_en);
-    }
-
-  }
-
-  FAPI_IMP("  channel base address       => 0x%08X ", i_ocb_bar);
-  FAPI_IMP("-----------------------------------------------------");
-
-  return rc;
-} // end proc_ocb_setup
-
-
-/// \brief Reset OCB Channels to default state (ie. scan-0 flush state)
-/// \param[in]   i_target          => Chip Target
-
-ReturnCode proc_ocb_reset(const Target& i_target) {
-  ReturnCode rc;
-  uint32_t   l_ecmdRc = 0;
-
-  ecmdDataBufferBase data(64);
-  uint8_t i = 0;
-
-  // ---------------------------------------
-  // Loop over PIB Registers in Channels 0-3
-  // ---------------------------------------
-  for (i = 0; i <= 3; i++) {
-    l_ecmdRc |= data.flushTo0();
-
-    if (l_ecmdRc) {
-      FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_ecmdRc);
-      rc.setEcmdError(l_ecmdRc);
-      return rc;
-    }
-
-    // clear out OCBAR
-    rc = fapiPutScom(i_target, OCBARn[i]   , data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel %d BAR Register", i);
-      return rc;
-    }
-
-    // clear out OCBCSR
-    //  - clear out using AND
-    //  - set bit 5 (circular mode) using OR  (for channels 0-2)
-    //  - set bit 4 (stream mode) using OR    (for channel 3)
-    rc = fapiPutScom(i_target, OCBCSRn_AND[i]   , data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel %d Control & Status AND Register", i);
-      return rc;
-    }
-
-    if (i == 3) 
-      l_ecmdRc |= data.setBit(4);
-    else
-      l_ecmdRc |= data.setBit(5);
-
-    if (l_ecmdRc) {
-      FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_ecmdRc);
-      rc.setEcmdError(l_ecmdRc);
-      return rc;
-    }
-
-    rc = fapiPutScom(i_target, OCBCSRn_OR[i]   , data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel %d Control & Status OR Register", i);
-      return rc;
-    }
-
-    l_ecmdRc |= data.flushTo0();
-
-    if (l_ecmdRc) {
-      FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_ecmdRc);
-      rc.setEcmdError(l_ecmdRc);
-      return rc;
-    }
-
-    // clear out Error Status
-    rc = fapiPutScom(i_target, OCBESRn[i]   , data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel %d Error Status Register", i);
-      return rc;
-    }
-  }// end for loop
-
-  // ---------------------------------------
-  // Loop over OCI Registers in Channels 0-2
-  // ---------------------------------------
-  for (i = 0; i <= 2; i++) {
-    l_ecmdRc |= data.flushTo0();
-  
-    // clear out Pull Base
-    rc = fapiPutScom(i_target, OCBSLBRn[i]   , data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel %d Pull Base Register", i);
-      return rc;
-    }
-
-    // clear out Push Base
-    rc = fapiPutScom(i_target, OCBSHBRn[i]   , data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel %d Push Base Register", i);
-      return rc;
-    }
-
-    // clear out Pull Control & Status
-    rc = fapiPutScom(i_target, OCBSLCSn[i]   , data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel %d Pull Control & Status Register", i);
-      return rc;
-    }
-
-    // clear out Push Control & Status
-    rc = fapiPutScom(i_target, OCBSHCSn[i]   , data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel %d Push Control & Status Register", i);
-      return rc;
-    }
-
-    // clear out Stream Error Status
-    rc = fapiPutScom(i_target, OCBSESn[i]   , data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel %d Stream Error Status Register", i);
-      return rc;
-    }
-
-    // clear out Untrusted Control
-    rc = fapiPutScom(i_target, OCBICRn[i]   , data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel %d Untrusted Control Register", i);
-      return rc;
-    }
-
-    // clear out Linear Window Control
-    rc = fapiPutScom(i_target, OCBLWCRn[i]   , data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel %d Linear Window Control Register", i);
-      return rc;
-    }
-
-    // clear out Linear Window Base
-    //  - set bits 2:9
-    l_ecmdRc |= data.setWord(0, 0x3FC00000);
-
-    if (l_ecmdRc) {
-       FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_ecmdRc);
-      rc.setEcmdError(l_ecmdRc);
-      return rc;
-    }
-
-    rc = fapiPutScom(i_target, OCBLWSBRn[i]   , data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCB Channel %d Linear Window Base Register", i);
-      return rc;
-    }
-  } // end for loop
-
-  // -----------------------------------------
-  // Set Interrupt Source Mask Registers 0 & 1 
-  // OIMR0/1 @ 0X0006A006 & 0X0006A016
-  // -----------------------------------------
-  l_ecmdRc  = data.flushTo0();
-  l_ecmdRc |= data.setWord(0, 0xFFFFFFFF);  // keep word1 0's for simics
-    
-  if (l_ecmdRc) {
-    FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_ecmdRc);
-    rc.setEcmdError(l_ecmdRc);
-    return rc;
-  }  
-  
-  rc = fapiPutScom(i_target, OCC_ITP_MASK0_MASK_OR_0x0006A006, data);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCC Interrupt Source Mask Register0 (OIMR0)");
-    return rc;
-  }  
-
-  rc = fapiPutScom(i_target, OCC_ITP_MASK1_MASK_OR_0x0006A016, data);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCC Interrupt Source Mask Register1 (OIMR1)");
-    return rc;
-  }  
-
-  // ---------------------------------------------------------------------------------
-  // Clear OCC Interrupt Controller Registers
-  //   - OITR0/1  Interrupt Type 0/1                         @ 0x0006A008 & 0x0006A018
-  //   - OIEPR0/1 Interrupt Edge Polarity 0/1                @ 0x0006A009 & 0x0006A019
-  //   - OISR0/1  Interrupt Source 0/1                       @ 0x0006A001 & 0x0006A011  
-  //   - OCIR0/1  Interrupt Critical Enable 0/1              @ 0x0006A00A & 0x0006A01A
-  //   - ODHER0/1 Interrupt Debug Halt Enable 0/1            @ 0x0006A00A & 0x0006A01A
-  //   - OUDER0/1 Interrupt Unconditional Debug Event Enable @ 0x0006A00C & 0x0006A01C
-  // ---------------------------------------------------------------------------------
-  l_ecmdRc = data.flushTo0();  
-  if (l_ecmdRc) {
-    FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_ecmdRc);
-    rc.setEcmdError(l_ecmdRc);
-    return rc;
-  }  
-
-  rc = fapiPutScom(i_target, OCC_ITP_TYPE0_0x0006A008, data);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCC Interrupt Type Register0 (OITR0)");
-    return rc;
-  }  
-  
-  rc = fapiPutScom(i_target, OCC_ITP_TYPE1_0x0006A018, data);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCC Interrupt Type Register1 (OITR1)");
-    return rc;
-  }   
-
-
-  rc = fapiPutScom(i_target, OCC_ITP_EDGE_POLARITY0_0x0006A009, data);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCC Interrupt Edge Polarity Register0 (OIEPR0)");
-    return rc;
-  }  
-
-  rc = fapiPutScom(i_target, OCC_ITP_EDGE_POLARITY1_0x0006A019, data);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCC Interrupt Edge Polarity Register1 (OIEPR1)");
-    return rc;
-  }  
-
-
- rc = fapiPutScom(i_target, OCC_ITP_SOURCE0_MASK_AND_0x0006A001, data);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCC Interrupt Source Register0 (OISR0)");
-    return rc;
-  }  
-  
-  rc = fapiPutScom(i_target, OCC_ITP_SOURCE1_MASK_AND_0x0006A011, data);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCC Interrupt Source Register1 (OISR1)");
-    return rc;
-  }  
-
-
-  rc = fapiPutScom(i_target, OCC_ITP_CRITICAL_EN0_0x0006A00A, data);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCC Interrupt Critical Enable Register0 (OCIR0)");
-    return rc;
-  }  
-
-  rc = fapiPutScom(i_target, OCC_ITP_CRITICAL_EN1_0x0006A01A, data);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCC Interrupt Critical Enable Register1 (OCIR1)");
-    return rc;
-  }  
-
-
-  rc = fapiPutScom(i_target, OCC_ITP_DEBUG_HALT_EN0_0x0006A00E, data);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCC Interrupt Debug Halt Enable Register0 (ODHER0)");
-    return rc;
-  }  
-
-  rc = fapiPutScom(i_target, OCC_ITP_DEBUG_HALT_EN1_0x0006A01E, data);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCC Interrupt Debug Halt Enable Register1 (ODHER1)");
-    return rc;
-  }  
-
- 
-  rc = fapiPutScom(i_target, OCC_ITP_UNCOND_DEBUG_EN0_0x0006A00C, data);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCC Unconditional Debug Event Enable Register0 (OUDER0)");
-    return rc;
-  }  
-  
-  rc = fapiPutScom(i_target, OCC_ITP_UNCOND_DEBUG_EN1_0x0006A01C, data);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCC Unconditional Debug Event Enable Register1 (OUDER1)");
-    return rc;
-  }    
-    
-  // ----------------------------------------------------------
-  // Clear OCC Interrupt Timer Registers 0 & 1 
-  // OTR0/1 @ 0x0006A100 & 0x0006A101
-  // ----------------------------------------------------------  
-  // clear OTR0/1     0x0006A100 & 0x0006A101 need bits 0&1 set to clear register
-  l_ecmdRc = data.flushTo0(); 
-  l_ecmdRc |= data.setBit(0);
-  l_ecmdRc |= data.setBit(1);
-  
-  if (l_ecmdRc) {
-    FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_ecmdRc);
-    rc.setEcmdError(l_ecmdRc);
-    return rc;
-  }  
-
-  rc = fapiPutScom(i_target, OCC_ITP_TIMER0_0x0006A100, data);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCC Interrupt Timer0 Register (OTR0)");
-    return rc;
-  }  
-
-  rc = fapiPutScom(i_target, OCC_ITP_TIMER1_0x0006A101, data);
-  if (!rc.ok()) {
-    FAPI_ERR("**** ERROR : Unexpected error encountered in write to OCC Interrupt Timer1 Register (OTR1)");
-    return rc;
-  }  
-
-  return rc;
-}
-
-} //end extern C
-
-/*
-*************** Do not edit this area ***************
-This section is automatically updated by CVS when you check in this file.
-Be sure to create CVS comments when you commit so that they can be included here.
-
-$Log: p8_ocb_init.C,v $
-Revision 1.7  2013/06/05 17:39:01  jimyac
-fixed SW207126 - simics issue of writing non-zero value to reserved bits
-
-
-
-
-*/
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_init.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_init.H
deleted file mode 100755
index e5aa9dc1b..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_init.H
+++ /dev/null
@@ -1,117 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_init.H $           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2013,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_ocb_init.H,v 1.4 2012/11/27 18:11:50 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_ocb_init.H,v $
-#ifndef _P8_OCB_INIT_H_
-#define _P8_OCB_INIT_H_
-
-#include <fapi.H>
-#include "p8_pm.H"
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_ocb_init_FP_t) (const fapi::Target&,
-                                              const uint32_t,
-                                              const uint8_t,
-                                              const uint8_t,
-                                              const uint32_t,
-                                              const uint8_t,
-                                              const uint8_t,
-                                              const uint8_t);
-
-extern "C" {
-
-//------------------------------------------------------------------------------
-// Function prototype
-//------------------------------------------------------------------------------
-/// \brief Configure OCB Channels based on mode and parameters passed
-/// \param[in]   i_target          => Chip Target
-/// \param[in]   i_mode            => PM_CONFIG, PM_RESET, PM_INIT, or PM_SETUP
-/// \param[in]   i_ocb_chan        => select channel 0-3 to set up
-/// \param[in]   i_ocb_type        => 0=indirect  1=linear stream  2=circular push  3=circular pull
-/// \param[in]   i_ocb_bar         => 32-bit channel base address (29 bits + "000")
-/// \param[in]   i_ocb_q_len       => 0-31 length of push or pull queue in  (queue_length + 1) * 8B
-/// \param[in]   i_ocb_ouflow_en   => 0=disabled 1=enabled
-/// \param[in]   i_ocb_itp_type    => 0=full  1=not full  2=empty  3=not empty
-
-fapi::ReturnCode p8_ocb_init(const fapi::Target& i_target,
-                             const uint32_t      i_mode,
-                             const uint8_t       i_ocb_chan,
-                             const uint8_t       i_ocb_type,
-                             const uint32_t      i_ocb_bar,
-                             const uint8_t       i_ocb_q_len,
-                             const uint8_t       i_ocb_ouflow_en,
-                             const uint8_t       i_ocb_itp_type);
-
-// ---------
-// Constants
-// ---------
-const uint8_t OCB_CHAN0                = 0x00;
-const uint8_t OCB_CHAN1                = 0x01;
-const uint8_t OCB_CHAN2                = 0x02;
-const uint8_t OCB_CHAN3                = 0x03;
-
-const uint8_t OCB_TYPE_NULL            = 0x00;
-const uint8_t OCB_TYPE_LIN             = 0x01;
-const uint8_t OCB_TYPE_LINSTR          = 0x02;
-const uint8_t OCB_TYPE_LINWIN          = 0x03;
-const uint8_t OCB_TYPE_CIRC            = 0x04;
-const uint8_t OCB_TYPE_PUSHQ           = 0x05;
-const uint8_t OCB_TYPE_PULLQ           = 0x06;
-
-const uint8_t OCB_UPD_PIB_REG          = 0x00;
-const uint8_t OCB_UPD_PIB_OCI_REG      = 0x01;
-
-const uint8_t OCB_Q_OUFLOW_NULL        = 0x00;
-const uint8_t OCB_Q_OUFLOW_EN          = 0x01;
-const uint8_t OCB_Q_OUFLOW_DIS         = 0x02;
-
-const uint8_t OCB_Q_ITPTYPE_NULL       = 0x00;
-const uint8_t OCB_Q_ITPTYPE_FULL       = 0x01;
-const uint8_t OCB_Q_ITPTYPE_NOTFULL    = 0x02;
-const uint8_t OCB_Q_ITPTYPE_EMPTY      = 0x03;
-const uint8_t OCB_Q_ITPTYPE_NOTEMPTY   = 0x04;
-
-const uint8_t OCB_UNSECMASTER_NULL     = 0x00;
-const uint8_t OCB_UNSECMASTER_ALLOW    = 0x01;
-const uint8_t OCB_UNSECMASTER_NOTALLOW = 0x02;
-
-// channel register arrrays
-const uint64_t OCBARn[4]       = {OCB0_ADDRESS_0x0006B010,             OCB1_ADDRESS_0x0006B030,             OCB2_ADDRESS_0x0006B050,             OCB3_ADDRESS_0x0006B070            };
-const uint64_t OCBCSRn[4]      = {OCB0_STATUS_CONTROL_0x0006B011,      OCB1_STATUS_CONTROL_0x0006B031,      OCB2_STATUS_CONTROL_0x0006B051,      OCB3_STATUS_CONTROL_0x0006B071     };
-const uint64_t OCBCSRn_AND[4]  = {OCB0_STATUS_CONTROL_AND_0x0006B012,  OCB1_STATUS_CONTROL_AND_0x0006B032,  OCB2_STATUS_CONTROL_AND_0x0006B052,  OCB3_STATUS_CONTROL_AND_0x0006B072 };
-const uint64_t OCBCSRn_OR[4]   = {OCB0_STATUS_CONTROL_OR_0x0006B013,   OCB1_STATUS_CONTROL_OR_0x0006B033,   OCB2_STATUS_CONTROL_OR_0x0006B053,   OCB3_STATUS_CONTROL_OR_0x0006B073  };
-const uint64_t OCBESRn[4]      = {OCB0_ERROR_STATUS_0x0006B014,        OCB1_ERROR_STATUS_0x0006B034,        OCB2_ERROR_STATUS_0x0006B054,        OCB3_ERROR_STATUS_0x0006B074       };
-const uint64_t OCBSLBRn[3]     = {OCB0_PULL_BASE_0x0006A200,           OCB1_PULL_BASE_0x0006A210,           OCB2_PULL_BASE_0x0006A220                                               };
-const uint64_t OCBSHBRn[3]     = {OCB0_PULL_STATUS_CONTROL_0x0006A201, OCB1_PULL_STATUS_CONTROL_0x0006A211, OCB2_PULL_STATUS_CONTROL_0x0006A221                                     };
-const uint64_t OCBSLCSn[3]     = {OCB0_PUSH_BASE_0x0006A203,           OCB1_PUSH_BASE_0x0006A213,           OCB2_PUSH_BASE_0x0006A223                                               };
-const uint64_t OCBSHCSn[3]     = {OCB0_PUSH_STATUS_CONTROL_0x0006A204, OCB1_PUSH_STATUS_CONTROL_0x0006A214, OCB2_PUSH_STATUS_CONTROL_0x0006A224                                     };
-const uint64_t OCBSESn[3]      = {OCB0_STREAM_ERR_STATUS_0x0006A206,   OCB1_STREAM_ERR_STATUS_0x0006A216,   OCB2_STREAM_ERR_STATUS_0x0006A226                                       };
-
-const uint64_t OCBICRn[3]      = {OCB0_UNTRUSTED_CONTROL_0x0006A207,   OCB1_UNTRUSTED_CONTROL_0x0006A217,   OCB2_UNTRUSTED_CONTROL_0x0006A227                                       }; // allow unsecure master
-const uint64_t OCBLWCRn[3]     = {OCB0_LIN_WINDOW_CONTROL_0x0006A208,  OCB1_LIN_WINDOW_CONTROL_0x0006A218,  OCB2_LIN_WINDOW_CONTROL_0x0006A228                                      }; // linear window write control
-const uint64_t OCBLWSBRn[3]    = {OCB0_LIN_WINDOW_BASE_0x0006A20C,     OCB1_LIN_WINDOW_BASE_0x0006A21C,     OCB2_LIN_WINDOW_BASE_0x0006A22C                                         }; // linear window write base
-
-} // extern "C"
-
-#endif
-
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_occ_control.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_occ_control.C
deleted file mode 100755
index ff02e09ab..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_occ_control.C
+++ /dev/null
@@ -1,394 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_occ_control.C $        */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_occ_control.C,v 1.5 2014/04/21 20:17:31 bcbrock Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_occ_control.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Jim Yacynych         Email: jimyac@us.ibm.com
-// *!
-
-/// \file p8_occ_control.C
-/// \brief Initialize boot vector registers and control PPC405 reset
-
-/// \todo
-///
-///   High-level procedure flow:
-/// \verbatim
-///   o process parameters passed to procedure
-///   o Initialize boot vector registers in SRAM (SRBV0,1,2,3) if (i_ppc405_boot_ctrl != PPC405_BOOT_NULL)
-///     o initialize SRBV0,1,2 with all 0's (illegal instructions)
-///     o initialize SRBV0 per passed parameter (i_ppc405_boot_ctrl)
-///       o initialize to Branch Absolute 0xFFF80010 if i_ppc405_boot_ctrl = PPC405_BOOT_SRAM
-///       o initialize to Branch Absolute 0x00000010 if i_ppc405_boot_ctrl = PPC405_BOOT_MEM
-///       o initialize to Branch Relative -16        if i_ppc405_boot_ctrl = PPC405_BOOT_OLD
-///   o Write PPC405 rese/halt bits per parameteri_ppc405_reset_ctrl   (OCR, OJCFG)
-///       o if PPC405_RESET_NULL , do nothing
-///       o if PPC405_RESET_OFF  , write reset bit to 0 (PPC405 not reset)
-///       o if PPC405_RESET_ON   , write reset bit to 1 (PPC405 reset)
-///       o if PPC405_HALT_OFF   , write halt bit to 0  (PPC405 not halted)
-///       o if PPC405_HALT_ON    , write halt bit to 1  (PPC405 halted)
-///       o if PPC405_RESET_SEQUENCE , Safe halt/reset of OCC (See comments)
-/// Procedure Prereq:
-///   o System clocks are running
-/// \endverbatim
-//------------------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-#include <fapi.H>
-#include "p8_scom_addresses.H"
-#include "p8_occ_control.H"
-
-// We are not allowed to add new files to fw810, so the BIT() macro is added
-// by hand.
-//#include "pore_bitmanip.H"
-
-/// Create a multi-bit mask of \a n bits starting at bit \a b
-#define BITS(b, n) ((ULL(0xffffffffffffffff) << (64 - (n))) >> (b))
-
-/// Create a single bit mask at bit \a b
-#define BIT(b) BITS((b), 1)
-
-
-extern "C" {
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Constant definitions
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Global variables
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Function prototypes
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Function definitions
-// ----------------------------------------------------------------------
-
-// We need to get the FAPI team to provide a simple 32-bit address/64-bit data
-// SCOM abstraction. In the meantime, we can't define these as local static
-// functions due to PHYP restrictions, so we give these SCOM abstractions
-// unique names.
-
-#define putScom(target, address, data) \
-    _occControlPutScom(target, address, data, #address, __FILE__, __LINE__)
-
-#define getScom(target, address, data) \
-    _occControlGetScom(target, address, data, #address, __FILE__, __LINE__)
-
-    fapi::ReturnCode
-    _occControlPutScom(const Target& i_target, const uint32_t i_address,
-             const uint64_t i_data,
-             const char* i_sAddress, const char* i_file, const int i_line)
-    {
-        fapi::ReturnCode rc;
-        uint32_t ecmdRc;
-        ecmdDataBufferBase data(64);
-        
-        do {
-            ecmdRc = data.setDoubleWord(0, i_data);
-            if (ecmdRc) {
-                FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase at %s:%d",
-                         ecmdRc, i_file, i_line);
-                rc.setEcmdError(ecmdRc);
-                break;
-            }
-
-            rc = fapiPutScom(i_target, i_address, data);
-            if (!rc.ok()) {
-                FAPI_ERR("putScom() to %s (0x%08x) failed at %s:%d.",
-                         i_sAddress, i_address, i_file, i_line);
-                break;
-            }
-        } while (0);
-        return rc;
-    }
-
-    fapi::ReturnCode
-    _occControlGetScom(const Target& i_target, const uint32_t i_address,
-             uint64_t& o_data,
-             const char* i_sAddress, const char* i_file, const int i_line)
-    {
-        fapi::ReturnCode rc;
-        ecmdDataBufferBase data(64);
-        
-        do {
-            rc = fapiGetScom(i_target, i_address, data);
-            if (!rc.ok()) {
-                FAPI_ERR("getScom() from %s (0x%08x) failed at %s:%d.",
-                         i_sAddress, i_address, i_file, i_line);
-                break;
-            }
-            o_data = data.getDoubleWord(0);
-        } while (0);
-        
-        return rc;
-    }
-
-/// \param[in]  i_target            => Chip Target
-/// \param[in]  i_ppc405_reset_ctrl => PPC405_RESET_NULL : do nothing   PPC405_RESET_OFF : set ppc405 reset=0  PPC405_RESET_ON : set ppc405 reset=1
-/// \param[in]  i_ppc405_boot_ctrl  => PPC405_BOOT_NULL  : do nothing   PPC405_BOOT_SRAM : boot from sram      PPC405_BOOT_MEM : boot from memory     PPC405_BOOT_OLD : boot from sram (OLD tests)
-
-/// \retval FAPI_RC_SUCCESS
-/// \retval ERROR defined in xml
-
-fapi::ReturnCode
-p8_occ_control(const Target& i_target, const uint8_t i_ppc405_reset_ctrl, const uint8_t i_ppc405_boot_ctrl)
-{
-    fapi::ReturnCode rc, rc1;
-  ecmdDataBufferBase data(64);
-  uint32_t   l_ecmdRc = 0;
-  uint64_t firMask, occLfir;
-
-  FAPI_INF("Executing p8_occ_control ....");
-
-  // -------------------------------------
-  // process arguments passed to procedure
-  // -------------------------------------
-
-  // check ppc405_reset_ctrl
-  if (!(i_ppc405_reset_ctrl <= PPC405_RESET_SEQUENCE) ) {
-    FAPI_ERR("Bad PPC405 Reset Setting Passed to Procedure => %d", i_ppc405_reset_ctrl);
-    const uint8_t& RESET_PARM = i_ppc405_reset_ctrl;
-    FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCC_CONTROL_BAD_405RESET_PARM);
-    return rc;
-  }
-
-  // check sram_bv_ctrl
-  if (!(i_ppc405_boot_ctrl <= PPC405_BOOT_OLD) ) {
-    FAPI_ERR("Bad Boot Vector Setting Passed to Procedure => %d", i_ppc405_boot_ctrl);
-    const uint8_t& BOOT_PARM = i_ppc405_boot_ctrl;
-    FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCC_CONTROL_BAD_405BOOT_PARM);
-    return rc;
-  }
-
-  // ------------------------------------------------
-  // Set up Boot Vector Registers in SRAM
-  //    - set bv0-2 to all 0's (illegal instructions)
-  //    - set bv3 to proper branch instruction
-  //    - boot vector registers
-  //      - OCC_SRAM_BOOT_VEC0_0x00066004
-  //      - OCC_SRAM_BOOT_VEC1_0x00066005
-  //      - OCC_SRAM_BOOT_VEC2_0x00066006
-  //      - OCC_SRAM_BOOT_VEC3_0x00066007
-  // -------------------------------------------------
-
-  l_ecmdRc |= data.flushTo0();
-
-  if (l_ecmdRc) {
-    FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_ecmdRc);
-    rc.setEcmdError(l_ecmdRc);
-    return rc;
-  }
-
-  // write 0's to bv0-2
-  if (i_ppc405_boot_ctrl != PPC405_BOOT_NULL) {
-
-    FAPI_DBG("Writing to Boot Vector0 Register");
-
-    rc = fapiPutScom(i_target, OCC_SRAM_BOOT_VEC0_0x00066004, data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to SRAM Boot Vector0 Register");
-      return rc;
-    }
-
-    FAPI_DBG("Writing to Boot Vector1 Register");
-
-    rc = fapiPutScom(i_target, OCC_SRAM_BOOT_VEC1_0x00066005, data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to SRAM Boot Vector1 Register");
-      return rc;
-    }
-
-    FAPI_DBG("Writing to Boot Vector2 Register");
-
-    rc = fapiPutScom(i_target, OCC_SRAM_BOOT_VEC2_0x00066006, data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to SRAM Boot Vector2 Register");
-      return rc;
-    }
-
-    // write branch instruction to bv3
-    if (i_ppc405_boot_ctrl == PPC405_BOOT_SRAM) {
-      l_ecmdRc |= data.setWord(0, PPC405_BRANCH_SRAM_INSTR);          // Branch Absolute 0xFFF80010  => ba 0xfff80010 (boot from sram)
-    }
-    else if (i_ppc405_boot_ctrl == PPC405_BOOT_MEM) {
-      l_ecmdRc |= data.setWord(0, PPC405_BRANCH_MEM_INSTR);           // Branch Absolute 0x00000010  => ba 0x00000010 (boot from memory)
-    }
-    else {
-      l_ecmdRc |= data.setWord(0, PPC405_BRANCH_OLD_INSTR);
-    }
-
-    if (l_ecmdRc) {
-      FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_ecmdRc);
-      rc.setEcmdError(l_ecmdRc);
-      return rc;
-    }
-
-    FAPI_DBG("Writing to Boot Vector3 Register");
-
-    rc = fapiPutScom(i_target, OCC_SRAM_BOOT_VEC3_0x00066007, data);
-    if (!rc.ok()) {
-      FAPI_ERR("**** ERROR : Unexpected error encountered in write to SRAM Boot Vector3 Register");
-      return rc;
-    }
-  }
-
-  // ----------------------------------------------------------
-  // Handle the i_ppc405_reset_ctrl parameter
-  // ----------------------------------------------------------
-
-  switch (i_ppc405_reset_ctrl) {
-
-  case PPC405_RESET_OFF:
-
-      rc = putScom(i_target, OCC_CONTROL_AND_0x0006B001, ~BIT(0));
-      if (!rc.ok()) return rc;
-      break;
-
-  case PPC405_RESET_ON:
-
-      rc = putScom(i_target, OCC_CONTROL_OR_0x0006B002, BIT(0));
-      if (!rc.ok()) return rc;
-      break;
-      
-  case PPC405_HALT_OFF:
-
-      rc = putScom(i_target, OCC_JTG_PIB_OJCFG_AND_0x0006B005, ~BIT(6));
-      if (!rc.ok()) return rc;
-      break;
-
-  case PPC405_HALT_ON:
-
-      rc = putScom(i_target, OCC_JTG_PIB_OJCFG_OR_0x0006B006, BIT(6));
-      if (!rc.ok()) return rc;
-      break;
-
-  case PPC405_RESET_SEQUENCE:
-
-      // It is unsafe in general to simply reset the 405, as this is an
-      // asynchronous reset that can leave OCI slaves in unrecoverable states
-      // (cf. SW255563). This is a "safe" reset-entry sequence that includes
-      // halting the 405 (a synchronous operation) before issuing the
-      // reset. Since this sequence halts/unhalts the 405 and modifies FIRs it
-      // is coded and called out apart from the simple PPC405_RESET_OFF
-      // sequence above that simply sets the 405 reset bit.
-      //
-      // The sequence:
-      //
-      // 1. Mask the "405 halted" FIR bit to avoid FW thinking the halt we're
-      // about to inject on the 405 is an error.
-      //
-      // 2. Halt the 405. If the 405 does not halt in 1ms we note that fact
-      // but press on, hoping (probably in vain) that any subsequent reset
-      // actions will clear up the issue. To check if the 405 halted we must
-      // clear the FIR and verify that the FIR is set again.
-      //
-      // 3. Put the 405 into reset.
-      //
-      // 4. Clear the halt bit.
-      //
-      // 5. Restore the original FIR mask
-
-      // Save the FIR mask, and mask the halted FIR
-
-      rc = getScom(i_target, OCC_LFIR_MASK_0x01010803, firMask);
-      if (!rc.ok()) return rc;
-
-      rc = putScom(i_target, OCC_LFIR_MASK_OR_0x01010805, BIT(25));
-      if (!rc.ok()) return rc;
-
-      do {
-
-          // Halt the 405 and verify that it is halted
-
-          rc = putScom(i_target, OCC_JTG_PIB_OJCFG_OR_0x0006B006, BIT(6));
-          if (!rc.ok()) break;
-
-          rc = fapiDelay(1000000, 10000); // 1,000,000 ns = 1ms
-          if (!rc.ok()) {
-              FAPI_ERR("fapiDelay() failed");
-              break;
-          }
-
-          rc = putScom(i_target, OCC_LFIR_AND_0x01010801, ~BIT(25));
-          if (!rc.ok()) break;
-
-          rc = getScom(i_target, OCC_LFIR_0x01010800, occLfir);
-          if (!rc.ok()) break;
-
-          if (!(occLfir & BIT(25))) {
-              FAPI_ERR("OCC will not halt. Pressing on, hoping for the best.");
-          }
-
-          // Put the 405 into reset, unhalt the 405 and clear the halted FIR
-          // bit. 
-
-          rc = putScom(i_target, OCC_CONTROL_OR_0x0006B002, BIT(0));
-          if (!rc.ok()) break;
-
-          rc = putScom(i_target, OCC_JTG_PIB_OJCFG_AND_0x0006B005, ~BIT(6));
-          if (!rc.ok()) break;
-
-          rc = putScom(i_target, OCC_LFIR_AND_0x01010801, ~BIT(25));
-          if (!rc.ok()) break;
-
-      } while (0);
-
-      // Restore the original FIR mask, then decide which error code (if any)
-      // to return.
-
-      rc1 = putScom(i_target, OCC_LFIR_MASK_0x01010803, firMask);
-
-      if (!rc.ok() && !rc1.ok()) {
-          FAPI_ERR("Double fault, returing final error code");
-          return rc1;
-      } else if (!rc.ok()) {
-          return rc;
-      } else if (!rc1.ok()) {
-          return rc1;
-      }          
-      break;
-
-
-  default:
-      break;
-  }
-
-  FAPI_INF("Completing p8_occ_control ....");
-
-  return rc;
-}
-
-} //end extern C
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_occ_control.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_occ_control.H
deleted file mode 100755
index 3f1096f85..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_occ_control.H
+++ /dev/null
@@ -1,65 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_occ_control.H $        */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2013,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_occ_control.H,v 1.4 2014/04/21 14:27:53 bcbrock Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_occ_control.H,v $
-#ifndef _P8_OCC_CONTROL_H_
-#define _P8_OCC_CONTROL_H_
-
-#include <fapi.H>
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_occ_control_FP_t) (const fapi::Target&, 
-                                                    const uint8_t, 
-                                                    const uint8_t);
-
-extern "C" {
-
-//------------------------------------------------------------------------------
-// Function prototype
-//------------------------------------------------------------------------------
-
-fapi::ReturnCode p8_occ_control(const fapi::Target& i_target, 
-                                         const uint8_t i_ppc405_reset_ctrl,
-                                         const uint8_t i_ppc405_boot_ctrl);
-// ---------
-// Constants
-// ---------
-const uint8_t PPC405_RESET_NULL         = 0x00; 
-const uint8_t PPC405_RESET_OFF          = 0x01;
-const uint8_t PPC405_RESET_ON           = 0x02;
-const uint8_t PPC405_HALT_OFF           = 0x03;
-const uint8_t PPC405_HALT_ON            = 0x04;
-const uint8_t PPC405_RESET_SEQUENCE     = 0x05;
-
-const uint8_t PPC405_BOOT_NULL          = 0x00;
-const uint8_t PPC405_BOOT_SRAM          = 0x01;
-const uint8_t PPC405_BOOT_MEM           = 0x02;
-const uint8_t PPC405_BOOT_OLD           = 0x03;
-
-const uint32_t PPC405_BRANCH_SRAM_INSTR = 0x4BF80042;  // Branch Absolute 0xFFF80040  (boot from sram)
-const uint32_t PPC405_BRANCH_MEM_INSTR  = 0x48000042;  // Branch Absolute 0x00000040  (boot from memory)
-const uint32_t PPC405_BRANCH_OLD_INSTR  = 0x4BFFFFF0;  // Branch Relative -16         (boot from sram)
-
-} // extern "C"
-
-#endif 
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_occ_sram_init.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_occ_sram_init.C
deleted file mode 100755
index ff2b39008..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_occ_sram_init.C
+++ /dev/null
@@ -1,137 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_occ_sram_init.C $      */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_occ_sram_init.C,v 1.4 2013/08/13 18:17:02 jimyac Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_occ_sram_init.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Jim Yacynych        Email: ajimyac@us.ibm.com
-// *!
-// *! General Description:
-// *!        
-// *!   The purpose of this procedure is to initialize the OCC SRAM
-// *!   
-// *!
-// *! Procedure Prereq:
-// *!   o System clocks are running
-// *!
-//------------------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-
-#include "p8_pm.H"
-#include "p8_occ_sram_init.H"
-
-extern "C" {
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Constant definitions
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Global variables
-// ----------------------------------------------------------------------
-
-
-// ----------------------------------------------------------------------
-// Function prototypes
-// ----------------------------------------------------------------------
-
-
-// ----------------------------------------------------------------------
-// Function definitions
-// ----------------------------------------------------------------------
-
-// \param[in] i_target Chip target
-/// \param[in] mode     Control mode for the procedure 
-///                     (PM_CONFIG, PM_INIT, PM_RESET)
-
-/// \retval PM_SUCCESS if something good happens,
-/// \retval PM_OCCSRAM_CODE_BAD* otherwise
-
-fapi::ReturnCode
-p8_occ_sram_init(const Target& i_target, uint32_t mode)
-{
-  fapi::ReturnCode rc;
-  //ecmdDataBufferBase data;
-  //ecmdDataBufferBase mask;
-  
-  
-  FAPI_INF("Executing p8_occ_sram_init in mode %x ...", mode);
-  
-  /// -------------------------------
-  /// Configuration:  perform translation of any Platform Attributes into Feature Attributes
-  /// that are applied during Initalization
-  if (mode == PM_CONFIG) 
-  {
-  
-    FAPI_INF("OCC SRAM configuration...");  
-    FAPI_INF("---> None defined...");
-    
-  }
-  
-  /// -------------------------------
-  /// Initialization:  perform order or dynamic operations to initialize 
-  /// the OCC SRAM using necessary Platform or Feature attributes. 
-  else if (mode == PM_INIT) 
-  {
-
-    FAPI_INF("OCC SRAM initialization...");
- 
-  } 
-  
-  /// -------------------------------
-  /// Reset:  perform reset of OCC SRAM so that it can reconfigured and 
-  /// reinitialized 
-  else if (mode == PM_RESET) 
-  {
-  
-    FAPI_INF("OCC SRAM reset...");
-    
-  } 
-   
-  /// -------------------------------
-  /// Unsupported Mode
-  else 
-  {
-  
-    FAPI_ERR("Unknown mode passed to p8_occ_sram_init. Mode %x ....", mode);
-    const uint32_t& MODE = mode;
-    FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCCSRAM_CODE_BAD_MODE);
-    
-  }
-  
-  return rc;
-
-}
-
-} //end extern C
-
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_occ_sram_init.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_occ_sram_init.H
deleted file mode 100755
index 018e6ede1..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_occ_sram_init.H
+++ /dev/null
@@ -1,80 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_occ_sram_init.H $      */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_occ_sram_init.H,v 1.1 2012/08/23 16:35:37 jimyac Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_occ_sram_init.H,v $
-//------------------------------------------------------------------------------
-// *|
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-// *|
-// *! TITLE       : p8_occ_sram_init.H
-// *! DESCRIPTION : Initialize the SRAM in the OCC
-// *!
-// *! OWNER NAME  : Jim Yacynych  Email: jimyac@us.ibm.com
-// *! BACKUP NAME : Greg Still    Email: stillgs@us.ibm.com
-// *!
-//------------------------------------------------------------------------------
-
-#ifndef _P8_OCC_SRAM_INIT_H_
-#define _P8_OCC_SRAM_INIT_H_
-
-//------------------------------------------------------------------------------
-// Includes
-//------------------------------------------------------------------------------
-
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_occ_sram_init_FP_t) (const fapi::Target&, uint32_t);
-
-extern "C" {
-
-
-//------------------------------------------------------------------------------
-// Constant definitions
-//------------------------------------------------------------------------------
-
-
-//------------------------------------------------------------------------------
-// Parameter structure definitions
-//------------------------------------------------------------------------------
-
-
-
-//------------------------------------------------------------------------------
-// Function prototype
-//------------------------------------------------------------------------------
-/// \param[in] i_target Chip target
-/// \param[in] mode     Control mode for the procedure (PM_CONFIG, PM_INIT, PM_RESET)
-
-/// \retval ECMD_SUCCESS if something good happens,
-/// \retval BAD_RETURN_CODE otherwise
-fapi::ReturnCode 
-p8_occ_sram_init(const fapi::Target& i_target, uint32_t mode);
-
-
-} // extern "C"
-
-#endif // _P8_OCC_SRAM_INIT_H_
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.C
deleted file mode 100755
index 6575d1e59..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.C
+++ /dev/null
@@ -1,755 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.C $           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_oha_init.C,v 1.13 2013/09/12 16:08:45 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_oha_init.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Ralf Maier         Email: ralf.maier@de.ibm.com
-// *!
-// *! General Description:
-// *!
-// *!    The purpose of this procedure is to do a initial setup of OHA
-// *!
-// *! Procedure Prereq:
-// *!   o completed istep procedure
-// *!
-//------------------------------------------------------------------------------
-/// \file p8_oha_init.C
-/// \brief Setup OHA ( Power Proxy Trace Timer and Low Activity detect range)
-///
-/// \version
-/// \version 1.12  stillgs 06/04/13 Fix Gerrit comment on e_rc setting into rc for OHA
-/// \version       Mode register access
-/// \version --------------------------------------------------------------------------
-/// \version 1.11  stillgs 05/20/13 Removed AISS reset call as unncessary for OCC reset use
-/// \version --------------------------------------------------------------------------
-/// \version 1.9  mjjones 04/30/13 Removed unused variable
-/// \version --------------------------------------------------------------------------
-/// \version 1.3  rmaier 10/04/12 Replacing genHex*Str function
-/// \version --------------------------------------------------------------------------
-/// \version 1.1  rmaier 08/23/12 Renaming proc_ to p8_
-/// \version --------------------------------------------------------------------------
-/// \version 1.13 rmaier 08/02/12 Included review feedback Set 6
-/// \version --------------------------------------------------------------------------
-/// \version 1.12 rmaier 07/17/12 Included review feedback Set 5
-/// \version --------------------------------------------------------------------------
-/// \version 1.11 rmaier 07/17/12 Included review feedback Set 4
-/// \version --------------------------------------------------------------------------
-/// \version 1.10 rmaier 07/13/12 Included new review feedback
-/// \version --------------------------------------------------------------------------
-/// \version 1.9 rmaier 05/24/12 Included review feedback
-/// \version --------------------------------------------------------------------------
-/// \version 1.8 rmaier 05/15/12 Changed Error return code handling for SCOM access
-/// \version --------------------------------------------------------------------------
-/// \version 1.7 rmaier 05/09/12 Removed global variables
-/// \version --------------------------------------------------------------------------
-/// \version 1.6 rmaier 04/24/12 Updated Config-mode
-/// \version --------------------------------------------------------------------------
-/// \version 1.5 rmaier 03/20/12 Added AISS-reset
-/// \version --------------------------------------------------------------------------
-/// \version 1.4 rmaier 03/13/12 Added modes-structure
-/// \version --------------------------------------------------------------------------
-/// \version 1.0 rmaier 12/01/11 Initial Version
-/// \version ---------------------------------------------------------------------------
-///
-/// High-level procedure flow:
-///
-/// \verbatim
-///
-///  Procedure Prereq:
-///  - completed istep procedure
-///
-///
-///     if PM_CONFIG {
-///
-///        convert_ppt_time() - Convert Power Proxy Trace Time to Power Proxy Trace Time Select and Match feature attributes
-///        With ATTR_PM_POWER_PROXY_TRACE_TIMER (binary in nanoseconds) to produce  ATTR_PM_PPT_TIMER_MATCH_VALUE and ATTR_PM_PPT_TIMER_TICK
-///          0=0.25us , 1=0.5us, 2=1us, and 3=2us
-///
-///     else if PM_INIT {
-///        loop over all valid chiplets {
-///           Check if OHA is accessible as chiplet may not be enabled or are in winkle
-///
-///           Setup aiss hang time  in oha_mode_reg
-///           Set aiss_timeout to max              --  oha_mode_reg (11:14) ,            ADR 1002000D (SCOM)
-///                                                --  9 => longest time  512 ms
-///           Setup low activity  in oha_low_activity_detect_mode_reg
-///                                                -- oha_low_activity_detect_mode_reg,   ADR 10020003 (SCOM)
-///             \todo  when should we enable the low activity detection or just setup the ranges??
-///           Set lad_enable = 1??
-///           Set lad_entry = 16                  -- bit index of a 24 bit counter based on base counter  0: longest, 23: shortest interval
-///           Set lad_exit  = 17                  -- bit index of a 24 bit counter based on base counter  0: longest, 23: shortest interval
-///
-///
-///           Setup Power Proxy Trace  in activity_sample_mode_reg
-///           Set  ppt_int_timer_select           -- activity_sample_mode_reg (36:37)    ADR 10020000 (SCOM)
-///                                                -- select precounter for ppt timer ( 0=0.25us, 1=0.5us, 2=1us, 3=2us )
-///
-///         )
-///     } else if PM_RESET {
-///         loop over all valid chiplets {
-///           Check if OHA is accessible as chiplet may not be enabled or are
-//            in winkle
-///
-///             Note: no function is defined!!!! AISS reset was here but this
-///             reset should not be associcated with OCC resets
-///
-///         }
-///       }   //end PM_RESET -mode
-///
-///
-///  \endverbatim
-///
-//------------------------------------------------------------------------------
-//----------------------------------------------------------------------
-//  eCMD Includes
-//----------------------------------------------------------------------
-
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-
-#include "p8_pm.H"
-#include "p8_scom_addresses.H"
-#include "p8_oha_init.H"
-#include "p8_pcb_scom_errors.H"
-
-
-extern "C" {
-
-using namespace fapi;
-
- //------------------------------------------------------------------------------
- //Start scan zero value
- //------------------------------------------------------------------------------
-
-
-
-// ----------------------------------------------------------------------
-// Function prototypes
-// ----------------------------------------------------------------------
-
-fapi::ReturnCode oha_aiss_inject_winkle_entry(const fapi::Target & i_ex_target);
-
-typedef struct {
-  int8_t   AISS_HANG_DETECT_TIMER_SEL;     //  oha_mode_reg (11:14) - 0=1ms, 1=2ms, 3=4ms, ...9=512ms. others illegal
-  int8_t   PPT_TIMER_SELECT;               //  activity_sample_mode_reg (36:37) 0=0.25us, 1=0.5us, 2=1us, and 3=2us
-  int8_t   LAD_ENTRY;
-  int8_t   LAD_EXIT;
-} struct_i_oha_val_init_type;
-
-
-// ----------------------------------------------------------------------
-// Function definitions
-// ----------------------------------------------------------------------
-
-// Reset function
-fapi::ReturnCode p8_oha_init_reset( const fapi::Target& i_target,
-                                    uint32_t i_mode);
-// Config function
-fapi::ReturnCode p8_oha_init_config(const fapi::Target&  i_target);
-
-// Init function
-fapi::ReturnCode  p8_oha_init_init( const fapi::Target& i_target,
-                                    struct_i_oha_val_init_type i_oha_val_init);
-
-// ----------------------------------------------------------------------
-// p8_oha_init wrapper to fetch the attributes and pass it on to p8_oha_init_core
-// ----------------------------------------------------------------------
-
-fapi::ReturnCode
-p8_oha_init(const fapi::Target &i_target, uint32_t i_mode)
-{
-    fapi::ReturnCode rc;
-
-    FAPI_INF("Procedure start");
-    do
-    {
-     
-        if ( i_mode == PM_CONFIG )
-        {
-
-            FAPI_INF("MODE: CONFIG Calling p8_oha_init_config");
-
-            rc=p8_oha_init_config(i_target);
-            if (rc)
-            {
-                FAPI_ERR(" p8_oha_init_config failed. With rc = 0x%x", (uint32_t)rc); 
-                break;
-            }
-
-        } else if ( i_mode == PM_INIT )  {
-
-
-            FAPI_INF("MODE: INIT Calling p8_oha_init_init");
-
-            //Declare parms struct
-            struct_i_oha_val_init_type i_oha_val_init;
-
-            //Assign values to parms in struct
-            // should come from MRWB
-            i_oha_val_init.AISS_HANG_DETECT_TIMER_SEL = 9;  //  oha_mode_reg (11:14) - 0=1ms, 1=2ms, 3=4ms, ...9=512ms. others illegal
-            i_oha_val_init.PPT_TIMER_SELECT = 3;            //  activity_sample_mode_reg (36:37) 0=0.25us, 1=0.5us, 2=1us, and 3=2us
-            i_oha_val_init.LAD_ENTRY = 16;
-            i_oha_val_init.LAD_EXIT = 17;
-
-            rc=p8_oha_init_init(i_target,  i_oha_val_init);
-            if (rc)
-            {
-                FAPI_ERR(" p8_oha_init_init failed. With rc = 0x%x", (uint32_t)rc);
-                break;
-            }
-
-        }
-        else if ( i_mode == PM_RESET )
-        {
-
-             FAPI_INF("MODE: RESET - none defined");
-             /*
-
-             GSS:  removed as this only resets (at this time) the AISS
-             functions which are not influenced by OCC FW and are detrimental
-             to operational chiplets
-
-             FAPI_INF("MODE: RESET Calling p8_oha_init_reset");
-             rc = p8_oha_init_reset( i_target, i_mode);
-             if (rc)
-             {
-                FAPI_ERR(" p8_oha_init_reset failed. With rc = 0x%x", (uint32_t)rc);
-                return rc;
-             }
-             */
-        }
-        else
-        {
-
-             FAPI_ERR("Unknown mode %x ....\n", i_mode);
-             FAPI_SET_HWP_ERROR(rc, RC_PROC_OHA_CODE_BAD_MODE);
-
-        }
-    } while (0);
-
-    FAPI_INF("Procedure end...\n");
-   
-    return rc;
-
-}
-
-
-//------------------------------------------------------------------------------
-// OHA Config Function
-//------------------------------------------------------------------------------
-fapi::ReturnCode
-p8_oha_init_config(const fapi::Target& i_target)
-{
-    fapi::ReturnCode rc;
-
-    uint8_t  attr_pm_aiss_timeout;
-    uint32_t attr_pm_power_proxy_trace_timer;
-    uint32_t attr_pm_ppt_timer_tick;
-    uint32_t attr_pm_ppt_timer_match_value;
-    
-    FAPI_INF("OHA config start...");
-    do
-    {      
-
-        //  ******************************************************************
-        //  Get Attributes for OHA Timers Delay
-        //  ******************************************************************
-        //  set defaults  if not available
-        
-        // Write all the timer attributes with defaults.  This also allocates
-        // the attributes in Cronus environments.
-        // If overrides exist, the overridden values will be returned when 
-        // read back.
-
-        attr_pm_ppt_timer_tick           = 2;       // Default 2: 1us
-        
-        SETATTR(rc,
-                ATTR_PM_PPT_TIMER_TICK,
-                "ATTR_PM_PPT_TIMER_TICK",
-                &i_target,
-                attr_pm_ppt_timer_tick);
-                
-        GETATTR(rc,
-                ATTR_PM_PPT_TIMER_TICK,
-                "ATTR_PM_PPT_TIMER_TICK",
-                &i_target,
-                attr_pm_ppt_timer_tick);
-        
-        attr_pm_aiss_timeout             = 5;       // Default 5: 32ms
-        
-        SETATTR(rc,
-                ATTR_PM_AISS_TIMEOUT,
-                "ATTR_PM_AISS_TIMEOUT",
-                &i_target,
-                attr_pm_aiss_timeout);
-                
-        GETATTR(rc,
-                ATTR_PM_AISS_TIMEOUT,
-                "ATTR_PM_AISS_TIMEOUT",
-                &i_target,
-                attr_pm_aiss_timeout);
-       
-        attr_pm_power_proxy_trace_timer  = 64000;   // Default 1us,,, 32us...64ms
-        
-        SETATTR(rc,
-                ATTR_PM_POWER_PROXY_TRACE_TIMER,
-                "ATTR_PM_POWER_PROXY_TRACE_TIMER",
-                &i_target,
-                attr_pm_power_proxy_trace_timer);
-                
-        GETATTR(rc,
-                ATTR_PM_POWER_PROXY_TRACE_TIMER,
-                "ATTR_PM_POWER_PROXY_TRACE_TIMER",
-                &i_target,
-                attr_pm_power_proxy_trace_timer);
-
-        //  ******************************************************************
-        //  Calculate OHA timer settings
-        //  ******************************************************************
-
-        FAPI_DBG("Calculate OHA timer settings");
-        FAPI_DBG("Calculate:");
-        FAPI_DBG("        ATTR_PM_PPT_TIMER_MATCH_VALUE");
-        FAPI_DBG("        ATTR_PM_PPT_TIMER_TICK");
-        FAPI_DBG("using:");
-        FAPI_DBG("        ATTR_PM_POWER_PROXY_TRACE_TIMER");
-
-        FAPI_DBG("Set  ATTR_PM_AISS_TIMEOUT to %X", attr_pm_aiss_timeout);
-        attr_pm_ppt_timer_match_value  = attr_pm_power_proxy_trace_timer / 32  ;    //time in us / 32us
-
-        FAPI_DBG("Set ATTR_PM_PPT_TIMER_MATCH_VALUE to %X", attr_pm_ppt_timer_match_value);
-
-
-        //  ******************************************************************
-        //  Set Attributes for OHA timers
-        //  ******************************************************************
-
-        SETATTR(rc,
-                ATTR_PM_PPT_TIMER_MATCH_VALUE,
-                "ATTR_PM_PPT_TIMER_MATCH_VALUE",
-                &i_target,
-                attr_pm_ppt_timer_match_value);       
-
-    } while (0);
-    
-    FAPI_INF("OHA config end...\n");
-     
-    return rc;
-
-}  //end CONFIG
-
-
-
-//------------------------------------------------------------------------------
-// OHA Init Function
-//------------------------------------------------------------------------------
-fapi::ReturnCode
-p8_oha_init_init(const fapi::Target& i_target, struct_i_oha_val_init_type i_oha_val_init)
-{
-    fapi::ReturnCode rc;
-    uint32_t l_rc;
-
-    ecmdDataBufferBase              data(64);
-    ecmdDataBufferBase              mask(64);
-
-    std::vector<fapi::Target>       l_exChiplets;
-//    std::vector<Target>::iterator  itr;
-    uint8_t                         l_ex_number = 0;
-
-    uint8_t                         attr_pm_aiss_timeout;
-    uint32_t                        attr_pm_tod_pulse_count_match_val = 1024;
-    uint32_t                        attr_pm_ppt_timer_tick;
-    uint32_t                        attr_pm_ppt_timer_match_value;
-
-    FAPI_INF("OHA init start...");
-    do
-    {
-        
-
-        //  ******************************************************************
-        //  Get Attributes for OHA Timers Delay
-        //  ******************************************************************
-        
-        GETATTR(rc,
-                ATTR_PM_PPT_TIMER_TICK,
-                "ATTR_PM_PPT_TIMER_TICK",
-                &i_target,
-                attr_pm_ppt_timer_tick);
-        
-        GETATTR(rc,
-                ATTR_PM_PPT_TIMER_MATCH_VALUE,
-                "ATTR_PM_PPT_TIMER_MATCH_VALUE",
-                &i_target,
-                attr_pm_ppt_timer_match_value);    
-
-        GETATTR(rc,
-                ATTR_PM_AISS_TIMEOUT,
-                "ATTR_PM_AISS_TIMEOUT",
-                &i_target,
-                attr_pm_aiss_timeout);                
-
-        //  ******************************************************************
-        //  initialize all oha_reg with scan-zero values upfront
-        //  ******************************************************************
-
-        rc = fapiGetChildChiplets ( i_target,
-                                    TARGET_TYPE_EX_CHIPLET,
-                                    l_exChiplets,
-                                    TARGET_STATE_FUNCTIONAL);
-        if (rc)
-        {
-            FAPI_ERR("Error from fapiGetChildChiplets!");
-            break;
-        }
-        FAPI_DBG("Number of chiplets  => %u", l_exChiplets.size());
-
-        // Iterate through the returned chiplets
-        //for (itr = l_exChiplets.begin(); itr != l_exChiplets.end(); itr++)
-        for (uint8_t c=0; c < l_exChiplets.size(); c++)
-        {          
-            // Get the core number
-            //rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, itr, c);
-            rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[c], l_ex_number);
-            if (rc)
-            {
-                FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error");
-                break;
-            }
-
-            FAPI_DBG("Processing core : %d ", l_ex_number);
-
-            //  ******************************************************************
-            //  AISS hang timer setup
-            //  ******************************************************************
-            //  - set aiss_timeout to max time
-            //  ******************************************************************
-            //FAPI_DBG("**********************************************");
-            FAPI_INF(" Setup aiss hang time in oha_mode_reg 1002000D");
-            //FAPI_DBG("**********************************************");
-
-            // Read register content
-            //rc = fapiGetScom( (*itr), EX_OHA_MODE_REG_RWx1002000D , data );
-            rc = fapiGetScom( l_exChiplets[c], EX_OHA_MODE_REG_RWx1002000D , data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(EX_OHA_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc);
-                break;
-            }
-
-            FAPI_DBG ("Content of EX_OHA_MODE_REG_0x1002000D  :  %016llX", data.getDoubleWord(0));
-
-            //data.flushTo0();
-            l_rc = data.insertFromRight(attr_pm_aiss_timeout    ,11,4);
-            l_rc |= data.insertFromRight(attr_pm_tod_pulse_count_match_val    ,17,14);
-            if (l_rc)
-            {
-                FAPI_ERR("Bit operation failed. With rc = 0x%x", (uint32_t)l_rc);  rc.setEcmdError(l_rc);
-                break;
-            }
-
-            // rc = fapiPutScom( (*itr), EX_OHA_MODE_REG_RWx1002000D , data );
-            rc = fapiPutScom( l_exChiplets[c], EX_OHA_MODE_REG_RWx1002000D , data );
-            if (rc)
-            {
-                FAPI_ERR("fapiPutScom(EX_OHA_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc); 
-                break;
-            }
-
-
-            //  ******************************************************************
-            //  Low Activity Detect (LAD) setup
-            //  ******************************************************************
-            //  ******************************************************************
-            //  - enable LAD
-            //  - set LAD for entry
-            //  - set LAD for exit
-            //  ******************************************************************
-
-            FAPI_INF(" Setup Low Activity Detect (LAD) in oha_low_activity_detect_mode_reg 10020003, but NOT ENABLED");
-
-            // Read register content
-            // rc = fapiGetScom( (*itr), EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG_RWx10020003 , data );
-            rc = fapiGetScom( l_exChiplets[c], EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG_RWx10020003 , data );
-            if (rc)
-            {
-               FAPI_ERR("fapiGetScom(EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG_RWx10020003) failed. With rc = 0x%x", (uint32_t)rc);
-               break;
-            }
-            FAPI_DBG(" Pre write content of EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG_RWx10020003  :  %016llX", data.getDoubleWord(0));
-
-            l_rc = data.setByte(0, i_oha_val_init.LAD_ENTRY);   // 16
-            l_rc |= data.setByte(1, i_oha_val_init.LAD_EXIT);   // 17
-            l_rc |= data.shiftRight(1);                         // LAD entry/exit starts at bit 1
-            l_rc |= data.clearBit(0);
-            if (l_rc)
-            {
-                FAPI_ERR("Bit operation failed. With rc = 0x%x", (uint32_t)l_rc);
-                rc.setEcmdError(l_rc);
-                break;
-            }
-
-            // rc = fapiPutScom((*itr), EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG_RWx10020003 , data );
-            rc = fapiPutScom( l_exChiplets[c], EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG_RWx10020003 , data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc);
-                break;
-            }
-
-            FAPI_INF ("Done LAD setup. LAD Disabled " );
-
-            //  ******************************************************************
-            //  Power Proxy Trace (PPT) setup
-            //  ******************************************************************
-            //  ******************************************************************
-            //  - set ppt_timer_select
-            //  - set ppt_trace_timer_match_val
-            //  ******************************************************************
-
-            FAPI_INF(" Setup  Power Proxy Trace (PPT) in oha_activity_sample_mode_reg 10020000");
-
-            // Read register content
-            // rc = fapiGetScom( (*itr), EX_OHA_ACTIVITY_SAMPLE_MODE_REG_RWx10020000 , data );
-            rc = fapiGetScom( l_exChiplets[c], EX_OHA_ACTIVITY_SAMPLE_MODE_REG_RWx10020000 , data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(EX_OHA_ACTIVITY_SAMPLE_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc);
-                break;
-            }
-            FAPI_DBG(" Pre write content of EX_OHA_ACTIVITY_SAMPLE_MODE_REG_RWx10020000  :  %016llX", data.getDoubleWord(0));
-
-
-            // set ppt_int_timer_select to longest interval "11" = 2us
-            //l_rc = data.setBit(36);
-            //if (l_rc)
-            //{
-            //      FAPI_ERR("Bit operation failed.");
-            //      FAPI_SET_HWP_ERROR(rc, RC_PROC_OHA_CODE_BITOP_FAILED);
-            //}
-            //l_rc = data.setBit(37);
-            //if (l_rc)
-            //{
-            //      FAPI_ERR("Bit operation failed.");
-            //      FAPI_SET_HWP_ERROR(rc, RC_PROC_OHA_CODE_BITOP_FAILED);
-            //}
-
-            l_rc = data.insertFromRight(attr_pm_ppt_timer_match_value    ,24,11);
-            l_rc |= data.insertFromRight(attr_pm_ppt_timer_tick           ,36,2);
-            if (l_rc)
-            {
-                FAPI_ERR("Bit operation failed. With rc = 0x%x", (uint32_t)l_rc);
-                rc.setEcmdError(l_rc);
-                break;
-            }
-
-            // rc = fapiPutScom((*itr), EX_OHA_ACTIVITY_SAMPLE_MODE_REG_RWx10020000 , data );
-            rc = fapiPutScom( l_exChiplets[c], EX_OHA_ACTIVITY_SAMPLE_MODE_REG_RWx10020000 , data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(EX_OHA_ACTIVITY_SAMPLE_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc);
-                 break;
-            }
-
-            FAPI_INF ("Done PPT timer setup." );
-        } // Chiplet loop
-        
-        // Error break is naturally handled
-        
-    } while(0);
-    
-    FAPI_INF("OHA init end...\n");
-    return rc;
-
-}  //end INIT
-
-
-
-//------------------------------------------------------------------------------
-// OHA Reset Function
-//------------------------------------------------------------------------------
-fapi::ReturnCode
-p8_oha_init_reset(const Target &i_target,  uint32_t i_mode)
-{
-    fapi::ReturnCode                rc;
-    fapi::ReturnCode                e_rc;
-    uint32_t                        l_rc = 0;
-
-    ecmdDataBufferBase              data(64);
-    ecmdDataBufferBase              mask(64);
-
-
-//    std::vector<Target>::iterator   itr;
-    std::vector<fapi::Target>       l_exChiplets;
-    uint8_t                         l_ex_number = 0;
-    
-    uint8_t                         platform;
-    
-    FAPI_INF("OHA init start...");
-    do
-    {
-        rc = fapiGetChildChiplets ( i_target,
-                                    TARGET_TYPE_EX_CHIPLET,
-                                    l_exChiplets,
-                                    TARGET_STATE_FUNCTIONAL);
-        if (rc)
-        {
-            FAPI_ERR("Error from fapiGetChildChiplets!");
-            break;
-        }
-        FAPI_DBG("Number of chiplets  => %u", l_exChiplets.size());
-
-        // Iterate through the returned chiplets
-        //for (itr = l_exChiplets.begin(); itr != l_exChiplets.end(); itr++)
-        for (uint8_t c=0; c < l_exChiplets.size(); c++)
-        {
-
-            // Get the core number
-            //rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, itr, c);
-            rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[c], l_ex_number);
-            if (rc)
-            {
-                FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error");
-                break;
-            }
-
-            FAPI_DBG("Processing core : %d ", l_ex_number);
-
-            // --------------------------------------
-            // Check if SBE code has already cleared the OHA override.
-            // As chiplets may be enabled but offline (eg in Winkle)
-            // treat SCOM errors as off-line (eg skip it).  If online
-            // and set, clear the override.
-
-            //  GSS:  removed as Cronus always puts a message out of (PCB_OFFLINE)
-            //  even though this code is meant to handle it. As this message
-            //  can cause confusion in the lab, the check is being removed.
-            bool            oha_accessible = true;
-            uint32_t        fsierror = 0;
-            const uint32_t  IDLE_STATE_OVERRIDE_EN = 6;
-
-
-            e_rc = fapiGetScom(l_exChiplets[c], EX_OHA_MODE_REG_RWx1002000D, data);
-            if(!e_rc.ok())
-            {
-                FAPI_ERR("Error reading EX_OHA_MODE_REG_RWx1002000D . Further debugging");
-
-                // Based on the execution platorm, access different facilities to 
-                // determine the error code
-                GETATTR(rc,
-                        ATTR_EXECUTION_PLATFORM,
-                        "ATTR_EXECUTION_PLATFORM",
-                        NULL,
-                        platform);
-
-                if( platform == fapi::ENUM_ATTR_EXECUTION_PLATFORM_FSP) 
-                {      
-                    rc = fapiGetCfamRegister( i_target, CFAM_FSI_STATUS_0x00001007, data );
-                    if(!rc.ok())
-                    {
-                        FAPI_ERR("Error reading CFAM FSI Status Register");
-                        break;
-                    }
-                    FAPI_INF( "CFAM_FSI_STATUS_0x00001007: 0x%X", data.getWord(0));
-                    l_rc |= data.extractToRight( &fsierror, 17, 3 );
-
-                    if ( l_rc )
-                    {
-                        rc.setEcmdError(l_rc);
-                        break;
-                    }
-                }
-                else if( platform == fapi::ENUM_ATTR_EXECUTION_PLATFORM_HOST )
-                {
-                    // Find the ADU status reg with the same PIB scresp
-
-                }
-                else
-                {
-                    FAPI_ERR("Invalid execution platform: %X", platform);
-                    // \todo Add CML point
-                    break;
-                }
-                if (fsierror == PIB_OFFLINE_ERROR)
-                {
-                    FAPI_INF( "Chiplet offline error detected. Skipping OHA Override clearing");
-                    oha_accessible = false;
-                }
-                else
-                {
-                    FAPI_ERR("Scom reading OHA_MODE");
-                    uint32_t & ERRORS = fsierror;
-                    rc = e_rc ;
-                    FAPI_SET_HWP_ERROR(rc, RC_PROC_OHA_CODE_PUTGETSCOM_FAILED);
-                    break;
-                }
-            }
-            // Process if OHA accessible.
-            if (oha_accessible)
-            {
-                if (data.isBitSet(IDLE_STATE_OVERRIDE_EN))
-                {
-
-                    FAPI_INF("\tClear the OHA Idle State Override for EX %x", l_ex_number);
-                    l_rc |= data.clearBit(IDLE_STATE_OVERRIDE_EN);
-                    if (l_rc)
-                    {
-                       FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_rc);
-                       rc.setEcmdError(l_rc);
-                       break;
-                    }
-
-                    rc = fapiPutScom(l_exChiplets[c], EX_OHA_MODE_REG_RWx1002000D, data);
-                    if(!rc.ok())
-                    {
-                        FAPI_ERR("Scom error writing OHA_MODE");
-                        break;
-                    }
-                }
-            }
-            //        End of check removal
-
-            // GSS: removed AISS reset as this should only be used for SLW
-            // recovery, not OCC reset.
-            //
-            // If this function were to ever be restored here (for whatever
-            // reason), a check for special wake-up state must be made.
-            // This, too, needs care in implementation as AISS reset affects
-            // the special wake-up condition and must be forced from the PCBS-PM
-            // via the override mechanism there.
-
-        } // chiplet loop
-    } while(0);
-
-    FAPI_INF("OHA reset end...\n");
-    return rc;
-}
-
-} //end extern C
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.H
deleted file mode 100755
index a738c8991..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.H
+++ /dev/null
@@ -1,61 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.H $           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_oha_init.H,v 1.3 2013/08/02 19:00:26 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_oha_init.H,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! TITLE       : p8_oha_init.H
-// *! DESCRIPTION : Initialize OHA
-// *!
-// *! OWNER NAME: Ralf Maier         Email: ralf.maier@de.ibm.com
-// *!
-// *!
-//------------------------------------------------------------------------------
-//  
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_oha_init_FP_t) (const fapi::Target&, uint32_t);
-
-extern "C"
-{
-
-
-  /// \brief Initialize OHA
-  /// 
-  /// \param[in]      &i_target Chip target
-  /// \param[in]      i_mode    CONFIG-Mode
-  ///                           RESET-Mode
-  ///                           INIT-Mode
-  ///                           defined in p8_pm.H, enum P8_PM_FLOW_MODE
-  
-fapi::ReturnCode p8_oha_init    (const fapi::Target& i_target, uint32_t i_mode);
-
-
-}
-
-
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pba_init.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pba_init.C
deleted file mode 100644
index 3303ef054..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pba_init.C
+++ /dev/null
@@ -1,996 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pba_init.C $           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pba_init.C,v 1.19 2014/04/08 05:45:40 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pba_init.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Klaus P. Gungl         Email: kgungl@de.ibm.com
-// *! BACKUP NAME: Greg Still            Email: stillgs@us.ibm.com
-// *!
-// *!
-/// \file p8_pba_init.C
-/// \brief Initialize PBA registers for modes PM_INIT, PM_RESET and PM_CONFIG
-// *!
-// *! Functional description: setup the PBA registers depending on mode
-// *!   calling parameters:
-// *! :   Target i_target  // target according to calling conventions
-// *!     uint64_t mode    // mode according to power_up spec: PM_CONFIG, PM_INIT, PM_RESET
-// *!
-// *! high level flow:
-// *!  if (mode == PM_CONFIG) {
-// *!      rc =  pba_init_config(i_target);
-// *!  } else if {mode == PM_INIT) {
-// *!      rc =  pba_init_init(i_target);
-// *!  } else if (mode == PM_RESET) {
-// *!      rc =  pba_init_reset(i_target);
-// *!  } else {
-// *!      FAPI_SET_HWP_ERROR(rc,RC_PMPROC_PBA_INIT_INCORRECT_MODE);
-// *!  }
-// *!
-// *! buildfapiprcd -e "../../xml/error_info/p8_pba_init_errors.xml" p8_pba_init.C
-//------------------------------------------------------------------------------
-
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-#include <fapi.H>
-#include "p8_scom_addresses.H"
-#include "p8_pba_init.H"
-#include "p8_pm.H"
-
-// get the constants from here
-#include "pgp_pba.h"
-#include "pgp_common.h"
-
-extern "C" {
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Constant definitions
-// ----------------------------------------------------------------------
-
-
-// ----------------------------------------------------------------------
-// Global variables
-// ----------------------------------------------------------------------
-// mandated: do not use global variables
-
-// ----------------------------------------------------------------------
-// local Function definitions / prototypes
-// ----------------------------------------------------------
-fapi::ReturnCode pba_init_config ( const Target& i_target );
-fapi::ReturnCode pba_init_init ( const Target& i_target );
-fapi::ReturnCode pba_init_reset ( const Target& i_target );
-
-fapi::ReturnCode pba_slave_setup_init ( const Target& i_target );
-fapi::ReturnCode pba_slave_setup_reset ( const Target& i_target );
-fapi::ReturnCode pba_slave_reset(const Target& i_target);
-
-fapi::ReturnCode pba_bc_stop(const Target& i_target);
-
-
-// **********************************************************************************************
-// ----------------------------------------------- p8_pba_init --------------------------------
-// function:
-// set the pba registers depending on "mode", no default mode
-// returns: fapi return codes
-fapi::ReturnCode
-p8_pba_init(const Target& i_target,
-                uint64_t mode
-             )
-{
-    fapi::ReturnCode rc;
-    // calling the selected function from here
-
-    if (mode == PM_CONFIG)
-    {
-       rc =  pba_init_config(i_target);
-    }
-    else if (mode == PM_INIT)
-    {
-       rc =  pba_init_init(i_target);
-    }
-    else if (mode == PM_RESET)
-    {
-       rc =  pba_init_reset(i_target);
-    }
-    else
-    {
-      FAPI_ERR("Unknown mode passed to p8_pba_init. Mode %08llx ", mode);
-      const uint64_t& PM_MODE = mode;
-      FAPI_SET_HWP_ERROR(rc, RC_PMPROC_PBA_INIT_INCORRECT_MODE);
-    } // endif
-
-
-    return rc;
-}
-
-// **********************************************************************************************
- // ******************************************************** mode = PM_RESET ********************
-
-fapi::ReturnCode
-pba_init_reset(const Target& i_target)
-{
-
-    fapi::ReturnCode    rc;
-    uint32_t            l_rc = 0;
-    ecmdDataBufferBase  data(64);
-    uint64_t            address;
-
-    //--------------------------------------------------------------------------
-    const int MAX_PBA_RESET_REGS = 19; //Number of regs
-    uint64_t ary_pba_reset_regs[MAX_PBA_RESET_REGS] =
-    {
-        PBA_MODE_0x00064000            ,
-        PBA_BCDE_STAT_0x00064012       ,
-        PBA_BCDE_PBADR_0x00064013      ,
-        PBA_BCDE_OCIBAR_0x00064014     ,
-        PBA_BCUE_CTL_0x00064015        ,
-        PBA_BCUE_SET_0x00064016        ,
-        PBA_BCUE_STAT_0x00064017       ,
-        PBA_BCUE_PBADR_0x00064018      ,
-        PBA_BCUE_OCIBAR_0x00064019     ,
-        PBAXSHBR0_00064026             ,
-        PBAXSHCS0_00064027             ,
-        PBAXSHBR1_0006402A             ,
-        PBAXSHBR1_0006402B             ,
-        PBA_SLVCTL0_0x00064004         ,
-        PBA_SLVCTL1_0x00064005         ,
-//      PBA_SLVCTL2_0x00064006         ,  // this is only touched by SLW init
-        PBA_SLVCTL3_0x00064007         ,
-        PBA_FIR_0x02010840             ,
-        PBA_CONFIG_0x0201084B          ,
-        PBA_ERR_RPT0_0x0201084C
-//      PBAXCFG_00064021                  // Takes more than write of 0
-                                            // and should be done last of
-                                            // after err_rpt clearing
-    };
-
-    FAPI_INF("pba_init_reset start ...");
-    do
-    {
-        // Stop the  BCDE and BCUE        
-        rc = pba_bc_stop(i_target);
-        if (!rc.ok())
-        {
-            FAPI_ERR("pba_bc_stop detected an error");
-            break;
-        }
-      
-        // Reset each slave and wait for completion.
-        rc =  pba_slave_reset(i_target);
-        if (rc)
-        {
-             FAPI_ERR("pba_slave_reset failed.");
-             break;
-        }
-
-        // For reset phase, write these with 0x0
-
-        // Clear buffer to create 0 write data
-        l_rc = data.flushTo0();
-        if (l_rc)
-        {
-            rc.setEcmdError(l_rc);
-            break;
-        }
-
-        for (int i = 0; i < MAX_PBA_RESET_REGS; i++)
-        {
-            FAPI_INF("\tResetting PBA register addr=0x%08llX with 0, Target = %s",
-                            ary_pba_reset_regs[i],
-                            i_target.toEcmdString());
-
-            rc = fapiPutScom(i_target, ary_pba_reset_regs[i], data);
-            if (!rc.ok())
-            {
-                FAPI_ERR("fapiPutScom(addr=0x%08llX) failed, Target = %s",
-                            ary_pba_reset_regs[i],
-                            i_target.toEcmdString());
-                break;
-            }
-        }
-        if(!rc.ok())
-        {
-            break;
-        }
-
-        // Perform non-zero reset operations
-
-        // Reset PBAX errors via Configuration Register
-        address = PBAXCFG_00064021;
-
-        l_rc |= data.flushTo0();
-        l_rc |= data.setBit(2);      // Bit 2: PBAXCFG_SND_RESET
-        l_rc |= data.setBit(3);      // Bit 3: PBAXCFG_RCV_RESET
-        if (l_rc)
-        {
-            rc.setEcmdError(l_rc);
-            break;
-        }
-        FAPI_INF("\tResetting PBAX errors via PBAX config register addr=0x%08llX, value=0x%16llX, Target = %s",
-                            address,
-                            data.getDoubleWord(0),
-                            i_target.toEcmdString());
-        rc = fapiPutScom(i_target, address, data);
-        if (!rc.ok())
-        {
-            FAPI_ERR("fapiPutScom(addr=0x%08llX) failed, Target = %s",
-                            address,
-                            i_target.toEcmdString());
-            break;
-        }
-    } while(0);
-    FAPI_INF("pba_init_reset end ...");
-    return rc;
-
- } // endif (mode == PM_RESET)
-
-
-
-// ***********************************************************************************************
-// ************************************************************ mode = PM_INIT *******************
-// call pba_slave_setup
-fapi::ReturnCode
-pba_init_init(const Target& i_target)
-{
-
-    fapi::ReturnCode    rc;
-    uint32_t            l_rc = 0;
-    ecmdDataBufferBase  data(64);
-
-
-    // PBAX defaults
-    uint8_t ATTR_PM_PBAX_RCV_RESERV_TIMEOUT_value = 0 ;
-    uint8_t ATTR_PM_PBAX_SND_RETRY_COUNT_OVERCOMMIT_ENABLE_value = 0 ;
-    uint8_t ATTR_PM_PBAX_SND_RETRY_THRESHOLD_value = 0 ;
-    uint8_t ATTR_PM_PBAX_SND_RESERV_TIMEOUT_value = 0 ;
-
-
-    pbaxcfg_t pbaxcfg_setup ;
-    pbaxcfg_setup.value = 0;
-    FAPI_INF("pba_init_init start ...");
-    do
-    {
-
-
-        l_rc =  data.setDoubleWord(0, 0x0);
-        if (l_rc)
-        {
-            rc.setEcmdError(l_rc);
-            break;
-        }
-
-        // This register is cleared as there are no chicken switches that need
-        // to be disabled.  All other bits are set by OCC Firmware.
-        FAPI_INF("flushing PBA_CONFIG register ");
-
-        rc = fapiPutScom(i_target, PBA_CONFIG_0x0201084B  , data);
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom( PBA_CONFIG_0x0201084B ) failed. With rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        // Clear the PBA FIR only
-        // data still 0
-        FAPI_INF("flushing PBA_FIR register ");
-        rc = fapiPutScom(i_target, PBA_FIR_0x02010840   , data);
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom( PBA_FIR_0x02010840 ) failed. With rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        // The following registers are ROX, hence need not be touched:
-        // PBA_RBUFVAL0_0x02010850
-        // PBA_RBUFVAL1_0x02010851
-        // PBA_RBUFVAL2_0x02010852
-        // PBA_RBUFVAL3_0x02010853
-        // PBA_RBUFVAL4_0x02010854
-        // PBA_RBUFVAL5_0x02010855
-        // PBA_WBUFVAL0_0x02010858
-        // PBA_WBUFVAL1_0x02010859
-
-        // These PowerBus Overcommit regs are read-only, therefore no action required:
-        // PBA_PBOCR0_0x00064020
-        // PBA_PBOCR1_0x00064021
-        // PBA_PBOCR2_0x00064022
-        // PBA_PBOCR3_0x00064023
-        // PBA_PBOCR4_0x00064024
-        // PBA_PBOCR5_0x0006402
-
-        // The PBA BARs and their associated Masks are done outside of this FAPI
-        // set.  Thus, during a reset, the BARS/MASKS are retained. This applies
-        // to:
-        // PBA_BAR0_0x02013F00
-        // PBA_BARMSK0_0x02013F04
-        // PBA_BAR1_0x02013F01
-        // PBA_BARMSK1_0x02013F05
-        // PBA_BAR2_0x02013F02
-        // PBA_BAR3_0x02013F03
-        // PBA_TRUSTMODE_0x02013F08
-
-
-        // Per SW223235 and other testing, the PBAX hardware timeout mechanism
-        // does not allow for durations that can cover all system topologies.
-        // Thus, these mechanisms are being disabled.  The original attributes
-        // for PBAX were to enable and control these settings but, given then
-        // will not be used for P8, are no longer needed. Therefore, the attribute
-        // use calls have been removed in favor of simple procedure disablement.
-
-        // 20:24, ATTR_PM_PBAX_RCV_RESERV_TIMEOUT_value
-        // 27; ATTR_PM_PBAX_SND_RETRY_COUNT_OVERCOMMIT_ENABLE_value
-        // 28:35; ATTR_PM_PBAX_SND_RETRY_THRESHOLD_value
-        // 36:40  ATTR_PM_PBAX_SND_RESERV_TIMEOUT_value
-        pbaxcfg_setup.fields.ATTR_PM_PBAX_RCV_RESERV_TIMEOUT = ATTR_PM_PBAX_RCV_RESERV_TIMEOUT_value;
-        pbaxcfg_setup.fields.ATTR_PM_PBAX_SND_RETRY_COUNT_OVERCOMMIT_ENABLE = ATTR_PM_PBAX_SND_RETRY_COUNT_OVERCOMMIT_ENABLE_value;
-        pbaxcfg_setup.fields.ATTR_PM_PBAX_SND_RETRY_THRESHOLD = ATTR_PM_PBAX_SND_RETRY_THRESHOLD_value;
-        pbaxcfg_setup.fields.ATTR_PM_PBAX_SND_RESERV_TIMEOUT = ATTR_PM_PBAX_SND_RESERV_TIMEOUT_value;
-
-        // put the attribute values into PBAXCFG
-        l_rc = data.setDoubleWord(0, pbaxcfg_setup.value);
-        if (l_rc)
-        {
-            rc.setEcmdError(l_rc);
-            break;
-        }
-
-        rc = fapiPutScom(i_target, PBAXCFG_00064021   , data);
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PBAXCFG_00064021) failed. With rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        // last step: pba slave setup for init
-        rc = pba_slave_setup_init (i_target);
-        if (rc)
-        {
-            FAPI_ERR("fapi pba_slave_setup_init failed. With rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-    } while(0);
-    FAPI_INF("pba_init_init end ...");
-    return rc;
-
-} // end PM_INIT
-
-
-// *************************************************************************************************
-// ************************************************************* mode = PM_CONFIG ******************
-//
-/// Configuration:  perform translation of any Platform Attributes into
-/// Feature Attributes that are applied during Initalization of PBAX
-fapi::ReturnCode
-pba_init_config(const Target& i_target)
-{
-    fapi::ReturnCode rc;
-
-    FAPI_INF("mode = PM_CONFIG...");
-
- return rc;
-};
-
-
-// ************************************************************************************************
-// **************************************************** pba_slave_setup ***************************
-/// PgP PBA Setup
-///
-/// The PBA is 'set up' twice. The first set up is via scan-0 settings or
-/// SBE-IPL code to enable the Host Boot image to be injected into the cache
-/// of the IPL core.
-///
-/// This procedure documents the second setup that will normally be done by a
-/// FAPI procedure prior to releasing the OCC from reset.  This setup serves
-/// both for the initial boot of OCC as well as for the OCC (GPE), SLW and FSP
-/// runtime.  This procedure documents how the PBA should be set up the second
-/// time.
-///
-/// PBA slave 0 is reserved to the GPE engines, which must be able to switch
-/// modes to read from mainstore or Centaur inband SCOM spaces, and write
-/// Centaur inband SCOMs and also write into mainstore using IMA to support
-/// the Power Proxy Trace application.
-///
-/// PBA slave 1 is dedicated to the 405 ICU/DCU. This PBA slave is used for
-/// the initial boot, and for the initial runtime code that manages the OCC
-/// applet table.  Once OCC has initialzied applets, OCC FW will remove all
-/// TLB mappings associated with mainstore, effectively disabling this slave.
-///
-/// PBA Slave 2 is dedicated to the PORE-SLW.  Since 24x7 performance
-/// monitoring code now runs on PORE-SLW, the PORE-SLW is no longer a
-/// read-only master, but instead serves as a generic read-write master like
-/// all of the others.
-///
-/// PBA Slave 3 is mapped to the OCB in order to service FSP direct read/write
-/// of mainstore.
-///
-/// The design of PBA allows read buffers to be dedicated to a particular
-/// slave, and requires that a slave have a dedicated read buffer in order to
-/// do aggressive prefetching. In the end there is little reason to partition
-/// the resources.  The PORE-SLW will be running multiple applications that
-/// read and write main memory so we want to allow PORE-SLW access to all
-/// resources.  It also isn't clear that aggressive prefetching provides any
-/// performacne boost. Another wrinkle is that the BCDE claims read buffer C
-/// whenever it runs, and the 405 I + D sides never run after the initial OCC
-/// startup. For these reasons all slaves are programmed to share all
-/// resources.
-///
-/// \bug Need to disable slave prefetch for now for all shared buffers until a
-/// mode bit gets added too the PBA logic.  Dealt with using
-/// ATTR_PROC_EC_PBA_PREFETCH_ENABLE.
-///
-/// \bug The dis_slvmatch_order bit is going away
-
-fapi::ReturnCode
-pba_slave_setup_init(const Target& i_target)
-{
-    pba_mode_t          pm;
-    pba_slvctln_t       ps;
-    fapi::ReturnCode    rc;
-    uint32_t            l_rc = 0;
-    ecmdDataBufferBase  data(64);
-    
-    uint8_t             ec_allows_pba_prefetch_enable;
-
-    do
-    {       
-        rc = FAPI_ATTR_GET(ATTR_PROC_EC_PBA_PREFETCH_ENABLE,
-                                   &i_target,
-                                   ec_allows_pba_prefetch_enable);
-        if(rc)
-        {
-     	    FAPI_ERR("Error querying Chip EC feature: "
-                     "ATTR_PROC_EC_PBA_PREFETCH_ENABLE");
-            break;
-        }
-
-        FAPI_INF("PBA prefetch is %sallowed",
-                 (ec_allows_pba_prefetch_enable ? "" : "NOT "));
-
-        // Set the PBA_MODECTL register. It's not yet clear how PBA BCE
-        // transaction size will affect performance - for now we go with the
-        // largest size.  The HTM marker space is enabled and configured. Slave
-        // fairness is enabled. The setting 'dis_slvmatch_order' ensures that PBA
-        // will correctly flush write data before allowing a read of the same
-        // address from a different master on a different slave.  The second write
-        // buffer is enabled.
-        // prepare the value to be set:
-        pm.value = 0;
-        pm.fields.pba_region = PBA_OCI_REGION;
-        pm.fields.bcde_ocitrans = PBA_BCE_OCI_TRANSACTION_64_BYTES;
-        pm.fields.bcue_ocitrans = PBA_BCE_OCI_TRANSACTION_64_BYTES;
-        pm.fields.en_marker_ack = 1;
-        pm.fields.oci_marker_space = (PBA_OCI_MARKER_BASE >> 16) & 0x7;
-        pm.fields.en_slave_fairness = 1;
-        pm.fields.dis_slvmatch_order = 1;
-        pm.fields.en_second_wrbuf = 1;
-
-        l_rc = data.setDoubleWord(0, pm.value);
-        if (l_rc)
-        {
-           rc.setEcmdError(l_rc);
-           return rc;
-        }
-
-        // write the prepared value
-        rc = fapiPutScom(i_target, PBA_MODE_0x00064000 , data);
-        if (rc)
-        {
-           FAPI_ERR("fapiPutScom( PBA_MODE_0x00064000 ) failed. With rc = 0x%x", (uint32_t)rc);
-           break;
-        }
-
-        // Slave 0 (PORE-GPE).  This is a read/write slave. We only do 'static'
-        // setup here. Dynamic setup will be done by each GPE program that needs
-        // to access mainstore, before issuing any trasactions targeting the PBA
-        // bridge.
-
-        //   pba_slave_reset(PBA_SLAVE_PORE_GPE);
-        ps.value = 0;
-        ps.fields.enable = 1;
-        ps.fields.mid_match_value = OCI_MASTER_ID_PORE_GPE;
-        ps.fields.mid_care_mask = 0x7;
-        ps.fields.buf_alloc_a = 1;
-        ps.fields.buf_alloc_b = 1;
-        ps.fields.buf_alloc_c = 1;
-        ps.fields.buf_alloc_w = 1;
-
-        // Turn off buffer sharing for EC that don't allow prefetch
-        // GPEs only use buffer A
-        if (!ec_allows_pba_prefetch_enable)
-        {
-            ps.fields.buf_alloc_b = 0;
-            ps.fields.buf_alloc_c = 0;
-        }
-
-        l_rc = data.setDoubleWord(0, ps.value);
-        if (l_rc)
-        {
-           FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc);   
-           rc.setEcmdError(l_rc);
-           break;
-        } // end if
-
-        rc = fapiPutScom(i_target, PBA_SLVCTL0_0x00064004 , data);
-        if (rc)
-        {
-           FAPI_ERR("fapiPutScom( PBA_SLVCTL0_0x00064004 ) failed. With rc = 0x%x", (uint32_t)rc);
-           break;
-        }
-
-        // Slave 1 (405 ICU/DCU).  This is a read/write slave.  Write gethering is
-        // allowed, but with the shortest possible timeout. This slave is
-        // effectively disabled soon after IPL.
-
-        //    pba_slave_reset(PBA_SLAVE_OCC);
-        ps.value = 0;
-        ps.fields.enable = 1;
-        ps.fields.mid_match_value = OCI_MASTER_ID_OCC_ICU & OCI_MASTER_ID_OCC_DCU;
-        ps.fields.mid_care_mask = OCI_MASTER_ID_OCC_ICU & OCI_MASTER_ID_OCC_DCU;
-        ps.fields.read_ttype = PBA_READ_TTYPE_CL_RD_NC;
-        ps.fields.read_prefetch_ctl = PBA_READ_PREFETCH_NONE;
-        ps.fields.write_ttype = PBA_WRITE_TTYPE_DMA_PR_WR;
-        ps.fields.wr_gather_timeout = PBA_WRITE_GATHER_TIMEOUT_2_PULSES;
-        ps.fields.buf_alloc_a = 1;
-        ps.fields.buf_alloc_b = 1;
-        ps.fields.buf_alloc_c = 1;
-        ps.fields.buf_alloc_w = 1;
-
-        // Turn off buffer sharing for EC that don't allow prefetch
-        // All non-GPEs can share buffer B
-        if (!ec_allows_pba_prefetch_enable)
-        {
-            ps.fields.buf_alloc_a = 0;
-            ps.fields.buf_alloc_c = 0;
-        }
-
-        l_rc = data.setDoubleWord(0, ps.value);
-        if (l_rc)
-        {
-           FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc);
-           rc.setEcmdError(l_rc);
-           break;
-        } // end if
-
-        rc = fapiPutScom(i_target, PBA_SLVCTL1_0x00064005 , data);
-        if (rc)
-        {
-           FAPI_ERR("fapiPutScom( PBA_SLVCTL1_0x00064005 ) failed. With rc = 0x%x", (uint32_t)rc);
-           break;
-        }
-
-    /*  Removed as this is done by p8_set_port_bar.C for the SLW-used path
-        through the PBA
-
-        // Slave 2 (PORE-SLW).  This is a read/write slave. Write gathering is
-        // allowed, but with the shortest possible timeout.  The slave is set up
-        // to allow normal reads and writes at initialization.  The 24x7 code may
-        // reprogram this slave for IMA writes using special code sequences that
-        // restore normal DMA writes after each IMA sequence.
-
-        //   pba_slave_reset(PBA_SLAVE_PORE_SLW);
-        ps.value = 0;
-        ps.fields.enable = 1;
-        ps.fields.mid_match_value = OCI_MASTER_ID_PORE_SLW;
-        ps.fields.mid_care_mask = 0x7;
-        ps.fields.read_ttype = PBA_READ_TTYPE_CL_RD_NC;
-        ps.fields.read_prefetch_ctl = PBA_READ_PREFETCH_NONE;
-        ps.fields.write_ttype = PBA_WRITE_TTYPE_DMA_PR_WR;
-        ps.fields.wr_gather_timeout = PBA_WRITE_GATHER_TIMEOUT_2_PULSES;
-        ps.fields.buf_alloc_a = 1;
-        ps.fields.buf_alloc_b = 1;
-        ps.fields.buf_alloc_c = 1;
-        ps.fields.buf_alloc_w = 1;
-        l_rc = data.setDoubleWord(0, ps.value);
-        if (l_rc)
-        {
-           FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc);
-           rc.setEcmdError(l_rc);
-           break;
-        } // end if
-
-        rc = fapiPutScom(i_target, PBA_SLVCTL2_0x00064006 , data);
-        if (rc)
-        {
-           FAPI_ERR("fapiPutScom( PBA_SLVCTL2_0x00064006 ) failed. With rc = 0x%x", (uint32_t)rc);
-           break;
-        }
-    */
-
-        // Slave 3 (OCB).  This is a read/write slave. Write gathering is
-        // allowed, but with the shortest possible timeout.
-
-        //   pba_slave_reset(PBA_SLAVE_OCB);
-        ps.value = 0;
-        ps.fields.enable = 1;
-        ps.fields.mid_match_value = OCI_MASTER_ID_OCB;
-        ps.fields.mid_care_mask = 0x7;
-        ps.fields.read_ttype = PBA_READ_TTYPE_CL_RD_NC;
-        ps.fields.read_prefetch_ctl = PBA_READ_PREFETCH_NONE;
-        ps.fields.write_ttype = PBA_WRITE_TTYPE_DMA_PR_WR;
-        ps.fields.wr_gather_timeout = PBA_WRITE_GATHER_TIMEOUT_2_PULSES;
-        ps.fields.buf_alloc_a = 1;
-        ps.fields.buf_alloc_b = 1;
-        ps.fields.buf_alloc_c = 1;
-        ps.fields.buf_alloc_w = 1;
-
-        // Turn off buffer sharing for EC that don't allow prefetch
-        // All non-GPEs can share buffer B
-        if (!ec_allows_pba_prefetch_enable)
-        {
-            ps.fields.buf_alloc_a = 0;
-            ps.fields.buf_alloc_c = 0;
-        }
-
-        l_rc = data.setDoubleWord(0, ps.value);
-        if (l_rc)
-        {
-           FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc);   
-           rc.setEcmdError(l_rc); 
-           break;
-        } // end if
-
-        rc = fapiPutScom(i_target, PBA_SLVCTL3_0x00064007 , data);
-        if (rc)
-        {
-           FAPI_ERR("fapiPutScom( PBA_SLVCTL3_0x00064007 ) failed. With rc = 0x%x", (uint32_t)rc); 
-           break;
-        }
-    } while(0);
-
-    return rc;
-}  // end pba_slave_setup_init
-
-
-
-// ************************************************************************************************
-// **************************************************** pba_slave_reset ***************************
-// Walk each slave to hit the respective reset and then poll for completion
-fapi::ReturnCode
-pba_slave_reset(const Target& i_target)
-{
-    fapi::ReturnCode    rc;
-    ecmdDataBufferBase  data(64);
-    bool                poll_failure = false;
-    uint32_t            p;
-    
-    uint8_t             ec_has_pba_slvrest_bug = 0;
-    uint8_t             attr_mpipl = 0;
-
-    do
-    {
-        rc = FAPI_ATTR_GET(ATTR_CHIP_EC_FEATURE_HW_BUG_PBASLVRESET,
-                                   &i_target,
-                                   ec_has_pba_slvrest_bug);
-        if(rc)
-        {
-     	    FAPI_ERR("Error querying Chip EC feature: "
-                     "ATTR_CHIP_EC_FEATURE_HW_BUG_PBASLVRESET");
-            break;
-        }
-        
-        rc = FAPI_ATTR_GET(ATTR_IS_MPIPL, NULL, attr_mpipl);
-        if(rc)
-        {
-     	    FAPI_ERR("Error querying attribute ATTR_IS_MPIPL");
-            break;
-        }
-
-        for (int s=0; s<= 3; s++)
-        {
-
-            // Skip Slave 2 has this is handled in p8_set_pore_bars.C as part
-            // of the SLW setup
-            if (s == 2)
-            {
-                continue;
-            }
-
-            FAPI_INF("Reseting PBA Slave %x", s);
-            poll_failure = true;
-            for (p=0; p<MAX_PBA_RESET_POLLS; p++)
-            {
-
-                // Set the reset for the selected slave
-                data.setDoubleWord(0, PBA_SLVRESETs[s]);
-
-                rc = fapiPutScom(i_target, PBA_SLVRST_0x00064001 , data);
-                if (rc)
-                {
-                     FAPI_ERR("fapiPutScom( PBA_SLVRST_0x00064001 ) failed. With rc = 0x%x", (uint32_t)rc);
-                     break ;
-                }
-                
-                // Due to HW228485, skip the check of the in-progress bits for MPIPL 
-                // (after the PBA channels have been used at runtime) as they
-                // are unreliable in Murano 1.x.
-                if (attr_mpipl && ec_has_pba_slvrest_bug)
-                {
-                   FAPI_INF("PBA Reset Polling being skipped due to MPIPL on a chip with PBA reset bug");
-                   poll_failure = false;
-                   continue;
-                }
-                
-                // Read the reset register to check for reset completion
-                rc = fapiGetScom(i_target, PBA_SLVRST_0x00064001 , data);
-                if (rc)
-                {
-                     FAPI_ERR("fapiGetPutScom( PBA_SLVRST_0x00064001 ) failed. With rc = 0x%x", (uint32_t)rc);
-                     break;
-                }
-                FAPI_DBG("Slave %x reset poll data = 0x%016llX", s, data.getDoubleWord(0));
-
-                // If slave reset in progress, wait and then poll
-                if (data.isBitClear(4+s))
-                {
-                    FAPI_INF("PBA Reset complete for Slave %d", s);
-                    poll_failure = false;
-                    break;
-                }
-                else
-                {
-                    rc = fapiDelay(PBA_RESET_POLL_DELAY*1000, 200000);   // In microseconds
-                    if (rc)
-                    {
-                         FAPI_ERR("fapiDelay failed. With rc = 0x%x", (uint32_t)rc);
-                         break;
-                    }
-                }
-            }
-
-            // Error exit from above loop
-            if (!rc.ok())
-            {
-                 break;
-            }
-
-            if (poll_failure)
-            {
-                 FAPI_ERR("PBA Slave Reset Timout");
-                 const fapi::Target & CHIP = i_target;
-                 const uint64_t& POLLCOUNT = (uint64_t)p;
-                 const uint64_t& SLAVENUM  = (uint64_t)s;
-                 const uint64_t& PBASLVREG = data.getDoubleWord(0);
-                 FAPI_SET_HWP_ERROR(rc, RC_PMPROC_PBA_SLAVE_RESET_TIMEOUT);
-                 break;
-            }
-
-            // Check if the slave is still actually busy.  Consider whether this should be polled
-            if (data.isBitSet(8+s))
-            {
-                FAPI_ERR("Slave %x still busy after reset", s);
-                const fapi::Target & CHIP = i_target;
-                const uint64_t& POLLCOUNT = (uint64_t)p;
-                const uint64_t& SLAVENUM  = (uint64_t)s;
-                const uint64_t& PBASLVREG = data.getDoubleWord(0);
-                FAPI_SET_HWP_ERROR(rc, RC_PMPROC_PBA_SLAVE_BUSY_AFTER_RESET);
-                break;
-            }
-        }
-    } while(0);
-
-    return rc;
-
-}  // end pba_slave_setup_reset
-
-// ************************************************************************************************
-// **************************************************** pba_bc_stop *******************************
-// Stop the BCDE and BCUE and then poll for respective completion
-fapi::ReturnCode
-pba_bc_stop(const Target& i_target)
-{
-    fapi::ReturnCode    rc;
-    uint32_t            e_rc = 0;
-    ecmdDataBufferBase  data(64);
-    uint64_t            address = 0;
-    bool                bcde_stop_complete = false;
-    bool                bcue_stop_complete = false;
-    uint32_t            p;
-    
-    
-    do
-    {
-       
-        FAPI_INF("Stop the  BCDE and BCUE");
-        address = PBA_BCDE_CTL_0x00064010;
-
-        e_rc |= data.flushTo0();
-        e_rc |= data.setBit(0);      // Bit 0: BCDE_CTL_STOP
-        if (e_rc)
-        {
-            rc.setEcmdError(e_rc);
-            break;
-        }
-        FAPI_INF("\tStopping BCDE addr=0x%08llX, value=0x%16llX, Target = %s",
-                            address,
-                            data.getDoubleWord(0),
-                            i_target.toEcmdString());
-        rc = fapiPutScom(i_target, address, data);
-        if (!rc.ok())
-        {
-            FAPI_ERR("fapiPutScom(addr=0x%08llX) failed, Target = %s",
-                            address,
-                            i_target.toEcmdString());
-            break;
-        }
-
-        address = PBA_BCUE_CTL_0x00064015;
-
-        e_rc |= data.flushTo0();
-        e_rc |= data.setBit(0);      // Bit 0: BCUE_CTL_STOP
-        if (e_rc)
-        {
-            rc.setEcmdError(e_rc);
-             break;
-        }
-        FAPI_INF("\tStopping BCUE addr=0x%08llX, value=0x%16llX, Target = %s",
-                            address,
-                            data.getDoubleWord(0),
-                            i_target.toEcmdString());
-        rc = fapiPutScom(i_target, address, data);
-        if (!rc.ok())
-        {
-            FAPI_ERR("fapiPutScom(addr=0x%08llX) failed, Target = %s",
-                            address,
-                            i_target.toEcmdString());
-            break;
-        }
-        
-        // Stopped for the BC engines is defined as the Running bit is clear
-        //
-        // The Stopped, Done and Error bits may also be on if the BCE happened
-        // stop before the requested transfer was complete.  However, done of 
-        // these indicators are relevent as the OCC is being reset anyway.
-                
-        for (p=0; p<MAX_PBA_BC_STOP_POLLS; p++)
-        {
-        
-               
-            // Read the BCDE Status register to check for a stopped condition          
-            rc = fapiGetScom(i_target, PBA_BCDE_STAT_0x00064012 , data);
-            if (rc)
-            {
-                 FAPI_ERR("fapiGetPutScom( PBA_BCDE_STAT_0x00064012 ) failed. With rc = 0x%x", (uint32_t)rc);
-                 break;
-            }
-            FAPI_DBG("BCDE Status poll data = 0x%016llX", data.getDoubleWord(0));
-            
-           
-            if (data.isBitClear(PBA_BC_STAT_RUNNING))
-            {
-                FAPI_INF("BCDE Running Bit is clear to indicate the stop condition");
-                bcde_stop_complete = true;
-            }
-            
-            
-            // Read the BCUE Status register to check for stop condition
-            rc = fapiGetScom(i_target, PBA_BCUE_STAT_0x00064017 , data);
-            if (rc)
-            {
-                 FAPI_ERR("fapiGetPutScom( PBA_BCUE_STAT_0x00064017 ) failed. With rc = 0x%x", (uint32_t)rc);
-                 break;
-            }
-            FAPI_DBG("BCUE Status poll data = 0x%016llX", data.getDoubleWord(0));
-            
-            if (data.isBitClear(PBA_BC_STAT_RUNNING))
-            {
-                FAPI_INF("BCUE Running Bit is clear to indicate the stop condition");
-                bcue_stop_complete = true;
-            }                        
-                                    
-            // If both engines are stopped , exit polling loop 
-            if (bcde_stop_complete && bcue_stop_complete)
-            {                
-                break;         
-            }                   
-            else
-            {                
-                rc = fapiDelay(MAX_PBA_BC_STOP_POLLS*1000, 2000000);   // In microseconds
-                if (rc)
-                {
-                     FAPI_ERR("fapiDelay failed. With rc = 0x%x", (uint32_t)rc);
-                     break;
-                }
-            }
-        } // polling loop
-
-        // Error exit from above loop
-        if (!rc.ok())
-        {
-             break;
-        }
-
-        if (!bcde_stop_complete)
-        {
-             FAPI_ERR("PBA BCDE Stop Timout");
-             const fapi::Target & CHIP = i_target;
-             const uint32_t     & POLLCOUNT = MAX_PBA_BC_STOP_POLLS;
-             const uint32_t     & POLLVALUE = MAX_PBA_BC_STOP_POLLS;
-	         FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PBA_BCDE_STOP_TIMEOUT);
-             break;
-        }
-        if (!bcue_stop_complete)
-        {
-             FAPI_ERR("PBA BCDE Stop Timout");
-             const fapi::Target & CHIP = i_target;
-             const uint32_t     & POLLCOUNT = MAX_PBA_BC_STOP_POLLS;
-             const uint32_t     & POLLVALUE = MAX_PBA_BC_STOP_POLLS;
-	         FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PBA_BCUE_STOP_TIMEOUT);
-             break;
-        }
-        
-        FAPI_INF("Clear the  BCDE and BCUE stop bits via control register clearing");
-        
-        e_rc |= data.flushTo0();
-        if (e_rc)
-        {
-            rc.setEcmdError(e_rc);
-            break;
-        }
-        
-        address = PBA_BCDE_CTL_0x00064010;
-        FAPI_INF("\tClear BCDE stop bit addr=0x%08llX, value=0x%16llX, Target = %s",
-                            address,
-                            data.getDoubleWord(0),
-                            i_target.toEcmdString());
-        rc = fapiPutScom(i_target, address, data);
-        if (!rc.ok())
-        {
-            FAPI_ERR("fapiPutScom(addr=0x%08llX) failed, Target = %s",
-                            address,
-                            i_target.toEcmdString());
-            break;
-        }
-
-        address = PBA_BCUE_CTL_0x00064015;        
-        FAPI_INF("\tClear BCUE stop bit addr=0x%08llX, value=0x%16llX, Target = %s",
-                            address,
-                            data.getDoubleWord(0),
-                            i_target.toEcmdString());
-        rc = fapiPutScom(i_target, address, data);
-        if (!rc.ok())
-        {
-            FAPI_ERR("fapiPutScom(addr=0x%08llX) failed, Target = %s",
-                            address,
-                            i_target.toEcmdString());
-            break;
-        }
-                
-    } while(0);
-
-    return rc;
-
-}  // end pba_bcde_stop
-
-
-
-} //end extern C
-
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pcbs_init.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pcbs_init.C
deleted file mode 100644
index 47b1ebbbd..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pcbs_init.C
+++ /dev/null
@@ -1,1670 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pcbs_init.C $          */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pcbs_init.C,v 1.31 2015/05/13 03:47:51 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pcbs_init.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Ralf Maier         Email: ralf.maier@de.ibm.com
-// *!
-// *! General Description:
-// *!
-// *!   The purpose of this procedure is to establish the safe setting for PCBSLV
-// *!   o set psafe value
-// *!   o set PMIN clip/Pmax clip
-// *!   o PMCR default values
-// *!   o PMICR default values
-// *!
-// *!
-// *! Procedure Prereq:
-// *!   o System clocks are running
-// *|
-// *| buildfapiprcd -e "../../xml/error_info/p8_pcbs_init_errors.xml" -C p8_pm_utils.C p8_pcbs_init.C
-// *!
-//------------------------------------------------------------------------------
-/// \file p8_pcbs_init.C
-/// \brief Establish the Pstate 0 frequency from VPD
-///
-/// \verbatim
-/// High-level procedure flow:
-///
-///  Procedure Prereq:
-///  - completed istep procedure
-///  - completed multicast setup
-///
-///
-/// if PM_CONFIG {
-///    PState translation
-///          convert_safe_freq()
-///    Resonant Clocking settings (band definitions from frequency to Pstate)
-///          convert_resclk_freqs_to_pstates()
-///    PFET Sequencing Delays
-///          convert_pfet_delays()
-///
-/// else if PM_INIT {
-///
-///   set CPM_FILTER_ENABLE = 0                                   -- #110f0152, DPLL_CPM_PARM_REG[10] = 0
-///                                                               -- PMGP1_REG   WOX_OR 150f0105
-///
-///   set PMCR[0:39]  = 0                                        --  PMCR default value adjustment
-///                                                              -- (Hardware flush 0 -> restore to 0 for reset case)
-///                                                              -- #110f0159, PCBS_POWER_MANAGEMENT_CONTROL_REG
-///
-///               pm_spr_override_en must be set to write this reg!!
-///   set PMICR[0:47]  = 0                                       --  PMICR default value adjustment
-///                                                              -- (Hardware flush 0 -> restore to TBD for reset case)
-///                                                              -- #110f0158, PCBS_POWER_MANAGEMENT_IDLE_CONTROL_REG
-///
-///
-///
-/// } else if PM_RESET {
-///
-///   loop over all valid chiplets {
-///
-///       -- TODO check about
-///       -- initialize all pm_reg with scan-zero values upfront
-///
-///       //  Force safe mode
-///       set force_safe_mode = 1                                 -- Force safe mode (uses Psafe Pstate setting)
-///                                                               -- XXXX multicast PCBS_PM_PMGP1_REG_1[12] = 1///
-///       //  psafe Pstate achived AND FSM-stable ?
-///       if psafePstate achived AND FSM-stable {                 -- Check PCBS-PM state/status that Psafe (Pstate) as been achieved and
-///                                                               -- that FSM are in a stable state
-///                                                               -- PCBS_POWER_MANAGEMENT_STATUS_REG[33] safe_mode_active
-///                                                               -- PCBS_POWER_MANAGEMENT_STATUS_REG[36] all_fsms_in_safe_state
-///       } elsif timeout {
-///         --BAD RC: timeout - no PsafePstate or FSMs not stable
-///       }
-///
-///       //  DPLL settings
-///       set dpll_freq_override_enable = 1                       -- PCBS_PM_PMGP1_REG_1[10] = 1
-///                                                               -- only in override mode is a write to FREQ_CTRL_REG possible
-///
-///       set minPstate = min(Psafe,global actual pstate)         -- PCBS_OCC_Heartbeat_Reg[17..24]  Psafe
-///                                                               -- PCBS_POWER_MANAGEMENT_STATUS_REG[0..7] global actual pstate
-///       set dpll_min = fnom + minPstate(signed)                 -- FREQ_CTRL_REG[20..27]  pstate_dpll_fnom
-///
-///
-///       set dpll_fmin                                           -- FREQ_CTRL_REG[0..7]   scaninit: 00110010
-///       set dpll_fmax                                           -- FREQ_CTRL_REG[8..15]  scaninit: 00110010
-///
-///       set pm_spr_override_en = 1                              -- Force OCC SPR Mode
-///                                                               -- XXXX multicast PCBS_PM_PMGP1_REG_1[11] = 1
-///
-///       set enable_Pstate_mode = 0                              -- PCBSPM_MODE_REG[0] ....multicast
-///
-///       set enable_global_pstate_req = 0                        -- Force *global_en PState to off  to cease interrupts to PMC....multicast
-///                                                               -- PCBSPM_MODE_REG[2]
-///
-///                                                               -- Reset Pmin and Pmax to wide open...multicast
-///       set Pmin_clip   =  -128                                 -- PCBS_Power_Management_Bounds_Reg[0..7]  0b10000000
-///       set Pmax_clip   =   127                                 -- PCBS_Power_Management_Bounds_Reg[8..15] 0b01111111
-///
-///
-///       //  Settings
-///       set resclk_dis = 1                                      -- Chiplets resonant clocking (via PCBS) disabled
-///                                                                  -- EH.TPCHIP.NET.PCBSLPREV.GP3_REG[22]
-///                                                               -- This is only ROX PCBS_Resonant_Clock_Control_Reg0[0]
-///
-///       set occ_heartbeat_enable = 0                            -- OCC Heartbeat disable
-///                                                               -- PCBS_OCC_Heartbeat_Reg[8]
-///
-///       //  IVRM Setup
-///       get the mrwb `ibute ivrms_enabled                    -- If '0' Salerno, if '1' Venice
-///       if ivrms_enabled {
-///           set ivrm_fsm_enable = 0                             -- PCBS_iVRM_Control_Status_Reg[0]
-///                                                               -- ivrm_fsm_enable have be '0' to enable bypass_b writes
-///           set bypass_b mode = 0
-///                                    --ivrm_core_vdd_bypass_b   -- PCBS_iVRM_Control_Status_Reg[4]
-///                                    --ivrm_core_vcs_bypass_b   -- PCBS_iVRM_Control_Status_Reg[6]
-///                                    --ivrm_eco_vdd_bypass_b    -- PCBS_iVRM_Control_Status_Reg[8]
-///                                    --ivrm_eco_vcs_bypass_b    -- PCBS_iVRM_Control_Status_Reg[10]
-///       }
-///
-///                                                               -- Undervolting values reset
-///       set Kuv = 0                                             -- PCBS_UNDERVOLTING_REG[16..21]
-///                                                               -- Puv_min and Puv_max  to disable
-///       set Puv_min = -128                                      -- PCBS_UNDERVOLTING_REG[0..7]
-///       set Puv_max = -128                                      -- PCBS_UNDERVOLTING_REG[8..15]
-///
-///       set enable_LPFT_function = 0                            -- Local Pstate Frequency Target mechanism disabled
-///                                                               -- PCBS_Local_Pstate_Frequency_Target_Control_Register[20]
-///
-///       //  Issue reset to PCBS-PM
-///       set endp_reset_pm_only  = 1                             -- Issue reset to PCBS-PM
-///                                                               -- PMGP1_REG[9]
-///      -- unset off reset in the next cycle??
-///       set endp_reset_pm_only  = 0                             -- PMGP1_REG[9]
-///
-///   ] --end loop over all valid chiplets
-///
-///   }   //end PM_RESET -mode
-///
-///
-///  \endverbatim
-
-/// HostBoot_IPL_Flow_v93_occ.odt
-
-/// RESET
-///
-///-Force safe mode (uses Psafe Pstate setting) in EX chiplet (multicastable) (for safety) (with removal of MIN functions (design change))
-///-Check PCBS-PM state/status that Psafe (Pstate) as been achieved and that FSM are in a stable state.
-///   -If  timeout, indicate that restart of OCC is to not occur (means are TBD)
-///   -Write DPLL Frequ Control Reg with the frequency (not PState!) that represents  the minimum of Psafe or Global Actual as seen in the PCBS.
-///-Chiplets forced (via PCBS) into DPLL Override / PState disabled mode (whatever the above PState turned out to be)
-///-The frequency value determined by Psafe/Vsafe is locked from changes by the PState mechanism.  This allows the PCBS to be re-initialized.
-///-Force OCC SPR Mode  in EX chiplet (multicastable)
-///-Force *global_en PState to off  to cease interrupts to PMC (Global, AutoOverride, Idle)  in EX chiplet (multicable)
-///-Reset Pmin and Pmax to "wide open in EX chiplet (multicastable)
-///-Chiplets resonant clocking (via PCBS) disabled
-///-This allows the PCBS to be re-initialized blindly
-///-It is debatable whether this is necessary as resonant clock can continue to operate while the OCC reset is being performed and while the chiplet is running at Psafe).
-///-OCC Heartbeat disable
-///-Will be enabled by OCCFW (not FAPI)
-///-If Venice,  Chiplet IVRMs put into bypass mode and then disabled
-///-This allows the initfiles and procedures to reload the Local PState and VDS Tables
-///-Undervolting values reset:  Kuv to 0; Puv_min and Puv_max each set to -128 each (to disable)
-///-Local Pstate Frequency Target mechanism disabled
-///-OCCFW will enable it
-///-Issue reset to PCBS-PM (dial endp_reset_pm_only)
-///-DPLL Frequ Control Reg is NOT reset
-///-(Scan only value would be (tentative) 1GHz)
-///
-///
-/// CONFIG
-///
-///  PState translation
-///       convert_safe_freq() - With ATTR_PM_SAFE_FREQUENCY (binary in MHz)
-///          and ATTR_PM_PSTATE0_FREQUENCY (binary in Mhz) produce ATTR_PM_SAFE_PSTATE
-///  Resonant Clocking settings (band definitions from frequency to Pstate)
-///      convert_resclk_freqs_to_pstates() - Convert the following frequency
-///      platform attributes (binary in MHz) to feature Pstate attributes.
-///      The conversion uses ATTR_PM_PSTATE0_FREQUENCY.
-///             Input platform attributes
-///             ATTR_PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY
-///             ATTR_PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY
-///             ATTR_PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY
-///             ATTR_PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY
-///             ATTR_PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY
-///             output feature attributes
-///             ATTR_PM_RESONANT_CLOCK_FULL_CSB_PSTATE
-///             ATTR_PM_RESONANT_CLOCK_LFRLOW_PSTATE
-///             ATTR_PM_RESONANT_CLOCK_LFRUPPER_PSTATE
-///             ATTR_PM_RESONANT_CLOCK_HFRLOW_PSTATE
-///             ATTR_PM_RESONANT_CLOCK_HFRHIGH_PSTATE
-///  PFET Sequencing Delays
-///         convert_pfet_delays() - Convert the following delays from platform
-///         attributes (binary in nanoseconds) to PFET delay value feature attributes.
-///         The conversion uses ATTR_PROC_NEST_FREQUENCY.
-///             Input platform attributes
-///             ATTR_PM_PFET_POWERUP_CORE_DELAY0
-///             ATTR_PM_PFET_POWERUP_CORE_DELAY1
-///             ATTR_PM_PFET_POWERUP_ECO_DELAY0
-///             ATTR_PM_PFET_POWERUP_ECO_DELAY1
-///             ATTR_PM_PFET_POWERDOWN_CORE_DELAY0
-///             ATTR_PM_PFET_POWERDOWN_CORE_DELAY1
-///             ATTR_PM_PFET_POWERDOWN_ECO_DELAY0
-///             ATTR_PM_PFET_POWERDOWN_ECO_DELAY1
-///             output feature attributes
-///             ATTR_PM_PFET_POWERUP_CORE_DELAY0_VALUE
-///             ATTR_PM_PFET_POWERUP_CORE_DELAY1_VALUE
-///             ATTR_PM_PFET_POWERUP_CORE_SEQUENCE_DELAY_SELECT
-///             ATTR_PM_PFET_POWERUP_ECO_DELAY0_VALUE
-///             ATTR_PM_PFET_POWERUP_ECO_DELAY1_VALUE
-///             ATTR_PM_PFET_POWERUP_ECO_SEQUENCE_DELAY_SELECT
-///             ATTR_PM_PFET_POWERDOWN_CORE_DELAY0_VALUE
-///             ATTR_PM_PFET_POWERDOWN_CORE_DELAY1_VALUE
-///             ATTR_PM_PFET_POWERDOWN_CORE_SEQUENCE_DELAY_SELECT
-///             ATTR_PM_PFET_POWERDOWN_ECO_DELAY0_VALUE
-///             ATTR_PM_PFET_POWERDOWN_ECO_DELAY1_VALUE
-///             ATTR_PM_PFET_POWERDOWN_ECO_SEQUENCE_DELAY_SELECT
-/// INIT
-///
-/// -Resets DPLL_CPM_PARM_REG.cpm_filter_enable
-///     -For reset case, disable all "global_en" bits in PMCR and PMICR;  this
-///         keeps Global Pstate Request from occuring to the PMC until it has
-///         been initialized.  OCCFW to be do this.
-/// - PMICR default value adjustment (Hardware flush 0 -> restore to TBD for reset )
-///     -How does policy influence the PMICR Pstate values?
-///     -Base:  run at the turbo value fixed
-///     -Enhancement:  run at the highest Pstate value on the chip. (needs power
-///         projection to judge worth).
-///     -latency enable
-///     -Not planned at this time.
-/// OLD-DOC - Sleep / Winkle -> Fast / Deep configuration
-/// OLD-DOC - Restore to Deep Sleep and Deep Winkle upon reset
-/// OLD-DOC - PMCR default value adjustment (Hardware flush 0 -> restore to 0 for
-///     reset case) SCAN0
-/// OLD-DOC     -For reset case, disable all “global_en” bits in PMCR and PMICR;
-///                 this keeps Global Pstate Request from occuring to the PMC until
-///                 it has been initialized.  OCCFW to be do this
-/// OLD-DOC - PMICR default value adjustment (Hardware flush 0 -> restore to 0 for
-///                 reset ) SCAN0
-
-
-
-/// \todo add to required proc ENUM requests
-///
-
-// -----------------------------------------------------------------------------
-// Includes
-// -----------------------------------------------------------------------------
-#include "p8_pm.H"
-#include "p8_pm_utils.H"
-#include "p8_pcbs_init.H"
-
-
-
-extern "C" {
-
-using namespace fapi;
-
-// -----------------------------------------------------------------------------
-// Constant definitions
-// -----------------------------------------------------------------------------
-
-// Macros to enhance readability yet provide for error handling
-// Assume the error path is to break out of the current loop.
-//
-// Set Double Word Scan0
-#define SETDWSCAN0(_mi_target, _mi_address, _mi_buffer, _mi_reset_value){   \
-    e_rc = data.setDoubleWord(0, _mi_reset_value);                          \
-    if(e_rc)                                                                \
-    {                                                                       \
-        FAPI_ERR("Set DoubleWord failed. With rc = 0x%x", (uint32_t)e_rc);  \
-        rc.setEcmdError(e_rc);                                              \
-        break;                                                              \
-    }                                                                       \
-    FAPI_DBG("Scan0 equivalent reset of 0x%08llx to 0x%16llX",              \
-                 _mi_address, _mi_reset_value);                             \
-    rc = fapiPutScom(_mi_target, _mi_address, _mi_buffer);                  \
-    if(!rc.ok())                                                            \
-    {                                                                       \
-        FAPI_ERR("PutScom error to address 0x%08llx", _mi_address);         \
-        break;                                                              \
-    }                                                                       \
-}
-
-// Set Word Scan0
-#define SETSCAN0(_mi_target, _mi_address, _mi_buffer, _mi_reset_value){     \
-    e_rc = data.setWord(0, _mi_reset_value);                                \
-    if(e_rc)                                                                \
-    {                                                                       \
-        FAPI_ERR("Set Word failed. With rc = 0x%x", (uint32_t)e_rc);        \
-        rc.setEcmdError(e_rc);                                              \
-        break;                                                              \
-    }                                                                       \
-    FAPI_DBG("Scan0 equivalent reset of 0x%08llx to 0x%08X",                \
-                 _mi_address, _mi_reset_value);                             \
-    rc = fapiPutScom(_mi_target, _mi_address, _mi_buffer);                  \
-    if(!rc.ok())                                                            \
-    {                                                                       \
-        FAPI_ERR("PutScom error to address 0x%08llx", _mi_address);         \
-        break;                                                              \
-    }                                                                       \
-}
-
-// PCBS EX address
-#define EXADDR(_mi_address, _mi_ex){                                        \
-     _mi_address + (_mi_ex * 0x01000000)                                    \
-}
-
-
-//------------------------------------------------------------------------------
-//Start scan zero value
-//------------------------------------------------------------------------------
-
-CONST_UINT64_T( PMGP0_REG_0x100F0100_scan0                              ,  ULL(0x8030010C21000000) );
-CONST_UINT64_T( PMGP1_REG_0x100F0103_scan0                              ,  ULL(0x6C00000000000000) );
-CONST_UINT64_T( EX_PFVddCntlStat_REG_0x100F0106_scan0                   ,  ULL(0x0A00000000000000) );
-CONST_UINT64_T( EX_PFVcsCntlStat_REG_0x100F010E_scan0                   ,  ULL(0xFFF0FFF080800000) );     //1000 0000 1000 000
-CONST_UINT64_T( EX_PMErrMask_REG_0x100F010A_scan0                       ,  ULL(0xFFFFFFFFFFE00000));
-CONST_UINT64_T( EX_PMSpcWkupFSP_REG_0x100F010B_scan0                    ,  ULL(0x00000000));
-CONST_UINT64_T( EX_PMSpcWkupOCC_REG_0x100F010C_scan0                    ,  ULL(0x00000000));    // This is different than the hardware
-CONST_UINT64_T( EX_PMSpcWkupPHYP_REG_0x100F010D_scan0                   ,  ULL(0x00000000));
-CONST_UINT64_T( EX_CorePFPUDly_REG_0x100F012C_scan0                     ,  ULL(0x00000000));
-CONST_UINT64_T( EX_CorePFPDDly_REG_0x100F012D_scan0                     ,  ULL(0x00000000));
-CONST_UINT64_T( EX_CorePFVRET_REG_0x100F0130_scan0                      ,  ULL(0x00000000));
-CONST_UINT64_T( EX_ECOPFPUDly_REG_0x100F014C_scan0                      ,  ULL(0x00000000));
-CONST_UINT64_T( EX_ECOPFPDDly_REG_0x100F014D_scan0                      ,  ULL(0x00000000));
-CONST_UINT64_T( EX_ECOPFVRET_REG_0x100F0150_scan0                       ,  ULL(0x00000000));
-CONST_UINT64_T( EX_FREQCNTL_0x100F0151_scan0                            ,  ULL(0x32320000));   // "0011 0010 0011 0010 000000000000" ;
-CONST_UINT64_T( EX_DPLL_CPM_PARM_REG_0x100F0152_scan0                   ,  ULL(0x00004000));   // 64us for DPLL Lock replacement
-CONST_UINT64_T( EX_PCBS_iVRM_Control_Status_Reg_0x100F0154_scan0        ,  ULL(0x00000000));
-CONST_UINT64_T( EX_PCBS_iVRM_Value_Setting_Reg_0x100F0155_scan0         ,  ULL(0x00000000));
-CONST_UINT64_T( EX_PCBSPM_MODE_REG_0x100F0156_scan0                     ,  ULL(0x01000000));    //"0000 0001 0000 0000 00" ;
-CONST_UINT64_T( EX_PCBS_Power_Management_Control_Reg_0x100F0159_scan0   ,  ULL(0x00000000)) ;
-CONST_UINT64_T( EX_PCBS_PMC_VF_CTRL_REG_0x100F015A_scan0                ,  ULL(0x00000000));
-CONST_UINT64_T( EX_PCBS_UNDERVOLTING_REG_0x100F015B_scan0               ,  ULL(0x00000000));
-CONST_UINT64_T( EX_PCBS_Pstate_Index_Bound_Reg_0x100F015C_scan0         ,  ULL(0x00000000));
-CONST_UINT64_T( EX_PCBS_Power_Management_Bounds_Reg_0x100F015D_scan0    ,  ULL(0x807F0000));
-CONST_UINT64_T( EX_PCBS_PSTATE_TABLE_CTRL_REG_0x100F015E_scan0          ,  ULL(0x00000000)) ;
-CONST_UINT64_T( EX_PCBS_Pstate_Step_Target_Register_0x100F0160_scan0    ,  ULL(0x00000000)) ;
-CONST_UINT64_T( EX_PCBS_iVRM_VID_Control_Reg0_0x100F0162_scan0          ,  ULL(0x00000000));
-CONST_UINT64_T( EX_PCBS_iVRM_VID_Control_Reg1_0x100F0163_scan0          ,  ULL(0x00000000));
-CONST_UINT64_T( EX_PCBS_OCC_Heartbeat_Reg_0x100F0164_scan0              ,  ULL(0x00000000));
-CONST_UINT64_T( EX_PCBS_Resonant_Clock_Control_Reg0_0x100F0165_scan0    ,  ULL(0x4000000000000000)) ; //"0100 00000000000000000000000000000000000000" ;
-CONST_UINT64_T( EX_PCBS_Resonant_Clock_Control_Reg1_0x100F0166_scan0    ,  ULL(0x00000000));
-CONST_UINT64_T( EX_PCBS_Local_Pstate_Frequency_Target_Control_Register_0x100F0168_scan0 , ULL(0x00000000));
-
-    // End scan zero value
-
-
-// ----------------------------------------------------------------------
-// Global variables
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Function prototypes
-// ----------------------------------------------------------------------
-
-// Reset function
-fapi::ReturnCode
-pcbs_reset  (  const fapi::Target& i_target,
-               struct_pcbs_val_init_type& pcbs_val_init);
-// Config function
-fapi::ReturnCode
-pcbs_config (  const fapi::Target&  i_target);
-
-// Init function
-fapi::ReturnCode
-pcbs_init  (  const fapi::Target& i_target);
-
-// SCAN0 function
-fapi::ReturnCode
-pcbs_scan0(const Target &i_target, uint8_t i_ex_number);
-
-// ----------------------------------------------------------------------
-// Function definitions
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-/**
- * p8_pcbs_init calls the underlying routine based on mode parameter
- *
- * @param[in] i_target Chip target
- * @param[in] mode     Control mode for the procedure
- *                     PM_INIT, PM_CONFIG, PM_RESET
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-p8_pcbs_init( const Target& i_target, uint32_t i_mode)
-{
-    fapi::ReturnCode rc;
-
-    //Declare parms struct
-    struct_pcbs_val_init_type  pcbs_val_init;
-
-    FAPI_INF("Executing p8_pcbs_init in mode %x", i_mode);
-
-    do
-    {
-        uint8_t ipl_mode = 0;
-        rc = FAPI_ATTR_GET(ATTR_IS_MPIPL, NULL, ipl_mode);
-        if (!rc.ok())
-        {
-            FAPI_ERR("fapiGetAttribute of ATTR_IS_MPIPL rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-        
-        FAPI_INF("IPL mode = %s", ipl_mode ? "MPIPL" : "NORMAL");
-
-        if ( i_mode == PM_CONFIG )
-        {
-            rc=pcbs_config(i_target);
-            if (rc)
-            {
-              FAPI_ERR("pcbs_config failed. With rc = 0x%x", (uint32_t)rc);
-              break;
-            }
-
-        }
-        else if ( i_mode == PM_INIT )
-        {
-
-            rc=pcbs_init(i_target);
-            if (rc)
-            {
-              FAPI_ERR("pcbs_init failed. With rc = 0x%x", (uint32_t)rc);
-              break;
-            }
-        }
-        else if ( i_mode == PM_RESET )
-        {
-            // ----------------------------------------------------------------------
-            // Assign default values
-            // ----------------------------------------------------------------------
-            // These are only needed to put the hardware back to a known state from
-            // which the OCC can start again in enabling Pstates
-
-            pcbs_val_init.MAX_PSAFE_FSM_LOOPS  =   20; // PMSR poll attempts
-            pcbs_val_init.MAX_DELAY =   1000000;       // in ns; 1ms
-            pcbs_val_init.MAX_SIM_CYCLES =   1000;
-            pcbs_val_init.GLOBAL_ACTUAL_PSTATE = -128; // Global Actual PSTATE
-            pcbs_val_init.MIN_PSTATE = -128 ;          // Default
-            pcbs_val_init.FNOM = 128;                  // Default
-            pcbs_val_init.DPLL_FMIN = 50;              // \WHAT?
-            pcbs_val_init.DPLL_FMAX = 50;              // \WHAT?
-            pcbs_val_init.PMIN_CLIP = -128 ;           // Default
-            pcbs_val_init.PMAX_CLIP =  127 ;           // Default
-            pcbs_val_init.KUV = 0;                     // Default
-            pcbs_val_init.ivrms_enabled = 1 ;
-
-            rc = pcbs_reset( i_target, pcbs_val_init);
-            if (rc)
-            {
-                FAPI_ERR("p8_pcbs_init_reset failed. With rc = 0x%x", (uint32_t)rc);
-                break;
-            }
-        }
-        else
-        {
-            FAPI_ERR("Unknown mode passed to p8_pcbs_init. Mode %x ....", i_mode);
-            const uint64_t& MODE = (uint32_t)i_mode;
-            FAPI_SET_HWP_ERROR(rc, RC_PROC_PCBS_CODE_BAD_MODE);
-        }
-    } while(0);
-    FAPI_INF("Exiting p8_pcbs_init ...");
-
-    return rc;
-
-}
-
-
-//------------------------------------------------------------------------------
-/**
- * Transform Platform Attribute for  PCBS to Feature Attributes
- *
- * @param[in] i_target Chip target
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-pcbs_config(const Target& i_target)
-{
-  fapi::ReturnCode rc;
-
-  /// Function moved in p8_pfet_int.C
-  /// FAPI_DBG("*************************************");
-  /// FAPI_INF("pcbs_config beginning ...");
-  /// FAPI_DBG("*************************************");
-  ///
-
-  return rc;
-
-} //end CONFIG
-
-//------------------------------------------------------------------------------
-/**
- * Initialize the PCBS-PM macro for all functional and enabled EX chiplets
- *
- * @param[in] i_target Chip target
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-pcbs_init(const Target& i_target)
-{
-    fapi::ReturnCode                rc;
-    uint32_t                        e_rc;              // eCmd returncode
-
-    ecmdDataBufferBase              data(64);
-
-    // Variables
-    std::vector<fapi::Target>       l_exChiplets;
-    uint8_t                         l_ex_number = 0;
-    uint64_t                        address;
-    uint64_t                        ex_offset;
-    
-    // detect PCBS Error Reset capaiblity
-    uint8_t                         chipHasPcbsErrReset = 0;
-    
-
-    FAPI_INF("pcbs_init beginning for target %s ...", i_target.toEcmdString());
-
-    do
-    {
-        rc = fapiGetChildChiplets(i_target,
-                                    fapi::TARGET_TYPE_EX_CHIPLET,
-                                    l_exChiplets,
-                                    TARGET_STATE_FUNCTIONAL);
-        if (rc)
-        {
-            FAPI_ERR("fapiGetChildChiplets with rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        FAPI_DBG("chiplet vector size => %u", l_exChiplets.size());
-
-        // For each chiplet in the functional list
-        for (uint8_t c=0; c< l_exChiplets.size(); c++)
-        {
-
-            rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[c], l_ex_number);
-            if (rc)
-            {
-                FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS for list entry %d with rc = 0x%x", c, (uint32_t)rc);
-                break;
-            }
-
-            FAPI_DBG("Core number = %d", l_ex_number);
-
-            ex_offset = l_ex_number * 0x01000000;
-            
-            //  ******************************************************************
-            //  FSM trace
-            //  ******************************************************************
-            rc = p8_pm_pcbs_fsm_trace (i_target, l_ex_number, "beginning of pbcs_init");
-            if (!rc.ok()) 
-            {
-                break;
-            }
-
-// Removed in deference to the setting by SBE code
-//            // Set DPLL Lock Replacement value (15:23) = 2 (eg bit 22 = 1)
-//            FAPI_INF ("Set DPLL Lock Replacement value of EX_DPLL_CPM_PARM_REG_0x1*0F0152 ");
-//
-//            address =  EX_DPLL_CPM_PARM_REG_0x100F0152 + ex_offset;
-//            GETSCOM(rc, i_target, address, data);
-//
-//            e_rc  = data.setBit(22);
-//            E_RC_CHECK(e_rc, rc);
-//
-//            PUTSCOM(rc, i_target, address, data);
-//
-//            //  ******************************************************************
-//            //  - Enable DPLL Lock Replacement mode
-//            //  ******************************************************************
-//            FAPI_INF("Set DPLL Lock Replacement mode");
-//
-//            address = EX_PCBSPM_MODE_REG_0x100F0156 + ex_offset;
-//
-//            GETSCOM(rc, i_target, address, data );
-//
-//            e_rc |= data.setBit(7);
-//            E_RC_CHECK(e_rc, rc);
-//
-//            PUTSCOM(rc, i_target, address, data );
-
-            //  ******************************************************************
-            //  - set PCBS_PM_PMGP1_REG_1
-            //              [11] PM_SPR_OVERRIDE_EN = 1
-            //  ******************************************************************
-            FAPI_INF("Force PM_SPR_OVERRIDE");
-
-            // Using Write OR to set bit11
-            // Clear buffer
-            e_rc  = data.flushTo0();
-            e_rc |= data.setBit(11);    // Force OCC SPR Mode = 1
-            E_RC_CHECK(e_rc, rc);
-
-            address =  EX_PMGP1_OR_0x100F0105 + ex_offset;
-            PUTSCOM(rc, i_target, address, data );
-
-            FAPI_INF("Forced OCC SPR Mode");
-            
-            //  ******************************************************************
-            //  - Resonant clocks
-            //  ******************************************************************
-            FAPI_INF("Disable Resonant Clocks and put Controller in Manual mode.  Enabled by OCC once loaded");
-
-            address = EX_PCBS_Resonant_Clock_Control_Reg0_0x100F0165 + ex_offset;
-            GETSCOM(rc, i_target, address, data);
-            
-            e_rc |= data.setBit(1);   // (1) control mode = Manual
-            E_RC_CHECK(e_rc, rc);
-          
-            PUTSCOM(rc, i_target, address, data);
-            
-            // Check if already disabled
-            address = EX_GP3_0x100F0012 + ex_offset;
-            GETSCOM(rc, i_target, address, data);
-
-            // if resonant clocks should have been disabled by either:
-            //    - Power on IPL or
-            //    - p8_pm_prep_for_reset
-            if (data.isBitClear(22))
-            {
-                
-                e_rc |= data.flushTo0();
-                e_rc |= data.setBit(22);   // Resonant clock disable
-                E_RC_CHECK(e_rc, rc);
-
-                address = EX_GP3_OR_0x100F0014 + ex_offset;
-                PUTSCOM(rc, i_target, address, data);    
-                FAPI_IMP("WARNING: resonant clocking was NOT properly disabled");            
-                FAPI_IMP("  Not currently failing until real resonant disable is available");            
-            }    
-            
-            
-            //  ******************************************************************
-            //  FSM trace
-            //  ******************************************************************
-            rc = p8_pm_pcbs_fsm_trace (i_target, l_ex_number, "after ResClk");
-            if (!rc.ok()) 
-            {
-                break;
-            }   
-
-            //  ******************************************************************
-            //  - Power Management Control Reg
-            //  ******************************************************************
-            FAPI_INF("Clear Power Management Control Reg");
-
-            // Clear buffer
-            e_rc = data.flushTo0();
-            E_RC_CHECK(e_rc, rc);
-
-            address = EX_PCBS_Power_Management_Control_Reg_0x100F0159 + ex_offset;
-            PUTSCOM(rc, i_target, address, data);
-
-            //  ******************************************************************
-            //  - Power Management Idle Control Reg
-            //  ******************************************************************
-            FAPI_INF("Clear Power Management Idle Control Reg");
-
-            // Clear buffer
-            e_rc = data.flushTo0();
-            E_RC_CHECK(e_rc, rc);
-
-            address = EX_PCBS_Power_Management_Idle_Control_Reg_0x100F0158 + ex_offset;
-            PUTSCOM(rc, i_target, address, data);
-
-            FAPI_INF ("PMCR default value adjustment (Hardware flush 0) of EX_PCBS_Power_Management_Idle_Control_Reg_0x1*0F0158 " );
-            
-            
-            //  ******************************************************************
-            //  FSM trace
-            //  ******************************************************************
-            rc = p8_pm_pcbs_fsm_trace (i_target, l_ex_number, "after PMCR and PMICR");
-            if (!rc.ok()) 
-            {
-                break;
-            }            
-        
-            //  ******************************************************************
-            //  - Power Management Error Reg
-            //  ******************************************************************
-            // clear the PCBS PM Error register for accummulated error during 
-            // initialization.
-            
-            // Read it first to have a log in the event of any debug
-            address = EX_PMErr_REG_0x100F0109 + ex_offset;
-            GETSCOM(rc, i_target, address, data);
-            
-            FAPI_INF("\tPM Error Register on EX %d prior to clearing: 0x%016llX", 
-                        l_ex_number,
-                        data.getDoubleWord(0));
-             
-            rc = FAPI_ATTR_GET(ATTR_CHIP_EC_FEATURE_PCBS_ERR_RESET,
-                               &i_target,
-                               chipHasPcbsErrReset);
-            if(rc)
-            {
-     		    FAPI_ERR("Error querying Chip EC feature: "
-                         "ATTR_CHIP_EC_FEATURE_PCBS_ERR_RESET");
-                break;
-            }
-
-            FAPI_INF("PCBS Error Reset is %s being performed",
-                     (chipHasPcbsErrReset ? "" : "NOT"));
-
-
-            if (chipHasPcbsErrReset)
-            {
-                // Write anything to the register to clear it.                
-                PUTSCOM(rc, i_target, address, data);            
-            }           
-            
-            //  ******************************************************************
-            //  FSM trace
-            //  ******************************************************************
-            rc = p8_pm_pcbs_fsm_trace (i_target, l_ex_number, "after Power Management Error Reg");
-            if (!rc.ok()) 
-            {
-                break;
-            }
-
-        }  //END FOR
-        if (!rc.ok() )
-        {
-            break;
-        }
-    } while(0);
-
-    return rc;
-
-}  //end INIT
-
-
-//------------------------------------------------------------------------------
-/**
- * Initialize the PCBS-PM macro for all functional and enabled EX chiplets
- *
- * @param[in] i_target Chip target
- * @param[in] mode     Control mode for the procedure
- *                     PM_INIT, PM_CONFIG, PM_RESET
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-pcbs_reset(const Target &i_target, struct_pcbs_val_init_type &pcbs_val_init)
-{
-    fapi::ReturnCode            rc;
-    uint32_t                    e_rc;           // ecmd returncode
-
-    ecmdDataBufferBase          data(64);
-    ecmdDataBufferBase          mask(64);
-
-
-    // Variables
-    std::vector<fapi::Target>   l_exChiplets;
-    uint8_t                     l_ex_number = 0;
-    uint64_t                    address;
-    uint64_t                    ex_offset;
-
-    uint32_t                    loopcount = 0;
-    // PCBSPM MODE bits
-    const uint32_t              PCBSPMMODE_ENABLE_PSTATE_MODE_BIT = 0;
-    const uint32_t              PCBSPMMODE_ENABLE_GLOBAL_PSTATE_REQ_BIT = 2;
-
-    // PMGP1 bits
-    const uint32_t              PMGP1_DPLL_FREQ_OVERRIDE_ENABLE = 10;
-    const uint32_t              PMGP1_PM_SPR_OVERRIDE_EN_BIT = 11;
-    const uint32_t              PMGP1_FORCE_SAFE_MODE_BIT = 12;
-
-    // PMSR bits
-//    const uint32_t              PMSR_PSAFE_MODE_ACTIVE_BIT = 33;
-    const uint32_t              PMSR_ALL_FSMS_IN_SAFE_STATE_BIT = 36;
-
-    // PMCR bits
-    const uint32_t              PMSR_AUTO_OVERRIDE0_PSTATE_LIMIT_EN_BIT = 16;
-    const uint32_t              PMSR_AUTO_OVERRIDE1_PSTATE_LIMIT_EN_BIT = 17;
-
-    // PMICR bits
-    const uint32_t              PMICR_NAP_PSTATE_EN_BIT = 8;
-    const uint32_t              PMICR_SLEEP_PSTATE_EN_BIT = 24;
-    const uint32_t              PMICR_WINKLE_PSTATE_EN_BIT = 40;
-
-    // GP3 bits
-    const uint32_t              GP3_RESCLK_DIS_BIT = 22;
-
-    // PCBS OCC Heartbeat bits
-    const uint32_t              POHR_OCC_HEARTBEAT_EN_BIT = 8;
-
-    // PCBS OCC Heartbeat bits
-    const uint32_t              IVRMCS_IVRM_FSM_ENABLE_BIT = 0;
-    const uint32_t              IVRMCS_IVRM_CORE_VDD_BYPASS_B_BIT = 4;
-    const uint32_t              IVRMCS_IVRM_CORE_VCS_BYPASS_B_BIT = 6;
-    const uint32_t              IVRMCS_IVRM_ECO_VDD_BYPASS_B_BIT = 8;
-    const uint32_t              IVRMCS_IVRM_ECO_VCS_BYPASS_B_BIT = 10;
-    
-    // detect PCBS interrupt retry bug HW226980 that is fixed.  This is 
-    // only present only on Murano 1.3.
-    uint8_t                     chipHasPcbIntrFixed = 0;
-
-    FAPI_INF("p8_pcbs_init_reset beginning for target %s ...", i_target.toEcmdString());
-    do
-    {
-        rc = fapiGetChildChiplets(i_target,
-                                    fapi::TARGET_TYPE_EX_CHIPLET,
-                                    l_exChiplets,
-                                    TARGET_STATE_FUNCTIONAL);
-        if (rc)
-        {
-            FAPI_ERR("fapiGetChildChiplets with rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        FAPI_DBG("Chiplet vector size => %u", l_exChiplets.size());
-        
-        // The attribute for the PCBS Reset bug fix applies to the PCB Interrupt
-        rc = FAPI_ATTR_GET(ATTR_CHIP_EC_FEATURE_PCBS_ERR_RESET,
-                               &i_target,
-                               chipHasPcbIntrFixed);
-        if(rc)
-        {
-     	    FAPI_ERR("Error querying Chip EC feature: "
-                     "ATTR_CHIP_EC_FEATURE_PCBS_ERR_RESET");
-            break;
-        }
-
-        // For each chiplet
-        for (uint8_t c=0; c< l_exChiplets.size(); c++)
-        {
-
-            rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[c], l_ex_number);
-            if (rc)
-            {
-                FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS with rc = 0x%x", (uint32_t)rc);
-                break;
-            }
-
-            FAPI_DBG("\tCore number = %d", l_ex_number);
-
-            ex_offset = l_ex_number * 0x01000000;
-            
-            address = EX_PCBS_OCC_Heartbeat_Reg_0x100F0164 + ex_offset;
-            GETSCOM(rc, i_target, address, data);
-            uint32_t psafe;
-            e_rc = data.extractToRight(&psafe, 17, 8);
-            E_RC_CHECK(e_rc, rc);
-                       
-            address = EX_PCBS_PMC_VF_CTRL_REG_0x100F015A + ex_offset;
-            GETSCOM(rc, i_target, address, data);
-            uint32_t gactual;
-            e_rc = data.extractToRight(&gactual, 0, 8);
-            E_RC_CHECK(e_rc, rc);
-            
-            FAPI_DBG("\tEX %d - Global Actual: 0x%02X, Psafe: 0x%02X", 
-                            l_ex_number, gactual, psafe);
-
-            //  ******************************************************************
-            //  Force safe mode if Pstates are enabled.
-            //  ******************************************************************
-            //  - set PCBS_PM_PMGP1_REG_1
-            //              [12] force_safe_mode = 1
-            //  ******************************************************************
-
-            address = EX_PCBSPM_MODE_REG_0x100F0156 + ex_offset;
-            GETSCOM(rc, i_target, address, data);
-            FAPI_DBG("\tPCBS_MODE_REG value 0x%16llX", data.getDoubleWord(0));
-
-            if (data.isBitSet(PCBSPMMODE_ENABLE_PSTATE_MODE_BIT))  // Pstates enabled
-            {
-                // if the part does not have HW226980 fixed, do not try to use the 
-                // hardware to enter safe mode in the PCBS.  BTW:  this function is
-                // somewhat redundant to the PMC Vsafe being successfully invoked as
-                // that establishes the Global Actual PState anyway
-                
-                FAPI_INF("PCBS Interrupt will %sbe performed",
-                     (chipHasPcbIntrFixed ? "" : "NOT "));
-                
-                if (chipHasPcbIntrFixed)
-                {
-
-                    FAPI_INF("Pstate enabled - Force safe mode");
-
-                    // Using Write OR to just set bit12
-                    // Clear buffer
-                    e_rc = data.flushTo0();
-                    E_RC_CHECK(e_rc, rc);
-
-                    e_rc = data.setBit(PMGP1_FORCE_SAFE_MODE_BIT);  // force_safe_mode = 1
-                    E_RC_CHECK(e_rc, rc);
-
-                    address =  EX_PMGP1_OR_0x100F0105 + ex_offset;
-                    //PUTSCOM(rc, i_target, address, data);
-
-
-                    rc = p8_pm_glob_fir_trace (i_target, "after setting force safe mode bit");
-                    if (!rc.ok()) 
-                    {
-                        break;
-                    }
-
-                    FAPI_INF("Forced Safe Mode");
-
-                    //  ******************************************************************
-                    //  psafe Pstate achived AND FSM-stable ?
-                    //  ******************************************************************
-                    //  ******************************************************************
-                    //  - PCBS_POWER_MANAGEMENT_STATUS_REG[33] safe_mode_active
-                    //  - PCBS_POWER_MANAGEMENT_STATUS_REG[36] all_fsms_in_safe_state
-                    //  ******************************************************************
-                    FAPI_INF("Psafe Pstate and FSM-stable?");
-
-                    loopcount = 0;
-
-                    address =  EX_PCBS_POWER_MANAGEMENT_STATUS_REG_0x100F0153 + ex_offset;
-                    // loop until  (safe_mode_active AND all_fsms_in_safe_state)
-                    do
-                    {
-
-                        // Read PMSR
-                        GETSCOM(rc, i_target, address, data);
-
-                        FAPI_DBG("\t loopcount => %d ",loopcount  );
-                        // OR timeout .... set to 20 loops
-                        if( ++loopcount > pcbs_val_init.MAX_PSAFE_FSM_LOOPS )
-                        {
-                            FAPI_ERR("Gave up waiting for Psafe Pstate and FSM-stable!" );
-                            const fapi::Target& PROC_CHIP = i_target;
-                            const uint64_t& LOOPCOUNT = (uint32_t)loopcount;
-                            const uint64_t& PMSR = data.getDoubleWord(0);
-                            
-                            address =  EX_PCBS_FSM_MONITOR1_REG_0x100F0170 + ex_offset;
-                            GETSCOM(rc, i_target, address, data);
-                            const uint64_t& PCBSPM_MON1 = data.getDoubleWord(0);
-                            
-                            address =  EX_PCBS_FSM_MONITOR2_REG_0x100F0171 + ex_offset;
-                            GETSCOM(rc, i_target, address, data);
-                            const uint64_t& PCBSPM_MON2 = data.getDoubleWord(0);
-                            
-                            address =  EX_PMGP0_0x100F0100 + ex_offset;
-                            GETSCOM(rc, i_target, address, data);
-                            const uint64_t& PMGP0 = data.getDoubleWord(0);
-                            
-                            address =  EX_PMGP1_0x100F0103 + ex_offset;
-                            GETSCOM(rc, i_target, address, data);
-                            const uint64_t& PMGP1 = data.getDoubleWord(0);
-                            
-                            address =  EX_PMErr_REG_0x100F0109 + ex_offset;
-                            GETSCOM(rc, i_target, address, data);
-                            const uint64_t& PMERR = data.getDoubleWord(0);
-                            
-                            address = EX_PCBS_iVRM_Control_Status_Reg_0x100F0154 + ex_offset;
-                            GETSCOM(rc, i_target, address, data);
-                            const uint64_t& IVRM_CTRL = data.getDoubleWord(0);
-                            
-                            address = EX_PCBS_iVRM_Value_Setting_Reg_0x100F0155 + ex_offset;
-                            GETSCOM(rc, i_target, address, data);
-                            const uint64_t& IVRM_VAL = data.getDoubleWord(0);
-                            
-                            address = EX_PCBSPM_MODE_REG_0x100F0156 + ex_offset;
-                            GETSCOM(rc, i_target, address, data);
-                            const uint64_t& PCBSMODE = data.getDoubleWord(0);
-                            
-                            FAPI_SET_HWP_ERROR(rc, RC_PROC_PCBS_CODE_SAFE_FSM_TIMEOUT);
-                            break;
-                        }
-
-                        FAPI_DBG("Read of PCBS_POWER_MANAGEMENT_STATUS_REG_0x1*0F0153 content :  %016llX",
-                                        data.getDoubleWord(0));
-
-                        FAPI_DBG("Is Psafe Pstate and FSM-stable ? ");
-                        FAPI_DBG("\t Wait DELAY: %d  ", pcbs_val_init.MAX_DELAY);
-                        FAPI_DBG("\t Wait SimCycles: %d  ", pcbs_val_init.MAX_SIM_CYCLES);
-
-                        rc =  fapiDelay(pcbs_val_init.MAX_DELAY, pcbs_val_init.MAX_SIM_CYCLES);
-                        if (rc)
-                        {
-                            FAPI_ERR("fapiDelay(MAX_DELAY, MAX_SIM_CYCLES) failed. With rc = 0x%x", (uint32_t)rc);
-                            break;
-                        }
-
-                    //} while ( data.isBitClear(PMSR_PSAFE_MODE_ACTIVE_BIT) ||
-                    //          data.isBitClear(PMSR_ALL_FSMS_IN_SAFE_STATE_BIT));
-                    } while ( data.isBitClear(PMSR_ALL_FSMS_IN_SAFE_STATE_BIT));
-                    // if error, break the outer loop
-                    if (!rc.ok())
-                    {
-                        break;
-                    }
-
-                    FAPI_INF("Psafe Pstate and FSM-stable is reached ...");
-                } // PCBS Interrupt
-                else
-                {
-                    FAPI_INF("PCBS safe mode not used");
-                }
-            } // Pstates enabled
-            
-            //  ******************************************************************
-            //  FSM trace
-            //  ******************************************************************
-            rc = p8_pm_pcbs_fsm_trace (i_target, l_ex_number, "after setting force safe mode poll");
-            if (!rc.ok()) 
-            {
-                break;
-            }
-            
-            //  ******************************************************************
-            //  Check for xstops and recoverables
-            //  ******************************************************************
-
-            rc = p8_pm_glob_fir_trace (i_target, "after force safe mode poll");
-            if (!rc.ok()) 
-            {
-                break;
-            }
-
-            //  ******************************************************************
-            //  DPLL settings
-            //  ******************************************************************
-            //  ******************************************************************
-            //  - enable dpll override
-            //     - PCBS_PM_PMGP1_REG_1[10]  dpll_freq_override_enable
-            //
-            // \bug the following are removed as the pstate protocol would have
-            // produced Psave anyway.  To mode frequency without voltage context
-            // is not correct.
-            //  - get Psafe and global actual pstate
-            //  - calculate minPstate
-            //  - calculate dpll_fmin  = fnom + minPstate
-            //  - set dpll_fmin
-            //  - set dpll_fmax
-            //  ******************************************************************
-
-            FAPI_INF("Hold the DPLL to the value that the last Pstate represents");
-
-            // Write calculated values to FREQ_CTRL_REG
-            address = EX_FREQCNTL_0x100F0151 + ex_offset;
-            GETSCOM(rc, i_target, address, data);
-
-            FAPI_DBG(" Pre write content of FREQ_CTRL_REG_0x1*0F0151 :  %016llX",
-                            data.getDoubleWord(0));
-
-            // Clear the DPLL bias;  did not clear other fields
-            e_rc = data.clearBit(18, 4);
-            E_RC_CHECK(e_rc, rc);
-
-            PUTSCOM(rc, i_target, address, data);
-            
-            //  ******************************************************************
-            //  FSM trace
-            //  ******************************************************************
-            rc = p8_pm_pcbs_fsm_trace (i_target, l_ex_number, "after DPLL settings");
-            if (!rc.ok()) 
-            {
-                break;
-            }
-            
-            //  ******************************************************************
-            //  Check for xstops and recoverables
-            //  ******************************************************************
-            rc = p8_pm_glob_fir_trace (i_target, "after FREQ_CTRL_REG");
-            if (!rc.ok()) 
-            {
-                break;
-            } 
-
-            // Lock the DPLL in via the override mode.  Note:  this DOES
-            // allow for continued CPM enablement
-            e_rc |= data.flushTo0();
-            e_rc |= data.setBit(PMGP1_DPLL_FREQ_OVERRIDE_ENABLE);
-            E_RC_CHECK(e_rc, rc);
-
-            address = EX_PMGP1_OR_0x100F0105 + ex_offset;
-            PUTSCOM(rc, i_target, address, data);
-            
-            //  ******************************************************************
-            //  FSM trace
-            //  ******************************************************************
-            rc = p8_pm_pcbs_fsm_trace (i_target, l_ex_number, "after hold DPLL");
-            if (!rc.ok()) 
-            {
-                break;
-            }
-            
-            //  ******************************************************************
-            //  Check for xstops and recoverables
-            //  ******************************************************************
-            rc = p8_pm_glob_fir_trace (i_target, "after hold DPLL");
-            if (!rc.ok()) 
-            {
-                break;
-            }  
-
-            //  ******************************************************************
-            //  - Disable Pstate mode
-            //  - disable Pstate requests
-            //  ******************************************************************
-            FAPI_INF("Disable Pstate mode and disable Pstate requests");
-
-            address = EX_PCBSPM_MODE_REG_0x100F0156 + ex_offset;
-
-            GETSCOM(rc, i_target, address, data );
-
-            e_rc |= data.clearBit(PCBSPMMODE_ENABLE_PSTATE_MODE_BIT);
-            e_rc |= data.clearBit(PCBSPMMODE_ENABLE_GLOBAL_PSTATE_REQ_BIT);
-            E_RC_CHECK(e_rc, rc);
-
-            PUTSCOM(rc, i_target, address, data );
-            
-            //  ******************************************************************
-            //  FSM trace
-            //  ******************************************************************
-            rc = p8_pm_pcbs_fsm_trace (i_target, l_ex_number, "after disable Pstates");
-            if (!rc.ok()) 
-            {
-                break;
-            }
-            
-            //  ******************************************************************
-            //  Check for xstops and recoverables
-            //  ******************************************************************
-            rc = p8_pm_glob_fir_trace (i_target, "after disable Pstates");
-            if (!rc.ok()) 
-            {
-                break;
-            }  
-
-            FAPI_INF("Disabled Pstate mode");
-
-            //  ******************************************************************
-            //   OCC SPR Mode
-            //  ******************************************************************
-            //  ******************************************************************
-            //  - set PCBS_PM_PMGP1_REG_1
-            //              [11] PM_SPR_OVERRIDE_EN = 1
-            //  ******************************************************************
-            FAPI_INF("Force PM_SPR_OVERRIDE");
-
-            // Using Write OR to set bit11
-            // Clear buffer
-            e_rc  = data.flushTo0();
-            e_rc |= data.setBit(PMGP1_PM_SPR_OVERRIDE_EN_BIT);
-            E_RC_CHECK(e_rc, rc);
-
-            address =  EX_PMGP1_OR_0x100F0105 + ex_offset;
-            PUTSCOM(rc, i_target, address, data );
-
-            FAPI_INF("Forced OCC SPR Mode");
-
-            //  ******************************************************************
-            //  - Clear Power Management Idle Control bits that allow Pstate
-            //      requensts to occur
-            //  - Can occur as SPR override is set
-            //  ******************************************************************
-            FAPI_INF("Disabling Global Pstate Request bits ");
-
-            address =  EX_PCBS_Power_Management_Idle_Control_Reg_0x100F0158 +
-                                ex_offset;
-            GETSCOM(rc, i_target, address, data );
-
-            e_rc |= data.clearBit(PMICR_NAP_PSTATE_EN_BIT);
-            e_rc |= data.clearBit(PMICR_SLEEP_PSTATE_EN_BIT);
-            e_rc |= data.clearBit(PMICR_WINKLE_PSTATE_EN_BIT);
-            E_RC_CHECK(e_rc, rc);
-
-            PUTSCOM(rc, i_target, address, data );
-
-            // Auto overrides
-            address = EX_PCBS_Power_Management_Control_Reg_0x100F0159 + ex_offset;
-            GETSCOM(rc, i_target, address, data );
-
-            e_rc |= data.clearBit(PMSR_AUTO_OVERRIDE0_PSTATE_LIMIT_EN_BIT);
-            e_rc |= data.clearBit(PMSR_AUTO_OVERRIDE1_PSTATE_LIMIT_EN_BIT);
-            E_RC_CHECK(e_rc, rc);
-
-            PUTSCOM(rc, i_target, address, data );
-
-            FAPI_INF("Disabled Global Pstate Requests");
-
-            //  ******************************************************************
-            //  - Reset Pmin and Pmax
-            //  ******************************************************************
-            FAPI_INF("Reset Pmin and Pmax");
-
-            // Clear data buffer
-            e_rc |= data.flushTo0();
-            e_rc |= data.setByte(0, pcbs_val_init.PMIN_CLIP); //Pmin_clip   =  -128
-            e_rc |= data.setByte(1, pcbs_val_init.PMAX_CLIP); //Pmax_clip   =   127
-            E_RC_CHECK(e_rc, rc);
-
-            address = EX_PCBS_Power_Management_Bounds_Reg_0x100F015D + ex_offset;
-            PUTSCOM(rc, i_target, address, data );
-
-            FAPI_DBG("Pmin/Pmax written to PCBS_Power_Management_Bounds_Reg :  %016llX",
-                            data.getDoubleWord(0));
-            FAPI_INF("\t Pmin_clip => %d and Pmax_clip  => %d ",
-                            pcbs_val_init.PMIN_CLIP,
-                            pcbs_val_init.PMAX_CLIP);
-
-            //  ******************************************************************
-            //  Disable RESCLK
-            //  ******************************************************************
-            FAPI_INF("Settings about RESCLK");
-
-            ///  \todo : Is there more to things than this.
-            // Using Write OR to just set bit22
-            // Clear buffer
-            e_rc = data.flushTo0();
-            e_rc = data.setBit(GP3_RESCLK_DIS_BIT);
-            E_RC_CHECK(e_rc, rc);
-
-            address = EX_GP3_OR_0x100F0014 + ex_offset;
-            PUTSCOM(rc, i_target, address, data);
-
-            FAPI_INF ("Disabled RESCLK, set bit 22 of GP3_REG_0_RWXx1*0F0012 " );
-            
-            //  ******************************************************************
-            //  FSM trace
-            //  ******************************************************************
-            rc = p8_pm_pcbs_fsm_trace (i_target, l_ex_number, "after setting force safe mode poll");
-            if (!rc.ok()) 
-            {
-                break;
-            }
-            
-            //  ******************************************************************
-            //  Check for xstops and recoverables
-            //  ******************************************************************
-            rc = p8_pm_glob_fir_trace (i_target, "after RESCLK");
-            if (!rc.ok()) 
-            {
-                break;
-            }  
-            
-            //  ******************************************************************
-            //  Disable OCC Heartbeat
-            //  ******************************************************************
-            address = EX_PCBS_OCC_Heartbeat_Reg_0x100F0164 + ex_offset;
-            GETSCOM(rc, i_target, address, data);
-
-            FAPI_DBG(" Pre write content of PCBS_OCC_HEARTBEAT_REG_0x1*0F0164  :  %016llX",
-                            data.getDoubleWord(0));
-
-            e_rc = data.clearBit(POHR_OCC_HEARTBEAT_EN_BIT);
-            E_RC_CHECK(e_rc, rc);
-
-            PUTSCOM(rc, i_target, address, data);
-
-            FAPI_INF ("OCC Heartbeat disabled, cleared bit 8 of PCBS_OCC_HEARTBEAT_REG_0x1*0F0164" );
-
-            //  ******************************************************************
-            //  IVRM Disable
-            //  ******************************************************************
-            //  ******************************************************************
-            //  - disable ivrms
-            //  - set bypass mode
-            //  ******************************************************************
-            // \todo DOES THIS WORK IF THE IVRMS ARE ACTIVE AND IN REGULATION????
-            FAPI_INF("Disable IVRMs");
-
-            if (pcbs_val_init.ivrms_enabled)
-            {
-                address =  EX_PCBS_iVRM_Control_Status_Reg_0x100F0154 + ex_offset;
-                GETSCOM(rc, i_target, address, data);
-                FAPI_DBG(" Pre write content of PCBS_iVRM_Control_Status_Reg_0x1*0F0154  :  %016llX",
-                                data.getDoubleWord(0));
-
-                e_rc  = data.clearBit(IVRMCS_IVRM_FSM_ENABLE_BIT);
-                e_rc |= data.clearBit(IVRMCS_IVRM_CORE_VDD_BYPASS_B_BIT);
-                e_rc |= data.clearBit(IVRMCS_IVRM_CORE_VCS_BYPASS_B_BIT);
-                e_rc |= data.clearBit(IVRMCS_IVRM_ECO_VDD_BYPASS_B_BIT);
-                e_rc |= data.clearBit(IVRMCS_IVRM_ECO_VCS_BYPASS_B_BIT);
-                E_RC_CHECK(e_rc, rc);
-
-                PUTSCOM(rc, i_target, address, data);
-                // Write twice since  ivrm_fsm_enable have to be 0 to enable the set the bypass modes
-                PUTSCOM(rc, i_target, address, data);
-
-                FAPI_INF ("iVRMs disabled and in bypass-mode" );
-            }
-            
-            //  ******************************************************************
-            //  FSM trace
-            //  ******************************************************************
-            rc = p8_pm_pcbs_fsm_trace (i_target, l_ex_number, "after iVRM disable");
-            if (!rc.ok()) 
-            {
-                break;
-            }
-            
-            //  ******************************************************************
-            //  Check for xstops and recoverables
-            //  ******************************************************************
-            rc = p8_pm_glob_fir_trace (i_target, "after IVRM Disable");
-            if (!rc.ok()) 
-            {
-                break;
-            }  
-
-            //  ******************************************************************
-            //  Disable undervolting
-            //  ******************************************************************
-            address =  EX_PCBS_UNDERVOLTING_REG_0x100F015B + ex_offset;
-            GETSCOM(rc, i_target, address, data);
-
-            FAPI_DBG(" Pre write content of PCBS_UNDERVOLTING_REG_0x1*0F015B  :  %016llX",
-                            data.getDoubleWord(0));
-
-            e_rc |= data.setByte(0, pcbs_val_init.PUV_MIN);  //Puv_min   =  -128
-            e_rc |= data.setByte(1, pcbs_val_init.PUV_MAX);  //Puv_max   =  -128
-            e_rc |= data.setByte(2, pcbs_val_init.KUV);      //Kuv       =  0
-            E_RC_CHECK(e_rc, rc);
-
-            PUTSCOM(rc, i_target, address, data);
-
-            FAPI_DBG("\t PUV_MIN => %d ", pcbs_val_init.PUV_MIN );
-            FAPI_DBG("\t PUV_MAX => %d ", pcbs_val_init.PUV_MAX );
-            FAPI_DBG("\t KUV     => %d ", pcbs_val_init.KUV );
-
-            FAPI_INF ("Undervolting values reset done" );
-
-            //  ******************************************************************
-            //  Disable Local Pstate Frequency Target mechanism
-            //  ******************************************************************
-            address =  EX_PCBS_Local_Pstate_Frequency_Target_Control_Register_0x100F0168
-                            + ex_offset;
-            GETSCOM(rc, i_target, address, data);
-
-            e_rc |= data.clearBit(20);
-            E_RC_CHECK(e_rc, rc);
-
-            PUTSCOM(rc, i_target, address, data);
-
-            FAPI_INF ("Local Pstate Frequency Target mechanism disabled" );
-
-            //  ******************************************************************
-            //  Set other regs back to scan0 state
-            //  ******************************************************************
-
-            rc = pcbs_scan0(i_target, l_ex_number);
-            if (rc)
-            {
-                FAPI_ERR(" pcbs_scan0 failed. With rc = 0x%x", (uint32_t)rc);
-                break;
-            }
-            
-            //  ******************************************************************
-            //  Check for xstops and recoverables
-            //  ******************************************************************
-            rc = p8_pm_glob_fir_trace (i_target, "after SCAN0");
-            if (!rc.ok()) 
-            {
-                break;
-            }  
-            
-            //  ******************************************************************
-            //  FSM trace
-            //  ******************************************************************
-            rc = p8_pm_pcbs_fsm_trace (i_target, l_ex_number, "after PCBS scan0");
-            if (!rc.ok()) 
-            {
-                break;
-            }
-
-        } // Chiplet loop
-    } while(0);
-
-    if (rc.ok())
-    {
-        FAPI_INF("Reset complete ...\n");
-    }
-
-    return rc;
-}   // end RESET
-
-//------------------------------------------------------------------------------
-/**
- * Set the PCBS-PM macro register back to the scan0 state for those that need
- * a known state for OCC firmware
- *
- * @param[in] i_target Chip target
- * @param[in] i_ex_number    EX chiplet number used to create correct addresses
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-pcbs_scan0(const Target &i_target, uint8_t i_ex_number)
-{
-    fapi::ReturnCode            rc;
-    uint32_t                    e_rc;           // ecmd returncode
-    ecmdDataBufferBase          data(64);
-    uint64_t                    address;
-    uint64_t                    ex_offset;
-    uint64_t                    reset_doubleword;
-//    uint32_t                    reset_word;
-
-    do
-    {
-        ex_offset = i_ex_number * 0x01000000;
-
-        //  ******************************************************************
-        //  Initialize PM Regs with scan-zero values
-        //  *****************************************************************
-        FAPI_INF("Put selective PCBSLV_PM registers to the scan0 value that are touched by OCC firmware");
-
-        // Register NOT reset
-        //  EX_PMGP0_REG_0x100F0100 not reset as this control EX fencing
-        //  EX_PMGP1_REG_0_RWXx100F0103 not reset as idle configuration is done
-        //      by p8_poreslw_init
-        //  EX_PFVddCntlStat_REG_0x100F0106 not reset has this would disrupt
-        //      VDD to operational chiplets.
-        //  EX_PFVddCntlStat_REG_0x100F010E not reset has this would disrupt
-        //      VCS to operational chiplets
-        //  EX_FREQCNTL_0x100F0151 not reset has this would disrupt the frequency
-        //      of operational chiplets
-        //  EX_DPLL_CPM_PARM_REG_0x100F0152 not reset has this has DPLL control
-        //      bits that could/would disrupt operational chiplets
-        //  EX_PCBSPM_MODE_REG_0x100F0156 not reset as this register has DPLL
-        //      control bits could/would disrupt operational chiplets
-        //  EX_PCBS_Power_Management_Control_Reg_0x100F0159 not reset as this
-        //      as this register only applies if the OCC is in control of PState
-        //      and, upon reset, the OCC FW is designed to recover from ANY
-        //      PState.  If PHYP is in control of PStates, this register must
-        //      remain intact.
-        //  EX_PCBS_OCC_Heartbeat_Reg_0x100F0164 not reset as this is reset fully
-        //      by register accesses
-
-        //----
-// will be setup by GPSM;  not need to reset
-//         address =  EX_PCBS_Resonant_Clock_Control_Reg0_0x100F0165 + ex_offset;
-//         reset_doubleword = EX_PCBS_Resonant_Clock_Control_Reg0_0x100F0165_scan0;
-//         SETDWSCAN0(i_target, address, data, reset_doubleword );
-//         
-//         rc = p8_pm_glob_fir_trace (i_target, "after scan0 EX_PCBS_Resonant_Clock_Control_Reg0_0x100F0165");
-//         if (!rc.ok()) { break; }  
-
-        //----
-        address =  EX_PMErrMask_REG_0x100F010A + ex_offset;
-        GETSCOM(rc, i_target, address, data);
-        FAPI_DBG("EX_PMErrMask_REG_0x100F010A value = 0x%016llX", data.getDoubleWord(0));
-        
-        reset_doubleword = EX_PMErrMask_REG_0x100F010A_scan0;
-        SETDWSCAN0(i_target, address, data, reset_doubleword );
-
-        rc = p8_pm_glob_fir_trace (i_target, "after scan0 EX_PMErrMask_REG_0x100F010A");
-        if (!rc.ok()) { break; }  
-
-
-        // OCC does not mess with the PFET delays so these are left in tact.
-
-        //  This can only be done IF the IVRM is previously  disabled.
-// Should be done by an explicit iVRM disable routine as all bits don't really 
-// need to touched
-//         address =  EX_PCBS_iVRM_Control_Status_Reg_0x100F0154 + ex_offset;
-//         reset_word = EX_PCBS_iVRM_Control_Status_Reg_0x100F0154_scan0;
-//         SETSCAN0(i_target, address, data, reset_word );
-//         
-//         rc = p8_pm_glob_fir_trace (i_target, "after scan0 EX_PCBS_iVRM_Control_Status_Reg_0x100F0154");
-//         if (!rc.ok()) { break; }  
-// 
-//         //----
-//         address =  EX_PCBS_iVRM_Value_Setting_Reg_0x100F0155 + ex_offset;
-//         reset_word = EX_PCBS_iVRM_Value_Setting_Reg_0x100F0155_scan0;
-//         SETSCAN0(i_target, address, data, reset_word );
-//         
-//         rc = p8_pm_glob_fir_trace (i_target, "after scan0 EX_PCBS_iVRM_Value_Setting_Reg_0x100F0155");
-//         if (!rc.ok()) { break; }  
-
-        //----
-// This actually has a danger as Global Actual of 0 is Turbo!!!!
-// 
-//         address =  EX_PCBS_PMC_VF_CTRL_REG_0x100F015A + ex_offset;
-//         reset_word = EX_PCBS_PMC_VF_CTRL_REG_0x100F015A_scan0;
-//         SETSCAN0(i_target, address, data, reset_word );
-//         
-//         rc = p8_pm_glob_fir_trace (i_target, "after scan0 EX_PCBS_PMC_VF_CTRL_REG_0x100F015A");
-//         if (!rc.ok()) { break; }  
-
-        //----
-// Applies only to iVRMs. However, this is re-written by GPSM upon LPST installation
-// No real need to clear it.
-//         address =  EX_PCBS_Pstate_Index_Bound_Reg_0x100F015C + ex_offset;
-//         reset_word = EX_PCBS_Pstate_Index_Bound_Reg_0x100F015C_scan0;
-//         SETSCAN0(i_target, address, data, reset_word );
-//         
-//         rc = p8_pm_glob_fir_trace (i_target, "after scan0 EX_PCBS_Pstate_Index_Bound_Reg_0x100F015C");
-//         if (!rc.ok()) { break; }  
-
-        //----
-// Applies only to iVRMs. However, this is re-written by GPSM upon LPST installation
-// No real need to clear it.
-//         address =  EX_PCBS_PSTATE_TABLE_CTRL_REG_0x100F015E + ex_offset;
-//         reset_word = EX_PCBS_PSTATE_TABLE_CTRL_REG_0x100F015E_scan0;
-//         SETSCAN0(i_target, address, data, reset_word );
-//         
-//         rc = p8_pm_glob_fir_trace (i_target, "after scan0 EX_PCBS_PSTATE_TABLE_CTRL_REG_0x100F015E");
-//         if (!rc.ok()) { break; }  
-
-        //----
-// Applies only to iVRMs. However, this is re-written by GPSM upon LPST installation
-// No real need to clear it.   
-//         address =  EX_PCBS_iVRM_VID_Control_Reg0_0x100F0162  + ex_offset;
-//         reset_word = EX_PCBS_iVRM_VID_Control_Reg0_0x100F0162_scan0;
-//         SETSCAN0(i_target, address, data, reset_word );
-//         
-//         rc = p8_pm_glob_fir_trace (i_target, "after scan0 EX_PCBS_iVRM_VID_Control_Reg0_0x100F0162");
-//         if (!rc.ok()) { break; }  
-
-        //----
-// Applies only to iVRMs. However, this is re-written by GPSM upon LPST installation
-// No real need to clear it. 
-//         address =  EX_PCBS_iVRM_VID_Control_Reg1_0x100F0163 + ex_offset;
-//         reset_word = EX_PCBS_iVRM_VID_Control_Reg1_0x100F0163_scan0;
-//         SETSCAN0(i_target, address, data, reset_word );
-//         
-//         rc = p8_pm_glob_fir_trace (i_target, "after scan0 EX_PCBS_iVRM_VID_Control_Reg1_0x100F0163");
-//         if (!rc.ok()) { break; }  
-
-        //----
-// Applies only to resonant clocks only. However, this is re-written by GPSM upon 
-// enalement of resonant clocks. No real need to clear it.
-//         address =  EX_PCBS_Resonant_Clock_Control_Reg1_0x100F0166 + ex_offset;
-//         reset_word = EX_PCBS_Resonant_Clock_Control_Reg1_0x100F0166_scan0;
-//         SETSCAN0(i_target, address, data, reset_word );
-//         
-//         rc = p8_pm_glob_fir_trace (i_target, "after scan0 EX_PCBS_Resonant_Clock_Control_Reg1_0x100F0166");
-//         if (!rc.ok()) { break; }  
-     
-    } while(0);
-    return rc;
-}
-
-
-} //end extern C
-
-/*
-*************** Do not edit this area ***************
-This section is automatically updated by CVS when you check in this file.
-Be sure to create CVS comments when you commit so that they can be included here.
-
-$Log: p8_pcbs_init.C,v $
-Revision 1.31  2015/05/13 03:47:51  stillgs
-Revert to previous version due to erroneous commit
-
-Revision 1.29  2014/10/10 02:01:32  cmolsen
-SW280752: Updated to capture more FFDC data on RC_PROC_PCBS_CODE_SAFE_FSM_TIMEOUT
-
-Revision 1.28  2014/07/22 15:41:26  cmolsen
-SW269281 and SW266137: Updated to capture IVRM regs and PMGP1 in case of RC_PROC_PCBS_CODE_SAFE_FSM_TIMEOUT failure.
-
-Revision 1.27  2014/02/17 03:00:35  stillgs
-- After review (in dealing with  SW240169), removed most *scan0 statements as they were more detrimental than valuable.
-  The testcase for SW242617 should be run with this change
-- Added PCBS and Global FIR trace points for hang debug using common routines in p8_pm_utils.C
-- Added MPIPL debug message
-- Removed old comments (the *scan0 one above were left in until regressions fully pass)
-
-Revision 1.26  2014/01/29 17:54:51  cswenson
-changed char* to const char* in p8_pm_glob_fir_trace()
-
-Revision 1.25  2014/01/22 20:58:31  stillgs
-
-For SW238575, added an EC attribute check of an existing attribute to skip the forcing
-of PCBS Safe mode for Murano 1.x parts as these parts have a lost PCB interrupt issue
-(HW226980) that cannot be easily work-around in all cases.  For the case of the timeout
-in SW238575, the forcing is not necessary as the invocation of Pvsafe before this is
-sufficient.
-
-Revision 1.24  2014/01/13 21:15:37  stillgs
-
-- Fixed PMErrMask to properly default to "masked" vs "unmasked" to deal with
-PLL error upon OCC restart (SW237068)
-- Added passive global xstop and recoverable FIR tracing to aid in future
-debug.  Did not put these as specific checks -> FFDC at this time.
-
-Revision 1.23  2013/12/16 18:52:09  stillgs
-
-Added additional FFDC for SAFE FSM TIME check to add hardware FSM monitor
-registers to those collected
-
-Revision 1.22  2013/10/24 14:28:07  dcrowell
-Fix scan0 value to not write read-only bit
-
-Revision 1.21  2013-10-23 19:00:30  stillgs
-
-Additiona fix for SW230400 as SIMIC models do not all write access to bit 0 of 0x165
-to disable resonant clocking.  Changed to use GP3(26).  Note: it is noticed by
-inspection that the formal resonant clock disablement (from any state) is not yet
-implement.  This will be included in a subsequent update with unique CQ.
-
-Revision 1.20  2013/10/22 15:22:55  stillgs
-
-- Fix for SW230400:  added initialization of resonant clock control mode to "firmware" mode
-to ensure that OCC GPSM see the hardware in that assumptive state.
-
-Revision 1.19  2013/08/02 19:03:12  stillgs
-
-- Fix for SW209736 (OCC Reset Procedure incorrectly sets Freq to Turbo Value)
-- Removed redundant check of functional attribute (Gerrit)
-- Moved reg bit definitions to literals for clarity
-- General clean-up in prep for RAS reviews.  Added some FFDC info.
-
-Revision 1.18  2013/05/23 02:18:02  stillgs
-
-Fix error_flag compile issue by removing it as coming header change will do anyway
-
-Revision 1.17  2013/05/22 16:33:33  stillgs
-
-Fix for SW204379 - was not clearing a ecmddatabuffer before touching PMGP1.  This cause OHA wake-up overrideds to be inadvertently set
-Addressed SW204139 -  fixed a bit number bug for OCC SPR Override setting prior to PMCR/PMICR updates
-
-Revision 1.15  2013/04/12 01:31:59  stillgs
-
-Added DPLL replacement enablement and value setting per hardware PManIrr testing
-
-Revision 1.14  2013/04/01 04:18:13  stillgs
-
-Remove Psafe calculation as this caused Grub crash;  format clean-up for RAS review readiness
-
-Revision 1.13  2013/03/15 09:14:27  pchatnah
-fixing jeshuas error handling suggestion
-
-Revision 1.12  2013/03/13 12:51:51  pchatnah
-fixing some debug codes
-
-Revision 1.11  2013/02/27 03:50:00  stillgs
-Clean up for the reset process.  Removed some old code for cleanliness.
-
-Revision 1.10  2013/01/25 12:43:05  pchatnah
-commenting out flusing DPLL_LOCK_TIMER_REPLACEMENT_VALUE to 0
-
-
-
-
-*/
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pcbs_init.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pcbs_init.H
deleted file mode 100755
index 4cefb9f97..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pcbs_init.H
+++ /dev/null
@@ -1,81 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pcbs_init.H $          */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pcbs_init.H,v 1.4 2013/04/12 01:32:01 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pcbs_init.H,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Ralf Maier         Email: ralf.maier@de.ibm.com
-// *!
-// *!   The purpose of this procedure is to establish the safe setting for PCBSLV
-// *!   o set psafe value
-// *!   o set PMIN clip/Pmax clip
-// *!   o PMCR default values
-// *!   o PMICR default values
-// *!
-// *!  include file for pcbs_init with constants, definitions, prototypes
-// *!
-//------------------------------------------------------------------------------
-
-#ifndef _P8_PCBSINIT_H_
-#define _P8_PCBSINIT_H_
-
-/// \todo : PSAFE, PUV_MIN, PUV_MAX - Attributes defined as uint8 but should be int8
-typedef struct {
-    uint8_t     ivrms_enabled;          // ATTR_IVRMS_ENABLED
-    uint8_t     PSAFE;                  // ATTR_SAFE_PSTATE PSAFE
-    uint8_t     PUV_MIN;                // ATTR_PSTATE_UNDERVOLTING_MINIMUM
-    uint8_t     PUV_MAX;                // ATTR_PSTATE_UNDERVOLTING_MAXIMUM
-    uint32_t    MAX_PSAFE_FSM_LOOPS;    // max number of times PCBS-PMSR has been checked
-    uint32_t    MAX_DELAY;              // max number of Delay
-    uint32_t    MAX_SIM_CYCLES;         // max number of SimCycles (will be used when FSP is target)
-    char        GLOBAL_ACTUAL_PSTATE;   // Global Actual PSTATE
-    char        MIN_PSTATE;             //
-    char        FNOM;                   //
-    char        DPLL_FMIN;              //
-    char        DPLL_FMAX;              //
-    char        PMIN_CLIP;              //
-    char        PMAX_CLIP;              //
-    char        KUV;                    //
-} struct_pcbs_val_init_type;
-
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_pcbs_init_FP_t) (const fapi::Target&, uint32_t);
-
-extern "C" {
-
-/// \param[in]      &i_target           Chip target
-/// \param[in]      mode                Mode 1:    CONFIG-Mode
-///                                     Mode 2:    RESET-Mode
-///                                     Mode 3:    INIT-Mode
-
-fapi::ReturnCode p8_pcbs_init (const fapi::Target& i_target, uint32_t mode);
-
-} // extern "C"
-
-#endif // _P8_PCBSINIT_H_
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.C
deleted file mode 100644
index f08f00b7a..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.C
+++ /dev/null
@@ -1,284 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.C $         */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-
-// $Id: p8_pm_firinit.C,v 1.17 2014/07/09 14:49:32 daviddu Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_firinit.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Pradeep CN         Email: pradeepcn@in.ibm.com
-// *!
-/// \file p8_pm_init.C
-/// \brief Calls each firinit procedrues to configure the FIRs to
-///         predefined types
-///
-///
-///
-///
-///
-// *!
-// *! Procedure Prereq:
-// *!   o System clocks are running
-// *!
-//------------------------------------------------------------------------------
-///
-/// \todo   Review
-///
-///
-/// High-level procedure flow:
-///
-/// \verbatim
-///     - call p8_pm_pmc_firinit.C *chiptarget
-///     - evaluate RC
-///
-///     - call p8_pm_pba_firinit.C *chiptarget
-///     - evaluate RC
-///
-///
-///  \endverbatim
-///
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-
-
-#include <fapi.H>
-#include "p8_scom_addresses.H"
-#include "p8_pm_firinit.H"
-#include "p8_pm_pmc_firinit.H"
-#include "p8_pm_pba_firinit.H"
-#include "p8_pm_pcbs_firinit.H"
-#include "p8_pm_oha_firinit.H"
-#include "p8_pm_occ_firinit.H"
-
-extern "C" {
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Constant definitions
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Global variables
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Function prototypes
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Function definitions
-// ----------------------------------------------------------------------
-
-//------------------------------------------------------------------------------
-/**
- * p8_pm_firinit Call underlying FIR procedures to deal with the FIRs based on 
- *       the mode
- *
- * @param[in] i_target   Chip target which will be passed to all the procedures
- *
- * @param[in] i_mode   Control mode for the procedure
- *                     PM_INIT, PM_CONFIG, PM_RESET, PM_RESET_SOFT
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-
-fapi::ReturnCode
-p8_pm_firinit(const fapi::Target &i_target , uint32_t i_mode)
-{
-    fapi::ReturnCode    rc;
-    ecmdDataBufferBase  data(64);
-    uint64_t            any_error = 0;
-    const char *        PM_MODE_NAME_VAR; // Defines storage for PM_MODE_NAME
-    uint8_t             attr_pm_firinit_done_once_flag;
-
-    FAPI_INF("p8_pm_firinit start for mode %s", PM_MODE_NAME(i_mode));
-
-    do
-    {
-
-        // *************************************************************
-        // CHECKING FOR FIRS BEFORE RESET and INIT
-        // *************************************************************
-
-        FAPI_DBG("checking FIRs of PBA PMC OCC  ...");
-
-        // PMC FIR
-        rc = fapiGetScom(i_target, PMC_LFIR_0x01010840 , data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_LFIR_0x01010840) failed.");
-            break;
-        }
-
-        any_error = data.getDoubleWord(0);
-
-        if (any_error)
-        {
-            // Once clear FIRs are established, this will throw errors.
-            FAPI_INF("WARNING: PMC_FIR has error(s) active.  0x%016llX ", data.getDoubleWord(0));
-            //FAPI_ERR(" PMC_FIR has error(s) active.  0x%16llX ", data.getDoubleWord(0));
-            //FAPI_SET_HWP_ERROR(rc, RC_PROCPM_FIR_ERROR);
-            //break;
-        }
-
-       // PBA FIR
-        rc = fapiGetScom(i_target, PBA_FIR_0x02010840 , data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PBA_FIR_0x02010840) failed.");
-            break;
-        }
-
-        any_error = data.getDoubleWord(0);
-
-        if (any_error)
-        {
-            // Once clear FIRs are established, this will throw errors.
-            FAPI_INF("WARNING: PBA_FIR has error(s) active.  0x%016llX ", data.getDoubleWord(0));
-            //FAPI_ERR(" PBA_FIR_0x02010840  has error(s) active.  0x%16llX ", data.getDoubleWord(0));
-            //FAPI_SET_HWP_ERROR(rc, RC_PROCPM_FIR_ERROR);
-            //break;
-        }
-
-
-        // OCC FIR
-        rc = fapiGetScom(i_target, OCC_LFIR_0x01010800 , data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(OCC_LFIR_0x01010800) failed.");
-            break;
-        }
-
-        any_error = data.getDoubleWord(0);
-
-        if (any_error)
-        {
-            // Once clear FIRs are established, this will throw errors.
-            FAPI_INF("WARNING: OCC_FIR has error(s) active.  0x%016llX ", data.getDoubleWord(0));
-            //FAPI_ERR(" OCC_LFIR_0x01010800  has error(s) active.  0x%16llX ", data.getDoubleWord(0));
-            //FAPI_SET_HWP_ERROR(rc, RC_PROCPM_FIR_ERROR);
-            //break;
-        }
-
-        //  ******************************************************************
-        //  PMC_FIRS
-        //  ******************************************************************
-
-        FAPI_EXEC_HWP(rc, p8_pm_pmc_firinit , i_target , i_mode );
-        if (rc)
-        {
-            FAPI_ERR("ERROR: p8_pm_pmc_firinit detected failed result");
-            break;
-        }
-
-        //  ******************************************************************
-        //  PBA
-        //  ******************************************************************
-    ;
-        FAPI_EXEC_HWP(rc, p8_pm_pba_firinit , i_target , i_mode );
-        if (rc)
-        {
-            FAPI_ERR("ERROR: p8_pm_pba_firinit detected failed result");
-            break;
-        }
-
-        //  ******************************************************************
-        //  OHA - Removed as the values are part of the winkle image
-        //  ******************************************************************
-
-        //  FAPI_EXEC_HWP(rc, p8_pm_oha_firinit , i_target , i_mode );
-        //  if (rc)
-        //  {
-        //      FAPI_ERR("ERROR: p8_pm_oha_firinit detected failed result");
-        //      break;
-        //  }
-
-        //  ******************************************************************
-        //  PCBS
-        //  ******************************************************************
-
-        FAPI_EXEC_HWP(rc, p8_pm_pcbs_firinit , i_target , i_mode );
-        if (rc)
-        {
-            FAPI_ERR("ERROR: p8_pm_pcbs_firinit detected failed result");
-            break;
-        }
-
-        //  ******************************************************************
-        //  OCC
-        //  ******************************************************************
-
-        FAPI_EXEC_HWP(rc,  p8_pm_occ_firinit , i_target , i_mode );
-        if (rc)
-        {
-            FAPI_ERR("ERROR: p8_pm_occ_firinit detected failed result");
-            break;
-        }
-
-        // -----------
-        // SW260003
-        // -----------
-
-        rc = FAPI_ATTR_GET(ATTR_PM_FIRINIT_DONE_ONCE_FLAG, &i_target, attr_pm_firinit_done_once_flag);
-        if (!rc.ok()) {
-                        FAPI_ERR("fapiGetAttribute of ATTR_PM_FIRINIT_DONE_ONCE_FLAG failed.");
-            break;
-        }
-
-        if (i_mode == PM_INIT) {    
-            if (attr_pm_firinit_done_once_flag != 1) {
-                attr_pm_firinit_done_once_flag = 1;
-                rc = FAPI_ATTR_SET(ATTR_PM_FIRINIT_DONE_ONCE_FLAG, &i_target, attr_pm_firinit_done_once_flag);
-                if (!rc.ok()) {
-                  FAPI_ERR("fapiSetAttribute of ATTR_PM_FIRINIT_DONE_ONCE_FLAG failed");
-                  break;
-                }
-            }
-        }
-        else if (i_mode == PM_RESET) {    
-            if (attr_pm_firinit_done_once_flag == 1) {
-                attr_pm_firinit_done_once_flag = 2;
-                rc = FAPI_ATTR_SET(ATTR_PM_FIRINIT_DONE_ONCE_FLAG, &i_target, attr_pm_firinit_done_once_flag);
-                if (!rc.ok()) {
-                  FAPI_ERR("fapiSetAttribute of ATTR_PM_FIRINIT_DONE_ONCE_FLAG failed");
-                  break;
-                }
-            }
-        }
-
-    } while(0);
-
-    FAPI_INF("p8_pm_firinit end for mode %s", PM_MODE_NAME(i_mode));
-    
-    return rc;
-
-} // Procedure
-
-} //end extern C
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.H
deleted file mode 100755
index fb2e7f227..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.H
+++ /dev/null
@@ -1,127 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.H $         */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_firinit.H,v 1.11 2013/08/26 12:42:40 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_firinit.H,v $
-//------------------------------------------------------------------------------
-// *|
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-// *|
-// *! TITLE       : p8_pm_firinit.H
-// *! DESCRIPTION : common .H file for all FIRINITS
-// *!
-// *! OWNER NAME  : Greg Still    Email: stillgs@us.ibm.com
-// *! BACKUP NAME : Pradeep CN    Email: padeepcn@in.ibm.com
-// *!
-//------------------------------------------------------------------------------
-
-//------------------------------------------------------------------------------
-// Includes
-//------------------------------------------------------------------------------
-
-
-//------------------------------------------------------------------------------
-// MACRO structure definitions
-//------------------------------------------------------------------------------
-
-#ifndef _P8_PM_FIRINIT_H_
-#define _P8_PM_FIRINIT_H_
-
-#include "p8_pm.H"
-
-#define SET_FIR_ACTION(b, x, y){		\
-      if (x) { \
-        e_rc |= action_0.setBit(b); 	\
-      } \
-      else \
-      { \
-          e_rc |= action_0.clearBit(b);  \
-      } \
-      if (y) { \
-        e_rc |= action_1.setBit(b);  \
-      } \
-      else \
-      { \
-        e_rc |= action_1.clearBit(b);  \
-      }\
-     }
-
-#define SET_FIR_MASK(b,y){			\
-     if (y) { \
-       e_rc |= mask.setBit(b); \
-     } \
-     else \
-     { \
-         e_rc |= mask.clearBit(b); \
-     } \
-     }
-
-#define SET_CHECK_STOP(b){SET_FIR_ACTION(b, 0, 0);}
-#define SET_RECOV_ATTN(b){SET_FIR_ACTION(b, 0, 1);}
-#define SET_RECOV_INTR(b){SET_FIR_ACTION(b, 1, 0);}
-#define SET_MALF_ALERT(b){SET_FIR_ACTION(b, 1, 1);}
-#define SET_FIR_MASKED(b){SET_FIR_MASK(b,1);}
-#define CLEAR_FIR_MASK(b){SET_FIR_MASK(b,0);}
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_pm_firinit_FP_t) (const fapi::Target& , uint32_t);
-
-
-extern "C" {
-
-/// \brief Calls each PM unit firinit procedures to configure the FIRs of the chip to  predefined types :
-/// \calls p8_pm_pmc_firinit
-/// \calls p8_pm_pba_firinit
-/// \calls p8_pm_pcbs_firinit
-/// \calls p8_pm_oha_firinit
-/// \calls p8_pm_occ_firinit
-
-
-//const uint32_t        PCB_FIR_REGISTER_LENGTH = 43 ;
-//const uint32_t        PMC_FIR_REGISTER_LENGTH = 49 ;
-//const uint32_t        PBA_FIR_REGISTER_LENGTH = 46 ;
-//const uint32_t        OHA_FIR_REGISTER_LENGTH = 6 ;
-//const uint32_t        OCC_FIR_REGISTER_LENGTH = 64 ;
-
-//------------------------------------------------------------------------------
-/**
- * p8_pm_firinit Call underlying FIR procedures to deal with the FIRs based on 
- *       the mode
- *
- * @param[in] i_target   Chip target which will be passed to all the procedures
- *
- * @param[in] i_mode   Control mode for the procedure
- *                     PM_INIT, PM_CONFIG, PM_RESET, PM_RESET_SOFT
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode p8_pm_firinit(const fapi::Target& i_target , uint32_t i_mode);
- 
-
-} // extern "C"
-
-#endif
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_init.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_init.C
deleted file mode 100644
index 7e3af29a0..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_init.C
+++ /dev/null
@@ -1,670 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_init.C $            */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_init.C,v 1.26 2014/05/02 12:25:37 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_init.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Ralf Maier         Email: ralf.maier@de.ibm.com
-// *! BACKUP NAME: Greg Still        Email: stillgs@us.ibm.com
-// *!
-/// \file p8_pm_init.C
-/// \brief Calls each PM unit initialization procedures with the control
-///         parameter to process the respective phase:
-///             config: use Platform Attributes to create an effective
-///                     configuration using relevant Feature Attributes
-///             init:   use the Feature attributes to initialize the hardware
-///             reset:  call the "p8_pm_prep_reset" procedure to invoke a
-///                     reset of the hardware to allow for reinitialization
-// *!
-// *! Procedure Prereq:
-// *!   o System clocks are running
-// *!
-// *| buildfapiprcd -C p8_pm_utils.C p8_pm_init.C
-//------------------------------------------------------------------------------
-///
-/// \version -------------------------------------------------------------------
-/// \version 1.0 stillgs 2012/03/06 Initial Version
-/// \version -------------------------------------------------------------------
-///
-/// \verbatim
-///
-/// High-level procedure flow:
-///     - call p8_pm_prep_for_reset to prepare and perform getting the PM function
-///         able to be be (re)initialized
-///
-///     - call pm_list() to process the individual units in turn
-///     - call p8_pcbs_init.C *chiptarget, mode (PM_CONFIG, PM_INIT, PM_RESET)
-///     - evaluate RC
-///
-///     - call p8_pmc_init.C *chiptarget, mode (PM_CONFIG, PM_INIT, PM_RESET)
-///     - evaluate RC
-///
-///     - call p8_poreslw_init.C *chiptarget, mode (PM_CONFIG, PM_INIT, PM_RESET)
-///     - evaluate RC
-///
-///     - call p8_poregpe_init.C *chiptarget, mode (PM_CONFIG, PM_INIT, PM_RESET)
-///     - evaluate RC
-///
-///     - call p8_oha_init.C *chiptarget, mode (PM_CONFIG, PM_INIT, PM_RESET)
-///     - evaluate RC
-///
-///     - call p8_pba_init.C *chiptarget, mode (PM_CONFIG, PM_INIT, PM_RESET)
-///     - evaluate RC
-///
-///     - call p8_occ_sram_init.C *chiptarget,mode (PM_CONFIG, PM_INIT, PM_RESET)
-///     - evaluate RC
-///
-///     - call p8_ocb_init .C *chiptarget, mode (PM_CONFIG, PM_INIT, PM_RESET)
-///     - evaluate RC
-///
-///     - call p8_pss_init .C *chiptarget, mode (PM_CONFIG, PM_INIT, PM_RESET)
-///     - evaluate RC
-///
-///  \endverbatim
-///
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-
-#include "p8_pm.H"
-#include "p8_pm_utils.H"
-#include "p8_pm_init.H"
-#include "p8_pm_prep_for_reset.H"
-
-extern "C" {
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Constant definitions
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Global variables
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Function prototypes
-// ----------------------------------------------------------------------
-
-fapi::ReturnCode 
-pm_list(const Target& i_target, const Target& i_target2, uint32_t i_mode);
-
-fapi::ReturnCode
-clear_occ_special_wakeups (const fapi::Target &i_target);
-
-  
-// ----------------------------------------------------------------------
-// p8_pm_init
-// ----------------------------------------------------------------------
-
-fapi::ReturnCode
-p8_pm_init(const fapi::Target &i_target1 ,const fapi::Target &i_target2 , uint32_t mode)
-{
-
-    fapi::ReturnCode    rc;
-    uint32_t            int_mode;
-
-    do
-    {
-
-        int_mode = PM_RESET;
-        FAPI_EXEC_HWP(rc, p8_pm_prep_for_reset, i_target1, i_target2, int_mode);
-        if (rc)
-        {
-          FAPI_ERR("ERROR: p8_pm_init detected failed p8_pm_prep_for_reset result");
-          break;
-        }
-
-        int_mode = PM_CONFIG;
-        rc = pm_list(i_target1, i_target2, int_mode);
-        if (rc)
-        {
-            FAPI_ERR("ERROR: p8_pm_list PM_CONFIG detected failed ");
-            break;
-        }
-
-        int_mode = PM_INIT;      
-        rc = pm_list(i_target1, i_target2, int_mode);
-        if (rc)
-        {
-            FAPI_ERR("ERROR: p8_pm_list PM_INIT detected failed ");
-            break;
-        }
-
-    } while(0);
-
-    return rc;
-}
-
-// ----------------------------------------------------------------------
-// ocb_channel_reset - Reset each of the OCB channels on the passed target
-// ----------------------------------------------------------------------
-
-fapi::ReturnCode
-ocb_channel_reset(const Target& i_target, uint32_t i_mode)
-{
-    fapi::ReturnCode rc;
-    
-    do
-    {
-        FAPI_EXEC_HWP(rc, p8_ocb_init, i_target, i_mode, OCB_CHAN0,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL   );
-        if (rc)
-        {
-            FAPI_ERR("ERROR: p8_p8_pm_init detected failed OCB result on channel 0");
-            break;
-        }
-
-        FAPI_EXEC_HWP(rc, p8_ocb_init, i_target, i_mode, OCB_CHAN1,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL   );
-        if (rc)
-        {
-            FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 1");
-            break;
-        }
-
-        FAPI_EXEC_HWP(rc, p8_ocb_init, i_target, i_mode, OCB_CHAN2,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL   );
-        if (rc)
-        {
-            FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 2");
-            break;
-        }
-
-        FAPI_EXEC_HWP(rc, p8_ocb_init, i_target, i_mode,OCB_CHAN3,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL   );
-        if (rc)
-        {
-            FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 3");
-            break;
-        }
-    } while(0);
-    return rc;
-}
-
-// ----------------------------------------------------------------------
-// ocb_channel_init - Initialize the OCB channels as TGMT expects them --- 
-// ----------------------------------------------------------------------
-
-fapi::ReturnCode
-ocb_channel_init(const Target& i_target)
-{
-    fapi::ReturnCode rc;
-    
-    do
-    {
-        FAPI_EXEC_HWP(rc, p8_ocb_init, i_target, PM_SETUP_PIB, OCB_CHAN0, OCB_TYPE_LINSTR, 0, 0, OCB_Q_OUFLOW_EN, OCB_Q_ITPTYPE_NULL );
-        if (rc)
-        {
-            FAPI_ERR("ERROR: ocb_channel_init detected a failed p8_ocb_init on channel 0");
-            break;
-        }
-
-        FAPI_EXEC_HWP(rc, p8_ocb_init, i_target, PM_SETUP_PIB, OCB_CHAN1, OCB_TYPE_PUSHQ, 0, 0, OCB_Q_OUFLOW_EN, OCB_Q_ITPTYPE_NULL );
-        if (rc)
-        {
-            FAPI_ERR("ERROR: ocb_channel_init detected a failed p8_ocb_init on channel 1");
-            break;
-        }
-
-        FAPI_EXEC_HWP(rc, p8_ocb_init, i_target, PM_SETUP_PIB, OCB_CHAN2, OCB_TYPE_LIN, 0, 0, OCB_Q_OUFLOW_NULL, OCB_Q_ITPTYPE_NULL );
-        if (rc)
-        {
-            FAPI_ERR("ERROR: ocb_channel_init detected a failed p8_ocb_init on channel 2");
-            break;
-        }
-
-        FAPI_EXEC_HWP(rc, p8_ocb_init, i_target, PM_SETUP_PIB, OCB_CHAN3, OCB_TYPE_LINSTR, 0, 0, OCB_Q_OUFLOW_EN, OCB_Q_ITPTYPE_NULL );
-        if (rc)
-        {
-            FAPI_ERR("ERROR: ocb_channel_init detected a failed p8_ocb_init on channel 3");
-            break;
-        }
-    } while(0);
-    return rc;        
-    
-}
-
-// ----------------------------------------------------------------------
-// pm_list - process the underlying routines in the prescribed order
-// ----------------------------------------------------------------------
-
-fapi::ReturnCode
-pm_list(const Target& i_target, const Target& i_target2, uint32_t i_mode)
-{
-
-    fapi::ReturnCode    rc;
-    ecmdDataBufferBase  data(64);
-    uint32_t            effective_mode = 0;
-    const char *        PM_MODE_NAME_VAR; // Defines storage for PM_MODE_NAME
-
-    std::vector<fapi::Target>      l_exChiplets;
-
-    FAPI_INF("p8_pm_list start in mode %s", PM_MODE_NAME(i_mode));
-
-
-    do
-    {
-        if (i_mode == PM_RESET_SOFT || i_mode == PM_RESET)
-        {
-            effective_mode = PM_RESET;
-            FAPI_DBG("A Reset mode is detected.  Setting effective reset for non-PMC procedures to PM_RESET (mode %x)",
-                            effective_mode);
-        }
-        else
-        {
-             effective_mode = i_mode;
-        }
-
-
-        //  ******************************************************************
-        //  PCBS_PM
-        //  ******************************************************************
-
-        FAPI_INF("Executing: p8_pcbs_init.C in mode %s", PM_MODE_NAME(effective_mode));
-
-        if ( i_target.getType() != TARGET_TYPE_NONE )
-        {
-            FAPI_EXEC_HWP(rc, p8_pcbs_init, i_target, effective_mode);
-            if (rc)
-            {
-              FAPI_ERR("ERROR: p8_pm_init detected failed PCBS_PM result");
-              break;
-            }
-        }
-
-
-        if ( i_target2.getType() != TARGET_TYPE_NONE )
-        {
-            FAPI_EXEC_HWP(rc, p8_pcbs_init, i_target2, effective_mode);
-            if (rc)
-            {
-                FAPI_ERR("ERROR: p8_pm_init detected failed PCBS_PM result");
-                break;
-            }
-        }
-        //  ******************************************************************
-        //  PMC
-        //  ******************************************************************
-
-        FAPI_INF("Executing: p8_pmc_init in mode %s", PM_MODE_NAME(i_mode));
-
-        FAPI_EXEC_HWP(rc, p8_pmc_init, i_target, i_target2, i_mode);
-        if (rc)
-        {
-            FAPI_ERR("ERROR: p8_pm_init detected failed PMC result");
-            break;
-        }
-
-        //  ******************************************************************
-        //  PORE Sleep/Winkle engine
-        //  ******************************************************************
-
-        // Run SLW for hard reset and hard init and any config. So as to not
-        // touch the hardware, skip for soft reset and soft init.
-        // if (!(mode == PM_INIT_SOFT || mode == PM_RESET_SOFT ))
-//         {
-//             FAPI_INF("Executing: p8_poreslw_init in mode %x", mode);
-//             if ( i_target.getType() != TARGET_TYPE_NONE )
-//             {
-//                 FAPI_EXEC_HWP(rc, p8_poreslw_init, i_target, mode);
-//                 if (rc)
-//                 {
-//                     FAPI_ERR("ERROR: p8_pm_init detected failed PORE SLW result");
-//                     break;
-//                 }
-//             }
-// 
-//             if ( i_target2.getType() != TARGET_TYPE_NONE )
-//             {
-//                 FAPI_EXEC_HWP(rc, p8_poreslw_init, i_target2, mode);
-//                 if (rc)
-//                 {
-//                     FAPI_ERR("ERROR: p8_pm_init detected failed PORE SLW result");
-//                     break;
-//                 }
-//             }
-//         }
-//         else
-//         {
-//             FAPI_INF("Skipping p8_poreslw_init for mode %x - either soft init or soft reset", mode);
-//         }
-        //  ******************************************************************
-        //  PORE General Purpose Engines
-        //  ******************************************************************
-
-        FAPI_INF("Executing: p8_poregpe_init in mode %x", effective_mode);
-
-        if ( i_target.getType() != TARGET_TYPE_NONE )
-        {
-            FAPI_EXEC_HWP(rc, p8_poregpe_init, i_target, effective_mode , GPEALL);
-            if (rc)
-            {
-                FAPI_ERR("ERROR: p8_pm_init detected failed PORE GPE result");
-                break;
-            }
-        }
-
-        if ( i_target2.getType() != TARGET_TYPE_NONE )
-        {
-            FAPI_EXEC_HWP(rc, p8_poregpe_init, i_target2, effective_mode , GPEALL);
-            if (rc)
-            {
-                FAPI_ERR("ERROR: p8_pm_init detected failed PORE GPE result");
-                break;
-            }
-        }
-        //  ******************************************************************
-        //  OHA
-        //  ******************************************************************
-
-        // FAPI_INF("Executing: p8_oha_init in mode %s", PM_MODE_NAME(effective_mode));
-        //          
-        // if ( i_target.getType() != TARGET_TYPE_NONE )
-        // {
-        //     FAPI_EXEC_HWP(rc, p8_oha_init, i_target, effective_mode);
-        //     if (rc)
-        //     {
-        //         FAPI_ERR("ERROR: p8_pm_init detected failed OHA result");
-        //         break;
-        //     }
-        // }
-        //
-        // if ( i_target2.getType() != TARGET_TYPE_NONE )
-        // {
-        //     FAPI_EXEC_HWP(rc, p8_oha_init, i_target2, effective_mode);
-        //     if (rc)
-        //     {
-        //         FAPI_ERR("ERROR: p8_pm_init detected failed OHA result");
-        //         break;
-        //     }
-        // }
-
-        //  ******************************************************************
-        //  OCC-SRAM
-        //  ******************************************************************
-
-
-        FAPI_INF("Executing: p8_occ_sram_init in mode %s", PM_MODE_NAME(effective_mode));
-
-        if ( i_target.getType() != TARGET_TYPE_NONE )
-        {
-            FAPI_EXEC_HWP(rc, p8_occ_sram_init, i_target, effective_mode );
-            if (rc)
-            {
-                FAPI_ERR("ERROR: p8_pm_init detected failed OCC-SRAM result");
-                break;
-            }
-        }
-
-        if ( i_target2.getType() != TARGET_TYPE_NONE )
-        {
-            FAPI_EXEC_HWP(rc, p8_occ_sram_init, i_target2, effective_mode );
-            if (rc)
-            {
-                FAPI_ERR("ERROR: p8_pm_init detected failed OCC-SRAM result");
-             break;
-            }
-        }
-
-        //  ******************************************************************
-        //  OCB
-        //  ******************************************************************
-
-        FAPI_INF("Executing: p8_ocb_init in mode %s", PM_MODE_NAME(effective_mode));
-        if ( i_target.getType() != TARGET_TYPE_NONE )
-        {
-            if (effective_mode == PM_RESET)
-            {
-                rc = ocb_channel_reset(i_target, effective_mode);
-                if (rc)
-                {
-                    FAPI_ERR("ERROR: p8_pm_init detected ocb_channel_reset error");
-                    break;
-                }
-            }
-            else if (effective_mode == PM_INIT)
-            {
-                rc = ocb_channel_init(i_target);
-                if (rc)
-                {
-                    FAPI_ERR("ERROR: p8_pm_init detected ocb_channel_init error");
-                    break;
-                }                       
-            }
-        }
-
-        if ( i_target2.getType() != TARGET_TYPE_NONE )
-        {
-            if (effective_mode == PM_RESET)
-            {
-                rc = ocb_channel_reset(i_target2, effective_mode);
-                if (rc)
-                {
-                    FAPI_ERR("ERROR: p8_pm_init detected ocb_channel_reset error");
-                    break;
-                }
-            }
-            else if (effective_mode == PM_INIT)
-            {
-                rc = ocb_channel_init(i_target2);
-                if (rc)
-                {
-                    FAPI_ERR("ERROR: p8_pm_init detected ocb_channel_init error");
-                    break;
-                }                       
-            }
-        }
-
-
-        //  ******************************************************************
-        //  PSS
-        //  ******************************************************************
-
-        FAPI_INF("Executing:p8_pss_init in effective_mode %s", PM_MODE_NAME(effective_mode));
-
-        if ( i_target.getType() != TARGET_TYPE_NONE )
-        {
-
-            FAPI_EXEC_HWP(rc, p8_pss_init, i_target, effective_mode );
-            if (rc)
-            {
-                FAPI_ERR("ERROR: p8_pm_init detected failed PSS result");
-                break;
-            }
-        }
-
-        if ( i_target2.getType() != TARGET_TYPE_NONE )
-        {
-            FAPI_EXEC_HWP(rc, p8_pss_init, i_target2, effective_mode );
-            if (rc)
-            {
-                FAPI_ERR("ERROR: p8_pm_init detected failed PSS result");
-                break;
-            }
-        }
-
-        //  ******************************************************************
-        //  PBA
-        //  ******************************************************************
-
-        FAPI_INF("Executing: p8_pba_init  in effective_mode %s", PM_MODE_NAME(effective_mode));
-        if ( i_target.getType() != TARGET_TYPE_NONE )
-        {
-            FAPI_EXEC_HWP(rc, p8_pba_init, i_target, effective_mode );
-            if (rc)
-            {
-                FAPI_ERR("ERROR: p8_pm_init detected failed PBA result");
-                break;
-            }
-        }
-
-        if ( i_target2.getType() != TARGET_TYPE_NONE )
-        {
-            FAPI_EXEC_HWP(rc, p8_pba_init, i_target2, effective_mode );
-            if (rc)
-            {
-                FAPI_ERR("ERROR: p8_pm_init detected failed PBA result");
-                break;
-            }
-        }
-
-        if (effective_mode == PM_INIT)
-        {
-            //  ******************************************************************
-            //  FIRINIT
-            //  ******************************************************************
-
-
-            FAPI_INF("Executing:p8_pm_firinit in effective_mode %s", PM_MODE_NAME(i_mode));
-
-            if ( i_target.getType() != TARGET_TYPE_NONE )
-            {
-
-                FAPI_EXEC_HWP(rc, p8_pm_firinit, i_target , i_mode );
-                if (rc)
-                {
-                    FAPI_ERR("ERROR: p8_pm_firinit detected failed  result");
-                    break;
-                }
-            }
-
-            if ( i_target2.getType() != TARGET_TYPE_NONE )
-            {
-
-                FAPI_EXEC_HWP(rc, p8_pm_firinit, i_target2 , i_mode );
-                if (rc)
-                {
-                    FAPI_ERR("ERROR: p8_pm_firinit detected failed  result");
-                    break;
-                }
-            }                                   
-
-            //  ******************************************************************
-            //  CPU_SPECIAL_WAKEUP switch off
-            //  ******************************************************************
-
-            if ( i_target.getType() != TARGET_TYPE_NONE )
-            {
-                rc = clear_occ_special_wakeups (i_target);
-                if (!rc.ok())
-                {
-                    break;
-                }
-            } 
-
-            if ( i_target2.getType() != TARGET_TYPE_NONE )
-            {
-                rc = clear_occ_special_wakeups (i_target2);
-                if (!rc.ok())
-                {
-                    break;
-                }                  
-            } 
-                        
-        } // PM_INIT special stuff
-        
-        //  Check for xstops and recoverables
-        rc = p8_pm_glob_fir_trace (i_target, "end of p8_pm_init_list");
-        if (!rc.ok()) 
-        {
-            break;
-        }  
-
-    } while(0);
-
-    FAPI_INF("p8_pm_list end in mode %s", PM_MODE_NAME(i_mode));
-    return rc;
-
-}
-
-/**
- * clear_occ_special_wakeups - clears OCC special wake-up on all configured EXs
- *
- * @param[in] i_target   Chip target w
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-clear_occ_special_wakeups (const fapi::Target &i_target)
-{
-    fapi::ReturnCode                rc;
-    uint32_t                        e_rc = 0; 
-    uint64_t                        SP_WKUP_REG_ADDRS;
-    ecmdDataBufferBase              data(64);   
-    std::vector<fapi::Target>       l_exChiplets;
-    uint8_t                         l_ex_number = 0;    
-    
-    do
-    {   
-             
-        rc = fapiGetChildChiplets (  i_target,
-                          TARGET_TYPE_EX_CHIPLET,
-                          l_exChiplets,
-                          TARGET_STATE_FUNCTIONAL);
-        if (rc)
-        {
-          FAPI_ERR("Error from fapiGetChildChiplets!");
-          break;
-        }
-
-        FAPI_DBG("\tChiplet vector size  => %u ", l_exChiplets.size());
-
-        // Iterate through the returned chiplets
-        for (uint8_t j=0; j < l_exChiplets.size(); j++)
-        {
-            // Build the SCOM address
-            rc = FAPI_ATTR_GET( ATTR_CHIP_UNIT_POS, 
-                                &l_exChiplets[j], 
-                                l_ex_number);
-            if (rc)
-            {
-                FAPI_ERR("Error from ATTR_GET for chip position!");
-                break;
-            }
-            FAPI_DBG("Clearing OCC special wakeup on ex chiplet %d ", 
-                                l_ex_number);
-                        
-            e_rc |= data.flushTo0();
-            E_RC_CHECK(e_rc, rc);
-            
-            SP_WKUP_REG_ADDRS = PM_SPECIAL_WKUP_OCC_0x100F010C + 
-                                (l_ex_number  * 0x01000000) ;
-            
-            PUTSCOM(rc, i_target, SP_WKUP_REG_ADDRS, data);
-            
-        }  // chiplet loop
-        if (!rc.ok())
-        {
-            break;
-        }
-    } while(0);
-    return rc;
-}
-
-
-} //end extern C
-
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_init.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_init.H
deleted file mode 100755
index c020e317d..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_init.H
+++ /dev/null
@@ -1,86 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_init.H $            */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_init.H,v 1.7 2013/04/06 02:14:19 pchatnah Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_init.H,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Greg Still       Email: stillgs@us.ibm.com
-// *!
-// *! General Description:
-// *!        
-// *!  include file for p8_pm_effective with constants, definitions, prototypes
-// *!
-//------------------------------------------------------------------------------
-//  
-
-#include "p8_pcbs_init.H"
-#include "p8_pmc_init.H"
-#include "p8_poreslw_init.H"
-#include "p8_poregpe_init.H"
-#include "p8_oha_init.H"
-#include "p8_pba_init.H"    //FIXME was not compiling check with Klaus
-#include "p8_occ_sram_init.H"
-#include "p8_ocb_init.H"
-#include "p8_pss_init.H"
-#include "p8_cpu_special_wakeup.H"
-#include "p8_pm_firinit.H"
-
-/**
-* @brief Function pointer typedef.
-*
-*/
-
-
-
-typedef fapi::ReturnCode (*p8_pm_init_FP_t)      (const fapi::Target&, const fapi::Target&, uint32_t);
-
-extern "C"
-{
-
-
-// enum p8_PM_FLOW_MODE {
-//         PM_CONFIG     = 0x1,
-//         PM_RESET      = 0x2,
-//         PM_INIT       = 0x3,
-//         PM_SETUP      = 0x4,
-//         PM_SETUP_PIB  = 0x5,
-//         PM_SETUP_ALL  = 0x6
-//         };
-
-
-// Base function   
-/// \param[in] i_target chip Target
-/// \param[in] mode   PM_CONFIG, PM_INIT             
-
-
-fapi::ReturnCode p8_pm_init(const fapi::Target  &i_target1 , const fapi::Target  &i_target2,  uint32_t mode);
-
-
-}
-
-
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.C
deleted file mode 100644
index 6bb9b96a5..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.C
+++ /dev/null
@@ -1,340 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.C $     */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-
-// $Id: p8_pm_occ_firinit.C,v 1.22 2014/07/09 14:49:32 daviddu Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_occ_firinit.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Jim Yacynych         Email: jimyac@us.ibm.com
-// *!
-/// \file p8_pm_occ_firinit.C
-/// \brief Configures the OCC LFIR Mask and Action
-
-/// \todo
-///
-/// Procedure Prereq:
-///   o System clocks are running
-/// \endverbatim
-///
-/// buildfapiprcd p8_pm_occ_firinit.C
-//------------------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-#include <fapi.H>
-#include "p8_scom_addresses.H"
-#include "p8_pm_occ_firinit.H"
-
-extern "C" {
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Constant definitions
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Macro definitions
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Global variables
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Function prototypes
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Function definitions
-// ----------------------------------------------------------------------
-
-/// \param[in]  i_target            => Chip Target
-
-/// \retval FAPI_RC_SUCCESS
-/// \retval ERROR
-fapi::ReturnCode
-p8_pm_occ_firinit(const fapi::Target& i_target , uint32_t mode)
-{
-    fapi::ReturnCode    rc;
-    ecmdDataBufferBase  fir(64);
-    ecmdDataBufferBase  action_0(64);
-    ecmdDataBufferBase  action_1(64);
-    ecmdDataBufferBase  mask(64);
-    ecmdDataBufferBase  data(64);
-    uint32_t            e_rc = 0;
-    uint8_t             ce_fir_disable = 0;;
-    uint64_t            attr_pm_occ_lfir_mask;
-    uint8_t             attr_pm_firinit_done_once_flag;
-
-    FAPI_DBG("Executing p8_pm_occ_firinit  ....");
-    
-    do
-    {
-       if (mode == PM_RESET)
-       {
-
-            // -----------
-            // SW260003
-            // -----------
-            rc = FAPI_ATTR_GET(ATTR_PM_FIRINIT_DONE_ONCE_FLAG, &i_target, attr_pm_firinit_done_once_flag);
-            if (!rc.ok()) {
-              FAPI_ERR("fapiGetAttribute of ATTR_PM_FIRINIT_DONE_ONCE_FLAG failed.");
-              break;
-            }
-            if (attr_pm_firinit_done_once_flag == 1) { 
-                rc = fapiGetScom(i_target, OCC_LFIR_MASK_0x01010803, data );
-                if (!rc.ok())
-                {
-                        FAPI_ERR("fapiGetScom(OCC_LFIR_MASK_0x01010803) failed.");
-                        break;
-                }
-                attr_pm_occ_lfir_mask = data.getDoubleWord(0);
-                rc = FAPI_ATTR_SET(ATTR_PM_OCC_LFIR_MASK, &i_target, attr_pm_occ_lfir_mask);
-                if (!rc.ok()) {
-                  FAPI_ERR("fapiSetAttribute of ATTR_PM_OCC_LFIR_MASK failed");
-                  break;
-                }
-            }
- 
-            e_rc  = mask.flushTo1();
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            // ------------
-            // OCC_FIR_MASK
-            // ------------
-            rc = fapiPutScom(i_target, OCC_LFIR_MASK_0x01010803, mask );
-            if (!rc.ok())
-            {
-	            FAPI_ERR("fapiPutScom(OCC_LFIR_MASK_0x01010803) failed.");
-	            break;
-            }
-        }
-        else
-        {
-
-            // Read attributes to determine mask modifications        
-            rc = FAPI_ATTR_GET(ATTR_CHIP_EC_FEATURE_OCC_CE_FIR_DISABLE,
-               &i_target,
-               ce_fir_disable);
-            if(rc)
-            {
-     		    FAPI_ERR("Error querying Chip EC feature: "
-                         "ATTR_CHIP_EC_FEATURE_OCC_CE_FIR_DISABLE");
-                break;
-            }
-           
-            FAPI_INF("OCC Correctable error FIRs are %s",
-                     (ce_fir_disable ? "MASKED" : "ENABLED"));
-                          
-            // Clear the FIR
-            e_rc |= fir.flushTo0();
-            
-            // make action default be RECOV_ATTN - "01"
-            e_rc |= action_0.flushTo0();
-            e_rc |= action_1.flushTo1();
-
-            // make mask default be unmasked - "0"
-            e_rc |= mask.flushTo0()    ;
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            // ------------------------------------------------------------------------
-            // set the action and mask for the OCC LFIR bits using the following macros
-            // ------------------------------------------------------------------------
-            //   Action0/1 Setting Macros - 4 possible settings
-            //     SET_CHECK_STOP(b) - sets action0/1 to "00" for LFIR bit b
-            //     SET_RECOV_ATTN(b) - sets action0/1 to "01" for LFIR bit b
-            //     SET_RECOV_INTR(b) - sets action0/1 to "10" for LFIR bit b
-            //     SET_MALF_ALERT(b) - sets action0/1 to "11" for LFIR bit b
-            //
-            //  Mask Setting Macro
-            //   SET_FIR_MASKED(b) - sets mask to '1' for LFIR bit b
-            // ------------------------------------------------------------------------
-
-            SET_MALF_ALERT(0);  SET_FIR_MASKED(0);        //  0 = occ_fw0
-            SET_MALF_ALERT(1);  SET_FIR_MASKED(1);        //  1 = occ_fw1
-            SET_MALF_ALERT(2);  SET_FIR_MASKED(2);        //  2 = occ_fw2
-            SET_MALF_ALERT(3);  SET_FIR_MASKED(3);        //  3 = occ_fw3
-            SET_MALF_ALERT(4);  SET_FIR_MASKED(4);        //  4 = pmc_pore_sw_malf
-            SET_MALF_ALERT(5);  SET_FIR_MASKED(5);        //  5 = pmc_occ_hb_malf
-
-            SET_RECOV_ATTN(6);  SET_FIR_MASKED(6);        //  6 = pore_gpe0_fatal_err
-            SET_RECOV_ATTN(7);  SET_FIR_MASKED(7);        //  7 = pore_gpe1_fatal_err
-            SET_RECOV_INTR(8);                            //  8 = ocb_error
-            SET_RECOV_INTR(9);                            //  9 = srt_ue
-            SET_RECOV_ATTN(10);                           //  10 = srt_ce
-            if (ce_fir_disable)
-            {
-                SET_FIR_MASKED(10);
-            }
-            SET_RECOV_INTR(11);                           //  11 = srt_read_error
-            SET_RECOV_INTR(12);                           //  12 = srt_write_error
-            SET_RECOV_INTR(13);                           //  13 = srt_dataout_perr
-            SET_RECOV_INTR(14);                           //  14 = srt_oci_write_data_parity
-            SET_RECOV_INTR(15);                           //  15 = srt_oci_be_parity_err
-            SET_RECOV_INTR(16);                           //  16 = srt_oci_addr_parity_err
-            SET_RECOV_ATTN(17); SET_FIR_MASKED(17);       //  17 = pore_sw_error_err                        
-            SET_RECOV_ATTN(18); SET_FIR_MASKED(18);       //  18 = pore_gpe0_error_err                      
-            SET_RECOV_ATTN(19); SET_FIR_MASKED(19);       //  19 = pore_gpe1_error_err                      
-            SET_RECOV_ATTN(20); SET_FIR_MASKED(20);       //  20 = external_trap                            
-            SET_RECOV_ATTN(21); SET_FIR_MASKED(21);       //  21 = ppc405_core_reset                        
-            SET_RECOV_ATTN(22); SET_FIR_MASKED(22);       //  22 = ppc405_chip_reset                        
-            SET_RECOV_ATTN(23); SET_FIR_MASKED(23);       //  23 = ppc405_system_reset                      
-            SET_RECOV_ATTN(24); SET_FIR_MASKED(24);       //  24 = ppc405_dbgmsrwe                          
-            SET_RECOV_ATTN(25); SET_FIR_MASKED(25);       //  25 = ppc405_dbgstopack                        
-            SET_RECOV_ATTN(26);                           //  26 = ocb_db_oci_timeout
-            SET_RECOV_ATTN(27);                           //  27 = ocb_db_oci_read_data_parity
-            SET_RECOV_ATTN(28);                           //  28 = ocb_db_oci_slave_error
-            SET_RECOV_ATTN(29);                           //  29 = ocb_pib_addr_parity_err
-            SET_RECOV_ATTN(30);                           //  30 = ocb_db_pib_data_parity_err
-            SET_RECOV_ATTN(31); SET_FIR_MASKED(31);       //  31 = ocb_idc0_error
-            SET_RECOV_ATTN(32); SET_FIR_MASKED(32);       //  32 = ocb_idc1_error
-            SET_RECOV_ATTN(33); SET_FIR_MASKED(33);       //  33 = ocb_idc2_error
-            SET_RECOV_ATTN(34); SET_FIR_MASKED(34);       //  34 = ocb_idc3_error
-            SET_RECOV_INTR(35);                           //  35 = srt_fsm_err
-            SET_RECOV_ATTN(36); SET_FIR_MASKED(36);       //  36 = jtagacc_err
-            SET_RECOV_ATTN(37); SET_FIR_MASKED(37);       //  37 = spare_err_37
-            SET_RECOV_INTR(38);                           //  38 = c405_ecc_ue
-            SET_RECOV_ATTN(39);                           //  39 = c405_ecc_ce
-            if (ce_fir_disable)
-            {
-                SET_FIR_MASKED(39);
-            }
-            SET_RECOV_ATTN(40); SET_FIR_MASKED(40);       //  40 = c405_oci_machinecheck
-            SET_RECOV_ATTN(41); SET_FIR_MASKED(41);       //  41 = sram_spare_direct_error0
-            SET_RECOV_ATTN(42); SET_FIR_MASKED(42);       //  42 = sram_spare_direct_error1
-            SET_RECOV_ATTN(43); SET_FIR_MASKED(43);       //  43 = sram_spare_direct_error2
-            SET_RECOV_ATTN(44); SET_FIR_MASKED(44);       //  44 = sram_spare_direct_error3
-            SET_RECOV_ATTN(45); SET_FIR_MASKED(45);       //  45 = slw_ocislv_err (SW250823)
-            SET_RECOV_INTR(46);                           //  46 = gpe_ocislv_err
-            SET_RECOV_INTR(47);                           //  47 = ocb_ocislv_err
-            SET_RECOV_ATTN(48); SET_FIR_MASKED(48);       //  48 = c405icu_m_timeout
-            SET_RECOV_ATTN(49); SET_FIR_MASKED(49);       //  49 = c405dcu_m_timeout
-            SET_RECOV_ATTN(50);                           //  50 = occ_complex_fault_safe         
-            SET_RECOV_ATTN(51); SET_FIR_MASKED(51);       //  51 = spare_fir                   
-            SET_RECOV_ATTN(52); SET_FIR_MASKED(52);       //  52 = spare_fir                   
-            SET_RECOV_ATTN(53); SET_FIR_MASKED(53);       //  53 = spare_fir                   
-            SET_RECOV_ATTN(54); SET_FIR_MASKED(54);       //  54 = spare_fir                   
-            SET_RECOV_ATTN(55); SET_FIR_MASKED(55);       //  55 = spare_fir                   
-            SET_RECOV_ATTN(56); SET_FIR_MASKED(56);       //  56 = spare_fir                   
-            SET_RECOV_ATTN(57); SET_FIR_MASKED(57);       //  57 = spare_fir                   
-            SET_RECOV_ATTN(58); SET_FIR_MASKED(58);       //  58 = spare_fir                   
-            SET_RECOV_ATTN(59); SET_FIR_MASKED(59);       //  59 = spare_fir                   
-            SET_RECOV_ATTN(60); SET_FIR_MASKED(60);       //  60 = spare_fir                   
-            SET_RECOV_ATTN(61); SET_FIR_MASKED(61);       //  61 = spare_fir                   
-            SET_RECOV_ATTN(62);                           //  62 = fir_parity_err_dup
-            SET_RECOV_ATTN(63);                           //  63 = fir_parity_err
-
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }
-            
-            // ---------------
-            // OCC_FIR - cleared
-            // ---------------
-            rc = fapiPutScom(i_target, OCC_LFIR_0x01010800, fir);
-            if (!rc.ok())
-            {
-                FAPI_ERR("fapiPutScom(OCC_LFIR_0x01010800) failed.");
-                 break;
-            }
-            
-
-            FAPI_DBG(" action_0  => 0x%16llx ",  action_0.getDoubleWord(0));
-            FAPI_DBG(" action_1  => 0x%16llx ",  action_1.getDoubleWord(0));
-            FAPI_DBG(" mask      => 0x%16llx ",  mask.getDoubleWord(0));
-
-            // ---------------
-            // OCC_FIR_ACTION0
-            // ---------------
-            rc = fapiPutScom(i_target, OCC_LFIR_ACT0_0x01010806, action_0 );
-            if (!rc.ok())
-            {
-                FAPI_ERR("fapiPutScom(OCC_LFIR_ACT0_0x01010806) failed.");
-                break;
-            }
-
-            // ----------------
-            // OCC_FIR_ACTION1
-            // ----------------
-            rc = fapiPutScom(i_target, OCC_LFIR_ACT1_0x01010807, action_1 );
-            if (!rc.ok())
-            {
-                FAPI_ERR("fapiPutScom(OCC_LFIR_ACT1_0x01010807) failed.");
-                    break;
-            }
-
-            // -----------
-            // SW260003
-            // -----------
-            rc = FAPI_ATTR_GET(ATTR_PM_FIRINIT_DONE_ONCE_FLAG, &i_target, attr_pm_firinit_done_once_flag);
-            if (!rc.ok()) {
-              FAPI_ERR("fapiGetAttribute of ATTR_PM_FIRINIT_DONE_ONCE_FLAG failed.");
-              break;
-            }
-            if (attr_pm_firinit_done_once_flag) {
-                rc = FAPI_ATTR_GET(ATTR_PM_OCC_LFIR_MASK, &i_target, attr_pm_occ_lfir_mask);
-                if (!rc.ok()) {
-                  FAPI_ERR("fapiGetAttribute of ATTR_PM_OCC_LFIR_MASK failed.");
-                  break;
-                }
-                e_rc |= data.setDoubleWord(0, attr_pm_occ_lfir_mask);
-                e_rc |= mask.setOr(data, 0, 64);
-                if (e_rc)
-                {
-                    rc.setEcmdError(e_rc);
-                    break;
-                }
-            }
-
-            // ------------
-            // OCC_FIR_MASK
-            // ------------
-            rc = fapiPutScom(i_target, OCC_LFIR_MASK_0x01010803, mask );
-            if (!rc.ok())
-            {
-                FAPI_ERR("fapiPutScom(OCC_LFIR_MASK_0x01010803) failed.");
-                break;
-            }
-        }
-    } while(0);
-    return rc ;
-} // end p8_pm_occ_firinit
-
-} //end extern C
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.H
deleted file mode 100644
index d3c6a4538..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.H
+++ /dev/null
@@ -1,63 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.H $     */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_occ_firinit.H,v 1.7 2013/08/26 12:44:32 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_occ_firinit.H,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2012
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! TITLE       : proc_pm_oha_firinit.H
-// *! DESCRIPTION : Configures the OCC LFIR Mask and Action 
-// *!
-// *! OWNER NAME: Jim Yacynych         Email: jimyac@us.ibm.com
-// *!
-//------------------------------------------------------------------------------
-
-#ifndef _P8_PM_OCC_FIRINIT_H_
-#define _P8_PM_OCC_FIRINIT_H_
-
-#include "p8_pm_firinit.H"
-#include <fapi.H>
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_pm_occ_firinit_FP_t) (const fapi::Target& , uint32_t mode);
-
-const uint32_t        OCC_FIR_REGISTER_LENGTH = 64 ;
-
-
-extern "C" {
-//------------------------------------------------------------------------------
-// Function prototype
-//------------------------------------------------------------------------------
-/// \brief  Configures the OCC LFIR Mask and Action
-/// \param[in]  i_target              => Chip Target
-
-fapi::ReturnCode 
-p8_pm_occ_firinit(const fapi::Target& i_target , uint32_t mode);
- 
-} // extern "C"
-
-#endif 
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_oha_firinit.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_oha_firinit.C
deleted file mode 100644
index 78d0fde3d..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_oha_firinit.C
+++ /dev/null
@@ -1,217 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_oha_firinit.C $     */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_oha_firinit.C,v 1.13 2013/09/25 22:35:00 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_oha_firinit.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Pradeep CN         Email: pradeepcn@in.ibm.com
-// *!
-// *! General Description: Configures the FIR errors
-// *!        
-// *!   The purpose of this procedure is to ......
-// *!   
-// *!   High-level procedure flow:
-// *!     o Set the particluar bits of databuffers action0 , action 1 and mask for the correspoding actions via MACROS
-// *!     o Write the action1 , actionn0 and mask registers of FIRs
-// *!     o 
-// *!     o 
-// *!     o 
-// *!     o 
-// *!
-// *!     o Check if all went well
-// *!     o   If so celebrate 
-// *!     o   Else write logs, set bad return code
-// *!
-// *! Procedure Prereq:
-// *!   o System clocks are running
-// *!
-//------------------------------------------------------------------------------
-
-
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-
-#include <fapi.H>
-#include "p8_scom_addresses.H"
-#include "p8_pm_oha_firinit.H"
-
-
-extern "C" {
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Constant definitions
-// ----------------------------------------------------------------------
-// #define SET_CHECK_STOP(b){SET_FIR_ACTION(b, 0, 0);}
-// #define SET_RECOV_ATTN(b){SET_FIR_ACTION(b, 0, 1);}
-// #define SET_RECOV_INTR(b){SET_FIR_ACTION(b, 1, 0);}
-// #define SET_MALF_ALERT(b){SET_FIR_ACTION(b, 1, 1);}
-// #define SET_FIR_MASKED(b){SET_FIR_MASK(b,1);}
-
-
-// ----------------------------------------------------------------------
-// Global variables
-// ----------------------------------------------------------------------
-
-
-//------------------------------------------------------------------------------
-// Function prototypes
-//------------------------------------------------------------------------------
-
-//------------------------------------------------------------------------------
-// function: FAPI p8_pm_oha_firinit  HWP entry point
-//           operates on chips passed in i_target argument to perform
-//           desired settings of FIRS of OHA macro 
-// parameters: i_target        => chip target
-
-// returns: FAPI_RC_SUCCESS if all specified operations complete successfully,
-//          else return code for failing operation
-//------------------------------------------------------------------------------
-fapi::ReturnCode
-p8_pm_oha_firinit(const fapi::Target &i_target , uint32_t mode )
-{
-    fapi::ReturnCode                rc;
-    //    fapi::TargetState               l_state = TARGET_STATE_FUNCTIONAL; 
-    ecmdDataBufferBase              mask(64);
-    uint32_t                        e_rc = 0;
-        
-    std::vector<fapi::Target>       l_chiplets;
-    std::vector<Target>::iterator   itr;    
-
-
-    
-
-    FAPI_INF("Executing proc_pm_oha_firinit  ...");
-    
-    do
-    {
-
-       //#--  OHA_ERROR_AND_ERROR_MASK_REG:     0..1     WREG=0x0E OHA error and error mask register 
-       //#--  tpc_oha1_mac_inst.error_mask      0..5     SCOM    
-       //#--  0..5    RW      oha_error_mask  Error mask for OHA/DPLL error reporting registers
-
-       if (mode == PM_RESET)
-       {                                
-            rc = fapiGetChildChiplets ( i_target, 
-                                        TARGET_TYPE_EX_CHIPLET, 
-                                        l_chiplets, 
-                                        TARGET_STATE_FUNCTIONAL); 
-            if (rc) 
-            {
-                FAPI_ERR("fapiGetChildChiplets failed."); 
-                break;
-            }
-            
-            FAPI_DBG("  chiplet vector size          => %u", l_chiplets.size());
-            
-            e_rc  = mask.flushTo0();
-            e_rc |= mask.setBit(0,OHA_FIR_REGISTER_LENGTH);
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }          
-
-            for (itr = l_chiplets.begin(); itr != l_chiplets.end(); itr++)
-            {
-                rc = fapiPutScom((*itr), EX_OHA_ERROR_ERROR_MASK_REG_RWx1002000E, mask );
-                if (rc) 
-                {
-                    FAPI_ERR("fapiPutScom(EX_OHA_ERROR_ERROR_MASK_REG_RWx1002000E) failed."); 
-                    break;
-                }
-            }
-            // Exit if error detected
-            if (!rc.ok())
-            {
-                break;
-            }
-       }
-       else 
-       {
-            e_rc = mask.flushTo0(); 
-
-            SET_FIR_MASKED(OHA21_PPT_TIMEOUT_ERR); //  OHA21_PPT_TIMEOUT_ERR            
-            SET_FIR_MASKED(NOT_CPM_BIT_SYNCED   ); //  NOT_CPM_BIT_SYNCED               
-            SET_FIR_MASKED(AISS_HANG_CONDITION  ); //  AISS_HANG_CONDITION              
-            SET_FIR_MASKED(TC_TC_THERM_TRIP0    ); //  TC_TC_THERM_TRIP0                
-            SET_FIR_MASKED(TC_TC_THERM_TRIP1    ); //  TC_TC_THERM_TRIP1                
-            SET_FIR_MASKED(PCB_ERR_TO_FIR       ); //  PCB_ERR_TO_FIR                   
-    
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            //    #--***********************************************************
-            //    #-- Mask  EX_OHA_ERROR_ERROR_MASK_REG_RWx1002000E
-            //    #--***********************************************************
-            
-            rc = fapiGetChildChiplets(   i_target,
-                                         fapi::TARGET_TYPE_EX_CHIPLET,
-                                         l_chiplets,
-                                         TARGET_STATE_FUNCTIONAL);
-            if (rc) 
-            {
-	            FAPI_ERR("fapiGetChildChiplets failed."); 
-                break;
-	        }
-           
-            FAPI_DBG("  chiplet vector size          => %u", l_chiplets.size());
-
-            for (itr = l_chiplets.begin(); itr != l_chiplets.end(); itr++)
-            {                
-
-                rc = fapiPutScom( (*itr), 
-                                  EX_OHA_ERROR_ERROR_MASK_REG_RWx1002000E, 
-                                  mask );
-                if (rc)
-                {
-                     FAPI_ERR("fapiPutScom(EX_OHA_ERROR_ERROR_MASK_REG_RWx1002000E) failed.");
-                     break;
-                }              
-            } // Chiplet loop
-            
-            // Exit if error detected
-            if (!rc.ok())
-            {
-                break;
-            }
-        } // Mode
-        
-    } while(0);
-
-    return rc;
-
-} // Procedure
-
-} //end extern C
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_oha_firinit.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_oha_firinit.H
deleted file mode 100755
index 2e47e1ec7..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_oha_firinit.H
+++ /dev/null
@@ -1,82 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_oha_firinit.H $     */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_oha_firinit.H,v 1.6 2013/08/26 12:44:33 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_oha_firinit.H,v $
-//------------------------------------------------------------------------------
-// *|
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-// *|
-// *! TITLE       : proc_pm_oha_firinit.H
-// *! DESCRIPTION : SETS OHA firs to proper error settings
-// *!
-// *! OWNER NAME  : Greg Still    Email: stillgs@us.ibm.com
-// *! BACKUP NAME : Pradeep CN    Email: padeepcn@in.ibm.com
-// *!
-//------------------------------------------------------------------------------
-#include "p8_pm_firinit.H"
-
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_pm_oha_firinit_FP_t) (const fapi::Target& , uint32_t mode );
-
-const uint32_t        OHA_FIR_REGISTER_LENGTH = 6;
-enum OHA_FIRS 
-{    
-    OHA21_PPT_TIMEOUT_ERR       = 0,
-    NOT_CPM_BIT_SYNCED          = 1,
-    AISS_HANG_CONDITION         = 2,
-    TC_TC_THERM_TRIP0           = 3,
-    TC_TC_THERM_TRIP1           = 4,
-    PCB_ERR_TO_FIR              = 5    
-};
-
-extern "C" {
-
-
-fapi::ReturnCode 
-p8_pm_oha_firinit(const fapi::Target& i_target, uint32_t mode );
-
-//------------------------------------------------------------------------------
-// Function prototypes
-//------------------------------------------------------------------------------
-
-//------------------------------------------------------------------------------
-// function: FAPI p8_pm_oha_firinit  HWP entry point
-//           operates on chips passed in i_target argument to perform
-//           desired settings of FIRS of OHA macro 
-// parameters: i_target        => chip target
-
-// returns: FAPI_RC_SUCCESS if all specified operations complete successfully,
-//          else return code for failing operation
-//------------------------------------------------------------------------------
-
-
-
-
-} // extern "C"
-
-
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.C
deleted file mode 100755
index 16aa2d801..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.C
+++ /dev/null
@@ -1,291 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.C $     */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-
-// $Id: p8_pm_pba_firinit.C,v 1.22 2014/07/09 14:49:32 daviddu Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pba_firinit.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Pradeep CN         Email: pradeepcn@in.ibm.com
-// *! OWNER NAME: Greg Still         Email: stillgs@us.ibm.com
-/// \file p8_pm_pba_firinit.C
-/// \brief Configure the PBA FIR
-///
-/// \verbatim
-///
-///   if RESET
-///       masks all bits of the FIR k
-///
-///   else
-///       using macros defined in p8_pm.H to establish the respective
-///       mask/action bits in the relevant ecmdbuffer for one of the following
-///       settings:
-///           a) Masked
-///           b) Recoverable Attention
-///           c) Checkstop
-///
-///  Procedure Prereq:
-///    o System clocks are running
-///
-/// \endverbatim
-/// buildfapiprcd p8_pm_pba_firinit.C
-//------------------------------------------------------------------------------
-
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-#include <fapi.H>
-#include "p8_scom_addresses.H"
-#include "p8_pm_pba_firinit.H"
-
-extern "C" {
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Constant definitions
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Global variables
-// ----------------------------------------------------------------------
-
-fapi::ReturnCode
-p8_pm_pba_firinit(const fapi::Target&  i_target , uint32_t mode )
-{
-
-//------------------------------------------------------------------------------
-// Function prototypes
-//------------------------------------------------------------------------------
-
-//------------------------------------------------------------------------------
-// function: FAPI p8_pm_pba_firinit  HWP entry point
-//           operates on chips passed in i_target argument to perform
-//           desired settings of FIRS of PBA macro
-// parameters: i_target        => chip target
-
-// returns: FAPI_RC_SUCCESS if all specified operations complete successfully,
-//          else return code for failing operation
-//------------------------------------------------------------------------------
-
-    fapi::ReturnCode    rc;
-    ecmdDataBufferBase  fir(64);
-    ecmdDataBufferBase  action_0(64);
-    ecmdDataBufferBase  action_1(64);
-    ecmdDataBufferBase  mask(64);
-    ecmdDataBufferBase  data(64);
-    uint32_t            e_rc = 0;
-    uint64_t            attr_pm_pba_fir_mask;
-    uint8_t             attr_pm_firinit_done_once_flag;
-
-    FAPI_DBG("Executing p8_pm_pba_firinit  ....");
-    do
-    {
-        if (mode == PM_RESET)
-        {
-
-            // -----------
-            // SW260003
-            // -----------
-            rc = FAPI_ATTR_GET(ATTR_PM_FIRINIT_DONE_ONCE_FLAG, &i_target, attr_pm_firinit_done_once_flag);
-            if (!rc.ok()) {
-              FAPI_ERR("fapiGetAttribute of ATTR_PM_FIRINIT_DONE_ONCE_FLAG failed.");
-              break;
-            }
-            if (attr_pm_firinit_done_once_flag == 1) { 
-                rc = fapiGetScom(i_target, PBA_FIR_MASK_0x02010843, data );
-                if (!rc.ok())
-                {
-                        FAPI_ERR("fapiGetScom(PBA_FIR_MASK_0x02010843) failed.");
-                        break;
-                }
-                attr_pm_pba_fir_mask = data.getDoubleWord(0);
-                rc = FAPI_ATTR_SET(ATTR_PM_PBA_FIR_MASK, &i_target, attr_pm_pba_fir_mask);
-                if (!rc.ok()) {
-                  FAPI_ERR("fapiSetAttribute of ATTR_PM_PBA_FIR_MASK failed");
-                  break;
-                }
-            }    
-
-            e_rc  = mask.flushTo1();
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            //--******************************************************************************
-            //-- PBA_FIR_MASK (W0_OR_45) (WR_43) (WO_AND_44)
-            //--******************************************************************************
-            rc = fapiPutScom(i_target, PBA_FIR_MASK_0x02010843, mask );
-            if (rc)
-            {
-	            FAPI_ERR("fapiPutScom(PBA_FIR_MASK_0x02010843) failed.");
-                break;
-            }
-        }
-        else
-        {
-            e_rc |= fir.flushTo0();
-            e_rc |= action_0.flushTo0();
-            e_rc |= action_1.flushTo0();
-            e_rc |= mask.flushTo0()    ;
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            SET_RECOV_ATTN  (PBAFIR_OCI_APAR_ERR      ) ; // 0   PBAFIR_OCI_APAR_ERR
-            SET_RECOV_ATTN  (PBAFIR_PB_RDADRERR_FW    ) ; // 1   PBAFIR_PB_RDADRERR_FW
-            SET_RECOV_ATTN  (PBAFIR_PB_RDDATATO_FW    ) ; // 2   PBAFIR_PB_RDDATATO_FW
-            SET_RECOV_ATTN  (PBAFIR_PB_SUE_FW         ) ; // 3   PBAFIR_PB_SUE_FW
-            SET_RECOV_ATTN  (PBAFIR_PB_UE_FW          ) ; // 4   PBAFIR_PB_UE_FW
-            SET_RECOV_ATTN  (PBAFIR_PB_CE_FW          ) ; // 5   PBAFIR_PB_CE_FW
-            SET_RECOV_ATTN  (PBAFIR_OCI_SLAVE_INIT    ) ; // 6   PBAFIR_OCI_SLAVE_INIT
-            SET_RECOV_ATTN  (PBAFIR_OCI_WRPAR_ERR     ) ; // 7   PBAFIR_OCI_WRPAR_ERR
-            SET_FIR_MASKED  (PBAFIR_OCI_REREQTO       ) ; // 8   PBAFIR_OCI_REREQTO
-            SET_FIR_MASKED  (PBAFIR_PB_UNEXPCRESP     ) ; // 9   PBAFIR_PB_UNEXPCRESP
-            SET_RECOV_ATTN  (PBAFIR_PB_UNEXPDATA      ) ; // 10  PBAFIR_PB_UNEXPDATA
-            SET_RECOV_ATTN  (PBAFIR_PB_PARITY_ERR     ) ; // 11  PBAFIR_PB_PARITY_ERR
-            SET_RECOV_ATTN  (PBAFIR_PB_WRADRERR_FW    ) ; // 12  PBAFIR_PB_WRADRERR_FW
-            SET_RECOV_ATTN  (PBAFIR_PB_BADCRESP       ) ; // 13  PBAFIR_PB_BADCRESP
-            SET_RECOV_ATTN  (PBAFIR_PB_ACKDEAD_FW_RD  ) ; // 14  PBAFIR_PB_ACKDEAD_FW_RD
-            SET_RECOV_ATTN  (PBAFIR_PB_CRESPTO        ) ; // 15  PBAFIR_PB_CRESPTO
-            SET_FIR_MASKED  (PBAFIR_BCUE_SETUP_ERR    ) ; // 16  PBAFIR_BCUE_SETUP_ERR
-            SET_FIR_MASKED  (PBAFIR_BCUE_PB_ACK_DEAD  ) ; // 17  PBAFIR_BCUE_PB_ACK_DEAD
-            SET_FIR_MASKED  (PBAFIR_BCUE_PB_ADRERR    ) ; // 18  PBAFIR_BCUE_PB_ADRERR
-            SET_FIR_MASKED  (PBAFIR_BCUE_OCI_DATERR   ) ; // 19  PBAFIR_BCUE_OCI_DATERR
-            SET_FIR_MASKED  (PBAFIR_BCDE_SETUP_ERR    ) ; // 20  PBAFIR_BCDE_SETUP_ERR
-            SET_FIR_MASKED  (PBAFIR_BCDE_PB_ACK_DEAD  ) ; // 21  PBAFIR_BCDE_PB_ACK_DEAD
-            SET_FIR_MASKED  (PBAFIR_BCDE_PB_ADRERR    ) ; // 22  PBAFIR_BCDE_PB_ADRERR
-            SET_FIR_MASKED  (PBAFIR_BCDE_RDDATATO_ERR ) ; // 23  PBAFIR_BCDE_RDDATATO_ERR
-            SET_FIR_MASKED  (PBAFIR_BCDE_SUE_ERR      ) ; // 24  PBAFIR_BCDE_SUE_ERR
-            SET_FIR_MASKED  (PBAFIR_BCDE_UE_ERR       ) ; // 25  PBAFIR_BCDE_UE_ERR
-            SET_FIR_MASKED  (PBAFIR_BCDE_CE           ) ; // 26  PBAFIR_BCDE_CE
-            SET_FIR_MASKED  (PBAFIR_BCDE_OCI_DATERR   ) ; // 27  PBAFIR_BCDE_OCI_DATERR
-            SET_RECOV_ATTN  (PBAFIR_INTERNAL_ERR      ) ; // 28  PBAFIR_INTERNAL_ERR
-            SET_RECOV_ATTN  (PBAFIR_ILLEGAL_CACHE_OP  ) ; // 29  PBAFIR_ILLEGAL_CACHE_OP
-            SET_RECOV_ATTN  (PBAFIR_OCI_BAD_REG_ADDR  ) ; // 30  PBAFIR_OCI_BAD_REG_ADDR
-            SET_FIR_MASKED  (PBAFIR_AXPUSH_WRERR      ) ; // 31  PBAFIR_AXPUSH_WRERR
-            SET_FIR_MASKED  (PBAFIR_AXRCV_DLO_ERR     ) ; // 32  PBAFIR_AXRCV_DLO_ERR
-            SET_FIR_MASKED  (PBAFIR_AXRCV_DLO_TO      ) ; // 33  PBAFIR_AXRCV_DLO_TO
-            SET_FIR_MASKED  (PBAFIR_AXRCV_RSVDATA_TO  ) ; // 34  PBAFIR_AXRCV_RSVDATA_TO
-            SET_FIR_MASKED  (PBAFIR_AXFLOW_ERR        ) ; // 35  PBAFIR_AXFLOW_ERR
-            SET_FIR_MASKED  (PBAFIR_AXSND_DHI_RTYTO   ) ; // 36  PBAFIR_AXSND_DHI_RTYTO
-            SET_FIR_MASKED  (PBAFIR_AXSND_DLO_RTYTO   ) ; // 37  PBAFIR_AXSND_DLO_RTYTO
-            SET_FIR_MASKED  (PBAFIR_AXSND_RSVTO       ) ; // 38  PBAFIR_AXSND_RSVTO
-            SET_FIR_MASKED  (PBAFIR_AXSND_RSVERR      ) ; // 39  PBAFIR_AXSND_RSVERR
-            SET_RECOV_ATTN  (PBAFIR_PB_ACKDEAD_FW_WR  ) ; // 40  PBAFIR_PB_ACKDEAD_FW_WR
-            SET_FIR_MASKED  (PBAFIR_RESERVED_41       ) ; // 41  PBAFIR_RESERVED_41
-            SET_FIR_MASKED  (PBAFIR_RESERVED_42       ) ; // 42  PBAFIR_RESERVED_42
-            SET_FIR_MASKED  (PBAFIR_RESERVED_43       ) ; // 43  PBAFIR_RESERVED_43
-            SET_RECOV_ATTN  (PBAFIR_FIR_PARITY_ERR2   ) ; // 44  PBAFIR_FIR_PARITY_ERR2
-            SET_RECOV_ATTN  (PBAFIR_FIR_PARITY_ERR    ) ; // 45  PBAFIR_FIR_PARITY_ERR
-
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            // ---------------
-            // PBA_FIR - cleared
-            // ---------------
-            rc = fapiPutScom(i_target, PBA_FIR_0x02010840, fir);
-            if (!rc.ok())
-            {
-                FAPI_ERR("fapiPutScom(PBA_FIR_0x02010840) failed.");
-                 break;
-            }
-
-            FAPI_DBG(" action_0  => 0x%16llx ",  action_0.getDoubleWord(0));
-            FAPI_DBG(" action_1  => 0x%16llx ",  action_1.getDoubleWord(0));
-            FAPI_DBG(" mask      => 0x%16llx ",  mask.getDoubleWord(0));
-
-            //#--******************************************************************************
-            //#-- PBA_FIR_ACTION0
-            //#--******************************************************************************
-
-            rc = fapiPutScom(i_target, PBA_FIR_ACTION0_0x02010846, action_0 );
-            if (rc)
-            {
-	            FAPI_ERR("fapiPutScom(PBA_FIR_ACTION0_0x02010846) failed.");
-                break;
-            }
-
-            //#--******************************************************************************
-            //#-- PBA_FIR_ACTION1
-            //#--******************************************************************************
-
-            rc = fapiPutScom(i_target, PBA_FIR_ACTION1_0x02010847, action_1 );
-            if (rc)
-            {
-	            FAPI_ERR("fapiPutScom(PBA_FIR_ACTION1_0x02010847) failed.");
-                break;
-            }
-
-            // -----------
-            // SW260003
-            // -----------
-            rc = FAPI_ATTR_GET(ATTR_PM_FIRINIT_DONE_ONCE_FLAG, &i_target, attr_pm_firinit_done_once_flag);
-            if (!rc.ok()) {
-              FAPI_ERR("fapiGetAttribute of ATTR_PM_FIRINIT_DONE_ONCE_FLAG failed.");
-              break;
-            }
-            if (attr_pm_firinit_done_once_flag) {
-                rc = FAPI_ATTR_GET(ATTR_PM_PBA_FIR_MASK, &i_target, attr_pm_pba_fir_mask);
-                if (!rc.ok()) {
-                  FAPI_ERR("fapiGetAttribute of ATTR_PM_PBA_FIR_MASK failed.");
-                  break;
-                }
-                e_rc |= data.setDoubleWord(0, attr_pm_pba_fir_mask);
-                e_rc |= mask.setOr(data, 0, 64);
-                if (e_rc)
-                {
-                    rc.setEcmdError(e_rc);
-                    break;
-                }
-            }
-
-            //--******************************************************************************
-            //-- PBA_FIR_MASK (W0_OR_45) (WR_43) (WO_AND_44)
-            //--******************************************************************************
-            rc = fapiPutScom(i_target, PBA_FIR_MASK_0x02010843, mask );
-            if (rc)
-            {
-	            FAPI_ERR("fapiPutScom(PBA_FIR_MASK_0x02010843) failed.");
-                 break;
-            }
-        } // Mode
-    } while(0);
-    return rc;
-
-} // Procedure
-
-} //end extern C
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.H
deleted file mode 100755
index 8ffd56dd6..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.H
+++ /dev/null
@@ -1,118 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.H $     */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_pba_firinit.H,v 1.7 2013/08/26 12:44:35 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pba_firinit.H,v $
-//------------------------------------------------------------------------------
-// *|
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-// *|
-// *! TITLE       : p8_pm_pba_firinit.H
-// *! DESCRIPTION : SET PBA FIRINITS
-// *!
-// *! OWNER NAME  : Greg Still    Email: stillgs@us.ibm.com
-// *! BACKUP NAME : Pradeep CN    Email: padeepcn@in.ibm.com
-// *!
-//------------------------------------------------------------------------------
-
-#include "p8_pm_firinit.H"
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_pm_pba_firinit_FP_t) (const fapi::Target&  , uint32_t mode);
-
-const uint32_t        PBA_FIR_REGISTER_LENGTH = 46 ;
-enum PBA_FIRS
-{
-    PBAFIR_OCI_APAR_ERR          = 0 ,
-    PBAFIR_PB_RDADRERR_FW        = 1 ,
-    PBAFIR_PB_RDDATATO_FW        = 2 ,
-    PBAFIR_PB_SUE_FW             = 3 ,
-    PBAFIR_PB_UE_FW              = 4 ,
-    PBAFIR_PB_CE_FW              = 5 ,
-    PBAFIR_OCI_SLAVE_INIT        = 6 ,
-    PBAFIR_OCI_WRPAR_ERR         = 7 ,
-    PBAFIR_OCI_REREQTO           = 8 ,
-    PBAFIR_PB_UNEXPCRESP         = 9 ,
-    PBAFIR_PB_UNEXPDATA          = 10,
-    PBAFIR_PB_PARITY_ERR         = 11,
-    PBAFIR_PB_WRADRERR_FW        = 12,
-    PBAFIR_PB_BADCRESP           = 13,
-    PBAFIR_PB_ACKDEAD_FW_RD      = 14,
-    PBAFIR_PB_CRESPTO            = 15,
-    PBAFIR_BCUE_SETUP_ERR        = 16,
-    PBAFIR_BCUE_PB_ACK_DEAD      = 17,
-    PBAFIR_BCUE_PB_ADRERR        = 18,
-    PBAFIR_BCUE_OCI_DATERR       = 19,
-    PBAFIR_BCDE_SETUP_ERR        = 20,
-    PBAFIR_BCDE_PB_ACK_DEAD      = 21,
-    PBAFIR_BCDE_PB_ADRERR        = 22,
-    PBAFIR_BCDE_RDDATATO_ERR     = 23,
-    PBAFIR_BCDE_SUE_ERR          = 24,
-    PBAFIR_BCDE_UE_ERR           = 25,
-    PBAFIR_BCDE_CE               = 26,
-    PBAFIR_BCDE_OCI_DATERR       = 27,
-    PBAFIR_INTERNAL_ERR          = 28,
-    PBAFIR_ILLEGAL_CACHE_OP      = 29,
-    PBAFIR_OCI_BAD_REG_ADDR      = 30,
-    PBAFIR_AXPUSH_WRERR          = 31,
-    PBAFIR_AXRCV_DLO_ERR         = 32,
-    PBAFIR_AXRCV_DLO_TO          = 33,
-    PBAFIR_AXRCV_RSVDATA_TO      = 34,
-    PBAFIR_AXFLOW_ERR            = 35,
-    PBAFIR_AXSND_DHI_RTYTO       = 36,
-    PBAFIR_AXSND_DLO_RTYTO       = 37,
-    PBAFIR_AXSND_RSVTO           = 38,
-    PBAFIR_AXSND_RSVERR          = 39,
-    PBAFIR_PB_ACKDEAD_FW_WR      = 40,
-    PBAFIR_RESERVED_41           = 41,
-    PBAFIR_RESERVED_42           = 42,
-    PBAFIR_RESERVED_43           = 43,
-    PBAFIR_FIR_PARITY_ERR2       = 44,
-    PBAFIR_FIR_PARITY_ERR        = 45
-};
-
-extern "C" {
-
-//------------------------------------------------------------------------------
-// Function prototypes
-//------------------------------------------------------------------------------
-
-//------------------------------------------------------------------------------
-// function: FAPI p8_pm_pba_firinit  HWP entry point
-//           operates on chips passed in i_target argument to perform
-//           desired settings of FIRS of OHA macro
-// parameters: i_target        => chip target
-
-// returns: FAPI_RC_SUCCESS if all specified operations complete successfully,
-//          else return code for failing operation
-//------------------------------------------------------------------------------
-fapi::ReturnCode
-p8_pm_pba_firinit(const fapi::Target& i_target, uint32_t mode );
-
-
-} // extern "C"
-
-
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.C
deleted file mode 100755
index d12c0f869..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.C
+++ /dev/null
@@ -1,285 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.C $    */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_pcbs_firinit.C,v 1.11 2013/08/02 19:08:41 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pcbs_firinit.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Ralf Maier         Email: ralf.maier@de.ibm.com
-// *!
-/// \file p8_pm_pcbs_firinit.C
-/// \brief Configures the PCBS FIR errors
-
-/// \todo
-///
-/// \verbatim
-///
-///  Procedure Prereq:
-///  - completed istep procedure
-///
-/// High-level procedure flow:
-///
-///  get all functional child chiplets
-///
-///  loop over all functional chiplets {
-///     calculate address
-///     set the error mask in order to mask all errors
-///
-///  }
-///
-/// \endverbatim
-//------------------------------------------------------------------------------
-
-
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-#include <fapi.H>
-#include "p8_scom_addresses.H"
-#include "p8_pm_pcbs_firinit.H"
-
-extern "C" {
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Constant definitions
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Macro definitions
-// ----------------------------------------------------------------------
-// ALL the below Macros are calling other macros SET_FIR_ACTION / SET_FIR_MASK .
-// Whcih are present in p8_pm_firinit.H
-// #define SET_CHECK_STOP(b){SET_FIR_ACTION(b, 0, 0);}
-// #define SET_RECOV_ATTN(b){SET_FIR_ACTION(b, 0, 1);}
-// #define SET_RECOV_INTR(b){SET_FIR_ACTION(b, 1, 0);}
-// #define SET_MALF_ALERT(b){SET_FIR_ACTION(b, 1, 1);}
-// #define SET_FIR_MASKED(b){SET_FIR_MASK(b,1);}
-
-// ----------------------------------------------------------------------
-// Global variables
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Function prototypes
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Function definitions
-// ----------------------------------------------------------------------
-
-
-fapi::ReturnCode
-p8_pm_pcbs_firinit(const fapi::Target &i_target , uint32_t mode )
-{
-
-    fapi::ReturnCode rc;
-    ecmdDataBufferBase             action_0(64);
-    ecmdDataBufferBase             action_1(64);
-    ecmdDataBufferBase             mask(64);
-    std::vector<fapi::Target>      l_exChiplets;
-    fapi::TargetState              l_state = TARGET_STATE_FUNCTIONAL;
-    uint8_t                        l_functional = 0;
-    uint8_t                        l_ex_number = 0;
-    uint32_t                       e_rc = 0;
-
-    FAPI_INF("Executing proc_pm_pcbs_firinit  ...");
-    do
-    {
-        if (mode == PM_RESET)
-        {
-            e_rc  = mask.flushTo0();
-            e_rc |= mask.setBit(0,PCB_FIR_REGISTER_LENGTH);
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            //    #--***********************************************************
-            //    #-- Mask EX_PMErrMask_REG_0x100F010A
-            //    #--***********************************************************
-
-
-
-            rc = fapiGetChildChiplets(  i_target,
-                                        fapi::TARGET_TYPE_EX_CHIPLET,
-                                        l_exChiplets,
-                                        l_state);
-            if (rc) return rc;
-            FAPI_DBG("  chiplet vector size          => %u", l_exChiplets.size());
-
-
-
-            for (uint8_t c=0; c< l_exChiplets.size(); c++)
-            {
-              
-                rc = FAPI_ATTR_GET( ATTR_CHIP_UNIT_POS,
-                                    &l_exChiplets[c],
-                                    l_ex_number);
-                if (rc)
-                {
-                   FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS with rc = 0x%x", (uint32_t)rc);
-                   break;
-                }
-
-                FAPI_DBG("Core number = %d", l_ex_number);
-                // Use the l_ex_number to build the SCOM address;
-                rc = fapiPutScom(   i_target,
-                                    EX_PMErrMask_REG_0x100F010A +
-                                        (l_ex_number * 0x01000000),
-                                    mask );
-                if (rc)
-                {
-                    FAPI_ERR("fapiPutScom(EX_PMErrMask_REG_0x100F010A) failed.");
-                    break;
-                }
-            } // Chiplet loop
-        }
-        else
-        {
-
-            SET_FIR_MASKED(PCBS_SLEEP_ENTRY_NOTIFY_PMC_HANG_ERR_MASK);
-            SET_FIR_MASKED(PCBS_SLEEP_ENTRY_NOTIFY_PMC_ASSIST_HANG_ERR_MASK);
-            SET_FIR_MASKED(PCBS_SLEEP_ENTRY_NOTIFY_PMC_ERR_MASK);
-            SET_FIR_MASKED(PCBS_SLEEP_EXIT_INVOKE_PORE_ERR_MASK);
-            SET_FIR_MASKED(PCBS_WINKLE_ENTRY_NOTIFY_PMC_ERR_MASK);
-            SET_FIR_MASKED(PCBS_WINKLE_ENTRY_SEND_INT_ASSIST_ERR_MASK);
-            SET_FIR_MASKED(PCBS_WINKLE_EXIT_NOTIFY_PMC_ERR_MASK);
-            SET_FIR_MASKED(PCBS_WAIT_DPLL_LOCK_ERR_MASK);
-            SET_FIR_MASKED(PCBS_SPARE8_ERR_MASK);
-            SET_FIR_MASKED(PCBS_WINKLE_EXIT_SEND_INT_ASSIST_ERR_MASK);
-            SET_FIR_MASKED(PCBS_WINKLE_EXIT_SEND_INT_POWUP_ASSIST_ERR_MASK);
-            SET_FIR_MASKED(PCBS_WRITE_FSM_GOTO_REG_IN_INVALID_STATE_ERR_MASK);
-            SET_FIR_MASKED(PCBS_WRITE_PMGP0_IN_INVALID_STATE_ERR_MASK);
-            SET_FIR_MASKED(PCBS_FREQ_OVERFLOW_IN_PSTATE_MODE_ERR_MASK);
-            SET_FIR_MASKED(PCBS_ECO_RS_BYPASS_CONFUSION_ERR_MASK);
-            SET_FIR_MASKED(PCBS_CORE_RS_BYPASS_CONFUSION_ERR_MASK);
-            SET_FIR_MASKED(PCBS_READ_LPST_IN_PSTATE_MODE_ERR_MASK);
-            SET_FIR_MASKED(PCBS_LPST_READ_CORR_ERR_MASK);
-            SET_FIR_MASKED(PCBS_LPST_READ_UNCORR_ERR_MASK);
-            SET_FIR_MASKED(PCBS_PFET_STRENGTH_OVERFLOW_ERR_MASK);
-            SET_FIR_MASKED(PCBS_VDS_LOOKUP_ERR_MASK);
-            SET_FIR_MASKED(PCBS_IDLE_INTERRUPT_TIMEOUT_ERR_MASK);
-            SET_FIR_MASKED(PCBS_PSTATE_INTERRUPT_TIMEOUT_ERR_MASK);
-            SET_FIR_MASKED(PCBS_GLOBAL_ACTUAL_SYNC_INTERRUPT_TIMEOUT_ERR_MASK);
-            SET_FIR_MASKED(PCBS_PMAX_SYNC_INTERRUPT_TIMEOUT_ERR_MASK);
-            SET_FIR_MASKED(PCBS_GLOBAL_ACTUAL_PSTATE_PROTOCOL_ERR_MASK);
-            SET_FIR_MASKED(PCBS_PMAX_PROTOCOL_ERR_MASK);
-            SET_FIR_MASKED(PCBS_IVRM_GROSS_OR_FINE_ERR_MASK);
-            SET_FIR_MASKED(PCBS_IVRM_RANGE_ERR_MASK);
-            SET_FIR_MASKED(PCBS_DPLL_CPM_FMIN_ERR_MASK);
-            SET_FIR_MASKED(PCBS_DPLL_DCO_FULL_ERR_MASK);
-            SET_FIR_MASKED(PCBS_DPLL_DCO_EMPTY_ERR_MASK);
-            SET_FIR_MASKED(PCBS_DPLL_INT_ERR_MASK);
-            SET_FIR_MASKED(PCBS_FMIN_AND_NOT_CPMBIT_ERR_MASK);
-            SET_FIR_MASKED(PCBS_DPLL_FASTER_THAN_FMAX_PLUS_DELTA1_ERR_MASK);
-            SET_FIR_MASKED(PCBS_DPLL_SLOWER_THAN_FMIN_MINUS_DELTA2_ERR_MASK);
-            SET_FIR_MASKED(PCBS_RESCLK_CSB_INSTR_VECTOR_CHG_IN_INVALID_STATE_ERR_MASK);
-            SET_FIR_MASKED(PCBS_RESLKC_BAND_BOUNDARY_CHG_IN_INVALID_STATE_ERR_MASK);
-            SET_FIR_MASKED(PCBS_OCC_HEARTBEAT_LOSS_ERR_MASK);
-            SET_FIR_MASKED(PCBS_SPARE39_ERR_MASK);
-            SET_FIR_MASKED(PCBS_SPARE40_ERR_MASK);
-            SET_FIR_MASKED(PCBS_SPARE41_ERR_MASK);
-            SET_FIR_MASKED(PCBS_SPARE42_ERR_MASK);
-
-
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            //    #--************************************************************
-            //    #-- Mask EX_PMErrMask_REG_0x100F010A
-            //    #--************************************************************
-
-            rc = fapiGetChildChiplets(   i_target,
-                                         fapi::TARGET_TYPE_EX_CHIPLET,
-                                         l_exChiplets,
-                                         l_state);
-            if (rc)
-            {
-	            FAPI_ERR("fapiGetChildChiplets failed.");
-                break;
-	        }
-
-            FAPI_DBG("  chiplet vector size          => %u", l_exChiplets.size());
-
-            for (uint8_t c=0; c< l_exChiplets.size(); c++)
-            {
-                rc = FAPI_ATTR_GET( ATTR_FUNCTIONAL,
-                                    &l_exChiplets[c],
-                                    l_functional);
-                if (rc)
-                {
-                   FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL with rc = 0x%x", (uint32_t)rc);
-                   break;
-                }
-
-                if (l_functional)
-                {
-                   // The ex is functional let's build the SCOM address
-                   rc = FAPI_ATTR_GET(  ATTR_CHIP_UNIT_POS,
-                                        &l_exChiplets[c],
-                                        l_ex_number);
-                   if (rc)
-                   {
-                        FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS with rc = 0x%x", (uint32_t)rc);
-                        break;
-                   }
-
-                   FAPI_DBG("Core number = %d", l_ex_number);
-                   // Use the l_ex_number to build the SCOM address;
-                   rc = fapiPutScom(    i_target,
-                                        EX_PMErrMask_REG_0x100F010A +
-                                            (l_ex_number * 0x01000000),
-                                        mask );
-                   if (rc)
-                   {
-                        FAPI_ERR("fapiPutScom(EX_PMErrMask_REG_0x100F010A) failed.");
-                        break;
-                   }
-                } // Functional
-            } // Chiplet loop
-
-            // Exit if error detected
-            if (!rc.ok())
-            {
-                break;
-            }
-        } // Mode
-
-    } while(0);
-
-    return rc;
-
-} // Procedure
-
-} //end extern C
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.H
deleted file mode 100755
index 218fb7ffe..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.H
+++ /dev/null
@@ -1,105 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.H $    */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_pcbs_firinit.H,v 1.5 2013/08/26 12:44:36 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pcbs_firinit.H,v $
-//------------------------------------------------------------------------------
-// *|
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-// *|
-// *! TITLE       : proc_pm_pcbs_firinit.H
-// *! DESCRIPTION : Configures the PCBS FIR errors
-// *!
-// *! OWNER NAME  : Ralf Maier    Email: ralf.maier@de.ibm.com
-// *! BACKUP NAME : Pradeep CN    Email: padeepcn@in.ibm.com
-// *!
-//------------------------------------------------------------------------------
-
-
-#include "p8_pm_firinit.H"
-
-const uint32_t        PCB_FIR_REGISTER_LENGTH = 43 ;
-enum PCB_FIRS
-{
-    PCBS_SLEEP_ENTRY_NOTIFY_PMC_HANG_ERR_MASK                   = 0,
-    PCBS_SLEEP_ENTRY_NOTIFY_PMC_ASSIST_HANG_ERR_MASK            = 1,
-    PCBS_SLEEP_ENTRY_NOTIFY_PMC_ERR_MASK                        = 2,
-    PCBS_SLEEP_EXIT_INVOKE_PORE_ERR_MASK                        = 3,
-    PCBS_WINKLE_ENTRY_NOTIFY_PMC_ERR_MASK                       = 4,
-    PCBS_WINKLE_ENTRY_SEND_INT_ASSIST_ERR_MASK                  = 5,
-    PCBS_WINKLE_EXIT_NOTIFY_PMC_ERR_MASK                        = 6,
-    PCBS_WAIT_DPLL_LOCK_ERR_MASK                                = 7,
-    PCBS_SPARE8_ERR_MASK                                        = 8,
-    PCBS_WINKLE_EXIT_SEND_INT_ASSIST_ERR_MASK                   = 9,
-    PCBS_WINKLE_EXIT_SEND_INT_POWUP_ASSIST_ERR_MASK             = 10,
-    PCBS_WRITE_FSM_GOTO_REG_IN_INVALID_STATE_ERR_MASK           = 11,
-    PCBS_WRITE_PMGP0_IN_INVALID_STATE_ERR_MASK                  = 12,
-    PCBS_FREQ_OVERFLOW_IN_PSTATE_MODE_ERR_MASK                  = 13,
-    PCBS_ECO_RS_BYPASS_CONFUSION_ERR_MASK                       = 14,
-    PCBS_CORE_RS_BYPASS_CONFUSION_ERR_MASK                      = 15,
-    PCBS_READ_LPST_IN_PSTATE_MODE_ERR_MASK                      = 16,
-    PCBS_LPST_READ_CORR_ERR_MASK                                = 17,
-    PCBS_LPST_READ_UNCORR_ERR_MASK                              = 18,
-    PCBS_PFET_STRENGTH_OVERFLOW_ERR_MASK                        = 19,
-    PCBS_VDS_LOOKUP_ERR_MASK                                    = 20,
-    PCBS_IDLE_INTERRUPT_TIMEOUT_ERR_MASK                        = 21,
-    PCBS_PSTATE_INTERRUPT_TIMEOUT_ERR_MASK                      = 22,
-    PCBS_GLOBAL_ACTUAL_SYNC_INTERRUPT_TIMEOUT_ERR_MASK          = 23,
-    PCBS_PMAX_SYNC_INTERRUPT_TIMEOUT_ERR_MASK                   = 24,
-    PCBS_GLOBAL_ACTUAL_PSTATE_PROTOCOL_ERR_MASK                 = 25,
-    PCBS_PMAX_PROTOCOL_ERR_MASK                                 = 26,
-    PCBS_IVRM_GROSS_OR_FINE_ERR_MASK                            = 27,
-    PCBS_IVRM_RANGE_ERR_MASK                                    = 28,
-    PCBS_DPLL_CPM_FMIN_ERR_MASK                                 = 29,
-    PCBS_DPLL_DCO_FULL_ERR_MASK                                 = 30,
-    PCBS_DPLL_DCO_EMPTY_ERR_MASK                                = 31,
-    PCBS_DPLL_INT_ERR_MASK                                      = 32,
-    PCBS_FMIN_AND_NOT_CPMBIT_ERR_MASK                           = 33,
-    PCBS_DPLL_FASTER_THAN_FMAX_PLUS_DELTA1_ERR_MASK             = 34,
-    PCBS_DPLL_SLOWER_THAN_FMIN_MINUS_DELTA2_ERR_MASK            = 35,
-    PCBS_RESCLK_CSB_INSTR_VECTOR_CHG_IN_INVALID_STATE_ERR_MASK  = 36,
-    PCBS_RESLKC_BAND_BOUNDARY_CHG_IN_INVALID_STATE_ERR_MASK     = 37,
-    PCBS_OCC_HEARTBEAT_LOSS_ERR_MASK                            = 38,
-    PCBS_SPARE39_ERR_MASK                                       = 39,
-    PCBS_SPARE40_ERR_MASK                                       = 40,
-    PCBS_SPARE41_ERR_MASK                                       = 41,
-    PCBS_SPARE42_ERR_MASK                                       = 42
-};
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_pm_pcbs_firinit_FP_t) (const fapi::Target& , uint32_t mode  );
-
-
-extern "C" {
-
-/// \param[in]      &i_target           Chip target
-
-fapi::ReturnCode  p8_pm_pcbs_firinit(const fapi::Target& i_target , uint32_t mode  );
-
-
-} // extern "C"
-
-
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C
deleted file mode 100644
index d8ed3f0af..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C
+++ /dev/null
@@ -1,491 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C $     */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-
-// $Id: p8_pm_pmc_firinit.C,v 1.25 2014/08/06 20:01:27 cmolsen Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pmc_firinit.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Pradeep CN         Email: pradeepcn@in.ibm.com
-// *!
-// *! General Description: Configures the FIR errors
-// *!
-// *!   The purpose of this procedure is to ......
-// *!
-// *!   High-level procedure flow:
-// *!     o Set the particluar bits of databuffers action0 , action 1 and mask for the correspoding actions via MACROS
-// *!     o Write the action1 , actionn0 and mask registers of FIRs
-// *!     o Check if all went well
-// *!     o   If so celebrate
-// *!     o   Else write logs, set bad return code
-// *!
-// *! Procedure Prereq:
-// *!   o System clocks are running
-// *!
-// *!  buildfapiprcd p8_pm_pmc_firinit.C 
-//------------------------------------------------------------------------------
-
-
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-#include <fapi.H>
-#include "p8_scom_addresses.H"
-#include "p8_pm_pmc_firinit.H"
-
-extern "C" {
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Constant definitions
-// ----------------------------------------------------------------------
-
-
- // ----------------------------------------------------------------------
-// Macro definitions
-// ----------------------------------------------------------------------
-// ALL the below Macros are calling other macros SET_FIR_ACTION / SET_FIR_MASK .
-// Whcih are present in p8_pm_firinit.H
-// #define SET_CHECK_STOP(b){SET_FIR_ACTION(b, 0, 0);}
-// #define SET_RECOV_ATTN(b){SET_FIR_ACTION(b, 0, 1);}
-// #define SET_RECOV_INTR(b){SET_FIR_ACTION(b, 1, 0);}
-// #define SET_MALF_ALERT(b){SET_FIR_ACTION(b, 1, 1);}
-// #define SET_FIR_MASKED(b){SET_FIR_MASK(b,1);}
-
-// ----------------------------------------------------------------------
-// Global variables
-// ----------------------------------------------------------------------
-
-//------------------------------------------------------------------------------
-// Function prototypes
-//------------------------------------------------------------------------------
-
-//------------------------------------------------------------------------------
-// function: FAPI p8_pm_pmc_firinit  HWP entry point
-//           operates on chips passed in i_target argument to perform
-//           desired settings of FIRS of PMC macro
-// parameters: i_target        => chip target
-
-// returns: FAPI_RC_SUCCESS if all specified operations complete successfully,
-//          else return code for failing operation
-//------------------------------------------------------------------------------
-
-fapi::ReturnCode
-p8_pm_pmc_firinit(const fapi::Target& i_target , uint32_t mode  )
-{
-    fapi::ReturnCode    rc;
-    ecmdDataBufferBase  fir(64);
-    ecmdDataBufferBase  action_0(64);
-    ecmdDataBufferBase  action_1(64);
-    ecmdDataBufferBase  mask(64);
-    ecmdDataBufferBase  data(64);
-    ecmdDataBufferBase  pmc_ocb_mask_hi(64);
-    ecmdDataBufferBase  pmc_ocb_mask_lo(64);
-    uint32_t            e_rc = 0;
-    uint64_t            attr_pm_pmc_lfir_mask;
-    uint8_t             attr_pm_firinit_done_once_flag;
-   
-    FAPI_DBG("Executing p8_pm_pmc_firinit  ...");
-    do
-    {
-        if (mode == PM_RESET)
-        {
-
-            // -----------
-            // SW260003
-            // -----------
-            rc = FAPI_ATTR_GET(ATTR_PM_FIRINIT_DONE_ONCE_FLAG, &i_target, attr_pm_firinit_done_once_flag);
-            if (!rc.ok()) {
-              FAPI_ERR("fapiGetAttribute of ATTR_PM_FIRINIT_DONE_ONCE_FLAG failed.");
-              break;
-            }
-            if (attr_pm_firinit_done_once_flag == 1) { 
-                rc = fapiGetScom(i_target, PMC_LFIR_MASK_0x01010843, data );
-                if (!rc.ok())
-                {
-                        FAPI_ERR("fapiGetScom(PMC_LFIR_MASK_0x01010843) failed.");
-                        break;
-                }
-                attr_pm_pmc_lfir_mask = data.getDoubleWord(0);
-                rc = FAPI_ATTR_SET(ATTR_PM_PMC_LFIR_MASK, &i_target, attr_pm_pmc_lfir_mask);
-                if (!rc.ok()) {
-                  FAPI_ERR("fapiSetAttribute of ATTR_PM_PMC_LFIR_MASK failed");
-                  break;
-                }
-            }
-
-            FAPI_INF("Hard reset detected.  Full PMC LFIR is masked");
-            e_rc  = mask.flushTo1();
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            //--******************************************************************************
-            //-- PMC_FIR_MASK (W0_OR_45) (WR_43) (WO_AND_44)
-            //--******************************************************************************
-            rc = fapiPutScom(i_target, PMC_LFIR_MASK_0x01010843, mask );
-            if (rc)
-            {
-	            FAPI_ERR("fapiPutScom(PMC_LFIR_MASK_0x01010843) failed.");
-                break;
-            }
-            
-            
-            // Clear pmc_ocb_mask_[hi/lo] as these are really enables, not masks.
-            e_rc |= pmc_ocb_mask_hi.flushTo0();
-            e_rc |= pmc_ocb_mask_lo.flushTo0();
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }
-            
-            //#--******************************************************************************
-            //#-- PMC OCB Mask Hi
-            //#--******************************************************************************
-
-            rc = fapiPutScom(i_target, PMC_ERROR_INT_MASK_HI_0x00062067, pmc_ocb_mask_hi );
-            if (rc)
-            {
-                  FAPI_ERR("fapiPutScom(PMC_ERROR_INT_MASK_HI_0x00062067) failed.");
-                  break;
-            }
-
-            //#--******************************************************************************
-            //#-- PMC OCB Mask Lo
-            //#--******************************************************************************
-
-            rc = fapiPutScom(i_target, PMC_ERROR_INT_MASK_LO_0x00062068, pmc_ocb_mask_lo );
-            if (rc)
-            {
-                FAPI_ERR("fapiPutScom(PMC_ERROR_INT_MASK_LO_0x00062068) failed.");
-                break;
-            }
-            
-        }
-        else if (mode == PM_RESET_SOFT)
-        {
-            FAPI_INF("Soft reset detected.  Only non-idle PMC LFIR bits are masked");
-            // Only mask the bits that that do not deal with SLW
-            rc = fapiGetScom(i_target, PMC_LFIR_MASK_0x01010843, mask );
-            if (rc)
-            {
-	            FAPI_ERR("fapiGetScom(PMC_LFIR_MASK_0x01010843) failed.");
-                break;
-            }
-                                           
-            // The following is done to keep SIMICS model from complaining about
-            // setting non-implemented bits.
-
-            e_rc |= mask.setBit(0,IDLE_PORESW_FATAL_ERR);
-            e_rc |= mask.setBit(IDLE_INTERNAL_ERR+1,
-                                PMC_FIR_REGISTER_LENGTH-IDLE_INTERNAL_ERR);
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            //--******************************************************************************
-            //-- PMC_FIR_MASK (W0_OR_45) (WR_43) (WO_AND_44)
-            //--******************************************************************************
-            rc = fapiPutScom(i_target, PMC_LFIR_MASK_0x01010843, mask );
-            if (rc)
-            {
-	            FAPI_ERR("fapiPutScom(PMC_LFIR_MASK_0x01010843) failed.");
-                break;
-            }
-            
-            //--******************************************************************************
-            //-- PMC_FIR_MASK (W0_OR_45) (WR_43) (WO_AND_44)
-            //--******************************************************************************
-            rc = fapiPutScom(i_target, PMC_LFIR_MASK_0x01010843, mask );
-            if (rc)
-            {
-	            FAPI_ERR("fapiPutScom(PMC_LFIR_MASK_0x01010843) failed.");
-                break;
-            }
-                        
-            // Clear pmc_ocb_mask_[hi/lo] as these are really enables, not masks.
-            e_rc |= pmc_ocb_mask_hi.flushTo0();
-            e_rc |= pmc_ocb_mask_lo.flushTo0();
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }
-            
-            //#--******************************************************************************
-            //#-- PMC OCB Mask Hi
-            //#--******************************************************************************
-
-            rc = fapiPutScom(i_target, PMC_ERROR_INT_MASK_HI_0x00062067, pmc_ocb_mask_hi );
-            if (rc)
-            {
-                  FAPI_ERR("fapiPutScom(PMC_ERROR_INT_MASK_HI_0x00062067) failed.");
-                  break;
-            }
-
-            //#--******************************************************************************
-            //#-- PMC OCB Mask Lo
-            //#--******************************************************************************
-
-            rc = fapiPutScom(i_target, PMC_ERROR_INT_MASK_LO_0x00062068, pmc_ocb_mask_lo );
-            if (rc)
-            {
-                FAPI_ERR("fapiPutScom(PMC_ERROR_INT_MASK_LO_0x00062068) failed.");
-                break;
-            }
-            
-        }
-        else
-        {            
-            e_rc |= fir.flushTo0();
-            e_rc |= action_0.flushTo0();
-            e_rc |= action_1.flushTo0();
-            e_rc |= mask.flushTo0()    ;
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            SET_RECOV_INTR(PSTATE_OCI_MASTER_RDERR              ); //  0  pstate_oci_master_rderr
-            SET_RECOV_INTR(PSTATE_OCI_MASTER_RDDATA_PARITY_ERR  ); //  1  pstate_oci_master_rddata_parity_err
-            SET_RECOV_INTR(PSTATE_GPST_CHECKBYTE_ERR            ); //  2  pstate_gpst_checkbyte_err
-            SET_RECOV_INTR(PSTATE_GACK_TO_ERR                   ); //  3  pstate_gack_to_err
-            SET_RECOV_INTR(PSTATE_PIB_MASTER_NONOFFLINE_ERR     ); //  4  pstate_pib_master_nonoffline_err
-            SET_RECOV_INTR(PSTATE_PIB_MASTER_OFFLINE_ERR        ); //  5  pstate_pib_master_offline_err
-            SET_RECOV_INTR(PSTATE_OCI_MASTER_TO_ERR             ); //  6  pstate_oci_master_to_err
-            SET_RECOV_INTR(PSTATE_INTERCHIP_UE_ERR              ); //  7  pstate_interchip_ue_err
-            SET_RECOV_INTR(PSTATE_INTERCHIP_ERRORFRAME_ERR      ); //  8  pstate_interchip_errorframe_err
-            SET_RECOV_INTR(PSTATE_MS_FSM_ERR                    ); //  9  pstate_ms_fsm_err
-            SET_MALF_ALERT(MS_COMP_PARITY_ERR                   ); // 10  ms_comp_parity_err
-            SET_MALF_ALERT(IDLE_PORESW_FATAL_ERR                ); // 11  idle_poresw_fatal_err
-            SET_MALF_ALERT(IDLE_PORESW_STATUS_RC_ERR            ); // 12  idle_poresw_status_rc_err
-            SET_MALF_ALERT(IDLE_PORESW_STATUS_VALUE_ERR         ); // 13  idle_poresw_status_value_err
-            SET_MALF_ALERT(IDLE_PORESW_WRITE_WHILE_INACTIVE_ERR ); // 14  idle_poresw_write_while_inactive_err
-            SET_MALF_ALERT(IDLE_PORESW_TIMEOUT_ERR              ); // 15  idle_poresw_timeout_err
-            SET_FIR_MASKED(IDLE_OCI_MASTER_WRITE_TIMEOUT_ERR    ); // 16  idle_oci_master_write_timeout_err
-            SET_MALF_ALERT(IDLE_INTERNAL_ERR                    ); // 17  idle_internal_err
-            SET_MALF_ALERT(INT_COMP_PARITY_ERR                  ); // 18  int_comp_parity_err
-            SET_FIR_MASKED(PMC_OCC_HEARTBEAT_TIMEOUT            ); // 19  pmc_occ_heartbeat_timeout
-            SET_FIR_MASKED(SPIVID_CRC_ERROR0                    ); // 20  spivid_crc_error0
-            SET_FIR_MASKED(SPIVID_CRC_ERROR1                    ); // 21  spivid_crc_error1
-            SET_FIR_MASKED(SPIVID_CRC_ERROR2                    ); // 22  spivid_crc_error2
-            SET_RECOV_ATTN(SPIVID_RETRY_TIMEOUT                 ); // 23  spivid_retry_timeout
-            SET_RECOV_ATTN(SPIVID_FSM_ERR                       ); // 24  spivid_fsm_err
-            SET_FIR_MASKED(SPIVID_MAJORITY_DETECTED_A_MINORITY  ); // 25  spivid_majority_detected_a_minority
-            SET_FIR_MASKED(O2S_CRC_ERROR0                       ); // 26  o2s_crc_error0
-            SET_FIR_MASKED(O2S_CRC_ERROR1                       ); // 27  o2s_crc_error1
-            SET_FIR_MASKED(O2S_CRC_ERROR2                       ); // 28  o2s_crc_error2
-            SET_FIR_MASKED(O2S_RETRY_TIMEOUT                    ); // 29  o2s_retry_timeout
-            SET_FIR_MASKED(O2S_WRITE_WHILE_BRIDGE_BUSY_ERR      ); // 30  o2s_write_while_bridge_busy_err
-            SET_FIR_MASKED(O2S_FSM_ERR                          ); // 31  o2s_fsm_err
-            SET_FIR_MASKED(O2S_MAJORITY_DETECTED_A_MINORITY     ); // 32  o2s_majority_detected_a_minority
-            SET_FIR_MASKED(O2P_WRITE_WHILE_BRIDGE_BUSY_ERR      ); // 33  o2p_write_while_bridge_busy_err
-            SET_FIR_MASKED(O2P_FSM_ERR                          ); // 34  o2p_fsm_err
-            SET_FIR_MASKED(OCI_SLAVE_ERR                        ); // 35  oci_slave_err
-            SET_MALF_ALERT(IF_COMP_PARITY_ERR                   ); // 36  if_comp_parity_err
-            SET_RECOV_ATTN(IDLE_RECOVERY_NOTIFY_PRD             ); // 37  idle_recovery_notify_prd
-            SET_MALF_ALERT(PTS_ERR_NOTIFY_PHYP                  ); // 38  pts_err_notify_phyp
-            SET_FIR_MASKED(FIR_PARITY_ERR_DUP                   ); // 47  fir_parity_err_dup
-            SET_FIR_MASKED(FIR_PARITY_ERR                       ); // 48  fir_parity_err
-
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            FAPI_DBG(" action_0  => 0x%016llx ",  action_0.getDoubleWord(0));
-            FAPI_DBG(" action_1  => 0x%016llx ",  action_1.getDoubleWord(0));
-            FAPI_DBG(" mask      => 0x%016llx ",  mask.getDoubleWord(0));
-
-            //#--******************************************************************************
-            //#-- PMC_FIR - clear
-            //#--******************************************************************************
-
-            rc = fapiPutScom(i_target, PMC_LFIR_0x01010840, fir);
-            if (rc)
-            {
-                  FAPI_ERR("fapiPutScom(PMC_LFIR_0x01010840) failed.");
-                  break;
-            }
-
-            //#--******************************************************************************
-            //#-- PMC_FIR_ACTION0
-            //#--******************************************************************************
-
-            rc = fapiPutScom(i_target, PMC_LFIR_ACT0_0x01010846, action_0 );
-            if (rc)
-            {
-                  FAPI_ERR("fapiPutScom(PMC_LFIR_ACT0_0x01010846) failed.");
-                  break;
-            }
-
-            //#--******************************************************************************
-            //#-- PMC_FIR_ACTION1
-            //#--******************************************************************************
-
-            rc = fapiPutScom(i_target, PMC_LFIR_ACT1_0x01010847, action_1 );
-            if (rc)
-            {
-                FAPI_ERR("fapiPutScom(PMC_LFIR_ACT1_0x01010847) failed.");
-                break;
-            }
-
-            // -----------
-            // SW260003
-            // -----------
-            rc = FAPI_ATTR_GET(ATTR_PM_FIRINIT_DONE_ONCE_FLAG, &i_target, attr_pm_firinit_done_once_flag);
-            if (!rc.ok()) {
-              FAPI_ERR("fapiGetAttribute of ATTR_PM_FIRINIT_DONE_ONCE_FLAG failed.");
-              break;
-            }
-            if (attr_pm_firinit_done_once_flag) {
-                rc = FAPI_ATTR_GET(ATTR_PM_PMC_LFIR_MASK, &i_target, attr_pm_pmc_lfir_mask);
-                if (!rc.ok()) {
-                  FAPI_ERR("fapiGetAttribute of ATTR_PM_PMC_LFIR_MASK failed.");
-                  break;
-                }
-                e_rc |= data.setDoubleWord(0, attr_pm_pmc_lfir_mask);
-                e_rc |= mask.setOr(data, 0, 64);
-                if (e_rc)
-                {
-                    rc.setEcmdError(e_rc);
-                    break;
-                }
-            }
-
-            //--******************************************************************************
-            //-- PMC_FIR_MASK (W0_OR_45) (WR_43) (WO_AND_44)
-            //--******************************************************************************
-            rc = fapiPutScom(i_target, PMC_LFIR_MASK_0x01010843, mask );
-            if (rc)
-            {
-                FAPI_ERR("fapiPutScom(PMC_LFIR_MASK_0x01010843) failed.");
-                break;
-            }
-            
-            // Set the PMC OCB Masks to enable OCC interrupts on FIR bits
-            // Note: the descrption of the bit says "mask" but it takes a 1
-            // to enable them.
-            
-            e_rc |= pmc_ocb_mask_hi.flushTo0();
-            e_rc |= pmc_ocb_mask_lo.flushTo0();
-
-            // PMC OCB Mask Hi
-            e_rc |= pmc_ocb_mask_hi.setBit(PSTATE_OCI_MASTER_RDERR              ); //  0  pstate_oci_master_rderr
-            e_rc |= pmc_ocb_mask_hi.setBit(PSTATE_OCI_MASTER_RDDATA_PARITY_ERR  ); //  1  pstate_oci_master_rddata_parity_err
-            e_rc |= pmc_ocb_mask_hi.setBit(PSTATE_GPST_CHECKBYTE_ERR            ); //  2  pstate_gpst_checkbyte_err
-            e_rc |= pmc_ocb_mask_hi.setBit(PSTATE_GACK_TO_ERR                   ); //  3  pstate_gack_to_err
-            e_rc |= pmc_ocb_mask_hi.setBit(PSTATE_PIB_MASTER_NONOFFLINE_ERR     ); //  4  pstate_pib_master_nonoffline_err
-            e_rc |= pmc_ocb_mask_hi.setBit(PSTATE_PIB_MASTER_OFFLINE_ERR        ); //  5  pstate_pib_master_offline_err
-            e_rc |= pmc_ocb_mask_hi.setBit(PSTATE_OCI_MASTER_TO_ERR             ); //  6  pstate_oci_master_to_err
-            e_rc |= pmc_ocb_mask_hi.setBit(PSTATE_INTERCHIP_UE_ERR              ); //  7  pstate_interchip_ue_err
-            e_rc |= pmc_ocb_mask_hi.setBit(PSTATE_INTERCHIP_ERRORFRAME_ERR      ); //  8  pstate_interchip_errorframe_err
-            e_rc |= pmc_ocb_mask_hi.setBit(PSTATE_MS_FSM_ERR                    ); //  9  pstate_ms_fsm_err
-            e_rc |= pmc_ocb_mask_hi.setBit(MS_COMP_PARITY_ERR                   ); // 10  ms_comp_parity_err
-//          Left 0                        (IDLE_PORESW_FATAL_ERR                ); // 11  idle_poresw_fatal_err
-//          Left 0                        (IDLE_PORESW_STATUS_RC_ERR            ); // 12  idle_poresw_status_rc_err
-//          Left 0                        (IDLE_PORESW_STATUS_VALUE_ERR         ); // 13  idle_poresw_status_value_err
-//          Left 0                        (IDLE_PORESW_WRITE_WHILE_INACTIVE_ERR ); // 14  idle_poresw_write_while_inactive_err
-//          Left 0                        (IDLE_PORESW_TIMEOUT_ERR              ); // 15  idle_poresw_timeout_err
-//          Left 0                        (IDLE_OCI_MASTER_WRITE_TIMEOUT_ERR    ); // 16  idle_oci_master_write_timeout_err
-            e_rc |= pmc_ocb_mask_hi.setBit(IDLE_INTERNAL_ERR                    ); // 17  idle_internal_err
-            e_rc |= pmc_ocb_mask_hi.setBit(INT_COMP_PARITY_ERR                  ); // 18  int_comp_parity_err
-//          Left 0                        (PMC_OCC_HEARTBEAT_TIMEOUT            ); // 19  pmc_occ_heartbeat_timeout
-//          Left 0                        (SPIVID_CRC_ERROR0                    ); // 20  spivid_crc_error0
-//          Left 0                        (SPIVID_CRC_ERROR1                    ); // 21  spivid_crc_error1
-//          Left 0                        (SPIVID_CRC_ERROR2                    ); // 22  spivid_crc_error2
-            e_rc |= pmc_ocb_mask_hi.setBit(SPIVID_RETRY_TIMEOUT                 ); // 23  spivid_retry_timeout
-            e_rc |= pmc_ocb_mask_hi.setBit(SPIVID_FSM_ERR                       ); // 24  spivid_fsm_err
-//          Left 0                        (SPIVID_MAJORITY_DETECTED_A_MINORITY  ); // 25  spivid_majority_detected_a_minority
-//          Left 0                        (O2S_CRC_ERROR0                       ); // 26  o2s_crc_error0
-//          Left 0                        (O2S_CRC_ERROR1                       ); // 27  o2s_crc_error1
-//          Left 0                        (O2S_CRC_ERROR2                       ); // 28  o2s_crc_error2
-//          Left 0                        (O2S_RETRY_TIMEOUT                    ); // 29  o2s_retry_timeout
-//          Left 0                        (O2S_WRITE_WHILE_BRIDGE_BUSY_ERR      ); // 30  o2s_write_while_bridge_busy_err
-//          Left 0                        (O2S_FSM_ERR                          ); // 31  o2s_fsm_err
-
-            // PMC OCB Mask Lo
-//          Left 0                        (O2S_MAJORITY_DETECTED_A_MINORITY     ); // 32  o2s_majority_detected_a_minority
-//          Left 0                        (O2P_WRITE_WHILE_BRIDGE_BUSY_ERR      ); // 33  o2p_write_while_bridge_busy_err
-            e_rc |= pmc_ocb_mask_lo.setBit(O2P_FSM_ERR - 32                     ); // 34  o2p_fsm_err
-            e_rc |= pmc_ocb_mask_lo.setBit(OCI_SLAVE_ERR - 32                   ); // 35  oci_slave_err
-//                                        (IF_COMP_PARITY_ERR                   ); // 36  if_comp_parity_err
-//                                        (IDLE_RECOVERY_NOTIFY_PRD             ); // 37  idle_recovery_notify_prd
-//                                        (PTS_ERR_NOTIFY_PHYP                  ); // 38  pts_error_notify_phyp
-//          Left 0                        (FIR_PARITY_ERR_DUP                   ); // 47  fir_parity_err_dup
-//          Left 0                        (FIR_PARITY_ERR                       ); // 48  fir_parity_err
-            
-            
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }
-            
-            FAPI_DBG(" pmc_ocb_mask_hi  => 0x%016llx ",  pmc_ocb_mask_hi.getDoubleWord(0));
-            FAPI_DBG(" pmc_ocb_mask_lo  => 0x%016llx ",  pmc_ocb_mask_lo.getDoubleWord(0));
-            
-            //#--******************************************************************************
-            //#-- PMC OCB Mask Hi
-            //#--******************************************************************************
-
-            rc = fapiPutScom(i_target, PMC_ERROR_INT_MASK_HI_0x00062067, pmc_ocb_mask_hi );
-            if (rc)
-            {
-                  FAPI_ERR("fapiPutScom(PMC_ERROR_INT_MASK_HI_0x00062067) failed.");
-                  break;
-            }
-
-            //#--******************************************************************************
-            //#-- PMC OCB Mask Lo
-            //#--******************************************************************************
-
-            rc = fapiPutScom(i_target, PMC_ERROR_INT_MASK_LO_0x00062068, pmc_ocb_mask_lo );
-            if (rc)
-            {
-                FAPI_ERR("fapiPutScom(PMC_ERROR_INT_MASK_LO_0x00062068) failed.");
-                break;
-            }
-
-        }
-    } while(0);
-
-    return rc ;
-
-} // Procedure
-
-
-} //end extern C
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.H
deleted file mode 100755
index 49c83fbcd..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.H
+++ /dev/null
@@ -1,120 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.H $     */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_pmc_firinit.H,v 1.8 2014/08/06 19:45:08 cmolsen Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pmc_firinit.H,v $
-//------------------------------------------------------------------------------
-// *|
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-// *|
-// *! TITLE       : p8_pm_pmc_firinit.H
-// *! DESCRIPTION : Set the EX chiplet into Special Wake-up via one of the 
-// *!               entity bits provided
-// *!
-// *! OWNER NAME  : Greg Still    Email: stillgs@us.ibm.com
-// *! BACKUP NAME : Pradeep CN    Email: padeepcn@in.ibm.com
-// *!
-//------------------------------------------------------------------------------
-
-#ifndef _P8_PM_PMC_FIRINIT_H_
-#define _P8_PM_PMC_FIRINIT_H_
-
-
-//------------------------------------------------------------------------------
-// Includes
-//------------------------------------------------------------------------------
-#include "p8_pm_firinit.H"
-
-
-const uint32_t        PMC_FIR_REGISTER_LENGTH = 49 ;
-enum PMC_FIRS
-{
-    PSTATE_OCI_MASTER_RDERR                     =  0,
-    PSTATE_OCI_MASTER_RDDATA_PARITY_ERR         =  1,
-    PSTATE_GPST_CHECKBYTE_ERR                   =  2,
-    PSTATE_GACK_TO_ERR                          =  3,
-    PSTATE_PIB_MASTER_NONOFFLINE_ERR            =  4,
-    PSTATE_PIB_MASTER_OFFLINE_ERR               =  5,
-    PSTATE_OCI_MASTER_TO_ERR                    =  6,
-    PSTATE_INTERCHIP_UE_ERR                     =  7,
-    PSTATE_INTERCHIP_ERRORFRAME_ERR             =  8,
-    PSTATE_MS_FSM_ERR                           =  9,
-    MS_COMP_PARITY_ERR                          = 10,
-    IDLE_PORESW_FATAL_ERR                       = 11,
-    IDLE_PORESW_STATUS_RC_ERR                   = 12,
-    IDLE_PORESW_STATUS_VALUE_ERR                = 13,
-    IDLE_PORESW_WRITE_WHILE_INACTIVE_ERR        = 14,
-    IDLE_PORESW_TIMEOUT_ERR                     = 15,
-    IDLE_OCI_MASTER_WRITE_TIMEOUT_ERR           = 16,
-    IDLE_INTERNAL_ERR                           = 17,
-    INT_COMP_PARITY_ERR                         = 18,
-    PMC_OCC_HEARTBEAT_TIMEOUT                   = 19,
-    SPIVID_CRC_ERROR0                           = 20,
-    SPIVID_CRC_ERROR1                           = 21,
-    SPIVID_CRC_ERROR2                           = 22,
-    SPIVID_RETRY_TIMEOUT                        = 23,
-    SPIVID_FSM_ERR                              = 24,
-    SPIVID_MAJORITY_DETECTED_A_MINORITY         = 25,
-    O2S_CRC_ERROR0                              = 26,
-    O2S_CRC_ERROR1                              = 27,
-    O2S_CRC_ERROR2                              = 28,
-    O2S_RETRY_TIMEOUT                           = 29,
-    O2S_WRITE_WHILE_BRIDGE_BUSY_ERR             = 30,
-    O2S_FSM_ERR                                 = 31,
-    O2S_MAJORITY_DETECTED_A_MINORITY            = 32,
-    O2P_WRITE_WHILE_BRIDGE_BUSY_ERR             = 33,
-    O2P_FSM_ERR                                 = 34,
-    OCI_SLAVE_ERR                               = 35,
-    IF_COMP_PARITY_ERR                          = 36,
-    IDLE_RECOVERY_NOTIFY_PRD                    = 37,
-    PTS_ERR_NOTIFY_PHYP                         = 38,
-    FIR_PARITY_ERR_DUP                          = 47,
-    FIR_PARITY_ERR                              = 48
-};
-
-
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_pm_pmc_firinit_FP_t) (const fapi::Target& , uint32_t mode );
-
-extern "C" {
-
-//------------------------------------------------------------------------------
-// function: FAPI p8_pm_pmc_firinit  HWP entry point
-//           operates on chips passed in i_target argument to perform
-//           desired settings of FIRS of PMC macro 
-// parameters: i_target        => chip target
-
-// returns: FAPI_RC_SUCCESS if all specified operations complete successfully,
-//          else return code for failing operation
-//------------------------------------------------------------------------------
-fapi::ReturnCode 
-p8_pm_pmc_firinit(const fapi::Target& i_target, uint32_t mode );
- 
-
-} // extern "C"
-
-#endif // _P8_PM_PMC_FIRINIT_H_
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C
deleted file mode 100644
index 28575ef0f..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C
+++ /dev/null
@@ -1,1000 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C $  */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_prep_for_reset.C,v 1.31 2015/05/13 03:12:36 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_prep_for_reset.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Greg Still         Email: stillgs@us.ibm.com
-// *! OWNER NAME: Ralf Maier         Email: ralf.maier@de.ibm.com
-// *!
-/// \file p8_pm_prep_for_reset.C
-/// \brief Reset Power Management function
-///
-//------------------------------------------------------------------------------
-///
-/// High-level procedure flow:
-///
-/// \verbatim
-///
-///     do {
-///         - Clear the Deep Exit Masks to allow Special Wake-up to occur
-///         - Put all EX chiplets in special wakeup
-///         - Mask the PM FIRs
-///         - Disable PMC OCC HEARTBEAT before halting and reset OCC
-///         - Halt and then Reset the PPC405
-///             - PMC moves to Vsafe value due to heartbeat loss
-///         - Force Vsafe value into voltage controller to cover the case that the
-///                 Pstate hardware didn't move correctly
-///         - Reset PCBS-PM
-///         - Reset PMC
-///             As the PMC reset kills ALL of the configuration, the idle portion
-///             must be reestablished to allow that portion to operate.
-///         - Run SLW Initialiation
-///             - This allows special wake-up removal before exit
-///         - Reset PSS
-///         - Reset GPEs
-///         - Reset PBA
-///         - Reset SRAM Controller
-///         - Reset OCB
-///         - Clear special wakeups
-///     } while(0);
-///
-///     if error, clear special wakeups to leave this procedure clean
-///
-///     SLW engine reset is not done here as this will blow away all setup
-///     in istep 15.  Thus, ALL manipulation of this is via calls to
-///     p8_poreslw_ioit or by p8_poreslw_recovery.
-///
-///  \endverbatim
-///
-///  buildfapiprcd -e "../../xml/error_info/p8_pm_prep_for_reset_errors.xml" -C p8_pm_utils.C p8_pm_prep_for_reset.C
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-
-#include "fapiUtil.H"
-#include "p8_pm.H"
-#include "p8_pm_utils.H"
-#include "p8_pm_prep_for_reset.H"
-
-extern "C" {
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Constant definitions
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Global variables
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Function prototypes
-// ----------------------------------------------------------------------
-
-fapi::ReturnCode
-special_wakeup_all (const fapi::Target &i_target, bool i_action);
-
-fapi::ReturnCode
-clear_deep_exit_mask (const fapi::Target &i_target);
-
-// FSM trace wrapper
-fapi::ReturnCode
-p4rs_pcbs_fsm_trace (const fapi::Target& i_primary_target,
-                     const fapi::Target& i_secondary_target,
-                     const char *        i_msg);
-
-// ----------------------------------------------------------------------
-// Function definitions
-// ----------------------------------------------------------------------
-
-
-//------------------------------------------------------------------------------
-/**
- * p8_pm_prep_for_reset Call underlying unit procedure to perform readiness for
- *          reinitialization of PM complex.
- *
- * @param[in] i_primary_chip_target   Primary Chip target which will be passed
- *        to all the procedures
- * @param[in] i_secondary_chip_target Secondary Chip target will be passed for
- *        pmc_init -reset only if it is DCM otherwise this should be NULL.
- * @param[in] i_mode (PM_RESET (hard - will kill the PMC);
- *                    PM_RESET_SOFT (will not fully reset the PMC))
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-p8_pm_prep_for_reset(   const fapi::Target &i_primary_chip_target,
-                        const fapi::Target &i_secondary_chip_target,
-                        uint32_t            i_mode                  )
-{
-
-    fapi::ReturnCode                rc;
-    fapi::ReturnCode                rc_hold;
-    uint32_t                        e_rc = 0;
-    std::vector<fapi::Target>       l_exChiplets;
-    ecmdDataBufferBase              data(64);
-    ecmdDataBufferBase              mask(64);
-    uint64_t                        address = 0;
-
-    const char *        PM_MODE_NAME_VAR; // Defines storage for PM_MODE_NAME
-
-    bool                            b_special_wakeup_pri = false;
-    bool                            b_special_wakeup_sec = false;
-
-    fapi::Target dummy;
-
-    do
-    {
-
-        FAPI_INF("p8_pm_prep_for_reset start  ....");
-
-        uint8_t ipl_mode = 0;
-        rc = FAPI_ATTR_GET(ATTR_IS_MPIPL, NULL, ipl_mode);
-        if (!rc.ok())
-        {
-            FAPI_ERR("fapiGetAttribute of ATTR_IS_MPIPL rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        FAPI_INF("IPL mode = %s", ipl_mode ? "MPIPL" : "NORMAL");
-
-
-        if (i_mode == PM_RESET)
-        {
-            FAPI_INF("Hard reset detected");
-        }
-        else if (i_mode == PM_RESET_SOFT)
-        {
-            FAPI_INF("Soft reset detected.  Idle functions will not be affected");
-        }
-        else
-        {
-            FAPI_ERR("Mode parameter value not supported: %u", i_mode);
-            uint32_t & MODE = i_mode;
-            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PREP_UNSUPPORTED_MODE_ERR);
-            break;
-        }
-
-        if ( i_secondary_chip_target.getType() == TARGET_TYPE_NONE )
-        {
-            if ( i_primary_chip_target.getType() == TARGET_TYPE_NONE )
-            {
-                FAPI_ERR("Set primay target properly for SCM " );
-                const fapi::Target PRIMARY_TARGET = i_primary_chip_target;
-                FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PREP_TARGET_ERR);
-                break;
-            }
-            FAPI_INF("Running on SCM");
-        }
-        else
-        {
-            FAPI_INF("Running on DCM");
-        }
-
-        // ******************************************************************
-        //  Clear the Deep Exit Masks to allow Special Wake-up to occur
-        // ******************************************************************
-        
-        // Primary
-        rc = clear_deep_exit_mask(i_primary_chip_target);
-        if (rc)
-        {
-            FAPI_ERR("clear_deep_exit_mask: Failed for Primary Target %s",
-                        i_primary_chip_target.toEcmdString());
-            break;
-        }
-
-        // Secondary
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-            rc = clear_deep_exit_mask(i_secondary_chip_target);
-            if (rc)
-            {
-                FAPI_ERR("clear_deep_exit_mask: Failed for Secondary Target %s",
-                            i_secondary_chip_target.toEcmdString());
-                break;
-            }
-        }
-
-
-        //  ******************************************************************
-        //  FSM trace
-        //  ******************************************************************
-        rc = p4rs_pcbs_fsm_trace (i_primary_chip_target, i_secondary_chip_target, "start of prep for reset");
-        if (!rc.ok())
-        {
-            break;
-        }
-
-        //  ******************************************************************
-        //  Put all EX chiplets in special wakeup
-        //  *****************************************************************
-        //  This is done before FIR masking to ensure that idle functions
-        //  are properly monitored
-
-        // Primary
-        rc = special_wakeup_all (i_primary_chip_target, true);
-        if (rc)
-        {
-            FAPI_ERR("special_wakeup_all - Enable: Failed for Target %s",
-                        i_primary_chip_target.toEcmdString());
-            break;
-        }
-        b_special_wakeup_pri = true;
-
-        rc = p8_pm_glob_fir_trace (i_primary_chip_target, "after SPWKUP");
-        if (!rc.ok()) { break; }
-
-        // Secondary
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-            rc = special_wakeup_all (i_secondary_chip_target, true);
-            if (rc)
-            {
-                FAPI_ERR("special_wakeup_all - Enable: Failed for Target %s",
-                            i_secondary_chip_target.toEcmdString());
-                break;
-            }
-            b_special_wakeup_sec = true;
-
-            rc = p8_pm_glob_fir_trace (i_secondary_chip_target, "after SPWKUP");
-            if (!rc.ok()) { break; }
-
-        }
-
-        //  ******************************************************************
-        //  FSM trace
-        //  ******************************************************************
-        rc = p4rs_pcbs_fsm_trace (i_primary_chip_target, i_secondary_chip_target,
-                    "after special wake-up setting");
-        if (!rc.ok())
-        {
-            break;
-        }
-
-        //  ******************************************************************
-        //  Mask the FIRs as error can occur in what follows
-        //  ******************************************************************
-        FAPI_INF("Executing:p8_pm_firinit in mode PM_RESET");
-
-        FAPI_EXEC_HWP(rc, p8_pm_firinit, i_primary_chip_target , i_mode );
-        if (rc)
-        {
-            FAPI_ERR("ERROR: p8_pm_firinit detected failed  result");
-            break;
-        }
-
-        rc = p8_pm_glob_fir_trace (i_primary_chip_target, "after Masking");
-        if (!rc.ok()) { break; }
-
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-
-            FAPI_EXEC_HWP(rc, p8_pm_firinit, i_secondary_chip_target , PM_RESET );
-            if (rc)
-            {
-                FAPI_ERR("ERROR: p8_pm_firinit detected failed  result");
-                break;
-            }
-
-            rc = p8_pm_glob_fir_trace (i_secondary_chip_target, "after Masking");
-            if (!rc.ok()) { break; }
-        }
-
-        //  ******************************************************************
-        //  FSM trace
-        //  ******************************************************************
-        rc = p4rs_pcbs_fsm_trace (i_primary_chip_target, i_secondary_chip_target,
-                    "after FIR masking");
-        if (!rc.ok())
-        {
-            break;
-        }
-
-        //  ******************************************************************
-        //  Disable PMC OCC HEARTBEAT before reset OCC
-        //  ******************************************************************
-        // Primary
-        rc = fapiGetScom(i_primary_chip_target, PMC_OCC_HEARTBEAT_REG_0x00062066 , data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed.");
-            break;
-        }
-
-        e_rc = data.clearBit(16);
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up PMC_OCC_HEARTBEAT_REG_0x00062066 on master during reset");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        rc = fapiPutScom(i_primary_chip_target, PMC_OCC_HEARTBEAT_REG_0x00062066 , data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed.");
-            break;
-        }
-
-        // Secondary
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-        rc = fapiGetScom(i_secondary_chip_target, PMC_OCC_HEARTBEAT_REG_0x00062066 , data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed.");
-            break;
-        }
-
-        e_rc = data.clearBit(16);
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up PMC_OCC_HEARTBEAT_REG_0x00062066 on slave during reset");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        rc = fapiPutScom(i_secondary_chip_target, PMC_OCC_HEARTBEAT_REG_0x00062066 , data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed.");
-            break;
-        }
-        }
-
-        //  ******************************************************************
-        //  Put OCC PPC405 into reset safely
-        //  ******************************************************************
-        FAPI_INF("Put OCC PPC405 into reset safely");
-        FAPI_DBG("Executing: p8_occ_control.C");
-
-        FAPI_EXEC_HWP(rc, p8_occ_control, i_primary_chip_target, PPC405_RESET_SEQUENCE, 0);
-        if (rc)
-        {
-            FAPI_ERR("p8_occ_control: Failed to prepare OCC for RESET. With rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-            FAPI_EXEC_HWP(rc, p8_occ_control, i_secondary_chip_target, PPC405_RESET_SEQUENCE, 0);
-            if (rc)
-            {
-              FAPI_ERR("p8_occ_control: Failed to prepare OCC for RESET. With rc = 0x%x", (uint32_t)rc);
-              break;
-            }
-        }
-
-        //  ******************************************************************
-        //  FSM trace
-        //  ******************************************************************
-        rc = p4rs_pcbs_fsm_trace (i_primary_chip_target, i_secondary_chip_target,
-                    "after OCC Reset");
-        if (!rc.ok())
-        {
-            break;
-        }
-
-        //  Check for xstops and recoverables
-
-        rc = p8_pm_glob_fir_trace (i_primary_chip_target, "after OCC Reset");
-        if (!rc.ok()) { break; }
-
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-            rc = p8_pm_glob_fir_trace (i_secondary_chip_target, "after OCC Reset");
-            if (!rc.ok()) { break; }
-        }
-
-        //  ******************************************************************
-        //  Force Vsafe value into voltage controller
-        //  ******************************************************************
-        FAPI_INF("Force Vsafe value into voltage controller");
-        FAPI_DBG("Executing: p8_pmc_force_vsafe.C");
-
-        // Primary
-        //   Secondary passed in for FFDC reasons upon error
-        FAPI_EXEC_HWP(rc, p8_pmc_force_vsafe, i_primary_chip_target, i_secondary_chip_target);
-        if (rc)
-        {
-            FAPI_ERR("Failed to force Vsafe value into voltage controller. With rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        // Secondary
-        //   Primary passed in for FFDC reasons upon error
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-            FAPI_EXEC_HWP(rc, p8_pmc_force_vsafe, i_secondary_chip_target, i_primary_chip_target);
-            if (rc)
-            {
-              FAPI_ERR("Failed to force Vsafe value into voltage controller. With rc = 0x%x", (uint32_t)rc);
-              break;
-            }
-        }
-
-        //  ******************************************************************
-        //  FSM trace
-        //  ******************************************************************
-        rc = p4rs_pcbs_fsm_trace (i_primary_chip_target, i_secondary_chip_target,
-                    "after force Vsafe");
-        if (!rc.ok())
-        {
-            break;
-        }
-
-        //  Check for xstops and recoverables
-        rc = p8_pm_glob_fir_trace (i_primary_chip_target, "after Force Vsafe");
-        if (!rc.ok()) { break; }
-
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-            rc = p8_pm_glob_fir_trace (i_secondary_chip_target, "after Force Vsafe");
-            if (!rc.ok()) { break; }
-        }
-
-        //  ******************************************************************
-        //  Prepare PCBS_PM for RESET
-        //  ******************************************************************
-        //      - p8_pcbs_init internally loops over all enabled chiplets
-        FAPI_INF("Prepare PCBSLV_PM for RESET");
-        FAPI_DBG("Executing: p8_pcbs_init.C");
-
-        // Primary
-        FAPI_EXEC_HWP(rc, p8_pcbs_init, i_primary_chip_target, PM_RESET);
-        if (rc)
-        {
-            FAPI_ERR("p8_pcbs_init: Failed to prepare PCBSLV_PM for RESET. With rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        address =  READ_GLOBAL_RECOV_FIR_0x570F001C;
-        GETSCOM(rc, i_primary_chip_target, address, data);
-        if (data.getNumBitsSet(0,64))
-        {
-            FAPI_INF("Recoverable attention is **ACTIVE** in prep_for_reset after PCBS reset");
-        }
-
-        // Secondary
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-
-            FAPI_EXEC_HWP(rc, p8_pcbs_init, i_secondary_chip_target, PM_RESET);
-            if (rc)
-            {
-              FAPI_ERR("p8_pcbs_init: Failed to prepare PCBSLV_PM for RESET. With rc = 0x%x", (uint32_t)rc);
-              break;
-            }
-
-            GETSCOM(rc, i_secondary_chip_target, address, data);
-            if (data.getNumBitsSet(0,64))
-            {
-                FAPI_INF("Recoverable attention is **ACTIVE** in prep_for_reset after  PCBS reset");
-            }
-        }
-
-        //  ******************************************************************
-        //  FSM trace
-        //  ******************************************************************
-        rc = p4rs_pcbs_fsm_trace (i_primary_chip_target, i_secondary_chip_target, "after PCBS reset");
-        if (!rc.ok())
-        {
-            break;
-        }
-
-        //  Check for xstops and recoverables
-        rc = p8_pm_glob_fir_trace (i_primary_chip_target, "after PCBS reset");
-        if (!rc.ok()) { break; }
-
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-            rc = p8_pm_glob_fir_trace (i_secondary_chip_target, "after PCBS reset");
-            if (!rc.ok()) { break; }
-        }
-
-        //  ******************************************************************
-        //  Reset PMC
-        //  ******************************************************************
-        FAPI_INF("Issue reset to PMC");
-        FAPI_DBG("Executing: p8_pmc_init");
-
-        FAPI_EXEC_HWP(rc, p8_pmc_init, i_primary_chip_target, i_secondary_chip_target, i_mode);
-        if (rc)
-        {
-            FAPI_ERR("p8_pmc_init: Failed to issue PMC reset. With rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        //  ******************************************************************
-        //  FSM trace
-        //  ******************************************************************
-        rc = p4rs_pcbs_fsm_trace (i_primary_chip_target, i_secondary_chip_target,
-                    "after PMC reset");
-        if (!rc.ok())
-        {
-            break;
-        }
-
-        //  ******************************************************************
-        //  As the PMC reset kills ALL of the configuration, the idle portion
-        //  must be reestablished to allow that portion to operate.  This is
-        //  what p8_poreslw_init -init does. Additionally, this lets us drop
-        //  special wake-up  before exiting.
-        //  ******************************************************************
-        //     - call p8_poreslw_init.C *chiptarget, ENUM:PM_INIT
-        //
-
-        FAPI_INF("Re-establish PMC Idle configuration");
-        FAPI_DBG("Executing: p8_poreslw_init in mode %s", PM_MODE_NAME(PM_INIT_PMC));
-
-        // Primary
-        FAPI_EXEC_HWP(rc, p8_poreslw_init, i_primary_chip_target, PM_INIT_PMC);
-        if (rc)
-        {
-            FAPI_ERR("p8_poreslw_init: Failed to to reinialize the idle portion of the PMC. With rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        // Secondary
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-
-            FAPI_EXEC_HWP(rc, p8_poreslw_init, i_secondary_chip_target, PM_INIT_PMC);
-            if (rc)
-            {
-                FAPI_ERR("p8_poreslw_init: Failed to to reinialize the idle portion of the PMC. With rc = 0x%x", (uint32_t)rc);
-                break;
-            }
-        }
-
-        //  Check for xstops and recoverables
-        rc = p8_pm_glob_fir_trace (i_primary_chip_target,  "after PMC and SLW reinit");
-        if (!rc.ok()) { break; }
-
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-            rc = p8_pm_glob_fir_trace (i_secondary_chip_target,  "after PMC and SLW reinit");
-            if (!rc.ok()) { break; }
-        }
-
-        //  ******************************************************************
-        //  Issue reset to PSS macro
-        //  ******************************************************************
-        FAPI_INF("Issue reset to PSS macro");
-        FAPI_DBG("Executing: p8_pss_init.C");
-
-        // Primary
-        FAPI_EXEC_HWP(rc, p8_pss_init, i_primary_chip_target, PM_RESET);
-        if (rc)
-        {
-            FAPI_ERR("p8_pss_init: Failed to issue reset to PSS macro. With rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        // Secondary
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-
-            FAPI_DBG("FAPI_EXEC_HWP(rc, p8_pss_init, i_secondary_chip_target, PM_RESET);");
-
-            FAPI_EXEC_HWP(rc, p8_pss_init, i_secondary_chip_target, PM_RESET);
-            if (rc)
-            {
-                FAPI_ERR("p8_pss_init: Failed to issue reset to PSS macro. With rc = 0x%x", (uint32_t)rc);
-                break;
-            }
-        }
-
-        //  ******************************************************************
-        //  Issue reset to PORE General Purpose Engine
-        //  ******************************************************************
-        FAPI_INF("Issue reset to PORE General Purpose Engine");
-        FAPI_DBG("Executing: p8_poregpe_init.C");
-
-        // Primary
-        FAPI_EXEC_HWP(rc, p8_poregpe_init, i_primary_chip_target, PM_RESET, GPEALL );
-        if (rc)
-        {
-            FAPI_ERR("p8_poregpe_init: Failed to issue reset to PORE General Purpose Engine. With rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        // Secondary
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-            FAPI_EXEC_HWP(rc, p8_poregpe_init, i_secondary_chip_target, PM_RESET, GPEALL );
-            if (rc)
-            {
-                FAPI_ERR("p8_poregpe_init: Failed to issue reset to PORE General Purpose Engine. With rc = 0x%x", (uint32_t)rc);
-                break;
-            }
-        }
-
-        //  ******************************************************************
-        //  Issue reset to PBA
-        //  ******************************************************************
-        //  Note:  this voids the channel used by the SLW engine
-        FAPI_INF("Issue reset to PBA");
-        FAPI_DBG("Executing: p8_pba_init.C");
-
-        // Primary
-        FAPI_EXEC_HWP(rc, p8_pba_init, i_primary_chip_target, PM_RESET );
-        if (rc)
-        {
-            FAPI_ERR("p8_pba_init: Failed to issue reset to PBA. With rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        // Secondary
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-            FAPI_EXEC_HWP(rc, p8_pba_init, i_secondary_chip_target, PM_RESET );
-            if (rc)
-            {
-                FAPI_ERR("p8_pba_init: Failed to issue reset to PBA. With rc = 0x%x", (uint32_t)rc);
-                break;
-            }
-        }
-        //  Check for xstops and recoverables
-        rc = p8_pm_glob_fir_trace (i_primary_chip_target, "after PBA reset");
-        if (!rc.ok()) { break; }
-
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-            rc = p8_pm_glob_fir_trace (i_secondary_chip_target, "after PBA reset");
-            if (!rc.ok()) { break; }
-        }
-
-        //  ******************************************************************
-        //  Issue reset to OCC-SRAM
-        //  ******************************************************************
-        FAPI_INF("Issue reset to OCC-SRAM");
-        FAPI_DBG("Executing: p8_occ_sram_init.C");
-
-        // Primary
-        FAPI_EXEC_HWP(rc, p8_occ_sram_init, i_primary_chip_target, PM_RESET );
-        if (rc)
-        {
-            FAPI_ERR("p8_occ_sram_init: Failed to issue reset to OCC-SRAM. With rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        // Secondary
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-            FAPI_EXEC_HWP(rc, p8_occ_sram_init, i_secondary_chip_target, PM_RESET );
-            if (rc)
-            {
-                FAPI_ERR("p8_occ_sram_init: Failed to issue reset to OCC-SRAM. With rc = 0x%x", (uint32_t)rc);
-                break;
-            }
-        }
-
-        //  ******************************************************************
-        //  Issue reset to OCB
-        //  ******************************************************************
-
-        FAPI_INF("Issue reset to OCB");
-        FAPI_DBG("Executing: p8_ocb_init.C");
-
-        // Primary
-        FAPI_EXEC_HWP(rc, p8_ocb_init, i_primary_chip_target, PM_RESET,0 , 0, 0, 0, 0, 0 );
-        if (rc)
-        {
-            FAPI_ERR("p8_ocb_init: Failed to issue reset to OCB. With rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        // Secondary
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-            FAPI_EXEC_HWP(rc, p8_ocb_init, i_secondary_chip_target, PM_RESET,0 , 0, 0, 0, 0, 0 );
-            if (rc)
-            {
-                FAPI_ERR("p8_ocb_init: Failed to issue reset to OCB. With rc = 0x%x", (uint32_t)rc);
-                break;
-            }
-        }
-
-        //  Check for xstops and recoverables
-        rc = p8_pm_glob_fir_trace (i_primary_chip_target, "after OCB reset");
-        if (!rc.ok()) { break; }
-
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-            rc = p8_pm_glob_fir_trace (i_secondary_chip_target, "after OCB reset");
-            if (!rc.ok()) { break; }
-        }
-        //  ******************************************************************
-        //  Remove the EX chiplet special wakeups
-        //  *****************************************************************
-
-        // Primary
-        rc = special_wakeup_all (i_primary_chip_target, false);
-        if (rc)
-        {
-            FAPI_ERR("special_wakeup_all - Disable: Failed for Target %s",
-                        i_primary_chip_target.toEcmdString());
-            break;
-        }
-        b_special_wakeup_pri = false;
-
-
-        // Secondary
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-            rc = special_wakeup_all (i_secondary_chip_target, false);
-            if (rc)
-            {
-                FAPI_ERR("special_wakeup_all - Disable: Failed for Target %s",
-                            i_secondary_chip_target.toEcmdString());
-                break;
-            }
-
-            b_special_wakeup_sec = false;
-        }
-
-
-        //  ******************************************************************
-        //  FSM trace
-        //  ******************************************************************
-        rc = p4rs_pcbs_fsm_trace (i_primary_chip_target, i_secondary_chip_target,
-                    "after special wake-up clearing");
-        if (!rc.ok())
-        {
-            break;
-        }
-
-        //  Check for xstops and recoverables
-        rc = p8_pm_glob_fir_trace (i_primary_chip_target, "after special wake-up clearing");
-        if (!rc.ok()) { break; }
-
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-            rc = p8_pm_glob_fir_trace (i_secondary_chip_target, "after special wake-up clearing");
-            if (!rc.ok()) { break; }
-        }
-
-    } while(0);
-
-
-    // Clear special wakeups that might have been set before a subsequent
-    // error occured.  Only attempts them on targets that have the boolean
-    // flag set that they were successfully put into special wakeup.
-    if (!rc.ok())
-    {
-        // Save the original RC
-        rc_hold = rc;
-
-        do
-        {
-            // Primary
-            if (b_special_wakeup_pri)
-            {
-                // Primary
-                rc = special_wakeup_all (i_primary_chip_target, false);
-                if (rc)
-                {
-                    FAPI_ERR("special_wakeup_all - Disable: Failed during cleanup from a previous error for Target %s",
-                                i_primary_chip_target.toEcmdString());
-                    FAPI_ERR("special_wakeup_all - Disable: The original error is being returned");
-                    fapiLogError(rc, fapi::FAPI_ERRL_SEV_RECOVERED);
-                    break;
-                }
-            }
-
-            // Secondary
-            if (b_special_wakeup_sec)
-            {
-                rc = special_wakeup_all (i_secondary_chip_target, false);
-                if (rc)
-                {
-                    FAPI_ERR("special_wakeup_all - Disable: Failed during cleanup from a previous error for Target %s",
-                                i_primary_chip_target.toEcmdString());
-                    FAPI_ERR("special_wakeup_all - Disable: The original error is being returned");
-                    fapiLogError(rc, fapi::FAPI_ERRL_SEV_RECOVERED);
-                    break;
-                }
-            }
-        } while(0);
-
-        // Restore the original RC
-        rc = rc_hold;
-    }
-
-    FAPI_INF("p8_pm_prep_for_reset end ....");
-
-    return rc;
-} // Procedure
-
-/**
- * special_wakeup_all - Sets or clears special wake-up on all configured EX on a
- *                     target
- *
- * @param[in] i_target   Chip target w
- * @param[in] i_action   true - ENABLE; false - DISABLE
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-special_wakeup_all (const fapi::Target &i_target, bool i_action)
-{
-    fapi::ReturnCode                rc;
-    std::vector<fapi::Target>       l_exChiplets;
-    uint8_t                         l_ex_number = 0;
-
-    do
-    {
-
-        rc = fapiGetChildChiplets (  i_target,
-                                     TARGET_TYPE_EX_CHIPLET,
-                                     l_exChiplets,
-                                     TARGET_STATE_FUNCTIONAL);
-        if (rc)
-        {
-            FAPI_ERR("Error from fapiGetChildChiplets!");
-            break;
-        }
-
-	    // Iterate through the returned chiplets
-        for (uint8_t j=0; j < l_exChiplets.size(); j++)
-	    {
-
-            FAPI_INF("\t%s special wake-up on %s",
-                    i_action ? "Setting" : "Clearing",
-                    l_exChiplets[j].toEcmdString());
-
-            // Build the SCOM address
-            rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_ex_number);
-            FAPI_DBG("Running special wakeup on ex chiplet %d ", l_ex_number);
-
-            // Set special wakeup for EX
-            rc = fapiSpecialWakeup(l_exChiplets[j], i_action);
-            if (rc)
-            {
-                FAPI_ERR("fapiSpecialWakeup: Failed to put CORE %d into special wakeup. With rc = 0x%x",
-                            l_ex_number, (uint32_t)rc);
-                break;
-            }
-
-        }  // chiplet loop
-
-        // Exit if error
-        if  (!rc.ok())
-        {
-
-            break;
-        }
-
-    } while(0);
-    return rc;
-}
-
-/**
- * clear deep exit mask
- *
- * @param[in] i_target   Chip target w
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-clear_deep_exit_mask (const fapi::Target &i_target)
-{
-    fapi::ReturnCode      rc;
-    ecmdDataBufferBase    data(64);
-
-    do
-    {
-        
-        FAPI_INF("Clearing PMC Deep Exit Mask");
-        
-        // Read the present values for debug
-        rc = fapiGetScom(i_target, PMC_DEEPEXIT_MASK_0x00062092, data);
-        if(!rc.ok())
-        {
-            FAPI_ERR("Scom error reading PMC_DEEPEXIT_MASK_0x00062092");
-            break;
-        }
-        
-        FAPI_INF("PMC Deep Exit Mask value before clearing:  0x%16llX",
-                        data.getDoubleWord(0));
-
-        // Clear the PMC Deep Exit Mask
-        data.flushTo0();
-        rc = fapiPutScom(i_target, PMC_DEEPEXIT_MASK_0x00062092, data);
-        if(!rc.ok())
-        {
-            FAPI_ERR("Scom error reading PMC_DEEPEXIT_MASK_0x00062092");
-            break;
-        }
-        
-        rc = fapiGetScom(i_target, PMC_DEEPEXIT_MASK_0x00062092, data);
-        if(!rc.ok())
-        {
-            FAPI_ERR("Scom error reading PMC_DEEPEXIT_MASK_0x00062092");
-            break;
-        }
-        
-        FAPI_INF("PMC Deep Exit Mask value after clearing:   0x%16llX",
-                        data.getDoubleWord(0));
-
-    } while(0);
-    return rc;
-}
-
-
-//------------------------------------------------------------------------------
-/**
- * Trace PCBS FSMs across primary and secondary chips
- *
- * @param[in] i_target Chip target
- * @param[in] i_msg    String to put out in the trace
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-p4rs_pcbs_fsm_trace(const fapi::Target& i_primary_target,
-                    const fapi::Target& i_secondary_target,
-                    const char *       i_msg)
-{
-    fapi::ReturnCode                rc;
-
-    do
-    {
-
-        rc = p8_pm_pcbs_fsm_trace_chip (i_primary_target, i_msg);
-        if (rc)
-        {
-            FAPI_ERR("pcbs_fsm_trace_chip failed for Target %s",
-                        i_primary_target.toEcmdString());
-            break;
-        }
-
-        if ( i_secondary_target.getType() != TARGET_TYPE_NONE )
-        {
-            rc = p8_pm_pcbs_fsm_trace_chip (i_secondary_target, i_msg);
-            if (rc)
-            {
-                FAPI_ERR("pcbs_fsm_trace_chip failed for Target %s",
-                            i_secondary_target.toEcmdString());
-                break;
-            }
-        }
-    } while(0);
-    return rc;
-}
-
-} //end extern C
-
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.H
deleted file mode 100644
index 951a14a17..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.H
+++ /dev/null
@@ -1,90 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.H $  */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_prep_for_reset.H,v 1.10 2013/08/02 19:13:48 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_prep_for_reset.H,v $
-
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Ralf Maier         Email: ralf.maier@de.ibm.com
-// *!
-// *! General Description:
-// *!        
-// *! Prepare powermanagement components for reset
-// *!
-//------------------------------------------------------------------------------
-//  
-// constant definitions for .
-#define UNIT_CONFIG     0x1
-#define UNIT_RESET      0x2
-
-#include "p8_pm.H"
-#include "p8_poregpe_init.H"
-#include "p8_pcbs_init.H"
-#include "p8_pmc_init.H"
-#include "p8_poreslw_init.H"
-#include "p8_poregpe_init.H"
-#include "p8_oha_init.H"
-#include "p8_pba_init.H"
-#include "p8_occ_sram_init.H"
-#include "p8_ocb_init.H"
-#include "p8_pss_init.H"
-#include "p8_pmc_force_vsafe.H"
-#include "p8_occ_control.H"
-#include "p8_pm_firinit.H"
-
-typedef fapi::ReturnCode (*p8_pm_prep_for_reset_FP_t) (const fapi::Target &, 
-                                                       const fapi::Target &,
-                                                       uint32_t);
-
-
-extern "C"
-{
-
-//------------------------------------------------------------------------------
-/**
- * p8_pm_prep_for_reset Call underlying unit procedures to perform readiness for
- *          reinitialization of PM complex.
- *
- * @param[in] i_primary_chip_target   Primary Chip target which will be passed
- *        to all the procedures
- * @param[in] i_secondary_chip_target Secondary Chip target will be passed for
- *        pmc_init -reset only if it is DCM otherwise this should be NULL.
- * @param[in] i_mode (PM_RESET (hard - will kill the PMC);
- *                    PM_RESET_SOFT (will not fully reset the PMC))
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-  
-fapi::ReturnCode p8_pm_prep_for_reset(  const fapi::Target &i_primary_chip_target , 
-                                        const fapi::Target &i_secondary_chip_target,
-                                        uint32_t            i_mode);
-  
-}
-
-
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_utils.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_utils.C
deleted file mode 100644
index 0bbac895f..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_utils.C
+++ /dev/null
@@ -1,304 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_utils.C $           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2014,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_utils.C,v 1.5 2015/05/20 19:26:23 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_utils.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Greg Still         Email: stillgs@us.ibm.com
-// *! BACKUP:     Mike Olsen         Email: cmolsen@us.ibm.com
-// *!
-// *!
-/// \file p8_pm_utils.C
-/// \brief Utility functions for PM FAPIs
-///
-//------------------------------------------------------------------------------
-
-#ifndef _P8_PM_UTILS_C_
-#define _P8_PM_UTILS_C_
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-#include "p8_pm.H"
-
-extern "C" {
-
-using namespace fapi;
-
-#include "p8_pm_utils.H"
-
-
-//------------------------------------------------------------------------------
-/**
- * Trace a set of FIRs (Globals and select Locals)
- *
- * @param[in] i_target Chip target
- * @param[in] i_msg    String to put out in the trace
- *
- * @retval ECMD_SUCCESS
- */
-fapi::ReturnCode
-p8_pm_glob_fir_trace(const fapi::Target& i_target,
-                    const char * i_msg)
-{
-    fapi::ReturnCode    rc;
-    ecmdDataBufferBase  data(64);
-    uint64_t            address;
-    uint8_t             trace_en_flag = false;
-
-    CONST_UINT64_T( GLOB_XSTOP_FIR_0x01040000                                 , ULL(0x01040000) );
-    CONST_UINT64_T( GLOB_RECOV_FIR_0x01040001                                 , ULL(0x01040001) );
-    CONST_UINT64_T( TP_LFIR_0x0104000A                                        , ULL(0x0104000A) );
-
-    do
-    {
-
-        //  Note: i_msg is put on on each record to allow for trace "greps"
-        //  so as to see the "big picture" across when
-
-        rc = FAPI_ATTR_GET(ATTR_PM_GLOBAL_FIR_TRACE_EN, NULL, trace_en_flag);
-        if (rc)
-        {
-            FAPI_ERR("fapiGetAttribute of ATTR_PM_GLOBAL_FIR_TRACE_EN with rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        // If trace is not enabled, leave.
-        if (!trace_en_flag)
-        {
-            break;
-        }
-
-        //  ******************************************************************
-        //  Check for xstops and recoverables and put in the trace
-        //  ******************************************************************
-        address =  READ_GLOBAL_XSTOP_FIR_0x570F001B;
-        GETSCOM(rc, i_target, address, data);
-
-        if (data.getNumBitsSet(0,64))
-        {
-            FAPI_INF("Xstop is **ACTIVE** %s", i_msg);
-        }
-
-        address =  READ_GLOBAL_RECOV_FIR_0x570F001C;
-        GETSCOM(rc, i_target, address, data);
-        if (data.getNumBitsSet(0,64))
-        {
-            FAPI_INF("Recoverable attention is **ACTIVE** %s", i_msg);
-        }
-
-        address =  READ_GLOBAL_RECOV_FIR_0x570F001C;
-        GETSCOM(rc, i_target, address, data);
-        if (data.getNumBitsSet(0,64))
-        {
-            FAPI_INF("Recoverable attention is **ACTIVE** %s", i_msg);
-        }
-
-        address =  GLOB_XSTOP_FIR_0x01040000;
-        GETSCOM(rc, i_target, address, data);
-        if (data.getNumBitsSet(0,64))
-        {
-            FAPI_INF("Glob Xstop FIR is **ACTIVE** %s", i_msg);
-        }
-
-        address =  GLOB_RECOV_FIR_0x01040001;
-        GETSCOM(rc, i_target, address, data);
-        if (data.getNumBitsSet(0,64))
-        {
-            FAPI_INF("Glob Recov FIR is **ACTIVE** %s", i_msg);
-        }
-
-        address =  TP_LFIR_0x0104000A;
-        GETSCOM(rc, i_target, address, data);
-        if (data.getNumBitsSet(0,64))
-        {
-            FAPI_INF("TP LFIR is **ACTIVE** %s", i_msg);
-        }
-
-    } while(0);
-    return rc;
-}
-
-//------------------------------------------------------------------------------
-/**
- * Trace PCBS FSMs
- *
- * @param[in] i_target Chip target
- * @param[in] i_msg    String to put out in the trace
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-p8_pm_pcbs_fsm_trace_chip(const fapi::Target& i_target,
-                            const char *      i_msg)
-{
-    fapi::ReturnCode                rc;
-    ecmdDataBufferBase              data(64);
-    uint8_t                         trace_en_flag = false;
-
-    std::vector<fapi::Target>       l_exChiplets;
-    uint8_t                         l_ex_number = 0;
-
-    do
-    {
-        rc = FAPI_ATTR_GET(ATTR_PM_PCBS_FSM_TRACE_EN, NULL, trace_en_flag);
-        if (rc)
-        {
-            FAPI_ERR("fapiGetAttribute of ATTR_PM_PCBS_FSM_TRACE_EN with rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        // If trace is not enabled, leave.
-        if (!trace_en_flag)
-        {
-            break;
-        }
-
-        rc = fapiGetChildChiplets(i_target,
-                                  fapi::TARGET_TYPE_EX_CHIPLET,
-                                  l_exChiplets,
-                                  TARGET_STATE_FUNCTIONAL);
-        if (rc)
-        {
-            FAPI_ERR("fapiGetChildChiplets with rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        // For each chiplet
-        for (uint8_t c=0; c< l_exChiplets.size(); c++)
-        {
-
-            rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[c], l_ex_number);
-            if (rc)
-            {
-                FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS with rc = 0x%x", (uint32_t)rc);
-                break;
-            }
-
-            FAPI_DBG("\tCore number = %d", l_ex_number);
-
-            rc = p8_pm_pcbs_fsm_trace (i_target, l_ex_number, i_msg);
-            if (!rc.ok())
-            {
-                break;
-            }
-        }
-
-    } while(0);
-    return rc;
-}
-
-//------------------------------------------------------------------------------
-/**
- * Trace PCBS FSMs for a given EX
- *
- * @param[in] i_target Chip target
- * @param[in] i_msg    String to put out in the trace
- *
- * @retval ECMD_SUCCESS
- */
-fapi::ReturnCode
-p8_pm_pcbs_fsm_trace  ( const fapi::Target& i_target,
-                        uint32_t            i_ex_number,
-                        const char *        i_msg)
-{
-    fapi::ReturnCode                rc;
-    ecmdDataBufferBase              data(64);
-    uint64_t                        address;
-    uint8_t                         trace_en_flag = false;
-    uint64_t                        ex_offset;
-
-    do
-    {
-        rc = FAPI_ATTR_GET(ATTR_PM_PCBS_FSM_TRACE_EN, NULL, trace_en_flag);
-        if (rc)
-        {
-            FAPI_ERR("fapiGetAttribute of ATTR_PM_PCBS_FSM_TRACE_EN with rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        // If trace is not enabled, leave.
-        if (!trace_en_flag)
-        {
-            break;
-        }
-    
-        ex_offset = i_ex_number * 0x01000000;
-
-        //  Note: i_msg is put on on each record to allow for trace "greps"
-        //  so as to see the "big picture" across when
-
-        //  ******************************************************************
-        //  Read PCBS FSM Monitor0
-        //  ******************************************************************
-        address =  EX_PCBS_FSM_MONITOR1_REG_0x100F0170 + ex_offset;
-        GETSCOM(rc, i_target, address, data);
-        FAPI_INF("PCBS Monitor0 = 0x%016llX;  %s target:%s" ,
-                                    data.getDoubleWord(0),
-                                    i_msg,
-                                    i_target.toEcmdString());
-
-        //  ******************************************************************
-        //  Read PCBS FSM Monitor1
-        //  ******************************************************************
-        address =  EX_PCBS_FSM_MONITOR2_REG_0x100F0171 + ex_offset;
-        GETSCOM(rc, i_target, address, data);
-        FAPI_INF("PCBS Monitor1 = 0x%016llX;  %s target:%s" ,
-                                    data.getDoubleWord(0),
-                                    i_msg,
-                                    i_target.toEcmdString());
-
-        //  ******************************************************************
-        //  Read PCBS DPLL CPM PARM REG
-        //  ******************************************************************
-        address =  EX_DPLL_CPM_PARM_REG_0x100F0152 + ex_offset;
-        GETSCOM(rc, i_target, address, data);
-        FAPI_INF("DPLLC Monitor = 0x%016llX;  %s target:%s" ,
-                                    data.getDoubleWord(0),
-                                    i_msg,
-                                    i_target.toEcmdString());
-
-        //  ******************************************************************
-        //  Read PCBS PMGP0
-        //  ******************************************************************
-        address =  EX_PMGP0_0x100F0100 + ex_offset;
-        GETSCOM(rc, i_target, address, data);
-        FAPI_INF("PMGP0 Monitor = 0x%016llX;  %s target:%s" ,
-                                    data.getDoubleWord(0),
-                                    i_msg,
-                                    i_target.toEcmdString());
-
-    } while(0);
-    return rc;
-}
-
-} //end extern
-
-#endif // _P8_PM_UTILS_H_
-
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_utils.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_utils.H
deleted file mode 100644
index 9c1964cdf..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_utils.H
+++ /dev/null
@@ -1,99 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_utils.H $           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2014                             */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_utils.H,v 1.1 2014/02/06 20:05:37 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_utils.H,v $
-//------------------------------------------------------------------------------
-// *|
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-// *|
-// *! TITLE       : p8_pm_utils.H
-// *! DESCRIPTION : Utility functions for PM FAPIs
-// *!
-// *! OWNER NAME  : Greg Still    Email: stillgs@us.ibm.com
-// *! BACKUP NAME : Michael Olsen Email: cmolsen@us.ibm.com
-// *!
-//------------------------------------------------------------------------------
-
-#ifndef _P8_PM_UTILS_H_
-#define _P8_PM_UTILS_H_
-
-//------------------------------------------------------------------------------
-// Includes
-//------------------------------------------------------------------------------
-
-extern "C" {
-
-
-//------------------------------------------------------------------------------
-// Function prototype
-//------------------------------------------------------------------------------
-
-//------------------------------------------------------------------------------
-/**
- * Trace Global FIRs
- *
- * @param[in] i_target Chip target
- * @param[in] i_msg    String to put out in the trace
- *
- * @retval SCOM FAPI RCs
- */
-fapi::ReturnCode
-p8_pm_glob_fir_trace  (const fapi::Target& i_target,
-                      const char * i_msg);
-                 
-//------------------------------------------------------------------------------
-/**
- * Trace PCBS FSMs
- *
- * @param[in] i_target Chip target
- * @param[in] i_msg    String to put out in the trace
- *
- * @retval SCOM FAPI RCs
- */
-fapi::ReturnCode
-p8_pm_pcbs_fsm_trace_chip(const fapi::Target& i_target,           
-                            const char *      i_msg);
-                            
-                            
-//------------------------------------------------------------------------------
-/**
- * Trace PCBS FSMs for a given EX
- *
- * @param[in] i_target Chip target
- * @param[in] i_msg    String to put out in the trace
- *
- * @retval ECMD_SUCCESS
- */
-fapi::ReturnCode
-p8_pm_pcbs_fsm_trace  ( const fapi::Target& i_target,
-                        uint32_t            i_ex_number,           
-                        const char *        i_msg);
-                                                                                                            
-
-} // extern "C"
-
-#endif // _P8_PM_UTILS_H_
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pmc_init.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pmc_init.C
deleted file mode 100755
index 01a0cf976..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pmc_init.C
+++ /dev/null
@@ -1,2757 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pmc_init.C $           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pmc_init.C,v 1.42 2014/04/10 21:12:22 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pmc_init.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Pradeep CN         Email: pradeepcn@in.ibm.com
-// *! OWNER NAME: Greg Still         Email: stillgs@us.ibm.com
-// *!
-/// \verbatim
-/// High-level procedure flow:
-///
-///     T
-///
-///  \endverbatim
-///  buildfapiprcd -e "../../xml/error_info/p8_pmc_errors.xml,../../xml/error_info/p8_pstate_registers.xml" p8_pmc_init.C
-//------------------------------------------------------------------------------
-
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-#include "p8_pm.H"
-#include "p8_pmc_init.H"
-
-#define INTERCHIP_HALT_POLL_COUNT 256
-#define VOLTAGE_CHANGE_POLL_COUNT 100
-#define O2S_POLL_COUNT 256
-#define O2P_POLL_COUNT 8
-#define PSTATE_HALT_POLL_COUNT 256
-#define PORE_REQ_POLL_COUNT 256
-
-#define MASTER_SIDE 0
-#define SLAVE_SIDE  1
-
-extern "C" {
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Function prototypes
-// ----------------------------------------------------------------------
-
-fapi::ReturnCode
-p8_pmc_poll_pstate_halt(    const fapi::Target &    i_target,
-                            const uint8_t           i_side);
-
-fapi::ReturnCode
-p8_pmc_poll_idle_halt(      const fapi::Target &    i_target,
-                            const uint8_t           i_side);
-
-fapi::ReturnCode
-p8_pmc_poll_interchip_halt( const fapi::Target&  i_target,
-                            const uint8_t        i_side,
-                            bool                 i_is_MasterPMC,
-                            const fapi::Target&  i_dcm_target);
-
-fapi::ReturnCode
-p8_pmc_poll_spivid_halt(    const fapi::Target& i_target,
-                            const uint8_t       i_side);
-
-fapi::ReturnCode
-p8_pmc_poll_o2p_halt(       const fapi::Target& i_target,
-                            const uint8_t       i_side);
-
-// ----------------------------------------------------------------------
-/**
- * pmc_config_spivid_settings
- *
- * @param[in] i_target Chip target
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-pmc_config_spivid_settings(const Target& l_pTarget)
-{
-    fapi::ReturnCode rc;
-
-    // SPIVID Defaults
-
-    const uint32_t  default_spivid_frequency = 1;  // MHz
-    // Units: nanoseconds;  Value 15 microseconds
-    const uint32_t  default_spivid_interframe_delay_write_status = 15000;
-    // Units: nanoseconds;  Value 40 microsecond
-    const uint32_t  default_spivid_inter_retry_delay = 40000;
-
-
-    uint32_t attr_pm_spivid_frequency = 1;
-    uint32_t attr_proc_nest_frequency = 2000;
-
-    uint32_t attr_pm_spivid_clock_divider;
-    uint32_t attr_pm_spivid_interframe_delay_write_status;
-    uint32_t attr_pm_spivid_interframe_delay_write_status_value;
-    uint32_t attr_pm_spivid_inter_retry_delay_value;
-    uint32_t attr_pm_spivid_inter_retry_delay;
-
-    FAPI_INF("pmc_config_spivid start...");
-    do
-    {
-
-        //----------------------------------------------------------
-        GETATTR(            rc,
-                            ATTR_FREQ_PB,
-                            "ATTR_FREQ_PB",
-                            NULL,
-                            attr_proc_nest_frequency);
-
-        //----------------------------------------------------------
-        GETATTR_DEFAULT(    rc,
-                            ATTR_PM_SPIVID_FREQUENCY,
-                            "ATTR_PM_SPIVID_FREQUENCY",
-                            NULL,
-                            attr_pm_spivid_frequency,
-                            default_spivid_frequency);
-
-        // calculation of clock divider
-        attr_pm_spivid_clock_divider =  (attr_proc_nest_frequency /
-                                            (attr_pm_spivid_frequency*8)-1 );
-
-
-        SETATTR(            rc,
-                            ATTR_PM_SPIVID_CLOCK_DIVIDER,
-                            "ATTR_PM_SPIVID_CLOCK_DIVIDER",
-                            &l_pTarget,
-                            attr_pm_spivid_clock_divider);
-
-        //----------------------------------------------------------
-        // Delay between command and status frames of a SPIVID WRITE operation
-        // (binary in nanoseconds)
-
-        GETATTR_DEFAULT(    rc,
-                            ATTR_PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS,
-                            "ATTR_PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS",
-                            &l_pTarget,
-                            attr_pm_spivid_interframe_delay_write_status,
-                            default_spivid_interframe_delay_write_status);
-
-        // Delay is computed as: (value * ~100ns_hang_pulse)
-        // +0/-~100ns_hang_pulse time
-        // Thus, value = delay / 100
-        attr_pm_spivid_interframe_delay_write_status_value =
-                attr_pm_spivid_interframe_delay_write_status / 100;
-
-        SETATTR(            rc,
-                            ATTR_PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS_VALUE,
-                            "ATTR_PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS_VALUE",
-                            &l_pTarget,
-                            attr_pm_spivid_interframe_delay_write_status_value);
-
-        //----------------------------------------------------------
-
-        // Delay between SPIVID reture attempts when WRITE command status
-        // indicates an error (binary in nanoseconds)
-
-        GETATTR_DEFAULT(    rc,
-                            ATTR_PM_SPIVID_INTER_RETRY_DELAY,
-                            "ATTR_PM_SPIVID_INTER_RETRY_DELAY",
-                            &l_pTarget,
-                            attr_pm_spivid_inter_retry_delay,
-                            default_spivid_inter_retry_delay);
-
-        FAPI_DBG (" attr_pm_spivid_inter_retry_delay value in config function = 0x%x",
-                            attr_pm_spivid_inter_retry_delay );
-
-        // Delay is computed as: (value * ~100ns_hang_pulse)
-        // +0/-~100ns_hang_pulse time
-        // Thus, value = delay / 100
-        attr_pm_spivid_inter_retry_delay_value =
-                attr_pm_spivid_inter_retry_delay / 100;
-
-        SETATTR(            rc,
-                            ATTR_PM_SPIVID_INTER_RETRY_DELAY_VALUE,
-                            "ATTR_PM_SPIVID_INTER_RETRY_DELAY_VALUE",
-                            &l_pTarget,
-                            attr_pm_spivid_inter_retry_delay_value);
-
-
-    } while(0);
-
-    FAPI_INF("pmc_config_spivid end...");
-
-    return rc ;
-}
-
-
-// ----------------------------------------------------------------------
-/**
- * pmc_reset_function
- *
- * @param[in] i_target1 Primary Chip target:   Murano - chip0; Venice - chip
- * @param[in] i_target2 Secondary Chip target: Murano - chip1; Venice - NULL
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-pmc_reset_function( const fapi::Target& i_target1 ,
-                    const fapi::Target& i_target2,
-                    uint32_t i_mode)
-{
-
-    fapi::ReturnCode rc;
-    ecmdDataBufferBase data(64);
-    ecmdDataBufferBase pmcstatus(64);
-    ecmdDataBufferBase porr(64);
-    ecmdDataBufferBase pmcmode_master(64);
-    ecmdDataBufferBase pmcmode_slave(64);
-
-    uint32_t e_rc = 0;
-//    uint32_t count = 0 ;
-//    bool is_stopped = false ;
-//    bool is_pstate_error_stopped = false ;
-//    bool is_spivid_stopped = false ;
-//    bool is_intchp_error_stopped= false ;
-    bool master_enable_pstate_voltage_changes = false ;
-    bool master_is_MasterPMC= false ;
-//    bool master_enable_fw_pstate_mode= false ;
-    bool master_is_enable_interchip_interface= false ;
-
-
-//    bool slave_enable_pstate_voltage_changes = false ;
-    bool slave_is_MasterPMC= false ;
-//    bool slave_enable_fw_pstate_mode= false ;
-    bool slave_is_enable_interchip_interface= false ;
-
-
-    fapi::Target master_target;
-    fapi::Target slave_target;
-    uint8_t attr_pm_spivid_port_enable1 = 0;
-    uint8_t attr_dcm_installed_1 = 0;
-    uint8_t attr_dcm_installed_2 = 0;
-    uint64_t any_error = 0;
-
-    FAPI_INF("pmc_reset start...");
-
-    do
-    {
-        // Check for validity of passed parms
-        bool dcm = false;
-
-        FAPI_INF("Performing STEP 1");
-        rc = FAPI_ATTR_GET(ATTR_PROC_DCM_INSTALLED, &i_target1, attr_dcm_installed_1);
-        if (rc)
-        {
-            FAPI_ERR("fapiGetAttribute of ATTR_DCM_INSTALLED with rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        FAPI_INF (" ATTR_DCM_INSTALLED value in reset function = 0x%x", attr_dcm_installed_1 );
-
-        if (attr_dcm_installed_1 == 0)
-        {
-
-            // target2 should be NULL
-            // if not NULL, exit with config error
-            if (i_target2.getType() != TARGET_TYPE_NONE  )
-            {
-                FAPI_ERR ("Config error : target2 is not null for target1 SCM case");
-                const fapi::Target& MASTER_TARGET = i_target1;
-                const fapi::Target& SLAVE_TARGET = i_target2;
-                const uint8_t & DCM_INSTALLED_1 =  attr_dcm_installed_1;
-                const uint8_t & DCM_INSTALLED_2 =  attr_dcm_installed_2;
-                FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PMCRESET_SCM_INSTALL_ERROR);
-                break;
-            }
-        }
-        else
-        {
-            // GSS: test removed as this can be the case for a deconfigured DCM
-            //         if target2 is NULL, exit with config error
-            //         if target2 dcm attr not 1, exit with config error
-            //if (i_target2.getType() == TARGET_TYPE_NONE )
-            //{
-            //    FAPI_ERR ("config error : target2 is null for target1 dcm installed case");
-            //    FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PMCRESET_DCM_INSTALL_ERROR);
-            //    break;
-            //}
-
-            if (i_target2.getType() != TARGET_TYPE_NONE  )
-            {
-                rc = FAPI_ATTR_GET(ATTR_PROC_DCM_INSTALLED, &i_target2, attr_dcm_installed_2);
-                if (rc)
-                {
-                    FAPI_ERR("fapiGetAttribute of ATTR_DCM_INSTALLED with rc = 0x%x", (uint32_t)rc);
-                    break;
-                }
-                FAPI_INF (" ATTR_DCM_INSTALLED value in reset function = 0x%x", attr_dcm_installed_2 );
-
-                if (attr_dcm_installed_2 != 1)
-                {
-                    FAPI_ERR ("Config error:  DCM_INSTALLED target2 does not match target1\n" \
-                              "   target1: %08x attr:%02x, target2:%08x attr:%02x",
-                              i_target1.getType(), attr_dcm_installed_1,
-                              i_target2.getType(), attr_dcm_installed_2);
-                    const fapi::Target& MASTER_TARGET = i_target1;
-                    const fapi::Target& SLAVE_TARGET = i_target2;
-                    const uint8_t & DCM_INSTALLED_1 =  attr_dcm_installed_1;
-                    const uint8_t & DCM_INSTALLED_2 =  attr_dcm_installed_2;
-                    FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PMCRESET_DCM_INSTALL_ERROR);
-                    break;
-                }
-
-                dcm = true;
-
-            }
-        }
-
-        ////////////////////////////////////////////////////////////////////////////
-        // 1) Determine master chip and slave chip. By reading the SPIVID_EN attribute
-        //    If SPIVID_EN is != 0 then that target is master
-        //    If SPIVID_EN is == 0 then that target is slave
-        //    If both SPIVID_EN are != 0 then its an error
-        ////////////////////////////////////////////////////////////////////////////
-
-
-        FAPI_INF("Determine master chip and slave targets");
-        rc = FAPI_ATTR_GET( ATTR_PM_SPIVID_PORT_ENABLE,
-                            &i_target1,
-                            attr_pm_spivid_port_enable1);
-        if (rc)
-        {
-            FAPI_ERR("fapiGetAttribute of ATTR_PM_SPIVID_PORT_ENABLE with rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-        FAPI_INF (" value read from the attribute attr_pm_spivid_port_enable in reset function = 0x%x",
-                    attr_pm_spivid_port_enable1);
-
-
-        if (attr_pm_spivid_port_enable1 != 0 )
-        {
-            master_target = i_target1;
-            slave_target = i_target2;
-        }
-        else
-        {
-            FAPI_ERR("Master target does not have SPIVID ports enabled: ATTR_PM_SPIVID_PORT_ENABLE must be non-zero.");
-            const fapi::Target& MASTER_TARGET = i_target1;
-            const uint64_t& ATTR_SPIVID_PORT_ENABLE = (uint64_t)attr_pm_spivid_port_enable1;
-            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PMCRESET_SPIVID_CONFIG_ERROR);
-            break;
-        }
-
-        ////////////////////////////////////////////////////////////////////////////
-        // 2.0 cRQ_TD_IntMaskRQ: Mask OCC interrupts in OIMR1
-        //     PMC_PSTATE_REQUEST, PMC_PROTOCOL_ONGOING, PMC_VOLTAGE_CHANGE_ONGOING,
-        //     PMC_INTERCHIP_MSG_SEND_ONGOING, PMC_IDLE_ENTER, PMC_IDLE_EXIT, PMC_SYNC
-        //       12
-        //       13
-        //       14
-        //       15
-        //       18
-        //       20
-        //       22  of OCB_OCI_OIMR1_0x0006a014
-        //
-        // 2.1 cRQ_TD_IntMaskER: Mask OCC interrupts in OIMR0
-        //     PMC_ERROR, PMC_MALF_ALERT, PMC_INTERCHIP_MSG_RECVD
-        //         9
-        //        13
-        //        21  of OCB_OCI_OIMR0_0x0006a004
-        ////////////////////////////////////////////////////////////////////////////
-
-        // ******************************************************
-        // Master
-        // ******************************************************
-
-        FAPI_INF("Mask OCC interrupts in OIMR0 and OIMR1 on Master");
-
-        // CHECKING PMC_FIRS
-
-        e_rc = data.flushTo0();
-        if (e_rc)
-        {
-            rc.setEcmdError(e_rc);
-            break;
-        }
-        rc = fapiGetScom(master_target, PMC_LFIR_0x01010840 , data );
-        if (rc)
-        {
-           FAPI_ERR("fapiGetScom(PMC_LFIR_0x01010840) failed.");
-           break;
-        }
-
-        any_error = data.getDoubleWord(0);
-
-        if (any_error)
-        {
-           FAPI_INF(" PMC_FIR has error(s) active.  Continuing though  0x%16llX ", data.getDoubleWord(0));
-        }
-
-        e_rc = data.flushTo0();
-        if (e_rc)
-        {
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        rc = fapiGetScom(master_target, OCB_OCI_OIMR1_0x0006a014 , data );
-        if (rc)
-        {
-             FAPI_ERR("fapiGetScom(OCB_OCI_OIMR1_0x0006a014) failed.");
-             break;
-        }
-
-        e_rc |= data.setBit(12);
-        e_rc |= data.setBit(13);
-        e_rc |= data.setBit(14);
-        e_rc |= data.setBit(15);
-        e_rc |= data.setBit(18);
-        e_rc |= data.setBit(20);
-        e_rc |= data.setBit(22);
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up OCB_OCI_OIMR1_0x0006a014 on Master");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        rc = fapiPutScom(master_target, OCB_OCI_OIMR1_0x0006a014 , data );
-        if (rc)
-        {
-             FAPI_ERR("fapiPutScom(OCB_OCI_OIMR1_0x0006a014) failed.");
-             break;
-        }
-
-        rc = fapiGetScom(master_target, OCB_OCI_OIMR0_0x0006a004 , data );
-        if (rc)
-        {
-             FAPI_ERR("fapiGetScom(OCB_OCI_OIMR0_0x0006a004) failed.");
-             break;
-        }
-
-        e_rc |= data.setBit(9);
-        e_rc |= data.setBit(13);
-        e_rc |= data.setBit(21);
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up OCB_OCI_OIMR0_0x0006a004 on Master");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        rc = fapiPutScom(master_target, OCB_OCI_OIMR0_0x0006a004 , data );
-        if (rc)
-        {
-             FAPI_ERR("fapiPutScom(OCB_OCI_OIMR0_0x0006a004) failed.");
-             break;
-        }
-
-        // ******************************************************
-        // Slave
-        // ******************************************************
-
-        if (dcm)
-        {
-
-            FAPI_INF("Mask OCC interrupts in OIMR0 and OIMR1 on Slave");
-
-            // CHECKING PMC_FIRS
-
-            e_rc = data.flushTo0();
-            if (e_rc)
-            {
-                FAPI_ERR("ecmdDataBufferBase error flushing buffer");
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            rc = fapiGetScom(slave_target, PMC_LFIR_0x01010840 , data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(PMC_LFIR_0x01010840) failed.");
-                break;
-            }
-
-            any_error = data.getDoubleWord(0);
-
-            if (any_error)
-            {
-                FAPI_DBG(" PMC_FIR has error(s) active.  Continuing though  0x%16llX ", data.getDoubleWord(0));
-            }
-
-            e_rc = data.flushTo0();
-            if (e_rc)
-            {
-                FAPI_ERR("ecmdDataBufferBase error flushing buffer");
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            rc = fapiGetScom(slave_target, OCB_OCI_OIMR1_0x0006a014 , data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(OCB_OCI_OIMR1_0x0006a014) failed."); break;
-            }
-
-            e_rc |= data.setBit(12);
-            e_rc |= data.setBit(13);
-            e_rc |= data.setBit(14);
-            e_rc |= data.setBit(15);
-            e_rc |= data.setBit(18);
-            e_rc |= data.setBit(20);
-            e_rc |= data.setBit(22);
-            if (e_rc)
-            {
-                FAPI_ERR("ecmdDataBufferBase error setting up OIMR1");
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            rc = fapiPutScom(slave_target, OCB_OCI_OIMR1_0x0006a014 , data );
-            if (rc)
-            {
-                FAPI_ERR("fapiPutScom(OCB_OCI_OIMR1_0x0006a014) failed.");
-                break;
-            }
-
-            rc = fapiGetScom(slave_target, OCB_OCI_OIMR0_0x0006a004 , data );
-            if (rc)
-            {
-                 FAPI_ERR("fapiGetScom(OCB_OCI_OIMR0_0x0006a004) failed.");
-                 break;
-            }
-
-            e_rc |= data.setBit(9);
-            e_rc |= data.setBit(13);
-            e_rc |= data.setBit(21);
-            if (e_rc)
-            {
-                FAPI_ERR("ecmdDataBufferBase error setting up OIMR0");
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            rc = fapiPutScom(slave_target, OCB_OCI_OIMR0_0x0006a004 , data );
-            if (rc)
-            {
-                 FAPI_ERR("fapiPutScom(OCB_OCI_OIMR0_0x0006a004) failed."); break;
-            }
-        }
-
-        ////////////////////////////////////////////////////////////////////////////
-        // Issue halt to Pstate Master FSM on master_chiptarget
-        // Issue halt to Pstate Master FSM on slave_chiptarget
-        //
-        // 3. cRQ_TD_DisableMPS: Write PMC_MODE_REG to halt things
-        //    halt_pstate_master_fsm<-1          <-1 indicates to write the bit with the value 1
-        //    halt_idle_state_master_fsm<-1      <-1 indicates to write the bit with the value 1
-        //    Note: Other bits are left as setup so the configuration remains as things halt, and new
-        //          requests are queued (just now processed now).
-        ////////////////////////////////////////////////////////////////////////////
-
-
-        // ******************************************************
-        // Master
-        // ******************************************************
-        FAPI_INF("Halt Pstates and Idles on Master");
-
-        rc = fapiGetScom(master_target, PMC_MODE_REG_0x00062000 , data );
-        if (rc)
-        {
-             FAPI_ERR("fapiGetScom(PMC_MODE_REG_0x00062000) failed.");
-             break;
-        }
-
-        e_rc |= data.setBit(05);
-        e_rc |= data.setBit(14);
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up PMC_MODE_REG_0x00062000 on Master during reset");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        rc = fapiPutScom(master_target, PMC_MODE_REG_0x00062000 , data );
-        if (rc)
-        {
-             FAPI_ERR("fapiPutScom(PMC_MODE_REG_0x00062000) failed.");
-             break;
-        }
-
-        master_is_MasterPMC = pmcmode_master.isBitSet(6) && pmcmode_master.isBitSet(7) ;
-        master_enable_pstate_voltage_changes = pmcmode_master.isBitSet(3) ;
-//        master_enable_fw_pstate_mode = pmcmode_master.isBitSet(2) ;
-        master_is_enable_interchip_interface = pmcmode_master.isBitSet(6) ;
-
-        // Resave the updated PMC Mode reg
-        pmcmode_master = data;
-
-        // ******************************************************
-        // Slave
-        // ******************************************************
-
-        if (dcm)
-        {
-            FAPI_INF("Halt Pstates and Idles on Slave");
-            rc = fapiGetScom(slave_target, PMC_MODE_REG_0x00062000 , pmcmode_master );
-            if (rc)
-            {
-              FAPI_ERR("fapiGetScom(PMC_MODE_REG_0x00062000) failed.");
-              break;
-            }
-
-            e_rc |= data.setBit(05);
-            e_rc |= data.setBit(14);
-            if (e_rc)
-            {
-                FAPI_ERR("ecmdDataBufferBase error setting up PMC_MODE_REG_0x00062000 on Slave during reset");
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            rc = fapiPutScom(slave_target, PMC_MODE_REG_0x00062000 , data );
-            if (rc)
-            {
-                 FAPI_ERR("fapiPutScom(PMC_MODE_REG_0x00062000) failed.");
-                 break;
-            }
-
-            slave_is_MasterPMC = pmcmode_slave.isBitSet(6) && pmcmode_slave.isBitSet(7) ;
-//            slave_enable_pstate_voltage_changes = pmcmode_slave.isBitSet(3) ;
-//            slave_enable_fw_pstate_mode = pmcmode_slave.isBitSet(2) ;
-            slave_is_enable_interchip_interface = pmcmode_slave.isBitSet(6) ;
-
-            // Resave the updated PMC Mode reg
-            pmcmode_slave = data;
-
-        }
-
-
-
-        ////////////////////////////////////////////////////////////////////////////
-        // Issue halt to interchip FSM on master_chiptarget
-        // Poll for interchip interface to stop on master_chiptarget
-        // If poll not complete, flag "reset_suspicious" and save the poll point; continue
-
-        // Issue halt to interchip FSM on slave_chiptarget
-        // Poll for interchip interface to stop on slave_chiptarget
-        // If poll not complete, flag "reset_suspicious" and save the poll point; continue
-
-        // Poll for Pstate Master FSM being stopped on slave_chiptarget
-        // If poll not complete, flag "reset_suspicious" and save the poll point; continue
-        // Poll for Pstate Master FSM being stopped on slave_chiptarget
-        // If poll not complete, flag "reset_suspicious" and save the poll point; continue
-        //
-        // 4. if enable_interchip_interface==1
-        //       cRQ_TD_HaltInterchip_On: Write PMC_INTCHP_COMMAND_REG.interchip_halt_msg_fsm<-1 Should we write the command register here ? That's why I specified the command register, PMC_INTCHP_COMMAND_REG.
-        //    cRQ_TD_HaltInterchip_Wait1: Read PMC_STATUS_REG
-        //    cRQ_TD_HaltInterchip_Wait2: Read PMC_INTCHP_STATUS_REG
-        //       is_pstate_error_stopped = pstate_processing_is_suspended || gpsa_bdcst_error || gpsa_vchg_error || gpsa_timeout_error || pstate_interchip_error
-        //       is_intchp_error_stopped = interchip_ecc_ue_err || interchip_fsm_err || (is_MasterPMC && interchip_slave_error_code != 0) is_MasterPMC where is this bit ?
-        //       is_stopped = (interchip_ga_ongoing == 0) || is_pstate_error_stopped || is_intchp_error_stopped
-        //       If !is_stopped Then -->cRQ_TD_HaltInterchip_Wait1  (Wait limit is parm TD_Interchip_HaltWait_max=260)
-        //    cRQ_TD_HaltInterchipIf: PMC_MODE_REG.interchip_halt_if<-1 interchip_halt_if where is this bit ? PMC_MODE_REG bit 15 as documented.
-
-
-        ////////////////////////////////////////////////////////////////////////////
-
-        // ******************************************************
-        // Master
-        // ******************************************************
-        if (dcm)
-        {
-            FAPI_INF("Halt interchip interface on Master");
-            if (master_is_enable_interchip_interface == 1)
-            {
-                rc = p8_pmc_poll_interchip_halt(master_target, MASTER_SIDE, master_is_MasterPMC, slave_target );
-                if (rc)
-                {
-                    FAPI_ERR("p8_pmc_poll_interchip_halt detected a failure.");
-                    break;
-                }
-            }
-
-            // ******************************************************
-            // Slave
-            // ******************************************************
-            FAPI_INF("Halt interchip interface on Slave");
-            if (slave_is_enable_interchip_interface ==1)
-            {
-                rc = p8_pmc_poll_interchip_halt(slave_target, SLAVE_SIDE, slave_is_MasterPMC, master_target);
-                if (rc)
-                {
-                    FAPI_ERR("p8_pmc_poll_interchip_halt detected a failure.");
-                    break;
-                }
-            }
-        } // end dcm
-
-        ////////////////////////////////////////////////////////////////////////////
-        // If voltage changes are enabled, issue halt to SPIVID controller on FSM on master_chiptarget
-        // Poll for SPIVID FSM to halt on master_chiptarget
-        // If poll not complete, flag "reset_suspicious" and save the poll point; continue
-        //
-        // 5. if enable_pstate_voltage_changes==1
-        //         HaltSpivid: PMC_SPIV_COMMAND_REG.spivid_halt_fsm<-1
-        //    Spivid_HaltWait: Read PMC_SPIV_STATUS_REG
-        //       is_spivid_error = spivid_retry_timeout || spivid_fsm_err
-        //       if spivid_ongoing && !is_spivid_error Then -->Spivid_HaltWait
-        //       else -->MPS_HaltWait
-        ////////////////////////////////////////////////////////////////////////////
-
-        if (master_enable_pstate_voltage_changes==1)
-        {
-            FAPI_INF("Halt SPIVID controller on Master");
-            rc = p8_pmc_poll_spivid_halt(master_target, MASTER_SIDE);
-            if (rc)
-            {
-                FAPI_ERR("p8_pmc_poll_spivid_halt detected a failure.");
-                break;
-            }
-        }
-
-        ////////////////////////////////////////////////////////////////////////////
-        // Poll for Pstate Master FSM being stopped on master_chiptarget
-        //   If poll not complete, flag "reset_suspicious" and save the poll point; continue
-        // Poll for Pstate Master FSM being stopped on slave_chiptarget
-        //   If poll not complete, flag "reset_suspicious" and save the poll point; continue
-        //
-        // 6. MPS_HaltWait: Read PMC_STATUS_REG
-        //
-        //       if (fw_pstate_mode)
-        //          is_not_ongoing = (enable_pstate_voltage_changes==0 || volt_chg_ongoing==0) && (brd_cst_ongoing == 0)
-        //       else
-        //          is_not_ongoing = (enable_pstate_voltage_changes==0 || gpsa_chg_ongoing==0)
-        //
-        //       is_pstate_error = (pstate_interchip_error || pstate_processing_is_suspended || gpsa_bdcst_error || gpsa_vchg_error || gpsa_timeout_error)
-        //            is_stopped = is_not_ongoing || is_pstate_error
-        //
-        //       if (!is_stopped) then -->MPS_HaltWait   (Wait limit)
-        ////////////////////////////////////////////////////////////////////////////
-
-         FAPI_INF("Check for Pstate FSM being stopped on Master");
-
-         rc = p8_pmc_poll_pstate_halt(master_target, MASTER_SIDE);
-         if (rc)
-         {
-             FAPI_ERR("p8_pmc_poll_pstate_halt error detected for PMC Master");
-             break;
-         }
-
-        // ******************************************************
-        // Slave
-        // ******************************************************
-        if (dcm)
-        {
-            FAPI_INF("Check for Pstate FSM being stopped on Slave");
-
-            rc = p8_pmc_poll_pstate_halt(master_target, SLAVE_SIDE);
-            if (rc)
-            {
-                FAPI_ERR("p8_pmc_poll_pstate_halt error detected for PMC Slave");
-                break;
-            }
-
-        } // dcm
-
-
-        ///////////////////////////////////////////////////////////////////////////////////////////////////////////
-        // Poll for O2P bridge being complete on master_chiptarget
-        // As the OCC (PPC405) has been halt prior to entry of this procedure,
-        //      this poll will be immediate if there are no PIB related errors present
-        // Poll for O2P bridge being complete on slave_chiptarget
-        // As the OCC (PPC405) has been halt prior to entry of this procedure,
-        //      this poll will be immediate if there are no PIB related errors present
-        //
-        // Poll for O2S bridge being complete on master_chiptarget
-        // As the OCC (PPC405) has been halt prior to entry of this procedure,
-        //      this poll will be immediate if there are no SPIVID related errors present
-        //
-        // 7. Wait
-        //      - If an O2P or O2S Op is pending and did not hit an error
-        //      - Queisce after traffic generation or last FW GA_Step
-        //    The O2P and O2S bridges are treated separately.  The firmware should handle these
-        //    recognizing they are still busy, hit an error, or hit a firmware timeout.  The
-        //    firmware can then choose a halt sequence for them.
-        //    O2S: Write PMC_O2S_COMMAND_REG.o2s_halt_retries<-1
-        //         Read PMC_O2S_STATUS_REG
-        //         Wait for o2s_ongoing==0 or error (o2s_retry_timeout | o2s_write_while_bridge_busy_err | o2s_fsm_err)
-        //    O2P: No halt command in PMC - wait for PIB timeout.
-        //         Read PMC_O2P_CTRL_STATUS_REG
-        //         Wait for o2p_ongoing==0 or error (o2p_write_while_bridge_busy_err | o2p_fsm_err | o2p_abort | o2p_parity_error)
-        ///////////////////////////////////////////////////////////////////////////////////////////////////////////
-
-        // ******************************************************
-        // Master
-        // ******************************************************
-
-        FAPI_INF("Poll for O2P bridge being complete on Master");
-
-        rc = p8_pmc_poll_o2p_halt(master_target, MASTER_SIDE);
-        if (rc)
-        {
-            FAPI_ERR("p8_pmc_poll_o2p_halt error detected for PMC Master");
-            break;
-        }
-
-        // ******************************************************
-        // Slave
-        // ******************************************************
-
-        if (dcm)
-        {
-            FAPI_INF("Poll for O2P bridge being complete on Slave");
-
-            rc = p8_pmc_poll_o2p_halt(slave_target, SLAVE_SIDE);
-            if (rc)
-            {
-                FAPI_ERR("p8_pmc_poll_o2p_halt error detected for PMC Slave");
-                break;
-            }
-        }
-
-
-        ///////////////////////////////////////////////////////////////////////////////////////////////////////////
-        // 8) Poll for Idle FSM being quiesced (timeout: 500ms to cover the case of having all 4 types of Deep Idle
-        // transitions in flight)
-        // Note: Previously issued special wake-ups could have triggered PORE activity through the Idle FSM (and
-        // the related pending queues). if poll timeout, FAIL THE OCC RESET AS SLW RECOVER IS COMPROMISED
-        //
-        // Note on Idle/PORE-SLW state (prior to reset)
-        // Given that special wake-up occurred before this point, any errors that resulted from that special wake-up
-        // (eg PORE-SLW fatal or timeout indicated in PMC LFIR) will have fired a malfunction alert to PHYP whereby
-        // the execution of p8_poreslw_recovery.C will have taken place.
-        ///////////////////////////////////////////////////////////////////////////////////////////////////////////
-
-        // ******************************************************
-        // Master
-        // ******************************************************
-
-        FAPI_INF("Poll for Idle FSM being quiesced on Master");
-
-        rc = p8_pmc_poll_idle_halt(master_target, MASTER_SIDE);
-        if (rc)
-        {
-            FAPI_ERR("p8_pmc_poll_idle_halt error detected for PMC Master");
-            break;
-        }
-
-
-        // ******************************************************
-        // Slave
-        // ******************************************************
-
-        if (dcm)
-        {
-            FAPI_INF("Poll for Idle FSM being quiesced on Slave");
-            rc = p8_pmc_poll_idle_halt(slave_target, SLAVE_SIDE);
-            if (rc)
-            {
-                FAPI_ERR("p8_pmc_poll_idle_halt error detected for PMC Slave");
-                break;
-            }
-        }
-
-        ///////////////////////////////////////////////////////////////////////////////
-        // Issue interchip interface reset (if enabled) on master_chiptarget
-        // PMC_INTCHP_COMMAND_REG.reset (0) = 1
-        // PMC_INTCHP_COMMAND_REG.reset (0) = 0
-        // Issue interchip interface reset (if enabled) on slave_chiptarget
-        // PMC_INTCHP_COMMAND_REG.reset (0) = 1
-        // PMC_INTCHP_COMMAND_REG.reset (0) = 0
-        ///////////////////////////////////////////////////////////////////////////////
-
-        // ******************************************************
-        // Master
-        // ******************************************************
-
-
-        FAPI_INF("Reset interchip interface on Master");
-
-        if ( master_is_enable_interchip_interface == 1)
-        {
-
-            rc = fapiGetScom(master_target, PMC_INTCHP_COMMAND_REG_0x00062014 , data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(PMC_INTCHP_COMMAND_REG_0x00062014) failed.");
-                break;
-            }
-
-            e_rc = data.setBit(0);
-            if (e_rc)
-            {
-                FAPI_ERR("ecmdDataBufferBase error setting up PMC_INTCHP_COMMAND_REG_0x00062014 on Master reset");
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            rc = fapiPutScom(master_target, PMC_INTCHP_COMMAND_REG_0x00062014 , data );
-            if (rc)
-            {
-                FAPI_ERR("fapiPutScom(PMC_INTCHP_COMMAND_REG_0x00062014) failed.");
-                break;
-            }
-
-            e_rc = data.clearBit(0);
-            if (e_rc)
-            {
-                FAPI_ERR("ecmdDataBufferBase error clearing up PMC_INTCHP_COMMAND_REG_0x00062014 on Master reset");
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            rc = fapiPutScom(master_target, PMC_INTCHP_COMMAND_REG_0x00062014 , data );
-            if (rc)
-            {
-                FAPI_ERR("fapiPutScom(PMC_INTCHP_COMMAND_REG_0x00062014) failed.");
-                break;
-            }
-        }
-
-        // ******************************************************
-        // Slave
-        // ******************************************************
-
-         if (dcm)
-         {
-             FAPI_INF("Reset interchip interface on Slave");
-
-             if ( slave_is_enable_interchip_interface == 1)
-             {
-
-                rc = fapiGetScom(slave_target, PMC_INTCHP_COMMAND_REG_0x00062014 , data );
-                if (rc)
-                {
-                    FAPI_ERR("fapiGetScom(PMC_INTCHP_COMMAND_REG_0x00062014) failed.");
-                    break;
-                }
-
-                e_rc = data.setBit(0);
-                if (e_rc)
-                {
-                    FAPI_ERR("ecmdDataBufferBase error setting up PMC_INTCHP_COMMAND_REG_0x00062014 on Slave reset");
-                    rc.setEcmdError(e_rc);
-                    break;
-                }
-
-                rc = fapiPutScom(slave_target, PMC_INTCHP_COMMAND_REG_0x00062014 , data );
-                if (rc)
-                {
-                    FAPI_ERR("fapiPutScom(PMC_INTCHP_COMMAND_REG_0x00062014) failed.");
-                    break;
-                }
-
-                e_rc = data.clearBit(0);
-                if (e_rc)
-                {
-                    FAPI_ERR("ecmdDataBufferBase error clearing up PMC_INTCHP_COMMAND_REG_0x00062014 on Slave reset");
-                    rc.setEcmdError(e_rc);
-                    break;
-                }
-
-                rc = fapiPutScom(slave_target, PMC_INTCHP_COMMAND_REG_0x00062014 , data );
-                if (rc)
-                {
-                    FAPI_ERR("fapiPutScom(PMC_INTCHP_COMMAND_REG_0x00062014) failed.");
-                    break;
-                }
-            }
-        }
-
-        ////////////////////////////////////////////////////////////////////////
-        // Issue reset to the PMC
-        // Note:  this action will wipe out the Idle Pending queue so that
-        // requests for idle transitions (entry and exit) will be lost which
-        // means that PHYP notification needs to happen.
-        //
-        // Write PMC_MODE_REG.pmc_reset_all_voltage_registers = 1.
-        // Clearing LFIRs will have  been done by PRD
-        // Note:  this will remove CONFIG settings
-        // This puts the PMC into firmware mode which halts any future Global Actual operations
-        ////////////////////////////////////////////////////////////////////////
-
-        // ******************************************************
-        // Master
-        // ******************************************************
-        // RESET_ALL_PMC_REGISTERS
-
-        if (i_mode == PM_RESET)
-        {
-            FAPI_INF("Hard reset detected");
-            FAPI_INF("Reset PMC on Master");
-            rc = fapiGetScom(master_target, PMC_MODE_REG_0x00062000 , data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(PMC_MODE_REG_0x00062000) failed.");
-                break;
-            }
-
-            e_rc = data.setBit(12);
-                if (e_rc)
-                {
-                    FAPI_ERR("ecmdDataBufferBase error setting up PMC_INTCHP_COMMAND_REG_0x00062014 on Master reset");
-                    rc.setEcmdError(e_rc);
-                    break;
-                }
-            if (rc)
-            {
-                FAPI_ERR("fapiPutScom(PMC_INTCHP_COMMAND_REG_0x00062014) failed.");
-                break;
-            }
-
-            rc = fapiPutScom(master_target, PMC_MODE_REG_0x00062000 , data );
-            if (rc)
-            {
-                 FAPI_ERR("fapiPutScom(PMC_MODE_REG_0x00062000) failed.");
-                 break;
-            }
-
-            // ******************************************************
-            // Slave
-            // ******************************************************
-            if (dcm)
-            {
-                FAPI_INF("Reset PMC on Slave");
-
-                rc = fapiGetScom(slave_target, PMC_MODE_REG_0x00062000 , data );
-                if (rc)
-                {
-                     FAPI_ERR("fapiGetScom(PMC_MODE_REG_0x00062000) failed.");
-                     break;
-                }
-
-                e_rc = data.setBit(12);
-                if (e_rc)
-                {
-                    FAPI_ERR("ecmdDataBufferBase error setting up PMC_MODE_REG_0x00062000 on Slave reset");
-                    rc.setEcmdError(e_rc);
-                    break;
-                }
-
-                rc = fapiPutScom(slave_target, PMC_MODE_REG_0x00062000 , data );
-                if (rc)
-                {
-                    FAPI_ERR("fapiPutScom(PMC_MODE_REG_0x00062000) failed.");
-                    break;
-                }
-            }
-        }
-        else
-        {
-            FAPI_INF("Soft reset detected. PMC register reset skipped.");
-        }
-    } while(0);
-
-    FAPI_INF("pmc_reset end...");
-
-    return rc;
-}
-
-// ----------------------------------------------------------------------
-/**
- * pmc_init_function
- *
- * @param[in] i_target Primary Chip target:   Murano - chip0; Venice - chip
- * @param[in] i_dcm     Boolean to run in DCM or SCM mode
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode pmc_init_function(const fapi::Target& i_target, bool i_dcm )
-{
-    fapi::ReturnCode rc;
-    uint32_t        e_rc;
-    ecmdDataBufferBase data(64);
-    uint8_t         attr_pm_spivid_frame_size;
-    uint8_t         attr_pm_spivid_in_delay_frame1;
-    uint8_t         attr_pm_spivid_in_delay_frame2;
-    uint8_t         attr_pm_spivid_clock_polarity;
-    uint8_t         attr_pm_spivid_clock_phase;
-    uint32_t        attr_pm_spivid_clock_divider;
-    uint8_t         attr_pm_spivid_port_enable = 7;
-    uint32_t        attr_pm_spivid_interframe_delay_write_status_value;
-    uint32_t        attr_pm_spivid_inter_retry_delay_value;
-    uint8_t         attr_pm_spivid_crc_gen_enable;
-    uint8_t         attr_pm_spivid_crc_check_enable;
-    uint8_t         attr_pm_spivid_majority_vote_enable;
-    uint8_t         attr_pm_spivid_max_retries;
-    uint8_t         attr_pm_spivid_crc_polynomial_enables;
-
-
-    const uint8_t   default_spivid_frame_size = 32;
-    const uint8_t   default_spivid_in_delay_frame1 = 0;
-    const uint8_t   default_spivid_in_delay_frame2 = 0;
-    const uint8_t   default_spivid_clock_polarity = 0;
-    const uint8_t   default_spivid_clock_phase = 0;
-    const uint32_t  default_spivid_port_enable = 0x0;
-    const uint8_t   default_spivid_crc_gen_enable = 1;
-    const uint8_t   default_spivid_crc_check_enable = 0;
-    const uint8_t   default_spivid_majority_vote_enable = 1;
-    const uint8_t   default_spivid_max_retries = 5;
-    const uint8_t   default_spivid_crc_polynomial_enables = 0xD5;
-
-    uint32_t        var_100ns_div_value = 0;
-    uint32_t        proc_nest_frequency = 2400;
-    uint32_t        attr_pm_interchip_frequency = 10;
-    uint32_t        interchip_clock_divider = 0 ;
-
-    do
-    {
-
-        rc = FAPI_ATTR_GET(ATTR_FREQ_PB, NULL, proc_nest_frequency);
-        if (rc)
-        {
-            FAPI_ERR("fapiGetAttribute of ATTR_FREQ_PB with rc = 0x%x", (uint32_t)rc);
-            break;
-        }
-
-        //    var_100ns_div_value = (( attr_proc_pss_init_nest_frequency * 1000000 * 100) /4000000000);
-        var_100ns_div_value =    (( proc_nest_frequency ) /40);
-        interchip_clock_divider = ( proc_nest_frequency /(attr_pm_interchip_frequency*8)-1 );
-
-            //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_SPIVID_FRAME_SIZE,
-                        "ATTR_PM_SPIVID_FRAME_SIZE",
-                        &i_target,
-                        attr_pm_spivid_frame_size,
-                        default_spivid_frame_size );
-
-            //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_SPIVID_IN_DELAY_FRAME1,
-                        "ATTR_PM_SPIVID_IN_DELAY_FRAME1",
-                        &i_target,
-                        attr_pm_spivid_in_delay_frame1,
-                        default_spivid_in_delay_frame1 );
-
-            //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_SPIVID_IN_DELAY_FRAME1,
-                        "ATTR_PM_SPIVID_IN_DELAY_FRAME1",
-                        &i_target,
-                        attr_pm_spivid_in_delay_frame2,
-                        default_spivid_in_delay_frame2 );
-
-            //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_SPIVID_CLOCK_POLARITY,
-                        "ATTR_PM_SPIVID_CLOCK_POLARITY",
-                        &i_target,
-                        attr_pm_spivid_clock_polarity,
-                        default_spivid_clock_polarity );
-
-            //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_SPIVID_CLOCK_PHASE,
-                        "ATTR_PM_SPIVID_CLOCK_PHASE",
-                        &i_target,
-                        attr_pm_spivid_clock_phase,
-                        default_spivid_clock_phase );
-
-            //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_SPIVID_CRC_GEN_ENABLE,
-                        "ATTR_PM_SPIVID_CRC_GEN_ENABLE",
-                        &i_target,
-                        attr_pm_spivid_crc_gen_enable,
-                        default_spivid_crc_gen_enable );
-
-            //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_SPIVID_CRC_CHECK_ENABLE,
-                        "ATTR_PM_SPIVID_CRC_CHECK_ENABLE",
-                        &i_target,
-                        attr_pm_spivid_crc_check_enable,
-                        default_spivid_crc_check_enable );
-
-            //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_SPIVID_MAJORITY_VOTE_ENABLE,
-                        "ATTR_PM_SPIVID_CRC_CHECK_ENABLE",
-                        &i_target,
-                        attr_pm_spivid_majority_vote_enable,
-                        default_spivid_majority_vote_enable );
-
-            //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_SPIVID_MAX_RETRIES,
-                        "ATTR_PM_SPIVID_MAX_RETRIES",
-                        &i_target,
-                        attr_pm_spivid_max_retries,
-                        default_spivid_max_retries );
-
-            //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_SPIVID_CRC_POLYNOMIAL_ENABLES,
-                        "ATTR_PM_SPIVID_CRC_POLYNOMIAL_ENABLES",
-                        &i_target,
-                        attr_pm_spivid_crc_polynomial_enables,
-                        default_spivid_crc_polynomial_enables );
-
-            //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_SPIVID_PORT_ENABLE,
-                        "ATTR_PM_SPIVID_PORT_ENABLE",
-                        &i_target,
-                        attr_pm_spivid_port_enable,
-                        default_spivid_port_enable );
-
-           //----------------------------------------------------------
-        GETATTR(        rc,
-                        ATTR_PM_SPIVID_CLOCK_DIVIDER,
-                        "ATTR_PM_SPIVID_CLOCK_DIVIDER",
-                        &i_target,
-                        attr_pm_spivid_clock_divider);
-
-            //----------------------------------------------------------
-        GETATTR(        rc,
-                        ATTR_PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS_VALUE,
-                        "ATTR_PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS_VALUE",
-                        &i_target,
-                        attr_pm_spivid_interframe_delay_write_status_value);
-
-            //----------------------------------------------------------
-        GETATTR(        rc,
-                        ATTR_PM_SPIVID_INTER_RETRY_DELAY_VALUE,
-                        "ATTR_PM_SPIVID_INTER_RETRY_DELAY_VALUE",
-                        &i_target,
-                        attr_pm_spivid_inter_retry_delay_value);
-
-        FAPI_INF("PMC initialization as %s ...", i_dcm ? "DCM" : "SCM");
-
-        uint8_t     o2s_frame_size = attr_pm_spivid_frame_size;
-        uint8_t     o2s_in_delay1  = attr_pm_spivid_in_delay_frame1;
-        uint8_t     o2s_in_delay2  = attr_pm_spivid_in_delay_frame2;
-        uint8_t     o2s_clk_pol    = attr_pm_spivid_clock_polarity;
-        uint8_t     o2s_clk_pha    = attr_pm_spivid_clock_phase;
-        uint8_t     o2s_port_enable = attr_pm_spivid_port_enable;
-        uint32_t    o2s_inter_frame_delay = attr_pm_spivid_interframe_delay_write_status_value;
-        uint8_t     o2s_crc_gen_en = attr_pm_spivid_crc_gen_enable;
-        uint8_t     o2s_crc_check_en = attr_pm_spivid_crc_check_enable;
-        uint8_t     o2s_majority_vote_en = attr_pm_spivid_majority_vote_enable;
-        uint8_t     o2s_max_retries = attr_pm_spivid_max_retries;
-        uint8_t     o2s_crc_polynomial_enables = attr_pm_spivid_crc_polynomial_enables;
-        uint16_t    o2s_clk_divider = attr_pm_spivid_clock_divider;
-        //spivid_freq =  attr_pm_spivid_frequency;
-        uint8_t     o2s_in_count2        = o2s_frame_size ;
-        uint8_t     o2s_out_count2          = 0 ;
-        uint8_t     o2s_bridge_enable = 0x1 ;
-        uint8_t     o2s_nr_of_frames        = 2 ;
-        uint8_t     o2s_in_count1        = 0 ;
-        uint8_t     o2s_out_count1        = o2s_frame_size ;
-        uint8_t     hangpulse_predivider = 1;
-        uint8_t     gpsa_timeout_value   = 100;
-        uint8_t     one=1;
-        uint8_t     zero=0;
-        uint8_t     is_master=0;
-        uint8_t     is_slave=1;
-
-        uint8_t     is_simulation = 0;
-        uint64_t    any_error = 0;
-
-        rc = FAPI_ATTR_GET( ATTR_IS_SIMULATION, NULL, is_simulation);
-        if (rc)
-        {
-            FAPI_ERR("Failed to get attribute: ATTR_IS_SIMULATION.");
-            break ;
-        }
-
-        if (is_simulation)
-        {
-            // Simulation value
-            gpsa_timeout_value   = 100;
-        }
-        else
-        {
-            // Hardware
-            gpsa_timeout_value   = 255;
-        }
-
-        // Here to bypass feature attribute passing until these as moved into proc.pm.pmc.scom.initfile
-        o2s_bridge_enable = 0x1 ;
-
-        e_rc = data.flushTo0();
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error flushing buffer");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        rc = fapiGetScom(i_target, PMC_LFIR_0x01010840 , data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_LFIR_0x01010840) failed.");
-            break;
-        }
-
-        any_error = data.getDoubleWord(0);
-
-        if (any_error)
-        {
-            // Once clear FIRs are established, this will throw errors.
-            FAPI_INF("WARNING: PMC_FIR has error(s) active.  0x%016llX ", data.getDoubleWord(0));
-            //FAPI_ERR(" PMC_FIR has error(s) active.  0x%16llX ", data.getDoubleWord(0));
-            //FAPI_SET_HWP_ERROR(rc, RC_PROCPM_FIR_ERROR);
-            //break;
-        }
-
-        //  ******************************************************************
-        //     - set PMC_o2s_CTRL_REG0A (24b)
-        //  ******************************************************************
-
-        rc = fapiGetScom(i_target, PMC_O2S_CTRL_REG0A_0x00062050, data );
-        if (rc)
-        {
-             FAPI_ERR("fapiGetScom(PMC_O2S_CTRL_REG0A) failed.");
-             break;
-        }
-
-        e_rc  = data.insertFromRight(o2s_frame_size , 0,6);
-        e_rc |= data.insertFromRight(o2s_out_count1 , 6,6);
-        e_rc |= data.insertFromRight(o2s_in_delay1  ,12,6);
-        e_rc |= data.insertFromRight(o2s_in_count1  ,18,6);
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up PMC_O2S_CTRL_REG0A on Master init");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_INF("  PMC_O2S_CTRL_REG0A / PMC_SPIV_CTRL_REG0A  Configuration");
-        FAPI_INF("    frame size                 => %d ",  o2s_frame_size);
-        FAPI_INF("    o2s_out_count1             => %d ",  o2s_out_count1);
-        FAPI_INF("    o2s_in_delay1              => %d ",  o2s_in_delay1);
-        FAPI_INF("    o2s_in_count1              => %d ",  o2s_in_count1);
-
-        rc = fapiPutScom(i_target, PMC_O2S_CTRL_REG0A_0x00062050, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_O2S_CTRL_REG0A_0x00062050) failed.");
-            break;
-        }
-
-        rc = fapiPutScom(i_target, PMC_SPIV_CTRL_REG0A_0x00062040, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_SPIV_CTRL_REG0A_0x00062040) failed.");
-            break;
-        }
-
-        //  ******************************************************************
-        //     - set PMC_O2S_CTRL_REG0B (24b)
-        //  ******************************************************************
-
-        rc = fapiGetScom(i_target, PMC_O2S_CTRL_REG0B_0x00062051, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_O2S_CTRL_REG0B) failed.");
-            break;
-        }
-
-        e_rc  = data.insertFromRight(o2s_out_count2,00,6);
-        e_rc |= data.insertFromRight(o2s_in_delay2 ,06,6);
-        e_rc |= data.insertFromRight(o2s_in_count2 ,12,6);
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up PMC_O2S_CTRL_REG0B_0x00062051 on Master init");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_INF("  PMC_O2S_CTRL_REG0B_ / PMC_SPIV_CTRL_REG0B Configuration");
-        FAPI_INF("    o2s_out_count2             => %d ",  o2s_out_count2);
-        FAPI_INF("    o2s_in_delay2              => %d ",  o2s_in_delay2 );
-        FAPI_INF("    o2s_in_count2              => %d ",  o2s_in_count2 );
-
-        rc = fapiPutScom(i_target, PMC_O2S_CTRL_REG0B_0x00062051, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_O2S_CTRL_REG0B_0x00062051) failed.");
-            break;
-        }
-
-        rc = fapiPutScom(i_target, PMC_SPIV_CTRL_REG0B_0x00062041, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_SPIV_CTRL_REG0B_0x00062041) failed.");
-            break;
-        }
-
-        //  ******************************************************************
-        //     - set PMC_O2S_CTRL_REG1
-        //  ******************************************************************
-
-        rc = fapiGetScom(i_target, PMC_O2S_CTRL_REG1_0x00062052, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_O2S_CTRL_REG1) failed.");
-            break;
-        }
-
-        o2s_nr_of_frames--;
-        e_rc = data.insertFromRight(o2s_bridge_enable   ,0 ,1);
-        e_rc |= data.insertFromRight(o2s_clk_pol         ,2 ,1);
-        e_rc |= data.insertFromRight(o2s_clk_pha         ,3 ,1);
-        e_rc |= data.insertFromRight(o2s_clk_divider     ,4 ,10);
-        e_rc |= data.insertFromRight(o2s_nr_of_frames    ,17,1);
-        e_rc |= data.insertFromRight(o2s_port_enable     ,18,3);
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up PMC_O2S_CTRL_REG1 on Master init");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        o2s_nr_of_frames++ ;
-        FAPI_INF("  PMC_O2S_CTRL_REG1 / PMC_SPIV_CTRL_REG1 ");
-        FAPI_INF("    o2s_bridge_enable           => %d ",  o2s_bridge_enable );
-        FAPI_INF("    o2s_clk_pol                 => %d ",  o2s_clk_pol    );
-        FAPI_INF("    o2s_clk_pha                 => %d ",  o2s_clk_pha    );
-        FAPI_INF("    o2s_clk_divider             => 0x%x", o2s_clk_divider);
-        FAPI_INF("    o2s_nr_of_frames            => %d ",  o2s_nr_of_frames);
-        FAPI_INF("    o2s_port_enable             => %d ",  o2s_port_enable);
-
-
-        rc = fapiPutScom(i_target, PMC_O2S_CTRL_REG1_0x00062052, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_O2S_CTRL_REG1_0x00062052) failed.");
-             break;
-        }
-
-        rc = fapiPutScom(i_target, PMC_SPIV_CTRL_REG1_0x00062042, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_SPIV_CTRL_REG1_0x00062042) failed.");
-            break;
-        }
-
-        //  ******************************************************************
-        //     - set PMC_O2S_CTRL_REG2
-        //  ******************************************************************
-
-        rc = fapiGetScom(i_target, PMC_O2S_CTRL_REG2_0x00062053, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_O2S_CTRL_REG2) failed.");
-            break;
-        }
-
-        e_rc = data.insertFromRight(  o2s_inter_frame_delay   ,0,17);
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up PMC_O2S_CTRL_REG2 on Master init");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-
-        FAPI_INF("  PMC_O2S_CTRL_REG2_ / PMC_SPIV_CTRL_REG2Configuration");
-        FAPI_INF("    o2s_inter_frame_delay       => %d ",  o2s_inter_frame_delay );
-
-        rc = fapiPutScom(i_target, PMC_O2S_CTRL_REG2_0x00062053, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_O2S_CTRL_REG2_0x00062053) failed.");
-            break;
-        }
-
-        rc = fapiPutScom(i_target, PMC_SPIV_CTRL_REG2_0x00062043, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_SPIV_CTRL_REG2_0x00062043) failed.");
-            break;
-        }
-
-        //  ******************************************************************
-        //     - set PMC_SPIV_CTRL_REG3
-        //  ******************************************************************
-
-        rc = fapiGetScom(i_target, PMC_SPIV_CTRL_REG3_0x00062044, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_SPIV_CTRL_REG3) failed.");
-            break;
-        }
-
-        e_rc = data.insertFromRight(  attr_pm_spivid_inter_retry_delay_value   ,0,17);
-        e_rc |= data.insertFromRight(  var_100ns_div_value , 17 , 6);
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up PMC_SPIV_CTRL_REG3 on Master init");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_INF("  PMC_SPIV_CTRL_REG3 Configuration                  ");
-        FAPI_INF("    spivid_inter_retry_delay_value => %d ",  attr_pm_spivid_inter_retry_delay_value );
-        FAPI_INF("    100ns_div_value                => %d ",  var_100ns_div_value);
-
-        rc = fapiPutScom(i_target, PMC_SPIV_CTRL_REG3_0x00062044, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_SPIV_CTRL_REG3_0x00062044) failed.");
-            break;
-        }
-
-            //  ******************************************************************
-        //     - set PMC_O2S_CTRL_REG4
-        //  ******************************************************************
-
-        rc = fapiGetScom(i_target, PMC_O2S_CTRL_REG4_0x00062055, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_O2S_CTRL_REG4) failed.");
-            break;
-        }
-
-        e_rc  = data.insertFromRight(  o2s_crc_gen_en         ,0,1);
-        e_rc |= data.insertFromRight(  o2s_crc_check_en       ,1,1);
-        e_rc |= data.insertFromRight(  o2s_majority_vote_en   ,2,1);
-        e_rc |= data.insertFromRight(  o2s_max_retries        ,3,5);
-        e_rc |= data.insertFromRight(  o2s_crc_polynomial_enables,8,8);
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up PMC_O2S_CTRL_REG on Master init");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_INF("  PMC_O2S_CTRL_REG4 Configuration");
-        FAPI_INF("    o2s_crc_gen_en           => %d ",  o2s_crc_gen_en          );
-        FAPI_INF("    o2s_crc_check_en         => %d ",  o2s_crc_check_en        );
-        FAPI_INF("    o2s_majority_vote_en     => %d ",  o2s_majority_vote_en    );
-        FAPI_INF("    o2s_max_retries          => %d ",  o2s_max_retries         );
-        FAPI_INF("    o2s_crc_polynomial_enab  => 0x%x ",  o2s_crc_polynomial_enables );
-
-
-        rc = fapiPutScom(i_target, PMC_O2S_CTRL_REG4_0x00062055, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_O2S_CTRL_REG4_0x00062055) failed.");
-            break;
-        }
-
-        //  ******************************************************************
-        //   Program crc polynomials
-        //  ******************************************************************
-
-        rc = fapiGetScom(i_target, PMC_SPIV_CTRL_REG4_0x00062045, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_SPIV_CTRL_REG4) failed.");
-            break;
-        }
-
-        e_rc  = data.insertFromRight(  o2s_crc_gen_en         ,0,1);
-        e_rc |= data.insertFromRight(  o2s_crc_check_en       ,1,1);
-        e_rc |= data.insertFromRight(  o2s_majority_vote_en   ,2,1);
-        e_rc |= data.insertFromRight(  o2s_max_retries        ,3,5);
-        e_rc |= data.insertFromRight(  o2s_crc_polynomial_enables,8,8);
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up PMC_SPIV_CTRL_REG4 on Master init");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_INF("  PMC_SPIV_CTRL_REG4 Configuration");
-        FAPI_INF("    spiv_crc_gen_en           => %d ",  o2s_crc_gen_en          );
-        FAPI_INF("    spiv_crc_check_en         => %d ",  o2s_crc_check_en        );
-        FAPI_INF("    spiv_majority_vote_en     => %d ",  o2s_majority_vote_en    );
-        FAPI_INF("    spiv_max_retries          => %d ",  o2s_max_retries         );
-        FAPI_INF("    spiv_crc_polynomial_enab  => 0x%x ",  o2s_crc_polynomial_enables );
-
-        rc = fapiPutScom(i_target, PMC_SPIV_CTRL_REG4_0x00062045, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_SPIV_CTRL_REG4_0x00062045) failed.");
-            break;
-        }
-
-        //  ******************************************************************
-        //     - write PMC_PARAMETER_REG0
-        //  ******************************************************************
-        rc = fapiGetScom(i_target, PMC_PARAMETER_REG0_0x00062005, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_PARAMETER_REG0_0x00062005) failed.");
-            break;
-        }
-
-        e_rc = data.insertFromRight(hangpulse_predivider ,15,6);
-        e_rc |= data.insertFromRight(gpsa_timeout_value   ,21,8);
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up PMC_PARAMETER_REG0_0x00062005 on Master init");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_INF("  PMC_PARAMETER_REG0 Configuration");
-        FAPI_INF("    hangpulse_predivider       => 0x%x ",  hangpulse_predivider);
-        FAPI_INF("    gpsa_timeout_value         => 0x%x ",  gpsa_timeout_value  );
-
-        rc = fapiPutScom(i_target, PMC_PARAMETER_REG0_0x00062005, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_PARAMETER_REG0_0x00062005) failed.");
-            break;
-        }
-
-        //  ******************************************************************
-        //     - write PMC_RAIL_BOUNDS_0x00062003 to place open defaults into
-        //          the rail bounds as the hardware defaults to both being
-        //          00 --- which may be a turbo frequency.
-        //  ******************************************************************
-        //  Added for SW207759
-        rc = fapiGetScom(i_target, PMC_RAIL_BOUNDS_0x00062003, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_RAIL_BOUNDS_0x00062003) failed.");
-            break;
-        }
-
-        e_rc |= data.setByte(0, -128);  // Pmin
-        e_rc |= data.setByte(1,  127);  // Pmax
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up PMC_RAIL_BOUNDS_0x00062003 on Master init");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_INF("  PMC_RAIL_BOUNDS_0x00062003 Configuration");
-        FAPI_INF("    pmin_rail       => 0x%x ",  data.getByte(0));
-        FAPI_INF("    pmax_rail       => 0x%x ",  data.getByte(1));
-
-        rc = fapiPutScom(i_target, PMC_RAIL_BOUNDS_0x00062003, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_RAIL_BOUNDS_0x00062003) failed.");
-            break;
-        }
-
-        //  ******************************************************************
-        //     - write PMC_MODE_REG
-        //  ******************************************************************
-        rc = fapiGetScom(i_target, PMC_MODE_REG_0x00062000, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_MODE_REG_0x00062000) failed.");
-            break;
-        }
-
-        e_rc  = data.insertFromRight(zero , 0  ,1); //HW_PSTATE_MODE
-        e_rc |= data.insertFromRight(zero , 1  ,1); //FW_PSTATE_AUCTI
-        e_rc |= data.insertFromRight(one  , 2  ,1); //FW_PSTATE_MODEON_MODE
-        e_rc |= data.insertFromRight(one  , 9  ,1); //ENABLE_PSTATE_STEPPING (hack for PSS miss)
-        e_rc |= data.insertFromRight(zero , 13 ,1); //SAFE_MODE_WITHOUT_SPIVID
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up PMC_SPIV_CTRL_REG4 on Master init");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_INF("  PMC_MODE_REG Configuration");
-        FAPI_INF("    SAFE_MODE_WITHOUT_SPIVID       => %d ",  zero);
-
-        rc = fapiPutScom(i_target, PMC_MODE_REG_0x00062000, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_MODE_REG_0x00062000) failed.");
-            break;
-        }
-
-        // *************************************************************
-        // REGISTER WRITES FOR DCMS
-        // *************************************************************
-
-        if (i_dcm)
-        {
-            rc = fapiGetScom(i_target, DEVICE_ID_REG_0x000F000F, data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(DEVICE_ID_REG_0x000F000F) failed.");
-                break;
-            }
-
-            is_master = data.isBitClear(39) ;
-            is_slave = not is_master ;
-
-            if (is_master)
-            {
-                FAPI_INF ("**** Setting up DCM Master ****");
-            }
-            else
-            {
-                FAPI_INF ("**** Setting up DCM Slave ****");
-            }
-            //  ****************************************************************
-            //     - write PMC_MODE_REG
-            //  ****************************************************************
-            rc = fapiGetScom(i_target, PMC_MODE_REG_0x00062000, data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(PMC_MODE_REG_0x00062000) failed.");
-                break;
-            }
-
-            e_rc  = data.insertFromRight( one      , 6 ,1); //ENABLE_INTERCHIP_INTERFACE
-            e_rc |= data.insertFromRight( is_master, 7 ,1); //INTERCHIP_MODE
-            e_rc |= data.insertFromRight( is_master, 8 ,1); //ENABLE_INTERCHIP_PSTATE_IN_HAPS
-            e_rc |= data.insertFromRight( is_slave ,13 ,1); //SAFEMODE_WITHOUT_SPIVID
-            if (e_rc)
-            {
-                FAPI_ERR("ecmdDataBufferBase error setting up PMC_MODE_REG_0x00062000 on Master DCM init");
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            FAPI_INF("  PMC_MODE_REG Configuration");
-            FAPI_DBG("    ENABLE_INTERCHIP_INTERFACE             => %d ", one       );
-            FAPI_DBG("    INTERCHIP_MODE                         => %d ", is_master );
-            FAPI_DBG("    ENABLE_INTERCHIP_PSTATE_IN_HAPS        => %d ", is_master );
-            FAPI_DBG("    SAFE_MODE_WITHOUT_SPIVID               => %d ", is_slave  );
-
-            rc = fapiPutScom(i_target, PMC_MODE_REG_0x00062000, data );
-            if (rc)
-            {
-                FAPI_ERR("fapiPutScom(PMC_MODE_REG_0x00062000) failed.");
-                break;
-            }
-            FAPI_DBG(" before exiting pmc_init PMC_MODE_REG_0x00062000  =>0x%16llx", data.getDoubleWord(0));
-
-            //  ******************************************************************
-            //     - set PMC_O2S_CTRL_REG1
-            //  ******************************************************************
-
-            rc = fapiGetScom(i_target, PMC_O2S_CTRL_REG1_0x00062052, data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(PMC_O2S_CTRL_REG1) failed.");
-                break;
-            }
-
-            // Force the port enables on the slave or else the SPIVID on the slave
-            // chip will hang
-            if (is_slave)
-            {
-                 o2s_port_enable = 4 ;
-                 e_rc = data.insertFromRight(o2s_port_enable     ,18,3);
-                 if (e_rc)
-                 {
-                     FAPI_ERR("ecmdDataBufferBase error setting up forced slave port enable on Slave DCM init");
-                     rc.setEcmdError(e_rc);
-                     break;
-                 }
-                 FAPI_INF("Forcing port enable on slave to avoid SPIVID controller hang");
-                 FAPI_INF("  PMC O2S CTRL_REG_1 / PMC_SPIV_CTRL_REG1 Configuration");
-                 FAPI_INF("    spiv/o2s_port_enable       => %d ",  o2s_port_enable  );
-            }
-
-            // \todo this should be looked at for removal to avoid future problems
-            rc = fapiPutScom(i_target, PMC_O2S_CTRL_REG1_0x00062052, data );
-            if (rc)
-            {
-                FAPI_ERR("fapiPutScom(PMC_O2S_CTRL_REG1_0x00062052) failed.");
-                break;
-            }
-
-            rc = fapiPutScom(i_target, PMC_SPIV_CTRL_REG1_0x00062042, data );
-            if (rc)
-            {
-                FAPI_ERR("fapiPutScom(PMC_SPIV_CTRL_REG1_0x00062042) failed.");
-                break;
-            }
-
-            //  ******************************************************************
-            //     - write PMC_INTCHP_CTRL_REG1
-            //  ******************************************************************
-            rc = fapiGetScom(i_target, PMC_INTCHP_CTRL_REG1_0x00062010, data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(PMC_INTCHP_CTRL_REG1_0x00062010) failed.");
-                break;
-            }
-
-            e_rc  = data.insertFromRight(one , 0 ,1);                      //INTERCHIP_GA_FSM_ENABLE
-            e_rc |= data.insertFromRight(zero, 7 ,1);                      //INTERCHIP_CPHA
-            e_rc |= data.insertFromRight( interchip_clock_divider, 4 ,10); //INTERCHIP_CLOCK_DIVIDER
-            if (e_rc)
-            {
-                FAPI_ERR("ecmdDataBufferBase error setting up PMC_INTCHP_CTRL_REG1_0x00062010 on Master DCM init");
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            FAPI_INF("  PMC_INTCHP_CTRL_REG1 Configuration                  ");
-            FAPI_DBG("    INTERCHIP_GA_FSM_ENABLE        =>   %d ",  one          );
-            FAPI_DBG("    INTERCHIP_CPHA                 =>   %d ", zero     );
-            FAPI_DBG("    INTERCHIP_CLOCK_DIVIDER        => 0x%x ", interchip_clock_divider     );
-
-            rc = fapiPutScom(i_target, PMC_INTCHP_CTRL_REG1_0x00062010, data );
-            if (rc)
-            {
-                FAPI_ERR("fapiPutScom(PMC_INTCHP_CTRL_REG1_0x00062010) failed.");
-                break;
-            }
-            FAPI_DBG(" before exiting pmc_init PMC_INTCHP_CTRL_REG1_0x00062010  =>0x%16llx", data.getDoubleWord(0));
-
-            //  ******************************************************************
-            //     - write PMC_INTCHP_CTRL_REG4
-            //  ******************************************************************
-            rc = fapiGetScom(i_target, PMC_INTCHP_CTRL_REG4_0x00062012, data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(PMC_INTCHP_CTRL_REG4_0x00062012) failed.");
-                break;
-            }
-            e_rc  = data.insertFromRight(one , 0 ,1); //INTERCHIP_ECC_GEN_EN
-            e_rc |= data.insertFromRight(one , 1 ,1); //INTERCHIP_ECC_CHECK_EN
-            e_rc |= data.insertFromRight(one , 2 ,1); //INTERCHIP_MSG_RCV_OVERFLOW_CHECK_EN
-            e_rc |= data.insertFromRight(one , 3 ,1); //INTERCHIP_ECC_UE_BLOCK_EN
-            if (e_rc)
-            {
-                FAPI_ERR("ecmdDataBufferBase error setting up PMC_INTCHP_CTRL_REG1_0x00062010 on Master DCM init");
-                rc.setEcmdError(e_rc);
-                break;
-            }
-
-            FAPI_INF("  PMC_INTCHP_CTRL_REG4 Configuration                  ");
-            FAPI_DBG("    INTERCHIP_ECC_GEN_EN                       =>   %d ",  one          );
-            FAPI_DBG("    INTERCHIP_ECC_CHECK_EN                     =>   %d ",  one          );
-            FAPI_DBG("    INTERCHIP_MSG_RCV_OVERFLOW_CHECK_EN        =>   %d ",  one          );
-            FAPI_DBG("    INTERCHIP_ECC_UE_BLOCK_EN                  =>   %d ",  one          );
-
-            rc = fapiPutScom(i_target, PMC_INTCHP_CTRL_REG4_0x00062012, data );
-            if (rc)
-            {
-                FAPI_ERR("fapiPutScom(PMC_INTCHP_CTRL_REG4_0x00062012) failed.");
-                break;
-            }
-            FAPI_DBG(" before exiting pmc_init PMC_INTCHP_CTRL_REG4_0x00062012  =>0x%16llx", data.getDoubleWord(0));
-        } // dcm
-
-    } while(0);
-
-
-    FAPI_INF ("Done with the init");
-    return rc;
-
-}
-
-
-// ----------------------------------------------------------------------
-/**
- * p8_pmc_init
- *
- * @param[in] i_target1 Primary Chip target:   Murano - chip0; Venice - chip
- * @param[in] i_target2 Secondary Chip target: Murano - chip1; Venice - NULL
- * @param[in] mode (PM_INIT , PM_CONFIG, PM_RESET, PM_RESET_SOFT)
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-p8_pmc_init(const fapi::Target& i_target1, const fapi::Target& i_target2, uint32_t mode)
-{
-    fapi::ReturnCode    rc;
-
-    uint8_t         attr_dcm_installed_1 = 0;
-    uint8_t         attr_dcm_installed_2 = 0;
-    bool            dcm = false;
-
-    do
-    {
-
-        // ------------------------------------------------
-        // CONFIG mode
-        // ------------------------------------------------
-        if (mode == PM_CONFIG)
-        {
-            rc = pmc_config_spivid_settings(i_target1);
-            if (rc)
-            {
-                FAPI_ERR("Error from pmc_config_spivid_settings for target1");
-                break;
-            }
-
-            if ( i_target2.getType() != TARGET_TYPE_NONE )
-            {
-                rc = pmc_config_spivid_settings(i_target2);
-                if (rc)
-                {
-                    FAPI_ERR("Error from pmc_config_spivid_settings for target2");
-                    break;
-                }
-            }
-        }
-
-        // ------------------------------------------------
-        // INIT mode
-        // ------------------------------------------------
-        else if (mode == PM_INIT)
-        {
-
-            // Per SW250226, determine if initialization should be as a real DCM
-            // or as a garded SCM
-            rc = FAPI_ATTR_GET(ATTR_PROC_DCM_INSTALLED, &i_target1, attr_dcm_installed_1);
-            if (rc)
-            {
-                FAPI_ERR("fapiGetAttribute of ATTR_DCM_INSTALLED with rc = 0x%x", (uint32_t)rc);
-                break;
-            }
-
-            FAPI_INF (" ATTR_DCM_INSTALLED value in init function = 0x%x", attr_dcm_installed_1 );
-
-            // Default is dcm = false
-            if (attr_dcm_installed_1 == 0)
-            {
-
-                // target2 should be NULL
-                // if not NULL, exit with config error
-                if (i_target2.getType() != TARGET_TYPE_NONE  )
-                {
-                    FAPI_ERR ("Config error : target2 is not null for target1 SCM case");
-                    const fapi::Target& MASTER_TARGET = i_target1;
-                    const fapi::Target& SLAVE_TARGET = i_target2;
-                    const uint8_t & DCM_INSTALLED_1 =  attr_dcm_installed_1;
-                    const uint8_t & DCM_INSTALLED_2 =  attr_dcm_installed_2;
-                    FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PMCINIT_SCM_INSTALL_ERROR);
-                    break;
-                }
-            }
-            // Target 1 indicates a physical DCM
-            else
-            {
-                // Check if Target 2 indicates a real DCM.  If not, gard defaults to SCM
-                if (i_target2.getType() != TARGET_TYPE_NONE  )
-                {
-                    rc = FAPI_ATTR_GET(ATTR_PROC_DCM_INSTALLED, &i_target2, attr_dcm_installed_2);
-                    if (rc)
-                    {
-                        FAPI_ERR("fapiGetAttribute of ATTR_DCM_INSTALLED with rc = 0x%x", (uint32_t)rc);
-                        break;
-                    }
-                    FAPI_INF (" ATTR_DCM_INSTALLED value in INIT function = 0x%x", attr_dcm_installed_2 );
-
-                    if (attr_dcm_installed_2 != 1)
-                    {
-                        FAPI_ERR ("Config error:  DCM_INSTALLED target2 does not match target1\n" \
-                                  "   target1: %08x attr:%02x, target2:%08x attr:%02x",
-                                  i_target1.getType(), attr_dcm_installed_1,
-                                  i_target2.getType(), attr_dcm_installed_2);
-                        const fapi::Target& MASTER_TARGET = i_target1;
-                        const fapi::Target& SLAVE_TARGET = i_target2;
-                        const uint8_t & DCM_INSTALLED_1 =  attr_dcm_installed_1;
-                        const uint8_t & DCM_INSTALLED_2 =  attr_dcm_installed_2;
-                        FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PMCINIT_DCM_INSTALL_ERROR);
-                        break;
-                    }
-                    dcm = true;
-                }
-            }
-
-
-            FAPI_INF("Executing p8_pmc_init for as %s for Target %s ...",
-                            dcm ? "DCM" : "SCM",
-                            i_target1.toEcmdString());
-            rc = pmc_init_function(i_target1, dcm);
-            if (rc)
-            {
-                FAPI_ERR("Error from pmc_init_function for target1");
-                break;
-            }
-
-            if ( i_target2.getType() != TARGET_TYPE_NONE )
-            {
-                FAPI_INF("Executing p8_pmc_init for Target %s ...", i_target2.toEcmdString());
-                rc = pmc_init_function(i_target2, dcm);
-                if (rc)
-                {
-                  FAPI_ERR("Error from pmc_init_function for target2");
-                  break;
-                }
-            }
-        }
-
-        /// -------------------------------
-        /// Reset:  perform hard reset of PMC
-        /// -------------------------------
-        else if (mode == PM_RESET)
-        {
-            FAPI_INF("Hard reset detected.  Calling pmc_reset_function");
-            rc = pmc_reset_function(i_target1 , i_target2, mode);
-            if (rc)
-            {
-                FAPI_ERR("Error from pmc_reset_function");
-                break;
-            }
-        }
-
-        // -------------------------------
-        /// Reset:  perform soft reset of PMC
-        /// -------------------------------
-        else if (mode == PM_RESET_SOFT)
-        {
-            FAPI_INF("Soft reset detected.  Calling pmc_reset_function");
-            rc = pmc_reset_function(i_target1 , i_target2, mode);
-            if (rc)
-            {
-                FAPI_ERR("Error from pmc_reset_function");
-                break;
-            }
-        }
-
-
-        /// -------------------------------
-        /// Unsupported Mode
-        /// -------------------------------
-        else
-        {
-            FAPI_ERR("Unknown mode passed to p8_pmc_init. Mode %x ", mode);
-            const uint64_t & MODE = (uint64_t)mode;
-            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PMC_CODE_BAD_MODE);
-        }
-
-    } while(0);
-    //    FAPI_INF("im here ");
-    return rc;
-
-} // end p8_pmc_init
-
-
-// ----------------------------------------------------------------------
-/**
- * p8_pmc_poll_pstate_halt
- *
- * @param[in] i_target  Chip target
- * @param[in] i_side    Master - 0; Slave - 1
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-p8_pmc_poll_pstate_halt(const fapi::Target& i_target, uint8_t const i_side)
-{
-    fapi::ReturnCode    rc;
-    ecmdDataBufferBase  pmcstatus(64);
-    ecmdDataBufferBase  porr(64);
-
-    bool is_pstate_error_stopped = false ;
-    bool is_error_stopped = false;
-
-    uint32_t count = 0 ;
-    bool is_stopped = false ;
-
-    do
-    {
-
-        // Confirm that Pstate hardware is quiesced before changing modes
-        rc = fapiGetScom(i_target, PMC_STATUS_REG_0x00062009 , pmcstatus );
-        if (rc)
-        {
-             FAPI_ERR("fapiGetScom(PMC_STATUS_REG_0x00062009) failed.");
-             break;
-        }
-
-        //  Poll for local Pstates being stopped
-        for (count = 0 , is_stopped = 0 ; count <= PSTATE_HALT_POLL_COUNT && is_stopped == 0;  count++)
-        {
-
-            //  is_stopped = (GPSA_CHG_ONGOING == 0 ||
-            //                VOLT_CHG_ONGOING == 0 ||
-            //                BRD_CST_ONGOING  == 0) ;
-            is_stopped = pmcstatus.isBitClear(7)  || pmcstatus.isBitClear(8) || pmcstatus.isBitClear(9);
-
-            // Leave if stopped
-            if (is_stopped)
-                continue;
-
-            // wait for 1 millisecond/loop in hardware
-            rc = fapiDelay(1000*1000, 20000000);
-            if (rc)
-            {
-                FAPI_ERR("FAPI delay ends up with error");
-                break;
-            }
-
-            // Re-read
-            rc = fapiGetScom(i_target, PMC_STATUS_REG_0x00062009 , pmcstatus );
-            if (rc)
-            {
-                 FAPI_ERR("fapiGetScom(PMC_STATUS_REG_0x00062009) failed.");
-                 break;
-            }
-
-        } // end_for
-        // Error check
-        if (!rc.ok())
-        {
-            break;
-        }
-
-        // check for Pstate errors
-        is_pstate_error_stopped =   pmcstatus.isBitSet(0) ||
-                                    pmcstatus.isBitSet(1) ||
-                                    pmcstatus.isBitSet(5) ||
-                                    pmcstatus.isBitSet(6) ||
-                                    pmcstatus.isBitSet(11);
-
-        if (is_pstate_error_stopped)
-        {
-            FAPI_ERR("Pstate errors exist. Reset may be suspicious but NOT failing as it could be cleared ... ");
-        }
-
-        if (count > PSTATE_HALT_POLL_COUNT)
-        {
-            FAPI_ERR("Timed out in polling for Local Pstates to quiesce. Reset may be suspicious but NOT failing as it could be cleared ... ");
-        }
-
-
-        rc = fapiGetScom(i_target, PMC_PORRR0_REG_0x0006208E , porr );
-        if (rc)
-        {
-             FAPI_ERR("fapiGetScom(PMC_PORRR0_REG_0x0006208E) failed.");
-             break;
-        }
-
-        // Poll for local Idle being stopped.  As specical wake-up was to have
-        // occured prior to this, execution should be quick.  If this times out,
-        // there is a significant problem.
-        for (count = 0 , is_stopped = 0 ; count <= PORE_REQ_POLL_COUNT && is_stopped == 0;  count++)
-        {
-            //  is_stopped = (PORRR_PORE_BUSY == 0) ;
-            is_stopped = porr.isBitClear(20);
-
-            // Leave if stopped
-            if (is_stopped)
-                continue;
-
-            // wait for 1 millisecond/loop in hardware
-            rc = fapiDelay(1000*1000, 20000000);
-            if (rc)
-            {
-                FAPI_ERR("FAPI delay ends up with error");
-                break;
-            }
-
-            // Re-read
-            rc = fapiGetScom(i_target, PMC_PORRR0_REG_0x0006208E , porr );
-            if (rc)
-            {
-                 FAPI_ERR("fapiGetScom(PMC_PORRR0_REG_0x0006208E) failed.");
-                 break;
-            }
-
-        } // end_for
-        // Error check
-        if (!rc.ok())
-        {
-            break;
-        }
-
-        // check for Idle errors
-        is_error_stopped =   porr.isBitSet(21) || pmcstatus.isBitSet(12);
-
-        if (is_error_stopped)
-        {
-            FAPI_ERR("PMC Idle halt errors exist.  OCC recovery cannot proceed ... ");
-            const fapi::Target& TARGET = i_target;
-            const uint64_t & PORR = porr.getDoubleWord(0);
-            const uint64_t & PMCSTATUS = pmcstatus.getDoubleWord(0);
-            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PMCRESET_IDLE_ERROR);
-            break;
-        }
-
-        if (count > PORE_REQ_POLL_COUNT)
-        {
-            FAPI_ERR("PMC Timed out in polling for Idle to Halt. OCC recovery cannot proceed ... ");
-            const fapi::Target& TARGET = i_target;
-            const uint64_t & PORR = porr.getDoubleWord(0);
-            const uint64_t & PMCSTATUS = pmcstatus.getDoubleWord(0);
-            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PMCRESET_IDLE_TIMEOUT_ERROR);
-            break;
-        }
-
-    }
-    while (0);
-    return rc;
-}
-
-// ----------------------------------------------------------------------
-/**
- * p8_pmc_poll_idle_halt
- *
- * @param[in] i_target  Chip target
- * @param[in] i_side    Master - 0; Slave - 1
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-p8_pmc_poll_idle_halt(const fapi::Target& i_target, const uint8_t i_side)
-{
-    fapi::ReturnCode    rc;
-    ecmdDataBufferBase  pmcstatus(64);
-    ecmdDataBufferBase  porr(64);
-
-    bool is_error_stopped = false;
-
-    uint32_t count = 0 ;
-    bool is_stopped = false ;
-
-    do
-    {
-
-        // Poll for local Idle being stopped.  As special wake-up was to have
-        // occured prior to this, execution should be quick.  If this times out,
-        // there is a significant problem.
-        for (count = 0 , is_stopped = 0 ; count <= PORE_REQ_POLL_COUNT && is_stopped == 0;  count++)
-        {
-            //  is_stopped = (PORRR_PORE_BUSY == 0) ;
-            is_stopped = porr.isBitClear(20);
-
-            // Leave if stopped
-            if (is_stopped)
-                continue;
-
-            // wait for 1 millisecond/loop in hardware
-            rc = fapiDelay(1000*1000, 20000000);
-            if (rc)
-            {
-                FAPI_ERR("FAPI delay ends up with error");
-                break;
-            }
-
-            // Re-read
-            rc = fapiGetScom(i_target, PMC_PORRR0_REG_0x0006208E , porr );
-            if (rc)
-            {
-                 FAPI_ERR("fapiGetScom(PMC_PORRR0_REG_0x0006208E) failed.");
-                 break;
-            }
-
-        } // end_for
-        // Error check
-        if (!rc.ok())
-        {
-            break;
-        }
-
-        // check for Idle errors
-        is_error_stopped =   porr.isBitSet(21) || pmcstatus.isBitSet(12);
-
-        if (is_error_stopped)
-        {
-            FAPI_ERR("PMC Idle halt errors exist.  OCC recovery cannot proceed ... ");
-            const fapi::Target& TARGET = i_target;
-            const uint64_t & PORR = porr.getDoubleWord(0);
-            const uint64_t & PMCSTATUS = pmcstatus.getDoubleWord(0);
-            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PMCRESET_IDLE_ERROR);
-            break;
-        }
-
-        if (count > PORE_REQ_POLL_COUNT)
-        {
-            FAPI_ERR("PMC Timed out in polling for Idle to Halt. OCC recovery cannot proceed ... ");
-            const fapi::Target& TARGET = i_target;
-            const uint64_t & PORR = porr.getDoubleWord(0);
-            const uint64_t & PMCSTATUS = pmcstatus.getDoubleWord(0);
-            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PMCRESET_IDLE_TIMEOUT_ERROR);
-            break;
-        }
-
-    }
-    while (0);
-    return rc;
-}
-
-// ----------------------------------------------------------------------
-/**
- * p8_pmc_poll_interchip_halt
- *
- * @param[in] i_target  Chip target
- * @param[in] i_side    Master - 0; Slave - 1
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-p8_pmc_poll_interchip_halt( const fapi::Target& i_target,
-                            const uint8_t       i_side,
-                            bool                i_MasterPMC,
-                            const fapi::Target& i_dcm_target)
-{
-    fapi::ReturnCode    rc;
-    uint32_t            e_rc;
-    ecmdDataBufferBase  data(64);
-
-    bool is_stopped = false ;
-    bool is_pstate_error_stopped = false;
-    bool is_intchp_error_stopped = false;
-
-    uint32_t count = 0 ;
-
-
-    do
-    {
-        rc = fapiGetScom(i_target, PMC_INTCHP_COMMAND_REG_0x00062014 , data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_INTCHP_COMMAND_REG_0x00062014) failed.");
-            break;
-        }
-
-        e_rc = data.setBit(01);
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up PMC_INTCHP_COMMAND_REG_0x00062014 on Master during reset");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        rc = fapiPutScom(i_target, PMC_INTCHP_COMMAND_REG_0x00062014 , data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_INTCHP_COMMAND_REG_0x00062014) failed.");
-            break;
-        }
-
-        //  Poll for interchip interface to stop
-        for (count = 0 , is_stopped = 0 ; count <= INTERCHIP_HALT_POLL_COUNT && is_stopped == 0;  count++)
-        {
-
-            rc = fapiGetScom(i_target, PMC_STATUS_REG_0x00062009 , data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(PMC_STATUS_REG_0x00062009) failed.");
-                break;
-            }
-
-            //    Interchip_Wait1: Read PMC_STATUS_REG
-            //       is_pstate_error_stopped =  pstate_processing_is_suspended ||
-            //                                  gpsa_bdcst_error ||
-            //                                  gpsa_vchg_error ||
-            //                                  gpsa_timeout_error ||
-            //                                  pstate_interchip_error;
-            is_pstate_error_stopped =   data.isBitSet(0) ||
-                                        data.isBitSet(1) ||
-                                        data.isBitSet(5) ||
-                                        data.isBitSet(6) ||
-                                        data.isBitSet(11);
-
-            //    Interchip_Wait2: Read PMC_INTCHP_STATUS_REG
-            //       is_intchp_error_stopped =  interchip_ecc_ue_err ||
-            //                                  interchip_fsm_err ||
-            //                                  (is_MasterPMC && interchip_slave_error_code != 0) is_MasterPMC
-            rc = fapiGetScom(i_target, PMC_INTCHP_STATUS_REG_0x00062013 , data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(PMC_INTCHP_STATUS_REG_0x00062013) failed.");
-                break;
-            }
-            is_intchp_error_stopped =   data.isBitSet(1) ||
-                                        data.isBitSet(7) ||
-                                        (~( data.isBitClear(16,4) &&  i_MasterPMC)) ;
-
-            //    is_stopped = (interchip_ga_ongoing == 0) ||
-            //                  is_pstate_error_stopped ||
-            //                  is_intchp_error_stopped ;
-            is_stopped = data.isBitClear(0)  || is_pstate_error_stopped || is_intchp_error_stopped;
-
-            if (is_stopped)
-                continue;
-
-            FAPI_DBG("polling interchip ongoing :  ... ");
-
-            //       If !is_stopped Then -->Interchip_Wait1  (Wait limit is parm TD_Interchip_HaltWait_max=260)
-
-            // wait for 1 millisecond/loop in hardware
-            rc = fapiDelay(1000*1000, 20000000);
-            if (rc)
-            {
-                FAPI_ERR("fapi delay ends up with error");
-                break;
-            }
-
-        } // end_for
-        // Error check
-        if (!rc.ok())
-        {
-            break;
-        }
-
-        if (count > INTERCHIP_HALT_POLL_COUNT)
-        {
-            FAPI_INF("Timed out in polling interchip ongoing : Reset may be suspicious but NOT failing as it could be cleared ... ");
-            const fapi::Target& THISTARGET = i_target;
-            const fapi::Target& DCMTARGET = i_dcm_target;
-            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PMCRESET_INTCHP_TIMEOUT_ERROR);
-            fapiLogError(rc, fapi::FAPI_ERRL_SEV_RECOVERED);
-        }
-
-        // InterchipIf: PMC_MODE_REG.interchip_halt_if<-1 interchip_halt_if
-
-        rc = fapiGetScom(i_target, PMC_MODE_REG_0x00062000 , data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_MODE_REG_0x00062000) failed.");
-            break;
-        }
-
-        e_rc = data.setBit(15);
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up PMC_MODE_REG_0x00062000 on Master during reset");
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        rc = fapiPutScom(i_target, PMC_MODE_REG_0x00062000 , data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_MODE_REG_0x00062000) failed.");
-            break;
-        }
-
-    }
-    while (0);
-    return rc;
-}
-
-// ----------------------------------------------------------------------
-/**
- * p8_pmc_poll_spivid_halt
- *
- * @param[in] i_target  Chip target
- * @param[in] i_side    Master - 0; Slave - 1
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-p8_pmc_poll_spivid_halt(const fapi::Target& i_target,
-                        const uint8_t       i_side)
-{
-    fapi::ReturnCode    rc;
-    uint32_t            e_rc;
-    ecmdDataBufferBase  data(64);
-
-    bool is_spivid_stopped = false ;
-
-    uint32_t count = 0 ;
-
-
-    do
-    {
-        //  HaltSpivid: PMC_SPIV_COMMAND_REG.spivid_halt_fsm<-1
-        rc = fapiGetScom(i_target, PMC_SPIV_COMMAND_REG_0x00062047 , data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_SPIV_COMMAND_REG_0x00062047) failed.");
-            break;
-        }
-
-        e_rc = data.setBit(0);
-        if (e_rc)
-        {
-            FAPI_ERR("ecmdDataBufferBase error setting up PMC_SPIV_COMMAND_REG_0x00062047 on Side %d during reset",
-                                    i_side);
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        rc = fapiPutScom(i_target, PMC_SPIV_COMMAND_REG_0x00062047 , data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_SPIV_COMMAND_REG_0x00062047) failed.");
-            break;
-        }
-
-        //    Spivid_HaltWait: Read PMC_SPIV_STATUS_REG
-        for (count = 0 , is_spivid_stopped=0; count <= VOLTAGE_CHANGE_POLL_COUNT  && is_spivid_stopped==0  ; count++)
-        {
-
-            rc = fapiGetScom(i_target, PMC_SPIV_STATUS_REG_0x00062046 , data );
-            if (rc)
-            {
-              FAPI_ERR("fapiGetScom(PMC_SPIV_STATUS_REG_0x00062046) failed.");
-              break;
-            }
-            is_spivid_stopped =   data.isBitClear(0) ||
-                                  data.isBitSet(1)   ||
-                                  data.isBitSet(2)   ||
-                                  data.isBitSet(3)   ||
-                                  data.isBitSet(4) ;
-
-            if (is_spivid_stopped)
-                continue;
-
-            FAPI_DBG("Polling spivid ongoing on Side %d", i_side);
-
-            // wait for 1 millisecond/loop in hardware
-            rc = fapiDelay(1000*1000, 20000000);
-            if (rc)
-            {
-                FAPI_ERR("fapi delay ends up with error");
-                break;
-            }
-
-        } // end for
-
-        // Error check
-        if (!rc.ok())
-        {
-            break;
-        }
-
-        // Timeout check
-        if (count > VOLTAGE_CHANGE_POLL_COUNT)
-        {
-            FAPI_ERR("Timed out in polling SPIVID ongoing  : Reset_suspicious    ... ");
-            const fapi::Target& TARGET = i_target;
-            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PMCRESET_SPIVID_TIMEOUT_ERROR);
-            fapiLogError(rc, fapi::FAPI_ERRL_SEV_RECOVERED);
-        }
-
-    }
-    while (0);
-    return rc;
-}
-
-// ----------------------------------------------------------------------
-/**
- * p8_pmc_poll_o2p_halt
- *
- * @param[in] i_target  Chip target
- * @param[in] i_side    Master - 0; Slave - 1
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-p8_pmc_poll_o2p_halt(const fapi::Target& i_target,
-                     const uint8_t       i_side)
-{
-    fapi::ReturnCode    rc;
-    uint32_t            e_rc;
-    ecmdDataBufferBase  data(64);
-
-    bool is_stopped = false ;
-
-    uint32_t count = 0 ;
-
-
-    do
-    {
-        rc = fapiGetScom(i_target, PMC_O2S_COMMAND_REG_0x00062057 , data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(PMC_O2S_COMMAND_REG__0x00062057) failed.");
-            break;
-        }
-
-        e_rc = data.setBit(00);
-        if(e_rc)
-        {
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        rc = fapiPutScom(i_target, PMC_O2S_COMMAND_REG_0x00062057 , data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(PMC_O2S_COMMAND_REG__0x00062057) failed.");
-            break;
-        }
-
-        // Poll for O2S to be stopped
-        for (count = 0 , is_stopped = 0 ; count <= O2S_POLL_COUNT && is_stopped == 0 ; count++)
-        {
-            // wait for 1 millisecond/loop in hardware
-            rc = fapiDelay(1000*1000, 20000000);
-            if (rc)
-            {
-                FAPI_ERR("fapi delay ends up with error");
-                break;
-            }
-            rc = fapiGetScom(i_target, PMC_O2S_STATUS_REG_0x00062056 , data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(PMC_O2S_STATUS_REG__0x00062056) failed.");
-                break;
-            }
-
-            is_stopped = (  data.isBitClear(0) ||
-                            data.isBitSet(4)   ||
-                            data.isBitSet(5)   ||
-                            data.isBitSet(7));
-            FAPI_DBG("Polling O2S ongoing . :   .. ");
-        }
-
-        // Error check
-        if (!rc.ok())
-        {
-            break;
-        }
-
-        // Timeout check
-        if (count > O2P_POLL_COUNT)
-        {
-            FAPI_ERR("Timed out in polling O2P ongoing . : Reset_suspicious .. ");
-            const fapi::Target& TARGET = i_target;
-            const uint64_t & O2PSTATUS = data.getDoubleWord(0);
-            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PMCRESET_O2P_TIMEOUT_ERROR);
-            fapiLogError(rc, fapi::FAPI_ERRL_SEV_RECOVERED);
-        }
-
-    }
-    while (0);
-    return rc;
-}
-
-} //end extern C
-
-/*
-*************** Do not edit this area ***************
-This section is automatically updated by CVS when you check in this file.
-Be sure to create CVS comments when you commit so that they can be included here.
-
-$Log: p8_pmc_init.C,v $
-Revision 1.42  2014/04/10 21:12:22  stillgs
-Per SW256701, hardcode the enablement of Pstate Stepping in PMC Mode reg for GA1
-
-Revision 1.41  2014/04/03 20:29:13  cmolsen
-Removed three bool variables that were set only but not used.
-
-Revision 1.40  2014/03/12 21:03:15  stillgs
-Per SW251617, updates for HostCompiler tool flagged logical errors (bitwise operators were scalar was intended
-
-Revision 1.39  2014/03/06 16:26:54  stillgs
-SW250226 (deconfigured chip on DCM)
-
-Revision 1.38  2014/03/05 22:13:13  stillgs
-
-- Updates per RAS/callout reviews.  In dealing with these comments, did some
-restructuring of common code into subroutines.  Runs through the Cronus
-OCC reset shift cleanly.
-
-Revision 1.37  2013/11/07 14:00:09  stillgs
-
-Per SW232699, updated SPIVID parameters
-/!/ Units: nanoseconds;  Value 15 microseconds
-const uint32_t  default_spivid_interframe_delay_write_status = 15000;
-/!/ Units: nanoseconds;  Value 40 microseconds
- const uint32_t  default_spivid_inter_retry_delay = 40000;
-
-Revision 1.36  2013/08/02 19:09:07  stillgs
-
-- Support for p8_pm.H.
-- Temporarily changed the detection of set FIR bit from FAPI_ERR to FAPI_INF until fully complete with testing.
-This keeps "FAPI ERR" from showing up in log for things that do not give non-zero RCs.
-- Added plumbing support for "soft" rest.  FUNCTION IS NOT YET SUPPORTED
-
-Revision 1.35  2013/06/07 19:17:24  stillgs
-
-Fix swap of Pmin and PMax rail settings
-
-Revision 1.34  2013/06/05 21:09:03  stillgs
-
-Fix for SW207759:  Added setting of PMC Rail Bounds register to +127/-127
-to deal with hardware reset values being 0s --- the turbo value for P8 machines
-
-Revision 1.33  2013/05/24 10:53:38  pchatnah
-Assigning boolean variables to false by default
-
-Revision 1.32  2013/05/16 11:41:16  pchatnah
-fixing gerrit comments
-
-Revision 1.31  2013/05/09 10:26:33  pchatnah
-fixing gerrot comments
-
-Revision 1.30  2013/04/30 11:20:22  pchatnah
-fixing memory fault issue for scm
-
-Revision 1.29  2013/04/17 13:11:28  pchatnah
-fixing some more SCM issues
-
-Revision 1.28  2013/04/16 12:00:26  pchatnah
-fixing Daniels failures on hardware
-
-Revision 1.27  2013/04/12 01:25:02  stillgs
-
-Update for DCM initialization and reset function per hardware testing
-
-Revision 1.25  2013/04/06 02:14:03  pchatnah
- restructuring
-
-Revision 1.24  2013/04/04 12:43:49  pchatnah
-fixing sm_without_spivid
-
-Revision 1.23  2013/04/02 14:17:55  pchatnah
-fixing spivid_enable for slave
-
-Revision 1.22  2013/04/01 04:11:54  stillgs
-
-Output formating changes only to remove extraneous log content
-
-Revision 1.21  2013/03/28 14:42:02  pchatnah
-adding FIR check
-
-Revision 1.20  2013/03/28 14:29:04  pchatnah
-adding FIR check
-
-Revision 1.19  2013/03/15 12:25:57  pchatnah
-fixing no_of_ports
-
-Revision 1.18  2013/03/04 16:15:35  pchatnah
-fising more issues for prep_for_reset
-
-Revision 1.17  2013/02/25 19:27:01  pchatnah
-fising compilation issues
-
-Revision 1.16  2013/02/21 08:58:37  pchatnah
-fixing 100ns calculation
-
-Revision 1.15  2013/02/11 15:44:16  pchatnah
-fixing pstate
-
-Revision 1.14  2013/02/07 18:44:49  pchatnah
-adding PM_LFIR reset also into it
-
-Revision 1.13  2013/01/24 11:58:12  pchatnah
-adding log inside the file
-
-*/
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pmc_init.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pmc_init.H
deleted file mode 100755
index 2e558f381..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pmc_init.H
+++ /dev/null
@@ -1,61 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pmc_init.H $           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pmc_init.H,v 1.7 2013/04/12 01:25:04 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pmc_init.H,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Greg Stilll         Email: stillgs@us.ibm.com
-// *!
-
-// *! General Description:
-// *!        This procedure is intializes / resets / configures the O2S access bridge
-// *!        Target : Processor chip
-//------------------------------------------------------------------------------
-//  
-
-/// \param[in] i_target1 Primary chip target of the module
-/// \param[in] i_target2 Secondary chip target (applicable to DCMs)
-/// \param[in] mode     
-
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_pmc_init_FP_t) (  const fapi::Target& ,
-                                                const fapi::Target&, 
-                                                uint32_t mode);
-
-extern "C" {
-
-
-fapi::ReturnCode 
-p8_pmc_init(const fapi::Target& i_target1, 
-            const fapi::Target& i_target2, 
-            uint32_t mode);
-
-}
-
-
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_poregpe_init.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_poregpe_init.C
deleted file mode 100644
index 6f0d8e810..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_poregpe_init.C
+++ /dev/null
@@ -1,320 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_poregpe_init.C $       */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-
-// $Id: p8_poregpe_init.C,v 1.5 2013/09/25 22:36:40 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_poregpe_init.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Greg Still         Email: stillgs@us.ibm.com
-// *!
-/// \file p8_poregpe_init.C
-/// \brief Configure or reset the targeted GPE0 and/or GPE1
-///
-///
-/// \todo add to required proc ENUM requests
-///
-/// High-level procedure flow:
-/// \verbatim
-///
-///     Check for valid parameters
-///     if PM_CONFIG {
-///        Do nothing (done by OCC programs)
-///     } else if PM_RESET {
-///         for each GPE,
-///             set and then reset bit 0 in the GPEx_RESET_REGISTER
-///
-///     }
-///
-///  Procedure Prereq:
-///     - System clocks are running
-/// \endverbatim
-///
-//------------------------------------------------------------------------------
-
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-
-#include "p8_pm.H"
-#include "p8_poregpe_init.H"
-
-#ifdef FAPIECMD
-extern "C" {
-#endif
-
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Constant definitions
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Global variables
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Function prototypes
-// ----------------------------------------------------------------------
-
-fapi::ReturnCode poregpe_reset(const Target& i_target, const uint32_t engine);
-
-// ----------------------------------------------------------------------
-// Function definitions
-// ----------------------------------------------------------------------
-
-
-/// \param[in] i_target Chip target
-/// \param[in] mode     Control mode for the procedure
-///                     (PM_CONFIG, PM_INIT, PM_RESET)
-/// \param[in] engine   Targeted engine:  GPE0, GPE1, GPEALL
-
-/// \retval FAPI_RC_SUCCESS
-/// \retval ERROR defined in xml
-fapi::ReturnCode
-p8_poregpe_init(const Target& i_target, uint32_t mode, uint32_t engine)
-{
-    fapi::ReturnCode    l_rc;
-
-    do
-    {
-        FAPI_INF("Executing p8_poregpe_init in mode %x for engine %x....",
-                  mode, engine);
-
-        if (!(engine == GPE0 || engine == GPE1 || engine == GPEALL) )
-        {
-
-            FAPI_ERR("Unknown engine passed to p8_poregpe_init. Engine %x ....",
-                  engine);
-            const fapi::Target & CHIP = i_target;
-            const uint32_t & IENGINE = engine;
-            FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_GPE_BAD_ENGINE);
-            break;
-        }
-
-        /// -------------------------------
-        /// Configuration:  perform translation of any Platform Attributes into
-        /// Feature Attributes that are applied during Initalization
-        if (mode == PM_CONFIG)
-        {
-          FAPI_INF("PORE-GPE configuration...");
-          FAPI_INF("---> None is defined...done by OCC firmware");
-        }
-
-        /// -------------------------------
-        /// Initialization:  perform order or dynamic operations to initialize
-        /// the GPEs using necessary Platform or Feature attributes.
-        else if (mode == PM_INIT)
-        {
-          FAPI_INF("PORE-GPE initialization...");
-          FAPI_INF("---> None is defined...done by OCC firmware");
-        }
-
-        /// -------------------------------
-        /// Reset:  perform reset of GPE engines so that they can reconfigured
-        /// and reinitialized
-        else if (mode == PM_RESET)
-        {
-            // GPE0
-            if (engine == GPE0 || engine == GPEALL)
-            {
-                l_rc = poregpe_reset(i_target, GPE0);
-                if (!l_rc.ok())
-                {
-                    break;
-                }
-            }
-
-            if (engine == GPE1 || engine == GPEALL)
-            {
-                l_rc = poregpe_reset(i_target, GPE1);
-                if (!l_rc.ok())
-                {
-                    break;
-                }
-            }
-
-        }
-
-        /// -------------------------------
-        /// Unsupported Mode
-
-        else
-        {
-            FAPI_ERR("Unknown mode passed to p8_poregpe_init. Mode %x ....", mode);
-            const fapi::Target & CHIP = i_target;
-            uint32_t & IMODE = mode;
-            FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_GPE_CODE_BAD_MODE);
-        }
-    } while(0);
-
-    return l_rc;
-}
-
-//------------------------------------------------------------------------------
-// PORE GPE Reset Function
-//------------------------------------------------------------------------------
-fapi::ReturnCode
-poregpe_reset(const Target& i_target, const uint32_t engine)
-{
-    fapi::ReturnCode    l_rc;
-    uint32_t            e_rc = 0;
-    ecmdDataBufferBase  data(64);
-    ecmdDataBufferBase  polldata(64);
-    const uint32_t      max_polls = 8;
-    uint32_t            poll_count;
-    bool                wait_state_detected;
-    bool                poll_loop_error = false;
-    uint64_t            control_reg;
-    uint64_t            reset_reg;
-    uint64_t            status_reg;
-
-
-
-    FAPI_INF("PORE-GPE reset...Engine: %x", engine);
-
-    do
-    {
-        // Set the address offset values based on which engine is being operated
-        // on
-        if (engine == GPE0)
-        {
-            control_reg = PORE_GPE0_CONTROL_0x00060001;
-            reset_reg   = PORE_GPE0_RESET_0x00060002;
-            status_reg  = PORE_GPE0_STATUS_0x00060000;
-        }
-        else if (engine == GPE1)
-        {
-            control_reg = PORE_GPE1_CONTROL_0x00060021;
-            reset_reg   = PORE_GPE1_RESET_0x00060022;
-            status_reg  = PORE_GPE1_STATUS_0x00060020;
-        }
-        else
-        {
-            FAPI_ERR("Invalid engine parm passed to poregpe_reset");
-            const fapi::Target & CHIP = i_target;
-            const uint32_t & IENGINE = engine;
-            FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_GPE_BAD_ENGINE);
-            break;
-        }
-
-        //  Reset the GPEsusing the Reset Register bits 0 and 1.
-        //  Note:  This resets ALL registers (including debug registers) with
-        //  the exception of Error Mask
-
-        // set PORE run bit to stop
-        l_rc=fapiGetScom(i_target, control_reg, data);
-        if(!l_rc.ok())
-        {
-           FAPI_ERR("Scom error reading PORE_GPE%x_CONTROL_%08llx", engine, control_reg);
-           break;
-        }
-
-        e_rc=data.setBit(0);
-        if (e_rc)
-        {
-            FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc);
-            l_rc.setEcmdError(e_rc);
-            break;
-        }
-
-        l_rc=fapiPutScom(i_target, control_reg, data);
-        if(!l_rc.ok())
-        {
-            FAPI_ERR("Scom error writing PORE_GPE%x_CONTROL_%08llx", engine, control_reg);
-            break;
-        }
-
-        // Reset PORE (state machines and PIBMS_DBG registers) and PIB2OCI
-        // interface write Reset_Register(0:1) with 0b11 to trigger the reset.
-        // Check that these are cleared to 0 to validate the reset occured.
-        e_rc |= data.flushTo0();
-        e_rc |= data.setBit(0, 2);
-        if (e_rc)
-        {
-            FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc);
-            l_rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_DBG("PORE-GPE%x Reset value: 0x%16llX", engine, data.getDoubleWord(0));
-
-        l_rc=fapiPutScom(i_target, reset_reg, data);
-        if(!l_rc.ok())
-        {
-            FAPI_ERR("Scom error writing PORE_GPE%x_CONTROL", engine);
-            break;
-        }
-
-        // poll until PORE has returned to WAIT state 3:6=0b0001
-        wait_state_detected = false;
-        for (poll_count=0; poll_count<max_polls; poll_count++)
-        {
-            l_rc=fapiGetScom(i_target, status_reg, polldata);
-            if(l_rc)
-            {
-                FAPI_ERR("Scom error reading PORE_GPE%x_STATUS", engine);
-                poll_loop_error = true;
-                break;
-            }
-
-            if(polldata.isBitClear(3, 3) && polldata.isBitSet(6))
-            {
-               wait_state_detected = true;
-               break;
-            }
-            else
-            {
-              fapiDelay(1000, 10);
-            }
-        }
-        // Break if a FAPI error occured in the polling loop
-        if (poll_loop_error)
-        {
-             break;
-        }
-
-        if(!wait_state_detected)
-        {
-          FAPI_ERR("GPE%x reset failed ", engine);
-          const fapi::Target & CHIP = i_target;
-          uint32_t           & POLLCOUNT = poll_count;
-          const uint32_t     & MAXPOLLS = max_polls;
-          const uint32_t     & IENGINE = engine;
-          FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_GPE_RESET_TIMEOUT);
-        }
-
-    } while(0);
-
-    return l_rc;
-}
-
-#ifdef FAPIECMD
-} //end extern C
-#endif
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_poregpe_init.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_poregpe_init.H
deleted file mode 100755
index 610b986bd..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_poregpe_init.H
+++ /dev/null
@@ -1,107 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_poregpe_init.H $       */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/* begin_generated_IBM_copyright_prolog                            */
-/*                                                                 */
-/* This is an automatically generated copyright prolog.            */
-/* After initializing,  DO NOT MODIFY OR MOVE                      */ 
-/* --------------------------------------------------------------- */
-/*                                                 */
-/*                                                                 */
-/* Licensed Internal Code Source Materials                         */
-/*                                                                 */
-/* (C)Copyright IBM Corp.  2014, 2014                              */
-/*                                                                 */
-/* The Source code for this program is not published  or otherwise */
-/* divested of its trade secrets,  irrespective of what has been   */
-/* deposited with the U.S. Copyright Office.                       */
-/*  -------------------------------------------------------------- */
-/*                                                                 */
-/* end_generated_IBM_copyright_prolog                              */
-// $Id: p8_poregpe_init.H,v 1.1 2012/08/23 04:58:56 stillgs Exp $
-// $Source: /afs/awd.austin.ibm.com/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_poregpe_init.H,v $
-//------------------------------------------------------------------------------
-// *|
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-// *|
-// *! TITLE       : p8_poregpe_init.H
-// *! DESCRIPTION : Initialize the PORE GPE Engines in the OCC
-// *!
-// *! OWNER NAME  : Greg Still    Email: stillgs@us.ibm.com
-// *! BACKUP NAME : Jim Yacynych  Email: jimyac@us.ibm.com
-// *!
-//------------------------------------------------------------------------------
-
-#ifndef _P8_POREGPE_H_
-#define _P8_POREGPE_H_
-
-//------------------------------------------------------------------------------
-// Includes
-//------------------------------------------------------------------------------
-
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_poregpe_init_FP_t) (const fapi::Target&, uint32_t, uint32_t);
-
-extern "C" {
-
-
-//------------------------------------------------------------------------------
-// Constant definitions
-//------------------------------------------------------------------------------
-
-#ifndef _P8_POREGPE_ENGINES
-#define _P8_POREGPE_ENGINES
-enum P8_POREGPE_ENGINES {
-        GPE0        = 0x0,
-        GPE1        = 0x1,
-        GPEALL      = 0XF
-        };
-#endif  // _P8_POREGPE_ENGINES
-
-
-//------------------------------------------------------------------------------
-// Parameter structure definitions
-//------------------------------------------------------------------------------
-
-
-
-//------------------------------------------------------------------------------
-// Function prototype
-//------------------------------------------------------------------------------
-/// \param[in] i_target Chip target
-/// \param[in] mode     Control mode for the procedure (PM_CONFIG, PM_RESET)
-/// \param[in] engine   Targeted engine:  GPE0, GPE1, GPEALL
-
-/// \retval ECMD_SUCCESS if something good happens,
-/// \retval BAD_RETURN_CODE otherwise
-fapi::ReturnCode 
-p8_poregpe_init(const fapi::Target& i_target, uint32_t mode, uint32_t engine);
-
-
-} // extern "C"
-
-#endif // _P8_POREGPE_H_
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.C
deleted file mode 100755
index 903b396ed..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.C
+++ /dev/null
@@ -1,885 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.C $           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pss_init.C,v 1.8 2013/11/08 22:36:48 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pss_init.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! TITLE : p8_pss_init.C
-// *! DESCRIPTION : Initializes P2S and HWC logic
-// *! OWNER NAME  : Pradeep CN   Email: padeepcn@in.ibm.com
-// *! BACKUP NAME :              Email:
-// #! ADDITIONAL COMMENTS :
-//
-//
-/// Procedure Summary:
-/// --------------------
-///    One procedure to initialize both P2S and HWC SPIPSS registers to
-///    second Procedure is to access APSS or DPSS through P2S Bridge
-///    Third procedure is to access APSS or DPSS through HWC (hardware control)
-///
-///    High-level procedure flow:
-///     ----------------------------------
-///      o INIT PROCEDURE(frame_size,cpol,cpha)
-///         - set SPIPSS_ADC_CTRL_REG0(24b)
-///             hwctrl_frame_size = 16
-///         - set SPIPSS_ADC_CTRL_REG1
-///             hwctrl_fsm_enable = disable
-///             hwctrl_device     = APSS
-///             hwctrl_cpol       = 0 (set idle state = deasserted)
-///             hwctrl_cpha       = 0 (set 1st edge = capture 2nd edge = change)
-///             hwctrl_clock_divider = set to 10Mhz(0x1D)
-///             hwctrl_nr_of_frames (4b) = 16 (for auto 2 mode)
-///         - set SPIPSS_ADC_CTRL_REG2
-///                      hwctrl_interframe_delay = 0x0
-///              - clear SPIPSS_ADC_WDATA_REG
-///         - set SPIPSS_P2S_CTRL_REG0 (24b)
-///             p2s_frame_size  = 16
-///         - set SPIPSS_P2S_CTRL_REG1
-///             p2s_bridge_enable = disable
-///             p2s_device        = DPSS
-///             p2s_cpol          = 0
-///             p2s_cpha          = 0
-///             p2s_clock_divider = set to 10Mhz
-///             p2s_nr_of_frames (1b) = 0 (means 1 frame operation)
-///         - set SPIPSS_P2S_CTRL_REG2
-///                      p2s_interframe_delay = 0x0
-///              - clear SPIPSS_P2S_WDATA_REG
-/// Procedure Prereq:
-///   o System clocks are running
-///
-///------------------------------------------------------------------------------
-
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-
-#include "p8_pm.H"
-#include "p8_pss_init.H"
-
-extern "C" {
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Global variables
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Function prototypes
-// ----------------------------------------------------------------------
-fapi::ReturnCode pss_config_spi_settings(const Target& i_target);
-fapi::ReturnCode pss_init(const Target& i_target);
-fapi::ReturnCode pss_reset(const Target& i_target);
-
-// ----------------------------------------------------------------------
-// Function definitions
-// ----------------------------------------------------------------------
-
-//------------------------------------------------------------------------------
-/**
- * p8_pss_init calls the underlying routine based on mode parameter
- *
- * @param[in] i_target Chip target
- * @param[in] mode     Control mode for the procedure
- *                     PM_INIT, PM_CONFIG, PM_RESET
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-p8_pss_init(const Target &i_target, uint32_t mode)
-{
-    fapi::ReturnCode    rc;
-
-    /// -------------------------------
-    /// Configuration:  perform translation of any Platform Attributes into Feature Attributes
-    /// that are applied during Initalization
-    if (mode == PM_CONFIG)
-    {
-        rc = pss_config_spi_settings(i_target);
-    }
-    /// -------------------------------
-    /// Initialization:  perform order or dynamic operations to initialize
-    /// the PMC using necessary Platform or Feature attributes.
-    else if (mode == PM_INIT)
-    {
-        rc = pss_init(i_target);
-    }
-    /// -------------------------------
-    /// Reset:  perform reset of PSS
-    else if (mode == PM_RESET)
-    {
-        rc = pss_reset(i_target);
-    }
-    /// -------------------------------
-    /// Unsupported Mode
-    else
-    {
-        FAPI_ERR("Unknown mode passed to p8_pss_init. Mode %x ....", mode);
-        const fapi::Target & CHIP = i_target;
-        uint32_t & IMODE = mode;
-        FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PSS_CODE_BAD_MODE);
-    } 
-
-    return rc;
-
-} // p8_pss_init
-
-//------------------------------------------------------------------------------
-/**
- * pss_config_spi_settings Determines the configuration setting for the SPI
- *              bus based on attributes
- *
- * @param[in] i_target Chip target
- *
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-pss_config_spi_settings(const Target& i_target)
-{
-    fapi::ReturnCode rc;
-
-    uint32_t        attr_proc_pss_init_nest_frequency=2400;
-    uint32_t        attr_pm_pss_init_spipss_frequency=10;
-    uint8_t         attr_pm_spipss_clock_divider ;
-    uint32_t        attr_pm_spipss_interframe_delay_setting=0 ;
-    uint32_t        attr_pm_spipss_interframe_delay = 0 ;
-
-    const uint32_t  default_spipss_frequency = 1;  // MHz
-    const uint32_t  default_spipss_interframe_delay = 10000;  // MHz
-
-    FAPI_INF("PSS config start...");
-    do
-    {
-
-        //----------------------------------------------------------
-        GETATTR(        rc,
-                        ATTR_FREQ_PB,
-                        "ATTR_FREQ_PB",
-                        NULL,
-                        attr_proc_pss_init_nest_frequency);
-
-        //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_SPIPSS_FREQUENCY,
-                        "ATTR_PM_SPIPSS_FREQUENCY",
-                        NULL,
-                        attr_pm_pss_init_spipss_frequency,
-                        default_spipss_frequency);
-
-        // calculation of clock divider
-        attr_pm_spipss_clock_divider = ((attr_proc_pss_init_nest_frequency /
-                                         attr_pm_pss_init_spipss_frequency)/ 8 )-1 ;
-
-
-        SETATTR(        rc,
-                        ATTR_PM_SPIPSS_CLOCK_DIVIDER,
-                        "ATTR_PM_SPIPSS_CLOCK_DIVIDER",
-                        &i_target,
-                        attr_pm_spipss_clock_divider);
-
-        // ########################### SET INTER_FRAM_DELAY ################################ //
-
-        //----------------------------------------------------------
-        // Delay between command and status frames of a SPIVID WRITE operation
-        // (binary in nanoseconds)ATTR_PM_SPIPSS_INTER_FRAME_DELAY
-
-
-        GETATTR_DEFAULT(    rc,
-                            ATTR_PM_SPIPSS_INTER_FRAME_DELAY,
-                            "ATTR_PM_SPIPSS_INTERFRAME_DELAY",
-                            &i_target,
-                            attr_pm_spipss_interframe_delay,
-                            default_spipss_interframe_delay);
-
-        // Delay is computed as: (value * ~100ns_hang_pulse)
-        // +0/-~100ns_hang_pulse time
-        // Thus, value = delay / 100
-        attr_pm_spipss_interframe_delay_setting =
-        attr_pm_spipss_interframe_delay/ 100;
-
-        SETATTR(            rc,
-                            ATTR_PM_SPIPSS_INTER_FRAME_DELAY_SETTING ,
-                            "ATTR_PM_SPIPSS_INTER_FRAME_DELAY_SETTING",
-                            &i_target,
-                            attr_pm_spipss_interframe_delay_setting);
-
-    } while(0);
-
-    FAPI_INF("PSS config end...\n");
-    return rc;
-
-} // pss_config_spi_settings
-
-//------------------------------------------------------------------------------
-/**
- * pss_init Using configured attributed, performs the initialization of the PSS
- *          function
- *
- * @param[in] i_target Chip target
- *
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-pss_init(const Target& i_target)
-{
-    fapi::ReturnCode rc;
-    uint32_t            e_rc = 0;
-    ecmdDataBufferBase  data(64);
-
-    const uint8_t       default_spipss_frame_size = 16 ;
-    const uint8_t       default_spipss_in_delay = 0 ;
-    const uint8_t       default_spipss_clock_polarity = 0 ;
-    const uint8_t       default_spipss_clock_phase = 0 ;
-    const uint8_t       default_apss_chip_select = 1 ;
-
-    uint32_t            attr_proc_pss_init_nest_frequency=2400;
-    uint8_t             attr_pm_spipss_clock_divider ;
-
-    uint8_t             attr_pm_apss_chip_select=1 ;
-
-    uint8_t             attr_pm_spipss_frame_size ;
-    uint8_t             attr_pm_spipss_in_delay ;
-    uint8_t             attr_pm_spipss_clock_polarity ;
-    uint8_t             attr_pm_spipss_clock_phase ;
-    uint32_t            attr_pm_spipss_inter_frame_delay ;
-
-    FAPI_INF("PSS initialization start...");
-    do
-    {
-
-        //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_SPIPSS_FRAME_SIZE,
-                        "ATTR_PM_SPIPSS_FRAME_SIZE",
-                        &i_target,
-                        attr_pm_spipss_frame_size,
-                        default_spipss_frame_size );
-
-        //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_SPIPSS_IN_DELAY,
-                        "ATTR_PM_SPIPSS_IN_DELAY",
-                        &i_target,
-                        attr_pm_spipss_in_delay,
-                        default_spipss_in_delay );
-
-        //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_SPIPSS_CLOCK_POLARITY,
-                        "ATTR_PM_SPIPSS_CLOCK_POLARITY",
-                        &i_target,
-                        attr_pm_spipss_clock_polarity,
-                        default_spipss_clock_polarity );
-
-        //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_SPIPSS_CLOCK_PHASE,
-                        "ATTR_PM_SPIPSS_CLOCK_PHASE",
-                        &i_target,
-                        attr_pm_spipss_clock_phase,
-                        default_spipss_clock_phase );
-
-        //----------------------------------------------------------
-        GETATTR(        rc,
-                        ATTR_PM_SPIPSS_INTER_FRAME_DELAY_SETTING,
-                        "ATTR_PM_SPIPSS_INTER_FRAME_DELAY_SETTING",
-                        &i_target,
-                        attr_pm_spipss_inter_frame_delay);
-
-        //----------------------------------------------------------
-        GETATTR_DEFAULT(rc,
-                        ATTR_PM_APSS_CHIP_SELECT,
-                        "ATTR_PM_APSS_CHIP_SELECT",
-                        &i_target,
-                        attr_pm_apss_chip_select,
-                        default_apss_chip_select );
-
-        //----------------------------------------------------------
-        GETATTR(        rc,
-                        ATTR_PM_SPIPSS_CLOCK_DIVIDER,
-                        "ATTR_PM_SPIPSS_CLOCK_DIVIDER",
-                        &i_target,
-                        attr_pm_spipss_clock_divider);
-
-
-        //----------------------------------------------------------
-        GETATTR(        rc,
-                        ATTR_FREQ_PB,
-                        "ATTR_FREQ_PB",
-                        NULL,
-                        attr_proc_pss_init_nest_frequency);
-
-        // ------------------------------------------
-        //  -- Init procedure
-        // ------------------------------------------
-
-        uint8_t       hwctrl_target = 0xA;
-        uint8_t       hwctrl_frame_size           = attr_pm_spipss_frame_size ;
-        uint8_t       hwctrl_in_delay             = attr_pm_spipss_in_delay ;
-        uint8_t       hwctrl_clk_pol              = attr_pm_spipss_clock_polarity ;
-        uint8_t       hwctrl_clk_pha              = attr_pm_spipss_clock_phase ;
-        uint32_t      hwctrl_clk_divider          = attr_pm_spipss_clock_divider ;
-        uint32_t      hwctrl_inter_frame_delay    = attr_pm_spipss_inter_frame_delay ;
-        uint8_t       hwctrl_device               = attr_pm_apss_chip_select;
-        uint32_t      nest_freq                   = attr_proc_pss_init_nest_frequency ;
-        uint32_t      spipss_100ns_div_value ;
-
-
-        spipss_100ns_div_value = (( attr_proc_pss_init_nest_frequency ) /40);
-
-        //  ******************************************************************
-        //     - set SPIPSS_ADC_CTRL_REG0 (24b)
-        //         adc_frame_size = 16
-        //  ******************************************************************
-
-        rc = fapiGetScom(i_target, SPIPSS_ADC_CTRL_REG0_0x00070000, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(SPIPSS_ADC_CTRL_REG0) failed.");
-            break;
-        }
-
-        e_rc |= data.insertFromRight(hwctrl_frame_size,0,6);
-        e_rc |= data.insertFromRight(hwctrl_in_delay,12,6);
-        if (e_rc)
-        {
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_INF("    SPIPSS ADC CTRL_REG_0 Configuration                  ");
-        FAPI_INF("      frame size                 => %d ", hwctrl_frame_size);
-
-        rc = fapiPutScom(i_target, SPIPSS_ADC_CTRL_REG0_0x00070000, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(SPIPSS_ADC_CTRL_REG0_0x00070000) failed.");
-            break;
-        }
-
-        //  ******************************************************************
-        //     - set SPIPSS_ADC_CTRL_REG1
-        //         adc_fsm_enable = disable
-        //         adc_device     = APSS
-        //         adc_cpol       = 0
-        //         adc_cpha       = 0
-        //         adc_clock_divider = set to 10Mhz
-        //         adc_nr_of_frames (4b) = 16 (for auto 2 mode)
-        //  ******************************************************************
-
-        rc = fapiGetScom(i_target, SPIPSS_ADC_CTRL_REG1_0x00070001, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(SPIPSS_ADC_CTRL_REG1) failed.");
-            break;
-        }
-
-        uint8_t   hwctrl_fsm_enable = 0x1 ;
-        uint8_t   hwctrl_nr_of_frames = 0x10 ;
-
-        e_rc |= data.insertFromRight(hwctrl_fsm_enable   ,0,1);
-        e_rc |= data.insertFromRight(hwctrl_device       ,1,1);
-        e_rc |= data.insertFromRight(hwctrl_clk_pol      ,2,1);
-        e_rc |= data.insertFromRight(hwctrl_clk_pha      ,3,1);
-        e_rc |= data.insertFromRight(hwctrl_clk_divider  ,4,10);
-        e_rc |= data.insertFromRight(hwctrl_nr_of_frames ,14,4);
-        if (e_rc)
-        {
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_INF("    SPIPSS ADC CTRL_REG_1 Configuration                  ");
-        FAPI_INF("      hwctrl_fsm_enable          => %d ", hwctrl_fsm_enable  );
-        FAPI_INF("      nest_freq                  => %d ", nest_freq  );
-        FAPI_INF("      hwctrl_target              => %d ", hwctrl_target      );
-        FAPI_INF("      hwctrl_device              => %d ", hwctrl_device      );
-        FAPI_INF("      hwctrl_clk_pol             => %d ", hwctrl_clk_pol     );
-        FAPI_INF("      hwctrl_clk_pha             => %d ", hwctrl_clk_pha     );
-        FAPI_INF("      hwctrl_clk_divider         => %d ", hwctrl_clk_divider );
-        FAPI_INF("      hwctrl_nr_of_frames        => %d ", hwctrl_nr_of_frames);
-
-        rc = fapiPutScom(i_target, SPIPSS_ADC_CTRL_REG1_0x00070001, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(SPIPSS_ADC_CTRL_REG1_0x00070001) failed.");
-            break;
-        }
-
-        //  ******************************************************************
-        //     - set SPIPSS_ADC_CTRL_REG2
-        //         adc_inter_frame_delay = 0x0
-        //  ******************************************************************
-
-        rc = fapiGetScom(i_target, SPIPSS_ADC_CTRL_REG2_0x00070002, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(SPIPSS_ADC_CTRL_REG2) failed.");
-            break;
-        }
-
-        e_rc = data.insertFromRight(hwctrl_inter_frame_delay,0,17);
-        if (e_rc)
-        {
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-
-        FAPI_INF("    SPIPSS ADC CTRL_REG_2 Configuration                  ");
-        FAPI_INF("      hwctrl_inter_frm_delay     => %d ", hwctrl_inter_frame_delay );
-
-        rc = fapiPutScom(i_target, SPIPSS_ADC_CTRL_REG2_0x00070002, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(SPIPSS_ADC_CTRL_REG2_0x00070002) failed.");
-            break;
-        }
-
-        //  ******************************************************************
-        //     - clear SPIPSS_ADC_Wdata_REG
-        //  ******************************************************************
-
-        uint32_t   hwctrl_wdata    = 0x0;
-
-        e_rc |= data.flushTo0();
-        e_rc |= data.insertFromRight(hwctrl_wdata    ,0,16);
-        if (e_rc)
-        {
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_INF("    SPIPSS_WDATA_REG is cleared                             ");
-        FAPI_INF("      hwctrl_wdata               => %d ", hwctrl_wdata       );
-
-        rc = fapiPutScom(i_target, SPIPSS_ADC_WDATA_REG_0x00070010, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(SPIPSS_ADC_WDATA_REG_0x00070010) failed.");
-            break;
-        }
-
-        //  ******************************************************************
-        //     - set SPIPSS_P2S_CTRL_REG0 (24b)
-        //         p2s_frame_size = 16
-        //  ******************************************************************
-
-        rc = fapiGetScom(i_target, SPIPSS_P2S_CTRL_REG0_0x00070040, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(SPIPSS_P2S_CTRL_REG0) failed.");
-            break;
-        }
-
-        // modify_data here
-        uint8_t   p2s_frame_size = 0x02 ;
-        uint8_t   p2s_device     = 0;
-        uint8_t   p2s_clk_pol    = 0;
-        uint8_t   p2s_clk_pha    = 0;
-        uint16_t  p2s_clk_divider= 0x1D;
-        uint8_t   p2s_target = 0xA;// DPSS
-        uint32_t  p2s_inter_frame_delay = 0x0;
-        uint8_t   p2s_in_delay;
-
-        p2s_frame_size      =    attr_pm_spipss_frame_size ;
-        p2s_in_delay        =    attr_pm_spipss_in_delay ;
-        p2s_clk_pol         =    attr_pm_spipss_clock_polarity ;
-        p2s_clk_pha         =    attr_pm_spipss_clock_phase ;
-        p2s_clk_divider     =    attr_pm_spipss_clock_divider ;
-        p2s_inter_frame_delay =  attr_pm_spipss_inter_frame_delay ;
-        p2s_device          = attr_pm_apss_chip_select;
-
-
-        //  ******************************************************************
-        //     - set SPIPSS_P2S_CTRL_REG0
-        //  ******************************************************************
-
-        rc = fapiGetScom(i_target, SPIPSS_P2S_CTRL_REG0_0x00070040, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(SPIPSS_P2S_CTRL_REG0) failed.");
-            break;
-        }
-
-        e_rc |= data.insertFromRight(p2s_frame_size,0,6);
-        e_rc |= data.insertFromRight(p2s_in_delay,12,6);
-        if (e_rc)
-        {
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_INF("    SPIPSS P2S CTRL_REG_0 Configuration                  ");
-        FAPI_INF("      frame size                 => %d ", p2s_frame_size);
-        FAPI_INF("      p2s_in_delay               => %d ", p2s_in_delay  );
-
-        rc = fapiPutScom(i_target, SPIPSS_P2S_CTRL_REG0_0x00070040, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(SPIPSS_P2S_CTRL_REG0_0x00070040) failed.");
-            break;
-        }
-
-        //  ******************************************************************
-        //     - set SPIPSS_P2S_CTRL_REG1
-        //         p2s_fsm_enable = disable
-        //         p2s_device     = APSS
-        //         p2s_cpol       = 0
-        //         p2s_cpha       = 0
-        //         p2s_clock_divider = set to 10Mhz
-        //         p2s_nr_of_frames (4b) = 16 (for auto 2 mode)
-        //  ******************************************************************
-
-        rc = fapiGetScom(i_target, SPIPSS_P2S_CTRL_REG1_0x00070041, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(SPIPSS_P2S_CTRL_REG1) failed.");
-            break;
-        }
-
-        // modify_data here
-
-        uint8_t   p2s_fsm_enable = 0x1 ;
-        uint8_t   p2s_nr_of_frames = 0x10 ;
-
-        e_rc |= data.insertFromRight(p2s_fsm_enable   ,0,1);
-        e_rc |= data.insertFromRight(p2s_device       ,1,1);
-        e_rc |= data.insertFromRight(p2s_clk_pol      ,2,1);
-        e_rc |= data.insertFromRight(p2s_clk_pha      ,3,1);
-        e_rc |= data.insertFromRight(p2s_clk_divider  ,4,10);
-        e_rc |= data.insertFromRight(p2s_nr_of_frames ,14,4);
-        if (e_rc)
-        {
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_INF("    SPIPSS P2S CTRL_REG_1 Configuration                  ");
-        FAPI_INF("      p2s_fsm_enable          => %d ", p2s_fsm_enable  );
-        FAPI_INF("      p2s_target              => %d ", p2s_target      );
-        FAPI_INF("      p2s_device              => %d ", p2s_device      );
-        FAPI_INF("      p2s_clk_pol             => %d ", p2s_clk_pol     );
-        FAPI_INF("      p2s_clk_pha             => %d ", p2s_clk_pha     );
-        FAPI_INF("      p2s_clk_divider         => %d ", p2s_clk_divider );
-        FAPI_INF("      p2s_nr_of_frames        => %d ", p2s_nr_of_frames);
-
-        rc = fapiPutScom(i_target, SPIPSS_P2S_CTRL_REG1_0x00070041, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(SPIPSS_P2S_CTRL_REG1_0x00070041) failed.");
-            break;
-        }
-
-        //  ******************************************************************
-        //     - set SPIPSS_P2S_CTRL_REG2
-        //         p2s_inter_frame_delay = 0x0
-        //  ******************************************************************
-
-        rc = fapiGetScom(i_target, SPIPSS_P2S_CTRL_REG2_0x00070042, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(SPIPSS_P2S_CTRL_REG2) failed.");
-            break;
-        }
-
-        e_rc |= data.insertFromRight(p2s_inter_frame_delay,0,17);
-        if (e_rc)
-        {
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_INF("    SPIPSS P2S CTRL_REG_2 Configuration                  ");
-        FAPI_INF("      p2s_inter_frm_delay     => %d ", p2s_inter_frame_delay );
-
-        rc = fapiPutScom(i_target, SPIPSS_P2S_CTRL_REG2_0x00070042, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(SPIPSS_P2S_CTRL_REG2_0x00070042) failed.");
-            break;
-        }
-
-
-        //  ******************************************************************
-        //     - clear SPIPSS_P2S_Wdata_REG
-        //  ******************************************************************
-        rc = fapiGetScom(i_target, SPIPSS_P2S_WDATA_REG_0x00070050, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(SPIPSS_P2S_WDATA_REG_0x00070050) failed.");
-            break;
-        }
-
-        uint32_t   p2s_wdata    = 0x0;
-        e_rc |= data.flushTo0();
-        e_rc |= data.insertFromRight(p2s_wdata    ,0,16);
-        if (e_rc)
-        {
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_INF("    SPIPSS_P2S_WDATA_REG is cleared                           ");
-        FAPI_INF("      p2s_wdata               => %d ", p2s_wdata       );
-        FAPI_INF("                                       "                     );
-
-        rc = fapiPutScom(i_target, SPIPSS_P2S_WDATA_REG_0x00070050, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(SPIPSS_P2Sb_WDATA_REG_0x00070050) failed.");
-            break;
-        }
-
-        //  ******************************************************************
-        //     - Set 100ns Register for Interframe delay
-        //  ******************************************************************
-        rc = fapiGetScom(i_target, SPIPSS_100NS_REG_0x00070028, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiGetScom(SPIPSS_100NS_REG_0x00070028) failed.");
-            break;
-        }
-
-        e_rc=data.insertFromRight(spipss_100ns_div_value ,0,32);
-        if (e_rc)
-        {
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        FAPI_INF("    SPIPSS_100NS_REG is set the value                     ");
-        FAPI_INF("      spipss_100ns_div_value_hi     => %d ", spipss_100ns_div_value       );
-        FAPI_INF("        nest_freq                   => %d ", nest_freq                     );
-        FAPI_INF("                                       "                     );
-
-        rc = fapiPutScom(i_target, SPIPSS_100NS_REG_0x00070028, data );
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(SPIPSS_100NS_REG_0x00070028) failed.");
-            break;
-        }
-
-    } while(0);
-
-    FAPI_INF("PSS initialization end...\n");
-    return rc;
-} // pss_init
-
-
-//------------------------------------------------------------------------------
-/**
- * pss_reset Performs the reset of the PSS function
- *
- * @param[in] i_target Chip target
- *
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-fapi::ReturnCode
-pss_reset(const Target& i_target)
-{
-    fapi::ReturnCode    rc;
-    uint32_t            e_rc = 0;
-    ecmdDataBufferBase  data(64);
-
-    uint32_t            pollcount = 0;
-    uint32_t            max_polls;
-    const uint32_t      pss_timeout_us = 10000;  // 10 millisecond.  Far longer than needed
-    const uint32_t      pss_poll_interval_us = 10;
-
-    FAPI_INF("PSS reset start...");
-    do
-    {
-
-        //  ******************************************************************
-        //     - Poll status register for ongoing or no errors to give the
-        //       chance for on-going operations to complete
-        //  ******************************************************************
-
-        FAPI_DBG("Polling for ADC on-going to go low ... ");
-        max_polls = pss_timeout_us / pss_poll_interval_us;
-        for (pollcount = 0; pollcount < max_polls; pollcount++)
-        {
-            rc = fapiGetScom(i_target, SPIPSS_ADC_STATUS_REG_0x00070003, data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(SPIPSS_ADC_STATUS_REG_0x00070003) failed.");
-                break;
-            }
-            // Ongoing is not set OR an error
-            if (data.isBitClear(0) || data.isBitSet(7))
-            {
-                break;
-            }
-            FAPI_DBG("Delay before next poll");
-            e_rc = fapiDelay(pss_poll_interval_us*1000, 1000);  // ns, sim clocks
-            if (e_rc)
-            {
-                FAPI_ERR("fapiDelay error");
-                rc.setEcmdError(e_rc);
-                break;
-            }
-        }
-        if (!rc.ok())
-        {
-            break;
-        }
-        if (data.isBitSet(7))
-        {
-            FAPI_ERR("SPIADC error bit asserted waiting for operation to complete.");
-            const fapi::Target & CHIP = i_target;
-            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PSS_ADC_ERROR);
-            break;
-        }
-        if (pollcount >= max_polls)
-        {
-            FAPI_INF("WARNING: SPI ADC did not go to idle in at least %d us.  Reset of PSS macro is commencing anyway", pss_timeout_us);
-            break;
-        }
-        else
-        {
-            FAPI_INF("All frames sent from ADC to the APSS device.");
-        }
-
-        //  ******************************************************************
-        //     - Poll status register for ongoing or errors to give the
-        //       chance for on-going operations to complete
-        //  ******************************************************************
-
-        FAPI_INF("Polling for P2S on-going to go low ... ");
-        for (pollcount = 0; pollcount < max_polls; pollcount++)
-        {
-            rc = fapiGetScom(i_target, SPIPSS_P2S_STATUS_REG_0x00070043, data );
-            if (rc)
-            {
-                FAPI_ERR("fapiGetScom(SPIPSS_P2S_STATUS_REG_0x00070043) failed.");
-                break;
-            }
-           
-            // Ongoing is not set OR an error
-            if (data.isBitClear(0) || data.isBitSet(7))
-            {
-                break;
-            }
-            FAPI_DBG("Delay before next poll");
-            e_rc = fapiDelay(pss_poll_interval_us*1000, 1000);  // ns, sim clocks
-            if (e_rc)
-            {
-                rc.setEcmdError(e_rc);
-                break;
-            }            
-        }
-        if (!rc.ok())
-        {
-            break;
-        }
-        if (data.isBitSet(7))
-        {
-            FAPI_ERR("SPIP2S FSM error bit asserted waiting for operation to complete.");
-            const fapi::Target & CHIP = i_target;
-            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PSS_P2S_ERROR);
-            break;
-        }
-        if (data.isBitSet(5))
-        {
-            FAPI_INF("SPIP2S Write While Bridge Busy bit asserted.  Will be cleared with coming reset");
-        }
-        if (pollcount >= max_polls)
-        {
-            FAPI_INF("WARNING: SPI P2S did not go to idle in at least %d us.  Reset of PSS macro is commencing anyway", pss_timeout_us);
-        }
-        else
-        {
-            FAPI_INF("SAll frames sent from P2S to the APSS device.");
-        }
-
-        //  ******************************************************************
-        //     - Resetting both ADC and P2S bridge
-        //  ******************************************************************
-
-        FAPI_INF("Resetting P2S and ADC bridges.");
-
-        e_rc=data.flushTo0();
-        e_rc=data.setBit(1);
-        if (e_rc)
-        {
-            rc.setEcmdError(e_rc);
-            break;
-        }
-
-        rc = fapiPutScom(i_target,  SPIPSS_ADC_RESET_REGISTER_0x00070005 , data);
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(SPIPSS_ADC_RESET_REGISTER_0x00070005) failed.");
-            break;
-        }
-
-        rc = fapiPutScom(i_target,  SPIPSS_P2S_RESET_REGISTER_0x00070045 , data);
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(SPIPSS_P2S_RESET_REGISTER_0x00070045) failed.");
-            break;
-        }
-        
-        // Clearing reset for cleanliness (SW229669)
-        e_rc=data.flushTo0();
-        if (e_rc)
-        {
-            rc.setEcmdError(e_rc);
-            break;
-        }
-               
-        rc = fapiPutScom(i_target,  SPIPSS_ADC_RESET_REGISTER_0x00070005 , data);
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(SPIPSS_ADC_RESET_REGISTER_0x00070005) failed.");
-            break;
-        }
-
-        rc = fapiPutScom(i_target,  SPIPSS_P2S_RESET_REGISTER_0x00070045 , data);
-        if (rc)
-        {
-            FAPI_ERR("fapiPutScom(SPIPSS_P2S_RESET_REGISTER_0x00070045) failed.");
-            break;
-        }
-    } while (0);
-
-    FAPI_INF("PSS reset end...\n");
-    return rc;
-} // pss_reset
-
-
-} //end extern C
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.H
deleted file mode 100755
index a165f8a57..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.H
+++ /dev/null
@@ -1,56 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.H $           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pss_init.H,v 1.5 2013/08/02 19:21:26 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pss_init.H,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Greg Still         Email: stillgs@us.ibm.com
-// *!
-// *! General Description: Calls the function p8_pss_init.C
-// *!        Initializes the PSS macro , resets it and configures the required
-// *!        Attributes
-//------------------------------------------------------------------------------
-
-
-/**
- * p8_pss_init calls the underlying routine based on mode parameter
- *
- * @param[in] i_target Chip target
- * @param[in] mode     Control mode for the procedure
- *                     PM_INIT, PM_CONFIG, PM_RESET
- *
- * @retval ECMD_SUCCESS
- * @retval ERROR defined in xml
- */
-typedef fapi::ReturnCode (*p8_pss_init_FP_t) (const fapi::Target&, uint32_t);
-
-extern "C" {
-
-fapi::ReturnCode p8_pss_init(const fapi::Target& i_target, uint32_t mode);
-
-}
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/pba_firmware_register.H b/src/usr/hwpf/hwp/occ/occ_procedures/pba_firmware_register.H
deleted file mode 100755
index 021ddcea9..000000000
--- a/src/usr/hwpf/hwp/occ/occ_procedures/pba_firmware_register.H
+++ /dev/null
@@ -1,1455 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/pba_firmware_register.H $ */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/* begin_generated_IBM_copyright_prolog                            */
-/*                                                                 */
-/* This is an automatically generated copyright prolog.            */
-/* After initializing,  DO NOT MODIFY OR MOVE                      */ 
-/* --------------------------------------------------------------- */
-/*                                                 */
-/*                                                                 */
-/* Licensed Internal Code Source Materials                         */
-/*                                                                 */
-/* (C)Copyright IBM Corp.  2014, 2014                              */
-/*                                                                 */
-/* The Source code for this program is not published  or otherwise */
-/* divested of its trade secrets,  irrespective of what has been   */
-/* deposited with the U.S. Copyright Office.                       */
-/*  -------------------------------------------------------------- */
-/*                                                                 */
-/* end_generated_IBM_copyright_prolog                              */
-// Subversion Repositories OCC
-// (root)/ssx/trunk/pgp/registers/pba_firmware_registers.h - Rev 1095
-// Rev
-
-// Rev 1077 | Blame | Compare with Previous | Last modification | View Log | RSS feed
-#ifndef __PBA_FIRMWARE_REGISTERS_H__
-#define __PBA_FIRMWARE_REGISTERS_H__
-
-#ifndef SIXTYFOUR_BIT_CONSTANT
-#ifdef __ASSEMBLER__
-#define SIXTYFOUR_BIT_CONSTANT(x) x
-#else
-#define SIXTYFOUR_BIT_CONSTANT(x) x##ull
-#endif
-#endif
-
-#ifndef __ASSEMBLER__
-
-// $Id: pba_firmware_register.H,v 1.1 2012/01/09 13:46:34 kgungl Exp $
-
-/// \file pba_firmware_registers.h
-/// \brief C register structs for the PBA unit
-
-// *** WARNING *** - This file is generated automatically, do not edit.
-
-#include <stdint.h>
-
-
-typedef union pba_barn {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t cmd_scope : 3;
-        uint64_t reserved0 : 1;
-        uint64_t reserved1 : 10;
-        uint64_t addr : 30;
-        uint64_t _reserved0 : 20;
-#else
-        uint64_t _reserved0 : 20;
-        uint64_t addr : 30;
-        uint64_t reserved1 : 10;
-        uint64_t reserved0 : 1;
-        uint64_t cmd_scope : 3;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_barn_t;
-
-
-
-typedef union pba_barmskn {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t reserved0 : 23;
-        uint64_t mask : 21;
-        uint64_t _reserved0 : 20;
-#else
-        uint64_t _reserved0 : 20;
-        uint64_t mask : 21;
-        uint64_t reserved0 : 23;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_barmskn_t;
-
-
-
-typedef union pba_fir {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t oci_apar_err : 1;
-        uint64_t pb_rdadrerr_fw : 1;
-        uint64_t pb_rddatato_fw : 1;
-        uint64_t pb_sue_fw : 1;
-        uint64_t pb_ue_fw : 1;
-        uint64_t pb_ce_fw : 1;
-        uint64_t oci_slave_init : 1;
-        uint64_t oci_wrpar_err : 1;
-        uint64_t oci_rereqto : 1;
-        uint64_t pb_unexpcresp : 1;
-        uint64_t pb_unexpdata : 1;
-        uint64_t pb_parity_err : 1;
-        uint64_t pb_wradrerr_fw : 1;
-        uint64_t pb_badcresp : 1;
-        uint64_t pb_ackdead_fw : 1;
-        uint64_t pb_crespto : 1;
-        uint64_t bcue_setup_err : 1;
-        uint64_t bcue_pb_ack_dead : 1;
-        uint64_t bcue_pb_adrerr : 1;
-        uint64_t bcue_oci_dataerr : 1;
-        uint64_t bcde_setup_err : 1;
-        uint64_t bcde_pb_ack_dead : 1;
-        uint64_t bcde_pb_adrerr : 1;
-        uint64_t bcde_rddatato_err : 1;
-        uint64_t bcde_sue_err : 1;
-        uint64_t bcde_ue_err : 1;
-        uint64_t bcde_ce : 1;
-        uint64_t bcde_oci_dataerr : 1;
-        uint64_t internal_err : 1;
-        uint64_t illegal_cache_op : 1;
-        uint64_t oci_bad_reg_addr : 1;
-        uint64_t axpush_wrerr : 1;
-        uint64_t axrcv_dlo_err : 1;
-        uint64_t axrcv_dlo_to : 1;
-        uint64_t axrcv_rsvdata_to : 1;
-        uint64_t axflow_err : 1;
-        uint64_t axsnd_dhi_rtyto : 1;
-        uint64_t axsnd_dlo_rtyto : 1;
-        uint64_t axsnd_rsvto : 1;
-        uint64_t axsnd_rsverr : 1;
-        uint64_t reserved : 4;
-        uint64_t fir_parity_error : 1;
-        uint64_t _reserved0 : 19;
-#else
-        uint64_t _reserved0 : 19;
-        uint64_t fir_parity_error : 1;
-        uint64_t reserved : 4;
-        uint64_t axsnd_rsverr : 1;
-        uint64_t axsnd_rsvto : 1;
-        uint64_t axsnd_dlo_rtyto : 1;
-        uint64_t axsnd_dhi_rtyto : 1;
-        uint64_t axflow_err : 1;
-        uint64_t axrcv_rsvdata_to : 1;
-        uint64_t axrcv_dlo_to : 1;
-        uint64_t axrcv_dlo_err : 1;
-        uint64_t axpush_wrerr : 1;
-        uint64_t oci_bad_reg_addr : 1;
-        uint64_t illegal_cache_op : 1;
-        uint64_t internal_err : 1;
-        uint64_t bcde_oci_dataerr : 1;
-        uint64_t bcde_ce : 1;
-        uint64_t bcde_ue_err : 1;
-        uint64_t bcde_sue_err : 1;
-        uint64_t bcde_rddatato_err : 1;
-        uint64_t bcde_pb_adrerr : 1;
-        uint64_t bcde_pb_ack_dead : 1;
-        uint64_t bcde_setup_err : 1;
-        uint64_t bcue_oci_dataerr : 1;
-        uint64_t bcue_pb_adrerr : 1;
-        uint64_t bcue_pb_ack_dead : 1;
-        uint64_t bcue_setup_err : 1;
-        uint64_t pb_crespto : 1;
-        uint64_t pb_ackdead_fw : 1;
-        uint64_t pb_badcresp : 1;
-        uint64_t pb_wradrerr_fw : 1;
-        uint64_t pb_parity_err : 1;
-        uint64_t pb_unexpdata : 1;
-        uint64_t pb_unexpcresp : 1;
-        uint64_t oci_rereqto : 1;
-        uint64_t oci_wrpar_err : 1;
-        uint64_t oci_slave_init : 1;
-        uint64_t pb_ce_fw : 1;
-        uint64_t pb_ue_fw : 1;
-        uint64_t pb_sue_fw : 1;
-        uint64_t pb_rddatato_fw : 1;
-        uint64_t pb_rdadrerr_fw : 1;
-        uint64_t oci_apar_err : 1;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_fir_t;
-
-
-
-typedef union pba_fir_and {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t oci_apar_err : 1;
-        uint64_t pb_rdadrerr_fw : 1;
-        uint64_t pb_rddatato_fw : 1;
-        uint64_t pb_sue_fw : 1;
-        uint64_t pb_ue_fw : 1;
-        uint64_t pb_ce_fw : 1;
-        uint64_t oci_slave_init : 1;
-        uint64_t oci_wrpar_err : 1;
-        uint64_t oci_rereqto : 1;
-        uint64_t pb_unexpcresp : 1;
-        uint64_t pb_unexpdata : 1;
-        uint64_t pb_parity_err : 1;
-        uint64_t pb_wradrerr_fw : 1;
-        uint64_t pb_badcresp : 1;
-        uint64_t pb_ackdead_fw : 1;
-        uint64_t pb_crespto : 1;
-        uint64_t bcue_setup_err : 1;
-        uint64_t bcue_pb_ack_dead : 1;
-        uint64_t bcue_pb_adrerr : 1;
-        uint64_t bcue_oci_dataerr : 1;
-        uint64_t bcde_setup_err : 1;
-        uint64_t bcde_pb_ack_dead : 1;
-        uint64_t bcde_pb_adrerr : 1;
-        uint64_t bcde_rddatato_err : 1;
-        uint64_t bcde_sue_err : 1;
-        uint64_t bcde_ue_err : 1;
-        uint64_t bcde_ce : 1;
-        uint64_t bcde_oci_dataerr : 1;
-        uint64_t internal_err : 1;
-        uint64_t illegal_cache_op : 1;
-        uint64_t oci_bad_reg_addr : 1;
-        uint64_t axpush_wrerr : 1;
-        uint64_t axrcv_dlo_err : 1;
-        uint64_t axrcv_dlo_to : 1;
-        uint64_t axrcv_rsvdata_to : 1;
-        uint64_t axflow_err : 1;
-        uint64_t axsnd_dhi_rtyto : 1;
-        uint64_t axsnd_dlo_rtyto : 1;
-        uint64_t axsnd_rsvto : 1;
-        uint64_t axsnd_rsverr : 1;
-        uint64_t reserved : 4;
-        uint64_t fir_parity_error : 1;
-        uint64_t _reserved0 : 19;
-#else
-        uint64_t _reserved0 : 19;
-        uint64_t fir_parity_error : 1;
-        uint64_t reserved : 4;
-        uint64_t axsnd_rsverr : 1;
-        uint64_t axsnd_rsvto : 1;
-        uint64_t axsnd_dlo_rtyto : 1;
-        uint64_t axsnd_dhi_rtyto : 1;
-        uint64_t axflow_err : 1;
-        uint64_t axrcv_rsvdata_to : 1;
-        uint64_t axrcv_dlo_to : 1;
-        uint64_t axrcv_dlo_err : 1;
-        uint64_t axpush_wrerr : 1;
-        uint64_t oci_bad_reg_addr : 1;
-        uint64_t illegal_cache_op : 1;
-        uint64_t internal_err : 1;
-        uint64_t bcde_oci_dataerr : 1;
-        uint64_t bcde_ce : 1;
-        uint64_t bcde_ue_err : 1;
-        uint64_t bcde_sue_err : 1;
-        uint64_t bcde_rddatato_err : 1;
-        uint64_t bcde_pb_adrerr : 1;
-        uint64_t bcde_pb_ack_dead : 1;
-        uint64_t bcde_setup_err : 1;
-        uint64_t bcue_oci_dataerr : 1;
-        uint64_t bcue_pb_adrerr : 1;
-        uint64_t bcue_pb_ack_dead : 1;
-        uint64_t bcue_setup_err : 1;
-        uint64_t pb_crespto : 1;
-        uint64_t pb_ackdead_fw : 1;
-        uint64_t pb_badcresp : 1;
-        uint64_t pb_wradrerr_fw : 1;
-        uint64_t pb_parity_err : 1;
-        uint64_t pb_unexpdata : 1;
-        uint64_t pb_unexpcresp : 1;
-        uint64_t oci_rereqto : 1;
-        uint64_t oci_wrpar_err : 1;
-        uint64_t oci_slave_init : 1;
-        uint64_t pb_ce_fw : 1;
-        uint64_t pb_ue_fw : 1;
-        uint64_t pb_sue_fw : 1;
-        uint64_t pb_rddatato_fw : 1;
-        uint64_t pb_rdadrerr_fw : 1;
-        uint64_t oci_apar_err : 1;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_fir_and_t;
-
-
-
-typedef union pba_fir_or {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t oci_apar_err : 1;
-        uint64_t pb_rdadrerr_fw : 1;
-        uint64_t pb_rddatato_fw : 1;
-        uint64_t pb_sue_fw : 1;
-        uint64_t pb_ue_fw : 1;
-        uint64_t pb_ce_fw : 1;
-        uint64_t oci_slave_init : 1;
-        uint64_t oci_wrpar_err : 1;
-        uint64_t oci_rereqto : 1;
-        uint64_t pb_unexpcresp : 1;
-        uint64_t pb_unexpdata : 1;
-        uint64_t pb_parity_err : 1;
-        uint64_t pb_wradrerr_fw : 1;
-        uint64_t pb_badcresp : 1;
-        uint64_t pb_ackdead_fw : 1;
-        uint64_t pb_crespto : 1;
-        uint64_t bcue_setup_err : 1;
-        uint64_t bcue_pb_ack_dead : 1;
-        uint64_t bcue_pb_adrerr : 1;
-        uint64_t bcue_oci_dataerr : 1;
-        uint64_t bcde_setup_err : 1;
-        uint64_t bcde_pb_ack_dead : 1;
-        uint64_t bcde_pb_adrerr : 1;
-        uint64_t bcde_rddatato_err : 1;
-        uint64_t bcde_sue_err : 1;
-        uint64_t bcde_ue_err : 1;
-        uint64_t bcde_ce : 1;
-        uint64_t bcde_oci_dataerr : 1;
-        uint64_t internal_err : 1;
-        uint64_t illegal_cache_op : 1;
-        uint64_t oci_bad_reg_addr : 1;
-        uint64_t axpush_wrerr : 1;
-        uint64_t axrcv_dlo_err : 1;
-        uint64_t axrcv_dlo_to : 1;
-        uint64_t axrcv_rsvdata_to : 1;
-        uint64_t axflow_err : 1;
-        uint64_t axsnd_dhi_rtyto : 1;
-        uint64_t axsnd_dlo_rtyto : 1;
-        uint64_t axsnd_rsvto : 1;
-        uint64_t axsnd_rsverr : 1;
-        uint64_t reserved : 4;
-        uint64_t fir_parity_error : 1;
-        uint64_t _reserved0 : 19;
-#else
-        uint64_t _reserved0 : 19;
-        uint64_t fir_parity_error : 1;
-        uint64_t reserved : 4;
-        uint64_t axsnd_rsverr : 1;
-        uint64_t axsnd_rsvto : 1;
-        uint64_t axsnd_dlo_rtyto : 1;
-        uint64_t axsnd_dhi_rtyto : 1;
-        uint64_t axflow_err : 1;
-        uint64_t axrcv_rsvdata_to : 1;
-        uint64_t axrcv_dlo_to : 1;
-        uint64_t axrcv_dlo_err : 1;
-        uint64_t axpush_wrerr : 1;
-        uint64_t oci_bad_reg_addr : 1;
-        uint64_t illegal_cache_op : 1;
-        uint64_t internal_err : 1;
-        uint64_t bcde_oci_dataerr : 1;
-        uint64_t bcde_ce : 1;
-        uint64_t bcde_ue_err : 1;
-        uint64_t bcde_sue_err : 1;
-        uint64_t bcde_rddatato_err : 1;
-        uint64_t bcde_pb_adrerr : 1;
-        uint64_t bcde_pb_ack_dead : 1;
-        uint64_t bcde_setup_err : 1;
-        uint64_t bcue_oci_dataerr : 1;
-        uint64_t bcue_pb_adrerr : 1;
-        uint64_t bcue_pb_ack_dead : 1;
-        uint64_t bcue_setup_err : 1;
-        uint64_t pb_crespto : 1;
-        uint64_t pb_ackdead_fw : 1;
-        uint64_t pb_badcresp : 1;
-        uint64_t pb_wradrerr_fw : 1;
-        uint64_t pb_parity_err : 1;
-        uint64_t pb_unexpdata : 1;
-        uint64_t pb_unexpcresp : 1;
-        uint64_t oci_rereqto : 1;
-        uint64_t oci_wrpar_err : 1;
-        uint64_t oci_slave_init : 1;
-        uint64_t pb_ce_fw : 1;
-        uint64_t pb_ue_fw : 1;
-        uint64_t pb_sue_fw : 1;
-        uint64_t pb_rddatato_fw : 1;
-        uint64_t pb_rdadrerr_fw : 1;
-        uint64_t oci_apar_err : 1;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_fir_or_t;
-
-
-
-typedef union pba_fir_mask {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t mask : 44;
-        uint64_t _reserved0 : 20;
-#else
-        uint64_t _reserved0 : 20;
-        uint64_t mask : 44;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_fir_mask_t;
-
-
-
-typedef union pba_fir_mask_and {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t mask : 44;
-        uint64_t _reserved0 : 20;
-#else
-        uint64_t _reserved0 : 20;
-        uint64_t mask : 44;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_fir_mask_and_t;
-
-
-
-typedef union pba_fir_mask_or {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t mask : 44;
-        uint64_t _reserved0 : 20;
-#else
-        uint64_t _reserved0 : 20;
-        uint64_t mask : 44;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_fir_mask_or_t;
-
-
-
-typedef union pba_fir_action0 {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t fir_action0 : 44;
-        uint64_t _reserved0 : 20;
-#else
-        uint64_t _reserved0 : 20;
-        uint64_t fir_action0 : 44;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_fir_action0_t;
-
-
-
-typedef union pba_fir_action1 {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t fir_action1 : 44;
-        uint64_t _reserved0 : 20;
-#else
-        uint64_t _reserved0 : 20;
-        uint64_t fir_action1 : 44;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_fir_action1_t;
-
-
-
-typedef union pba_occ_action {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t occ_action_set : 44;
-        uint64_t _reserved0 : 20;
-#else
-        uint64_t _reserved0 : 20;
-        uint64_t occ_action_set : 44;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_occ_action_t;
-
-
-
-typedef union pba_rbufvaln {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t rd_slvnum : 2;
-        uint64_t cur_rd_addr : 23;
-        uint64_t spare1 : 3;
-        uint64_t prefetch : 1;
-        uint64_t spare2 : 2;
-        uint64_t abort : 1;
-        uint64_t spare3 : 1;
-        uint64_t buffer_status : 7;
-        uint64_t spare4 : 4;
-        uint64_t _reserved0 : 20;
-#else
-        uint64_t _reserved0 : 20;
-        uint64_t spare4 : 4;
-        uint64_t buffer_status : 7;
-        uint64_t spare3 : 1;
-        uint64_t abort : 1;
-        uint64_t spare2 : 2;
-        uint64_t prefetch : 1;
-        uint64_t spare1 : 3;
-        uint64_t cur_rd_addr : 23;
-        uint64_t rd_slvnum : 2;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_rbufvaln_t;
-
-
-
-typedef union pba_wbufvaln {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t wr_slvnum : 2;
-        uint64_t start_wr_addr : 30;
-        uint64_t spare1 : 3;
-        uint64_t wr_buffer_status : 5;
-        uint64_t spare2 : 1;
-        uint64_t wr_byte_count : 7;
-        uint64_t spare3 : 16;
-#else
-        uint64_t spare3 : 16;
-        uint64_t wr_byte_count : 7;
-        uint64_t spare2 : 1;
-        uint64_t wr_buffer_status : 5;
-        uint64_t spare1 : 3;
-        uint64_t start_wr_addr : 30;
-        uint64_t wr_slvnum : 2;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_wbufvaln_t;
-
-
-
-typedef union pba_mode {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t reserved0 : 4;
-        uint64_t dis_rearb : 1;
-        uint64_t reserved1 : 1;
-        uint64_t dis_slave_rdpipe : 1;
-        uint64_t dis_slave_wrpipe : 1;
-        uint64_t en_marker_ack : 1;
-        uint64_t dis_slvmatch_order : 1;
-        uint64_t en_second_wrbuf : 1;
-        uint64_t dis_rerequest_to : 1;
-        uint64_t inject_type : 2;
-        uint64_t inject_mode : 2;
-        uint64_t pba_region : 2;
-        uint64_t oci_marker_space : 3;
-        uint64_t bcde_ocitrans : 2;
-        uint64_t bcue_ocitrans : 2;
-        uint64_t dis_master_rd_pipe : 1;
-        uint64_t dis_master_wr_pipe : 1;
-        uint64_t en_slave_fairness : 1;
-        uint64_t en_ecvent_count : 1;
-        uint64_t pb_noci_event_sel : 1;
-        uint64_t slv_event_mux : 2;
-        uint64_t enable_debug_bus : 1;
-        uint64_t debug_pb_not_oci : 1;
-        uint64_t debug_oci_mode : 5;
-        uint64_t reserved2 : 1;
-        uint64_t ocislv_fairness_mask : 5;
-        uint64_t ocislv_rereq_hang_div : 5;
-        uint64_t dis_chgrate_count : 1;
-        uint64_t pbreq_event_mux : 2;
-        uint64_t _reserved0 : 11;
-#else
-        uint64_t _reserved0 : 11;
-        uint64_t pbreq_event_mux : 2;
-        uint64_t dis_chgrate_count : 1;
-        uint64_t ocislv_rereq_hang_div : 5;
-        uint64_t ocislv_fairness_mask : 5;
-        uint64_t reserved2 : 1;
-        uint64_t debug_oci_mode : 5;
-        uint64_t debug_pb_not_oci : 1;
-        uint64_t enable_debug_bus : 1;
-        uint64_t slv_event_mux : 2;
-        uint64_t pb_noci_event_sel : 1;
-        uint64_t en_ecvent_count : 1;
-        uint64_t en_slave_fairness : 1;
-        uint64_t dis_master_wr_pipe : 1;
-        uint64_t dis_master_rd_pipe : 1;
-        uint64_t bcue_ocitrans : 2;
-        uint64_t bcde_ocitrans : 2;
-        uint64_t oci_marker_space : 3;
-        uint64_t pba_region : 2;
-        uint64_t inject_mode : 2;
-        uint64_t inject_type : 2;
-        uint64_t dis_rerequest_to : 1;
-        uint64_t en_second_wrbuf : 1;
-        uint64_t dis_slvmatch_order : 1;
-        uint64_t en_marker_ack : 1;
-        uint64_t dis_slave_wrpipe : 1;
-        uint64_t dis_slave_rdpipe : 1;
-        uint64_t reserved1 : 1;
-        uint64_t dis_rearb : 1;
-        uint64_t reserved0 : 4;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_mode_t;
-
-
-
-typedef union pba_slvrst {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t set : 3;
-        uint64_t notimp1 : 1;
-        uint64_t in_prog : 4;
-        uint64_t busy_status : 4;
-        uint64_t _reserved0 : 52;
-#else
-        uint64_t _reserved0 : 52;
-        uint64_t busy_status : 4;
-        uint64_t in_prog : 4;
-        uint64_t notimp1 : 1;
-        uint64_t set : 3;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_slvrst_t;
-
-
-
-typedef union pba_slvctln {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t enable : 1;
-        uint64_t mid_match_value : 3;
-        uint64_t _reserved0 : 1;
-        uint64_t mid_care_mask : 3;
-        uint64_t write_ttype : 3;
-        uint64_t _reserved1 : 4;
-        uint64_t read_ttype : 1;
-        uint64_t read_prefetch_ctl : 2;
-        uint64_t buf_invalidate_ctl : 1;
-        uint64_t buf_alloc_w : 1;
-        uint64_t buf_alloc_a : 1;
-        uint64_t buf_alloc_b : 1;
-        uint64_t buf_alloc_c : 1;
-        uint64_t _reserved2 : 1;
-        uint64_t dis_write_gather : 1;
-        uint64_t wr_gather_timeout : 3;
-        uint64_t write_tsize : 7;
-        uint64_t extaddr : 14;
-        uint64_t _reserved3 : 15;
-#else
-        uint64_t _reserved3 : 15;
-        uint64_t extaddr : 14;
-        uint64_t write_tsize : 7;
-        uint64_t wr_gather_timeout : 3;
-        uint64_t dis_write_gather : 1;
-        uint64_t _reserved2 : 1;
-        uint64_t buf_alloc_c : 1;
-        uint64_t buf_alloc_b : 1;
-        uint64_t buf_alloc_a : 1;
-        uint64_t buf_alloc_w : 1;
-        uint64_t buf_invalidate_ctl : 1;
-        uint64_t read_prefetch_ctl : 2;
-        uint64_t read_ttype : 1;
-        uint64_t _reserved1 : 4;
-        uint64_t write_ttype : 3;
-        uint64_t mid_care_mask : 3;
-        uint64_t _reserved0 : 1;
-        uint64_t mid_match_value : 3;
-        uint64_t enable : 1;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_slvctln_t;
-
-
-
-typedef union pba_bcde_ctl {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t stop : 1;
-        uint64_t start : 1;
-        uint64_t _reserved0 : 62;
-#else
-        uint64_t _reserved0 : 62;
-        uint64_t start : 1;
-        uint64_t stop : 1;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_bcde_ctl_t;
-
-#endif // __ASSEMBLER__
-#define PBA_BCDE_CTL_STOP SIXTYFOUR_BIT_CONSTANT(0x8000000000000000)
-#define PBA_BCDE_CTL_START SIXTYFOUR_BIT_CONSTANT(0x4000000000000000)
-#ifndef __ASSEMBLER__
-
-
-typedef union pba_bcde_set {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t _reserved0 : 2;
-        uint64_t copy_length : 6;
-        uint64_t _reserved1 : 56;
-#else
-        uint64_t _reserved1 : 56;
-        uint64_t copy_length : 6;
-        uint64_t _reserved0 : 2;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_bcde_set_t;
-
-
-
-typedef union pba_bcde_status {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t running : 1;
-        uint64_t waiting : 1;
-        uint64_t wrcmp : 6;
-        uint64_t _reserved0 : 6;
-        uint64_t rdcmp : 6;
-        uint64_t debug : 9;
-        uint64_t stopped : 1;
-        uint64_t error : 1;
-        uint64_t done : 1;
-        uint64_t _reserved1 : 32;
-#else
-        uint64_t _reserved1 : 32;
-        uint64_t done : 1;
-        uint64_t error : 1;
-        uint64_t stopped : 1;
-        uint64_t debug : 9;
-        uint64_t rdcmp : 6;
-        uint64_t _reserved0 : 6;
-        uint64_t wrcmp : 6;
-        uint64_t waiting : 1;
-        uint64_t running : 1;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_bcde_status_t;
-
-
-
-typedef union pba_bcde_pbadr {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t _reserved0 : 2;
-        uint64_t pb_offset : 23;
-        uint64_t _reserved1 : 2;
-        uint64_t extaddr : 14;
-        uint64_t _reserved2 : 23;
-#else
-        uint64_t _reserved2 : 23;
-        uint64_t extaddr : 14;
-        uint64_t _reserved1 : 2;
-        uint64_t pb_offset : 23;
-        uint64_t _reserved0 : 2;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_bcde_pbadr_t;
-
-
-
-typedef union pba_bcde_ocibar {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t addr : 25;
-        uint64_t _reserved0 : 39;
-#else
-        uint64_t _reserved0 : 39;
-        uint64_t addr : 25;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_bcde_ocibar_t;
-
-
-
-typedef union pba_bcue_ctl {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t stop : 1;
-        uint64_t start : 1;
-        uint64_t _reserved0 : 62;
-#else
-        uint64_t _reserved0 : 62;
-        uint64_t start : 1;
-        uint64_t stop : 1;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_bcue_ctl_t;
-
-#endif // __ASSEMBLER__
-#define PBA_BCUE_CTL_STOP SIXTYFOUR_BIT_CONSTANT(0x8000000000000000)
-#define PBA_BCUE_CTL_START SIXTYFOUR_BIT_CONSTANT(0x4000000000000000)
-#ifndef __ASSEMBLER__
-
-
-typedef union pba_bcue_set {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t _reserved0 : 2;
-        uint64_t copy_length : 6;
-        uint64_t _reserved1 : 56;
-#else
-        uint64_t _reserved1 : 56;
-        uint64_t copy_length : 6;
-        uint64_t _reserved0 : 2;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_bcue_set_t;
-
-
-
-typedef union pba_bcue_status {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t running : 1;
-        uint64_t waiting : 1;
-        uint64_t wrcmp : 6;
-        uint64_t _reserved0 : 6;
-        uint64_t rdcmp : 6;
-        uint64_t debug : 9;
-        uint64_t stopped : 1;
-        uint64_t error : 1;
-        uint64_t done : 1;
-        uint64_t _reserved1 : 32;
-#else
-        uint64_t _reserved1 : 32;
-        uint64_t done : 1;
-        uint64_t error : 1;
-        uint64_t stopped : 1;
-        uint64_t debug : 9;
-        uint64_t rdcmp : 6;
-        uint64_t _reserved0 : 6;
-        uint64_t wrcmp : 6;
-        uint64_t waiting : 1;
-        uint64_t running : 1;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_bcue_status_t;
-
-
-
-typedef union pba_bcue_pbadr {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t _reserved0 : 2;
-        uint64_t pb_offset : 23;
-        uint64_t _reserved1 : 2;
-        uint64_t extaddr : 14;
-        uint64_t _reserved2 : 23;
-#else
-        uint64_t _reserved2 : 23;
-        uint64_t extaddr : 14;
-        uint64_t _reserved1 : 2;
-        uint64_t pb_offset : 23;
-        uint64_t _reserved0 : 2;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_bcue_pbadr_t;
-
-
-
-typedef union pba_bcue_ocibar {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t addr : 25;
-        uint64_t _reserved0 : 39;
-#else
-        uint64_t _reserved0 : 39;
-        uint64_t addr : 25;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_bcue_ocibar_t;
-
-
-
-typedef union pba_pbocrn {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t _reserved0 : 16;
-        uint64_t event : 16;
-        uint64_t _reserved1 : 12;
-        uint64_t accum : 20;
-#else
-        uint64_t accum : 20;
-        uint64_t _reserved1 : 12;
-        uint64_t event : 16;
-        uint64_t _reserved0 : 16;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_pbocrn_t;
-
-
-
-typedef union pba_xsndtx {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t snd_scope : 3;
-        uint64_t snd_qid : 1;
-        uint64_t snd_type : 1;
-        uint64_t snd_reservation : 1;
-        uint64_t spare1 : 2;
-        uint64_t snd_nodeid : 3;
-        uint64_t snd_chipid : 3;
-        uint64_t spare2 : 2;
-        uint64_t _reserved0 : 48;
-#else
-        uint64_t _reserved0 : 48;
-        uint64_t spare2 : 2;
-        uint64_t snd_chipid : 3;
-        uint64_t snd_nodeid : 3;
-        uint64_t spare1 : 2;
-        uint64_t snd_reservation : 1;
-        uint64_t snd_type : 1;
-        uint64_t snd_qid : 1;
-        uint64_t snd_scope : 3;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_xsndtx_t;
-
-
-
-typedef union pba_xcfg {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t pbax_en : 1;
-        uint64_t reservation_en : 1;
-        uint64_t snd_reset : 1;
-        uint64_t rcv_reset : 1;
-        uint64_t rcv_nodeid : 3;
-        uint64_t rcv_chipid : 3;
-        uint64_t spare1 : 2;
-        uint64_t rcv_brdcst_group : 8;
-        uint64_t rcv_datalo_thresh : 8;
-        uint64_t snd_retry_thresh : 8;
-        uint64_t snd_rsv_req_thresh : 2;
-        uint64_t snd_retry_count_overcom : 1;
-        uint64_t _reserved0 : 25;
-#else
-        uint64_t _reserved0 : 25;
-        uint64_t snd_retry_count_overcom : 1;
-        uint64_t snd_rsv_req_thresh : 2;
-        uint64_t snd_retry_thresh : 8;
-        uint64_t rcv_datalo_thresh : 8;
-        uint64_t rcv_brdcst_group : 8;
-        uint64_t spare1 : 2;
-        uint64_t rcv_chipid : 3;
-        uint64_t rcv_nodeid : 3;
-        uint64_t rcv_reset : 1;
-        uint64_t snd_reset : 1;
-        uint64_t reservation_en : 1;
-        uint64_t pbax_en : 1;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_xcfg_t;
-
-
-
-typedef union pba_xsndstat {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t snd_in_progress : 1;
-        uint64_t snd_error : 1;
-        uint64_t snd_status : 6;
-        uint64_t snd_retry_count : 8;
-        uint64_t _reserved0 : 48;
-#else
-        uint64_t _reserved0 : 48;
-        uint64_t snd_retry_count : 8;
-        uint64_t snd_status : 6;
-        uint64_t snd_error : 1;
-        uint64_t snd_in_progress : 1;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_xsndstat_t;
-
-
-
-typedef union pba_xsnddat {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t pbax_datahi : 32;
-        uint64_t pbax_datalo : 32;
-#else
-        uint64_t pbax_datalo : 32;
-        uint64_t pbax_datahi : 32;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_xsnddat_t;
-
-
-
-typedef union pba_xrcvstat {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t rcv_in_progress : 1;
-        uint64_t rcv_error : 1;
-        uint64_t rcv_write_in_progress : 1;
-        uint64_t rcv_reservation_set : 1;
-        uint64_t rcv_capture : 14;
-        uint64_t _reserved0 : 46;
-#else
-        uint64_t _reserved0 : 46;
-        uint64_t rcv_capture : 14;
-        uint64_t rcv_reservation_set : 1;
-        uint64_t rcv_write_in_progress : 1;
-        uint64_t rcv_error : 1;
-        uint64_t rcv_in_progress : 1;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_xrcvstat_t;
-
-
-
-typedef union pba_xshbrn {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t push_start : 29;
-        uint64_t _reserved0 : 35;
-#else
-        uint64_t _reserved0 : 35;
-        uint64_t push_start : 29;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_xshbrn_t;
-
-
-
-typedef union pba_xshcsn {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t push_full : 1;
-        uint64_t push_empty : 1;
-        uint64_t spare1 : 2;
-        uint64_t push_intr_action : 2;
-        uint64_t push_length : 5;
-        uint64_t notimp1 : 2;
-        uint64_t push_write_ptr : 5;
-        uint64_t notimp2 : 3;
-        uint64_t push_read_ptr : 5;
-        uint64_t notimp3 : 5;
-        uint64_t push_enable : 1;
-        uint64_t _reserved0 : 32;
-#else
-        uint64_t _reserved0 : 32;
-        uint64_t push_enable : 1;
-        uint64_t notimp3 : 5;
-        uint64_t push_read_ptr : 5;
-        uint64_t notimp2 : 3;
-        uint64_t push_write_ptr : 5;
-        uint64_t notimp1 : 2;
-        uint64_t push_length : 5;
-        uint64_t push_intr_action : 2;
-        uint64_t spare1 : 2;
-        uint64_t push_empty : 1;
-        uint64_t push_full : 1;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_xshcsn_t;
-
-
-
-typedef union pba_xshincn {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint64_t reserved : 64;
-#else
-        uint64_t reserved : 64;
-#endif // _BIG_ENDIAN
-    } fields;
-} pba_xshincn_t;
-
-
-#endif // __ASSEMBLER__
-#endif // __PBA_FIRMWARE_REGISTERS_H__
-
-
diff --git a/src/usr/hwpf/hwp/p8_fir_registers.xml b/src/usr/hwpf/hwp/p8_fir_registers.xml
deleted file mode 100644
index d8e1dd46e..000000000
--- a/src/usr/hwpf/hwp/p8_fir_registers.xml
+++ /dev/null
@@ -1,296 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/p8_fir_registers.xml $                       -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2014                             -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_fir_registers.xml,v 1.3 2014/07/23 19:51:48 jmcgill Exp $ -->
-<!-- Definition of FIR registers to collect on some errors -->
-<hwpErrors>
-  <!-- ******************************************************************** -->
-  <!-- All FIRs *********************************************************** -->
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_FIR_FFDC</rc>
-    <description>
-      FFDC collected on processor FIR errors
-    </description>
-    <ffdc>TARGET</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_CHIP_MASTER_INTERRUPT_REGISTERS</id>
-      <id>REG_FFDC_CHIP_GLOB_XFIR_REGISTERS</id>
-      <id>REG_FFDC_CHIP_GLOB_RFIR_REGISTERS</id>
-      <id>REG_FFDC_CHIP_GLOB_FIR_MASK_REGISTERS</id>
-      <id>REG_FFDC_CHIP_GLOB_ATTN_REGISTERS</id>
-      <id>REG_FFDC_CHIP_GLOB_ATTN_MASK_REGISTERS</id>
-      <id>REG_FFDC_CHIP_LFIR_REGISTERS</id>
-      <id>REG_FFDC_CHIP_LFIR_MASK_REGISTERS</id>
-      <target>TARGET</target>
-    </collectRegisterFfdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_EX_GLOB_XFIR_REGISTERS</id> 
-      <id>REG_FFDC_EX_GLOB_RFIR_REGISTERS</id> 
-      <id>REG_FFDC_EX_GLOB_FIR_MASK_REGISTERS</id> 
-      <id>REG_FFDC_EX_GLOB_ATTN_REGISTERS</id> 
-      <id>REG_FFDC_EX_GLOB_ATTN_MASK_REGISTERS</id> 
-      <id>REG_FFDC_EX_LFIR_REGISTERS</id> 
-      <id>REG_FFDC_EX_LFIR_MASK_REGISTERS</id>
-      <childTargets>
-        <parent>TARGET</parent>
-        <childType>TARGET_TYPE_EX_CHIPLET</childType>
-      </childTargets>
-    </collectRegisterFfdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_MCS_LFIR_REGISTERS</id> 
-      <id>REG_FFDC_MCS_LFIR_MASK_REGISTERS</id>
-      <childTargets>
-        <parent>TARGET</parent>
-        <childType>TARGET_TYPE_MCS_CHIPLET</childType>
-      </childTargets>
-    </collectRegisterFfdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_XBUS_LFIR_REGISTERS</id> 
-      <id>REG_FFDC_XBUS_LFIR_MASK_REGISTERS</id>
-      <childTargets>
-        <parent>TARGET</parent>
-        <childType>TARGET_TYPE_XBUS_ENDPOINT</childType>
-      </childTargets>
-    </collectRegisterFfdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_ABUS_LFIR_REGISTERS</id> 
-      <id>REG_FFDC_ABUS_LFIR_MASK_REGISTERS</id>
-      <childTargets>
-        <parent>TARGET</parent>
-        <childType>TARGET_TYPE_ABUS_ENDPOINT</childType>
-      </childTargets>
-    </collectRegisterFfdc>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <!-- Chip Level FFDC **************************************************** -->
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CHIP_MASTER_INTERRUPT_REGISTERS</id>
-    <cfamRegister>CFAM_FSI_STATUS_0x00001007</cfamRegister>
-    <scomRegister>MASTER_PCB_INT_0x000F001A</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CHIP_GLOB_XFIR_REGISTERS</id>
-    <scomRegister>READ_GLOBAL_XSTOP_FIR_0x570F001B</scomRegister>
-    <scomRegister>TP_XSTOP_0x01040000</scomRegister>
-    <scomRegister>NEST_XSTOP_0x02040000</scomRegister>
-    <scomRegister>X_XSTOP_0x04040000</scomRegister>
-    <scomRegister>A_XSTOP_0x08040000</scomRegister>
-    <scomRegister>PCIE_XSTOP_0x09040000</scomRegister>
-    <scomRegister>PB_RAS_FIR_0x02010C6E</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CHIP_GLOB_RFIR_REGISTERS</id>
-    <scomRegister>READ_GLOBAL_RECOV_FIR_0x570F001C</scomRegister>
-    <scomRegister>TP_RECOV_0x01040001</scomRegister>
-    <scomRegister>NEST_RECOV_0x02040001</scomRegister>
-    <scomRegister>X_RECOV_0x04040001</scomRegister>
-    <scomRegister>A_RECOV_0x08040001</scomRegister>
-    <scomRegister>PCIE_RECOV_0x09040001</scomRegister>          
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CHIP_GLOB_FIR_MASK_REGISTERS</id>
-    <scomRegister>TP_FIR_MASK_0x01040002</scomRegister>
-    <scomRegister>NEST_FIR_MASK_0x02040002</scomRegister>
-    <scomRegister>X_FIR_MASK_0x04040002</scomRegister>
-    <scomRegister>A_FIR_MASK_0x08040002</scomRegister>
-    <scomRegister>PCIE_FIR_MASK_0x09040002</scomRegister>
-    <scomRegister>PB_RAS_FIR_MASK_0x02010C71</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CHIP_GLOB_ATTN_REGISTERS</id>
-    <scomRegister>READ_GLOBAL_SPATT_FIR_0x570F001A</scomRegister>
-    <scomRegister>TP_SPATTN_0x01040004</scomRegister>
-    <scomRegister>NEST_SPATTN_0x02040004</scomRegister>
-    <scomRegister>X_SPATTN_0x04040004</scomRegister>
-    <scomRegister>A_SPATTN_0x08040004</scomRegister>
-    <scomRegister>PCIE_SPATTN_0x09040004</scomRegister>          
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CHIP_GLOB_ATTN_MASK_REGISTERS</id>
-    <scomRegister>TP_SPATTN_MASK_0x01040007</scomRegister>
-    <scomRegister>NEST_SPATTN_MASK_0x02040007</scomRegister>
-    <scomRegister>X_SPATTN_MASK_0x04040007</scomRegister>
-    <scomRegister>A_SPATTN_MASK_0x08040007</scomRegister>
-    <scomRegister>PCIE_SPATTN_MASK_0x09040007</scomRegister>          
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CHIP_LFIR_REGISTERS</id>
-    <scomRegister>OCC_LFIR_0x01010800</scomRegister>
-    <scomRegister>PMC_LFIR_0x01010840</scomRegister>
-    <scomRegister>OCC_PMC_LFIR_0x01010C00</scomRegister>
-    <scomRegister>TP_PERV_LFIR_0x0104000A</scomRegister>
-    <scomRegister>PBA_FIR_0x02010840</scomRegister>
-    <scomRegister>PSI_HB_FIR_0x02010900</scomRegister>
-    <scomRegister>HCA_EN_FIR_0x02010940</scomRegister>
-    <scomRegister>HCA_EN_EHHCA_FIR_0x02010980</scomRegister>
-    <scomRegister>EN_TPC_INTP_SYNC_FIR_0x020109C0</scomRegister>
-    <scomRegister>PB_FIR_WEST_0x02010C00</scomRegister>
-    <scomRegister>PB_FIR_CENT_0x02010C40</scomRegister>
-    <scomRegister>PB_FIR_EAST_0x02010C80</scomRegister>
-    <scomRegister>PCIE0_FIR_0x02012000</scomRegister>
-    <scomRegister>PCIE1_FIR_0x02012400</scomRegister>
-    <scomRegister>PCIE2_FIR_0x02012800</scomRegister>
-    <scomRegister>NX_CQ_FIR_0x02013080</scomRegister>
-    <scomRegister>NX_AS_FIR_0x020130C0</scomRegister>
-    <scomRegister>NX_DMA_ENG_FIR_0x02013100</scomRegister>
-    <scomRegister>NX_CAPP_FIR_0x02013000</scomRegister>
-    <scomRegister>MCD_FIR_0x02013400</scomRegister>
-    <scomRegister>NEST_PERV_LFIR_0x0204000A</scomRegister>
-    <scomRegister>PB_X_FIR_0x04010C00</scomRegister>
-    <scomRegister>X_PSI_FIR_0x04012400</scomRegister>
-    <scomRegister>X_PERV_LFIR_0x0404000A</scomRegister>
-    <scomRegister>PB_A_FIR_0x08010800</scomRegister>
-    <scomRegister>A_PERV_LFIR_0x0804000A</scomRegister>
-    <scomRegister>ES_PBES_WRAP_TOP_FIR_0x09010800</scomRegister>
-    <scomRegister>PCIE_IOP0_PLL_FIR_0x09011400</scomRegister>
-    <scomRegister>PCIE_IOP1_PLL_FIR_0x09011840</scomRegister>
-    <scomRegister>PCIE_PERV_LFIR_0x0904000A</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_CHIP_LFIR_MASK_REGISTERS</id>
-    <scomRegister>OCC_LFIR_MASK_0x01010803</scomRegister>
-    <scomRegister>PMC_LFIR_MASK_0x01010843</scomRegister>
-    <scomRegister>OCC_PMC_LFIR_MASK_0x01010C03</scomRegister>
-    <scomRegister>TP_PERV_LFIR_MASK_0x0104000D</scomRegister>
-    <scomRegister>PBA_FIR_MASK_0x02010843</scomRegister>
-    <scomRegister>PSI_HB_FIR_MASK_0x02010903</scomRegister>
-    <scomRegister>HCA_EN_FIR_MASK_0x02010943</scomRegister>
-    <scomRegister>HCA_EN_EHHCA_FIR_MASK_0x02010983</scomRegister>
-    <scomRegister>EN_TPC_INTP_SYNC_FIR_MASK_0x020109C3</scomRegister>
-    <scomRegister>PB_FIR_MASK_WEST_0x02010C03</scomRegister>
-    <scomRegister>PB_FIR_MASK_CENT_0x02010C43</scomRegister>
-    <scomRegister>PB_FIR_MASK_EAST_0x02010C83</scomRegister>
-    <scomRegister>PCIE0_FIR_MASK_0x02012003</scomRegister>
-    <scomRegister>PCIE1_FIR_MASK_0x02012403</scomRegister>
-    <scomRegister>PCIE2_FIR_MASK_0x02012803</scomRegister>
-    <scomRegister>NX_CQ_FIR_MASK_0x02013083</scomRegister>
-    <scomRegister>NX_AS_FIR_MASK_0x020130C3</scomRegister>
-    <scomRegister>NX_DMA_ENG_FIR_MASK_0x02013103</scomRegister>
-    <scomRegister>NX_CAPP_FIR_MASK_0x02013003</scomRegister>
-    <scomRegister>MCD_FIR_MASK_0x02013403</scomRegister>
-    <scomRegister>NEST_PERV_LFIR_MASK_0x0204000D</scomRegister>
-    <scomRegister>PB_X_FIR_MASK_0x04010C03</scomRegister>
-    <scomRegister>X_PSI_FIR_MASK_0x04012403</scomRegister>
-    <scomRegister>X_PERV_LFIR_MASK_0x0404000D</scomRegister>
-    <scomRegister>PB_A_FIR_MASK_0x08010803</scomRegister>
-    <scomRegister>A_PERV_LFIR_MASK_0x0804000D</scomRegister>
-    <scomRegister>ES_PBES_WRAP_TOP_FIR_MASK_0x09010803</scomRegister>
-    <scomRegister>PCIE_IOP0_PLL_FIR_MASK_0x09011403</scomRegister>
-    <scomRegister>PCIE_IOP1_PLL_FIR_MASK_0x09011843</scomRegister>
-    <scomRegister>PCIE_PERV_LFIR_MASK_0x0904000D</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <!-- EX Chiplet Level FFDC ********************************************** -->
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_EX_GLOB_XFIR_REGISTERS</id> 
-    <scomRegister>EX_XSTOP_0x10040000</scomRegister>
-  </registerFfdc>  
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_EX_GLOB_RFIR_REGISTERS</id> 
-    <scomRegister>EX_RECOV_0x10040001</scomRegister>
-  </registerFfdc>  
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_EX_GLOB_FIR_MASK_REGISTERS</id> 
-    <scomRegister>EX_FIR_MASK_0x10040002</scomRegister>
-  </registerFfdc>  
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_EX_GLOB_ATTN_REGISTERS</id> 
-    <scomRegister>EX_SPATTN_0x10040004</scomRegister>
-  </registerFfdc>  
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_EX_GLOB_ATTN_MASK_REGISTERS</id> 
-    <scomRegister>EX_SPATTN_MASK_0x10040007</scomRegister>
-  </registerFfdc>  
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_EX_LFIR_REGISTERS</id> 
-    <scomRegister>EX_CORE_FIR_0x10013100</scomRegister>     
-    <scomRegister>EX_L2_FIR_REG_0x10012800</scomRegister>   
-    <scomRegister>EX_L3_FIR_REG_0x10010800</scomRegister>   
-    <scomRegister>EX_NCU_FIR_REG_0x10010C00</scomRegister>  
-    <scomRegister>EX_PERV_LFIR_0x1004000A</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_EX_LFIR_MASK_REGISTERS</id> 
-    <scomRegister>EX_CORE_FIR_MASK_0x10013103</scomRegister>     
-    <scomRegister>EX_L2_FIR_MASK_REG_0x10012803</scomRegister>   
-    <scomRegister>EX_L3_FIR_MASK_REG_0x10010803</scomRegister>   
-    <scomRegister>EX_NCU_FIR_MASK_REG_0x10010C03</scomRegister>  
-    <scomRegister>EX_PERV_LFIR_MASK_0x1004000D</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <!-- MCS Chiplet Level FFDC ********************************************* -->
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_MCS_LFIR_REGISTERS</id>
-    <scomRegister>MCS_MCIFIR_0x02011840</scomRegister>
-    <scomRegister>IOMC0_BUSCNTL_FIR_0x02011A00</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_MCS_LFIR_MASK_REGISTERS</id>
-    <scomRegister>MCS_MCIFIRMASK_0x02011843</scomRegister>
-    <scomRegister>IOMC0_BUSCNTL_FIR_MASK_0x02011A03</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <!-- XBUS Chiplet Level FFDC ******************************************** -->
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_XBUS_LFIR_REGISTERS</id>
-    <scomRegister>X_XBUS0_BUSCNTL_FIR_0x04011000</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_XBUS_LFIR_MASK_REGISTERS</id>
-    <scomRegister>X_XBUS0_BUSCNTL_FIR_MASK_0x04011003</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-  <!-- ABUS Chiplet Level FFDC ******************************************** -->
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_ABUS_LFIR_REGISTERS</id>
-    <scomRegister>A_ABUS_BUSCNTL_FIR_0x08010C00</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->  
-  <registerFfdc>
-    <id>REG_FFDC_ABUS_LFIR_MASK_REGISTERS</id>
-    <scomRegister>A_ABUS_BUSCNTL_FIR_MASK_0x08010C03</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->  
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/p8_slw_registers.xml b/src/usr/hwpf/hwp/p8_slw_registers.xml
deleted file mode 100644
index cee0c97bb..000000000
--- a/src/usr/hwpf/hwp/p8_slw_registers.xml
+++ /dev/null
@@ -1,110 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/p8_slw_registers.xml $                       -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2013,2014                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_slw_registers.xml,v 1.6 2014/07/23 19:51:48 jmcgill Exp $ -->
-<!-- Definition of SLW registers to collect on some errors -->
-<hwpErrors>
-  <registerFfdc>
-    <id>REG_FFDC_PROC_SLW_REGISTERS</id>
-    <scomRegister>PORE_SLW_STATUS_0x00068000</scomRegister>
-    <scomRegister>PORE_SLW_CONTROL_0x00068001</scomRegister>
-    <scomRegister>PORE_SLW_RESET_0x00068002</scomRegister>
-    <scomRegister>PORE_SLW_ERROR_MASK_0x00068003</scomRegister>
-    <scomRegister>PORE_SLW_PRV_BASE_ADDRESS0_0x00068004</scomRegister>
-    <scomRegister>PORE_SLW_PRV_BASE_ADDRESS1_0x00068005</scomRegister>
-    <scomRegister>PORE_SLW_OCI_BASE_ADDRESS0_0x00068006</scomRegister>
-    <scomRegister>PORE_SLW_OCI_BASE_ADDRESS1_0x00068007</scomRegister>
-    <scomRegister>PORE_SLW_TABLE_BASE_ADDR_0x00068008</scomRegister>
-    <scomRegister>PORE_SLW_EXE_TRIGGER_0x00068009</scomRegister>
-    <scomRegister>PORE_SLW_SCRATCH0_0x0006800A</scomRegister>
-    <scomRegister>PORE_SLW_SCRATCH1_0x0006800B</scomRegister>
-    <scomRegister>PORE_SLW_SCRATCH2_0x0006800C</scomRegister>
-    <scomRegister>PORE_SLW_IBUF_01_0x0006800D</scomRegister>
-    <scomRegister>PORE_SLW_IBUF_2_0x0006800E</scomRegister>
-    <scomRegister>PORE_SLW_DBG0_0x0006800F</scomRegister>
-    <scomRegister>PORE_SLW_DBG1_0x00068010</scomRegister>
-    <scomRegister>PORE_SLW_PC_STACK0_0x00068011</scomRegister>
-    <scomRegister>PORE_SLW_PC_STACK1_0x00068012</scomRegister>
-    <scomRegister>PORE_SLW_PC_STACK2_0x00068013</scomRegister>
-    <scomRegister>PORE_SLW_ID_FLAGS_0x00068014</scomRegister>
-    <scomRegister>PORE_SLW_DATA0_0x00068015</scomRegister>
-    <scomRegister>PORE_SLW_MEMORY_RELOC_0x00068016</scomRegister>
-    <scomRegister>PORE_SLW_I2C_E0_PARAM_0x00068017</scomRegister>
-    <scomRegister>PORE_SLW_I2C_E1_PARAM_0x00068018</scomRegister>
-    <scomRegister>PORE_SLW_I2C_E2_PARAM_0x00068019</scomRegister>
-  </registerFfdc>
-  <registerFfdc>
-    <id>REG_FFDC_PROC_SLW_FIR_REGISTERS</id>
-    <scomRegister>PMC_LFIR_0x01010840</scomRegister>
-    <scomRegister>OCC_LFIR_0x01010800</scomRegister>
-    <scomRegister>PBA_FIR_0x02010840</scomRegister>
-  </registerFfdc>
-    <registerFfdc>
-    <id>REG_FFDC_PROC_SLW_PMC_REGISTERS</id>
-    <scomRegister>PMC_MODE_REG_0x00062000</scomRegister>
-    <scomRegister>PMC_STATUS_REG_0x00062009</scomRegister>
-    <scomRegister>PMC_CORE_DECONFIG_REG_0x0006200D</scomRegister>
-    <scomRegister>PMC_FSMSTATE_STATUS_REG_0x00062020</scomRegister>
-    <scomRegister>PMC_PORRR0_REG_0x0006208E</scomRegister>
-    <scomRegister>PMC_PORRR1_REG_0x0006208F</scomRegister>
-    <scomRegister>PMC_PORE_REQ_REG0_0x0006208E</scomRegister>
-    <scomRegister>PMC_DEEPEXIT_MASK_0x00062092</scomRegister>
-  </registerFfdc>
-    <registerFfdc>
-    <id>REG_FFDC_PROC_SLW_PBA_REGISTERS</id>
-    <scomRegister>PBA_BAR2_0x02013F02</scomRegister>
-    <scomRegister>PBA_BARMSK2_0x02013F06</scomRegister>
-    <scomRegister>PBA_CONFIG_0x0201084B</scomRegister>
-    <scomRegister>PBA_SLVCTL2_0x00064006</scomRegister>
-  </registerFfdc>
-  <registerFfdc>
-    <id>REG_FFDC_PROC_SLW_OHA_REGISTERS</id>
-    <scomRegister>EX_OHA_RO_STATUS_REG_0x1002000B</scomRegister>
-    <scomRegister>EX_OHA_MODE_REG_RWx1002000D</scomRegister>
-    <scomRegister>EX_OHA_ARCH_IDLE_STATE_REG_RWx10020011</scomRegister>
-    <scomRegister>EX_OHA_RO_STATUS_REG_0x1002000B</scomRegister>
-    <scomRegister>EX_OHA_AISS_IO_REG_0x10020014</scomRegister>   
-  </registerFfdc>
-  <registerFfdc>
-    <id>REG_FFDC_PROC_SLW_PCBS_REGISTERS</id>
-    <scomRegister>EX_GP3_0x100F0012</scomRegister>
-    <scomRegister>EX_PMGP0_0x100F0100</scomRegister>
-    <scomRegister>EX_PMGP1_0x100F0103</scomRegister>
-    <scomRegister>EX_PFET_CTL_REG_0x100F0106</scomRegister>
-    <scomRegister>EX_PFET_STAT_REG_0x100F0107</scomRegister>
-    <scomRegister>EX_PFET_CTL_REG_0x100F010E</scomRegister>
-    <scomRegister>EX_PMSTATEHISTPERF_REG_0x100F0113</scomRegister>
-    <scomRegister>EX_PCBS_FSM_MONITOR1_REG_0x100F0170</scomRegister>
-    <scomRegister>EX_PCBS_FSM_MONITOR2_REG_0x100F0171</scomRegister>   
-    <scomRegister>EX_PMErr_REG_0x100F0109</scomRegister>   
-    <scomRegister>EX_PCBS_DPLL_STATUS_REG_100F0161</scomRegister>   
-    <scomRegister>EX_DPLL_CPM_PARM_REG_0x100F0152</scomRegister>        
-  </registerFfdc>
-  <registerFfdc>
-    <id>REG_FFDC_PROC_SLW_SPWKUP_REGISTERS</id>
-    <scomRegister>PM_SPECIAL_WKUP_FSP_0x100F010B</scomRegister>
-    <scomRegister>PM_SPECIAL_WKUP_OCC_0x100F010C</scomRegister>
-    <scomRegister>PM_SPECIAL_WKUP_PHYP_0x100F010D</scomRegister>
-  </registerFfdc>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/poreve_errors.xml b/src/usr/hwpf/hwp/poreve_errors.xml
deleted file mode 100644
index 8161c2c46..000000000
--- a/src/usr/hwpf/hwp/poreve_errors.xml
+++ /dev/null
@@ -1,136 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/poreve_errors.xml $                          -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- Errors from the POREVE -->
-<hwpErrors>
-  <!-- ******************************************************************** -->
-  <!-- ** Errors from pore.C                                                 -->
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_POREVE_NO_PIB_MODEL</rc>
-    <description>
-      Signalled by Pore::pibMaster(). This will never happen; The PoreVe has
-      not configured a PIB bus.
-    </description>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_POREVE_NO_OCI_MODEL</rc>
-    <description>
-      Signalled by Pore::ociMaster(). This will never happen; The PoreVe has
-      not configured an OCI bus.
-    </description>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_POREVE_PORE_OPERATION_ERROR</rc>
-    <description>
-      Signalled by Pore::operation(). An error occurred during an attempted
-      register access of the PORE model.
-    </description>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_POREVE_PORE_NOT_MAPPED_ON_BUS</rc>
-    <description>
-      Signalled by Bus::operation(). No bus slave claimed the transaction,
-      i.e., an attempted access of an unmapped address.
-    </description>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_POREVE_BUS_SLAVE_PERMISSION_DENIED</rc>
-    <description>
-      Signalled by Bus::operation(). The access mode was not permitted by the
-      slave permissions. See the FAPI_ERR() log for details.
-    </description>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_POREVE_HOOKMANAGER_INCONSISTENCY</rc>
-    <description>
-      Signalled by HookManager::runHooks(). An inconsistency in the HookManager
-      data structures was detected.  See the FAPI_ERR() log for details.
-    </description>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_POREVE_PIB2CFAM_ERROR</rc>
-    <description>
-      Signalled by Pib2Cfam::operation(). An error occurred during an access of
-      the virtual Pib2Cfam unit - either a read/write access error or an
-      attempted access of a non-modeled register.
-    </description>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_POREVE_FASTI2C_ERROR</rc>
-    <description>
-      Signalled by FastI2cController::operation(). An error occurred during an
-      access of a FastI2cController. To see the FAPI_ERR() log you may need to
-      recompile the PoreVe with -DDEBUG_FASTI2C=1.
-    </description>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_POREVE_LPC_ERROR</rc>
-    <description>
-      Signalled by LpcController::operation(). An error occurred during an
-      access of a LpcController. To see the FAPI_ERR() log you may need to
-      recompile the PoreVe with -DDEBUG_FASTI2C=1.
-    </description>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_POREVE_PIBMEM_CONTROL_ERROR</rc>
-    <description>
-      Signalled by Pibmem::operation(). An error occurred during an access of a
-      PIBMEM control register. See the FAPI_ERR() log for details.
-    </description>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_POREVE_PIB_MEMORY_ACCESS_ERROR</rc>
-    <description>
-      Signalled by PibMemory::operation(). An error occurred during an access
-      of a PibMemory. See the FAPI_ERR() log for details as well as the Model
-      Error state of the PoreVe.
-    </description>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_POREVE_OCI_MEMORY_ACCESS_ERROR</rc>
-    <description>
-      Signalled by OciMemory::operation(). An error occurred during an access
-      of an OciMemory. See the FAPI_ERR() log for details as well as the Model
-      Error state of the PoreVe.
-    </description>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_POREVE_OCI_SLAVE_ERROR</rc>
-    <description>
-      Signalled by OciSlave access methods. An error occurred during an access
-      of an Oci Slave.
-    </description>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/poreve_memory_attributes.xml b/src/usr/hwpf/hwp/poreve_memory_attributes.xml
deleted file mode 100644
index c197b1701..000000000
--- a/src/usr/hwpf/hwp/poreve_memory_attributes.xml
+++ /dev/null
@@ -1,113 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/poreve_memory_attributes.xml $               -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: poreve_memory_attributes.xml,v 1.3 2013/01/04 21:42:27 farrugia Exp $ -->
-<!-- 
-     Attributes related to SEEPROM and PNOR configuration required by the
-     PoreVe 
-     
-     The PoreVe implements a system model of the PORE-SBE and attached
-     memory devices that must be configured accoding to the actual chip- and
-     system-specific configuration in order to correctly execute PORE
-     firmware. 
-
-     Each chip has access to 2 SEEPROM memories containing PORE
-     code.  These memories appear on different I2C addresses and/or I2C
-     controller ports depending on the chip.  The size of the memory
-     (specified as the number of address bytes) is also a required parameter
-     of the controller. 
-
-     The PNOR memory is managed as a pseudo-I2C device so it also requires
-     the memory size specification.  Only "master" chips in the system have
-     PNOR memories attached and non-0 memory address-byte specifications. As
-     a side effect, the PoreVe will only be able to be configured and run
-     on a chip with a PNOR attached. In the case of the PNOR the I2C device
-     and port numbers are not required as they are ignored by the PgP
-     hardware. 
---> 
-<attributes>
-  <!-- *********************************************************************
-       -->
-  <attribute>
-    <id>ATTR_SBE_SEEPROM_I2C_ADDRESS_BYTES</id>
-    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-      The number of address bytes required to address the SEEPROM memory
-      device that contains SBE IPL code.  This will vary by device based on
-      the device capacity, and must be either 1, 2, 3 or 4.
-
-      Provided by the Machine Readable Workbook
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SBE_SEEPROM_I2C_DEVICE_ADDRESS</id>
-    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-      A 2-element array containing the I2C device address of the primary (0)
-      and secondary (1) SEEPROM devices containing SBE IPL code.
-
-      Provided by the Machine Readable Workbook
-    </description>
-    <valueType>uint8</valueType>
-    <array>2</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SBE_SEEPROM_I2C_PORT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-      A 2-element array containing the I2C controller port number of the
-      primary (0) and secondary (1) SEEPROM devices containing SBE IPL code.
-
-      Provided by the Machine Readable Workbook
-    </description>
-    <valueType>uint8</valueType>
-    <array>2</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PNOR_I2C_ADDRESS_BYTES</id>
-    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-      The number of address bytes required to address the PNOR memory device
-      via the pseudo-I2C (LPC, ECCAX) controller.  This will vary by device
-      based on the device capacity, and must be either 0, 1, 2, 3 or 4.
-
-      This attribute will be set to 0 for chips with no PNOR attached
-      (PoreVe will never run on these chips).
-
-      Provided by the Machine Readable Workbook
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/proc_abus_dmi_xbus_scominit_attributes.xml b/src/usr/hwpf/hwp/proc_abus_dmi_xbus_scominit_attributes.xml
deleted file mode 100644
index c526e845a..000000000
--- a/src/usr/hwpf/hwp/proc_abus_dmi_xbus_scominit_attributes.xml
+++ /dev/null
@@ -1,81 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/proc_abus_dmi_xbus_scominit_attributes.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_abus_dmi_xbus_scominit_attributes.xml,v 1.1 2014/02/17 21:50:50 garyp Exp $ -->
-<!-- proc_abus_dmi_xbus_scominit_attributes.xml -->
-<attributes>
-  <attribute>
-    <id>ATTR_MNFG_DMI_MIN_EYE_WIDTH</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>6 bit rx_min_eye_width value for DMI bus interfaces during system manufacturing; used for both centaur and p8
-      creator: platform
-      firmware notes: Attribute value is in the Machine Readable Workbook
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MNFG_DMI_MIN_EYE_HEIGHT</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>8 bit rx_min_eye_height value for DMI bus interfaces during system manufacturing; used for both centaur and p8
-      creator: platform
-      firmware notes: Attribute value is in the Machine Readable Workbook
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MNFG_ABUS_MIN_EYE_WIDTH</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>6 bit rx_min_eye_width value for A bus interfaces during system manufacturing
-      creator: platform
-      firmware notes: Attribute value is in the Machine Readable Workbook
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MNFG_ABUS_MIN_EYE_HEIGHT</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>8 bit rx_min_eye_height value for A bus interfaces during system manufacturing
-      creator: platform
-      firmware notes: Attribute value is in the Machine Readable Workbook
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MNFG_XBUS_MIN_EYE_WIDTH</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>6 bit rx_min_eye_width value for X bus interfaces during system manufacturing
-      creator: platform
-      firmware notes: Attribute value is in the Machine Readable Workbook
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/proc_cfam_registers.xml b/src/usr/hwpf/hwp/proc_cfam_registers.xml
deleted file mode 100644
index be2070d41..000000000
--- a/src/usr/hwpf/hwp/proc_cfam_registers.xml
+++ /dev/null
@@ -1,56 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/proc_cfam_registers.xml $                    -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_cfam_registers.xml,v 1.5 2014/03/17 04:19:46 jmcgill Exp $ -->
-<!-- Definition of cfam registers to collect on some errors -->
-<hwpErrors>
-  <!-- processor cfam registers -->
-  <registerFfdc>
-    <id>REG_FFDC_PROC_CFAM_REGISTERS</id>
-    <cfamRegister>CFAM_FSI_STATUS_0x00001007</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP3_0x00002812</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP4_0x00002813</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP5_0x00002814</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP6_0x00002815</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP7_0x00002816</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP8_0x00002817</cfamRegister>
-    <cfamRegister>CFAM_FSI_WRITE_PROTECT_0x00002818</cfamRegister>
-    <cfamRegister>CFAM_OSCSW_SENSE1_0x00002819</cfamRegister>
-    <cfamRegister>CFAM_OSCSW_SENSE2_0x0000281A</cfamRegister>
-    <cfamRegister>CFAM_FSI_GP3_MIRROR_0x0000281B</cfamRegister>
-    <cfamRegister>CFAM_FSI_SBE_VITAL_0x0000281C</cfamRegister>
-  </registerFfdc>
-  <!-- Just the Status and SBE vital regs -->
-  <registerFfdc>
-    <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
-    <cfamRegister>CFAM_FSI_STATUS_0x00001007</cfamRegister>
-    <cfamRegister>CFAM_FSI_SBE_VITAL_0x0000281C</cfamRegister>
-  </registerFfdc>
-  <!-- processor mailbox registers -->
-  <registerFfdc>
-    <id>REG_FFDC_PROC_MBOX_REGISTERS</id>
-    <cfamRegister>MBOX_SCRATCH_REG0_0x00002838</cfamRegister>
-    <cfamRegister>MBOX_SCRATCH_REG1_0x00002839</cfamRegister>
-    <cfamRegister>MBOX_SCRATCH_REG2_0x0000283A</cfamRegister>
-    <cfamRegister>MBOX_SCRATCH_REG3_0x0000283B</cfamRegister>
-  </registerFfdc>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/proc_chip_ec_feature.xml b/src/usr/hwpf/hwp/proc_chip_ec_feature.xml
deleted file mode 100644
index fb81eebde..000000000
--- a/src/usr/hwpf/hwp/proc_chip_ec_feature.xml
+++ /dev/null
@@ -1,1615 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/proc_chip_ec_feature.xml $                   -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2013,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_chip_ec_feature.xml,v 1.63 2015/11/10 19:38:14 jmcgill Exp $ -->
-<!-- Defines the attributes that are based on EC level -->
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_SET_ABUS_PRBS_TAP_ID</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns true if ABUS TX Per-Lane PRBS Tap Selector should be set.  True if:
-      Venice EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_TA_PB_T1_PRESENT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns if a chip contains PB_T1 trace array.  True if:
-      Venice EC 0x10 or greater
-      Naples EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_TA_A_T1_PRESENT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns if a chip contains A_T1 trace array.  True if:
-      Naples EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_SINGLE_XBUS_PRESENT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns true if a single XBUS is present.  True if: Murano
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_NV_PRESENT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns if a chip contains NV chiplet/link logic.  True if:
-      Naples EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_INIT_GROUP_BARS_AS_CHIP_BARS</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns true if the fabric unit BARs which track group memory ranges
-      should be initialized to track the chip memory range instead of the
-      group memory range.  True if:
-      Naples EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_PCI_NEST_FIR_ACTION2_PRESENT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns if a chip contains PCI Nest FIR Action2 register.  True if:
-      Naples EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_DUAL_CAPP_PRESENT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns if a chip contains two CAPP units.  True if:
-      Naples EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_SET_LEGACY_NODE_ID_VALID_MBOX_BIT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Set legacy node ID valid mailbox indicator bit.  True if:
-      Murano EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_USE_POLLING_PROT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns if a chip should use wiggle-flip polling protocol. True if:
-      Murano EC 0x20 or greater
-      Venice EC 0x20 or greater
-      Naples EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_HW_BUG_PIBSLVRESET</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_BOOT_FREQ_LESS_PSAVE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns whether this is a Murano 1.0 or 1.01 part in which we
-      should allow setting the boot frequency to the power
-      save frequency when it's less then power save freq.
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x10</value>
-          <test>EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_HW_BUG_PLLINIT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <!-- WARNING: need to adjust to support true DD1.0 parts -->
-          <!-- this change ensures we test without workaround on DD1.01 -->
-          <value>0x10</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_SECURE_IOVALID_PRESENT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns if a chip contains secure iovalid controls for the ABUS. Intentionally not applied to Naples True if either:
-        Murano EC 0x20 or greater
-        Venice EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_NOT_SUPPORT_SBE_CFAM_START</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns if a chip does not support SBE cfam start. True if:
-      Murano EC less than 0x20
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_NOT_SUPPORT_SBE_AUTO_START</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns if a chip does not support SBE auto start. True if:
-      Murano EC less than 0x20
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_CAPP_HANG_CONTROL_ON_SCOM</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns if a chip contains SCOM configuration for CAPP unit PB hang recovery controls.  True if:
-        Murano EC 0x20 or greater
-        Venice EC 0x20 or greater
-        Naples EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_CAPP_PROD</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns if a chip contains production CAPP logic function
-        Murano EC 0x20 or greater
-        Venice EC 0x20 or greater
-        Naples EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_NX_HANG_CONTROL_ON_SCOM</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns if a chip contains SCOM configuration for NX unit PB hang recovery controls.  True if:
-        Murano EC 0x20 or greater
-        Venice EC 0x20 or greater
-        Naples EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_HCA_SPLIT_HANG_CONTROL</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Returns if a chip contains separate SCOM configuration for HCA oper/data hang PB hang recovrery controls.  True if:
-        Murano EC 0x20 or greater
-        Venice EC 0x10 or greater
-        Naples EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_RECAL_DFE_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC 0x20 or greater
-        Venice EC 0x10 or greater
-        Naples EC 0x10 or greater
-        Centaur EC 0x20 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_RECAL_DDC_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC 0x20 or greater
-        Venice EC 0x10 or greater
-        Naples EC 0x10 or greater
-        Centaur EC 0x20 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_RECAL_CTLE_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC 0x20 or greater
-        Venice EC 0x10 or greater
-        Naples EC 0x10 or greater
-        Centaur EC 0x20 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_LCTANK_PLL_VCO_BUG</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC less than 0x20
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_XBUS_DLL_SLOW_MURANO</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC less than 0x12
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x12</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_ADU_PBINIT_LAUNCH_BUG</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC less than 0x20
-        Venice EC less than 0x20
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_MCS_ECC_BYPASS_DISABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC less than 0x20
-        Venice EC less than 0x20
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_MCS_MURDD1_FIR_CONTROL</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC less than 0x20
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_MCS_VENDD1_FIR_CONTROL</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Venice EC less than 0x20
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_MCS_P8_DD2_FIR_CONTROL</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC greater or equal to 0x20
-        Venice EC greater or equal to 0x20
-        Naples EC greater or equal to 0x10
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_TRACE_CONTROL_ON_SCOM</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC greater than or equal to 0x20
-        Venice
-        Naples
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_MPIPL_AISS_WINKLE_ENTRY</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC less than 0x20
-        Venice EC less than 0x20
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_FBC_SERIAL_SCOM_WE5_VER2</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Specifies layout of WE5 serial chain
-      True if:
-        Murano EC greater than or equal to 0x20
-        Venice EC greater than or equal to 0x20
-        Naples EC greater than or equal to 0x10
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_FBC_SERIAL_SCOM_C8_VER3</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Specifies layout of C8 serial chain
-      True if:
-        Murano/Venice EC greater than or equal to 0x20
-        Naples greater than or equal to 0x10
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_FBC_SERIAL_SCOM_C8_VER2</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Specifies layout of C8 serial chain
-      True if:
-        Venice EC equal to 0x10
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x10</value>
-          <test>EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_FBC_UX_SCOPE_ARB_RR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC greater than or equal to 0x20
-        Venice EC less than 0x20
-      False otherwise
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_FBC_UX_SCOPE_ARB_LFSR_ON_STARVATION_ELSE_RR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Venice EC greater than or equal to 0x20
-        Naples EC greater than or equal to 0x10
-      False otherwise
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_FBC_UX_LOCAL_ARB_RR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Venice EC greater than or equal to 0x20
-        Naples EC greater than or equal to 0x10
-      False otherwise
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_FBC_SERIAL_SCOM_C10_VER2</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Specifies layout of C10 serial chain
-      True if:
-        Murano/Venice EC greater than or equal to 0x20
-        Naples EC greater than or euqal to 0x10
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_MCD_HANG_RECOVERY_BUG</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Chip contains MCD hang recovery bug (HW252763)
-        Murano EC less than 0x20
-        Venice EC less than 0x20
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_PCBS_ERR_RESET</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC 0x20 or greater
-        Venice EC 0x10 or greater
-        Naples EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_IO_TRAINING_SLS_WORKAROUND</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      For X fabric links only
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x10</value>
-          <test>LESS_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_IO_TRAINING_DLL_WORKAROUND</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Only For X fabric link
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_DCCAL_PLL_WORKAROUND</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x10</value>
-          <test>LESS_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_XBUS_RESONANT_CLK_VALID</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Venice EC 0x10 or greater
-        Naples EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_RESONANT_CLK_VALID</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC 0x20 or greater
-        Venice EC 0x20 or greater
-        Naples EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_AISS_SPECIAL_WAKEUP</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Removes work-around for HW255321
-      True if:
-        Murano EC 0x20 or greater
-        Venice EC 0x20 or greater
-        Naples EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_OCC_CE_FIR_DISABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC less than 0x20
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_ENABLE_IVE_PERFORMANCE_ORDERING</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC greater than or equal to 0x20
-        Venice
-        Naples
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_ENABLE_PCI_DMAR_OOO</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC greater than or equal to 0x20
-        Venice
-        Naples
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_ZCAL_OVERRIDE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC less than 0x20
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_IVRM_WINKLE_BUG</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      True if:
-        Murano EC greater than 0x20
-        Venice EC greater than or equal to 0x20
-        Naples greater than or equal to 0x10
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_EC_MSS_RECONFIG_POSSIBLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Reset some DMI channels when re-ipl
-      Consumed by proc_enable_reconfig
-      True if:
-      Murano EC greater than or equal to 0x20
-      Venice EC greater than or equal to 0x20
-      Naples EC greater than or equal to 0x10
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CEN_EC_THROTTLE_SYNC_POSSIBLE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_CENTAUR</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_EC_CORE_HANG_PULSE_BUG</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-    True if chip has the core hang pulse bug (HW235625)
-        Murano EC less than 0x20
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_EC_PBA_PREFETCH_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-    True if chip can support PBA prefetch as HW258436 is fixed
-        Murano EC greater than or equal to 0x21
-        Venice EC greater than or equal to 0x20
-        Naples EC greater than or equal to 0x10
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x21</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_EC_OHA_L3_PURGE_ABORT_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-    True if chip can support the enablement of L3 purge aborts during Winkle as HW276505 is fixed
-        Not fixed on any Murano EC
-        Venice EC 0x20 or greater
-        Naples EC 0x10 or greater
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_PFET_POWEROFF_BUG</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-    True if chip has the PFET power off bug (HW250017)
-        Murano EC less than 0x20
-        Venice EC less than 0x20
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_OCC_DISABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Greg Still and lab team decided to disable the
-        OCC on all Murano DD1.x parts
-      Returns if the OCC should be disabled. True if:
-        Murano EC less than 0x20
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_HW_BUG_PBASLVRESET</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-    True if chip has the PBA Slave reset bug (HW228485)
-        Murano EC less than 0x20
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_HCA_BAR_SCOM_BUG</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-        True if chip has HCA BAR SCOM bug
-        Causes HCA BAR range data read via SCOM to be shifted relative to HW state
-        Venice EC greater than or equal to 0x20
-        Naples EC greater than or equal to 0x10
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_VENICE</name>
-        <ec>
-          <value>0x20</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-      <chip>
-        <name>ENUM_ATTR_NAME_NAPLES</name>
-        <ec>
-          <value>0x10</value>
-          <test>GREATER_THAN_OR_EQUAL</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_HW_BUG_TOD_ERROR_MASK_NOT_WRITABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-        HW223230/HW216879 - TOD_ERROR_MASK_STATUS_REG_00040032 is not writable in Murano DD1.x
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_MURANO</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/proc_clock_control_registers.xml b/src/usr/hwpf/hwp/proc_clock_control_registers.xml
deleted file mode 100644
index 7f93a5e7b..000000000
--- a/src/usr/hwpf/hwp/proc_clock_control_registers.xml
+++ /dev/null
@@ -1,93 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/proc_clock_control_registers.xml $           -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2014                   -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_clock_control_registers.xml,v 1.1 2013/04/25 19:17:30 jeshua Exp $ -->
-<!-- Definition of Clock control registers to collect on some errors -->
-<hwpErrors>
-  <!-- TP chiplet -->
-  <registerFfdc>
-    <id>REG_FFDC_PROC_TP_CLOCK_CONTROLLER</id>
-    <scomRegister>TP_OPCG_CNTL0_0x01030002</scomRegister>
-    <scomRegister>TP_OPCG_CNTL1_0x01030003</scomRegister>
-    <scomRegister>TP_OPCG_CNTL2_0x01030004</scomRegister>
-    <scomRegister>TP_OPCG_CNTL3_0x01030005</scomRegister>
-    <scomRegister>TP_CLK_REGION_0x01030006</scomRegister>
-    <scomRegister>TP_CLK_SCANSEL_0x01030007</scomRegister>
-    <scomRegister>TP_CLK_STATUS_0x01030008</scomRegister>
-  </registerFfdc>
-  <!-- Nest chiplet -->
-  <registerFfdc>
-    <id>REG_FFDC_PROC_NEST_CLOCK_CONTROLLER</id>
-    <scomRegister>NEST_OPCG_CNTL0_0x02030002</scomRegister>
-    <scomRegister>NEST_OPCG_CNTL1_0x02030003</scomRegister>
-    <scomRegister>NEST_OPCG_CNTL2_0x02030004</scomRegister>
-    <scomRegister>NEST_OPCG_CNTL3_0x02030005</scomRegister>
-    <scomRegister>NEST_CLK_REGION_0x02030006</scomRegister>
-    <scomRegister>NEST_CLK_SCANSEL_0x02030007</scomRegister>
-    <scomRegister>NEST_CLK_STATUS_0x02030008</scomRegister>
-  </registerFfdc>
-  <!-- X Bus chiplet -->
-  <registerFfdc>
-    <id>REG_FFDC_PROC_XBUS_CLOCK_CONTROLLER</id>
-    <scomRegister>X_OPCG_CNTL0_0x04030002</scomRegister>
-    <scomRegister>X_OPCG_CNTL1_0x04030003</scomRegister>
-    <scomRegister>X_OPCG_CNTL2_0x04030004</scomRegister>
-    <scomRegister>X_OPCG_CNTL3_0x04030005</scomRegister>
-    <scomRegister>X_CLK_REGION_0x04030006</scomRegister>
-    <scomRegister>X_CLK_SCANSEL_0x04030007</scomRegister>
-    <scomRegister>X_CLK_STATUS_0x04030008</scomRegister>
-  </registerFfdc>
-  <!-- A Bus chiplet -->
-  <registerFfdc>
-    <id>REG_FFDC_PROC_ABUS_CLOCK_CONTROLLER</id>
-    <scomRegister>A_OPCG_CNTL0_0x08030002</scomRegister>
-    <scomRegister>A_OPCG_CNTL1_0x08030003</scomRegister>
-    <scomRegister>A_OPCG_CNTL2_0x08030004</scomRegister>
-    <scomRegister>A_OPCG_CNTL3_0x08030005</scomRegister>
-    <scomRegister>A_CLK_REGION_0x08030006</scomRegister>
-    <scomRegister>A_CLK_SCANSEL_0x08030007</scomRegister>
-    <scomRegister>A_CLK_STATUS_0x08030008</scomRegister>
-  </registerFfdc>
-  <!-- PCIE chiplet -->
-  <registerFfdc>
-    <id>REG_FFDC_PROC_PCIE_CLOCK_CONTROLLER</id>
-    <scomRegister>PCIE_OPCG_CNTL0_0x09030002</scomRegister>
-    <scomRegister>PCIE_OPCG_CNTL1_0x09030003</scomRegister>
-    <scomRegister>PCIE_OPCG_CNTL2_0x09030004</scomRegister>
-    <scomRegister>PCIE_OPCG_CNTL3_0x09030005</scomRegister>
-    <scomRegister>PCIE_CLK_REGION_0x09030006</scomRegister>
-    <scomRegister>PCIE_CLK_SCANSEL_0x09030007</scomRegister>
-    <scomRegister>PCIE_CLK_STATUS_0x09030008</scomRegister>
-  </registerFfdc>
-  <!-- EX chiplet -->
-  <registerFfdc>
-    <id>REG_FFDC_PROC_EX_CLOCK_CONTROLLER</id>
-    <scomRegister>EX_SYNC_CONFIG_0x10030000</scomRegister>
-    <scomRegister>EX_OPCG_CNTL0_0x10030002</scomRegister>
-    <scomRegister>EX_OPCG_CNTL1_0x10030003</scomRegister>
-    <scomRegister>EX_OPCG_CNTL2_0x10030004</scomRegister>
-    <scomRegister>EX_OPCG_CNTL3_0x10030005</scomRegister>
-    <scomRegister>EX_CLK_REGION_0x10030006</scomRegister>
-    <scomRegister>EX_CLK_SCANSEL_0x10030007</scomRegister>
-    <scomRegister>EX_CLK_STATUS_0x10030008</scomRegister>
-  </registerFfdc>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/proc_fab_iovalid_errors.xml b/src/usr/hwpf/hwp/proc_fab_iovalid_errors.xml
deleted file mode 100644
index cb03524e4..000000000
--- a/src/usr/hwpf/hwp/proc_fab_iovalid_errors.xml
+++ /dev/null
@@ -1,45 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/proc_fab_iovalid_errors.xml $                -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_fab_iovalid_errors.xml,v 1.7 2013/10/28 03:58:28 jmcgill Exp $ -->
-<!-- Error definitions for proc_fab_iovalid procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_FAB_IOVALID_X_PARTIAL_GOOD_ERR</rc>
-    <ffdc>TARGET</ffdc>
-    <description>X bus partial good attribute state does not allow for action on target.</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <hwpError>
-    <rc>RC_PROC_FAB_IOVALID_A_PARTIAL_GOOD_ERR</rc>
-    <ffdc>TARGET</ffdc>
-    <description>A bus partial good attribute state does not allow for action on target.</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/proc_hwreconfig/proc_enable_reconfig/proc_enable_reconfig_errors.xml b/src/usr/hwpf/hwp/proc_hwreconfig/proc_enable_reconfig/proc_enable_reconfig_errors.xml
deleted file mode 100644
index c19490a78..000000000
--- a/src/usr/hwpf/hwp/proc_hwreconfig/proc_enable_reconfig/proc_enable_reconfig_errors.xml
+++ /dev/null
@@ -1,56 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/proc_hwreconfig/proc_enable_reconfig/proc_enable_reconfig_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_enable_reconfig_errors.xml,v 1.6 2014/06/20 21:01:32 dcrowell Exp $ -->
-<!-- Error definitions for proc_enable_reconfig procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>PROC_ENABLE_RECONFIG_CLEANUP_INVALID_MCS_RC</rc>
-    <description>io_cleanup invoked with invalid mcs target</description>
-    <ffdc>MASTER_TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_ENABLE_RECONFIG_CLEANUP_UNSUPPORTED</rc>
-    <description>Processor Hardware does not support reconfiguration loops.  For Venice and Murano, DD2.0 and greater hardware support this function</description>
-    <callout>
-      <target>PROC</target>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>PROC_ENABLE_RECONFIG_CLEANUP_POST_RESET_MCS_UNIT_ID_FAIL</rc>
-    <description>io cleanup was unable to determine the correct mcs unit id to set the bus id. </description>
-    <ffdc>TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/proc_otprom_registers.xml b/src/usr/hwpf/hwp/proc_otprom_registers.xml
deleted file mode 100644
index 3aa31ac12..000000000
--- a/src/usr/hwpf/hwp/proc_otprom_registers.xml
+++ /dev/null
@@ -1,43 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/proc_otprom_registers.xml $                  -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_otprom_registers.xml,v 1.1 2013/04/25 19:18:15 jeshua Exp $ -->
-<!-- Definition of OTPROM registers to collect on some errors -->
-<hwpErrors>
-  <!-- First few instructions in OTPROM -->
-  <registerFfdc>
-    <id>REG_FFDC_PROC_FIRST_OTPROM_INSTRUCTIONS</id>
-    <scomRegister>OTPC_M_MODE_REGISTER_0x00010008</scomRegister>
-    <scomRegister>ECID_PART_12_0x0001800C</scomRegister>
-    <scomRegister>ECID_PART_13_0x0001800D</scomRegister>
-    <scomRegister>ECID_PART_14_0x0001800E</scomRegister>
-    <scomRegister>ECID_PART_15_0x0001800F</scomRegister>
-    <scomRegister>ECID_PART_16_0x00018010</scomRegister>
-    <scomRegister>ECID_PART_17_0x00018011</scomRegister>
-    <scomRegister>ECID_PART_18_0x00018012</scomRegister>
-    <scomRegister>ECID_PART_19_0x00018013</scomRegister>
-    <scomRegister>ECID_PART_20_0x00018014</scomRegister>
-    <scomRegister>ECID_PART_21_0x00018015</scomRegister>
-    <scomRegister>ECID_PART_22_0x00018016</scomRegister>
-    <scomRegister>ECID_PART_23_0x00018017</scomRegister>
-  </registerFfdc>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/proc_pba_utils_registers.xml b/src/usr/hwpf/hwp/proc_pba_utils_registers.xml
deleted file mode 100644
index 102b7f0ff..000000000
--- a/src/usr/hwpf/hwp/proc_pba_utils_registers.xml
+++ /dev/null
@@ -1,54 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/proc_pba_utils_registers.xml $               -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2014                             -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_pba_utils_registers.xml,v 1.2 2014/07/23 19:51:49 jmcgill Exp $ -->
-<!-- Definition of registers to collect on selected PBA errors -->
-<hwpErrors>
-  <registerFfdc>
-    <id>REG_FFDC_PROC_PBA_UTILS_REGISTERS</id>
-    <scomRegister>OTPC_M_SECURITY_SWITCH_0x00010005</scomRegister>
-    <scomRegister>PBA_MODE_0x00064000</scomRegister>
-    <scomRegister>PBA_SLVRST_0x00064001</scomRegister>
-    <scomRegister>PBA_SLVCTL3_0x00064007</scomRegister>
-    <scomRegister>OCB3_ADDRESS_0x0006B070</scomRegister>
-    <scomRegister>OCB3_STATUS_CONTROL_0x0006B071</scomRegister>
-    <scomRegister>OCB3_ERROR_STATUS_0x0006B074</scomRegister>
-    <scomRegister>PBA_BAR3_0x02013F03</scomRegister>
-    <scomRegister>PBA_BARMSK3_0x02013F07</scomRegister>
-    <scomRegister>PBA_RBUFVAL2_0x02010852</scomRegister>
-    <scomRegister>PBA_RBUFVAL3_0x02010853</scomRegister>
-    <scomRegister>PBA_WBUFVAL0_0x02010858</scomRegister>
-    <scomRegister>PBA_WBUFVAL1_0x02010859</scomRegister>
-    <scomRegister>PBA_FIR_0x02010840</scomRegister>
-    <scomRegister>PBA_FIR_MASK_0x02010843</scomRegister>
-    <scomRegister>PBA_FIR_ACTION0_0x02010846</scomRegister>
-    <scomRegister>PBA_FIR_ACTION1_0x02010847</scomRegister>
-    <scomRegister>PBA_CONFIG_0x0201084B</scomRegister>
-    <scomRegister>PBA_ERR_RPT0_0x0201084C</scomRegister>
-    <scomRegister>PBA_ERR_RPT1_0x0201084D</scomRegister>
-    <scomRegister>PBA_ERR_RPT2_0x0201084E</scomRegister>
-    <scomRegister>PB_MODE_CENT_0x02010C4A</scomRegister>
-    <scomRegister>ADU_PMISC_MODE_0x0202000B</scomRegister>
-  </registerFfdc>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/proc_pibmem_registers.xml b/src/usr/hwpf/hwp/proc_pibmem_registers.xml
deleted file mode 100644
index b6f8ede7e..000000000
--- a/src/usr/hwpf/hwp/proc_pibmem_registers.xml
+++ /dev/null
@@ -1,30 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/proc_pibmem_registers.xml $                  -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2014                   -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_pibmem_registers.xml,v 1.1 2013/04/25 19:54:23 jeshua Exp $ -->
-<!-- Definition of PIBMEM registers to collect on some errors -->
-<hwpErrors>
-  <registerFfdc>
-    <id>REG_FFDC_PROC_PIBMEM_REGISTERS</id>
-    <scomRegister>PIBMEM_STATUS_0x00088005</scomRegister>
-  </registerFfdc>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/proc_sbe_registers.xml b/src/usr/hwpf/hwp/proc_sbe_registers.xml
deleted file mode 100644
index 13f20d856..000000000
--- a/src/usr/hwpf/hwp/proc_sbe_registers.xml
+++ /dev/null
@@ -1,55 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/proc_sbe_registers.xml $                     -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_sbe_registers.xml,v 1.3 2013/04/25 19:55:25 jeshua Exp $ -->
-<!-- Definition of SBE registers to collect on some errors -->
-<hwpErrors>
-  <registerFfdc>
-    <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-    <scomRegister>PORE_SBE_STATUS_0x000E0000</scomRegister>
-    <scomRegister>PORE_SBE_CONTROL_0x000E0001</scomRegister>
-    <scomRegister>PORE_SBE_RESET_0x000E0002</scomRegister>
-    <scomRegister>PORE_SBE_ERROR_MASK_0x000E0003</scomRegister>
-    <scomRegister>PORE_SBE_PRV_BASE_ADDRESS0_0x000E0004</scomRegister>
-    <scomRegister>PORE_SBE_PRV_BASE_ADDRESS1_0x000E0005</scomRegister>
-    <scomRegister>PORE_SBE_OCI_BASE_ADDRESS0_0x000E0006</scomRegister>
-    <scomRegister>PORE_SBE_OCI_BASE_ADDRESS1_0x000E0007</scomRegister>
-    <scomRegister>PORE_SBE_TABLE_BASE_ADDR_0x000E0008</scomRegister>
-    <scomRegister>PORE_SBE_EXE_TRIGGER_0x000E0009</scomRegister>
-    <scomRegister>PORE_SBE_SCRATCH0_0x000E000A</scomRegister>
-    <scomRegister>PORE_SBE_SCRATCH1_0x000E000B</scomRegister>
-    <scomRegister>PORE_SBE_SCRATCH2_0x000E000C</scomRegister>
-    <scomRegister>PORE_SBE_IBUF_01_0x000E000D</scomRegister>
-    <scomRegister>PORE_SBE_IBUF_2_0x000E000E</scomRegister>
-    <scomRegister>PORE_SBE_DBG0_0x000E000F</scomRegister>
-    <scomRegister>PORE_SBE_DBG1_0x000E0010</scomRegister>
-    <scomRegister>PORE_SBE_PC_STACK0_0x000E0011</scomRegister>
-    <scomRegister>PORE_SBE_PC_STACK1_0x000E0012</scomRegister>
-    <scomRegister>PORE_SBE_PC_STACK2_0x000E0013</scomRegister>
-    <scomRegister>PORE_SBE_ID_FLAGS_0x000E0014</scomRegister>
-    <scomRegister>PORE_SBE_DATA0_0x000E0015</scomRegister>
-    <scomRegister>PORE_SBE_MEMORY_RELOC_0x000E0016</scomRegister>
-    <scomRegister>PORE_SBE_I2C_E0_PARAM_0x000E0017</scomRegister>
-    <scomRegister>PORE_SBE_I2C_E1_PARAM_0x000E0018</scomRegister>
-    <scomRegister>PORE_SBE_I2C_E2_PARAM_0x000E0019</scomRegister>
-  </registerFfdc>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/proc_winkle_scan_override_attributes.xml b/src/usr/hwpf/hwp/proc_winkle_scan_override_attributes.xml
deleted file mode 100644
index 2448d721c..000000000
--- a/src/usr/hwpf/hwp/proc_winkle_scan_override_attributes.xml
+++ /dev/null
@@ -1,69 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/proc_winkle_scan_override_attributes.xml $   -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_winkle_scan_override_attributes.xml,v 1.9 2013/05/07 23:06:46 wenning Exp $ -->
-<!-- proc_winkle_scan_override_attributes.xml -->
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_EX_FUNC_L3_DELTA_DATA</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Delta/flip data for ex_func_l3 ring containing winkle customization settings for PBIEX programming.
-                 Relies on PBIEX settings in reference image containing scan flush default values.
-                 High-order 16 bits provide byte address offset for ring modification.
-                 Low-order 8 bits provide override data for addressed byte.
-                 Entries will be processed from index 0 to 63 (byte address of 0xFFFFFF should be used to signify last entry to process).
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <array>64</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_EX_FUNC_L3_LENGTH</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Length of ex_func_l3 ring in bits
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PBIEX_ASYNC_SEL</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Selector for ATTR_PROC_EX_FUNC_L3_DELTA_DATA value to be returned by platform.
-      creator: proc_build_smp
-      firmware notes:
-    </description>
-    <valueType>uint8</valueType>
-    <enum>SEL0 = 0x0, SEL1 = 0x1, SEL2 = 0x2</enum>
-    <persistRuntime/>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/pstate_attributes.xml b/src/usr/hwpf/hwp/pstate_attributes.xml
deleted file mode 100644
index 1eb012cd9..000000000
--- a/src/usr/hwpf/hwp/pstate_attributes.xml
+++ /dev/null
@@ -1,332 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/pstate_attributes.xml $                      -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2014                             -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<attributes>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_NOM_FREQ_MHZ</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword Nominal Frequency in MHZ
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_V_NEST_NOM_VOLTAGE</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword V-nest nominal voltage
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_I_NEST_NOM_CURRENT</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword I-nest nominal current
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_V_CS_NOM_VOLTAGE</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword V-cs nominal voltage
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_I_CS_NOM_CURRENT</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword I-cs nominal current
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_PS_FREQ_MHZ</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword PowerSave Frequency in MHZ
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_V_NEST_PS_VOLTAGE</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword V-nest PowerSave voltage
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_I_NEST_PS_CURRENT</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword I-nest PowerSave current
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_V_CS_PS_VOLTAGE</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword V-cs PowerSave voltage
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_I_CS_PS_CURRENT</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword I-cs PowerSave current
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_TURBO_FREQ_MHZ</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword turbo Frequency in MHZ
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_V_NEST_TURBO_VOLTAGE</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword V-nest turbo voltage
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_I_NEST_TURBO_CURRENT</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword I-nest turbo current
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_V_CS_TURBO_VOLTAGE</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword V-cs turbo voltage
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_I_CS_TURBO_CURRENT</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword I-cs turbo current
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_FVMIN_FREQ_MHZ</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword fvmin Frequency in MHZ
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_V_NEST_FVMIN_VOLTAGE</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword V-nest fvmin voltage
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_I_NEST_FVMIN_CURRENT</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword I-nest fvmin current
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_V_CS_FVMIN_VOLTAGE</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword V-cs fvmin voltage
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_I_CS_FVMIN_CURRENT</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword I-cs fvmin current
-consumer: p8_build_pstate_datablock, others
-firmware notes: none</description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_LAB_FREQ_MHZ</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword lab Frequency in MHZ
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_V_NEST_LAB_VOLTAGE</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword V-nest lab voltage
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_I_NEST_LAB_CURRENT</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword I-nest lab current
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_V_CS_LAB_VOLTAGE</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword V-cs lab voltage
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_OVERRIDE_MVPD_I_CS_LAB_CURRENT</id>
-    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
-    <description>Module VPD #V keyword I-cs lab current
-consumer: p8_build_pstate_datablock, others
-firmware notes: Used for over writing attributes in lab/debug
-    </description>
-    <valueType>uint32</valueType>
-    <readable/>
-    <writeable/>
-</attribute>
-</attributes>
-
diff --git a/src/usr/hwpf/hwp/pstates/makefile b/src/usr/hwpf/hwp/pstates/makefile
deleted file mode 100644
index ef68862cf..000000000
--- a/src/usr/hwpf/hwp/pstates/makefile
+++ /dev/null
@@ -1,37 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/hwp/pstates/makefile $
-#
-# OpenPOWER HostBoot Project
-#
-# Contributors Listed Below - COPYRIGHT 2013,2015
-# [+] Google Inc.
-# [+] International Business Machines Corp.
-#
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-ROOTPATH = ../../../../..
-
-MODULE = pstates
-
-SUBDIRS += runtime.d
-
-# objects common to hostboot and hbrt
-include pstates_common.mk
-
-# objects unique to hostboot
-
-include ${ROOTPATH}/config.mk
diff --git a/src/usr/hwpf/hwp/pstates/pstates/freqVoltageSvc.C b/src/usr/hwpf/hwp/pstates/pstates/freqVoltageSvc.C
deleted file mode 100644
index f3fcaa94b..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/freqVoltageSvc.C
+++ /dev/null
@@ -1,650 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/freqVoltageSvc.C $           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2014,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/**
- *  @file freqVoltageSvc.C
- *
- *  @brief Contains freqVoltage class definition
- *
- *  This file contains implementation of frequency voltage service class. This
- *  class is used for reading/parsing/writing frequency and voltage related
- *  data.
- *
- */
-
-#include <stdio.h>
-
-#include <freqVoltageSvc.H>
-
-#include <devicefw/userif.H>
-#include <errl/errlentry.H>
-#include <errl/errlmanager.H>
-#include <fapiPlatHwpInvoker.H>
-#include <hwpf/fapi/fapiMvpdAccess.H>
-#include <isteps/hwpf_reasoncodes.H>
-#include <p8_build_pstate_datablock.H>
-#include <proc_get_voltage.H>
-#include <pstates.h>
-#include <targeting/common/commontargeting.H>
-#include <targeting/common/utilFilter.H>
-#include <vpd/mvpdenums.H>
-#include <initserviceif.H>
-
-extern trace_desc_t* g_fapiTd;
-
-using namespace TARGETING;
-
-namespace FREQVOLTSVC
-{
-    //**************************************************************************
-    // FREQVOLTSVC::setWofFrequencyUpliftSelected
-    //**************************************************************************
-    void setWofFrequencyUpliftSelected()
-    {
-
-        // get mrw data
-        TARGETING::Target* l_pTopLevel = NULL;
-        (void)TARGETING::targetService().getTopLevelTarget(l_pTopLevel);
-        ATTR_WOF_FREQUENCY_UPLIFT_type l_upliftTable = {{{0}}};
-        ATTR_WOF_PROC_SORT_type l_procSortTable = {{0}};
-        ATTR_NOMINAL_FREQ_MHZ_type l_sysNomFreqMhz =
-            l_pTopLevel->getAttr<ATTR_NOMINAL_FREQ_MHZ>();
-        ATTR_WOF_ENABLED_type l_wofEnabled = l_pTopLevel->getAttr
-                                           < TARGETING::ATTR_WOF_ENABLED > ();
-
-        // tryGetAttr used due to complex data type. Expected to always work.
-        if (!l_pTopLevel->tryGetAttr<ATTR_WOF_FREQUENCY_UPLIFT>(l_upliftTable))
-        {
-            // The zero initialized values will be used for the select array
-            TRACFCOMP(g_fapiTd, "Failed to get ATTR_WOF_FREQUENCY_UPLIFT");
-        }
-        // tryGetAttr used due to complex data type. Expected to always work.
-        if ( !l_pTopLevel->tryGetAttr<ATTR_WOF_PROC_SORT>(l_procSortTable))
-        {
-            // Not finding the sort table will result in not finding the index
-            // which will result in a log later
-            TRACFCOMP(g_fapiTd, "Failed to get ATTR_WOF_PROC_SORT");
-        }
-
-        // get the list of procs
-        TargetHandleList l_procTargetList;
-        getAllChips(l_procTargetList, TYPE_PROC, true);
-
-        // for each proc, fill in Wof Frequency Uplift Selected attribute
-        for (TargetHandleList::const_iterator
-                l_proc_iter = l_procTargetList.begin();
-                l_proc_iter != l_procTargetList.end();
-                ++l_proc_iter)
-        {
-            TARGETING::Target * l_pProcTarget = *l_proc_iter;
-
-            // find number of active cores
-            TARGETING::TargetHandleList l_presCoreList;
-            getChildAffinityTargetsByState( l_presCoreList,
-                      const_cast<TARGETING::Target*>(l_pProcTarget),
-                      TARGETING::CLASS_UNIT,
-                      TARGETING::TYPE_CORE,
-                      TARGETING::UTIL_FILTER_PRESENT);
-            uint8_t l_activeCores = l_presCoreList.size();
-            TRACDCOMP(g_fapiTd, "setWofFrequencyUpliftSelected:"
-                            " number of active cores  is %d ",
-                            l_activeCores);
-
-            // find WOF index. For example:
-            // ATTR_WOF_PROC_SORT =
-            // Cores/Nom Freq/Index
-            //   8    3325     1
-            //   10   2926     2
-            //   12   2561     3
-            //   12   3093     4
-            // Use WOF index=3 for active cores=12 && nom freq=2561
-            uint8_t l_wofIndex = 0;
-            for (uint8_t i=0;i<4;i++)
-            {
-                if ( (l_activeCores   == l_procSortTable[i][0]) &&
-                     (l_sysNomFreqMhz == l_procSortTable[i][1]) )
-                {
-                   l_wofIndex = l_procSortTable[i][2];
-                   break;
-                }
-            }
-            TRACDCOMP(g_fapiTd, "setWofFrequencyUpliftSelected:"
-                            " WOF index is %d ",
-                            l_wofIndex);
-            // validate WOF index
-            ATTR_WOF_FREQUENCY_UPLIFT_SELECTED_type l_selectedTable = {{0}};
-            if ( (!l_wofIndex) || (l_wofIndex > 4))
-            {
-                if (l_wofEnabled) // log error if WOF enabled
-                {
-                    TRACFCOMP(g_fapiTd, "setWofFrequencyUpliftSelected:"
-                        " No WOF table index match found HUID:0x%08X"
-                        " active cores=%d, nom freq=%d, index=%d",
-                        l_pProcTarget->getAttr<TARGETING::ATTR_HUID>(),
-                        l_activeCores,
-                        l_sysNomFreqMhz,
-                        l_wofIndex);
-
-                    errlHndl_t l_err = NULL;
-                    /*@
-                     * @errortype
-                     * @moduleid         fapi::MOD_GET_WOF_FREQ_UPLIFT_SELECTED
-                     * @reasoncode       fapi::RC_INVALID_WOF_INDEX
-                     * @userdata1[0:31]  Proc HUID
-                     * @userdata1[32:63] WOF Freq Uplift Index
-                     * @userdata2[0:31]  Number of active cores
-                     * @userdata2[32:63] Nomimal Frequency
-                     * @devdesc          When WOF is enabled, the WOF Freq
-                     *                   Uplift index should be 1,2,3, or 4
-                     */
-                    l_err =
-                        new  ERRORLOG::ErrlEntry(
-                             ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                             fapi::MOD_GET_WOF_FREQ_UPLIFT_SELECTED,
-                             fapi::RC_INVALID_WOF_INDEX,
-                             TWO_UINT32_TO_UINT64(
-                                 l_pProcTarget->getAttr<TARGETING::ATTR_HUID>(),
-                                 l_wofIndex),
-                             TWO_UINT32_TO_UINT64(
-                                 l_activeCores,
-                                 l_sysNomFreqMhz));
-
-                    // Callout HW as WOF mrw data is incorrect
-                    l_err->addHwCallout(l_pProcTarget, HWAS::SRCI_PRIORITY_MED,
-                                         HWAS::NO_DECONFIG, HWAS::GARD_NULL);
-
-                    // Include WOF processor sort table
-                    TRACFBIN (g_fapiTd,
-                              "WOF processor sort table",
-                              l_procSortTable,
-                              sizeof(l_procSortTable));
-                    l_err->collectTrace(FAPI_TRACE_NAME);
-
-                    // log error and keep going
-                    errlCommit(l_err,HWPF_COMP_ID);
-                }
-                // make sure zeros are set in the selected table attribute
-                memset(l_selectedTable,
-                       0,
-                       sizeof(l_selectedTable));
-            }
-            else
-            {
-                // use index to set Wof Frequency Uplift selected attribute
-                // note: mrw index is 1 based
-                memcpy(l_selectedTable,
-                       &l_upliftTable[l_wofIndex-1][0][0],
-                       sizeof(l_selectedTable));
-            }
-            if (!l_pProcTarget->trySetAttr<ATTR_WOF_FREQUENCY_UPLIFT_SELECTED>
-                                             (l_selectedTable))
-            {
-                //unlikely, crash
-                TRACFCOMP(g_fapiTd,
-                            "Failed to set ATTR_WOF_FREQUENCY_UPLIFT_SELECTED");
-                assert(0);
-            }
-        }
-        return;
-    }
-
-    //**************************************************************************
-    // FREQVOLTSVC::setSysFreq
-    //**************************************************************************
-    errlHndl_t setSysFreq()
-    {
-        errlHndl_t l_err = NULL;
-        uint32_t l_sysHighestPowerSaveFreq = 0x0;
-        TARGETING::ATTR_NOMINAL_FREQ_MHZ_type l_sysNomFreq = 0x0;
-        TARGETING::ATTR_FREQ_CORE_MAX_type l_sysLowestTurboFreq = 0x0;
-        TARGETING::ATTR_ULTRA_TURBO_FREQ_MHZ_type
-                                           l_sysLowestUltraTurboFreq = 0x0;
-
-        // Get system frequency
-        l_err = getSysFreq(l_sysHighestPowerSaveFreq,
-                           l_sysNomFreq,
-                           l_sysLowestTurboFreq,
-                           l_sysLowestUltraTurboFreq);
-        if (l_err != NULL)
-        {
-            TRACFCOMP( g_fapiTd,ERR_MRK"Error getting system frequency");
-        }
-        else
-        {
-            // Successfully got system frequency. Now update
-            // system attributes.
-
-            //Get the top level (system) target  handle
-            TARGETING::Target* l_pTopLevel = NULL;
-            (void)TARGETING::targetService().getTopLevelTarget(l_pTopLevel);
-
-            // Assert on failure getting system target
-            assert( l_pTopLevel != NULL );
-
-            // Top level target successfully retrieved.
-            // Set nominal frequency attribute
-            (void)l_pTopLevel->setAttr
-                           < TARGETING::ATTR_NOMINAL_FREQ_MHZ > (l_sysNomFreq);
-
-            // Set max turbo frequency attribute
-            (void)l_pTopLevel->setAttr
-                       < TARGETING::ATTR_FREQ_CORE_MAX > (l_sysLowestTurboFreq);
-
-            // Set min freq attribute based on power save
-            (void)l_pTopLevel->setAttr<TARGETING::ATTR_MIN_FREQ_MHZ>
-                                                    (l_sysHighestPowerSaveFreq);
-
-            // Set min ultra turbo freq attribute
-            (void)l_pTopLevel->setAttr<TARGETING::ATTR_ULTRA_TURBO_FREQ_MHZ>
-                                                    (l_sysLowestUltraTurboFreq);
-
-            verifyBootFreq(l_pTopLevel);
-        }
-
-        // set up the WOF Frequency Uplift Selected attribute
-        setWofFrequencyUpliftSelected();
-
-        return l_err;
-    }
-
-    //**************************************************************************
-    // FREQVOLTSVC::verifyBootFreq
-    //**************************************************************************
-    void verifyBootFreq(TARGETING::Target* const i_pTarget)
-    {
-        TARGETING::ATTR_MIN_FREQ_MHZ_type l_sysMinFreq =
-                   i_pTarget->getAttr<TARGETING::ATTR_MIN_FREQ_MHZ>();
-        TARGETING::ATTR_BOOT_FREQ_MHZ_type l_boot_freq_mhz =
-                   i_pTarget->getAttr<TARGETING::ATTR_BOOT_FREQ_MHZ>();
-
-        l_boot_freq_mhz = (l_sysMinFreq > l_boot_freq_mhz) ? l_sysMinFreq:
-                                                             l_boot_freq_mhz;
-
-        i_pTarget->setAttr<TARGETING::ATTR_BOOT_FREQ_MHZ>(l_boot_freq_mhz);
-    }
-
-    //**************************************************************************
-    // FREQVOLTSVC::getSysFreq
-    //**************************************************************************
-    errlHndl_t getSysFreq(
-          uint32_t & o_sysVPDPowerSaveMinFreqMhz,
-          TARGETING::ATTR_NOMINAL_FREQ_MHZ_type & o_sysNomFreqMhz,
-          TARGETING::ATTR_FREQ_CORE_MAX_type & o_sysVPDTurboMaxFreqMhz,
-          TARGETING::ATTR_ULTRA_TURBO_FREQ_MHZ_type &
-                                                   o_sysVPDUltraTurboMinFreqMhz)
-    {
-        uint32_t   l_minsysVPDTurboMaxFreqMhz = 0;
-        uint32_t   l_maxsysVPDPowerSaveMinFreqMhz = 0;
-        uint32_t   l_minsysVPDUltraTurboFreqMhz = 0;
-        fapi::ReturnCode l_rc;
-        errlHndl_t l_err = NULL;
-
-        do
-        {
-            o_sysNomFreqMhz = 0;
-            o_sysVPDTurboMaxFreqMhz = 0;
-            o_sysVPDPowerSaveMinFreqMhz = 0;
-            o_sysVPDUltraTurboMinFreqMhz = 0;
-
-            //Get the top level (system) target  handle
-            TARGETING::Target* l_pTopLevel = NULL;
-            (void)TARGETING::targetService().getTopLevelTarget(l_pTopLevel);
-
-            // Assert on failure getting system target
-            assert( l_pTopLevel != NULL );
-
-            // Retrun Fvmin as ultra turbo freq if WOF enabled.
-            ATTR_WOF_ENABLED_type l_wofEnabled = l_pTopLevel->getAttr
-                                           < TARGETING::ATTR_WOF_ENABLED > ();
-            TRACFCOMP(g_fapiTd,"getSysFreq: WOF_ENABLED is %d ",l_wofEnabled);
-
-            //Filter functional unit
-            TARGETING::PredicateIsFunctional l_isFunctional;
-
-            // Filter core unit
-            TARGETING::PredicateCTM l_coreUnitFilter(TARGETING::CLASS_UNIT,
-                                                     TARGETING::TYPE_CORE);
-
-            //Filter functional cores
-            TARGETING::PredicatePostfixExpr l_funcCoreUnitFilter;
-
-            // core units AND functional
-            l_funcCoreUnitFilter.push(&l_coreUnitFilter).push
-                                                        (&l_isFunctional).And();
-
-            // Loop through all the targets, looking for functional core units.
-            TARGETING::TargetRangeFilter l_pFilter(
-                                             TARGETING::targetService().begin(),
-                                             TARGETING::targetService().end(),
-                                             &l_funcCoreUnitFilter);
-            // Assert if no functional cores are found
-            assert(l_pFilter);
-
-            bool l_copyOnce = true;
-
-            // Loop through functional cores to get frequency
-            for(; l_pFilter; ++l_pFilter )
-            {
-                TARGETING::Target * l_pTarget = *l_pFilter;
-
-                fapi::voltageBucketData_t l_poundVdata = {0};
-
-                // Get Parent Chip target
-                const TARGETING::Target * l_pChipTarget =
-                                                    getParentChip(l_pTarget);
-                fapi::Target l_pFapiChipTarget(fapi::TARGET_TYPE_PROC_CHIP,
-                            (const_cast<TARGETING::Target*>(l_pChipTarget) ));
-
-                // Get core number for record number
-                TARGETING::ATTR_CHIP_UNIT_type l_coreNum =
-                        l_pTarget->getAttr<TARGETING::ATTR_CHIP_UNIT>();
-
-                uint32_t l_record = (uint32_t) MVPD::LRP0 + l_coreNum;
-
-                // Get #V bucket data
-                l_rc = fapiGetPoundVBucketData(l_pFapiChipTarget,
-                                               l_record,
-                                               l_poundVdata);
-                if(l_rc)
-                {
-                    TRACFCOMP( g_fapiTd,ERR_MRK"Error getting #V data for HUID:"
-                             "0x%08X",
-                             l_pTarget->getAttr<TARGETING::ATTR_HUID>());
-
-                    // Convert fapi returnCode to Error handle
-                    l_err = fapiRcToErrl(l_rc);
-
-                    break;
-                }
-
-                uint32_t l_sysVPDPowerSaveMinFreqMhz = l_poundVdata.PSFreq;
-                TARGETING::ATTR_NOMINAL_FREQ_MHZ_type l_sysNomFreqMhz =
-                                l_poundVdata.nomFreq;
-                TARGETING::ATTR_FREQ_CORE_MAX_type l_sysVPDTurboMaxFreqMhz =
-                                l_poundVdata.turboFreq;
-                // WOF defines the reserved Fvmin value as ultra turbo
-                TARGETING::ATTR_ULTRA_TURBO_FREQ_MHZ_type
-                             l_sysVPDUltraTurboFreqMhz = l_poundVdata.fvminFreq;
-                TRACFCOMP(g_fapiTd,INFO_MRK"Nominal freq is: [0x%08X]. Turbo "
-                          "freq is: [0x%08x]. PowerSave freq is: [0x%08X]."
-                          " Ultra Turbo is: [0x%08x]",
-                          l_sysNomFreqMhz, l_sysVPDTurboMaxFreqMhz,
-                          l_sysVPDPowerSaveMinFreqMhz,
-                          l_sysVPDUltraTurboFreqMhz);
-
-                if( true == l_copyOnce)
-                {
-                    o_sysNomFreqMhz = l_sysNomFreqMhz;
-                    l_minsysVPDTurboMaxFreqMhz = l_sysVPDTurboMaxFreqMhz;
-                    l_maxsysVPDPowerSaveMinFreqMhz =
-                                             l_sysVPDPowerSaveMinFreqMhz;
-                    l_minsysVPDUltraTurboFreqMhz = l_sysVPDUltraTurboFreqMhz;
-                    l_copyOnce = false;
-                }
-
-                // frequency is never zero so create error if it is zero.
-                if( (l_sysNomFreqMhz == 0)         ||
-                    (l_sysVPDTurboMaxFreqMhz == 0) ||
-                    (l_sysVPDPowerSaveMinFreqMhz == 0) )
-                {
-                    TRACFCOMP(g_fapiTd,ERR_MRK"Frequency is zero, "
-                             "nominal freq: 0x%04X,turbo freq: 0x%08X",
-                             "PowerSave freq is: [0x%08X]",
-                             l_sysNomFreqMhz,
-                             l_sysVPDTurboMaxFreqMhz,
-                             l_sysVPDPowerSaveMinFreqMhz);
-
-                    /*@
-                     * @errortype
-                     * @moduleid         fapi::MOD_GET_SYS_FREQ
-                     * @reasoncode       fapi::RC_INVALID_DATA
-                     * @userdata1[0:31]  Proc HUID
-                     * @userdata1[32:63] Nominal frequency
-                     * @userdata2[0:31]  Max Turbo frequency from VPD
-                     * @userdata2[32:63] Min Power Save frequency from VPD
-                     * @devdesc          Either nominal, max turbo or min power
-                     *                   save frequency for the processor HUID
-                     *                   (userdata1) is zero
-                     */
-                    l_err =
-                        new ERRORLOG::ErrlEntry(
-                                         ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                                         fapi::MOD_GET_SYS_FREQ,
-                                         fapi::RC_INVALID_DATA,
-                    TWO_UINT32_TO_UINT64(
-                                     l_pTarget->getAttr<TARGETING::ATTR_HUID>(),
-                                     l_sysNomFreqMhz),
-                    TWO_UINT32_TO_UINT64(l_sysVPDTurboMaxFreqMhz,
-                                         l_sysVPDPowerSaveMinFreqMhz));
-
-                    // Callout HW as VPD data is incorrect
-                    l_err->addHwCallout(l_pTarget, HWAS::SRCI_PRIORITY_HIGH,
-                                         HWAS::DECONFIG, HWAS::GARD_NULL);
-
-                    break;
-                }
-
-                // If WOF is enabled, Ultra Turbo frequency should not be zero.
-                // Return 0 for ultra turbo freq
-                if( (fapi::ENUM_ATTR_WOF_ENABLED_ENABLED == l_wofEnabled)  &&
-                    (l_sysVPDUltraTurboFreqMhz == 0) )
-                {
-                    TRACFCOMP(g_fapiTd,
-                              ERR_MRK"GetSysFreq: Ultra Turbo frequency is 0");
-
-                    /*@
-                     * @errortype
-                     * @moduleid         fapi::MOD_GET_SYS_FREQ
-                     * @reasoncode       fapi::RC_INVALID_ULTRA_TURBO_FREQ
-                     * @userdata1        Proc HUID
-                     * @userdata2        Invalid ultra turbo frequency
-                     * @devdesc          When WOF is enabled, ultra turbo freq
-                     *                   should not be 0
-                     */
-                    l_err =
-                        new ERRORLOG::ErrlEntry(
-                                     ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                                     fapi::MOD_GET_SYS_FREQ,
-                                     fapi::RC_INVALID_ULTRA_TURBO_FREQ,
-                                     l_pTarget->getAttr<TARGETING::ATTR_HUID>(),
-                                     l_sysVPDUltraTurboFreqMhz);
-
-                    // Callout HW as VPD data is incorrect
-                    l_err->addHwCallout(l_pTarget, HWAS::SRCI_PRIORITY_MED,
-                                         HWAS::NO_DECONFIG, HWAS::GARD_NULL);
-
-                    // log error and keep going
-                    errlCommit(l_err,HWPF_COMP_ID);
-                }
-
-                // Validate nominal frequency. If differs,
-                // create error and stop processing further.
-                if( o_sysNomFreqMhz != l_sysNomFreqMhz )
-                {
-                    TRACFCOMP(g_fapiTd,ERR_MRK
-                             "Nominal Frequency:[0x%04X] does not "
-                             "match with other core nominal frequency:[0x%04X]",
-                             l_sysNomFreqMhz, o_sysNomFreqMhz);
-
-                    /*@
-                     * @errortype
-                     * @moduleid    fapi::MOD_GET_SYS_FREQ
-                     * @reasoncode  fapi::RC_INVALID_FREQ
-                     * @userdata1   Invalid frequency
-                     * @userdata2   Expected frequency
-                     * @devdesc     Nominal frequency(userdata1) does not match
-                     *              nominal frequency(userdata2) on other cores.
-                     *              Should be the same for all chips.
-                     */
-                    l_err =
-                        new ERRORLOG::ErrlEntry(
-                                         ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                                         fapi::MOD_GET_SYS_FREQ,
-                                         fapi::RC_INVALID_FREQ,
-                                         l_sysNomFreqMhz,
-                                         o_sysNomFreqMhz);
-
-                    // Callout HW as VPD data is incorrect
-                    l_err->addHwCallout(l_pTarget, HWAS::SRCI_PRIORITY_HIGH,
-                                         HWAS::DECONFIG, HWAS::GARD_NULL);
-
-                    break;
-                }
-
-                // Save the min turbo freq
-                if (l_sysVPDTurboMaxFreqMhz < l_minsysVPDTurboMaxFreqMhz)
-                {
-                    l_minsysVPDTurboMaxFreqMhz = l_sysVPDTurboMaxFreqMhz;
-                }
-                // Save the max powersave freq
-                if (l_sysVPDPowerSaveMinFreqMhz >
-                                    l_maxsysVPDPowerSaveMinFreqMhz)
-                {
-                    l_maxsysVPDPowerSaveMinFreqMhz =
-                                    l_sysVPDPowerSaveMinFreqMhz;
-                }
-                // Save the min ultra turbo freq
-                // If WOF is enabled, do not expect to see a zero value. But if
-                // there is a zero value, then return zero.
-                if (l_sysVPDUltraTurboFreqMhz < l_minsysVPDUltraTurboFreqMhz)
-                {
-                    l_minsysVPDUltraTurboFreqMhz = l_sysVPDUltraTurboFreqMhz;
-                }
-
-            } // end for loop
-            if (l_err != NULL)
-            {
-                break;
-            }
-
-            // Get min turbo freq
-            o_sysVPDTurboMaxFreqMhz = l_minsysVPDTurboMaxFreqMhz;
-
-            // Get max powersave freq
-            o_sysVPDPowerSaveMinFreqMhz = l_maxsysVPDPowerSaveMinFreqMhz;
-
-            // Get ultra turbo freq
-            o_sysVPDUltraTurboMinFreqMhz = l_minsysVPDUltraTurboFreqMhz;
-
-        } while (0);
-
-        TRACFCOMP(g_fapiTd,EXIT_MRK"o_sysNomFreqMhz: 0x%08X, "
-                  "o_sysVPDTurboMaxFreqMhz: 0x%08X, "
-                  "o_sysVPDPowerSaveMinFreqMhz: 0x%08X, "
-                  "o_sysVPDUltraTurboFreqMhz: 0x%08x",
-                   o_sysNomFreqMhz, o_sysVPDTurboMaxFreqMhz,
-                   o_sysVPDPowerSaveMinFreqMhz,
-                   o_sysVPDUltraTurboMinFreqMhz );
-
-        return l_err;
-    }
-
-    //**************************************************************************
-    // FREQVOLTSVC::runP8BuildPstateDataBlock
-    //**************************************************************************
-    errlHndl_t runP8BuildPstateDataBlock(
-                                           const TARGETING::Target * i_procChip,
-                                           PstateSuperStructure * o_data)
-    {
-        errlHndl_t l_err = NULL;
-
-        // Assert on NULL input target
-        assert(i_procChip != NULL);
-
-        // convert to fapi target
-        fapi::Target l_fapiProcChip(fapi::TARGET_TYPE_PROC_CHIP,
-                              reinterpret_cast<void *>
-                              (const_cast<TARGETING::Target*>(i_procChip)) );
-
-        FAPI_INVOKE_HWP(l_err, p8_build_pstate_datablock,l_fapiProcChip,o_data);
-
-        if( l_err != NULL)
-        {
-            TRACFCOMP( g_fapiTd,ERR_MRK"Error from HWP: "
-                     "p8_build_pstate_datablock for target HUID: 0x%08X",
-                     i_procChip->getAttr<TARGETING::ATTR_HUID>());
-        }
-
-        return l_err;
-    }
-
-    //**************************************************************************
-    // FREQVOLTSVC::runProcGetVoltage
-    //**************************************************************************
-    errlHndl_t runProcGetVoltage(
-                    TARGETING::Target * io_procChip,
-                    const uint32_t i_bootFreqMhz)
-    {
-        TRACDCOMP(g_fapiTd,INFO_MRK"Enter runProcGetVoltage");
-
-        uint8_t l_vdd_vid = 0;
-        uint8_t l_vcs_vid = 0;
-
-        errlHndl_t l_err = NULL;
-        TARGETING::ATTR_BOOT_VOLTAGE_type l_boot_voltage_info =
-                                    PROC_BOOT_VOLT_PORT0_ENABLE;
-
-        TRACDCOMP(g_fapiTd,INFO_MRK"i_bootFreqMhz: 0x%08X",i_bootFreqMhz);
-
-        // Assert on NULL input target
-        // If the target is NULL, we have NO functional PROCS.
-        // Terminate IPL
-        assert(io_procChip != NULL);
-
-        // convert to fapi target
-        fapi::Target l_fapiProcChip(fapi::TARGET_TYPE_PROC_CHIP,
-                                  reinterpret_cast<void *>
-                                 (const_cast<TARGETING::Target*>(io_procChip)));
-
-        // Invoke HW procedure
-        FAPI_INVOKE_HWP(l_err, proc_get_voltage,l_fapiProcChip,i_bootFreqMhz,
-                        l_vdd_vid,l_vcs_vid);
-
-        if( l_err != NULL)
-        {
-            TRACFCOMP( g_fapiTd,ERR_MRK"Error from HWP: proc_get_voltage: "
-                     "i_bootFreq: 0x%08X, "
-                     "HUID: 0x%08X", i_bootFreqMhz,
-                     io_procChip->getAttr<TARGETING::ATTR_HUID>());
-        }
-
-        TRACDCOMP(g_fapiTd,INFO_MRK"Vdd: 0x%02x, vcs: 0x%02x",
-                    l_vdd_vid, l_vcs_vid);
-
-        // create boot voltage value
-        l_boot_voltage_info |= ( ( static_cast<uint32_t>(l_vdd_vid) <<
-                  PROC_BOOT_VOLT_VDD_SHIFT) & ( PROC_BOOT_VOLT_VDD_MASK ) );
-        l_boot_voltage_info |= ( ( static_cast<uint32_t>(l_vcs_vid) <<
-                  PROC_BOOT_VOLT_VCS_SHIFT) & ( PROC_BOOT_VOLT_VDD_MASK ) );
-
-        // set ATTR_PROC_BOOT_VOLTAGE_VID
-        io_procChip->setAttr<
-             TARGETING::ATTR_PROC_BOOT_VOLTAGE_VID>( l_boot_voltage_info );
-
-
-        return l_err;
-    }
-
-} // end namespace FREQVOLTSVC
-
diff --git a/src/usr/hwpf/hwp/pstates/pstates/freqVoltageSvc.H b/src/usr/hwpf/hwp/pstates/pstates/freqVoltageSvc.H
deleted file mode 100644
index 1187076fc..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/freqVoltageSvc.H
+++ /dev/null
@@ -1,161 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/freqVoltageSvc.H $           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2014,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/** @file freqVoltageSvc.H
- *  @brief Contains freqVoltage class declaration
- *
- *  This file contains information about frequency voltage service class. This
- *  class is used for reading/parsing/writing frequency and voltage related
- *  data.
- */
-
-#ifndef __PSTATES_FREQVOLTAGESVC_H
-#define __PSTATES_FREQVOLTAGESVC_H
-
-#include <errl/errlentry.H>
-#include <hwpf/fapi/fapiMvpdAccess.H>
-#include <pstates.h>
-
-namespace FREQVOLTSVC
-{
-
-
-/**
- *  @brief - Constants used to calculate boot voltage value and set
- *           ATTR_PROC_BOOT_VOLTAGE_VID attribute.
- */
-static const uint32_t PROC_BOOT_VOLT_PORT0_ENABLE = 0x80000000;
-static const uint8_t PROC_BOOT_VOLT_VDD_SHIFT = 16;
-static const uint8_t PROC_BOOT_VOLT_VCS_SHIFT = 8;
-static const uint32_t PROC_BOOT_VOLT_VDD_MASK = 0x00ff0000;
-static const uint32_t PROC_BOOT_VOLT_VCS_MASK = 0x0000ff00;
-
-    /**
-     * @brief Set system frequency attribute
-     *
-     * @par Detailed Description:
-     *      This function reads nominal, max turbo frequency, and min power
-     *      save frequency from VPD and updates system target attributes.
-     *
-     * @return Error log handle indicating the status of the request
-     *
-     * @retval NULL  Successfully set system frequency
-     * @retval !NULL Failed to set system frequency.
-     */
-    errlHndl_t setSysFreq();
-
-    /**
-     * @brief Run p8_build_pstate_datablock HWP
-     *
-     * @par Detailed Description:
-     *     This function is wrapper for executing p8_build_pstate_datablock
-     *     HW procedure.
-     *
-     * @param[in] i_procChip
-     *     Valid functional Processor Chip target pointer
-     * @param[out] o_data
-     *     On success, holds pstate data
-     *
-     * @return Error log handle indicating the status of the request
-     *
-     * @retval NULL  Successfully retrieved pstate data
-     * @retval !NULL Failed to get pstate data, ignore output
-     */
-    errlHndl_t runP8BuildPstateDataBlock(const TARGETING::Target * i_procChip,
-                                         PstateSuperStructure * o_data);
-
-    /**
-     * @brief Run proc_get_voltage HWP
-     *
-     * @par Detailed Description:
-     *     This function is wrapper for executing proc_get_voltage
-     *     HW procedure.
-     *
-     * @param[in] io_procChip
-     *     Valid functional Processor Chip target pointer
-     * @param[in] i_bootFreqMhz
-     *     Boot Frequency in MHZ
-     *
-     * @return Error log handle indicating the status of the request
-     *
-     * @retval NULL  Successfully retrieved boot voltage data
-     * @retval !NULL Failed to get boot voltage, ignore output
-     */
-    errlHndl_t runProcGetVoltage(TARGETING::Target * io_procChip,
-                                 const uint32_t i_bootFreqMhz);
-
-    /**
-     * @brief Get system frequency
-     *
-     * @par Detailed Description:
-     *     This function reads nominal, max turbo and min PowerSave frequency
-     *     from VPD.
-     *     It also does validation (check if all functional core voltage data
-     *     points to the same nominal frequency value). Returns error if
-     *     validation fails.
-     *     Max Turbo frequency returned is the lowest turbo freq of all the
-     *     functional cores in the system, obtained from VPD.
-     *     Min PowerSave frequency returned is the highest powersave freq of
-     *     all the functional cores in the system, obtained from VPD.
-     *
-     * @param[out] o_sysNomFreqMhz
-     *     On success, holds system nominal frequency
-     *     On failure, set to zero.
-     * @param[out] o_sysVPDTurboMaxFreqMhz
-     *     On success, holds lowest turbo frequency
-     *     On failure, set to zero.
-     * @param[out] o_sysVPDPowerSaveMinFreqMhz
-     *     On success, holds highest powersave frequency
-     *     On failure, set to zero.
-     * @param[out] o_sysVPDUltraTurboMinFreqMhz
-     *     On success, holds lowest ultra turbo frequency
-     *     On failure, set to zero.
-     *
-     * @return Error log handle indicating the status of the request
-     *
-     * @retval NULL  Successfully retrieved system frequency
-     * @retval !NULL Failed to get system frequency, ignore output
-     */
-    errlHndl_t getSysFreq(
-        uint32_t & o_sysVPDPowerSaveMinFreqMhz,
-        TARGETING::ATTR_NOMINAL_FREQ_MHZ_type & o_sysNomFreqMhz,
-        TARGETING::ATTR_FREQ_CORE_MAX_type & o_sysVPDTurboMaxFreqMhz,
-        TARGETING::ATTR_ULTRA_TURBO_FREQ_MHZ_type & o_sysVPDUltraMinFreqMhz);
-
-    /**
-     * @brief Verify the system boot frequency attribute
-     *
-     * @par Detailed Description:
-     *      This method reads the system's boot frequency (ATTR_BOOT_FREQ_MHZ)
-     *      and verifies that it is greater than or equal to the minimum
-     *      power save frequency from VPD.
-     *
-     * @param[in] i_pTarget
-     *      Pointer to system target.
-     */
-    void verifyBootFreq(TARGETING::Target* const i_pTarget);
-
-}; // end namespace FREQVOLTSVC
-
-#endif // __PSTATES_FREQVOLTAGESVC_H
diff --git a/src/usr/hwpf/hwp/pstates/pstates/gpstCheckByte.c b/src/usr/hwpf/hwp/pstates/pstates/gpstCheckByte.c
deleted file mode 100755
index 88d136bdf..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/gpstCheckByte.c
+++ /dev/null
@@ -1,238 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/gpstCheckByte.c $            */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: gpstCheckByte.c,v 1.3 2015/06/01 19:02:17 stillgs Exp $
-
-/// \file gpamCheckByte.c
-/// \brief Generate Pstate table check byte - Generated by genGpstCheckByte.tcl
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdint.h>
-
-#define BIT(x, n) (((x) >> (63 - (n))) & 1)
-
-uint8_t
-gpstCheckByte(uint64_t gpstEntry)
-{
-    int cb[8] = {0, 0, 0, 0, 0, 0, 0, 0};
-
-    cb[0] ^= BIT(gpstEntry, 0);
-    cb[0] ^= BIT(gpstEntry, 1);
-    cb[0] ^= BIT(gpstEntry, 2);
-    cb[0] ^= BIT(gpstEntry, 3);
-    cb[0] ^= BIT(gpstEntry, 4);
-    cb[0] ^= BIT(gpstEntry, 5);
-    cb[0] ^= BIT(gpstEntry, 6);
-    cb[0] ^= BIT(gpstEntry, 7);
-    cb[0] ^= BIT(gpstEntry, 24);
-    cb[0] ^= BIT(gpstEntry, 25);
-    cb[0] ^= BIT(gpstEntry, 26);
-    cb[0] ^= BIT(gpstEntry, 28);
-    cb[0] ^= BIT(gpstEntry, 33);
-    cb[0] ^= BIT(gpstEntry, 38);
-    cb[0] ^= BIT(gpstEntry, 42);
-    cb[0] ^= BIT(gpstEntry, 43);
-    cb[0] ^= BIT(gpstEntry, 44);
-    cb[0] ^= BIT(gpstEntry, 45);
-    cb[0] ^= BIT(gpstEntry, 52);
-    cb[0] ^= BIT(gpstEntry, 53);
-    cb[0] ^= BIT(gpstEntry, 54);
-    cb[0] ^= BIT(gpstEntry, 55);
-    cb[1] ^= BIT(gpstEntry, 0);
-    cb[1] ^= BIT(gpstEntry, 3);
-    cb[1] ^= BIT(gpstEntry, 4);
-    cb[1] ^= BIT(gpstEntry, 7);
-    cb[1] ^= BIT(gpstEntry, 8);
-    cb[1] ^= BIT(gpstEntry, 9);
-    cb[1] ^= BIT(gpstEntry, 10);
-    cb[1] ^= BIT(gpstEntry, 11);
-    cb[1] ^= BIT(gpstEntry, 12);
-    cb[1] ^= BIT(gpstEntry, 13);
-    cb[1] ^= BIT(gpstEntry, 14);
-    cb[1] ^= BIT(gpstEntry, 15);
-    cb[1] ^= BIT(gpstEntry, 32);
-    cb[1] ^= BIT(gpstEntry, 33);
-    cb[1] ^= BIT(gpstEntry, 34);
-    cb[1] ^= BIT(gpstEntry, 36);
-    cb[1] ^= BIT(gpstEntry, 41);
-    cb[1] ^= BIT(gpstEntry, 46);
-    cb[1] ^= BIT(gpstEntry, 50);
-    cb[1] ^= BIT(gpstEntry, 51);
-    cb[1] ^= BIT(gpstEntry, 52);
-    cb[1] ^= BIT(gpstEntry, 53);
-    cb[2] ^= BIT(gpstEntry, 4);
-    cb[2] ^= BIT(gpstEntry, 5);
-    cb[2] ^= BIT(gpstEntry, 6);
-    cb[2] ^= BIT(gpstEntry, 7);
-    cb[2] ^= BIT(gpstEntry, 8);
-    cb[2] ^= BIT(gpstEntry, 11);
-    cb[2] ^= BIT(gpstEntry, 12);
-    cb[2] ^= BIT(gpstEntry, 15);
-    cb[2] ^= BIT(gpstEntry, 16);
-    cb[2] ^= BIT(gpstEntry, 17);
-    cb[2] ^= BIT(gpstEntry, 18);
-    cb[2] ^= BIT(gpstEntry, 19);
-    cb[2] ^= BIT(gpstEntry, 20);
-    cb[2] ^= BIT(gpstEntry, 21);
-    cb[2] ^= BIT(gpstEntry, 22);
-    cb[2] ^= BIT(gpstEntry, 23);
-    cb[2] ^= BIT(gpstEntry, 40);
-    cb[2] ^= BIT(gpstEntry, 41);
-    cb[2] ^= BIT(gpstEntry, 42);
-    cb[2] ^= BIT(gpstEntry, 44);
-    cb[2] ^= BIT(gpstEntry, 49);
-    cb[2] ^= BIT(gpstEntry, 54);
-    cb[3] ^= BIT(gpstEntry, 2);
-    cb[3] ^= BIT(gpstEntry, 3);
-    cb[3] ^= BIT(gpstEntry, 4);
-    cb[3] ^= BIT(gpstEntry, 5);
-    cb[3] ^= BIT(gpstEntry, 12);
-    cb[3] ^= BIT(gpstEntry, 13);
-    cb[3] ^= BIT(gpstEntry, 14);
-    cb[3] ^= BIT(gpstEntry, 15);
-    cb[3] ^= BIT(gpstEntry, 16);
-    cb[3] ^= BIT(gpstEntry, 19);
-    cb[3] ^= BIT(gpstEntry, 20);
-    cb[3] ^= BIT(gpstEntry, 23);
-    cb[3] ^= BIT(gpstEntry, 24);
-    cb[3] ^= BIT(gpstEntry, 25);
-    cb[3] ^= BIT(gpstEntry, 26);
-    cb[3] ^= BIT(gpstEntry, 27);
-    cb[3] ^= BIT(gpstEntry, 28);
-    cb[3] ^= BIT(gpstEntry, 29);
-    cb[3] ^= BIT(gpstEntry, 30);
-    cb[3] ^= BIT(gpstEntry, 31);
-    cb[3] ^= BIT(gpstEntry, 48);
-    cb[3] ^= BIT(gpstEntry, 49);
-    cb[3] ^= BIT(gpstEntry, 50);
-    cb[3] ^= BIT(gpstEntry, 52);
-    cb[4] ^= BIT(gpstEntry, 1);
-    cb[4] ^= BIT(gpstEntry, 6);
-    cb[4] ^= BIT(gpstEntry, 10);
-    cb[4] ^= BIT(gpstEntry, 11);
-    cb[4] ^= BIT(gpstEntry, 12);
-    cb[4] ^= BIT(gpstEntry, 13);
-    cb[4] ^= BIT(gpstEntry, 20);
-    cb[4] ^= BIT(gpstEntry, 21);
-    cb[4] ^= BIT(gpstEntry, 22);
-    cb[4] ^= BIT(gpstEntry, 23);
-    cb[4] ^= BIT(gpstEntry, 24);
-    cb[4] ^= BIT(gpstEntry, 27);
-    cb[4] ^= BIT(gpstEntry, 28);
-    cb[4] ^= BIT(gpstEntry, 31);
-    cb[4] ^= BIT(gpstEntry, 32);
-    cb[4] ^= BIT(gpstEntry, 33);
-    cb[4] ^= BIT(gpstEntry, 34);
-    cb[4] ^= BIT(gpstEntry, 35);
-    cb[4] ^= BIT(gpstEntry, 36);
-    cb[4] ^= BIT(gpstEntry, 37);
-    cb[4] ^= BIT(gpstEntry, 38);
-    cb[4] ^= BIT(gpstEntry, 39);
-    cb[5] ^= BIT(gpstEntry, 0);
-    cb[5] ^= BIT(gpstEntry, 1);
-    cb[5] ^= BIT(gpstEntry, 2);
-    cb[5] ^= BIT(gpstEntry, 4);
-    cb[5] ^= BIT(gpstEntry, 9);
-    cb[5] ^= BIT(gpstEntry, 14);
-    cb[5] ^= BIT(gpstEntry, 18);
-    cb[5] ^= BIT(gpstEntry, 19);
-    cb[5] ^= BIT(gpstEntry, 20);
-    cb[5] ^= BIT(gpstEntry, 21);
-    cb[5] ^= BIT(gpstEntry, 28);
-    cb[5] ^= BIT(gpstEntry, 29);
-    cb[5] ^= BIT(gpstEntry, 30);
-    cb[5] ^= BIT(gpstEntry, 31);
-    cb[5] ^= BIT(gpstEntry, 32);
-    cb[5] ^= BIT(gpstEntry, 35);
-    cb[5] ^= BIT(gpstEntry, 36);
-    cb[5] ^= BIT(gpstEntry, 39);
-    cb[5] ^= BIT(gpstEntry, 40);
-    cb[5] ^= BIT(gpstEntry, 41);
-    cb[5] ^= BIT(gpstEntry, 42);
-    cb[5] ^= BIT(gpstEntry, 43);
-    cb[5] ^= BIT(gpstEntry, 44);
-    cb[5] ^= BIT(gpstEntry, 45);
-    cb[5] ^= BIT(gpstEntry, 46);
-    cb[5] ^= BIT(gpstEntry, 47);
-    cb[6] ^= BIT(gpstEntry, 8);
-    cb[6] ^= BIT(gpstEntry, 9);
-    cb[6] ^= BIT(gpstEntry, 10);
-    cb[6] ^= BIT(gpstEntry, 12);
-    cb[6] ^= BIT(gpstEntry, 17);
-    cb[6] ^= BIT(gpstEntry, 22);
-    cb[6] ^= BIT(gpstEntry, 26);
-    cb[6] ^= BIT(gpstEntry, 27);
-    cb[6] ^= BIT(gpstEntry, 28);
-    cb[6] ^= BIT(gpstEntry, 29);
-    cb[6] ^= BIT(gpstEntry, 36);
-    cb[6] ^= BIT(gpstEntry, 37);
-    cb[6] ^= BIT(gpstEntry, 38);
-    cb[6] ^= BIT(gpstEntry, 39);
-    cb[6] ^= BIT(gpstEntry, 40);
-    cb[6] ^= BIT(gpstEntry, 43);
-    cb[6] ^= BIT(gpstEntry, 44);
-    cb[6] ^= BIT(gpstEntry, 47);
-    cb[6] ^= BIT(gpstEntry, 48);
-    cb[6] ^= BIT(gpstEntry, 49);
-    cb[6] ^= BIT(gpstEntry, 50);
-    cb[6] ^= BIT(gpstEntry, 51);
-    cb[6] ^= BIT(gpstEntry, 52);
-    cb[6] ^= BIT(gpstEntry, 53);
-    cb[6] ^= BIT(gpstEntry, 54);
-    cb[6] ^= BIT(gpstEntry, 55);
-    cb[7] ^= BIT(gpstEntry, 16);
-    cb[7] ^= BIT(gpstEntry, 17);
-    cb[7] ^= BIT(gpstEntry, 18);
-    cb[7] ^= BIT(gpstEntry, 20);
-    cb[7] ^= BIT(gpstEntry, 25);
-    cb[7] ^= BIT(gpstEntry, 30);
-    cb[7] ^= BIT(gpstEntry, 34);
-    cb[7] ^= BIT(gpstEntry, 35);
-    cb[7] ^= BIT(gpstEntry, 36);
-    cb[7] ^= BIT(gpstEntry, 37);
-    cb[7] ^= BIT(gpstEntry, 44);
-    cb[7] ^= BIT(gpstEntry, 45);
-    cb[7] ^= BIT(gpstEntry, 46);
-    cb[7] ^= BIT(gpstEntry, 47);
-    cb[7] ^= BIT(gpstEntry, 48);
-    cb[7] ^= BIT(gpstEntry, 51);
-    cb[7] ^= BIT(gpstEntry, 52);
-    cb[7] ^= BIT(gpstEntry, 55);
-    return 
-        (cb[0] << 7) |
-        (cb[1] << 6) |
-        (cb[2] << 5) |
-        (cb[3] << 4) |
-        (cb[4] << 3) |
-        (cb[5] << 2) |
-        (cb[6] << 1) |
-        (cb[7] << 0);
-}
-
-#ifdef __cplusplus
-} // end extern C
-#endif
diff --git a/src/usr/hwpf/hwp/pstates/pstates/lab_pstates.c b/src/usr/hwpf/hwp/pstates/pstates/lab_pstates.c
deleted file mode 100755
index a53ca86e6..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/lab_pstates.c
+++ /dev/null
@@ -1,928 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/lab_pstates.c $              */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: lab_pstates.c,v 1.12 2015/06/01 19:02:17 stillgs Exp $
-
-/// \file lab_pstates.c
-/// \brief Lab-only (as opposed to product-procedure) support for Pstates.
-///
-/// Lab-only Pstate support is separated from generic Pstate support to reduce
-/// the size of OCC product firmware images.
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "ssx.h"
-// jwy #include "ppc32.h"
-#include "lab_pstates.h"
-// jwy #include "pmc_register_addresses.h"
-// jwy #include "pmc_firmware_registers.h"
-// jwy #include "pcbs_register_addresses.h"
-// jwy #include "pcbs_firmware_registers.h"
-
-/// Convert a voltage in microvolts to a VRM-11 VID code, rounding the implied
-/// voltage as required.
-///
-/// \param v_uv Voltage in micro-volts
-///
-/// \param round \a round >= 0 indicate round voltage up, while \a round < 0
-/// implies round voltage down
-///
-/// \param vrm11_vid A pointer to the location of the final VID code. This
-/// location is updated even if the final VID code is invalid.
-///
-/// \bug Confirm if the 1.6125V offset is still valid for PgP
-
-// Recall that VRM11 is inverted; rounding a VID code up rounds down the
-// voltage.
-
-int
-vuv2vrm11(uint32_t v_uv, int round, uint8_t *vrm11_vid)
-{
-    int32_t offset, vid;
-
-    offset = VRM11_BASE_UV - v_uv;
-    vid = offset / VRM11_STEP_UV;
-
-    if (((offset % VRM11_STEP_UV) != 0) && (round < 0)) {
-        vid++;
-    }
-
-    *vrm11_vid = vid;
-    return vid11_validate(vid);
-}
-
-
-/// Convert a VRM-11 VID code to a voltage in microvolts
-
-int
-vrm112vuv(uint8_t vrm11_vid, uint32_t *v_uv)
-{
-    *v_uv= VRM11_BASE_UV - (vrm11_vid * VRM11_STEP_UV);
-    return vid11_validate(vrm11_vid);
-}
-
-
-/// Convert a voltage in microvolts to an internal VID code, rounding the
-/// implied voltage as required.
-///
-/// \param v_uv Voltage in micro-volts
-///
-/// \param round \a round >= 0 indicate round voltage up, while \a round < 0
-/// implies round voltage down
-///
-/// \param ivid A pointer to the location of the final VID code.  This
-/// location is updated even the event of errors.
-///
-/// \retval 0 Success
-///
-/// \retval -IVID_INVALID_VOLTAGE If \a v_uv can not be converted to a legal
-/// IVID encoding.
-
-int
-vuv2ivid(uint32_t v_uv, int round, uint8_t *ivid)
-{
-    int rc;
-    int32_t offset, vid;
-
-    offset = v_uv - IVID_BASE_UV;
-    vid = offset / IVID_STEP_UV;
-
-    if (((offset % IVID_STEP_UV) != 0) && (round >= 0)) {
-	    vid++;
-    }
-
-    *ivid = vid;
-    if ((vid < 0) || (vid > 0x7f)) {
-        rc = -IVID_INVALID_VOLTAGE;
-    } else {
-        rc = 0;
-    }
-    return rc;
-}
-
-/// Convert an iVID code to a voltage in microvolts
-
-int
-ivid2vuv(uint8_t ivid, uint32_t *v_uv)
-{
-    if (ivid > 0x7f) {
-    return -IVID_INVALID_VOLTAGE;
-    } else {
-    *v_uv= IVID_BASE_UV + (ivid * IVID_STEP_UV);
-    return 0;
-    }
-}
-
-/// Convert a VPD current (in 0.5A units) to milliamps
-
-int
-vpdcur2ima(uint16_t i_vpdcur, uint32_t *i_ma)
-{
-    *i_ma = (i_vpdcur * 1000 / 2);
-    return 0;
-}
-
-/// Format a voltage in microvolts as 10 microvolts into a user-supplied
-/// string..  The string \a s must be able to store at least
-/// FORMAT_10UV_STRLEN characters.
-
-int
-sprintf_10uv(char *s, uint32_t v_uv)
-{
-    return sprintf(s, "%d.%05d", v_uv / 1000000, (v_uv % 1000000) / 10);
-}
-
-/// Format a current in milliamps into a user-supplied
-/// string..  The string \a s must be able to store at least
-/// FORMAT_IMA_STRLEN characters.
-
-int
-sprintf_ima(char *s, uint32_t i_ma)
-{
-    return sprintf(s, "%d.%03d", i_ma / 1000, i_ma % 1000);
-}
-
-
-#ifdef FAPIECMD
-
-/// Format a voltage in microvolts as 10 microvolts to a stream.
-
-int
-fprintf_10uv(FILE *stream, uint32_t v_uv)
-{
-    int rc;
-    char s[FORMAT_10UV_STRLEN];
-
-    rc = sprintf_10uv(s, v_uv);
-    if (rc > 0) {
-    rc = fputs(s, stream);
-    }
-    return rc;
-}
-
-
-/// Format a VRM-11 VID code as 10 microvolts into a user-supplied string. The
-/// string \a s must be able to store at least FORMAT_10UV_STRLEN characters.
-
-int
-sprintf_vrm11(char *s, uint8_t vrm11)
-{
-    int rc;
-    uint32_t v_uv;
-
-    if ((rc = vrm112vuv(vrm11, &v_uv)) != 0) {
-        strcpy(s, FORMAT_10UV_ERROR);
-    } else {
-        rc = sprintf_10uv(s, v_uv);
-    }
-    return rc;
-}
-
-
-/// Format a VRM-11 VID code as 10 microvolts to a stream.
-
-int
-fprintf_vrm11(FILE *stream, uint8_t vrm11)
-{
-    int rc;
-    char s[FORMAT_10UV_STRLEN];
-
-    rc = sprintf_vrm11(s, vrm11);
-    if (rc > 0) {
-    rc = fputs(s, stream);
-    }
-    return rc;
-}
-
-
-/// Format an IVID code as 10 microvolts into a user-supplied string. The
-/// string \a s must be able to store at least FORMAT_10UV_STRLEN characters.
-
-int
-sprintf_ivid(char *s, uint8_t ivid)
-{
-    int rc;
-    uint32_t v_uv;
-
-    if ((rc = ivid2vuv(ivid, &v_uv)) != 0) {
-    return rc;
-    }
-    return sprintf_10uv(s, v_uv);
-}
-
-
-/// Format an iVID code as 10 microvolts to a stream.
-
-int
-fprintf_ivid(FILE *stream, uint8_t ivid)
-{
-    int rc;
-    char s[FORMAT_10UV_STRLEN];
-
-    rc = sprintf_ivid(s, ivid);
-    if (rc > 0) {
-    rc = fputs(s, stream);
-    }
-    return rc;
-}
-
-/// Format a VPD current code as .5A into a user-supplied string. The
-/// string \a s must be able to store at least FORMAT_0P5A_STRLEN characters.
-
-int
-sprintf_vpd_current(char *s,  uint16_t current)
-{
-    int rc;
-    uint32_t i_ma;
-
-    if ((rc = vpdcur2ima(current, &i_ma)) != 0) {
-    return rc;
-    }
-    return sprintf_ima(s, i_ma);
-}
-
-
-int
-fprintf_vpd_current(FILE *stream, uint16_t current)
-{
-    int rc;
-    char s[FORMAT_IMA_STRLEN];
-
-    rc = sprintf_vpd_current(s, current);
-    if (rc > 0) {
-    rc = fputs(s, stream);
-    }
-    return rc;
-}
-
-
-
-// NB: The gpst_print() routine only needs the revle* functions when compiled
-// into little-endian Linux applications, which must provide their
-// implementations.
-
-#ifdef _BIG_ENDIAN
-
-#define revle16(x) x
-#define revle32(x) x
-#define revle64(x) x
-
-#else
-
-uint16_t revle16(uint16_t i_x);
-uint32_t revle32(uint32_t i_x);
-uint64_t revle64(uint64_t i_x);
-
-#endif
-
-
-/// Print a GlobalPstateTable structure on a given stream
-///
-/// \param stream The output stream
-///
-/// \param gpst The Global Pstate Table to print
-
-void
-gpst_print(FILE *stream, GlobalPstateTable *gpst)
-{
-    // Endian-corrected scalar Pstate fields
-
-    uint32_t options;
-    uint32_t pstate0_frequency_khz, frequency_step_khz;
-    uint8_t entries, pstate_stepsize, vrm_stepdelay_range, vrm_stepdelay_value;
-//    Pstate pmin, pvsafe, psafe;
-    Pstate pvsafe, psafe;
-
-
-    // Endian-corrected vector Pstate fields
-
-    gpst_entry_t entry;
-
-    // Other local variables
-
-    int i;
-    uint8_t evid_vdd, evid_vcs, evid_vdd_eff, evid_vcs_eff,
-    maxreg_vdd, maxreg_vcs;
-    int8_t pstate;
-    char evid_vdd_str[FORMAT_10UV_STRLEN];
-    char evid_vcs_str[FORMAT_10UV_STRLEN];
-    char evid_vdd_eff_str[FORMAT_10UV_STRLEN];
-    char evid_vcs_eff_str[FORMAT_10UV_STRLEN];
-    char maxreg_vdd_str[FORMAT_10UV_STRLEN];
-    char maxreg_vcs_str[FORMAT_10UV_STRLEN];
-    char* ivrm_max_ps_str;
-    char* ultraturbo_ps_str;
-    char* turbo_ps_str;
-    char* nominal_ps_str; 
-    char* powersave_ps_str;
-
-    
-    // Get endian-corrected scalars
-
-    options = revle32(gpst->options.options);
-    pstate0_frequency_khz = revle32(gpst->pstate0_frequency_khz);
-    frequency_step_khz = revle32(gpst->frequency_step_khz);
-    entries = gpst->entries;
-    pstate_stepsize = gpst->pstate_stepsize;
-    vrm_stepdelay_range = gpst->vrm_stepdelay_range;
-    vrm_stepdelay_value = gpst->vrm_stepdelay_value;
-//    pmin = gpst->pmin;
-    pvsafe = gpst->pvsafe;
-    psafe = gpst->psafe;
-
-
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-    fprintf(stream, "Global Pstate Table @ %p\n", gpst);
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-    fprintf(stream, "%d Entries from %+d to %+d\n",
-        entries, gpst_pmin(gpst), gpst_pmax(gpst));
-    fprintf(stream, "Frequency Step = %u KHz\n", frequency_step_khz);
-    fprintf(stream, "Pstate 0 Frequency = %u KHz\n", pstate0_frequency_khz);
-    fprintf(stream, "Pstate 0 Frequency Code (per core) :");
-    for (i = 0; i < PGP_NCORES; i++) {
-        if ((i != 0) && ((i % 4) == 0)) {
-            fprintf(stream, "\n                                    ");
-        }
-        fprintf(stream, " 0x%03x", revle16(gpst->pstate0_frequency_code[i]));
-    }
-    fprintf(stream, "\n");
-    fprintf(stream, "DPLL Fmax Bias (per core)          :");
-    for (i = 0; i < PGP_NCORES; i++) {
-        fprintf(stream, " %d", gpst->dpll_fmax_bias[i]);
-    }
-    fprintf(stream, "\n");
-    fprintf(stream, "Pstate Step Size %u, VRM Range %u, VRM Delay %u\n",
-            pstate_stepsize, vrm_stepdelay_range, vrm_stepdelay_value);
-    fprintf(stream, "Pvsafe %d, Psafe %d\n", pvsafe, psafe);
-    
-    fprintf(stream, "iVRM Maximum Pstate %d, Number of GPST entries (from Psafe) where iVRMs are enabled: %d\n", 
-            gpst->ivrm_max_ps, gpst->ivrm_entries);
-    
-
-    if (options == 0) {
-        fprintf(stream, "No Options\n");
-    } else {
-        fprintf(stream, "Options 0x%08x:\n", options);
-        if (options & PSTATE_NO_COPY_GPST) {
-            fprintf(stream, "    PSTATE_NO_COPY_GPST\n");
-        }
-        if (options & PSTATE_NO_INSTALL_GPST) {
-            fprintf(stream, "    PSTATE_NO_INSTALL_GPST\n");
-        }
-        if (options & PSTATE_NO_INSTALL_LPSA) {
-            fprintf(stream, "    PSTATE_NO_INSTALL_LPSA\n");
-        }
-        if (options & PSTATE_NO_INSTALL_RESCLK) {
-            fprintf(stream, "    PSTATE_NO_INSTALL_RESCLK\n");
-        }
-        if (options & PSTATE_FORCE_INITIAL_PMIN) {
-            fprintf(stream, "    PSTATE_FORCE_INITIAL_PMIN\n");
-        }
-        if (options & PSTATE_IDDQ_0P80V_VALID) {
-            fprintf(stream, "    PSTATE_IDDQ_0P80V_VALID\n");
-        }
-    }
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-    fprintf(stream,
-        "  I Pstate F(MHz) evid_vdd(V)  evid_vcs(V) evid_vdd_eff(V) evid_vcs_eff(V) maxreg_vdd(V)  maxreg_vcs(V)\n"
-        "---------------------------------------------------------------------------------------------------------\n");
-
-    for (i = gpst->entries - 1; i >= 0; i--) {
-
-        entry.value = revle64(gpst->pstate[i].value);
-
-    evid_vdd = entry.fields.evid_vdd;
-    sprintf_vrm11(evid_vdd_str, evid_vdd);
-
-    evid_vcs = entry.fields.evid_vcs;
-    sprintf_vrm11(evid_vcs_str, evid_vcs);
-
-    evid_vdd_eff = entry.fields.evid_vdd_eff;
-    sprintf_ivid(evid_vdd_eff_str, evid_vdd_eff);
-
-    evid_vcs_eff = entry.fields.evid_vcs_eff;
-    sprintf_ivid(evid_vcs_eff_str, evid_vcs_eff);
-
-    maxreg_vdd = entry.fields.maxreg_vdd;
-    sprintf_ivid(maxreg_vdd_str, maxreg_vdd);
-
-    maxreg_vcs = entry.fields.maxreg_vcs;
-    sprintf_ivid(maxreg_vcs_str, maxreg_vcs);
-
-    pstate = gpst_pmin(gpst) + i;
-    
-    ultraturbo_ps_str = "";
-    if (pstate == 0 && gpst->turbo_ps != 0)
-        ultraturbo_ps_str = " <--- UltraTurbo";
-    
-    turbo_ps_str = "";
-    if (pstate == gpst->turbo_ps)
-        turbo_ps_str = " <--- Turbo";
-    
-    nominal_ps_str = "";
-    if (pstate == gpst->nominal_ps)
-        nominal_ps_str = " <--- Nominal";   
-        
-    powersave_ps_str = "";
-    if (pstate == gpst->powersave_ps)
-        powersave_ps_str = " <--- PowerSave";   
-    
-    ivrm_max_ps_str = "";
-    if (pstate == gpst->ivrm_max_ps)
-        ivrm_max_ps_str = " <--- iVRM Maximum";
-       
-    fprintf(stream,
-        "%3d %+4d    "
-        "%4d  "
-        "0x%02x %s  "
-        "0x%02x %s  "
-        "0x%02x %s    "
-        "0x%02x %s   "
-        "0x%02x %s   "
-        "0x%02x %s "
-        "%s%s%s%s%s\n",
-        i, pstate,
-        (pstate0_frequency_khz + (frequency_step_khz * pstate)) / 1000,
-        evid_vdd, evid_vdd_str,
-        evid_vcs, evid_vcs_str,
-        evid_vdd_eff, evid_vdd_eff_str,
-        evid_vcs_eff, evid_vcs_eff_str,
-        maxreg_vdd, maxreg_vdd_str,
-        maxreg_vcs, maxreg_vcs_str,
-        ultraturbo_ps_str,
-        turbo_ps_str,
-        nominal_ps_str,
-        powersave_ps_str,
-        ivrm_max_ps_str);
-    }
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-}
-
-
-/// Print a LocalPstateArray structure on a given stream
-///
-/// \param stream The output stream
-///
-/// \param lpsa The Local Pstate Array to print
-///
-/// \todo Replace the hex dump with a decoded Local Pstate Table + ivrm table
-
-void
-lpsa_print(FILE* stream, LocalPstateArray* lpsa)
-{
-    int i;
-    uint8_t entries;
-    uint8_t entries_div4;
-    char ivid_vdd_str[FORMAT_10UV_STRLEN];
-    char ivid_vcs_str[FORMAT_10UV_STRLEN];
-    uint8_t ivid_vdd, ivid_vcs;
-    lpst_entry_t   lpst_entry;
-    vdsvin_entry_t vdsvin_entry;
-
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-    fprintf(stream, "Local Pstate Array @ %p\n", lpsa);
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-    fprintf(stream, "%d Entries from %+d to %+d\n",
-        lpsa->entries, lpst_pmin(lpsa), lpst_pmax(lpsa));
-    fprintf(stream, "Step Delay Rising %u, Step Delay Falling %u\n",
-            lpsa->stepdelay_rising,
-            lpsa->stepdelay_lowering);
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------------------\n");
-    fprintf(stream,
-        " I  ivid_vdd(V)   ivid_vcs(V)   Core vdd  Core vcs  ECO vdd   ECO vcs   ps1 inc  ps2 inc  ps3 inc  inc step  dec step\n"
-        "                                pwrratio  pwrratio  pwrratio  pwrratio                                               \n"
-        "---------------------------------------------------------------------------------------------------------------------\n");
-
-    entries      = lpsa->entries;
-    entries_div4 = entries/4;
-
-    if ( entries % 4 != 0)
-       entries_div4++;
-
-    for (i = entries_div4-1  ; i >= 0; i--) {
-      lpst_entry.value = revle64(lpsa->pstate[i].value);
-
-      ivid_vdd = lpst_entry.fields.ivid_vdd;
-      sprintf_ivid(ivid_vdd_str, ivid_vdd);
-
-      ivid_vcs = lpst_entry.fields.ivid_vcs;
-      sprintf_ivid(ivid_vcs_str, ivid_vcs);
-
-      fprintf(stream,
-           "%2u  "
-           "0x%02x %s  "
-           "0x%02x %s  "
-           "%-9u %-9u %-9u %-9u "
-           "%-8u %-8u %-8u "
-           "%-9u %-9u \n",
-           i,
-           ivid_vdd, ivid_vdd_str,
-           ivid_vcs, ivid_vcs_str,
-           (uint8_t)lpst_entry.fields.vdd_core_pwrratio,
-           (uint8_t)lpst_entry.fields.vcs_core_pwrratio,
-           (uint8_t)lpst_entry.fields.vdd_eco_pwrratio,
-           (uint8_t)lpst_entry.fields.vcs_eco_pwrratio,
-           (uint8_t)lpst_entry.fields.ps1_vid_incr,
-           (uint8_t)lpst_entry.fields.ps2_vid_incr,
-           (uint8_t)lpst_entry.fields.ps3_vid_incr,
-           (uint8_t)lpst_entry.fields.inc_step,
-           (uint8_t)lpst_entry.fields.dec_step);
-    }
-
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------------------\n\n");
-
-   fprintf(stream,
-        "--------------------------------\n");
-   fprintf(stream,
-        "VDS\n");
-    fprintf(stream,
-        " I    beg_offset  end_offset    \n"
-        "--------------------------------\n");
-
-    for (i = 15  ; i >= 0; i--) {
-      vdsvin_entry.value = revle64(lpsa->vdsvin[i].value);
-
-      fprintf(stream,
-           "%2u    "
-           "%-10u  "
-           "%-10u   \n",
-           i,
-           (uint8_t)vdsvin_entry.fields.ivid0,
-           (uint8_t)vdsvin_entry.fields.ivid1);
-    }
-
-    fprintf(stream,
-        "--------------------------------\n\n");
-
-
-   fprintf(stream,
-        "-----------------------------------------------------\n");
-   fprintf(stream,
-        "VIN\n");
-    fprintf(stream,
-        " I    ptef0 pfet1 pfet2 pfet3 pfet4 pfet5 pfet6 pfet7\n"
-        "-----------------------------------------------------\n");
-
-    for (i = 63  ; i >= 0; i--) {
-      vdsvin_entry.value = revle64(lpsa->vdsvin[i].value);
-
-      fprintf(stream,
-           "%2u    "
-           "%-5u %-5u %-5u %-5u %-5u %-5u %-5u %-5u\n",
-           i,
-           (uint8_t)vdsvin_entry.fields.pfet0,
-           (uint8_t)vdsvin_entry.fields.pfet1,
-           (uint8_t)vdsvin_entry.fields.pfet2,
-           (uint8_t)vdsvin_entry.fields.pfet3,
-           (uint8_t)vdsvin_entry.fields.pfet4,
-           (uint8_t)vdsvin_entry.fields.pfet5,
-           (uint8_t)vdsvin_entry.fields.pfet6,
-           (uint8_t)vdsvin_entry.fields.pfet7);
-    }
-
-    fprintf(stream,
-        "-----------------------------------------------------\n\n");
-}
-
-/// Print CPM Pstate Range structure on a given stream
-///
-/// \param stream   The output stream
-///
-/// \param cpmrange The CPM Pstate Range structure to print
-
-void
-cpmrange_print(FILE* stream, CpmPstateModeRanges* cpmrange)
-{
-    int i;
-
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-    fprintf(stream, "CPM Pstate Range @ %p\n",  cpmrange);
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-
-    fprintf(stream, "Valid Number of CPM Pstate Ranges : %u\n",
-            cpmrange->validRanges);
-
-    for (i = 0; i < 8; i++) {
-      fprintf(stream, "   CPM Range %d Pstate : %d\n",
-              i, cpmrange->inflectionPoint[i]);
-    }
-
-    fprintf(stream, "  CPM Pmax : %d\n",
-            cpmrange->pMax);
-
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-}
-
-/// Print a Resonant Clocking Setup structure on a given stream
-///
-/// \param stream The output stream
-///
-/// \param resclk The ResonantClockingSetup to print
-
-void
-resclk_print(FILE* stream, ResonantClockingSetup* resclk)
-{
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-    fprintf(stream, "Resonant Clocking Setup @ %p\n", resclk);
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-
-    fprintf(stream, "   Full Clock Sector Buffer Pstate      : %2d\n",
-            resclk->full_csb_ps);
-    fprintf(stream, "   Low Frequency Resonant Lower Pstate  : %2d\n",
-            resclk->res_low_lower_ps);
-    fprintf(stream, "   Low Frequency Resonant Upper Pstate  : %2d\n",
-            resclk->res_low_upper_ps);
-    fprintf(stream, "   High Frequency Resonant Lower Pstate : %2d\n",
-            resclk->res_high_lower_ps);
-    fprintf(stream, "   High Frequency Resonant Upper Pstate : %2d\n",
-            resclk->res_high_upper_ps);
-
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-}
-
-/// Print an IDDQ structure on a given stream
-///
-/// \param stream The output stream
-///
-/// \param iddq The IddqTable to print
-
-void
-iddq_print(FILE* stream, IddqTable* iddq)
-{
-    uint32_t i, j;
-    const uint8_t   vdd_measurement_order[LRP_IDDQ_RECORDS] = CORE_IDDQ_MEASUREMENTS_ORDER;
-    const char     *core_measurement_str[LRP_IDDQ_RECORDS] = CORE_IDDQ_MEASUREMENT_VOLTAGES;
-    const uint8_t   vcs_measurement_order[LRP_IDDQ_RECORDS] = CORE_IDDQ_MEASUREMENTS_ORDER;
-    const char     *chip_measurement_str[CRP_IDDQ_RECORDS] = CHIP_IDDQ_MEASUREMENT_VOLTAGES;
-    const uint8_t   vio_measurement_order[CRP_IDDQ_RECORDS] = CHIP_IDDQ_MEASUREMENTS_ORDER;
-
-
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-    fprintf(stream, "IDDQ Table (version %d) @ %p\n", iddq->iddq_version, iddq);
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-
-
-    for (i = 0; i < CORE_IDDQ_MEASUREMENTS; i++) {
-        for (j = 0; j < CORE_IDDQ_MEASUREMENTS; j++) {
-            if (vdd_measurement_order[j] == i)
-                fprintf(stream, "   Core VDD IDDQ @ %sV Raw : 0x%04X, %6d mA; Temperature Corrected: 0x%04X, %6d mA\n",
-                  core_measurement_str[j],
-                  iddq->iddq_vdd[vdd_measurement_order[j]].fields.iddq_raw_value,
-                  iddq->iddq_vdd[vdd_measurement_order[j]].fields.iddq_raw_value*10,
-                  iddq->iddq_vdd[vdd_measurement_order[j]].fields.iddq_corrected_value,
-                  iddq->iddq_vdd[vdd_measurement_order[j]].fields.iddq_corrected_value*10);
-        }
-    }
-
-    for (i = 0; i < CORE_IDDQ_MEASUREMENTS; i++) {
-        for (j = 0; j < CORE_IDDQ_MEASUREMENTS; j++) {
-            if (vcs_measurement_order[j] == i)
-                fprintf(stream, "   Core VCS IDDQ @ %sV Raw : 0x%04X, %6d mA; Temperature Corrected: 0x%04X, %6d mA\n",
-                  core_measurement_str[j],
-                  iddq->iddq_vcs[vcs_measurement_order[j]].fields.iddq_raw_value,
-                  iddq->iddq_vcs[vcs_measurement_order[j]].fields.iddq_raw_value*10,
-                  iddq->iddq_vcs[vcs_measurement_order[j]].fields.iddq_corrected_value,
-                  iddq->iddq_vcs[vcs_measurement_order[j]].fields.iddq_corrected_value*10);
-        }
-    }
-
-    for (i = 0; i < CHIP_IDDQ_MEASUREMENTS; i++) {
-        for (j = 0; j < CHIP_IDDQ_MEASUREMENTS; j++) {
-            if (vio_measurement_order[j] == i)
-                fprintf(stream, "   Chip VIO IDDQ @ %sV Raw : 0x%04X, %6d mA; Temperature Corrected: 0x%04X, %6d mA\n",
-                  chip_measurement_str[j],
-                  iddq->iddq_vio[vio_measurement_order[j]].fields.iddq_raw_value,
-                  iddq->iddq_vio[vio_measurement_order[j]].fields.iddq_raw_value*10,
-                  iddq->iddq_vio[vio_measurement_order[j]].fields.iddq_corrected_value,
-                  iddq->iddq_vio[vio_measurement_order[j]].fields.iddq_corrected_value*10);
-        }
-    }
-
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-}
-
-// ENUM defining the printable rails
-enum vidmod_rails
-{
-    VDD,
-    VCS
-};
-
-/// Print the VID Modification structure on a given stream
-///
-/// \param stream   The output stream
-/// \param wof      The WOF Element structure to print
-/// \param rail     The rail to put out
-void
-vidmod_print(FILE* stream, WOFElements* wof, vidmod_rails rail)
-{
-    char line_str[256];
-    char entry_str[128];
-    
-    uint8_t evid;
-    char evid_str[FORMAT_10UV_STRLEN];
-    
-    strcpy(entry_str, "");
-    strcpy(line_str, "   Active Cores->");
-    for (int j=0; j < wof->ut_vid_mod.ut_max_cores; ++j) 
-    {
-        sprintf(entry_str, "      %2d      ", j+1);
-        strcat(line_str, entry_str);  
-    }    
-    fprintf(stream, "%s\n", line_str);   
-       
-    strcpy(entry_str, "");
-    strcpy(line_str, "    Index Pstate  ");
-    for (int j=0; j < wof->ut_vid_mod.ut_max_cores; ++j) 
-    {
-        if (rail == VDD) 
-            sprintf(entry_str, " evid_vdd(V)  ");
-        else
-            sprintf(entry_str, " evid_vcs(V)  ");
-        strcat(line_str, entry_str);  
-    }    
-    fprintf(stream, "%s\n", line_str);
-    
-    for (int i = wof->ut_vid_mod.ut_segment_pstates; i >= 0; --i) 
-    {      
-    
-        sprintf(line_str, "    %2d    %+4d    ",                          
-                        i,
-                        -wof->ut_vid_mod.ut_segment_pstates+i);
-
-        for (int j=0; j < wof->ut_vid_mod.ut_max_cores; ++j) 
-        {
-            if (rail == VDD) 
-                evid = wof->ut_vid_mod.ut_segment_vdd_vid[i][j];
-            else
-                evid = wof->ut_vid_mod.ut_segment_vcs_vid[i][j];                        
-            
-            sprintf_vrm11(evid_str, evid);
-            strcpy(entry_str, "");
-            sprintf(entry_str, "0x%02x %s  ",                          
-                        evid, evid_str);
-            strcat(line_str, entry_str);                        
-
-        } 
-        fprintf(stream, "%s\n", line_str);    
-    }
-    return;
-}
-
-/// Print the WOF Element structure on a given stream
-///
-/// \param stream The output stream
-///
-/// \param wof The WOF Element structure to print
-
-void
-wof_print(FILE* stream, WOFElements* wof)
-{
-    const char     *vpd_point_str[VPD_PV_POINTS] = VPD_PV_ORDER_STR;
-    
-    char vpd_vdd_str[FORMAT_10UV_STRLEN];
-    char vpd_vcs_str[FORMAT_10UV_STRLEN];
-    char vpd_idd_str[FORMAT_IMA_STRLEN];
-    char vpd_ics_str[FORMAT_IMA_STRLEN];
-        
-    uint32_t vdd, vcs, idd, ics;
-
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-    fprintf(stream, "Workload Optimized Frequency (WOF) elements @ %p\n", wof);
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
- 
-    fprintf(stream, "WOF Enabled\t: %d\n", wof->wof_enabled);
-    
-    if (!wof->wof_enabled)
-    {
-         fprintf(stream, "  >>>> With WOF Disabled, relevant content in the Pstate SuperStructure is not populated <<<<\n");
-    }
-
-    fprintf(stream, "VPD Points (biased without System Distribution Elements)\n"); 
-    for (int i=0; i < VPD_PV_POINTS; ++i) 
-    {
-
-        vdd = wof->operating_points[i].vdd_5mv * 5 * 1000;
-        sprintf_10uv(vpd_vdd_str, vdd);
-
-        vcs = wof->operating_points[i].vcs_5mv * 5 * 1000;
-        sprintf_10uv(vpd_vcs_str, vcs);
-
-        idd = wof->operating_points[i].idd_500ma;
-        sprintf_vpd_current(vpd_idd_str, idd);
-
-        ics = wof->operating_points[i].ics_500ma;
-        sprintf_vpd_current(vpd_ics_str, ics);
-
-        fprintf(stream, "   %s         \t: %4d MHz  VDD: %s V %s A  VCS: %s V %s A\n",
-            vpd_point_str[i],
-            wof->operating_points[i].frequency_mhz,
-            vpd_vdd_str,
-            vpd_idd_str,
-            vpd_vcs_str,
-            vpd_ics_str           
-            );           
-    }
-
-    fprintf(stream, "System Distribution Elements\n"); 
-    fprintf(stream, "   VDD loadline            : %d uOhm\n", wof->vdd_sysparm.loadline_uohm);
-    fprintf(stream, "   VCS loadline            : %d uOhm\n", wof->vcs_sysparm.loadline_uohm);
-    fprintf(stream, "   VDD distribution loss   : %d uOhm\n", wof->vdd_sysparm.distloss_uohm);
-    fprintf(stream, "   VCS distribution loss   : %d uOhm\n", wof->vcs_sysparm.distloss_uohm);
-    fprintf(stream, "   VDD distribution offset : %d uV\n",   wof->vdd_sysparm.distoffset_uv);
-    fprintf(stream, "   VCS distribution offset : %d uV\n",   wof->vcs_sysparm.distoffset_uv);
-
-    fprintf(stream, "WOF Factors\n"); 
-    fprintf(stream, "   TDP to RDP factor        0x%X   --> %0.2f%% \n", wof->tdp_rdp_factor, (double)wof->tdp_rdp_factor/100);
-    
-    fprintf(stream, "Pstates from Turbo to UltraTurbo (inclusive) : %d  (from %-2d to %-2d)\n", 
-            wof->ut_vid_mod.ut_segment_pstates+1,       // +1 is for inclusivity 
-            0,
-            -(wof->ut_vid_mod.ut_segment_pstates));
-            
-
-    fprintf(stream, "Turbo<>UltraTurbo VID Modification - VDD\n");    
-    vidmod_print(stream, wof, VDD);
-        
-    fprintf(stream, "Turbo<>UltraTurbo VID Modification - VCS\n");       
-    vidmod_print(stream, wof, VCS);
-       
-    fprintf(stream,
-        "---------------------------------------------------------------------------------------------------------\n");
-}
-
-
-/// Print a PstateSuperStructure on a given stream
-///
-/// \param stream The output stream
-///
-/// \param pss The PstateSuperStructure to print
-
-void
-pss_print(FILE* stream, PstateSuperStructure* pss)
-{
-    fprintf(stream,
-        "+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n");
-    fprintf(stream, "PstateSuperStructure @ %p;   Size: %d bytes\n", pss, sizeof(PstateSuperStructure));
-    fprintf(stream,
-        "+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n");
-
-    gpst_print(stream, &(pss->gpst));
-    lpsa_print(stream, &(pss->lpsa));
-    cpmrange_print(stream, &(pss->cpmranges));   
-    resclk_print(stream, &(pss->resclk));
-    wof_print(stream, &(pss->wof));
-    iddq_print(stream, &(pss->iddq));
-   
-    fprintf(stream,
-        "+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n");
-}
-
-
-#endif // FAPIECMD
-
-#ifdef __cplusplus
-} // end extern C
-#endif
diff --git a/src/usr/hwpf/hwp/pstates/pstates/lab_pstates.h b/src/usr/hwpf/hwp/pstates/pstates/lab_pstates.h
deleted file mode 100755
index 8d824011e..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/lab_pstates.h
+++ /dev/null
@@ -1,122 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/lab_pstates.h $              */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#ifndef __LAB_PSTATES_H__
-#define __LAB_PSTATES_H__
-
-// $Id: lab_pstates.h,v 1.7 2015/06/01 19:02:17 stillgs Exp $
-
-/// \file lab_pstates.h
-/// \brief Lab-only (as opposed to product-procedure) support for Pstates.
-
-#include <stdint.h>
-
-// jwy #include "ssx_io.h"
-#include "pstates.h"
-
-// Error/panic codes
-
-#define IVID_INVALID_VOLTAGE            0x00484301
-#define PSTATE_STATUS_REPORT_SCOM_ERROR 0x00777701
-
-/// String storage requirement for strings used of arguments of
-/// sprintf_10uv, sprintf_vrm11() and sprintf_ivid().
-///
-/// \todo Replace with a typedef
-#define FORMAT_10UV_STRLEN 8
-#define FORMAT_IMA_STRLEN 8
-
-#define FORMAT_10UV_ERROR "<Error>"
-
-#define ROUND_VOLTAGE_UP    1
-#define ROUND_VOLTAGE_DOWN -1
-
-#ifndef __ASSEMBLER__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-int
-vuv2vrm11(uint32_t v_uv, int round, uint8_t *vrm11_vid);
-
-int
-vrm112vuv(uint8_t vrm11_vid, uint32_t *v_uv);
-
-int
-vuv2ivid(uint32_t v_uv, int round, uint8_t *ivid);
-
-int
-ivid2vuv(uint8_t ivid, uint32_t *v_uv);
-
-int
-sprintf_10uv(char *s, uint32_t v_uv);
-
-#ifdef FAPIECMD
-
-int
-fprintf_10uv(FILE *stream, uint32_t v_uv);
-
-int
-sprintf_vrm11(char *s, uint8_t vrm11);
-
-int
-fprintf_vrm11(FILE *stream, uint8_t vrm11);
-
-int
-sprintf_ivid(char *s, uint8_t ivid);
-
-int
-fprintf_ivid(FILE *stream, uint8_t ivid);
-
-void
-gpst_print(FILE* stream, GlobalPstateTable* gpst);
-
-void
-lpsa_print(FILE* stream, LocalPstateArray* lpsa);
-
-void
-cpmrange_print(FILE* stream, CpmPstateModeRanges* cpmrange);
-
-void
-resclk_print(FILE* stream, ResonantClockingSetup* resclk);
-
-void
-iddq_print(FILE* stream, IddqTable* iddq);
-
-void
-wof_print(FILE* stream, WOFElements* wof);
-
-void
-pss_print(FILE* stream, PstateSuperStructure* pss);
-
-#endif // FAPIECMD
-
-#ifdef __cplusplus
-} // end extern C
-#endif
-
-#endif // __ASSEMBLER__
-
-#endif // __LAB_PSTATES_H__
diff --git a/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.C b/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.C
deleted file mode 100755
index 6def3a095..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.C
+++ /dev/null
@@ -1,2324 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.C $ */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2015                        */
-/* [+] Google Inc.                                                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_build_pstate_datablock.C,v 1.46 2015/06/01 18:50:36 stillgs Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_build_pstate_datablock.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2012
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME:  Jim Yacynych         Email: jimyac@us.ibm.com
-// *! BACKUP NAME: Greg Still           Email: stillgs@us.ibm.com
-// *! BACKUP NAME: David Du             Email: daviddu@us.ibm.com
-// *!
-
-/// \file p8_build_pstate_datablock.C
-/// \brief
-///
-/// \todo
-///   High-level procedure flow:
-/// \verbatim
-///
-/// Procedure Prereq:
-///   o System clocks are running
-/// \endverbatim
-///
-/// buildfapiprcd -c "gpstCheckByte.c,pstate_tables.c,pstates.c,lab_pstates.c" -e "../../xml/error_info/p8_build_pstate_datablock_errors.xml" p8_build_pstate_datablock.C
-//------------------------------------------------------------------------------
-
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-#include <fapi.H>
-#include <pstate_tables.h>
-#include <lab_pstates.h>
-#include <pstates.h>
-#include <p8_pm.H>
-#include <p8_build_pstate_datablock.H>
-
-
-
-extern "C" {
-
-    using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Function prototypes
-// ----------------------------------------------------------------------
-    ReturnCode proc_get_mvpd_data    (  const Target& i_target,
-                                        AttributeList *attr,
-                                        uint32_t attr_mvpd_data[PV_D][PV_W],
-                                        uint32_t *valid_pdv_points,
-                                        ivrm_mvpd_t *ivrm_mvpd,
-                                        uint8_t *present_chiplets,
-                                        uint8_t *functional_chiplets,
-                                        uint8_t *poundm_valid,
-                                        uint8_t *poundm_ver);
-
-    ReturnCode proc_get_mvpd_iddq    (  const Target& i_target,
-                                        PstateSuperStructure *pss);
-
-    ReturnCode proc_get_attributes   (  const Target& i_target,
-                                        AttributeList *attr_list);
-
-    ReturnCode proc_get_attributes   (  const Target& i_target,
-                                        AttributeList *attr_list);
-
-    ReturnCode proc_get_extint_bias  (  uint32_t attr_mvpd_data[PV_D][PV_W],
-                                        const AttributeList *attr,
-                                        double *volt_int_vdd_bias,
-                                        double *volt_int_vcs_bias);
-
-    ReturnCode proc_boost_gpst       (  PstateSuperStructure *pss,
-                                        uint32_t attr_boost_percent);
-
-    ReturnCode proc_upd_cpmrange     (  PstateSuperStructure *pss,
-                                        const AttributeList *attr);
-
-    ReturnCode proc_upd_psafe_ps     (  PstateSuperStructure *pss,
-                                        const AttributeList *attr);
-
-    ReturnCode proc_upd_floor_ps     (  PstateSuperStructure *pss,
-                                        const AttributeList *attr);
-
-    ReturnCode proc_chk_valid_poundv (  const Target& i_target,
-                                        AttributeList *attr,
-                                        const uint32_t chiplet_mvpd_data[PV_D][PV_W],
-                                        uint32_t *valid_pdv_points,
-                                        uint8_t chiplet_num,
-                                        uint8_t bucket_id);
-
-    ReturnCode proc_res_clock        (  PstateSuperStructure *pss,
-                                        AttributeList *attr_list);
-
-    ReturnCode load_wof_attributes (    PstateSuperStructure *pss,
-                                        const AttributeList *attr);
-
-    ReturnCode load_mvpd_operating_point (const uint32_t src[PV_D][PV_W],
-                                          VpdOperatingPoint *dest);
-
-// ----------------------------------------------------------------------
-// Function definitions
-// ----------------------------------------------------------------------
-/// \param[in]      i_target           Chip Target
-/// \param[in/out]  *io_pss            Reference to PstateSuperStructure
-
-/// \retval FAPI_RC_SUCCESS
-/// \retval ERROR defined in xml
-
-    ReturnCode
-    p8_build_pstate_datablock(const Target& i_target,
-                              PstateSuperStructure *io_pss)
-    {
-        fapi::ReturnCode l_rc;
-        int rc;
-
-        AttributeList attr;
-        ChipCharacterization* characterization;
-        uint8_t i                        = 0;
-        uint8_t present_chiplets         = 0;
-        uint8_t functional_chiplets      = 0;
-        uint8_t poundm_ver               = 0;
-        uint8_t poundm_valid             =
-            1;  // assume valid until code determines invalid
-        uint8_t lpst_valid               =
-            1;  // assume valid until code determines invalid
-            
-        uint32_t valid_pdv_points = 0;  
-        uint8_t attr_pm_ivrms_enabled_wr = 0;
-        uint8_t attr_pm_ivrms_enabled_rd = 0;
-
-        double volt_int_vdd_bias = 1.0;
-        double volt_int_vcs_bias = 1.0;
-
-        uint32_t frequency_step_khz = 0;
-        uint32_t attr_mvpd_voltage_control[PV_D][PV_W];
-
-        ivrm_mvpd_t   ivrm_mvpd;
-
-        FAPI_INF("Executing p8_build_pstate_datablock ....");
-
-        do
-        {
-            // -----------------------------------------------------------
-            // Clear the PstateSuperStructure and install the magic number
-            // -----------------------------------------------------------
-            memset(io_pss, 0, sizeof(*io_pss));
-            (*io_pss).magic = revle64(PSTATE_SUPERSTRUCTURE_MAGIC);
-
-            // -------------------------
-            // get all attributes needed
-            // -------------------------
-            FAPI_IMP("Getting Attributes to build Pstate Superstructure");
-
-            l_rc = proc_get_attributes(i_target ,  &attr );
-
-            if (l_rc)
-            {
-                break;
-            }
-
-            // calculate pstate frequency step in Khz
-            frequency_step_khz = (attr.attr_freq_proc_refclock *
-                                  1000)/attr.attr_proc_dpll_divider;
-
-            // --------------------------------
-            // check chip ec feature attributes
-            // --------------------------------
-            if (attr.attr_proc_ec_core_hang_pulse_bug)
-            {
-                FAPI_INF("ATTR_PROC_EC_CORE_HANG_PULSE_BUG is set so disable iVRMs - setting PSTATE_NO_INSTALL_LPSA");
-                (*io_pss).gpst.options.options = revle32(revle32((*io_pss).gpst.options.options)
-                                                 |
-                                                 PSTATE_NO_INSTALL_LPSA);
-                poundm_valid = 0;
-                lpst_valid   = 0;
-            }
-
-            if (! attr.attr_chip_ec_feature_resonant_clk_valid)
-            {
-                FAPI_INF("ATTR_CHIP_EC_FEATURE_RESONANT_CLK_VALID is not set so disable resonant clocking - setting PSTATE_NO_INSTALL_RESCLK");
-                (*io_pss).gpst.options.options = revle32(revle32((*io_pss).gpst.options.options)
-                                                 |
-                                                 PSTATE_NO_INSTALL_RESCLK );
-            }
-
-            // ----------------
-            // get #V & #M data
-            // ----------------
-            FAPI_IMP("Getting #V & #M Data");
-
-            // clear array
-            memset(attr_mvpd_voltage_control, 0, sizeof(attr_mvpd_voltage_control));
-            memset(&ivrm_mvpd,                0, sizeof(ivrm_mvpd));
-
-            l_rc = proc_get_mvpd_data(  i_target,
-                                        &attr,
-                                        attr_mvpd_voltage_control,
-                                        &valid_pdv_points,
-                                        &ivrm_mvpd,
-                                        &present_chiplets,
-                                        &functional_chiplets,
-                                        &poundm_valid,
-                                        &poundm_ver);                                       
-            if (l_rc)
-            {
-                break;
-            }
-            else if (!present_chiplets)
-            {
-                FAPI_ERR("**** ERROR : There are no cores present");
-                const uint8_t &PRESENT_CHIPLETS = present_chiplets;
-                const Target  &CHIP_TARGET = i_target;
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_NO_CORES_PRESENT_ERROR);
-                break;
-            }
-
-            if (!functional_chiplets || !poundm_valid)
-            {
-
-                if (!functional_chiplets)
-                {
-                    FAPI_IMP("No FUNCTIONAL chiplets found - set PSTATE_NO_INSTALL_LPSA");
-                }
-                else
-                {
-                    FAPI_IMP("Invalid #M found - set PSTATE_NO_INSTALL_LPSA");
-                }
-
-                // indicate no LPST installed in PSS
-                (*io_pss).gpst.options.options = revle32(revle32((*io_pss).gpst.options.options)
-                                                 |
-                                                 PSTATE_NO_INSTALL_LPSA);
-            }
-
-            // ---------------------------------------------
-            // process external and internal bias attributes
-            // ---------------------------------------------
-            FAPI_IMP("Apply Biasing to #V");
-
-            l_rc = proc_get_extint_bias(attr_mvpd_voltage_control,
-                                        &attr,
-                                        &volt_int_vdd_bias,
-                                        &volt_int_vcs_bias);
-
-            if (l_rc)
-            {
-                break;
-            }
-
-
-            // -----------------------------------------------
-            // populate VpdOperatingPoint with biased MVPD attributes
-            // -----------------------------------------------
-            VpdOperatingPoint s132a_vpd[S132A_POINTS];
-
-            rc = load_mvpd_operating_point (attr_mvpd_voltage_control,
-                                            s132a_vpd);
-
-            // -------------------------------------------------------------------
-            // Create s132a_points and filled in by chip_characterization_create()
-            // -------------------------------------------------------------------
-            OperatingPoint s132a_points[S132A_POINTS];
-
-            // -------------------------------------------------
-            // populate OperatingPointParameters with attributes
-            // -------------------------------------------------
-
-            OperatingPointParameters s132a_parms;
-            s132a_parms.pstate0_frequency_khz = ((s132a_vpd[valid_pdv_points-1].frequency_mhz *
-                                                  1000) / frequency_step_khz) *
-                                                frequency_step_khz;
-                    // pstate0 is turbo rounded down and forced to be a multiple of freq_step_khz
-            s132a_parms.frequency_step_khz    =
-                frequency_step_khz;                // ATTR_REFCLK_FREQUENCY/ATTR_DPLL_DIVIDER
-            s132a_parms.vdd_load_line_uohm    = attr.attr_proc_r_loadline_vdd;
-            s132a_parms.vcs_load_line_uohm    = attr.attr_proc_r_loadline_vcs;
-            s132a_parms.vdd_distribution_uohm = attr.attr_proc_r_distloss_vdd;
-            s132a_parms.vcs_distribution_uohm = attr.attr_proc_r_distloss_vcs;
-            // SW267784
-            s132a_parms.vdd_voffset_uv = attr.attr_proc_vrm_voffset_vdd;
-            s132a_parms.vcs_voffset_uv = attr.attr_proc_vrm_voffset_vcs;
-
-
-            // --------------------------------------
-            // Create Chip characterization structure
-            // --------------------------------------
-
-            ChipCharacterization s132a_characterization;
-            s132a_characterization.vpd          = s132a_vpd;
-            s132a_characterization.ops          = s132a_points;
-            s132a_characterization.parameters   = &s132a_parms;
-            s132a_characterization.points       = valid_pdv_points;
-            s132a_characterization.max_cores    = present_chiplets;
-
-            // ---------------------------
-            // Finish the characterization
-            // ---------------------------
-            characterization = &s132a_characterization;
-
-            rc = chip_characterization_create(characterization,
-                                              characterization->vpd,
-                                              characterization->ops,
-                                              characterization->parameters,
-                                              characterization->points);
-
-            // check for error
-            int & CHAR_RETURN_CODE = rc;
-
-            if (rc == -GPST_INVALID_OBJECT)
-            {
-                FAPI_ERR("**** ERROR : chip_characterization_create was passed null pointer to characterization or characterization->parameters");
-                FAPI_SET_HWP_ERROR(l_rc,
-                                   RC_PROCPM_PSTATE_DATABLOCK_CHARACTERIZATION_OBJECT_ERROR);
-                break;
-            }
-            else if (rc == -GPST_INVALID_ARGUMENT)
-            {
-                uint32_t & POINTS  = characterization->points;
-                FAPI_ERR("**** ERROR : chip_characterization_create was passed null pointer to characterization->vpd or no points");
-                FAPI_SET_HWP_ERROR(l_rc,
-                                   RC_PROCPM_PSTATE_DATABLOCK_CHARACTERIZATION_ARGUMENT_ERROR);
-                break;
-            }
-            else if (rc)
-            {
-                FAPI_ERR("**** ERROR : chip_characterization_create returned error rc = %d",
-                         rc );
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_CHARACTERIZATION_ERROR);
-                break;
-            }
-
-            // Load the WOF information as this influences the generation
-            // of the Pstate tables
-            if (attr.attr_wof_enabled)
-            {
-                // -----------------------------------------------
-                // populate WOF structure with the biased VPD information
-                // -----------------------------------------------
-                l_rc = load_mvpd_operating_point (attr_mvpd_voltage_control,
-                                                io_pss->wof.operating_points);
-                if (l_rc)
-                {
-                    // No errors to handle at this time
-                }
-
-                // ----------------
-                // get IQ (IDDQ) data and place into the Pstate SuperStructure
-                // ----------------
-                FAPI_IMP("Getting IQ (IDDQ) Data");
-
-                l_rc = proc_get_mvpd_iddq(i_target, io_pss);
-                if (l_rc)
-                {
-                    // @todo add FFDC
-
-                    // Disable WOF and keep going
-                    FAPI_INF("**** WARNING:  While WOF was enabled via attributes, IDDQ information "
-                             "for the present part could not be obtained (either due to access error "
-                             "or is not present in the VPD.  WOF is being DISABLED but Pstate table "
-                             "generation is continuing");
-                    attr.attr_wof_enabled = 0;
-
-                }
-                else
-                {
-                    // -----------------------------------------------
-                    // populate WOF structure with the biased VPD information
-                    // -----------------------------------------------
-                    rc = load_wof_attributes (io_pss, &attr);
-                    if (l_rc)
-                    {
-                        // No errors to handle at this time
-                    }
-                }
-            }
-
-
-            // ------------------------------
-            // Create the Global Pstate table
-            // ------------------------------
-            FAPI_IMP("Creating Global Pstate Table");
-
-            rc = gpst_create(&((*io_pss).gpst),
-                             characterization,
-                             &((*io_pss).wof),
-                             PSTATE_STEPSIZE,
-                             EVRM_DELAY_NS);
-
-            FAPI_INF("GPST vpd pmin = %d  vpd pmax = %d  vpd points = %d",
-                     s132a_characterization.ops[0].pstate,
-                     s132a_characterization.ops[s132a_characterization.points - 1].pstate,
-                     s132a_characterization.points);
-            FAPI_INF("GPST pmin = %d  entries = %u", (*io_pss).gpst.pmin,
-                     (*io_pss).gpst.entries);
-            FAPI_INF("GPST refclock(Mhz) = %d  pstate0_freq(Khz) = %d  frequency_step(Khz) = %d",
-                     attr.attr_freq_proc_refclock, s132a_parms.pstate0_frequency_khz,
-                     s132a_parms.frequency_step_khz);
-
-            // check for error
-            int & GPST_RETURN_CODE = rc;
-
-            if (rc == -GPST_INVALID_OBJECT)
-            {
-                FAPI_ERR("**** ERROR : gpst_create was passed null pointer to gpst, characterization, or characterization->ops or characterization->points = 0");
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_GPST_CREATE_OBJECT_ERROR);
-                break;
-            }
-            else if (rc == -GPST_INVALID_ARGUMENT)
-            {
-                int32_t & OPS_PMIN           = s132a_characterization.ops[0].pstate;
-                int32_t & OPS_PMAX           =
-                    s132a_characterization.ops[s132a_characterization.points - 1].pstate;
-                FAPI_ERR("**** ERROR : gpst_create was passed bad argument and resulted in PSTATE limits error or operating point ordering error");
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_GPST_CREATE_ARGUMENT_ERROR);
-                break;
-            }
-            else if (rc == -GPST_INVALID_ENTRY)
-            {
-                FAPI_ERR("**** ERROR : gpst_entry_create was passed a voltage that was out of limits of vrm11 vid code or ivid vide code");
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_GPST_CREATE_ENTRY_ERROR);
-                break;
-            }
-            else if (rc)
-            {
-                FAPI_ERR("**** ERROR : gpst_create returned error rc = %d", rc );
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_GPST_CREATE_ERROR);
-                break;
-            }
-
-            // -----------------------------
-            // Boost the Global Pstate table
-            // -----------------------------
-            FAPI_IMP("Boost Global Pstate Table per CPM Boost Attribute");
-
-            l_rc = proc_boost_gpst (io_pss, attr.attr_cpm_turbo_boost_percent);
-
-            if (l_rc)
-            {
-                break;
-            }
-
-            // --------------------------------------------------------------------
-            // Setup psafe_pstate via attr_pm_safe_frequency (added per SW260812)
-            // --------------------------------------------------------------------
-            FAPI_INF("Setup psafe_pstate via attr_pm_safe_frequency");
-
-            l_rc = proc_upd_psafe_ps (io_pss, &attr);
-
-            if (l_rc)
-            {
-                break;
-            }
-
-            // --------------------------------------------------------------------
-            // Setup pmin_clip via attr_freq_core_floor (added per SW260911)
-            // --------------------------------------------------------------------
-            FAPI_INF("Setup pmin_clip via attr_freq_core_floor");
-
-            l_rc = proc_upd_floor_ps (io_pss, &attr);
-
-            if (l_rc)
-            {
-                break;
-            }
-
-            // -----------------------------
-            // Create the Local Pstate table
-            // -----------------------------
-            uint8_t vid_incr_gt7_nonreg = 0;
-
-            if (! attr.attr_proc_ec_core_hang_pulse_bug)
-            {
-                FAPI_IMP("Creating Local Pstate Table");
-
-                rc = lpst_create( &((*io_pss).gpst), &((*io_pss).lpsa), DEAD_ZONE_5MV,
-                                  volt_int_vdd_bias, volt_int_vcs_bias, &vid_incr_gt7_nonreg);
-
-                int & LPST_RETURN_CODE = rc;
-
-                if (rc == -LPST_INVALID_OBJECT)
-                {
-                    FAPI_ERR("**** ERROR : lpst_create was passed null pointer to gpst or lpsa");
-                    FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_LPST_CREATE_OBJECT_ERROR);
-                    break;
-                }
-                else if (rc == -IVID_INVALID_VOLTAGE)
-                {
-                    FAPI_ERR("**** ERROR : lpst_create attempted to convert an invalid voltage value to ivid format (GT 1.39375V or LT 0.6V");
-                    FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_LPST_CREATE_IVID_ERROR);
-                    break;
-                }
-                else if (rc == -LPST_INCR_CLIP_ERROR)
-                {
-                    FAPI_ERR("**** ERROR : lpst_create encountered a vid increment > 7 in regulation");
-                    FAPI_SET_HWP_ERROR(l_rc,
-                                       RC_PROCPM_PSTATE_DATABLOCK_LPST_CREATE_VID_INCR_CLIP_INREG_ERROR);
-                    break;
-                }
-                else if (rc == -LPST_GPST_WARNING)
-                {
-                    FAPI_IMP("No Local Pstate Generated  - Global Pstate Table is completely within Deadzone - set PSTATE_NO_INSTALL_LPSA" );
-
-                    // indicate no LPST installed in PSS
-                    (*io_pss).gpst.options.options = revle32(revle32((*io_pss).gpst.options.options)
-                                                     |
-                                                     PSTATE_NO_INSTALL_LPSA);
-                    lpst_valid = 0;
-                }
-                else if (rc)
-                {
-                    FAPI_ERR("**** ERROR : lpst_create returned error rc = %d", rc );
-                    FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_LPST_CREATE_ERROR);
-                    break;
-                }
-
-                // display warning message if this condition occurs
-                if (vid_incr_gt7_nonreg)
-                {
-                    FAPI_IMP("Warning : vid increment field was > 7 in non-regulation - clipped to 7 in lpst");
-                }
-
-            }
-
-            // -----------------------
-            // Create VDS & VIN tables
-            // -----------------------
-            FAPI_IMP("Create VDS & VIN Tables");
-
-            ivrm_parm_data_t        ivrm_parms;
-
-            // Set defaults
-            ivrm_parms.vin_min                   = 600;        // Minimum input voltage
-            ivrm_parms.vin_max                   = 1375;       // Maximum input voltage
-            ivrm_parms.vin_table_step_size       = 25;         // Granularity of Vin table entries
-            ivrm_parms.vin_table_setsperrow      = 4;          // Vin sets per Vds row
-            ivrm_parms.vin_table_pfetstrperset   = 8;          // PFET Strength values per Vin set
-            ivrm_parms.vout_min                  = 600;        // Minimum regulated output voltage
-            ivrm_parms.vout_max                  = 1200;       // Maximum regulated output voltage
-            ivrm_parms.vin_entries_per_vds       = 32;         // Vin array entries per vds region
-            ivrm_parms.vds_min_range_upper_bound = 100;        // Starting point for vds regions
-            ivrm_parms.vds_step_percent          = 25;         // vds region step muliplier
-            ivrm_parms.vds_region_entries        = 16;         // vds region array entries (in hardware)
-            ivrm_parms.pfetstr_default           = 0x11;       // Default PFET Strength with no calibration
-            ivrm_parms.positive_guardband        = 11;         // Plus side guardband (%)
-            ivrm_parms.negative_guardband        = 6;          // Negative side guardband (%)
-            ivrm_parms.number_of_coefficients    = 4;          // Number of coefficents in cal data
-            ivrm_parms.force_pfetstr_values      = 1;          // 0 - calculated; 1 = forced
-            ivrm_parms.forced_pfetstr_value      = 0x03;
-
-            // create vds
-            build_vds_region_table(&ivrm_parms, io_pss);
-
-            // loop over chiplets and find ones with valid data
-            // break after first valid chiplet since superstructure does not handle separate vin table for each chiplet
-            for (i = 0; i < CHIPLETS; i++)
-            {
-
-                if (ivrm_mvpd.data.ex[i].point_valid > 0)
-                {
-
-                    // perform least squares fit to get coefficients & then fill in VIN table
-                    fit_file(ivrm_parms.number_of_coefficients,
-                             ivrm_mvpd.header.version,
-                             ivrm_mvpd.data.ex[i].Coef,
-                             &(ivrm_mvpd.data.ex[i]) );
-
-                    write_HWtab_bin(&ivrm_parms,
-                                    ivrm_mvpd.data.ex[i].Coef,
-                                    io_pss);
-                    break;
-                }
-            }
-
-            // ---------------------------------------
-            // Update CPM Range info in Superstructure
-            // ---------------------------------------
-            FAPI_IMP("Creating CPM Range Table");
-
-            l_rc = proc_upd_cpmrange (io_pss, &attr);
-
-            if (l_rc)
-            {
-                break;
-            }
-
-            // -----------------------------------------------
-            // Update Resonant Clocking info in Superstructure
-            // -----------------------------------------------
-            if (attr.attr_chip_ec_feature_resonant_clk_valid)
-            {
-                FAPI_IMP("Creating Resonant Clocking Band Table");
-
-                l_rc = proc_res_clock (io_pss, &attr);
-
-                if (l_rc)
-                {
-                    break;
-                }
-            }
-
-            // ------------------------
-            // Force optional overrides
-            // ------------------------
-            FAPI_INF(" Set PSTATE_FORCE_INITIAL_PMIN in GPST control options");
-            (*io_pss).gpst.options.options = revle32(revle32((*io_pss).gpst.options.options)
-                                             | PSTATE_FORCE_INITIAL_PMIN);
-            FAPI_INF(" GPST control options mask is now: [%x].",
-                     (*io_pss).gpst.options.options);
-
-            //  -------------------
-            //  Attributes to write
-            //  -------------------
-            //  uint32_t ATTR_PM_PSTATE0_FREQUENCY // Binary in Khz
-            FAPI_IMP("Writing Attribute Values");
-
-            // check if IVRMs should be enabled
-            if (poundm_valid && lpst_valid
-                    &&                              // IVRMs should be enabled based on VPD findings
-                    attr.attr_pm_system_ivrms_enabled &&                       // Allowed by system
-                    (attr.attr_pm_system_ivrm_vpd_min_level != 0)
-                    &&           // Attribute has a valid value
-                    (attr.attr_pm_system_ivrm_vpd_min_level >= poundm_ver)
-                    &&  // Hardware characterized
-                    attr.attr_chip_ec_feature_ivrm_winkle_bug)                 // Hardware has logic fixes
-            {
-                attr_pm_ivrms_enabled_wr = 1;
-            }
-            else
-            {
-                attr_pm_ivrms_enabled_wr = 0;
-                FAPI_INF(" ATTR_PM_IVRMS_ENABLED will be set to 0 - set PSTATE_NO_INSTALL_LPSA");
-                // indicate no LPST installed in PSS
-                (*io_pss).gpst.options.options = revle32(revle32((*io_pss).gpst.options.options)
-                                                 |
-                                                 PSTATE_NO_INSTALL_LPSA);
-            }
-
-            // write ATTR_PM_IVRMS_ENABLED
-            SETATTR(l_rc, ATTR_PM_IVRMS_ENABLED, "ATTR_PM_IVRMS_ENABLED", &i_target,
-                    attr_pm_ivrms_enabled_wr);
-
-            // Read back attribute to see if overridden
-            GETATTR (l_rc, ATTR_PM_IVRMS_ENABLED, "ATTR_PM_IVRMS_ENABLED", &i_target,
-                     attr_pm_ivrms_enabled_rd);
-
-            if (attr_pm_ivrms_enabled_rd && !attr_pm_ivrms_enabled_wr)
-            {
-                FAPI_INF("WARNING : Attribute ATTR_PM_IVRMS_ENABLED was overridden to 1, but #V or #M data is not valid for IVRMs");
-            }
-            else if (!attr_pm_ivrms_enabled_rd && attr_pm_ivrms_enabled_wr)
-            {
-                FAPI_INF("WARNING : ATTR_PM_IVRMS_ENABLED was overriden to 0, but #V or #M data are valid - set PSTATE_NO_INSTALL_LPSA");
-                // indicate no LPST installed in PSS
-                (*io_pss).gpst.options.options = revle32(revle32((*io_pss).gpst.options.options)
-                                                 |
-                                                 PSTATE_NO_INSTALL_LPSA);
-            }
-
-        }
-        while(0);
-
-        return l_rc;
-    } // end p8_build_pstate_datablock
-
-/// -----------------------------------------------------------------------
-/// \brief Get needed attributes
-/// \param[in]    i_target          => Chip Target
-/// \param[inout] attr              => pointer to attribute list structure
-/// -----------------------------------------------------------------------
-
-    ReturnCode proc_get_attributes(const Target& i_target,
-                                   AttributeList *attr)
-    {
-        ReturnCode l_rc;
-        uint8_t i = 0;
-
-        do
-        {
-            // --------------------------
-            // attributes not yet defined
-            // --------------------------
-            attr->attr_dpll_bias                 = 0;
-            attr->attr_undervolting              = 0;
-
-            // ---------------------------------------------------------------
-            // set ATTR_PROC_DPLL_DIVIDER
-            // ---------------------------------------------------------------
-            attr->attr_proc_dpll_divider = 4;
-            FAPI_INF("ATTR_PROC_DPLL_DIVIDER - set to %x", attr->attr_proc_dpll_divider);
-
-            l_rc = FAPI_ATTR_SET(ATTR_PROC_DPLL_DIVIDER, &i_target,
-                                 attr->attr_proc_dpll_divider );
-
-            if  (l_rc )
-            {
-                FAPI_ERR("fapiSetAttribute of ATTR_PROC_DPLL_DIVIDER failed");
-                break;
-            }
-
-            // ----------------------------
-            // attributes currently defined
-            // ----------------------------
-#define DATABLOCK_GET_ATTR(attr_name, target, attr_assign) \
-            l_rc = FAPI_ATTR_GET(attr_name, target, attr->attr_assign); \
-            if (l_rc) break; \
-            FAPI_INF("%-60s = 0x%08x %u", #attr_name, attr->attr_assign, attr->attr_assign);
-
-            // This macro is in place to to deal with the movement of attribute placement
-            // from SYSTEM to PROC_CHIP per SW298278 while allowing for this procedure
-            // to still operate in system that continue store attributes at the SYSTEM level.
-            // This is done by trying the passed target first; if it doesn't succeed, the
-            // SYSTEM level is attempted.  Failure of both will cause a break.
-#define DATABLOCK_GET_ATTR_CHECK_PROC(attr_name, target, attr_assign) \
-            l_rc = FAPI_ATTR_GET(attr_name, target, attr->attr_assign); \
-            if (!l_rc) { \
-                FAPI_INF("%-60s = 0x%08x %u from PROC_CHIP target", #attr_name, attr->attr_assign, attr->attr_assign); \
-            } \
-            else { \
-                FAPI_INF("Accessing %s as the passed target did not succeed.  Trying from the SYSTEM target", #attr_name); \
-                l_rc = FAPI_ATTR_GET(attr_name, NULL, attr->attr_assign); \
-                if (!l_rc) { \
-                    FAPI_INF("%-60s = 0x%08x %u from SYSTEM target", #attr_name, attr->attr_assign, attr->attr_assign); \
-                } \
-                else { \
-                    FAPI_ERR("%-60s access failed after trying both PROC_CHIP and SYSTEM targets", #attr_name ); \
-                    break; \
-                } \
-            }
-                       
-            DATABLOCK_GET_ATTR(ATTR_FREQ_EXT_BIAS_UP,
-                               &i_target, attr_freq_ext_bias_up);
-            DATABLOCK_GET_ATTR(ATTR_FREQ_EXT_BIAS_DOWN,
-                               &i_target, attr_freq_ext_bias_down);
-            DATABLOCK_GET_ATTR(ATTR_VOLTAGE_EXT_VDD_BIAS_UP,
-                               &i_target, attr_voltage_ext_vdd_bias_up);
-            DATABLOCK_GET_ATTR(ATTR_VOLTAGE_EXT_VCS_BIAS_UP,
-                               &i_target, attr_voltage_ext_vcs_bias_up);
-            DATABLOCK_GET_ATTR(ATTR_VOLTAGE_EXT_VDD_BIAS_DOWN,
-                               &i_target, attr_voltage_ext_vdd_bias_down);
-            DATABLOCK_GET_ATTR(ATTR_VOLTAGE_EXT_VCS_BIAS_DOWN,
-                               &i_target, attr_voltage_ext_vcs_bias_down);
-            DATABLOCK_GET_ATTR(ATTR_VOLTAGE_INT_VDD_BIAS_UP,
-                               &i_target, attr_voltage_int_vdd_bias_up);
-            DATABLOCK_GET_ATTR(ATTR_VOLTAGE_INT_VCS_BIAS_UP,
-                               &i_target, attr_voltage_int_vcs_bias_up);
-            DATABLOCK_GET_ATTR(ATTR_VOLTAGE_INT_VDD_BIAS_DOWN,
-                               &i_target, attr_voltage_int_vdd_bias_down);
-            DATABLOCK_GET_ATTR(ATTR_VOLTAGE_INT_VCS_BIAS_DOWN,
-                               &i_target, attr_voltage_int_vcs_bias_down);
-            DATABLOCK_GET_ATTR(ATTR_FREQ_PROC_REFCLOCK,
-                               NULL,      attr_freq_proc_refclock);
-            DATABLOCK_GET_ATTR(ATTR_FREQ_CORE_MAX,
-                               NULL,      attr_freq_core_max);
-            DATABLOCK_GET_ATTR(ATTR_PM_SAFE_FREQUENCY,
-                               NULL,      attr_pm_safe_frequency);
-            DATABLOCK_GET_ATTR(ATTR_FREQ_CORE_FLOOR,
-                               NULL,      attr_freq_core_floor);
-            DATABLOCK_GET_ATTR(ATTR_BOOT_FREQ_MHZ,
-                               NULL,      attr_boot_freq_mhz);
-            DATABLOCK_GET_ATTR(ATTR_CPM_TURBO_BOOST_PERCENT,
-                               NULL,      attr_cpm_turbo_boost_percent);
-
-            DATABLOCK_GET_ATTR_CHECK_PROC(ATTR_PROC_R_LOADLINE_VDD,
-                                          &i_target, attr_proc_r_loadline_vdd);
-            DATABLOCK_GET_ATTR_CHECK_PROC(ATTR_PROC_R_LOADLINE_VCS,
-                                          &i_target, attr_proc_r_loadline_vcs);
-            DATABLOCK_GET_ATTR_CHECK_PROC(ATTR_PROC_R_DISTLOSS_VDD,
-                                          &i_target, attr_proc_r_distloss_vdd);
-            DATABLOCK_GET_ATTR_CHECK_PROC(ATTR_PROC_R_DISTLOSS_VCS,
-                                          &i_target, attr_proc_r_distloss_vcs);
-            DATABLOCK_GET_ATTR_CHECK_PROC(ATTR_PROC_VRM_VOFFSET_VDD,
-                                          &i_target, attr_proc_vrm_voffset_vdd);
-            DATABLOCK_GET_ATTR_CHECK_PROC(ATTR_PROC_VRM_VOFFSET_VCS,
-                                          &i_target, attr_proc_vrm_voffset_vcs);
-
-            DATABLOCK_GET_ATTR(ATTR_PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY,
-                               NULL,      attr_pm_resonant_clock_full_clock_sector_buffer_frequency);
-            DATABLOCK_GET_ATTR(ATTR_PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY,
-                               NULL,      attr_pm_resonant_clock_low_band_lower_frequency);
-            DATABLOCK_GET_ATTR(ATTR_PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY,
-                               NULL,      attr_pm_resonant_clock_low_band_upper_frequency);
-            DATABLOCK_GET_ATTR(ATTR_PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY,
-                               NULL,      attr_pm_resonant_clock_high_band_lower_frequency);
-            DATABLOCK_GET_ATTR(ATTR_PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY,
-                               NULL,      attr_pm_resonant_clock_high_band_upper_frequency);
-
-            // Read array attribute
-            l_rc = FAPI_ATTR_GET(ATTR_CPM_INFLECTION_POINTS, &i_target,
-                                 attr->attr_cpm_inflection_points);
-
-            if (l_rc)
-            {
-                break;
-            }
-
-            for (i = 0; i < 16; i++)
-            {
-                FAPI_INF("ATTR_CPM_INFLECTION_POINTS(%d) = 0x%08x %u",i,
-                         attr->attr_cpm_inflection_points[i], attr->attr_cpm_inflection_points[i]);
-            }
-
-            // Read chip ec feature
-            DATABLOCK_GET_ATTR(ATTR_CHIP_EC_FEATURE_RESONANT_CLK_VALID, &i_target,
-                               attr_chip_ec_feature_resonant_clk_valid);
-            DATABLOCK_GET_ATTR(ATTR_PROC_EC_CORE_HANG_PULSE_BUG       , &i_target,
-                               attr_proc_ec_core_hang_pulse_bug);
-            DATABLOCK_GET_ATTR(ATTR_CHIP_EC_FEATURE_IVRM_WINKLE_BUG   , &i_target,
-                               attr_chip_ec_feature_ivrm_winkle_bug);
-
-            // Read IVRM attributes
-            DATABLOCK_GET_ATTR(ATTR_PM_SYSTEM_IVRMS_ENABLED           , NULL,
-                               attr_pm_system_ivrms_enabled);
-            DATABLOCK_GET_ATTR(ATTR_PM_SYSTEM_IVRM_VPD_MIN_LEVEL      , NULL,
-                               attr_pm_system_ivrm_vpd_min_level);
-
-            // Read WOF attributes
-            DATABLOCK_GET_ATTR(ATTR_WOF_ENABLED                       , NULL,
-                               attr_wof_enabled);
-            DATABLOCK_GET_ATTR(ATTR_TDP_RDP_CURRENT_FACTOR            , &i_target,
-                               attr_tdp_rdp_current_factor);
-
-            // --------------------------------------------------------------
-            // do basic attribute value checking and generate error if needed
-            // --------------------------------------------------------------
-
-            //check that dpll_divider is not 0
-            if (attr->attr_proc_dpll_divider == 0)
-            {
-                FAPI_ERR("**** ERROR : Attribute ATTR_PROC_DPLL_DIVIDER = 0");
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_ATTR_DPLL_DIV_ERROR);
-                break;
-            }
-
-            // ----------------------------------------------------
-            // Check Valid Frequency and Voltage Biasing Attributes
-            //  - cannot have both up and down bias set
-            // ----------------------------------------------------
-            if (attr->attr_freq_ext_bias_up > 0 && attr->attr_freq_ext_bias_down > 0)
-            {
-                FAPI_ERR("**** ERROR : Frequency bias up and down both defined");
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_FREQ_BIAS_ERROR);
-                break;
-            }
-
-            if (attr->attr_voltage_ext_vdd_bias_up > 0
-                    && attr->attr_voltage_ext_vdd_bias_down > 0)
-            {
-                FAPI_ERR("**** ERROR : External voltage bias up and down both defined");
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_EXT_VDD_VOLTAGE_BIAS_ERROR);
-                break;
-            }
-
-            if (attr->attr_voltage_ext_vcs_bias_up > 0
-                    && attr->attr_voltage_ext_vcs_bias_down > 0)
-            {
-                FAPI_ERR("**** ERROR : External voltage bias up and down both defined");
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_EXT_VCS_VOLTAGE_BIAS_ERROR);
-                break;
-            }
-
-            if (attr->attr_voltage_int_vdd_bias_up > 0
-                    && attr->attr_voltage_int_vdd_bias_down > 0)
-            {
-                FAPI_ERR("**** ERROR : Internal voltage bias up and down both defined");
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_INT_VDD_VOLTAGE_BIAS_ERROR);
-                break;
-            }
-
-            if (attr->attr_voltage_int_vcs_bias_up > 0
-                    && attr->attr_voltage_int_vcs_bias_down > 0)
-            {
-                FAPI_ERR("**** ERROR : Internal voltage bias up and down both defined");
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_INT_VCS_VOLTAGE_BIAS_ERROR);
-                break;
-            }
-
-            // print debug message if double biasing is enabled
-            if ( (attr->attr_voltage_ext_vdd_bias_up + attr->attr_voltage_ext_vdd_bias_down
-                    > 0) &&
-                    (attr->attr_voltage_int_vdd_bias_up + attr->attr_voltage_int_vdd_bias_down >
-                     0) )
-            {
-                FAPI_INF("Double Biasing enabled on external and internal VDD");
-            }
-
-            if ( (attr->attr_voltage_ext_vcs_bias_up + attr->attr_voltage_ext_vcs_bias_down
-                    > 0) &&
-                    (attr->attr_voltage_int_vcs_bias_up + attr->attr_voltage_int_vcs_bias_down >
-                     0) )
-            {
-                FAPI_INF("Double Biasing enabled on external and internal VCS");
-            }
-
-            // check resonant clocking attribute values relative to each other
-            if (attr->attr_chip_ec_feature_resonant_clk_valid)
-            {
-
-                if ( (attr->attr_pm_resonant_clock_low_band_lower_frequency  >
-                        attr->attr_pm_resonant_clock_low_band_upper_frequency) ||
-                        (attr->attr_pm_resonant_clock_low_band_upper_frequency  >
-                         attr->attr_pm_resonant_clock_high_band_lower_frequency) ||
-                        (attr->attr_pm_resonant_clock_high_band_lower_frequency >
-                         attr->attr_pm_resonant_clock_high_band_upper_frequency) )
-                {
-                    const uint32_t &PM_RES_CLOCK_LOW_BAND_LOWER_FREQ =
-                        attr->attr_pm_resonant_clock_low_band_lower_frequency;
-                    const uint32_t &PM_RES_CLOCK_LOW_BAND_UPPER_FREQ =
-                        attr->attr_pm_resonant_clock_low_band_upper_frequency;
-                    const uint32_t &PM_RES_CLOCK_HIGH_BAND_LOWER_FREQ =
-                        attr->attr_pm_resonant_clock_high_band_lower_frequency;
-                    const uint32_t &PM_RES_CLOCK_HIGH_BAND_UPPER_FREQ =
-                        attr->attr_pm_resonant_clock_high_band_upper_frequency;
-                    FAPI_ERR("**** ERROR : Resonant clocking band attribute values are not in ascending order from low to high");
-                    FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_RESCLK_BAND_ERROR);
-                    break;
-                }
-            }
-
-            // ------------------------------------------------------
-            // do attribute default value setting if the are set to 0
-            // ------------------------------------------------------
-            if (attr->attr_freq_proc_refclock == 0)
-            {
-                attr->attr_freq_proc_refclock = 133;
-                FAPI_INF("Attribute value was 0 - setting to default value ATTR_FREQ_PROC_REFCLOCK = 133");
-            }
-
-            if (attr->attr_proc_dpll_divider == 0)
-            {
-                attr->attr_proc_dpll_divider = 4;
-                FAPI_INF("Attribute value was 0 - setting to default value ATTR_PROC_DPLL_DIVIDER = 4");
-            }
-
-            if (attr->attr_pm_safe_frequency  == 0)
-            {
-                attr->attr_pm_safe_frequency = attr->attr_boot_freq_mhz;
-                FAPI_INF("Attribute value was 0 - setting to default value ATTR_PM_SAFE_FREQUENCY = ATTR_BOOT_FREQ_MHZ");
-            }
-
-            if (attr->attr_proc_r_loadline_vdd == 0)
-            {
-                attr->attr_proc_r_loadline_vdd = 570;
-                FAPI_INF("Attribute value was 0 - setting to default value ATTR_PROC_R_LOADLINE_VDD = 570");
-            }
-
-            if (attr->attr_proc_r_loadline_vcs == 0)
-            {
-                attr->attr_proc_r_loadline_vcs = 570;
-                FAPI_INF("Attribute value was 0 - setting to default value ATTR_PROC_R_LOADLINE_VCS = 570");
-            }
-
-            if (attr->attr_proc_r_distloss_vdd == 0)
-            {
-                attr->attr_proc_r_distloss_vdd = 390;
-                FAPI_INF("Attribute value was 0 - setting to default value ATTR_PROC_R_DISTLOSS_VDD = 390");
-            }
-
-            if (attr->attr_proc_r_distloss_vcs == 0)
-            {
-                attr->attr_proc_r_distloss_vcs = 3500;
-                FAPI_INF("Attribute value was 0 - setting to default value ATTR_PROC_R_DISTLOSS_VCS = 3500");
-            }
-
-        }
-        while(0);
-
-        return l_rc;
-    }
-
-/// ----------------------------------------------------------------
-/// \brief Get #V data and put into array
-/// \param[in]    i_target          => Chip Target
-/// \param[inout] attr_mvpd_data    => 5x5 array to hold the #V data
-/// ----------------------------------------------------------------
-
-    ReturnCode proc_get_mvpd_data(const Target& i_target,
-                                  AttributeList *i_attr,
-                                  uint32_t      attr_mvpd_data[PV_D][PV_W],
-                                  uint32_t      *valid_pdv_points,
-                                  ivrm_mvpd_t   *ivrm_mvpd,
-                                  uint8_t       *present_chiplets,
-                                  uint8_t       *functional_chiplets,
-                                  uint8_t       *poundm_valid,
-                                  uint8_t       *poundm_ver)
-    {
-        ReturnCode l_rc;
-        std::vector<fapi::Target>       l_exChiplets;
-        uint8_t                         l_functional = 0;
-        uint8_t *  l_buffer         =  reinterpret_cast<uint8_t *>(malloc(PDV_BUFFER_ALLOC) );
-        uint8_t *  l_buffer_pdm     =  reinterpret_cast<uint8_t *>(malloc(PDM_BUFFER_ALLOC) );
-        uint8_t *  l_buffer_inc;
-        uint8_t *  l_buffer_pdm_inc;
-        uint32_t   l_bufferSize     = 512;
-        uint32_t   l_bufferSize_pdm = 512;
-        uint32_t   l_record         = 0;
-        uint32_t   chiplet_mvpd_data[PV_D][PV_W];
-        uint8_t    j                = 0;
-        uint8_t    i                = 0;
-        uint8_t    ii               = 0;
-        uint8_t    first_chplt      = 1;
-        uint8_t    bucket_id        = 0;
-        uint16_t   cal_data[POUNDM_MEASUREMENTS_PER_POINT];
-
-
-        do
-        {
-            // initialize
-            *present_chiplets    = 0;
-            *functional_chiplets = 0;
-
-            // -----------------------------------------------------------------
-            // get list of chiplets and loop over each and get #V data from each
-            // -----------------------------------------------------------------
-            // check that frequency is the same per chiplet
-            // for voltage, get the max for use for the chip
-
-            l_rc = fapiGetChildChiplets (i_target, TARGET_TYPE_EX_CHIPLET, l_exChiplets,
-                                         TARGET_STATE_PRESENT);
-
-            if (l_rc)
-            {
-                FAPI_ERR("Error from fapiGetChildChiplets!");
-                break;
-            }
-
-            *present_chiplets = l_exChiplets.size();
-            FAPI_INF("Number of EX chiplets present => %u", *present_chiplets);
-
-            for (j=0; j < l_exChiplets.size(); j++)
-            {
-
-                l_bufferSize      = 512;
-                l_bufferSize_pdm  = 512;
-                uint8_t l_chipNum = 0xFF;
-
-                l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_chipNum);
-
-                if (l_rc)
-                {
-                    FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error");
-                    break;
-                }
-
-                // set l_record to appropriate lprx record (add core number to lrp0)
-                l_record = (uint32_t)fapi::MVPD_RECORD_LRP0 + l_chipNum;
-
-                // clear out buffer to known value before calling fapiGetMvpdField
-                memset(l_buffer, 0, 512);
-
-                // Get Chiplet MVPD data and put in chiplet_mvpd_data using accessor function
-                l_rc = fapiGetMvpdField((fapi::MvpdRecord)l_record,
-                                        fapi::MVPD_KEYWORD_PDV,
-                                        i_target,
-                                        l_buffer,
-                                        l_bufferSize);
-
-                if (!l_rc.ok())
-                {
-                    FAPI_ERR("**** ERROR : Unexpected error encountered in fapiGetMvpdField");
-                    break;
-                }
-
-                // check buffer size
-                if (l_bufferSize < PDV_BUFFER_SIZE)
-                {
-                    FAPI_ERR("**** ERROR : Wrong size buffer returned from fapiGetMvpdField for #V => %d",
-                             l_bufferSize );
-                    const uint32_t &BUFFER_SIZE = l_bufferSize;
-                    const Target  &CHIP_TARGET= i_target;
-                    FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_PDV_BUFFER_SIZE_ERROR);
-                    break;
-                }
-
-                // clear array
-                memset(chiplet_mvpd_data, 0, sizeof(chiplet_mvpd_data));
-
-                // fill chiplet_mvpd_data 2d array with data iN buffer (skip first byte - bucket id)
-#define UINT16_GET(__uint8_ptr)   ((uint16_t)( ( (*((const uint8_t *)(__uint8_ptr)) << 8) | *((const uint8_t *)(__uint8_ptr) + 1) ) ))
-
-                // use copy of allocated buffer pointer to increment through buffer
-                l_buffer_inc = l_buffer;
-
-                bucket_id = *l_buffer_inc;
-                l_buffer_inc++;
-
-                FAPI_INF("#V chiplet = %u bucket id = %u", l_chipNum, bucket_id);
-
-                for (i=0; i<=4; i++)
-                {
-
-                    for (ii=0; ii<=4; ii++)
-                    {
-                        chiplet_mvpd_data[i][ii] = (uint32_t) UINT16_GET(l_buffer_inc);
-                        FAPI_INF("#V data = 0x%04X  %-6d", chiplet_mvpd_data[i][ii],
-                                 chiplet_mvpd_data[i][ii]);
-                        // increment to next MVPD value in buffer
-                        l_buffer_inc+= 2;
-                    }
-                }
-
-                // perform data validity checks on this #V data before proceeding to use it
-                l_rc = proc_chk_valid_poundv(   i_target,
-                                                i_attr,
-                                                chiplet_mvpd_data,
-                                                valid_pdv_points,
-                                                l_chipNum,
-                                                bucket_id);
-
-                if (l_rc == RC_PROCPM_PSTATE_DATABLOCK_PDV_ZERO_DATA_UT_ERROR)
-                {
-                    // Disable WOF
-                    i_attr->attr_wof_enabled = 0;
-                }
-                else if (l_rc)
-                {
-                    break;
-                }
-
-                // on first chiplet put each bucket's data into attr_mvpd_voltage_control
-                if (first_chplt)
-                {
-
-                    for (i=0; i<=4; i++)
-                    {
-
-                        for (ii=0; ii<=4; ii++)
-                        {
-                            attr_mvpd_data[i][ii] = chiplet_mvpd_data[i][ii];
-                        }
-                    }
-
-                    first_chplt = 0;
-                }
-                else
-                {
-                    // on subsequent chiplets, check that frequencies are same for each operating point for each chiplet
-                    if ( (attr_mvpd_data[0][0] != chiplet_mvpd_data[0][0]) ||
-                            (attr_mvpd_data[1][0] != chiplet_mvpd_data[1][0]) ||
-                            (attr_mvpd_data[2][0] != chiplet_mvpd_data[2][0]) ||
-                            (attr_mvpd_data[3][0] != chiplet_mvpd_data[3][0]) ||
-                            (attr_mvpd_data[4][0] != chiplet_mvpd_data[4][0]) )
-                    {
-                        const uint32_t &ATTR_MVPD_DATA_0 = attr_mvpd_data[0][0];
-                        const uint32_t &ATTR_MVPD_DATA_1 = attr_mvpd_data[1][0];
-                        const uint32_t &ATTR_MVPD_DATA_2 = attr_mvpd_data[2][0];
-                        const uint32_t &ATTR_MVPD_DATA_3 = attr_mvpd_data[3][0];
-                        const uint32_t &ATTR_MVPD_DATA_4 = attr_mvpd_data[4][0];
-                        FAPI_ERR("**** ERROR : frequencies are not the same for each operating point for each chiplet");
-                        const Target  &CHIP_TARGET= i_target;
-                        FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_MVPD_CHIPLET_VOLTAGE_NOT_EQUAL);
-                        break;
-                    }
-                }
-
-                // check each bucket for max voltage and if max, put bucket's data into attr_mvpd_voltage_control
-                for (i=0; i <= 4; i++)
-                {
-
-                    if (attr_mvpd_data[i][1] < chiplet_mvpd_data[i][1])
-                    {
-                        attr_mvpd_data[i][0] = chiplet_mvpd_data[i][0];
-                        attr_mvpd_data[i][1] = chiplet_mvpd_data[i][1];
-                        attr_mvpd_data[i][2] = chiplet_mvpd_data[i][2];
-                        attr_mvpd_data[i][3] = chiplet_mvpd_data[i][3];
-                        attr_mvpd_data[i][4] = chiplet_mvpd_data[i][4];
-                    }
-                }
-
-                // --------------------------------------------
-                // Process #M Data
-                // --------------------------------------------
-
-                // Determine if present chiplet is functional
-                l_rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &l_exChiplets[j], l_functional);
-
-                if (l_rc)
-                {
-                    FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error");
-                    break;
-                }
-
-                if ( l_functional )
-                {
-                    *functional_chiplets = 1;
-
-                    // clear out buffer to known value before calling fapiGetMvpdField
-                    memset(l_buffer_pdm, 0, PDM_BUFFER_ALLOC);
-
-                    // Get Chiplet #M MVPD data
-                    l_rc = fapiGetMvpdField((fapi::MvpdRecord)l_record,
-                                            fapi::MVPD_KEYWORD_PDM,
-                                            i_target,
-                                            l_buffer_pdm,
-                                            l_bufferSize_pdm);
-
-                    if (!l_rc.ok())
-                    {
-                        FAPI_INF("**** Warning : Unexpected error encountered in fapiGetMvpdField - IVRMs will not be enabled");
-                        *poundm_valid = 0;
-                    }
-
-                    // check buffer size
-                    if (l_bufferSize_pdm < PDM_BUFFER_SIZE)
-                    {
-                        FAPI_ERR("**** ERROR : Wrong size buffer returned from fapiGetMvpdField for #M from LRP%u => %d vs expected %d",
-                                 l_chipNum, l_bufferSize_pdm,  PDM_BUFFER_SIZE);
-                        const uint32_t &BUFFER_SIZE = l_bufferSize;
-                        const Target  &CHIP_TARGET= i_target;
-                        FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_PDM_BUFFER_SIZE_ERROR);
-                        break;
-                    }
-
-                    // use copy of allocated buffer pointer to increment through buffer
-                    l_buffer_pdm_inc = l_buffer_pdm;
-
-                    // get #M version and advance pointer 1-byte to beginning of #M data
-                    *poundm_ver = *l_buffer_pdm_inc;
-                    ivrm_mvpd->header.version = *poundm_ver ;
-                    l_buffer_pdm_inc++;
-
-                    // loop over 13 entries of #M data with 4 measurements per entry
-                    FAPI_INF("#M chiplet = %u  version = %u", l_chipNum, *poundm_ver);
-
-                    for (i=0; i < POUNDM_POINTS; i++)
-                    {
-
-                        for (ii=0; ii<POUNDM_MEASUREMENTS_PER_POINT; ii++)
-                        {
-                            cal_data[ii] = UINT16_GET(l_buffer_pdm_inc);
-
-                            if (*poundm_ver == 2)
-                            {
-                                l_buffer_pdm_inc+= 4;
-                            }
-                            else
-                            {
-                                l_buffer_pdm_inc+= 2;
-                            }
-
-                        }
-
-                        ivrm_mvpd->data.ex[j].point[i].gate_voltage   = cal_data[0];
-                        ivrm_mvpd->data.ex[j].point[i].drain_voltage  = cal_data[1];
-                        ivrm_mvpd->data.ex[j].point[i].source_voltage = cal_data[2];
-                        ivrm_mvpd->data.ex[j].point[i].drain_current  = cal_data[3];
-
-                        FAPI_INF("#M data (hex & dec) = 0x%04x 0x%04x 0x%04x 0x%04x    %5u %5u %5u %5u",
-                                 cal_data[0], cal_data[1], cal_data[2], cal_data[3], cal_data[0], cal_data[1],
-                                 cal_data[2], cal_data[3]);
-
-                        // #M validity check - not valid if measurements are 0 (exception : cal_data[0](Vg) can be 0)
-                        if (cal_data[1] == 0 || cal_data[2] == 0 || cal_data[3] == 0 )
-                        {
-                            FAPI_INF("**** Warning : #M has zero valued measurements - IVRMs will not be enabled");
-                            *poundm_valid = 0;
-                        }
-
-                    }
-
-                    // set number of samples
-                    ivrm_mvpd->data.ex[j].point_valid = POUNDM_POINTS;
-                } // end functional
-
-            } // end for loop
-
-
-        }
-        while(0);
-
-        free (l_buffer);
-        free (l_buffer_pdm);
-
-        return l_rc;
-
-    } // end proc_get_mvpd_data
-
-/// ----------------------------------------------------------------
-/// \brief Get IQ (IDDQ) data and put into array
-/// \param[in]    i_target          => Chip Target
-/// \param[inout] attr_mvpd_iddq    => 24 x 16 array to hold the IQ data
-/// ----------------------------------------------------------------
-
-    ReturnCode proc_get_mvpd_iddq(const Target&         i_target,
-                                  PstateSuperStructure *pss)
-    {
-        ReturnCode      l_rc;
-        uint8_t *       l_buffer_iq =  reinterpret_cast<uint8_t *>(malloc(IQ_BUFFER_ALLOC));
-        uint8_t *       l_buffer_iq_c  =  reinterpret_cast<uint8_t *>(malloc(IQ_BUFFER_ALLOC));
-
-        uint8_t *       l_buffer_iq_inc;
-        uint32_t        l_bufferSize_iq  = IQ_BUFFER_ALLOC;
-        uint32_t        l_record         = 0;
-        uint32_t        l_lrp_record     = 0;
-        IddqReading *   l_iddq_reading;
-        uint32_t        c                = 0;
-
-
-        const uint8_t   vdd_measurement_order[LRP_IDDQ_RECORDS] =
-            CORE_IDDQ_MEASUREMENTS_ORDER;
-        const char *    core_measurement_str[LRP_IDDQ_RECORDS] =
-            CORE_IDDQ_MEASUREMENT_VOLTAGES;
-        const uint8_t   vcs_measurement_order[LRP_IDDQ_RECORDS] =
-            CORE_IDDQ_MEASUREMENTS_ORDER;
-        const uint8_t   core_validity_check[LRP_IDDQ_RECORDS] =
-            CORE_IDDQ_VALIDITY_CHECK;
-        const uint8_t   core_second_reading_valid[LRP_IDDQ_RECORDS] =
-            CORE_IDDQ_VALID_SECOND;
-            
-        const char *    chip_measurement_str[CRP_IDDQ_RECORDS] =
-            CHIP_IDDQ_MEASUREMENT_VOLTAGES;
-        const uint8_t   vio_measurement_order[CRP_IDDQ_RECORDS] = 
-            CHIP_IDDQ_MEASUREMENTS_ORDER;
-        
-
-        // --------------------------------------------
-        // Process IQ (IDD) Data
-        // --------------------------------------------
-
-        // This extraction is not done based on functional or present EX chiplets
-        // as the chip level IDDQ values are stored in LRPx records as matter of
-        // available data storage locations;  they are NOT associated with the
-        // EX chiplets themselves.
-
-        // The chip level readings are stored as follows:
-        //     LRP 1 1 Vdd 0.90 Raw
-        //     LRP 1 2 Vdd 0.90 Temp corrected
-        //     LRP 1 3 Vcs 0.90 Raw
-        //     LRP 1 4 Vcs 0.90 Temp corrected
-        //     LRP 2 1 Vdd 1.00 Raw
-        //     LRP 2 2 Vdd 1.00 Temp corrected
-        //     LRP 2 3 Vcs 1.00 Raw
-        //     LRP 2 4 Vcs 1.00 Temp corrected
-        //     LRP 3 1 Vdd 1.10 Raw
-        //     LRP 3 2 Vdd 1.10 Temp corrected
-        //     LRP 3 3 Vcs 1.10 Raw
-        //     LRP 3 4 Vcs 1.10 Temp corrected
-        //     LRP 4 1 Vdd 1.20 Raw
-        //     LRP 4 2 Vdd 1.20 Temp corrected
-        //     LRP 4 3 Vcs 1.20 Raw
-        //     LRP 4 4 Vcs 1.20 Temp corrected
-        //     LRP 5 1 Vdd 1.25 Raw
-        //     LRP 5 2 Vdd 1.25 Temp corrected
-        //     LRP 5 3 Vcs 1.25 Raw
-        //     LRP 5 4 Vcs 1.25 Temp corrected
-        //     LRP 6 1 Vdd 0.80 Raw
-        //     LRP 6 2 Vdd 0.80 Temp corrected
-        //     CRP 0 1 Vio 1.10 Raw
-        //     CRP 0 2 Vio 1.10 Temp corrected
-        //
-        // Note: Vcs never gets to 0.80V. Therefore LRP 6 does not have Vcss.
-        //
-        // Each entry is 2 bytes. The values are in 10mA units; this allow for a
-        // maximum value of 655.36A represented.
-        //
-        // Temp corrected value = Raw value * (1.25^((60C - OCTS_avg_temp)/10)
-        //
-        // Buffer size needed is, at minimum   2B x 24 = 48B.
-
-        do
-        {
-            FAPI_INF("Processing LRPx records for IDDQ keywords");
-            for (c = 0; c < LRP_IDDQ_RECORDS; ++c)
-            {
-                // clear out buffer to known value before calling fapiGetMvpdField
-                memset(l_buffer_iq, 0, IQ_BUFFER_ALLOC);
-
-                l_lrp_record = c+1;
-
-                // set l_record to appropriate lprx record (add core number to lrp0)
-                // Note: Index in the loop are zero origin while the LRP records start at 1
-                l_record = (uint32_t)fapi::MVPD_RECORD_LRP0 + l_lrp_record;
-
-                // Get Chiplet IQ MVPD data from the LRP recoreds
-                l_rc = fapiGetMvpdField((fapi::MvpdRecord)l_record,
-                                        fapi::MVPD_KEYWORD_IQ,
-                                        i_target,
-                                        l_buffer_iq,
-                                        l_bufferSize_iq);
-
-                if (!l_rc.ok())
-                {
-                    FAPI_ERR("**** Error: fapiGetMvpdField from LRP%u", l_lrp_record);
-                    const uint32_t &CHIPLET_NUMBER = vdd_measurement_order[c];
-                    const Target  &CHIP_TARGET= i_target;
-                    FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_IQ_MVPD_ERROR);
-                    break;
-                }
-
-                // check buffer size
-                if (l_bufferSize_iq < IQ_BUFFER_SIZE)
-                {
-                    FAPI_ERR("**** ERROR : Wrong size buffer returned from fapiGetMvpdField for IQ => %d",
-                             l_bufferSize_iq );
-                    const uint32_t &BUFFER_SIZE = l_bufferSize_iq;
-                    const Target  &CHIP_TARGET= i_target;
-                    FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_IQ_BUFFER_SIZE_ERROR);
-                    break;
-                }
-
-                // Initialize the incrementing pointer
-                l_buffer_iq_inc = l_buffer_iq;
-
-                // get IQ version and advance pointer 1-byte to beginning of IQ data
-                uint8_t iq_ver = *l_buffer_iq_inc;
-                pss->iddq.iddq_version = iq_ver ;
-                FAPI_INF("  LRP%d:  IDDQ Version Number = %u", l_lrp_record,
-                         iq_ver);
-
-                // Increment pointer beyond the 1B version number to the first of the
-                // reading data
-                l_buffer_iq_inc++;
-
-                l_iddq_reading = reinterpret_cast<IddqReading*>(l_buffer_iq_inc);
-                pss->iddq.iddq_vdd[vdd_measurement_order[c]].value =
-                                    revle32((*l_iddq_reading).value);
-
-                FAPI_INF("   IQ VDD measurement in LRP%d (hex & dec) = 0x%04X  %5d (raw), 0x%04X  %5d (temp corrected)",
-                         l_lrp_record,
-                         pss->iddq.iddq_vdd[vdd_measurement_order[c]].fields.iddq_raw_value,
-                         pss->iddq.iddq_vdd[vdd_measurement_order[c]].fields.iddq_raw_value,
-                         pss->iddq.iddq_vdd[vdd_measurement_order[c]].fields.iddq_corrected_value,
-                         pss->iddq.iddq_vdd[vdd_measurement_order[c]].fields.iddq_corrected_value);
-
-                // Check for reading validity
-                // Applies to LRP1-5 content for all versions
-                // Checking LRP6 (VDD = 0.8V) will only produce a warning but will not fail
-
-                // Assume that the 0.80V readings are valid.  If they turn out to be zeros,
-                // clear the flag in the Pstate Options vector.
-                
-                pss->gpst.options.options =  revle32(revle32(pss->gpst.options.options)
-                                             |
-                                             PSTATE_IDDQ_0P80V_VALID);
-
-                if (revle16(l_iddq_reading->fields.iddq_raw_value) == 0)
-                {
-                    FAPI_INF("**** Warning : IQ VDD measurement @ %s has zero valued measurement",
-                               core_measurement_str[c]);
-
-                    if (core_validity_check[c])
-                    {
-                        FAPI_ERR("**** Error : IQ measurement was 0 when expected to be non-zero");
-                        const uint16_t &RAW_VALUE = revle16(l_iddq_reading->fields.iddq_raw_value);
-                        const uint32_t &LRP_NUMBER = l_lrp_record;
-                        const Target  &CHIP_TARGET= i_target;
-                        FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_IQ_INVALID_VDD_ERROR);
-                        break;
-                    }
-                    // The only reading that might not be valid is 0.8V.  If the readings
-                    // are zero and the valitity check is off, then clear the 0.80 valid
-                    // flag.
-                    else
-                    {
-                       pss->gpst.options.options =  revle32(revle32(pss->gpst.options.options)
-                                                    &
-                                                    PSTATE_IDDQ_0P80V_INVALID);
-                    
-                    }
-                }
-
-                if (core_second_reading_valid[c])
-                {
-                    FAPI_DBG("  Second reading valid for LRP%d", l_lrp_record);
-
-                    l_buffer_iq_inc += sizeof(IddqReading);
-
-                    l_iddq_reading = reinterpret_cast<IddqReading*>(l_buffer_iq_inc);
-                    pss->iddq.iddq_vcs[vcs_measurement_order[c]].value =
-                                revle32((*l_iddq_reading).value);
-
-                    FAPI_INF("   IQ VCS measurement in LRP%d (hex & dec) = 0x%04X  %5d (raw), 0x%04X  %5d (temp corrected)",
-                             l_lrp_record,
-                             pss->iddq.iddq_vcs[vcs_measurement_order[c]].fields.iddq_raw_value,
-                             pss->iddq.iddq_vcs[vcs_measurement_order[c]].fields.iddq_raw_value,
-                             pss->iddq.iddq_vcs[vcs_measurement_order[c]].fields.iddq_corrected_value,
-                             pss->iddq.iddq_vcs[vcs_measurement_order[c]].fields.iddq_corrected_value);
-
-                    if (l_iddq_reading->fields.iddq_raw_value == 0)
-                    {
-                        FAPI_INF("**** Warning : IQ VDD measurement @ %s has zero valued measurement",
-                                 core_measurement_str[c]);
-                        const uint16_t &RAW_VALUE = revle16(l_iddq_reading->fields.iddq_raw_value);
-                        const uint32_t &LRP_NUMBER = c;
-                        const Target  &CHIP_TARGET= i_target;
-                        FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_IQ_INVALID_VCS_ERROR);
-                        break;
-                    }
-                }
-
-            } // for LRP records
-            
-            // Error out chck
-            if(!l_rc.ok())
-            {
-                break;
-            }
-            
-           
-            FAPI_INF("Processing CRP records for IDDQ keywords");
-            for (c = 0; c < CRP_IDDQ_RECORDS; ++c)
-            {
-                // clear out buffer to known value before calling fapiGetMvpdField
-                memset(l_buffer_iq_c, 0, IQ_BUFFER_ALLOC);
-
-                // set l_record to appropriate cprx record
-                l_record = (uint32_t)fapi::MVPD_RECORD_CRP0;
-                l_bufferSize_iq = IQ_BUFFER_ALLOC;  // @todo?
-
-                FAPI_DBG("fapiGetMvpdField(record %X, keyword %X, iq %p, size %d)", l_record,
-                                       (uint32_t)fapi::MVPD_KEYWORD_IQ,
-                                       l_buffer_iq_c,
-                                       l_bufferSize_iq);
-
-                // Get Chip IQ MVPD data from the CRPx records
-                l_rc = fapiGetMvpdField((fapi::MvpdRecord)l_record,
-                                       fapi::MVPD_KEYWORD_IQ,
-                                       i_target,
-                                       l_buffer_iq_c,
-                                       l_bufferSize_iq);
-                if (!l_rc.ok()) 
-                {
-                    FAPI_ERR("**** Error: fapiGetMvpdField from CRP%u with size %d into buffer sized at %d and rc = %X",
-                                    c, l_bufferSize_iq, IQ_BUFFER_ALLOC, (uint32_t)l_rc);
-                    const uint32_t &CHIPLET_NUMBER = c;
-                    const Target  &CHIP_TARGET= i_target;
-                    FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_IQ_MVPD_ERROR);
-                    break;
-                }
-
-                // check buffer size
-                if (l_bufferSize_iq < IQ_BUFFER_SIZE) 
-                {
-                    FAPI_ERR("**** ERROR : Wrong size buffer returned from fapiGetMvpdField for IQ => %d", l_bufferSize_iq );
-                    const uint32_t &BUFFER_SIZE = l_bufferSize_iq;
-                    const Target  &CHIP_TARGET= i_target;
-                    FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_IQ_BUFFER_SIZE_ERROR);
-                    break;
-                }
-
-                // use copy of allocated buffer pointer to increment through buffer
-                l_buffer_iq_inc = l_buffer_iq_c;
-
-                // get IQ version and advance pointer 1-byte to beginning of IQ data
-                uint8_t iq_ver = *l_buffer_iq_inc;
-                pss->iddq.iddq_version = iq_ver ;
-                FAPI_INF("  CRP0:  IDDQ Version Number = %u", iq_ver);
-                l_buffer_iq_inc++;
-                
-                l_iddq_reading = reinterpret_cast<IddqReading*>(l_buffer_iq_inc);
-                pss->iddq.iddq_vio[vio_measurement_order[c]].value =
-                                    revle32((*l_iddq_reading).value);
-                                    
-                FAPI_INF("   IQ VIO measurement (hex & dec) = 0x%04x  %5x (raw), 0x%04x  %5x (temp corrected)",                        
-                        pss->iddq.iddq_vio[c].fields.iddq_raw_value,
-                        pss->iddq.iddq_vio[c].fields.iddq_raw_value,
-                        pss->iddq.iddq_vio[c].fields.iddq_corrected_value,
-                        pss->iddq.iddq_vio[c].fields.iddq_corrected_value);
-
-                if (revle16(l_iddq_reading->fields.iddq_raw_value) == 0)
-                {           
-                    FAPI_ERR("IQ VIO measurement @ %s has zero valued measurement",
-                            chip_measurement_str[c]);
-                    const uint16_t &RAW_VALUE = l_iddq_reading->fields.iddq_raw_value ;
-                    const Target  &CHIP_TARGET= i_target;
-                    FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_IQ_INVALID_VIO_ERROR);
-                    break;
-                }
-
-            } // for CRP records
-        }
-        while(0);
-
-        // Free up memory buffer
-        free(l_buffer_iq);
-//        free(l_buffer_iq_c);
-
-        return l_rc;
-
-    } // proc_get_mvdp_iddq
-
-
-
-
-/// ---------------------------------------------------------------------------
-/// \brief Check and process #V bias attributes for external and internal
-/// \param[in]    attr_mvpd_data         => 5x5 array to hold the #V data
-/// \param[in]    *attr                  => pointer to attribute list structure
-/// \param[inout] * volt_int_vdd_bias    => pointer to internal vdd bias
-/// \param[inout] * volt_int_vcs_bias    => pointer to internal vcs bias
-/// ---------------------------------------------------------------------------
-    ReturnCode proc_get_extint_bias(uint32_t attr_mvpd_data[PV_D][PV_W],
-                                    const AttributeList *attr,
-                                    double *volt_int_vdd_bias,
-                                    double *volt_int_vcs_bias)
-    {
-        ReturnCode l_rc;
-        int    i                 = 0;
-        double freq_bias         = 1.0;
-        double volt_ext_vdd_bias = 1.0;
-        double volt_ext_vcs_bias = 1.0;
-
-        // --------------------------------------------------------------------------
-        // Apply specified Frequency and Voltage Biasing to attr_mvpd_voltage_control
-        //   - at least one bias value is guaranteed to be 0
-        //   - convert freq/voltage to double
-        //   - compute biased freq/voltage and round
-        //   - convert back to integer
-        // --------------------------------------------------------------------------
-
-        freq_bias          = 1.0 + (BIAS_PCT_UNIT * (double)attr->attr_freq_ext_bias_up)
-                             - (BIAS_PCT_UNIT * (double)attr->attr_freq_ext_bias_down);
-        volt_ext_vdd_bias  = 1.0 + (BIAS_PCT_UNIT * (double)
-                                    attr->attr_voltage_ext_vdd_bias_up) - (BIAS_PCT_UNIT * (double)
-                                            attr->attr_voltage_ext_vdd_bias_down);
-        volt_ext_vcs_bias  = 1.0 + (BIAS_PCT_UNIT * (double)
-                                    attr->attr_voltage_ext_vcs_bias_up) - (BIAS_PCT_UNIT * (double)
-                                            attr->attr_voltage_ext_vcs_bias_down);
-        *volt_int_vdd_bias = 1.0 + (BIAS_PCT_UNIT * (double)
-                                    attr->attr_voltage_int_vdd_bias_up) - (BIAS_PCT_UNIT * (double)
-                                            attr->attr_voltage_int_vdd_bias_down);
-        *volt_int_vcs_bias = 1.0 + (BIAS_PCT_UNIT * (double)
-                                    attr->attr_voltage_int_vcs_bias_up) - (BIAS_PCT_UNIT * (double)
-                                            attr->attr_voltage_int_vcs_bias_down);
-
-        // loop over each operating point
-        for (i=0; i <= 4; i++)
-        {
-            attr_mvpd_data[i][0] = (uint32_t) ((( (double)attr_mvpd_data[i][0]) * freq_bias)
-                                               + 0.5);
-            attr_mvpd_data[i][1] = (uint32_t) ((( (double)attr_mvpd_data[i][1]) *
-                                                volt_ext_vdd_bias) + 0.5);
-            attr_mvpd_data[i][3] = (uint32_t) ((( (double)attr_mvpd_data[i][3]) *
-                                                volt_ext_vcs_bias) + 0.5);
-        }
-
-        FAPI_INF("BIAS freq    = %f", freq_bias);
-        FAPI_INF("BIAS vdd ext = %f  vcs ext = %f", volt_ext_vdd_bias,
-                 volt_ext_vcs_bias);
-        FAPI_INF("BIAS vdd int = %f  vcs int = %f", *volt_int_vdd_bias,
-                 *volt_int_vcs_bias);
-
-        return l_rc;
-    } // end proc_get_extint_bias
-
-
-/// ------------------------------------------------------------
-/// \brief Update CPM Range table
-/// \param[inout] *pss   => pointer to pstate superstructure
-/// \param[in]    *attr  => pointer to attribute list structure
-/// ------------------------------------------------------------
-
-    ReturnCode proc_upd_cpmrange (PstateSuperStructure *pss,
-                                  const AttributeList *attr)
-    {
-        ReturnCode l_rc;
-        int        rc           = 0;
-        uint8_t    i            = 0;
-        uint8_t    valid_points = 0;
-        Pstate     pstate;
-        uint32_t   freq_khz;
-
-        do
-        {
-            // extract valid points from attribute and put into superstructure
-            valid_points                      = attr->attr_cpm_inflection_points[8];
-            pss->cpmranges.validRanges = valid_points;
-
-            FAPI_INF("CPM valid points = %u", valid_points);
-
-            // loop over valid points in attribute and convert to Khz and then convert to pstate value
-            for (i = 0; i < valid_points; i++)
-            {
-                freq_khz = attr->attr_cpm_inflection_points[i] * revle32(
-                               pss->gpst.frequency_step_khz);
-                FAPI_INF("Converting CPM inflection point %u (%u khz) to Pstate", i, freq_khz);
-                rc = freq2pState(&(pss->gpst), freq_khz, &pstate);
-
-                if (rc)
-                {
-                    break;
-                }
-
-                rc = pstate_minmax_chk(&(pss->gpst), &pstate);
-
-                if (rc)
-                {
-                    break;
-                }
-
-                pss->cpmranges.inflectionPoint[i] = pstate;
-
-                FAPI_INF("CPM point  freq_khz = %u  pstate = %d",freq_khz, pstate);
-            }
-
-            if (rc)
-            {
-                break;
-            }
-
-            // convert pMax attribute to Khz and then convert to pstate value
-
-            if (attr->attr_cpm_inflection_points[9] == 0)
-            {
-                FAPI_INF(" CPM pMax  = 0. Skipping conversion to pstate");
-            }
-            else
-            {
-                freq_khz = attr->attr_cpm_inflection_points[9] * revle32(
-                               pss->gpst.frequency_step_khz);
-                FAPI_INF("Converting CPM pMax (%u khz) to Pstate", freq_khz);
-                rc = freq2pState(&(pss->gpst), freq_khz, &pstate);
-
-                if (rc)
-                {
-                    break;
-                }
-
-                rc = pstate_minmax_chk(&(pss->gpst), &pstate);
-
-                if (rc)
-                {
-                    break;
-                }
-
-                pss->cpmranges.pMax = pstate;
-
-                FAPI_INF("CPM pMax   freq_khz = %u  pstate = %d",freq_khz, pstate);
-            }
-
-        }
-        while (0);
-
-        // ------------------------------------------------------
-        // check error code from freq2pState or pstate_minmax_chk
-        // ------------------------------------------------------
-        if (rc)
-        {
-            int      & RETURN_CODE = rc;
-            int8_t   & PSTATE      = pstate;
-            uint32_t & FREQ_KHZ    = freq_khz;
-
-            if (rc == -PSTATE_LT_PSTATE_MIN || rc == -PSTATE_GT_PSTATE_MAX)
-            {
-                FAPI_ERR("**** ERROR : Computed pstate for freq (%d khz) out of bounds of MAX/MIN possible rc = %d",
-                         freq_khz, rc);
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_PSTATE_MINMAX_BOUNDS_ERROR);
-            }
-            else if (rc == -GPST_PSTATE_GT_GPST_PMAX)
-            {
-                FAPI_ERR("**** ERROR : Computed pstate is greater than max pstate in gpst (computed pstate = %d  max pstate = %d  rc = %d",
-                         pstate, gpst_pmax(&(pss->gpst)), rc );
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_PSTATE_GT_GPSTPMAX_ERROR);
-            }
-            else
-            {
-                FAPI_ERR("**** ERROR : Bad Return code rc = %d", rc );
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_ERROR);
-            }
-        }
-
-        return l_rc;
-    } // end proc_upd_cpmrange
-
-
-/// -------------------------------------------------------------------
-/// \brief Boost max frequency in pstate table based on boost attribute
-/// \param[inout] *pss   => pointer to pstate superstructure
-/// \param[in]    *attr  => pointer to attribute list structure
-/// -------------------------------------------------------------------
-
-    ReturnCode proc_boost_gpst (PstateSuperStructure *pss,
-                                uint32_t attr_boost_percent)
-    {
-        ReturnCode l_rc;
-        uint8_t    i;
-        uint8_t    idx;
-        double    boosted_pct;
-        uint32_t   boosted_freq_khz;
-        uint32_t   pstate0_frequency_khz;
-        uint32_t   frequency_step_khz;
-        uint32_t   pstate_diff;
-        gpst_entry_t entry;
-        uint8_t    gpsi_max;
-
-        const uint32_t MAXIMUM_BOOST_PERCENT_SUPPORTED = 20;
-        const uint32_t MAXIMUM_PSTATE_RANGE = 255;  // maximum represented by uint8_t
-
-        do
-        {
-
-            if (attr_boost_percent == 0)
-            {
-                FAPI_INF("CPM Turbo Boost Attribute = 0 -- no boosting will be done");
-                break;
-            }
-
-            // check that percentage is rational.  Note: attribute information is .1 percent units
-            if (attr_boost_percent > MAXIMUM_BOOST_PERCENT_SUPPORTED * 10)
-            {
-                FAPI_ERR("Boost percentage is greater than maximum supported.  Max: %u; Value: %u",
-                         MAXIMUM_BOOST_PERCENT_SUPPORTED, attr_boost_percent);
-                const uint32_t& MAXBOOSTPERCENT  = MAXIMUM_BOOST_PERCENT_SUPPORTED;
-                const uint32_t& ATTRBOOSTPERCENT = attr_boost_percent;
-                FAPI_SET_HWP_ERROR(l_rc,
-                                   RC_PROCPM_PSTATE_DATABLOCK_INVALID_BOOST_PERCENTAGE_ERROR);
-                break;
-            }
-
-            // calculate percent to boost
-            boosted_pct = 1.0 + (BOOST_PCT_UNIT * (double)attr_boost_percent);
-
-            // get turbo frequency (pstate0 frequency)
-            pstate0_frequency_khz = revle32(pss->gpst.pstate0_frequency_khz);
-
-            // get pstate frequency step
-            frequency_step_khz    = revle32(pss->gpst.frequency_step_khz);
-
-            // calculate boosted frequency
-            boosted_freq_khz = (uint32_t) ( (double)pstate0_frequency_khz * boosted_pct);
-
-            // if boosted frequency is <= turbo frequency, then no boost is to be done
-            if (boosted_freq_khz <= pstate0_frequency_khz)
-            {
-                FAPI_INF("CPM Turbo Boost Attribute resulted in no increase in pstates - boost_pct = %f turbo_freq_khz = %u boosted_freq_khz = %u",
-                         boosted_pct,  pstate0_frequency_khz, boosted_freq_khz);
-                break;
-            }
-
-            // calculate # pstates that boosted frequency is above turbo
-            pstate_diff = (boosted_freq_khz/frequency_step_khz) -
-                          (pstate0_frequency_khz/frequency_step_khz);
-
-            // pstate difference is 0 then no boost is to be done, else update global pstate table
-            if (pstate_diff == 0)
-            {
-                FAPI_INF("CPM Turbo Boost Attribute resulted in no increase in pstates - boost_pct = %f turbo_freq_khz = %u boosted_freq_khz = %u",
-                         boosted_pct,  pstate0_frequency_khz, boosted_freq_khz);
-                break;
-            }
-            else if (pstate_diff > MAXIMUM_PSTATE_RANGE)
-            {
-                FAPI_ERR("Percentage boost calculation overrun produced invalid Pstate Difference: %u",
-                         pstate_diff);
-                const uint32_t& PSTATEDIFF = pstate_diff;
-                const uint32_t& BOOSTEDFREQKHZ = boosted_freq_khz;
-                const uint32_t& PSTATE0FREQKHZ = pstate0_frequency_khz;
-                const uint32_t& FREQSTEPKHZ = frequency_step_khz;
-                const uint32_t& ATTRBOOSTPERCENT = attr_boost_percent;
-                const double& BOOSTEDPCT = boosted_pct;
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_PSTATE_DIFF_ERROR);
-                break;
-            }
-            else
-            {
-                gpsi_max    = pss->gpst.entries - 1;
-                entry.value = revle64(pss->gpst.pstate[gpsi_max].value);
-
-                FAPI_INF("Boosting Pstate Table : percent = %f num pstates added = %d",
-                         boosted_pct, pstate_diff);
-
-                for (i = 1; i <= pstate_diff; i++)
-                {
-                    idx = gpsi_max + i;
-                    pss->gpst.pstate[idx].value = revle64(entry.value);
-                }
-
-                pss->gpst.entries += pstate_diff;
-
-            }
-
-        }
-        while(0);
-
-        return l_rc;
-    } // end proc_boost_gpst
-
-
-/// -------------------------------------------------------------------
-/// \brief Perform data validity check on #V data
-/// \param[in] poundv_data   => pointer to array of #V data
-/// -------------------------------------------------------------------
-
-    ReturnCode proc_chk_valid_poundv(const Target&  i_target,
-                                     AttributeList* i_attr,
-                                     const uint32_t poundv_data[PV_D][PV_W],
-                                     uint32_t*      valid_pdv_points,
-                                     uint8_t        chiplet_num,
-                                     uint8_t        bucket_id)                                                                                                            
-                                     
-    {
-        ReturnCode    l_rc;
-        const uint8_t pv_op_order[S132A_POINTS] = PV_OP_ORDER;
-        const char    *pv_op_str[S132A_POINTS] = PV_OP_ORDER_STR;
-        uint8_t       i = 0;
-        bool          suspend_ut_check = false;
-
-        do
-        {
-            // check for non-zero freq, voltage, or current in valid operating points
-            for (i = 0; i <= S132A_POINTS-1; i++)
-            {
-                FAPI_INF("Checking for Zero valued data in each #V operating point (%s) f=%u v=%u i=%u v=%u i=%u",
-                             pv_op_str[pv_op_order[i]],
-                             poundv_data[pv_op_order[i]][0],
-                             poundv_data[pv_op_order[i]][1],
-                             poundv_data[pv_op_order[i]][2],
-                             poundv_data[pv_op_order[i]][3],
-                             poundv_data[pv_op_order[i]][4]);
-
-                if (i_attr->attr_wof_enabled && (strcmp(pv_op_str[pv_op_order[i]], "UltraTurbo") == 0))
-                {
-
-                    if (poundv_data[pv_op_order[i]][0] == 0 ||
-                            poundv_data[pv_op_order[i]][1] == 0 ||
-                            poundv_data[pv_op_order[i]][2] == 0 ||
-                            poundv_data[pv_op_order[i]][3] == 0 ||
-                            poundv_data[pv_op_order[i]][4] == 0   )
-                    {
-
-                        FAPI_INF("**** WARNING: WOF is enabled but zero valued data found in #V (chiplet = %u  bucket id = %u  op point = %s)",
-                                 chiplet_num, bucket_id, pv_op_str[pv_op_order[i]]);
-                        FAPI_INF("**** WARNING: Disabling WOF and continuing");
-                        const uint8_t& OP_POINT    = pv_op_order[i];
-                        const uint8_t& CHIPLET_NUM = chiplet_num;
-                        const uint8_t& BUCKET_ID   = bucket_id;
-                        const Target  &CHIP_TARGET = i_target;
-                        FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_PDV_ZERO_DATA_UT_ERROR);
-                        suspend_ut_check = true;
-                    }
-                }
-                else if ((!i_attr->attr_wof_enabled) && (strcmp(pv_op_str[pv_op_order[i]], "UltraTurbo") == 0))
-                {
-                    FAPI_INF("**** NOTE: WOF is disabled so the UltraTurbo VPD is not being checked");
-                    suspend_ut_check = true;
-                }
-                else
-                {
-
-                    if (poundv_data[pv_op_order[i]][0] == 0 ||
-                            poundv_data[pv_op_order[i]][1] == 0 ||
-                            poundv_data[pv_op_order[i]][2] == 0 ||
-                            poundv_data[pv_op_order[i]][3] == 0 ||
-                            poundv_data[pv_op_order[i]][4] == 0   )
-                    {
-
-                        FAPI_ERR("**** ERROR : Zero valued data found in #V (chiplet = %u  bucket id = %u  op point = %s)",
-                                 chiplet_num, bucket_id, pv_op_str[pv_op_order[i]]);
-                        const uint8_t& OP_POINT    = pv_op_order[i];
-                        const uint8_t& CHIPLET_NUM = chiplet_num;
-                        const uint8_t& BUCKET_ID   = bucket_id;
-                        const Target  &CHIP_TARGET = i_target;
-                        FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_PDV_ZERO_DATA_ERROR);
-                        break;
-                    }
-                }
-            }
-
-            if (l_rc)
-            {
-                // If an error was found where suspension was flagged, keep going.
-                // If not, break to exit point.
-                if (!suspend_ut_check)
-                    break;
-            }
-          
-
-            // Adjust the valid operating point based on UltraTurbo presence
-            // and WOF enablement
-            *valid_pdv_points = S132A_POINTS;
-
-            if (suspend_ut_check)
-                (*valid_pdv_points)--;
-                
-            FAPI_DBG("valid_pdv_points = %d", *valid_pdv_points);
-
-            // check valid operating points' values have this relationship (power save <= nominal <= turbo <= ultraturbo)
-            for (i = 1; i <= (*valid_pdv_points)-1; i++)
-            {
-
-                FAPI_INF("Checking for relationship between #V operating point (%s <= %s)",
-                         pv_op_str[pv_op_order[i-1]], pv_op_str[pv_op_order[i]]);
-                FAPI_INF("   f=%u <= f=%u",               poundv_data[pv_op_order[i-1]][0],
-                         poundv_data[pv_op_order[i]][0]);
-                FAPI_INF("   v=%u <= v=%u  i=%u <= i=%u", poundv_data[pv_op_order[i-1]][1],
-                         poundv_data[pv_op_order[i]][1], poundv_data[pv_op_order[i-1]][2],
-                         poundv_data[pv_op_order[i]][2]);
-                FAPI_INF("   v=%u <= v=%u  i=%u <= i=%u", poundv_data[pv_op_order[i-1]][3],
-                         poundv_data[pv_op_order[i]][3], poundv_data[pv_op_order[i-1]][4],
-                         poundv_data[pv_op_order[i]][4]);
-
-                if (i_attr->attr_wof_enabled && strcmp(pv_op_str[pv_op_order[i]], "UltraTurbo") && !suspend_ut_check )
-                {
-                    if (poundv_data[pv_op_order[i-1]][0] > poundv_data[pv_op_order[i]][0]  ||
-                            poundv_data[pv_op_order[i-1]][1] > poundv_data[pv_op_order[i]][1]  ||
-                            poundv_data[pv_op_order[i-1]][2] > poundv_data[pv_op_order[i]][2]  ||
-                            poundv_data[pv_op_order[i-1]][3] > poundv_data[pv_op_order[i]][3]  ||
-                            poundv_data[pv_op_order[i-1]][4] > poundv_data[pv_op_order[i]][4]    )
-                    {
-
-                        FAPI_ERR("**** ERROR : Relationship error between #V operating point (%s <= %s)(power save <= nominal <= turbo <= ultraturbo) (chiplet = %u  bucket id = %u  op point = %u)",
-                                 pv_op_str[pv_op_order[i-1]], pv_op_str[pv_op_order[i]], chiplet_num, bucket_id,
-                                 pv_op_order[i]);
-                        const uint8_t& OP_POINT    = pv_op_order[i];
-                        const uint8_t& CHIPLET_NUM = chiplet_num;
-                        const uint8_t& BUCKET_ID   = bucket_id;
-                        const Target  &CHIP_TARGET = i_target;
-                        FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_PDV_OPPOINT_ORDER_ERROR);
-                        break;
-                    }
-                }
-            }
-
-        }
-        while(0);
-
-        return l_rc;
-    }
-
-
-/// -------------------------------------------------------------------
-/// \brief Convert Resonant Clocking attributes to pstate values and update superstructure with those values
-/// \param[inout] *pss   => pointer to pstate superstructure
-/// \param[in]    *attr  => pointer to attribute list structure
-/// -------------------------------------------------------------------
-    ReturnCode proc_res_clock (PstateSuperStructure *pss,
-                               AttributeList *attr_list)
-    {
-        ReturnCode l_rc;
-        int        rc       = 0;
-        uint32_t   freq_khz = 0;
-        Pstate     pstate   = 0;
-
-        do
-        {
-            // ----------------------------------------------------------------------------
-            // convert resonant clock frequencies to pstate value and set in superstructure
-            // ----------------------------------------------------------------------------
-#define DATABLOCK_RESCLK(attr_name, ps_name) \
-        freq_khz = attr_list->attr_name; \
-        FAPI_INF("Converting %s (%u khz) to Pstate", #attr_name, freq_khz); \
-        rc = freq2pState(&(pss->gpst), freq_khz, &pstate); \
-        if ((rc) && (rc != -PSTATE_LT_PSTATE_MIN)) break; \
-        rc = pstate_minmax_chk(&(pss->gpst), &pstate); \
-        if (rc == -GPST_PSTATE_GT_GPST_PMAX) { \
-          pstate = gpst_pmax(&(pss->gpst)); \
-          FAPI_INF("%s pstate is greater than gpst_max(%d) - clipping to gpst_max", #attr_name, pstate); \
-        } \
-        pss->resclk.ps_name = pstate;
-
-            DATABLOCK_RESCLK(attr_pm_resonant_clock_full_clock_sector_buffer_frequency,
-                             full_csb_ps);
-            DATABLOCK_RESCLK(attr_pm_resonant_clock_low_band_lower_frequency,
-                             res_low_lower_ps);
-            DATABLOCK_RESCLK(attr_pm_resonant_clock_low_band_upper_frequency,
-                             res_low_upper_ps);
-            DATABLOCK_RESCLK(attr_pm_resonant_clock_high_band_lower_frequency,
-                             res_high_lower_ps);
-            DATABLOCK_RESCLK(attr_pm_resonant_clock_high_band_upper_frequency,
-                             res_high_upper_ps);
-
-        }
-        while(0);
-
-        // ---------------------------------
-        // check error code from freq2pState
-        // ---------------------------------
-        if (rc && rc != -GPST_PSTATE_GT_GPST_PMAX)
-        {
-            int &      RETURN_CODE = rc;
-            int8_t &   PSTATE      = pstate;
-            uint32_t & FREQ_KHZ    = freq_khz;
-
-            if (rc == -PSTATE_LT_PSTATE_MIN || rc == -PSTATE_GT_PSTATE_MAX)
-            {
-                FAPI_ERR("**** ERROR : Computed pstate for freq (%d khz) out of bounds of MAX/MIN possible rc = %d",
-                         freq_khz, rc);
-                FAPI_SET_HWP_ERROR(l_rc,
-                                   RC_PROCPM_PSTATE_DATABLOCK_FREQ2PSTATE_PSTATE_MINMAX_BOUNDS_ERROR);
-            }
-            else
-            {
-                FAPI_ERR("**** ERROR : Bad Return code rc = %d", rc );
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_FREQ2PSTATE_ERROR);
-            }
-        }
-
-        return l_rc;
-    }
-
-
-/// ------------------------------------------------------------
-/// \brief Update Psafe_pstate
-/// \param[inout] *pss   => pointer to pstate superstructure
-/// \param[in]    *attr  => pointer to attribute list structure
-/// ------------------------------------------------------------
-
-    ReturnCode proc_upd_psafe_ps (PstateSuperStructure *pss,
-                                  const AttributeList *attr)
-    {
-        ReturnCode l_rc;
-        int        rc           = 0;
-        Pstate     pstate;
-        uint32_t   freq_khz;
-
-        do
-        {
-
-            freq_khz = attr->attr_pm_safe_frequency*1000;
-            FAPI_INF("Converting attr_pm_safe_frequency in %u khz to Pstate", freq_khz);
-            rc = freq2pState(&(pss->gpst), freq_khz, &pstate);
-
-            if(rc)
-            {
-                break;
-            }
-
-            FAPI_INF("Producing Pstate = %d for attr_pm_safe_frequency = %u khz", pstate,
-                     freq_khz);
-            rc = pstate_minmax_chk(&(pss->gpst), &pstate);
-
-            if(rc)
-            {
-                break;
-            }
-
-            FAPI_IMP("Setting Psafe in Global Pstate Table to be Pstate of attr_pm_safe_frequency");
-            pss->gpst.psafe = pstate;
-
-        }
-        while (0);
-
-        // ------------------------------------------------------
-        // check error code from freq2pState or pstate_minmax_chk
-        // ------------------------------------------------------
-        if (rc)
-        {
-            int      & RETURN_CODE = rc;
-            int8_t   & PSTATE      = pstate;
-            uint32_t & FREQ_KHZ    = freq_khz;
-
-            if (rc == -PSTATE_LT_PSTATE_MIN || rc == -PSTATE_GT_PSTATE_MAX)
-            {
-                FAPI_ERR("**** ERROR : Computed pstate for freq (%d khz) out of bounds of MAX/MIN possible rc = %d",
-                         freq_khz, rc);
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_PSAFE_MINMAX_BOUNDS_ERROR);
-            }
-            else if (rc == -GPST_PSTATE_GT_GPST_PMAX)
-            {
-                FAPI_ERR("**** ERROR : Computed pstate is greater than max pstate in gpst (computed pstate = %d  max pstate = %d  rc = %d",
-                         pstate, gpst_pmax(&(pss->gpst)), rc );
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_PSAFE_GT_GPSTPMAX_ERROR);
-            }
-            else
-            {
-                FAPI_ERR("**** ERROR : Bad Return code rc = %d", rc );
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_PSAFE_ERROR);
-            }
-        }
-
-        return l_rc;
-    } // end proc_upd_psafe_ps
-
-
-/// ------------------------------------------------------------
-/// \brief Update Floor_pstate
-/// \param[inout] *pss   => pointer to pstate superstructure
-/// \param[in]    *attr  => pointer to attribute list structure
-/// ------------------------------------------------------------
-
-    ReturnCode proc_upd_floor_ps (PstateSuperStructure *pss,
-                                  const AttributeList *attr)
-    {
-        ReturnCode l_rc;
-        int        rc           = 0;
-        Pstate     pstate;
-        uint32_t   freq_khz;
-
-        do
-        {
-
-            freq_khz = attr->attr_freq_core_floor*1000;
-            FAPI_INF("Converting attr_freq_core_floor in %u khz to Pstate", freq_khz);
-            rc = freq2pState(&(pss->gpst), freq_khz, &pstate);
-
-            if(rc)
-            {
-                break;
-            }
-
-            FAPI_INF("Producing Pstate = %d for attr_freq_core_floor = %u khz", pstate,
-                     freq_khz);
-            rc = pstate_minmax_chk(&(pss->gpst), &pstate);
-
-            if(rc)
-            {
-                break;
-            }
-
-            FAPI_IMP("Setting Pfloor in Global Pstate Table to be Pstate of attr_freq_core_floor");
-            pss->gpst.pfloor = pstate;
-
-        }
-        while (0);
-
-        // ------------------------------------------------------
-        // check error code from freq2pState or pstate_minmax_chk
-        // ------------------------------------------------------
-        if (rc)
-        {
-            int      & RETURN_CODE = rc;
-            int8_t   & PSTATE      = pstate;
-            uint32_t & FREQ_KHZ    = freq_khz;
-
-            if (rc == -PSTATE_LT_PSTATE_MIN || rc == -PSTATE_GT_PSTATE_MAX)
-            {
-                FAPI_ERR("**** ERROR : Computed pstate for freq (%d khz) out of bounds of MAX/MIN possible rc = %d",
-                         freq_khz, rc);
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_PFLOOR_MINMAX_BOUNDS_ERROR);
-            }
-            else if (rc == -GPST_PSTATE_GT_GPST_PMAX)
-            {
-                FAPI_ERR("**** ERROR : Computed pstate is greater than max pstate in gpst (computed pstate = %d  max pstate = %d  rc = %d",
-                         pstate, gpst_pmax(&(pss->gpst)), rc );
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_PFLOOR_GT_GPSTPMAX_ERROR);
-            }
-            else
-            {
-                FAPI_ERR("**** ERROR : Bad Return code rc = %d", rc );
-                FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PSTATE_DATABLOCK_PFLOOR_ERROR);
-            }
-        }
-
-        return l_rc;
-    } // end proc_upd_floor_ps
-
-/// ------------------------------------------------------------
-/// \brief Populate a subset of the WOFElements structure from Attributes
-/// \param[inout] *pss   => pointer to pstate superstructure
-/// \param[in]    *attr  => pointer to attribute list structure
-/// ------------------------------------------------------------
-
-    ReturnCode load_wof_attributes (PstateSuperStructure *pss,
-                                    const AttributeList *attr)
-    {
-
-
-        // -----------------------------------------------
-        // ATTR_WOF_ENABLED setting
-        // -----------------------------------------------
-        pss->wof.wof_enabled = attr->attr_wof_enabled;
-
-        // -----------------------------------------------
-        // ATTR_TDP_RDP_CURRENT_FACTOR value
-        // -----------------------------------------------
-        pss->wof.tdp_rdp_factor = attr->attr_tdp_rdp_current_factor;
-
-        // -----------------------------------------------
-        // System Power Distribution value
-        // -----------------------------------------------
-
-        pss->wof.vdd_sysparm.loadline_uohm = attr->attr_proc_r_loadline_vdd;
-        pss->wof.vcs_sysparm.loadline_uohm = attr->attr_proc_r_loadline_vcs;
-        pss->wof.vdd_sysparm.distloss_uohm = attr->attr_proc_r_distloss_vdd;
-        pss->wof.vcs_sysparm.distloss_uohm = attr->attr_proc_r_distloss_vcs;
-        pss->wof.vdd_sysparm.distoffset_uv = attr->attr_proc_vrm_voffset_vdd;
-        pss->wof.vcs_sysparm.distoffset_uv = attr->attr_proc_vrm_voffset_vcs;
-
-        return FAPI_RC_SUCCESS;
-
-    } // end load_wof_attributes
-
-
-/// ------------------------------------------------------------
-/// \brief Copy VPD operating point into destination in assending order
-/// \param[in]  &src[VPD_PV_POINTS]   => reference to source VPD structure (array)
-/// \param[out] *dest[VPD_PV_POINTS]  => pointer to destination VpdOperatingPoint structure
-/// ------------------------------------------------------------
-
-    ReturnCode load_mvpd_operating_point (const uint32_t src[PV_D][PV_W],
-                                          VpdOperatingPoint *dest)
-    {
-
-        const uint8_t pv_op_order[S132A_POINTS] = PV_OP_ORDER;
-
-        for (uint32_t i = 0; i < S132A_POINTS; i++)
-        {
-            dest[i].frequency_mhz  = src[pv_op_order[i]][0];
-            dest[i].vdd_5mv        = src[pv_op_order[i]][1];
-            dest[i].idd_500ma      = src[pv_op_order[i]][2];
-            dest[i].vdd_maxreg_5mv = src[pv_op_order[i]][1] - DEAD_ZONE_5MV;
-            dest[i].vcs_5mv        = src[pv_op_order[i]][3];
-            dest[i].ics_500ma      = src[pv_op_order[i]][4];
-            dest[i].vcs_maxreg_5mv = src[pv_op_order[i]][3] - DEAD_ZONE_5MV;
-        }
-
-        return FAPI_RC_SUCCESS;
-
-    } // end attr2wof
-
-} //end extern C
diff --git a/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.H b/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.H
deleted file mode 100755
index 512943d7c..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.H
+++ /dev/null
@@ -1,128 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.H $ */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_build_pstate_datablock.H,v 1.15 2015/05/13 03:12:36 stillgs Exp $
-#ifndef _P8_BUILD_PSTATE_DATABLOCK_H_
-#define _P8_BUILD_PSTATE_DATABLOCK_H_
-
-#include <fapi.H>
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_build_pstate_datablock_FP_t) (const fapi::Target&, PstateSuperStructure*);
-
-extern "C" {
-
-//------------------------------------------------------------------------------
-// Function prototype
-//------------------------------------------------------------------------------
-/// \brief Build Pstate Tables
-/// \param[in]     i_target            Chip Target
-/// \param[in/out] *io_pss             Reference to PstateSuperStructure
-
-fapi::ReturnCode 
-p8_build_pstate_datablock(const fapi::Target& i_target, PstateSuperStructure *io_pss);
-
-} // extern "C"
-
-#define S132A_POINTS       4
-#define PSTATE_STEPSIZE    1
-#define EVRM_DELAY_NS      100
-#define DEAD_ZONE_5MV      20       // 100mV
-#define PDV_BUFFER_SIZE    51
-#define PDV_BUFFER_ALLOC   512
-
-//#define PDM_BUFFER_SIZE    105
-#define PDM_BUFFER_SIZE    257      // Value is for version 3 @ 256 + 1 for version number
-#define PDM_BUFFER_ALLOC   513      // Value is for version 2 @ 512 + 1 for version number
-#define BIAS_PCT_UNIT      0.005
-#define BOOST_PCT_UNIT     0.001
-#define POUNDM_POINTS      13
-#define POUNDM_MEASUREMENTS_PER_POINT   4
-
-// #V 2 dimensional array values (5x5) - 5 operating point and 5 values per operating point
-#define PV_D 5
-#define PV_W 5
-
-// order of operating points from slow to fast in #V
-// 1=pwrsave 0=nominal 2=turbo. 3=ultraturbo
-#define PV_OP_ORDER             {1, 0, 2, 3}
-#define PV_OP_ORDER_STR         {"Nominal", "PowerSave", "Turbo", "UltraTurbo"}
-#define PV_OP_ORDER_MIN_VALID   {1, 1, 1, 0}
-
-// IQ Keyword Sizes
-#define IQ_BUFFER_SIZE      9
-#define IQ_BUFFER_ALLOC     64 
- 
-typedef struct {
-  uint32_t attr_freq_core_max;
-  uint32_t attr_proc_r_loadline_vdd;
-  uint32_t attr_proc_r_loadline_vcs;
-  uint32_t attr_proc_r_distloss_vdd;
-  uint32_t attr_proc_r_distloss_vcs;
-  uint32_t attr_proc_vrm_voffset_vdd;
-  uint32_t attr_proc_vrm_voffset_vcs;
-  uint32_t attr_voltage_ext_vdd_bias_up;
-  uint32_t attr_voltage_ext_vcs_bias_up;
-  uint32_t attr_voltage_ext_vdd_bias_down;
-  uint32_t attr_voltage_ext_vcs_bias_down;
-  uint32_t attr_voltage_int_vdd_bias_up;
-  uint32_t attr_voltage_int_vcs_bias_up;
-  uint32_t attr_voltage_int_vdd_bias_down;
-  uint32_t attr_voltage_int_vcs_bias_down ;
-
-  uint32_t attr_freq_proc_refclock;
-  uint32_t attr_proc_dpll_divider;
-  uint32_t attr_cpm_turbo_boost_percent;
-  uint32_t attr_cpm_inflection_points[16];
-  uint32_t attr_freq_ext_bias_up;
-  uint32_t attr_freq_ext_bias_down;
-  uint32_t attr_voltage_ext_bias_up;
-  uint32_t attr_voltage_ext_bias_down;
-  uint32_t attr_voltage_int_bias_up;
-  uint32_t attr_voltage_int_bias_down;
-
-  uint32_t attr_dpll_bias;
-  uint32_t attr_undervolting;
-  uint32_t attr_pm_safe_frequency;
-  uint32_t attr_freq_core_floor;
-  uint32_t attr_boot_freq_mhz;
-
-  uint32_t attr_pm_resonant_clock_full_clock_sector_buffer_frequency;
-  uint32_t attr_pm_resonant_clock_low_band_lower_frequency;
-  uint32_t attr_pm_resonant_clock_low_band_upper_frequency;
-  uint32_t attr_pm_resonant_clock_high_band_lower_frequency;
-  uint32_t attr_pm_resonant_clock_high_band_upper_frequency;
-
-  uint8_t  attr_chip_ec_feature_resonant_clk_valid;
-  uint8_t  attr_proc_ec_core_hang_pulse_bug;
-  uint8_t  attr_chip_ec_feature_ivrm_winkle_bug;
-  uint8_t  attr_pm_system_ivrms_enabled;
-  uint8_t  attr_pm_system_ivrm_vpd_min_level;  
-  
-  uint8_t  attr_wof_enabled; 
-  uint32_t attr_tdp_rdp_current_factor; 
-
-} AttributeList;
-
-#endif
diff --git a/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock_errors.xml b/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock_errors.xml
deleted file mode 100755
index 867196d34..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock_errors.xml
+++ /dev/null
@@ -1,557 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2013,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_build_pstate_datablock_errors.xml,v 1.14 2015/05/13 02:56:56 stillgs Exp $ -->
-<!-- Error definitions for p8_build_pstate_datablock procedure -->
-<hwpErrors>
- <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_NO_CORES_PRESENT_ERROR</rc>
-    <description>There are no cores present</description>
-    <ffdc>PRESENT_CHIPLETS</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP_TARGET</target>
-    </deconfigure>
-  </hwpError> 
- <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_PDV_BUFFER_SIZE_ERROR</rc>
-    <description>#V Buffer returned is wrong size</description>
-    <ffdc>BUFFER_SIZE</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP_TARGET</target>
-    </deconfigure>
-  </hwpError> 
- <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_PDM_BUFFER_SIZE_ERROR</rc>
-    <description>#M Buffer returned is wrong size</description>
-    <ffdc>BUFFER_SIZE</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP_TARGET</target>
-    </deconfigure>
-  </hwpError>   
- <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_MVPD_CHIPLET_VOLTAGE_NOT_EQUAL</rc>
-    <description>MVPD Bucket Frequency was not equal per chiplet</description>
-    <ffdc>ATTR_MVPD_DATA_0</ffdc>
-    <ffdc>ATTR_MVPD_DATA_1</ffdc>
-    <ffdc>ATTR_MVPD_DATA_2</ffdc>
-    <ffdc>ATTR_MVPD_DATA_3</ffdc>
-    <ffdc>ATTR_MVPD_DATA_4</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP_TARGET</target>
-    </deconfigure>
-  </hwpError>     
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_ATTR_DPLL_DIV_ERROR</rc>
-    <description> Attribute ATTR_PROC_DPLL_DIVIDER = 0</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>   
- <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_FREQ_BIAS_ERROR</rc>
-    <description>Cannot have both up and down bias set</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>   
- <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_EXT_VDD_VOLTAGE_BIAS_ERROR</rc>
-    <description>Cannot have both up and down bias set</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>     
- <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_EXT_VCS_VOLTAGE_BIAS_ERROR</rc>
-    <description>Cannot have both up and down bias set</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>  
- <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_INT_VDD_VOLTAGE_BIAS_ERROR</rc>
-    <description>Cannot have both up and down bias set</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>         
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_INT_VCS_VOLTAGE_BIAS_ERROR</rc>
-    <description>Cannot have both up and down bias set</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>         
-  <!-- *********************************************************************** -->  
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_CHARACTERIZATION_OBJECT_ERROR</rc>
-    <description>chip_characterization_create was passed null pointer to characterization or characterization->parameters</description>
-    <ffdc>CHAR_RETURN_CODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>  
-  </hwpError>  
-  <!-- *********************************************************************** -->  
-  <hwpError>
-    <rc> RC_PROCPM_PSTATE_DATABLOCK_CHARACTERIZATION_ARGUMENT_ERROR</rc>
-    <description>chip_characterization_create was passed null pointer to characterization->vpd or no points</description>
-    <ffdc>CHAR_RETURN_CODE</ffdc>    
-    <ffdc>POINTS</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>    
-  <!-- *********************************************************************** -->  
-  <hwpError>
-    <rc> RC_PROCPM_PSTATE_DATABLOCK_CHARACTERIZATION_ERROR</rc>
-    <description>chip_characterization_create returned an error</description>
-    <ffdc>CHAR_RETURN_CODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>  
-  </hwpError>      
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_GPST_CREATE_OBJECT_ERROR</rc>
-    <description>gpst_create was passed null pointer to gpst, characterization, or characterization->ops or characterization->points = 0</description>
-    <ffdc>GPST_RETURN_CODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>     
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_GPST_CREATE_ARGUMENT_ERROR</rc>
-    <description>gpst_create was passed bad argument and resulted in PSTATE limits error or operating point odering error</description>
-    <ffdc>GPST_RETURN_CODE</ffdc>
-    <ffdc>OPS_PMIN</ffdc>
-    <ffdc>OPS_PMAX</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>     
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_GPST_CREATE_ENTRY_ERROR</rc>
-    <description>gpst_entry_create was passed a voltage that was out of limits of vrm11 vid code or ivid vide code</description>
-    <ffdc>GPST_RETURN_CODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>        
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_GPST_CREATE_ERROR</rc>
-    <description>gpst_create returned an error</description>
-    <ffdc>GPST_RETURN_CODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>  
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_LPST_CREATE_OBJECT_ERROR</rc>
-    <description>lpst_create was passed null pointer to gpst or lpsa</description>
-    <ffdc>LPST_RETURN_CODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>      
-  <!-- *********************************************************************** -->
-   <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_LPST_CREATE_IVID_ERROR</rc>
-    <description>lpst_create attempted to convert an invalid voltage value to ivid format (GT 1.39375V or LT 0.6V)</description>
-    <ffdc>LPST_RETURN_CODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError> 
-  <!-- *********************************************************************** -->
-   <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_LPST_CREATE_VID_INCR_CLIP_INREG_ERROR</rc>
-    <description>lpst_create encountered a vid increment GT 7 in regulation</description>
-    <ffdc>LPST_RETURN_CODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>   
-  <!-- *********************************************************************** -->  
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_LPST_CREATE_ERROR</rc>
-    <description>lpst_create returned an error</description>
-    <ffdc>LPST_RETURN_CODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>    
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_RESCLK_BAND_ERROR</rc>
-    <description>Resonant clocking band attribute values are not in ascending order from low to high</description>
-    <ffdc>PM_RES_CLOCK_LOW_BAND_LOWER_FREQ</ffdc>
-    <ffdc>PM_RES_CLOCK_LOW_BAND_UPPER_FREQ</ffdc>
-    <ffdc>PM_RES_CLOCK_HIGH_BAND_LOWER_FREQ</ffdc>
-    <ffdc>PM_RES_CLOCK_HIGH_BAND_UPPER_FREQ</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>    
-   <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_PDV_ZERO_DATA_ERROR</rc>
-    <description>Zero valued data found in #V</description>
-    <ffdc>OP_POINT</ffdc>
-    <ffdc>CHIPLET_NUM</ffdc>
-    <ffdc>BUCKET_ID</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP_TARGET</target>
-    </deconfigure>
-  </hwpError>    
-   <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_PDV_OPPOINT_ORDER_ERROR</rc>
-    <description>#V operating point relationship error (power save > nominal > turbo)</description>
-    <ffdc>OP_POINT</ffdc>
-    <ffdc>CHIPLET_NUM</ffdc>
-    <ffdc>BUCKET_ID</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP_TARGET</target>
-    </deconfigure>
-  </hwpError>     
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_PSTATE_MINMAX_BOUNDS_ERROR</rc>
-    <description>freq2pState or pstate_minmax_chk returned error - computed pstate for freq is out of bounds of MAX/MIN possible</description>
-    <ffdc>RETURN_CODE</ffdc>
-    <ffdc>PSTATE</ffdc>
-    <ffdc>FREQ_KHZ</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>      
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_FREQ2PSTATE_PSTATE_MINMAX_BOUNDS_ERROR</rc>
-    <description>freq2pState returned error - computed pstate for freq is out of bounds of MAX/MIN possible</description>
-    <ffdc>RETURN_CODE</ffdc>
-    <ffdc>PSTATE</ffdc>
-    <ffdc>FREQ_KHZ</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>      
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_PSTATE_GT_GPSTPMAX_ERROR</rc>
-    <description>pstate_minmax_chk returned error -  Computed pstate is greater than max pstate in gpst</description>
-    <ffdc>RETURN_CODE</ffdc>
-    <ffdc>PSTATE</ffdc>
-    <ffdc>FREQ_KHZ</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>        
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_ERROR</rc>
-    <description>Bad Return code</description>
-    <ffdc>RETURN_CODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_FREQ2PSTATE_ERROR</rc>
-    <description>Bad Return code</description>
-    <ffdc>RETURN_CODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError> 
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_PSAFE_MINMAX_BOUNDS_ERROR</rc>
-    <description>freq2pState or pstate_minmax_chk returned error - computed pstate for freq is out of bounds of MAX/MIN possible</description>
-    <ffdc>RETURN_CODE</ffdc>
-    <ffdc>PSTATE</ffdc>
-    <ffdc>FREQ_KHZ</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_PSAFE_GT_GPSTPMAX_ERROR</rc>
-    <description>pstate_minmax_chk returned error -  Computed pstate is greater than max pstate in gpst</description>
-    <ffdc>RETURN_CODE</ffdc>
-    <ffdc>PSTATE</ffdc>
-    <ffdc>FREQ_KHZ</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_PSAFE_ERROR</rc>
-    <description>Bad Return code</description>
-    <ffdc>RETURN_CODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_PFLOOR_MINMAX_BOUNDS_ERROR</rc>
-    <description>freq2pState or pstate_minmax_chk returned error - computed pstate for freq is out of bounds of MAX/MIN possible</description>
-    <ffdc>RETURN_CODE</ffdc>
-    <ffdc>PSTATE</ffdc>
-    <ffdc>FREQ_KHZ</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_PFLOOR_GT_GPSTPMAX_ERROR</rc>
-    <description>pstate_minmax_chk returned error -  Computed pstate is greater than max pstate in gpst</description>
-    <ffdc>RETURN_CODE</ffdc>
-    <ffdc>PSTATE</ffdc>
-    <ffdc>FREQ_KHZ</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_PFLOOR_ERROR</rc>
-    <description>Bad Return code</description>
-    <ffdc>RETURN_CODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_PSTATE_DIFF_ERROR</rc>
-    <description>Percentage boost calculation overrun produced invalid Pstate Difference</description>
-    <ffdc>PSTATEDIFF</ffdc>
-    <ffdc>BOOSTEDFREQKHZ</ffdc>
-    <ffdc>PSTATE0FREQKHZ</ffdc>
-    <ffdc>FREQSTEPKHZ</ffdc>
-    <ffdc>ATTRBOOSTPERCENT</ffdc>
-    <ffdc>BOOSTEDPCT</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError> 
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_INVALID_BOOST_PERCENTAGE_ERROR</rc>
-    <description>Percentage boost request is greater than the maximum supported</description>
-    <ffdc>MAXBOOSTPERCENT</ffdc>
-    <ffdc>ATTRBOOSTPERCENT</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError> 
-  <!-- *********************************************************************** -->  
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_IQ_BUFFER_SIZE_ERROR</rc>
-    <description>IQ Buffer returned is wrong size</description>
-    <ffdc>BUFFER_SIZE</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP_TARGET</target>
-    </deconfigure>
-  </hwpError>   
-  <!-- *********************************************************************** -->  
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_IQ_MVPD_ERROR</rc>
-    <description>LRPx access for IQ keyword failed</description>
-    <ffdc>CHIPLET_NUMBER</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP_TARGET</target>
-    </deconfigure>
-  </hwpError>   
-   <!-- *********************************************************************** -->  
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_IQ_INVALID_VDD_ERROR</rc>
-    <description>IDDQ measurement for VDD was invalid (eg zero)</description>
-    <ffdc>RAW_VALUE</ffdc>
-    <ffdc>LRP_NUMBER</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP_TARGET</target>
-    </deconfigure>
-  </hwpError> 
-   <!-- *********************************************************************** -->  
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_IQ_INVALID_VCS_ERROR</rc>
-    <description>IDDQ measurement for VCS was invalid (eg zero)</description>
-    <ffdc>RAW_VALUE</ffdc>
-    <ffdc>LRP_NUMBER</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP_TARGET</target>
-    </deconfigure>
-  </hwpError>     
-  <!-- *********************************************************************** -->  
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_IQ_INVALID_VIO_ERROR</rc>
-    <description>IDDQ measurement for VIO was invalid (eg zero)</description>
-    <ffdc>RAW_VALUE</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP_TARGET</target>
-    </deconfigure>
-  </hwpError>   
-     <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_DATABLOCK_PDV_ZERO_DATA_UT_ERROR</rc>
-    <description>Zero valued data found in #V for UltraTubro point.  Continuing 
-    Pstate generation</description>
-    <ffdc>OP_POINT</ffdc>
-    <ffdc>CHIPLET_NUM</ffdc>
-    <ffdc>BUCKET_ID</ffdc>
-    <callout>
-      <target>CHIP_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-  </hwpError>    
-  <!-- *********************************************************************** -->  
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/pstates/pstates/p8_ivrm.H b/src/usr/hwpf/hwp/pstates/pstates/p8_ivrm.H
deleted file mode 100644
index 63b18c012..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/p8_ivrm.H
+++ /dev/null
@@ -1,107 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/p8_ivrm.H $                  */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_ivrm.H,v 1.2 2013/10/23 12:55:19 jimyac Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_ivrm.H,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2011
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! OWNER NAME: Greg Still         Email: stillgs@us.ibm.com
-// *!
-// *! General Description:
-// *!        #M IVRM Vital Product Data Structure
-//------------------------------------------------------------------------------
-//  
-// 
-// 
-
-#define CHIPLETS 12
-
-// 4 x 2B = 8B per measurement 
-typedef struct IVRM_MEASUREMENT {
-    uint16_t            gate_voltage;       // V1: mV, V2: uV
-    uint16_t            drain_voltage;      // V1: mV, V2: uV
-    uint16_t            source_voltage;     // V1: mV, V2: uV
-    uint16_t            drain_current;      // V1: mA, V2: uA
-} ivrm_measurement_t;
-
-// 8B x 32 measurements = 256B cal data
-#define IVRM_CAL_POINTS 32
-typedef struct IVRM_CAL_DATA {
-    uint32_t            point_valid;              // bit vector indicating valid points 
-    double             Coef[4];                      
-    ivrm_measurement_t  point[IVRM_CAL_POINTS];
-} ivrm_cal_data_t;
-
-// Murano:  256B x 6  = 1036B + 2 (temp) = 1038B
-// Venice:  256B x 12 = 2072B + 2 (temp) = 2074B
-
-typedef struct IVRM_EX_CAL_DATA 
-{
-    uint16_t            temp;       // binary in degrees C
-    uint16_t            ex_valid;   // bit vector of valid chiplets, left justified
-    ivrm_cal_data_t     ex[CHIPLETS];
-} ivrm_ex_cal_data_t;
-
-// 4 byte header
-typedef struct IVRM_MVPD_HEADER 
-{
-    char                name[2];       // Two character ID
-    uint8_t             length;        // Version 1: milli units; Version 2: micro units  
-    uint8_t             version;
-} ivrm_mvpd_header_t;
-
-
-typedef struct IVRM_MVPD 
-{
-    ivrm_mvpd_header_t  header;
-    ivrm_ex_cal_data_t  data;
-} ivrm_mvpd_t;
-
-// Chiplet numbering to indexing needs translation if VPD is held "packed" 
-// (eg 0:5 for Murano; 0:11 for Venice)
-//
-// Murano translation
-//   Index 0  <> EX 4
-//   Index 1  <> EX 5
-//   Index 2  <> EX 6
-//   Index 3  <> EX C (12)
-//   Index 4  <> EX D (13)
-//   Index 5  <> EX E (14)
-//
-// Venice translation
-//   Index 0  <> EX 1
-//   Index 1  <> EX 2
-//   Index 2  <> EX 3
-//   Index 3  <> EX 4
-//   Index 4  <> EX 5
-//   Index 5  <> EX 6
-//   Index 6  <> EX 9
-//   Index 7  <> EX A (10)
-//   Index 8  <> EX B (11)
-//   Index 9  <> EX C (12)
-//   Index 10 <> EX D (13)
-//   Index 11 <> EX E (14)
diff --git a/src/usr/hwpf/hwp/pstates/pstates/proc_get_voltage.C b/src/usr/hwpf/hwp/pstates/pstates/proc_get_voltage.C
deleted file mode 100755
index 02280b53c..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/proc_get_voltage.C
+++ /dev/null
@@ -1,161 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/proc_get_voltage.C $         */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: proc_get_voltage.C,v 1.6 2013/12/04 18:54:49 jimyac Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_get_voltage.C,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2012
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! TITLE       : proc_get_voltage.C
-// *! DESCRIPTION : Get VDD & VCS vid codes for given Frequency (FAPI)
-// *!
-// *! OWNER NAME  : Jim Yacynych         Email: jimyac@us.ibm.com
-// *! BACKUP NAME :
-// *!
-// *! ADDITIONAL COMMENTS :
-// *!   Procedure Prereq:
-// *!       - System clocks are running
-// *!
-//------------------------------------------------------------------------------
-//------------------------------------------------------------------------------
-//  Version     Date        Owner       Description
-//------------------------------------------------------------------------------
-//    1.2       11/07/13                RAS review changes
-//    1.1       mm/dd/yy    jimyac      Initial release
-//------------------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-#include <fapi.H>
-
-#include <pstate_tables.h>
-#include <lab_pstates.h>
-#include <pstates.h>
-#include <proc_get_voltage.H>
-
-extern "C" {
-
-using namespace fapi;
-
-// ----------------------------------------------------------------------
-// Function prototypes
-// ----------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Function definitions
-// ----------------------------------------------------------------------
-/// \param[in]      i_target           Chip Target
-/// \param[in]      i_freq_mhz         frequency in Mhz
-/// \param[out]     *o_vdd_vid         vdd vid value
-/// \param[out]     *o_vcs_vid         vcs vid value
-
-/// \retval FAPI_RC_SUCCESS
-/// \retval ERROR defined in xml
-
-ReturnCode proc_get_voltage(const Target&  i_target,
-                            const uint32_t i_freq_mhz,
-                            uint8_t& o_vdd_vid,
-                            uint8_t& o_vcs_vid)
-{
-    fapi::ReturnCode     l_rc;
-    int                  l_result = 0;
-    PstateSuperStructure l_pss;
-    gpst_entry_t         l_entry;
-    Pstate               l_freq_pstate       = 0;
-    Pstate               l_pmax              = 0;
-    uint8_t              l_freq_pstate_index = 0;
-
-    // -----------------------------
-    // create pstate super structure
-    // -----------------------------
-    
-    do
-    {
-        FAPI_IMP("Executing p8_build_pstate_datablock to create Pstate Superstructure");
-        FAPI_EXEC_HWP(l_rc, p8_build_pstate_datablock, i_target, &l_pss);
-        if (!l_rc.ok())
-        {
-            FAPI_ERR("Error calling p8_build_pstate_datablock");
-            break;
-        }
-
-        // ----------------------
-        // convert freq to pstate
-        // ----------------------
-        FAPI_INF("Look up Pstate for given frequency (%u Mhz) in Global Pstate Table in Pstate Superstructure", i_freq_mhz);
-        l_result = freq2pState(&(l_pss.gpst), (i_freq_mhz*1000), &l_freq_pstate);
-
-        if (l_result)
-        {
-            const uint32_t & FREQ_MHZ       = i_freq_mhz;
-            int            & FREQ2PSTATE_RC = l_result;
-            FAPI_ERR("**** ERROR : Pstate for given frequency (%u Mhz) is out of bounds of Pstate Values : max = %d min = %d", i_freq_mhz, PSTATE_MAX, PSTATE_MIN);
-            FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_GET_VOLTAGE_FREQ2PSTATE_ERROR);
-            break;
-        }
-
-        // ----------------------
-        // pstate bounds checking
-        // ----------------------
-        l_pmax = l_pss.gpst.pmin + l_pss.gpst.entries - 1;
-
-        FAPI_INF("l_freq_pstate = %d l_pmax = %d  pmin = %d entries = %d i_freq_mhz = %d\n", l_freq_pstate, l_pmax, l_pss.gpst.pmin, l_pss.gpst.entries, i_freq_mhz);
-
-        if (l_freq_pstate > l_pmax)
-        {
-            int8_t  & FREQ_PSTATE = l_freq_pstate;
-            int8_t  & PMAX        = l_pmax;
-            int8_t  & PMIN        = l_pss.gpst.pmin;
-            uint8_t & ENTRIES     = l_pss.gpst.entries;
-            FAPI_ERR("**** ERROR : Pstate (%d) for given frequency is greater than l_pmax (%d)", l_freq_pstate, l_pmax);
-            FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_GET_VOLTAGE_FREQ_PSTATE_GT_PMAX_ERROR);
-            break;
-        }
-
-        // clip l_freq_pstate to pmin if it is lower than pmin
-        if (l_freq_pstate < l_pss.gpst.pmin)
-        {
-            FAPI_INF("Pstate for given frequency is less than pmin, so clipping it to pmin");
-            l_freq_pstate = l_pss.gpst.pmin;
-        }
-
-        // --------------------------------------------------------
-        // convert pstate to pstate table index and lookup voltages
-        // --------------------------------------------------------
-        l_freq_pstate_index = l_freq_pstate - l_pss.gpst.pmin;
-        l_entry.value       = revle64(l_pss.gpst.pstate[l_freq_pstate_index].value);
-        o_vdd_vid           = l_entry.fields.evid_vdd;
-        o_vcs_vid           = l_entry.fields.evid_vcs;
-        
-        FAPI_INF("vid codes for pstate %d : vdd = 0x%02x vcs = 0x%02x", l_freq_pstate, o_vdd_vid, o_vcs_vid);
-        
-    } while(0);
-
-    return l_rc;
-}
-
-} //end extern C
diff --git a/src/usr/hwpf/hwp/pstates/pstates/proc_get_voltage.H b/src/usr/hwpf/hwp/pstates/pstates/proc_get_voltage.H
deleted file mode 100755
index c82c86aa1..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/proc_get_voltage.H
+++ /dev/null
@@ -1,75 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/proc_get_voltage.H $         */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: proc_get_voltage.H,v 1.4 2013/12/04 18:54:50 jimyac Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_get_voltage.H,v $
-//------------------------------------------------------------------------------
-// *! (C) Copyright International Business Machines Corp. 2012
-// *! All Rights Reserved -- Property of IBM
-// *! ***  ***
-//------------------------------------------------------------------------------
-// *! TITLE       : proc_get_voltage.H
-// *! DESCRIPTION : Get VDD & VCS Voltage for given Frequency (FAPI)
-// *!
-// *! OWNER NAME  : Jim Yacynych         Email: jimyac@us.ibm.com
-// *! BACKUP NAME : 
-// *!
-// *! ADDITIONAL COMMENTS :
-// *!
-//------------------------------------------------------------------------------
-
-#ifndef _proc_get_voltage_H_
-#define _proc_get_voltage_H_
-
-//------------------------------------------------------------------------------
-// Includes
-//------------------------------------------------------------------------------
-#include <fapi.H>
-#include <p8_build_pstate_datablock.H>
-
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*proc_get_voltage_FP_t) (const fapi::Target&,
-                                                   const uint32_t, 
-                                                   uint8_t &, 
-                                                   uint8_t &);
-
-extern "C" {
-
-//------------------------------------------------------------------------------
-// Function prototype
-//------------------------------------------------------------------------------
-/// \brief Build Pstate Tables
-/// \param[in]     i_target            Chip Target
-/// \param[in]     i_freq_mhz          frequency in Mhz 
-/// \param[out]    o_vdd_vid           vdd value for given frequency  
-/// \param[out]    o_vcs_vid           vcs value for given frequency 
-
-fapi::ReturnCode proc_get_voltage(const fapi::Target& i_target, 
-                                  const uint32_t i_freq_mhz, 
-                                  uint8_t& o_vdd_vid, 
-                                  uint8_t& o_vcs_vid);
-
-} // extern "C"
-
-#endif
diff --git a/src/usr/hwpf/hwp/pstates/pstates/proc_get_voltage_errors.xml b/src/usr/hwpf/hwp/pstates/pstates/proc_get_voltage_errors.xml
deleted file mode 100755
index 8a629c499..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/proc_get_voltage_errors.xml
+++ /dev/null
@@ -1,51 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/pstates/pstates/proc_get_voltage_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_get_voltage_errors.xml,v 1.6 2013/12/04 18:55:29 jimyac Exp $ -->
-<!-- Error definitions for proc_get_voltage procedure -->
-
-<hwpErrors>
- <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_GET_VOLTAGE_FREQ_PSTATE_GT_PMAX_ERROR</rc>
-    <description>Pstate for given frequency is greater than pmax</description>
-    <ffdc>FREQ_PSTATE</ffdc>
-    <ffdc>PMAX</ffdc>
-    <ffdc>PMIN</ffdc>
-    <ffdc>ENTRIES</ffdc>
-    <callout>
-       <procedure>CODE</procedure>
-       <priority>HIGH</priority> 
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_GET_VOLTAGE_FREQ2PSTATE_ERROR</rc>
-    <description>Procedure freq2pState() returned an error</description>
-    <ffdc>FREQ_MHZ</ffdc>
-    <ffdc>FREQ2PSTATE_RC</ffdc>
-    <callout>
-       <procedure>CODE</procedure>
-       <priority>HIGH</priority> 
-    </callout>
-  </hwpError>    
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/pstates/pstates/proc_set_max_pstate.C b/src/usr/hwpf/hwp/pstates/pstates/proc_set_max_pstate.C
deleted file mode 100755
index 73032a166..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/proc_set_max_pstate.C
+++ /dev/null
@@ -1,165 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/proc_set_max_pstate.C $      */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] Google Inc.                                                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/// \file proc_set_max_pstate.C
-//------------------------------------------------------------------------------
-
-// ----------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------
-#include <fapi.H>
-
-#include "ecmdDataBufferBase.H"
-#include "pstate_tables.h"
-#include "lab_pstates.h"
-#include "pstates.h"
-
-#include "proc_get_voltage.H"
-#include "p8_scom_addresses.H"
-
-extern "C" {
-
-fapi::ReturnCode proc_set_max_pstate(const fapi::Target& i_proc_target)
-{
-    fapi::ReturnCode     l_rc;
-    uint32_t             i = 0;
-    PstateSuperStructure pss;
-    gpst_entry_t         entry;
-    Pstate               pnom              = 0;
-    uint8_t              freq_pstate_index = 0;
-    uint64_t             freq_nom_khz      = 0;
-    uint32_t             vdd               = 0;
-    uint32_t             vcs               = 0;
-    std::vector<fapi::Target>       l_exChiplets;
-    std::vector<fapi::Target>       l_coreChiplets;
-
-    // Create pstate super structure
-    FAPI_ERR("Executing proc_set_max_pstate");
-
-    FAPI_EXEC_HWP(l_rc,  p8_build_pstate_datablock, i_proc_target,  &pss);
-    if (!l_rc.ok()) {
-        FAPI_ERR("Error calling p8_build_pstate_datablock");
-        return l_rc;
-    }
-
-    // Get nominal frequency.
-    uint32_t sys_freq_nom = 0;
-    l_rc = FAPI_ATTR_GET(ATTR_FREQ_CORE_NOMINAL, NULL, sys_freq_nom);
-    if (l_rc) { return l_rc; }
-    sys_freq_nom *= 1000; // Convert to khz.
-
-    // Get the pstate closest to nominal frequency.
-    if (freq2pState(&pss.gpst, sys_freq_nom, &pnom))
-    {
-        // Failed to find a frequency.  Use pmin.
-        FAPI_ERR("Unable to find a frequency closest to nominal.  Using pmin.");
-        pnom = gpst_pmin(&pss.gpst);
-    }
-
-    freq_nom_khz = (pss.gpst.pstate0_frequency_khz +
-            pss.gpst.frequency_step_khz * pnom);
-
-    // Convert pstate to pstate table index and lookup voltages
-    freq_pstate_index = pnom - pss.gpst.pmin;
-    entry.value = revle64(pss.gpst.pstate[freq_pstate_index].value);
-    vdd = entry.fields.evid_vdd;
-    vcs = entry.fields.evid_vcs;
-
-    FAPI_INF("%s nominal pstate is %d, freq: %dKhz VDD: %dmV VCS: %dmV",
-            i_proc_target.toEcmdString(), pnom, freq_nom_khz,
-            VRM11_BASE_UV - 6250 * vdd, VRM11_BASE_UV - 6250 * vcs);
-
-    // Set the voltage.
-    ecmdDataBufferBase wdata_reg(64);
-    wdata_reg.setByte(0, 0);
-    wdata_reg.setByte(1, vdd);
-    wdata_reg.setByte(2, vcs);
-    wdata_reg.setByte(3, 0);
-    l_rc = fapiPutScom(i_proc_target, PMC_O2S_WDATA_REG_0x00062058, wdata_reg);
-    if (l_rc)
-    {
-        FAPI_ERR("SCOM to PMC_O2S_WDATA_REG_0x00062058 failed.");
-        return l_rc;
-    }
-    // Wait for voltage ramp.
-    fapiDelay(1e8, 0);
-
-    // Set the frequency on each EX.
-    l_rc = fapiGetChildChiplets (i_proc_target, fapi::TARGET_TYPE_EX_CHIPLET,
-            l_exChiplets, fapi::TARGET_STATE_FUNCTIONAL);
-    if (l_rc)
-    {
-        FAPI_ERR("Error from fapiGetChildChiplets!");
-        return l_rc;
-    }
-
-    for (i = 0; i < l_exChiplets.size(); i++)
-    {
-        uint8_t l_chipNum = 0xFF;
-        l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[i], l_chipNum);
-        if (l_rc)
-        {
-            FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error");
-            return l_rc;
-        }
-
-        ecmdDataBufferBase freqcntl_reg(64);
-        l_rc = fapiGetScom(i_proc_target,
-                EX_FREQCNTL_0x100F0151 + (l_chipNum * 0x01000000),
-                freqcntl_reg);
-        if (l_rc)
-        {
-            return l_rc;
-        }
-
-        // Set frequency multiplier based on ref clock.
-        uint32_t mult = freq_nom_khz / 1000 / 33;
-        freqcntl_reg.insertFromRight(&mult, 0, 9);
-        freqcntl_reg.insertFromRight(&mult, 9, 9);
-
-        FAPI_ERR("%s setting to multiplier %dX",
-                l_exChiplets[i].toEcmdString(),
-                mult);
-        l_rc = fapiPutScom(i_proc_target,
-                EX_FREQCNTL_0x100F0151 + (l_chipNum * 0x01000000),
-                freqcntl_reg);
-        if (l_rc)
-        {
-            return l_rc;
-        }
-
-        unsigned int freq_mhz = freq_nom_khz / 1000;
-        l_rc = FAPI_ATTR_SET(ATTR_FREQ_CORE, &l_exChiplets[i], freq_mhz);
-        if (l_rc)
-        {
-            return l_rc;
-        }
-    }
-
-    return l_rc;
-}
-
-} //end extern C
-
diff --git a/src/usr/hwpf/hwp/pstates/pstates/proc_set_max_pstate.H b/src/usr/hwpf/hwp/pstates/pstates/proc_set_max_pstate.H
deleted file mode 100755
index bf3d2d0d6..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/proc_set_max_pstate.H
+++ /dev/null
@@ -1,43 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/proc_set_max_pstate.H $      */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
-/* [+] International Business Machines Corp.                              */
-/* [+] Google Inc.                                                        */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#ifndef _proc_set_max_pstate_H_
-#define _proc_set_max_pstate_H_
-
-#include <fapi.H>
-
-extern "C" {
-
-//------------------------------------------------------------------------------
-// Function prototype
-//------------------------------------------------------------------------------
-/// \brief Set Maximum pstate
-/// \param[in]     i_target            Chip Target
-
-fapi::ReturnCode proc_set_max_pstate(const fapi::Target& i_target);
-
-} // extern "C"
-
-#endif
diff --git a/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.c b/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.c
deleted file mode 100755
index 5518b3954..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.c
+++ /dev/null
@@ -1,1694 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/pstate_tables.c $            */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: pstate_tables.c,v 1.26 2015/08/20 17:04:06 stillgs Exp $
-
-/// \file pstate_tables.c
-/// \brief This file contains code used to generate Pstate tables from real or
-/// imagined chip characterizations.
-///
-/// This code is never run as part of OCC firmware, as Pstate tables are
-/// always "given" to OCC either from the FSP (OCC product firmware), or by
-/// being built-in the image (lab images).
-
-
-
-#include <stdlib.h>
-#include <stdint.h>
-#include <stdio.h>
-#include "lab_pstates.h"
-#include "pstate_tables.h"
-
-
-// Debugging support, normally disabled. All of the formatted I/O you see in
-// the code is effectively under this switch.
-
-#ifdef __FAPI
-
-#include "fapi.H"
-#define fprintf(stream, ...) FAPI_ERR(__VA_ARGS__)
-#define printf(...) FAPI_INF(__VA_ARGS__)
-#define TRACE_NEWLINE ""
-
-#else // __FAPI
-
-#include <stdio.h>
-#define fprintf(stream, ...) printf("***ERROR*** " __VA_ARGS__)
-#define TRACE_NEWLINE "\n"
-
-#endif // __FAPI
-
-#define TRACE_ERROR(x)                                                  \
-    ({                                                                  \
-        fprintf(stderr, "%s:%d : Returning error code %d " TRACE_NEWLINE, \
-                __FILE__, __LINE__, (x));                               \
-        (x);                                                            \
-    })
-
-#define TRACE_ERRORX(x, ...)                    \
-    ({                                          \
-        TRACE_ERROR(x);                         \
-        fprintf(stderr, ##__VA_ARGS__);         \
-        (x);                                    \
-    })
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define MAX(X, Y)                           \
-    ({                                      \
-    typeof (X) __x = (X);                   \
-    typeof (Y) __y = (Y);                   \
-    (__x > __y) ? __x : __y;                \
-    })
-
-static int
-cntlz32(uint32_t x)
-{
-    return __builtin_clz(x);
-}
-
-
-/// Byte-reverse a 16-bit integer if on a little-endian machine
-
-uint16_t
-revle16(uint16_t i_x)
-{
-    uint16_t rx;
-
-#ifndef _BIG_ENDIAN
-    uint8_t *pix = (uint8_t*)(&i_x);
-    uint8_t *prx = (uint8_t*)(&rx);
-
-    prx[0] = pix[1];
-    prx[1] = pix[0];
-#else
-    rx = i_x;
-#endif
-
-    return rx;
-}
-
-
-/// Byte-reverse a 32-bit integer if on a little-endian machine
-
-uint32_t
-revle32(uint32_t i_x)
-{
-    uint32_t rx;
-
-#ifndef _BIG_ENDIAN
-    uint8_t *pix = (uint8_t*)(&i_x);
-    uint8_t *prx = (uint8_t*)(&rx);
-
-    prx[0] = pix[3];
-    prx[1] = pix[2];
-    prx[2] = pix[1];
-    prx[3] = pix[0];
-#else
-    rx = i_x;
-#endif
-
-    return rx;
-}
-
-
-/// Byte-reverse a 64-bit integer if on a little-endian machine
-
-uint64_t
-revle64(const uint64_t i_x)
-{
-    uint64_t rx;
-
-#ifndef _BIG_ENDIAN
-    uint8_t *pix = (uint8_t*)(&i_x);
-    uint8_t *prx = (uint8_t*)(&rx);
-
-    prx[0] = pix[7];
-    prx[1] = pix[6];
-    prx[2] = pix[5];
-    prx[3] = pix[4];
-    prx[4] = pix[3];
-    prx[5] = pix[2];
-    prx[6] = pix[1];
-    prx[7] = pix[0];
-#else
-    rx = i_x;
-#endif
-
-    return rx;
-}
-
-
-/// Create a ChipCharacterization from an array of VPD operating points and
-/// characterization parameters.
-///
-/// \param characterization An uninitialized or unused ChipCharacterization
-/// structure.
-///
-/// \param vpd An initialized array of VpdOperatingPoints, sorted by increasing
-/// frequency. Note that there must be at least 1 DPLL frequency code step (1
-/// Pstate step) between each VPD operating point in order to use the
-/// characterization to create a Pstate table.
-///
-/// \param ops An uninitialized array of OperatingPoint, this array will be
-/// intialized by this API.
-///
-/// \param parameters An initialized OperatingPointParameters structure
-///
-/// \param points The (non-negative) number of operating points
-///
-/// \retval 0 Success
-///
-/// \returns Other return codes indicate errors.
-
-int
-chip_characterization_create(ChipCharacterization *characterization,
-                 VpdOperatingPoint *vpd,
-                 OperatingPoint *ops,
-                 OperatingPointParameters *parameters,
-                 uint32_t points)
-{
-    int rc;
-    uint32_t i, c;
-    uint32_t pstate0_code;
-    uint8_t  gpst_points            = 0;
-    uint32_t curr_pstate_code       = 0;
-    uint32_t next_pstate_code       = 0;
-    uint32_t max_cores              = 0;
-
-
-    do {
-        rc = 0;
-
-        if ((characterization == 0) || (parameters == 0)) {
-            rc = -GPST_INVALID_OBJECT;
-            break;
-        }
-        if ((vpd == 0) || (points <= 0)) {
-            rc = TRACE_ERRORX(-GPST_INVALID_ARGUMENT, 
-                            "vpd & points");
-            break;
-        }
-
-        characterization->vpd        = vpd;
-        characterization->ops        = ops;
-        characterization->parameters = parameters;
-        characterization->points     = points;
-
-        max_cores =  characterization->max_cores;
-
-        // Now convert the array of VPD operating point to the array of
-        // internal operating points
-        //
-        // For frequencies and characterization voltages and currents this is
-        // simple math.  Creating load-line corrected volatges requires
-        // multiplying worst-case currents by the effective load-line
-        // resistance.
-        //
-        // Note that the Pstate computation is made relative to the Pstate 0
-        // frequency code (DPLL input).  It's done this way so that
-        // frequencies with non-integral codes always round down (to lower
-        // frequencies).
-
-        pstate0_code =
-            parameters->pstate0_frequency_khz / parameters->frequency_step_khz;
-
-        for (i = 0; i < points; i++) {
-
-            // Skip vpd point if next point is at same pstate
-            curr_pstate_code = vpd[i].frequency_mhz * 1000 / parameters->frequency_step_khz;
-            if (i < points-1) {
-              next_pstate_code = vpd[i+1].frequency_mhz * 1000 / parameters->frequency_step_khz;
-            }
-
-            if (i < points-1 && (curr_pstate_code == next_pstate_code)) {
-              continue;
-            }
-
-            ops[gpst_points].vdd_uv = vpd[i].vdd_5mv * 5000;
-            ops[gpst_points].vcs_uv = vpd[i].vcs_5mv * 5000;
-
-            ops[gpst_points].vdd_maxreg_uv = vpd[i].vdd_maxreg_5mv * 5000;
-            ops[gpst_points].vcs_maxreg_uv = vpd[i].vcs_maxreg_5mv * 5000;
-
-            ops[gpst_points].idd_ma = vpd[i].idd_500ma * 500;
-            ops[gpst_points].ics_ma = vpd[i].ics_500ma * 500;
-
-            ops[gpst_points].frequency_khz = vpd[i].frequency_mhz * 1000;
-
-            // 'Corrected' voltages values add in the load-line & distribution IR drop
-
-            ops[gpst_points].vdd_corrected_uv =
-                ops[gpst_points].vdd_uv +
-                ((ops[gpst_points].idd_ma * (parameters->vdd_load_line_uohm + parameters->vdd_distribution_uohm)) / 1000) +
-                parameters->vdd_voffset_uv; // SW267784 add in offset in uohm
-
-            ops[gpst_points].vcs_corrected_uv =
-                ops[gpst_points].vcs_uv +
-                ((ops[gpst_points].ics_ma * (parameters->vcs_load_line_uohm + parameters->vcs_distribution_uohm)) / 1000) +
-                parameters->vcs_voffset_uv;   // SW267784 add in offset in uohm
-
-            // iVRM 'Effective' voltages are set to the measured voltages
-
-            ops[gpst_points].vdd_ivrm_effective_uv = ops[gpst_points].vdd_uv;
-            ops[gpst_points].vcs_ivrm_effective_uv = ops[gpst_points].vcs_uv;
-
-            ops[gpst_points].pstate =
-                (ops[gpst_points].frequency_khz / parameters->frequency_step_khz) -
-                pstate0_code;
-
-            // For WOF, compute the "per active core" point set based on ratioing
-            // the current at the operating point in a linear fashion.  The ratio
-            // is only computed for up to the number of cores present on this chip
-            // as the current contained in the VPD is measured with only that number
-            // of cores active.
-            if (i == TURBO || i == ULTRA)
-            {
-                for (c = 0; c < max_cores; ++c)
-                {
-                    double ratio = (double)(c+1)/max_cores;
-                    double idd_currentf_ma = (double)ops[gpst_points].idd_ma;
-                    uint32_t idd_current_ratioed_ma = (uint32_t)(idd_currentf_ma * ratio + 0.5);  // round up
-                    uint32_t vdd_impedance_uohm = parameters->vdd_load_line_uohm + parameters->vdd_distribution_uohm;
-                    
-                    uint32_t vdd_dist_uplift_uv = 
-                            (uint32_t)( idd_current_ratioed_ma * 
-                                       ((double)vdd_impedance_uohm/1000));
-                                                                      
-                    ops[gpst_points].vdd_corrected_wof_uv[c] =
-                        ops[gpst_points].vdd_uv +              // Base Point with bias but no system effects
-                        vdd_dist_uplift_uv +                   // Distribution loss based on apportioned current
-                        parameters->vdd_voffset_uv;            // Offset present
-
-                    printf( "ops[%d].vdd_uv = %u "
-                            "ratio = %f "
-                            "id_ma = %6.0f "
-                            "current ratioed_ma = %d "
-                            "load line = %d "
-                            "dist loss = %d "
-                            "dist impedance uohm %d "
-                            "dist uplift %d uV "
-                            "dist offset %d uV "                            
-                            "ops[%d].vdd_corrected_wof_uv[%u] = %u" TRACE_NEWLINE,
-                            gpst_points, ops[gpst_points].vdd_uv,
-                            ratio,
-                            idd_currentf_ma,
-                            idd_current_ratioed_ma,
-                            parameters->vdd_load_line_uohm,
-                            parameters->vdd_distribution_uohm,
-                            vdd_impedance_uohm,
-                            vdd_dist_uplift_uv,
-                            parameters->vdd_voffset_uv,   
-                            gpst_points, c, ops[gpst_points].vdd_corrected_wof_uv[c]);
-
-                    double ics_currentf_ma = (double)ops[gpst_points].ics_ma;
-                    uint32_t ics_current_ratioed_ma = (uint32_t)(ics_currentf_ma * ratio + 0.5);  // round up
-                    
-                    uint32_t vcs_impedance_uohm = parameters->vcs_load_line_uohm + parameters->vcs_distribution_uohm;
-                    
-                    uint32_t vcs_dist_uplift_uv = 
-                            (uint32_t)( ics_current_ratioed_ma * 
-                                       ((double)vcs_impedance_uohm/1000));
-                                     
-                    ops[gpst_points].vcs_corrected_wof_uv[c] =
-                        ops[gpst_points].vcs_uv +              // Base Point with bias but no system effects
-                        vcs_dist_uplift_uv +                   // Distribution loss based on apportioned current
-                        parameters->vcs_voffset_uv;            // Offset present
-
-                    printf( "ops[%d].vcs_uv = %u "
-                            "ratio = %f "
-                            "id_ma = %6.0f "
-                            "current ratioed_ma = %d "
-                            "load line = %d "
-                            "dist loss = %d "
-                            "dist impedance %d "
-                            "dist uplift %d uV "
-                            "dist offset %d UV "
-                            "ops[%d].vcs_corrected_wof_uv[%u] = %u" TRACE_NEWLINE,
-                            gpst_points, ops[gpst_points].vcs_uv,
-                            ratio,
-                            ics_currentf_ma,
-                            ics_current_ratioed_ma,
-                            parameters->vcs_load_line_uohm,
-                            parameters->vcs_distribution_uohm,
-                            ((parameters->vcs_load_line_uohm +
-                                 parameters->vcs_distribution_uohm)),
-                            vcs_dist_uplift_uv,
-                            parameters->vcs_voffset_uv,   
-                            gpst_points, c, ops[gpst_points].vcs_corrected_wof_uv[c]);
-                }
-            }
-
-            printf("gpst_points %u "
-                "ops[gpst_points].vdd_uv = %u "
-                "ops[gpst_points].vcs_uv = %u "
-                "ops[gpst_points].vdd_maxreg_uv = %u "
-                "ops[gpst_points].vcs_maxreg_uv = %u "
-                "ops[gpst_points].idd_ma = %u "
-                "ops[gpst_points].ics_ma = %u" TRACE_NEWLINE,
-                gpst_points,
-                ops[gpst_points].vdd_uv,
-                ops[gpst_points].vcs_uv,
-                ops[gpst_points].vdd_maxreg_uv,
-                ops[gpst_points].vcs_maxreg_uv,
-                ops[gpst_points].idd_ma,
-                ops[gpst_points].ics_ma);
-            gpst_points++;
-        }
-
-        // Set points to adjusted number of points (ie. if vpd point was skipped due to being same pstate
-        // as next vpd point
-        characterization->points = gpst_points;
-
-    } while (0);
-
-    return rc;
-}
-
-
-// Set up GPST Pstate stepping parameters
-//
-// \param gpst A GlobalPstateTable object to be initialized with the stepping
-// setup.
-//
-// \param pstate_stepsize Unsigned 7 bit (baby-) stepsize for Pstate
-// transitions between the Global Pstate Actual and the Global Pstate
-// Target.  The value 0 is considered illegal here.
-//
-// \param vrm_delay_ns This value defines the voltage settling delay (in
-// nano-seconds) after each voltage change sequenced by the GPSM.  This
-// includes all voltage changes \e except those explicitly managed by
-// firmware manipulation of the SPIVID interface.  Legal values range from 0
-// up to approximately 1,600,000 (1.6ms).  The VRM step delay is stored using
-// an exponential encoding. The step delay computed here is a
-// normalized (if possible) exponential encoding for highest accuracy.
-//
-// \note The caller is responsible for the mode-correctness of this call.
-// The call should only be made when the GPSM is quiesced.
-//
-// \retval 0 Success
-//
-// \retval -GPST_INVALID_ARGUMENT Either argument was invalid in some way.
-
-// jwy if we use this proc in future, do not use this value for nest freq
-// instead, use the value of attribute ATTR_FREQ_PB
-#define NEST_FREQ_KHZ 2400000
-
-int
-gpst_stepping_setup(GlobalPstateTable* gpst,
-                    int pstate_stepsize,
-                    int vrm_delay_ns)
-{
-    uint32_t cycles, sigbits, stepdelay_range, stepdelay_value;
-    int rc;
-
-    do {
-        rc = 0;
-
-        if ((pstate_stepsize <= 0) ||
-            (pstate_stepsize > PSTATE_STEPSIZE_MAX) ||
-            (vrm_delay_ns < 0) ||
-            (vrm_delay_ns > VRM_STEPDELAY_MAX)) {
-            rc = TRACE_ERRORX(-GPST_INVALID_ARGUMENT, 
-                              "pstate_stepsize");
-            break;
-        }
-
-        // Compute the number of pervasive / 2 cycles implied by the delay.
-        // This is the frequency of the VRM stepper 'tick'. The base time
-        // source for VRM stepping is therefore nest clock / 8.
-
-        cycles = (((NEST_FREQ_KHZ / 1000) * vrm_delay_ns) / 1000) /
-            (1 << LOG2_VRM_STEPDELAY_DIVIDER);
-
-        // Normalize the exponential encoding
-
-        sigbits = 32 - cntlz32(cycles);
-
-       stepdelay_range = (sigbits - VRM_STEPDELAY_RANGE_BITS);
-
-        if (stepdelay_range < 0)
-        {
-            stepdelay_range = 0;
-        }
-
-        stepdelay_value = cycles >> (stepdelay_range + LOG2_VRM_STEPDELAY_DIVIDER);
-
-        if (stepdelay_range > ((1u << VRM_STEPDELAY_RANGE_BITS) - 1)) {
-            rc = TRACE_ERRORX(-GPST_INVALID_ARGUMENT, 
-                              "stepdelay_range");
-            break;
-        }
-
-        gpst->pstate_stepsize = pstate_stepsize;
-        gpst->vrm_stepdelay_range = stepdelay_range;
-        gpst->vrm_stepdelay_value = stepdelay_value;
-
-    } while (0);
-
-    return rc;
-}
-
-
-// Create (initialize) a GPST entry from an operating point.
-//
-// Most of the voltages are straightforward - note that vuv2vrm11 rounds the
-// voltages safely.
-//
-// The specification requires that Vcs be given as a signed offset. The Vcs
-// offset is a simple signed number of VID steps (not a crazy inverted
-// encoding like the Vdd VID code). We're always going to round the VCS offset
-// up (greater Vdiff).  A fine point - we add the original offset to the
-// VRM-11 form of the voltage, not the original voltage, further potentially
-// increasing Vdiff.
-//
-// -*- NB : Note a subtle point about endianess here: The gpst_entry_t is
-// coded to allow the correct creation of the uint64_t form of the object on
-// big/little endian machines.  However, the 'gpe' pointer here is a pointer
-// to a structure in a memory image, and using the host-endian form of the
-// structure is wrong - in this case we always need to use the big-endian
-// form! So we first construct the entry as an integer, then reverse it into
-// the image.
-
-static int
-gpst_entry_create(gpst_entry_t *entry, OperatingPoint *op)
-{
-    int rc;
-    uint8_t vid;
-
-    gpst_entry_t gpe;
-
-    do {
-
-        // Clear the entry and do the straightforward conversions
-
-        gpe.value = 0;
-
-#define __SET(type, round, gpe_field, op_field)         \
-    rc = vuv2##type(op->op_field, round, &vid);    \
-    if (rc) break;                                  \
-    gpe.fields.gpe_field = vid;
-
-        __SET(vrm11, ROUND_VOLTAGE_UP, evid_vdd, vdd_corrected_uv);
-        __SET(vrm11, ROUND_VOLTAGE_UP, evid_vcs, vcs_corrected_uv);
-        __SET(ivid, ROUND_VOLTAGE_DOWN, evid_vdd_eff, vdd_ivrm_effective_uv);
-        __SET(ivid, ROUND_VOLTAGE_DOWN, evid_vcs_eff, vcs_ivrm_effective_uv);
-        __SET(ivid, ROUND_VOLTAGE_DOWN, maxreg_vdd, vdd_maxreg_uv);
-        __SET(ivid, ROUND_VOLTAGE_DOWN, maxreg_vcs, vcs_maxreg_uv);
-
-       ;
-
-        // Add the check byte
-
-        uint8_t gpstCheckByte(uint64_t gpstEntry);
-        gpe.fields.ecc = gpstCheckByte(gpe.value);
-
-    } while (0);
-
-    // Byte reverse the entry into the image.
-
-    entry->value = revle64(gpe.value);
-    return rc;
-}
-
-
-int
-vid_mod_entry_create(WOFElements *wof, uint32_t index, uint32_t core, OperatingPoint *op)
-{
-    int rc = 0;
-    uint8_t vid;
-
-    do {
-
-
-#define __SETVM(type, round, wof_field, op_field)         \
-    rc = vuv2##type(op->op_field, round, &vid);    \
-    if (rc) \
-    { \
-        fprintf(stderr, "   SETVM error:  op_field = %u; vid = %u" TRACE_NEWLINE, op->op_field, vid); \
-        break;                                    \
-    } \
-    wof->ut_vid_mod.wof_field = vid; \
-
-        __SETVM(vrm11, ROUND_VOLTAGE_UP, ut_segment_vdd_vid[index][core], vdd_corrected_wof_uv[core]);
-
-                printf("   op->vdd_corrected_wof_uv[%d] = %u; wof->ut_vid_mod.ut_segment_vdd_vid[%d][%d] = 0x%02X" TRACE_NEWLINE,                    
-                    core, op->vdd_corrected_wof_uv[core],
-                    index, core, wof->ut_vid_mod.ut_segment_vdd_vid[index][core]);
-
-        __SETVM(vrm11, ROUND_VOLTAGE_UP, ut_segment_vcs_vid[index][core], vcs_corrected_wof_uv[core]);
-
-
-
-        printf("   op->vcs_corrected_wof_uv[%d] = %u; wof->ut_vid_mod.ut_segment_vcs_vid[%d][%d] = 0x%02X" TRACE_NEWLINE,
-                    core, op->vcs_corrected_wof_uv[core],
-                    index, core, wof->ut_vid_mod.ut_segment_vcs_vid[index][core]);
-
-    } while (0);
-
-    return rc;
-}
-
-
-
-// Linear interpolation of voltages
-
-static uint32_t
-interpolate(uint32_t base, uint32_t next, int step, int steps)
-{
-    return base + (((next - base) * step) / steps);
-}
-
-
-/// Create a global Pstate table from an array of internal operating points
-///
-/// \param gpst A pointer to a GlobalPstateTable structure.  This structure
-/// must not currently be in use as the PMC Global Pstate Table.
-///
-/// \param characterization An initialized ChipCharacterization.  The
-/// operating point table must be sorted in ascending order by both Pstate and
-/// (uncorrected) Vdd and Vcs voltages. The range of Pstates in the table must
-/// also physicaly fit within the physical number of entries.
-///
-/// \param pstate_stepsize Pstate step size
-///
-/// \param evrm_delay_ns External VRM delay in nano-seconds
-///
-/// This routine creates a GlobalPstateTable by linear interpolation of
-/// corrected voltages between characterized operating points.
-///
-/// Defaults - Can be overidden later:
-///
-/// - The Psafe is always set to the minimum Pstate
-/// - The dpll_fmax_bias is set to 0 for all cores
-/// - The undervolting bias is set to 0
-/// - The pstate0_frequency_code is det to the default value for all cores.
-///
-/// This routine always checks for errors
-///
-/// \retval 0 Success
-///
-/// \retval -GPST_INVALID_OBJECT Either the \a gpst or \a ops were NULL (0) or
-/// obviously invalid or incorrectly initialized.
-///
-/// \retval -GPST_INVALID_ARGUMENT This code indicates one of several types of
-/// errors that may occur in the \a ops.
-///
-/// \retval -VRM_INVALID_VOLTAGE A characterized or interpolated voltage can
-/// not be represented as a VRM-11 VID code.
-
-int
-gpst_create(GlobalPstateTable *gpst,
-            ChipCharacterization *characterization,
-            WOFElements *wof,
-            int pstate_stepsize,
-            int evrm_delay_ns)
-{
-    OperatingPoint *ops, interp;
-    int rc;
-    uint32_t points, pstates_ut = 0;
-    int32_t entry, entry_turbo;
-    int32_t pmin, pmax, pstate;
-    uint8_t fNom;
-    uint32_t i, c, max_cores;
-    gpst_entry_t gpst_entry_temp;
-
-    do {
-        rc = 0;
-
-        // Basic pointer checks
-
-        if ((gpst == 0) || (characterization == 0)) {
-            rc = -GPST_INVALID_OBJECT;
-            break;
-        }
-
-        // Check for null or illegal operating point tables
-
-        ops         = characterization->ops;
-        points      = characterization->points;
-        max_cores   = characterization->max_cores;
-
-        if ((ops == 0) || (points <= 0)) {
-            rc = -GPST_INVALID_OBJECT;
-            break;
-        }
-
-        pmin = ops[0].pstate;
-        pmax = ops[points - 1].pstate;
-        printf("**** Check : pmin %x, pmax %x" TRACE_NEWLINE,
-                pmin, pmax);
-
-        // Check that the range of Pstates are legal and will actually fit in
-        // the table. 'Fitting' will never be a problem for PgP as long as the
-        // table of operating points does not include operating points for
-        // frequencies below Fmax@Vmin.
-
-        if ((pmin < PSTATE_MIN) ||
-            (pmax > PSTATE_MAX) ||
-            ((pmax - pmin + 1) > GLOBAL_PSTATE_TABLE_ENTRIES)) {
-            rc = TRACE_ERRORX(-GPST_INVALID_ARGUMENT, 
-                "pmin %x, PSTATE_MIN %x; pmax %x, PSTATE_MAX %x; pmax - pmin + 1 %x, GLOBAL_PSTATE_TABLE_ENTRIES %x" TRACE_NEWLINE,
-                pmin,
-                PSTATE_MIN,
-                pmax,
-                PSTATE_MAX,
-                pmax - pmin + 1,
-                GLOBAL_PSTATE_TABLE_ENTRIES
-            );            
-            break;
-        }
-
-        // Check the ordering constraints
-
-       for (i = 1; i < points; i++) {
-
-            if ((ops[i].pstate < ops[i - 1].pstate)  ||
-                (ops[i].vdd_uv < ops[i - 1].vdd_uv)  |    // allow them to be equal
-                (ops[i].vcs_uv < ops[i - 1].vcs_uv)) {    // allow them to be equal
-                rc = TRACE_ERRORX(-GPST_INVALID_ARGUMENT, 
-                    "i = %u pstate %x, ops[i - 1].pstate %x; ops[i].vdd_uv  %x, ops[i - 1].vdd_uv %x; ops[i].vcs_uv %x, ops[i - 1].vcs_uv %x" TRACE_NEWLINE,
-                    i,
-                    ops[i].pstate,
-                    ops[i - 1].pstate,
-                    ops[i].vdd_uv ,
-                    ops[i - 1].vdd_uv,
-                    ops[i].vcs_uv,
-                    ops[i - 1].vcs_uv
-                );
-
-                break;
-            }
-        }
-        if (rc) break;
-
-        // Update the table from VPD/system parameters, then default the
-        // pstate0_frequency_code (fNom) to the 'nominal' code and set the
-        // DPLL bias to 0.
-
-        gpst->pstate0_frequency_khz =
-            revle32(characterization->parameters->pstate0_frequency_khz);
-        gpst->frequency_step_khz =
-            revle32(characterization->parameters->frequency_step_khz);
-
-        // Now we can interpolate the operating points to build the
-        // table. Interpolation is done by creating (or using) an
-        // OperatingPoint for each intermediate (or characterized) Pstate.
-        // The gpst_entry_create() function then creates the GPST entry from
-        // the operating point. Only the voltages are interpolated, and they
-        // are all interpolated in units of micro-Volts.
-
-        // The WOF algorithm augments the interpolation between the Turbo
-        // and the UltraTurbo points to calculate a differnt segment based
-        // on the number of cores that might be active.
-
-        gpst->pmin    = pmin;
-        gpst->entries = pmax - pmin + 1;
-
-        // Set the Pmin Pstate
-        entry = 0;
-        if (gpst_entry_create(&(gpst->pstate[entry]), &(ops[0]))) {
-            rc = TRACE_ERRORX(-GPST_INVALID_ENTRY,
-                "gpst_entry_create error setting Pmin");
-            break;
-        }
-        entry++;
-        pstate = pmin;
-        printf("**** Check : pstate %x" TRACE_NEWLINE, pstate);
-
-#define __INTERPOLATE(field)                                            \
-                do {                                                    \
-                    interp.field =                                      \
-                        interpolate(ops[i - 1].field, ops[i].field,     \
-                                    (pstate - ops[i - 1].pstate),    \
-                                    (ops[i].pstate - ops[i - 1].pstate)); \
-                } while (0)
-
-
-        // Iterate over characterized operating points...
-        for (i = 1; i < points; i++) {
-
-            // For WOF, handle the Turbo<>UltraTurbo segment differently
-            if (i == ULTRA) {
-
-                // Save the Turbo Pstate in the GPST structure for future reference
-                gpst->turbo_ps = ops[i-1].pstate;
-                
-                printf( " Turbo -> %d", gpst->turbo_ps);
-
-                for (c = 0; c < max_cores; ++c) {
-                    pstate = gpst->turbo_ps;    // Start again
-                    entry = entry_turbo;
-                    pstates_ut = 0;             // Turbo is the first pstate
-                                        
-                    // --------------------------------------------------
-                    // Fill in the Turbo information in the WOF structure
-                    interp.pstate = pstate;
-                    
-                    // Compute the VID overlay values for this core count
-                    __INTERPOLATE(vdd_corrected_wof_uv[c]);
-                    __INTERPOLATE(vcs_corrected_wof_uv[c]);
-
-                    printf( ">> Turbo UT WOF entry %u pstate %x %-2d index %d "
-                        "ops[%d].vdd_corrected_wof_uv[%d] = %06d "
-                        "ops[%d].vdd_corrected_wof_uv[%d] = %06d "
-                        "interp.vdd_corrected_wof_uv[%d] = %06d ",
-                        entry,
-                        pstate, pstate,
-                        pstates_ut,
-                        i-1, c, ops[i-1].vdd_corrected_wof_uv[c],
-                        i, c, ops[i].vdd_corrected_wof_uv[c],
-                        c, interp.vdd_corrected_wof_uv[c]
-                        );
-                    
-                    // >>> Note: iVRMs are not supported as active in the Turbo
-                    // to UltraTurbo segment
-                    if (wof->wof_enabled) 
-                    {
-                        printf(">>>> WOF Enabled <<<< " TRACE_NEWLINE);
-                        if (vid_mod_entry_create(wof, pstates_ut, c, &interp)) {
-                            rc = TRACE_ERRORX(-GPST_INVALID_ENTRY,
-                                              "gpst_entry_create error - vid mod interpolation");
-                            break;
-                        }
-                    }
-
-                    pstates_ut++;
-                    entry++;
-
-                    // --------------------------------------------------
-                    // Interpolate intermediate Pstates...
-                    while (++pstate != ops[i].pstate) {
-                        printf("pstate = %d", pstate);
-
-                        interp.pstate = pstate;
-                        
-                        if (wof->wof_enabled) 
-                        {                       
-                            // Compute the VID overlay values for this core count
-                            __INTERPOLATE(vdd_corrected_wof_uv[c]);
-                            __INTERPOLATE(vcs_corrected_wof_uv[c]);
-
-                            printf( "UT WOF entry %u pstate %x %-2d index %d "
-                                "ops[%d].vdd_corrected_wof_uv[%d] = %06d "
-                                "ops[%d].vdd_corrected_wof_uv[%d] = %06d "
-                                "interp.vdd_corrected_wof_uv[%d]  = %06d ",
-                                entry,
-                                pstate, pstate,
-                                pstates_ut,
-                                i-1, c, ops[i-1].vdd_corrected_wof_uv[c],
-                                i, c, ops[i].vdd_corrected_wof_uv[c],
-                                c, interp.vdd_corrected_wof_uv[c]
-                                );
-
-                            // >>> Note: iVRMs are not supported as active in the Turbo
-                            // to UltraTurbo segment
-
-                            if (vid_mod_entry_create(wof, pstates_ut, c, &interp)) {
-                                rc = TRACE_ERRORX(-GPST_INVALID_ENTRY,
-                                                  "gpst_entry_create error - vid mod interpolation");
-                                break;
-                            }
-                            
-                            // Increment VID modification table index
-                            pstates_ut++;
-                        }
-
-                        // Compute the VIDs for this Pstate
-                        __INTERPOLATE(vdd_corrected_uv);
-                        __INTERPOLATE(vcs_corrected_uv);
-                        __INTERPOLATE(vdd_ivrm_effective_uv);
-                        __INTERPOLATE(vcs_ivrm_effective_uv);
-                        __INTERPOLATE(vdd_maxreg_uv);
-                        __INTERPOLATE(vcs_maxreg_uv);
-
-                        // Write the Global Ptate Table if processing the
-                        // maximum core count
-                        if (c == max_cores-1)
-                        {
-                            printf(">>>> Writing GPST entry %d <<<<" TRACE_NEWLINE, entry);
-                            if (gpst_entry_create(&(gpst->pstate[entry]), &interp))
-                            {
-                                rc = TRACE_ERRORX(-GPST_INVALID_ENTRY,
-                                                  "gpst_entry_create error - UT interpolation");
-                                break;
-                            }
-
-                           gpst_entry_temp.value =  revle64(gpst->pstate[entry].value);
-                           printf("UT entry %u pstate %x %-2d"
-                                "evid_vdd = 0x%02llX (VRM-11) "
-                                "evid_vcs = 0x%02llX (VRM-11) "
-                                "evid_vdd_eff = 0x%02llX (iVID) "
-                                "evid_vcs_eff = 0x%02llX (iVID) "
-                                "maxreg_vdd = 0x%02llX (iVID) "
-                                "maxreg_vcs = 0x%02llX (iVID) ",
-                                entry,
-                                pstate, pstate,
-                                gpst_entry_temp.fields.evid_vdd,
-                                gpst_entry_temp.fields.evid_vcs,
-                                gpst_entry_temp.fields.evid_vdd_eff,
-                                gpst_entry_temp.fields.evid_vcs_eff,
-                                gpst_entry_temp.fields.maxreg_vdd,
-                                gpst_entry_temp.fields.maxreg_vcs);                               
-
-                        }
-                        entry++;                        
-                    }
-                    if (rc) break;
-                  
-                    // Set the characterized Pstate
-                    if (gpst_entry_create(&(gpst->pstate[entry]), &(ops[i]))) {
-                        rc = TRACE_ERRORX(-GPST_INVALID_ENTRY,
-                                          "gpst_entry_create error - normal UT interpolation");
-                        break;
-                    }
-
-                    gpst_entry_temp.value =  revle64(gpst->pstate[entry].value);
-                    printf("UT entry %u pstate %x %-2d "
-                            "evid_vdd = 0x%02llX (VRM-11) "
-                            "evid_vcs = 0x%02llX (VRM-11) "
-                            "evid_vdd_eff = 0x%02llX (iVID) "
-                            "evid_vcs_eff = 0x%02llX (iVID) "
-                            "maxreg_vdd = 0x%02llX (iVID) "
-                            "maxreg_vcs = 0x%02llX (iVID) ",
-                            entry,
-                            pstate, pstate,
-                            gpst_entry_temp.fields.evid_vdd,
-                            gpst_entry_temp.fields.evid_vcs,
-                            gpst_entry_temp.fields.evid_vdd_eff,
-                            gpst_entry_temp.fields.evid_vcs_eff,
-                            gpst_entry_temp.fields.maxreg_vdd,
-                            gpst_entry_temp.fields.maxreg_vcs);
-                    
-                    if (wof->wof_enabled) 
-                    {
-                        // Fill in the UltraTurbo information in the WOF structure
-                        interp.pstate = pstate;
-
-                        // Compute the VID overlay values for this core count
-                        __INTERPOLATE(vdd_corrected_wof_uv[c]);
-                        __INTERPOLATE(vcs_corrected_wof_uv[c]);
-
-                        printf( ">> UltraTurbo UT WOF entry %u pstate %x %-2d index %d "
-                            "ops[%d].vdd_corrected_wof_uv[%d] = %06d "
-                            "ops[%d].vdd_corrected_wof_uv[%d] = %06d "
-                            "interp.vdd_corrected_wof_uv[%d]  = %06d " TRACE_NEWLINE,
-                            entry,
-                            pstate, pstate,
-                            pstates_ut,
-                            i-1, c, ops[i-1].vdd_corrected_wof_uv[c],
-                            i, c, ops[i].vdd_corrected_wof_uv[c],
-                            c, interp.vdd_corrected_wof_uv[c]
-                            );
-
-                        // >>> Note: iVRMs are not supported as active in the Turbo
-                        // to UltraTurbo segment
-                    
-                        if (vid_mod_entry_create(wof, pstates_ut, c, &interp)) {
-                            rc = TRACE_ERRORX(-GPST_INVALID_ENTRY,
-                                              "gpst_entry_create error - vid mod interpolation");
-                            break;
-                        }
-                                                                        
-                        // Save the UltraTurbo segment Pstate count
-                        wof->ut_vid_mod.ut_segment_pstates = pstates_ut;
-
-                        // Save the maximum core count
-                        wof->ut_vid_mod.ut_max_cores = max_cores;
-
-                        printf( "UT WOF entry %u pstate %x index %d "
-                                "wof->ut_vid_mod.ut_segment_vcs_vid[%d][%d] = 0x%02X  "
-                                "ops[%d].vdd_corrected_uv  %d UltraTurbo",
-                                entry,
-                                pstate,
-                                pstates_ut,
-                                pstates_ut, c, wof->ut_vid_mod.ut_segment_vdd_vid[pstates_ut][c],
-                                i, ops[i].vdd_corrected_uv
-                                ); 
-                    }        
-                    entry++;                  
-                }
-
-            }
-            else
-            {
-
-                // Save the PowerSave and Nominal Pstate in the GPST structure for future reference
-                // Get update for each point;
-
-                if (i == NOMINAL)
-                {
-                    gpst->nominal_ps = ops[i].pstate;
-                    printf( " Nominal Pstate -> %d", gpst->nominal_ps);
-
-                    gpst->powersave_ps = ops[i-1].pstate;
-                    printf( " PowerSave Pstate -> %d", gpst->powersave_ps);
-                }
-
-                // Interpolate intermediate Pstates...
-                while (++pstate != ops[i].pstate) {
-
-                    interp.pstate = pstate;
-
-                    __INTERPOLATE(vdd_corrected_uv);
-                    __INTERPOLATE(vcs_corrected_uv);
-                    __INTERPOLATE(vdd_ivrm_effective_uv);
-                    __INTERPOLATE(vcs_ivrm_effective_uv);
-                    __INTERPOLATE(vdd_maxreg_uv);
-                    __INTERPOLATE(vcs_maxreg_uv);
-
-                    if (gpst_entry_create(&(gpst->pstate[entry]), &interp)) {
-                        rc = TRACE_ERRORX(-GPST_INVALID_ENTRY, 
-                            "gpst_entry_create error - normal interpolation");
-                        break;
-                    }
-
-                    gpst_entry_temp.value =  revle64(gpst->pstate[entry].value);
-                    printf( "Non UT entry %u pstate %x %-2d "
-                            "evid_vdd = 0x%02llX (VRM-11) "
-                            "evid_vcs = 0x%02llX (VRM-11) "
-                            "evid_vdd_eff = 0x%02llX (iVID) "
-                            "evid_vcs_eff = 0x%02llX (iVID) "
-                            "maxreg_vdd = 0x%02llX (iVID) "
-                            "maxreg_vcs = 0x%02llX (iVID) ",
-                            entry,
-                            pstate, pstate,
-                            gpst_entry_temp.fields.evid_vdd,
-                            gpst_entry_temp.fields.evid_vcs,
-                            gpst_entry_temp.fields.evid_vdd_eff,
-                            gpst_entry_temp.fields.evid_vcs_eff,
-                            gpst_entry_temp.fields.maxreg_vdd,
-                            gpst_entry_temp.fields.maxreg_vcs);
-
-                    entry++;
-                }
-                if (rc) break;
-
-                // Set the characterized Pstate
-                if (gpst_entry_create(&(gpst->pstate[entry]), &(ops[i]))) {
-                    rc = -GPST_INVALID_ENTRY;
-                    break;
-                }
-
-                gpst_entry_temp.value =  revle64(gpst->pstate[entry].value);
-                printf( ">> VPD Point Non UT entry %u pstate %x %-2d "
-                         "evid_vdd = 0x%02llX (VRM-11) "
-                         "evid_vcs = 0x%02llX (VRM-11) "
-                         "evid_vdd_eff = 0x%02llX (iVID) "
-                         "evid_vcs_eff = 0x%02llX (iVID) "
-                         "maxreg_vdd = 0x%02llX (iVID) "
-                         "maxreg_vcs = 0x%02llX (iVID) ",
-                         entry,
-                         pstate, pstate,
-                         gpst_entry_temp.fields.evid_vdd,
-                         gpst_entry_temp.fields.evid_vcs,
-                         gpst_entry_temp.fields.evid_vdd_eff,
-                         gpst_entry_temp.fields.evid_vcs_eff,
-                         gpst_entry_temp.fields.maxreg_vdd,
-                            gpst_entry_temp.fields.maxreg_vcs);
-
-                // The iVRM maximum pstate is set for each characterization point
-                // as the points are traversed.  The last one processed by this
-                // clause is Turbo.  As iVRMs are not engaged at the Turbo point
-                // itself, subtract 1.
-                gpst->ivrm_max_ps  = ops[i].pstate - 1;
-                printf( " ivrm Pstate -> %d Op Point Pstate%d" TRACE_NEWLINE, gpst->ivrm_max_ps, ops[i].pstate);
-
-                // Set the number of entries from Psave to the iVRM maximum
-                // (Turbo Pstate - 1)
-                gpst->ivrm_entries = entry - 1;
-
-                // Save the entry for the post Turbo clause.  Written for each iteration.
-                // Only the last one written matters
-                entry_turbo = entry;
-                
-                printf( " entry_turbo -> %d" TRACE_NEWLINE, entry_turbo);
-                
-                entry++;
-            }
-        }
-        if (rc) break;
-
-        // Fill in the defaults
-
-        gpst->pvsafe = gpst->pmin+1;
-
-        fNom = revle32(gpst->pstate0_frequency_khz) /
-            revle32(gpst->frequency_step_khz);
-
-        for (i = 0; i < PGP_NCORES; i++) {
-            gpst->pstate0_frequency_code[i] = revle16(fNom);
-            gpst->dpll_fmax_bias[i] = 0;
-        }
-
-        // Hardcode the vrm delay settings for GA1
-        // This should be set by gpst_stepping_setup() in the future.
-        gpst->pstate_stepsize = pstate_stepsize;
-        // SW256954: Updated following two values
-        gpst->vrm_stepdelay_range = 0x8;
-        gpst->vrm_stepdelay_value = 0x9;
-
-    } while (0);
-
-    return rc;
-}
-
-
-/// Create a local Pstate table
-///
-/// \param gpst A pointer to a GlobalPstateTable structure for lookup.
-///
-/// \param lpsa A pointer to a LocalPstateArray structure to populate
-///
-/// \param dead_zone_5mv dead zone value
-///
-/// \param evrm_delay_ns External VRM delay in nano-seconds
-///
-/// This routine creates a LocalPstateArray by using the dead zone value and
-/// data in the GlobalPstateTable.
-///
-/// \retval 0 Success
-///
-/// \retval -LPST_INVALID_OBJECT Either the \a gpst or \a lpsa were NULL (0) or
-/// obviously invalid or incorrectly initialized.
-///
-/// \retval -LPST_INVALID_ARGUMENT indicates that the difference between
-///  pmax & pmin in gpst is less than deadzone voltage (ie. no data to build lpsa)
-
-int
-lpst_create(const GlobalPstateTable *gpst,
-            LocalPstateArray *lpsa,
-            const uint8_t dead_zone_5mv,
-            double volt_int_vdd_bias,
-            double volt_int_vcs_bias,
-            uint8_t *vid_incr_gt7_nonreg)
-{
-  int           rc = 0;
-  int8_t        i;
-  uint8_t       j;
-  gpst_entry_t  entry;
-  uint32_t      turbo_uv;
-  uint32_t      gpst_uv;
-  uint32_t      v_uv;
-  uint32_t      vdd_uv;
-  uint8_t       v_ivid;
-  uint8_t       gpst_ivid;
-  uint8_t       lpst_max_found = 0;
-  uint32_t      lpst_max_uv;
-  uint8_t       lpst_entries;
-  uint8_t       lpst_entries_div4;
-  uint8_t       gpst_index;
-  Pstate        lpst_pmin;
-  Pstate        lpst_pstate;
-  Pstate        lpst_max_pstate = 0;
-  uint8_t       vid_incr[3] = {0,0,0};
-  uint8_t       steps_above_curr;
-  uint8_t       steps_below_curr;
-  uint8_t       inc_step;
-  uint8_t       dec_step;
-
-  do {
-
-    // Basic pointer checks
-    if ((gpst == 0) || (lpsa == 0)) {
-      rc = -LPST_INVALID_OBJECT;
-      break;
-    }
-
-
-    // ------------------------------------------------------------------
-    // find lspt_max in gpst
-    //  - lpst_max is gpst entry that is equal to (turbo_vdd - deadzone)
-    // ------------------------------------------------------------------
-
-    entry.value = revle64(gpst->pstate[(gpst->ivrm_entries)].value);
-    rc          = ivid2vuv(entry.fields.evid_vdd_eff, &turbo_uv);  if (rc) break;
-
-    printf("gpst->ivrm_entries = %u, turbo_uv = %u", gpst->ivrm_entries, turbo_uv);
-
-    turbo_uv    = (uint32_t) (turbo_uv * volt_int_vdd_bias);
-    lpst_max_uv = turbo_uv - (dead_zone_5mv * 5000);
-
-    for (i = gpst->ivrm_entries ; i >= 0; i--) {
-      entry.value = revle64(gpst->pstate[i].value);
-      rc         = ivid2vuv(entry.fields.evid_vdd_eff, &v_uv);  if (rc) break;
-      v_uv        = (uint32_t) (v_uv * volt_int_vdd_bias);
-
-      if (lpst_max_uv >= v_uv) {
-        lpst_max_found = 1;
-        lpst_max_pstate = gpst_pmax(gpst) - (gpst->entries - i - 1);
-        printf("lpst_max_pstate = %x" TRACE_NEWLINE, lpst_max_pstate);
-        break;
-      }
-    }
-
-    if (rc) break;
-
-    // generate a warning if lpst max not found
-    //  - indicates that the difference between pmax & pmin in gpst is less than deadzone voltage
-    //  - no data will be in lpst (lpst entries = 0)
-    if (lpst_max_found == 0) {
-      rc = -LPST_GPST_WARNING;
-      break;
-    }
-
-    lpst_entries = gpst->ivrm_entries;
-    lpst_pmin    = gpst->pmin;
-
-    printf("lpst_entries = %u" TRACE_NEWLINE, lpst_entries);
-    // ----------------------------------------------------------------------------
-    // now loop over gpst from 0 to lpst_entries and fill in lpst from data in gpst
-    // ----------------------------------------------------------------------------
-    gpst_index = 0;
-
-    lpst_entries_div4 = lpst_entries/4;
-    if ( lpst_entries % 4 != 0)
-       lpst_entries_div4++;
-
-    // current lpst pstate value as table is created
-    lpst_pstate = gpst_pmin(gpst);
-
-    printf("lpst create before loop: lpst_entries_div4 = %d" TRACE_NEWLINE, lpst_entries_div4);
-    for (i = 0 ; i < lpst_entries_div4; i++) {
-      entry.value = revle64(gpst->pstate[gpst_index].value);
-
-      // compute ivid_vdd
-      rc = ivid2vuv(entry.fields.evid_vdd_eff, &vdd_uv);   if (rc) break;
-      vdd_uv    = (uint32_t) (vdd_uv * volt_int_vdd_bias);
-      rc = vuv2ivid(vdd_uv, ROUND_VOLTAGE_DOWN, &v_ivid);  if (rc) break;
-      lpsa->pstate[i].fields.ivid_vdd = v_ivid;
-
-      // compute ivid_vcs
-      rc = ivid2vuv(entry.fields.evid_vcs_eff, &v_uv);  if (rc) break;
-      v_uv    = (uint32_t) (v_uv * volt_int_vcs_bias);
-      rc = vuv2ivid(v_uv, ROUND_VOLTAGE_DOWN, &v_ivid); if (rc) break;
-      lpsa->pstate[i].fields.ivid_vcs = v_ivid;
-
-      // --------------------------------------------------------------
-      // compute increment for remaining 3 pstates for this lpst entry
-      // --------------------------------------------------------------
-      vid_incr[0] = 0;
-      vid_incr[1] = 0;
-      vid_incr[2] = 0;
-
-      for (j = 0; j <= 2; j++) {
-
-        gpst_index++;
-        if (gpst_index >= lpst_entries)
-          break;
-
-        entry.value = revle64(gpst->pstate[gpst_index].value);
-        rc          = ivid2vuv(entry.fields.evid_vdd_eff, &vdd_uv);   if (rc) break;
-        vdd_uv    = (uint32_t) (vdd_uv * volt_int_vdd_bias);
-        rc          = vuv2ivid(vdd_uv, ROUND_VOLTAGE_DOWN, &v_ivid);  if (rc) break;
-        vid_incr[j] = v_ivid - lpsa->pstate[i].fields.ivid_vdd;
-
-        // point to next lpst pstate
-        lpst_pstate++;
-
-        // the max for this field is 7, so clip to 7 if it's > 7
-        if (vid_incr[j] > 7) {
-          vid_incr[j] = 7;
-
-          // if in regulation, return an error
-          if (lpst_pstate <= lpst_max_pstate) {
-            rc = TRACE_ERRORX(-LPST_INCR_CLIP_ERROR, 
-                "lpst clip: lpst_pstate %x lpst_max_pstate %x",
-                lpst_pstate,
-                lpst_max_pstate
-                );                      
-            break;
-          }
-
-          // if not in regulation, return a warning
-          if (lpst_pstate > lpst_max_pstate) {
-            *vid_incr_gt7_nonreg = 1;
-          }
-        }
-
-      }
-      if (rc) break;
-      printf("lpst create after loop" TRACE_NEWLINE);
-
-      lpsa->pstate[i].fields.ps1_vid_incr = vid_incr[0];
-      lpsa->pstate[i].fields.ps2_vid_incr = vid_incr[1];
-      lpsa->pstate[i].fields.ps3_vid_incr = vid_incr[2];
-
-      // --------------------
-      // compute power ratios
-      // --------------------
-      float  sigma = 3;
-      float  iac_wc;
-      float  iac;
-      float  vout;
-      float  pwrratio_f;
-      uint8_t pwrratio;
-
-      // convert to mV and subract 100 mV (note: vdd_uv is the max of the vdd values for this lpst entry)
-      vout = (float)((vdd_uv/1000) - 100);
-
-      // equations from Josh
-      iac_wc     = 1.25 * ( 28.5 * 1.25 - 16 ) * ( 1 - 0.05 * 2) * 40/71;        // testsite equation & ratio of testsite to anticipated produ
-      iac        = 1.25 * (-15.78 -0.618 * sigma + 27.6 * vout/1000) * 40/64;    // product equation & ratio of testsite to actual product
-      pwrratio_f = iac / iac_wc;
-
-      if (pwrratio_f >= 1.0)
-        pwrratio   = 63;
-      else
-        pwrratio   = (uint8_t)((pwrratio_f*64) + 0.5);
-
-      lpsa->pstate[i].fields.vdd_core_pwrratio = pwrratio;
-      lpsa->pstate[i].fields.vcs_core_pwrratio = pwrratio;
-      lpsa->pstate[i].fields.vdd_eco_pwrratio  = pwrratio;
-      lpsa->pstate[i].fields.vcs_eco_pwrratio  = pwrratio;
-
-      // ------------------------------------
-      // compute increment step and decrement
-      // ------------------------------------
-      //  - look above current pstate to pstate that is >= 25 mV for inc_step
-      //  - look below current pstate to pstate that is >= 25 mV for dec_step
-
-      // find # steps above and below current lpst pstate
-      steps_above_curr = gpst_pmax(gpst) - lpst_pstate;
-      steps_below_curr = lpst_pstate     -  gpst_pmin(gpst);
-
-
-      // start looking above in gpst to find inc_step
-      inc_step = 0; // default
-
-      for (j = 1; j <= steps_above_curr; j++) {
-        inc_step = j - 1;
-        entry.value = revle64(gpst->pstate[lpst_pstate - gpst_pmin(gpst) + j].value);
-        rc         = ivid2vuv(entry.fields.evid_vdd_eff, &gpst_uv);      if (rc) break;
-        gpst_uv     = (uint32_t) (gpst_uv * volt_int_vdd_bias);
-        rc         = vuv2ivid(gpst_uv, ROUND_VOLTAGE_DOWN, &gpst_ivid);  if (rc) break;
-
-        if ( (gpst_ivid - v_ivid) >= 4)
-          break;
-      }
-      if (rc) break;
-
-      // clip inc_step
-      if (inc_step > 7)
-        inc_step = 7;
-
-      lpsa->pstate[i].fields.inc_step = inc_step;
-
-      // start looking below in gpst to find dec_step
-      dec_step = 0; // default
-
-      for (j = 1; j <= steps_below_curr; j++) {
-        dec_step = j - 1;
-        entry.value = revle64(gpst->pstate[lpst_pstate - gpst_pmin(gpst) - j].value);
-        rc         = ivid2vuv(entry.fields.evid_vdd_eff, &gpst_uv);         if (rc) break;
-        gpst_uv     = (uint32_t) (gpst_uv * volt_int_vdd_bias);
-        rc         = vuv2ivid(gpst_uv, ROUND_VOLTAGE_DOWN, &gpst_ivid);  if (rc) break;
-
-        if ( (v_ivid - gpst_ivid ) >= 4)
-          break;
-      }
-      if (rc) break;
-
-      // clip dec_step
-      if (dec_step > 7)
-        dec_step = 7;
-
-      lpsa->pstate[i].fields.dec_step = dec_step;
-
-      // Byte reverse the entry into the image.
-      lpsa->pstate[i].value = revle64(lpsa->pstate[i].value);
-
-      gpst_index++;
-      if (gpst_index > lpst_entries)
-        break;
-
-       // point to next lpst pstate
-       lpst_pstate++;
-    }
-
-    // set these fields in lpst structure
-    if (lpst_max_found == 0) {
-      lpsa->pmin    = 0;
-      lpsa->entries = 0;
-    }
-    else {
-      lpsa->pmin    = lpst_pmin;
-      lpsa->entries = lpst_entries;
-    }
-
-  } while (0);
-
-  return rc;
-
-} // end lpst_create
-
-// This routine will fully fill out the VDS region table even if
-// some of the upper entries are not used.
-void
-build_vds_region_table( ivrm_parm_data_t*       i_ivrm_parms,
-                        PstateSuperStructure*   pss)
-{
-    uint8_t     i;
-    uint32_t    vds;
-    uint64_t    beg_offset = 0;
-    uint64_t    end_offset = 0;
-
-    vds = (i_ivrm_parms->vds_min_range_upper_bound*1000)/IVID_STEP_UV;
-    end_offset = (uint64_t)vds;
-
-    for (i = 0; i < i_ivrm_parms->vds_region_entries; i++)
-    {
-        pss->lpsa.vdsvin[i].fields.ivid0 = beg_offset;
-        pss->lpsa.vdsvin[i].fields.ivid1 = end_offset;
-
-        // Calculate offsets for next entry
-        beg_offset = end_offset + 1;
-
-        // clip at 127
-        if (beg_offset >= 127)
-          beg_offset = 127;
-
-        vds =(uint32_t)( (float)end_offset * (1 + ( (float)i_ivrm_parms->vds_step_percent/100)));
-        end_offset = (uint64_t)vds;
-
-        // clip at 127
-        if (end_offset >= 127)
-          end_offset = 127;
-    }
-}
-
-// This routine will fully fill out the VDS region table even if
-// some of the upper entries are not used.
-void
-fill_vin_table( ivrm_parm_data_t*       i_ivrm_parms,
-                PstateSuperStructure*   pss)
-{
-    uint8_t     s;
-    uint8_t     i;
-    uint32_t    idx;
-
-    i = i_ivrm_parms->vin_table_setsperrow;
-    for (i = 0; i < i_ivrm_parms->vds_region_entries; i++)
-    {
-        for (s = 0; s < i_ivrm_parms->vin_table_setsperrow; s++) {
-            idx = (i*4) + s;
-            pss->lpsa.vdsvin[idx].fields.pfet0 = i_ivrm_parms->forced_pfetstr_value;
-            pss->lpsa.vdsvin[idx].fields.pfet1 = i_ivrm_parms->forced_pfetstr_value;
-            pss->lpsa.vdsvin[idx].fields.pfet2 = i_ivrm_parms->forced_pfetstr_value;
-            pss->lpsa.vdsvin[idx].fields.pfet3 = i_ivrm_parms->forced_pfetstr_value;
-            pss->lpsa.vdsvin[idx].fields.pfet4 = i_ivrm_parms->forced_pfetstr_value;
-            pss->lpsa.vdsvin[idx].fields.pfet5 = i_ivrm_parms->forced_pfetstr_value;
-            pss->lpsa.vdsvin[idx].fields.pfet6 = i_ivrm_parms->forced_pfetstr_value;
-            pss->lpsa.vdsvin[idx].fields.pfet7 = i_ivrm_parms->forced_pfetstr_value;
-
-            // Byte reverse the entry into the image.
-            pss->lpsa.vdsvin[idx].value = revle64(pss->lpsa.vdsvin[idx].value);
-         }
-    }
-}
-
-#undef  abs
-#define abs(x) (((x)<0.0)?(-(x)):(x))
-
-void simeq(int n, double A[], double Y[], double X[])
-{
-
-/*      PURPOSE : SOLVE THE LINEAR SYSTEM OF EQUATIONS WITH REAL     */
-/*                COEFFICIENTS   [A] * |X| = |Y|                     */
-/*                                                                   */
-/*      INPUT  : THE NUMBER OF EQUATIONS  n                          */
-/*               THE REAL MATRIX  A   should be A[i][j] but A[i*n+j] */
-/*               THE REAL VECTOR  Y                                  */
-/*      OUTPUT : THE REAL VECTOR  X                                  */
-/*                                                                   */
-/*      METHOD : GAUSS-JORDAN ELIMINATION USING MAXIMUM ELEMENT      */
-/*               FOR PIVOT.                                          */
-/*                                                                   */
-/*      USAGE  :     simeq(n,A,Y,X);                                 */
-/*                                                                   */
-/*                                                                   */
-/*    WRITTEN BY : JON SQUIRE , 28 MAY 1983                          */
-/*    ORIGINAL DEC 1959 for IBM 650, TRANSLATED TO OTHER LANGUAGES   */
-/*    e.g. FORTRAN converted to Ada converted to C                   */
-
-    double *B;           /* [n][n+1]  WORKING MATRIX */
-    int *ROW;            /* ROW INTERCHANGE INDICES */
-    uint32_t HOLD , I_PIVOT;  /* PIVOT INDICES */
-    double PIVOT;        /* PIVOT ELEMENT VALUE */
-    double ABS_PIVOT;
-    uint8_t i,j,k,m;
-
-    B = (double *)calloc((n+1)*(n+1), sizeof(double));
-    ROW = (int *)calloc(n, sizeof(int));
-    m = n+1;
-
-    /* BUILD WORKING DATA STRUCTURE */
-    for(i=0; i<n; i++){
-      for(j=0; j<n; j++){
-        B[i*m+j] = A[i*n+j];
-      }
-      B[i*m+n] = Y[i];
-    }
-    /* SET UP ROW  INTERCHANGE VECTORS */
-    for(k=0; k<n; k++){
-      ROW[k] = k;
-    }
-
-    /* BEGIN MAIN REDUCTION LOOP */
-    for(k=0; k<n; k++){
-
-      /* FIND LARGEST ELEMENT FOR PIVOT */
-      PIVOT = B[ROW[k]*m+k];
-      ABS_PIVOT = abs(PIVOT);
-      I_PIVOT = k;
-      for(i=k; i<n; i++){
-        if( abs(B[ROW[i]*m+k]) > ABS_PIVOT){
-          I_PIVOT = i;
-          PIVOT = B[ROW[i]*m+k];
-          ABS_PIVOT = abs ( PIVOT );
-        }
-      }
-
-      /* HAVE PIVOT, INTERCHANGE ROW POINTERS */
-      HOLD = ROW[k];
-      ROW[k] = ROW[I_PIVOT];
-      ROW[I_PIVOT] = HOLD;
-
-      /* CHECK FOR NEAR SINGULAR */
-      if( ABS_PIVOT < 1.0E-10 ){
-        for(j=k+1; j<n+1; j++){
-          B[ROW[k]*m+j] = 0.0;
-        }
-      } /* singular, delete row */
-      else{
-
-        /* REDUCE ABOUT PIVOT */
-        for(j=k+1; j<n+1; j++){
-          B[ROW[k]*m+j] = B[ROW[k]*m+j] / B[ROW[k]*m+k];
-        }
-
-        /* INNER REDUCTION LOOP */
-        for(i=0; i<n; i++){
-          if( i != k){
-            for(j=k+1; j<n+1; j++){
-              B[ROW[i]*m+j] = B[ROW[i]*m+j] - B[ROW[i]*m+k] * B[ROW[k]*m+j];
-            }
-          }
-        }
-      }
-      /* FINISHED INNER REDUCTION */
-    }
-
-    /* END OF MAIN REDUCTION LOOP */
-    /* BUILD  X  FOR RETURN, UNSCRAMBLING ROWS */
-    for(i=0; i<n; i++){
-      X[i] = B[ROW[i]*m+n];
-    }
-    free(B);
-    free(ROW);
-} /* end simeq */
-
-
-void fit_file(int n, uint8_t version, double C[], ivrm_cal_data_t* cal_data)
-{
-  uint8_t i, j, k;
-  int points;
-  double y;
-  double Vd, Vs;
-  double x[30];        /* at least 2n */
-  double A[2500];
-  double Y[50];
-
-  // -----------------------------------------------------------------------------------------
-  // initialize harcoded values to use for Vs & Vg for version1
-  //   version1 specifies Vd &Vs as uV and 16 bits is not enough to specify values about 65 mV
-  // -----------------------------------------------------------------------------------------
-  double Vs_v1[13];
-  double Vd_v1[13];
-   Vd_v1[0]  = 700;    Vs_v1[0]  = 888;
-   Vd_v1[1]  = 831;    Vs_v1[1]  = 1033;
-   Vd_v1[2]  = 787;    Vs_v1[2]  = 1033;
-   Vd_v1[3]  = 718;    Vs_v1[3]  = 1033;
-   Vd_v1[4]  = 962;    Vs_v1[4]  = 1179;
-   Vd_v1[5]  = 918;    Vs_v1[5]  = 1179;
-   Vd_v1[6]  = 850;    Vs_v1[6]  = 1179;
-   Vd_v1[7]  = 750;    Vs_v1[7]  = 1179;
-   Vd_v1[8]  = 1093;   Vs_v1[8]  = 1325;
-   Vd_v1[9]  = 1050;   Vs_v1[9]  = 1325;
-   Vd_v1[10] = 981;    Vs_v1[10] = 1325;
-   Vd_v1[11] = 881;    Vs_v1[11] = 1325;
-   Vd_v1[12] = 731;    Vs_v1[12] = 1325;
-
-  points = cal_data->point_valid;
-
-  for(i=0; i<n; i++)
-  {
-    for(j=0; j<n; j++)
-    {
-      A[i*n+j] = 0.0;
-    }
-    Y[i] = 0.0;
-  }
-
-  x[0]=1.0;
-
-  for (k = 0; k <= points-1; k++) {
-
-    if (version == 0) {
-      Vd = Vd_v1[k];
-      Vs = Vs_v1[k];
-      y  = ((double)cal_data->point[k].drain_current)/1000;      // uA
-    }
-    else if (version == 1 || version == 2 || version == 3) {
-      Vd = (double)cal_data->point[k].drain_voltage;             // mV
-      Vs = (double)cal_data->point[k].source_voltage;            // mV
-      y  = ((double)cal_data->point[k].drain_current)/1000;      // uA
-    }
-    else {                                                       //simulation data
-      Vd = (double)cal_data->point[k].drain_voltage;             // mV
-      Vs = (double)cal_data->point[k].source_voltage;            // mV
-      y  = ((double)cal_data->point[k].drain_current)/1000;      // uA
-    }
-
-    x[1]=Vs/1.11;      // x[1] = target Vin = Vgs / 1.11
-    x[2]=Vs/1.11-Vd;   // x[2] = target Vds = Vin/1.11 - Vout = Vs/1.11 - Vd
-    x[3]=x[1]*x[2];    // x[3] = Vin*Vds
-
-    for(i=0; i<n; i++) {
-      for(j=0; j<n; j++) {
-        A[i*n+j] = A[i*n+j] + x[i]*x[j];
-      }
-      Y[i] = Y[i] + y*x[i];
-    }
-  }
-
-  simeq(n, A, Y, C);
-
-} /* end fit_file */
-
-void write_HWtab_bin(ivrm_parm_data_t* i_ivrm_parms,
-                      double C[],
-                      PstateSuperStructure* pss)
-{
-  uint8_t i, j;
-  double VIN_MIN;
-  double VDS_MIN;
-  double Vin[40]; /* at least 2n */
-  double Vds[40];
-  uint32_t    NUM_VIN;
-  uint32_t    NUM_VDS;
-  double LSB_CURRENT;
-  double TEMP_UPLIFT;
-  double Ical[40][40];
-  double Iratio[40][40];
-  double Iratio_clip;
-  uint8_t Iratio_int[40][40];
-  uint32_t temp;
-  uint8_t ratio_val;
-  uint8_t idx;
-
-  NUM_VIN     = i_ivrm_parms->vin_entries_per_vds;
-  NUM_VDS     = i_ivrm_parms->vds_region_entries;
-  VIN_MIN     = 600;
-  VDS_MIN     = 100;
-  LSB_CURRENT = 4.1;
-  TEMP_UPLIFT = 1.1;
-
-  for(i=0; i<NUM_VIN; i++) { Vin[i] = VIN_MIN + i * 25; }
-
-  Vds[0]=VDS_MIN;
-  for(i=1; i<NUM_VDS; i++) {
-     temp=(int) (Vds[i-1]*1.25/6.25);
-     Vds[i] = temp*6.25 ;
-  }
-
-  for(i=0; i<NUM_VIN; i++) {
-     for (j=0; j<NUM_VDS; j++) {
-        if(Vin[i]-Vds[j]>=700) {
-           Ical[i][j]   = C[0] + C[1]*Vin[i] + C[2]*Vds[j] + C[3]*Vin[i]*Vds[j]; // compute cal current
-           Iratio[i][j] = TEMP_UPLIFT * LSB_CURRENT / Ical[i][j];
-
-           // clip at 3.875 and use for both temp calculations
-           Iratio_clip = (Iratio[i][j]+1/16>3.875 ? 3.875 : Iratio[i][j]+1/16);
-// bug           temp = (int) (Iratio[i][j]+1/16>3.875 ? 3.875 : Iratio[i][j]+1/16);
-           temp = (int) Iratio_clip;
-           ratio_val = 0;
-           ratio_val = (temp << 3) & 0x018;          // jwy shift temp left 3 and clear out lower 3 bits - this gets bits 0:1 of value
-           temp = (int) ( (Iratio_clip - temp)*8 + 0.5);
-           temp = temp > 7 ? 7 : temp;  // bug fix - clip to 7 if overflow
-           ratio_val = (temp & 0x07)| ratio_val;     // jwy OR lower 3 bits of temp with upper 2 bits already in 0:1 - this merges bits 2:4 with 0:1 for final value
-           Iratio_int[i][j] = ratio_val;
-        } else {
-           Iratio[i][j]     = 0;
-           Iratio_int[i][j] = 0;
-        }
-     }
-  }
-
-  // fill in Vin table with Iratio data
-  for (i=0; i<NUM_VDS; i++) {          // 16 rows
-
-    for(j=0; j<4; j++) {               // 32 cols
-      idx = (i*4) + j;
-      pss->lpsa.vdsvin[idx].fields.pfet0 = Iratio_int[j*8][i];
-      pss->lpsa.vdsvin[idx].fields.pfet1 = Iratio_int[(j*8)+1][i];
-      pss->lpsa.vdsvin[idx].fields.pfet2 = Iratio_int[(j*8)+2][i];
-      pss->lpsa.vdsvin[idx].fields.pfet3 = Iratio_int[(j*8)+3][i];
-      pss->lpsa.vdsvin[idx].fields.pfet4 = Iratio_int[(j*8)+4][i];
-      pss->lpsa.vdsvin[idx].fields.pfet5 = Iratio_int[(j*8)+5][i];
-      pss->lpsa.vdsvin[idx].fields.pfet6 = Iratio_int[(j*8)+6][i];
-      pss->lpsa.vdsvin[idx].fields.pfet7 = Iratio_int[(j*8)+7][i];
-
-      // Byte reverse the entry into the image.
-      pss->lpsa.vdsvin[idx].value = revle64(pss->lpsa.vdsvin[idx].value);
-    }
-  }
-} /* end fit_file */
-
-
-#ifdef __cplusplus
-} // end extern C
-#endif
diff --git a/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.h b/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.h
deleted file mode 100755
index 928db5f10..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.h
+++ /dev/null
@@ -1,199 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/pstate_tables.h $            */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2015                        */
-/* [+] Google Inc.                                                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#ifndef __PSTATE_TABLES_H__
-#define __PSTATE_TABLES_H__
-
-// $Id: pstate_tables.h,v 1.12 2015/06/01 19:02:17 stillgs Exp $
-
-
-/// \file pstate_tables.h 
-/// \brief Code used to generate Pstate tables from real or imagined chip
-/// characterizations. 
-
-#include <pstates.h>
-
-// Constants associated with VRM stepping
-
-#define PSTATE_STEPSIZE_MAX         127
-#define VRM_STEPDELAY_RANGE_BITS    4
-#define LOG2_VRM_STEPDELAY_DIVIDER  3
-#define VRM_STEPDELAY_MAX           1600000
-#define MAX_ACTIVE_CORES            12
-
-
-#ifndef __ASSEMBLER__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/// An internal operating point
-///
-/// Internal operating points include characterization (both the original, 
-/// unbiased values and biased by external attributes) and load-line corrected
-/// voltages for the external VRM.  For the internal VRM, effective e-voltages
-/// and maxreg voltages are stored.  All voltages are stored as
-/// uV. Characterization currents are in mA. Frequencies are in KHz. The
-/// Pstate of the operating point (as a potentially out-of-bounds value) is
-/// also stored.
-
-typedef struct {
-
-    uint32_t vdd_uv;
-    uint32_t vcs_uv;    
-    uint32_t vdd_corrected_uv;
-    uint32_t vcs_corrected_uv;
-    uint32_t vdd_corrected_wof_uv[MAX_ACTIVE_CORES];
-    uint32_t vcs_corrected_wof_uv[MAX_ACTIVE_CORES];
-    uint32_t vdd_ivrm_effective_uv;
-    uint32_t vcs_ivrm_effective_uv;
-    uint32_t vdd_maxreg_uv;
-    uint32_t vcs_maxreg_uv;
-    uint32_t idd_ma;
-    uint32_t ics_ma;
-    uint32_t frequency_khz;
-    int32_t  pstate;
-
-} OperatingPoint;
-
-
-/// Constants required to compute and interpolate operating points
-///
-/// The nominal frequency and frequency step-size is given in Hz. Load-line
-/// and on-chip distribution resistances are given in micro-Ohms.
-///
-/// \todo Confirm that the "eVID V[dd,cs] Eff" correction is modeled as a simple
-/// resistance similar to the load line.
-
-typedef struct {
-
-    uint32_t pstate0_frequency_khz;
-    uint32_t frequency_step_khz;
-    uint32_t vdd_load_line_uohm;
-    uint32_t vcs_load_line_uohm;
-    uint32_t vdd_distribution_uohm;
-    uint32_t vcs_distribution_uohm;
-    uint32_t vdd_voffset_uv;
-    uint32_t vcs_voffset_uv;
-} OperatingPointParameters;
-
-
-/// A chip characterization
-
-typedef struct {
-
-    VpdOperatingPoint *vpd;
-    VpdOperatingPoint *vpd_unbiased;
-    OperatingPoint *ops;
-    OperatingPointParameters *parameters;
-    uint32_t points;
-    uint32_t max_cores;                     // Needed for WOF
-
-} ChipCharacterization;
-
-
-uint16_t
-revle16(uint16_t i_x);
-
-uint32_t
-revle32(uint32_t x);
-
-uint64_t
-revle64(const uint64_t i_x);
-
-int
-chip_characterization_create(ChipCharacterization *characterization,
-                 VpdOperatingPoint *vpd,
-                 OperatingPoint *ops,
-                 OperatingPointParameters *parameters,
-                 uint32_t points);
-
-int
-gpst_create(GlobalPstateTable *gpst,
-            ChipCharacterization *characterization,
-            WOFElements *wof,
-            int pstate_stepsize,
-            int evrm_delay_ns);
-            
-
-int
-lpst_create(const GlobalPstateTable *gpst,
-            LocalPstateArray *lpsa, 
-            const uint8_t dead_zone_5mv,
-            double volt_int_vdd_bias, 
-            double volt_int_vcs_bias,            
-            uint8_t *vid_incr_gt7_nonreg);            
-
-typedef struct IVRM_PARM_DATA {
-    uint32_t vin_min;                   // Minimum input voltage
-    uint32_t vin_max;                   // Maximum input voltage
-    uint32_t vin_table_step_size;       // Granularity of Vin table entries
-    uint32_t vin_table_setsperrow;      // Vin sets per Vds row
-    uint32_t vin_table_pfetstrperset;   // PFET Strength values per Vin set    
-    uint32_t vout_min;                  // Minimum regulated output voltage
-    uint32_t vout_max;                  // Maximum regulated output voltage
-    uint32_t vin_entries_per_vds;       // Vin array entries per vds region
-    uint32_t vds_min_range_upper_bound; // Starting point for vds regions
-    uint32_t vds_step_percent;          // vds region step muliplier
-    uint32_t vds_region_entries;        // vds region array entries (in hardware)
-    uint32_t pfetstr_default;           // Default PFET Strength with no calibration
-    uint32_t positive_guardband;        // Plus side guardband (%)
-    uint32_t negative_guardband;        // Negative side guardband (%)
-    uint32_t number_of_coefficients;    // Number of coefficents in cal data
-    uint32_t force_pfetstr_values;      // 0 - calculated; 1 = forced
-    uint32_t forced_pfetstr_value;      // If force_pfetstr_values = 1, use this value
-                                        // 5b value used as it to fill in all entries
-} ivrm_parm_data_t;
-
-void
-build_vds_region_table(ivrm_parm_data_t* i_ivrm_parms,
-                       PstateSuperStructure* pss);
-  
-  
-void  
-fill_vin_table(ivrm_parm_data_t* i_ivrm_parms,
-               PstateSuperStructure* pss);
-
-
-void fit_file(int n, 
-               uint8_t version, 
-               double C[], 
-               ivrm_cal_data_t* cal_data);
-               
-void write_HWtab_bin(ivrm_parm_data_t* i_ivrm_parms,
-                      double C[],
-                      PstateSuperStructure*   pss);
-                      
-int
-vid_mod_entry_create(WOFElements *wof, uint32_t entry, uint32_t cores, OperatingPoint *op);
-
-#ifdef __cplusplus
-} // end extern C
-#endif
-
-#endif // __ASSEMBLER__
-
-#endif // __PSTATE_TABLES_H__
diff --git a/src/usr/hwpf/hwp/pstates/pstates/pstates.c b/src/usr/hwpf/hwp/pstates/pstates/pstates.c
deleted file mode 100755
index 863d00634..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/pstates.c
+++ /dev/null
@@ -1,421 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/pstates.c $                  */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: pstates.c,v 1.9 2015/06/01 19:02:17 stillgs Exp $
-
-/// \file pstates.c
-/// \brief Pstate routines required by OCC product firmware
-
-#include "ssx.h"
-#include "pgp_common.h"
-#include "pstates.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/// Validate a VRM11 VID code
-///
-/// \param vid A VRM11 VID
-///
-/// \retval 0 The VID is valid
-///
-/// \retval -VID11_UNDERFLOW The Vid code is a low 'power off' VID (0 or 1)
-///
-/// \retval -VID11_OVERFLOW The Vid code is a high 'power off' VID (0xfe or 0xff)
-
-int
-vid11_validate(Vid11 vid)
-{
-    int rc;
-
-    if (vid < VID11_MIN) {
-
-        rc = -VID11_UNDERFLOW;
-
-    } else if (vid > VID11_MAX) {
-
-        rc = -VID11_OVERFLOW;
-
-    } else {
-
-        rc = 0;
-
-    }
-
-    return rc;
-}
-
-
-/// Bias a Pstate with saturation
-///
-/// \param pstate The initial Pstate to bias
-///
-/// \param bias The signed bias amount
-///
-/// \param biased_pstate The final biased Pstate
-///
-/// This API adds a signed bias to the \a pstate and returns the saturated sum
-/// as \a biased_pstate.  Any application that biases Pstates should use this
-/// API rather than simple addition/subtraction.
-///
-/// The following return codes are not considered errors:
-///
-/// \retval 0 Success
-///
-/// \retval -PSTATE_OVERFLOW The biased Pstate saturated at PSTATE_MAX.
-///
-/// \retval -PSTATE_UNDERFLOW The biased Pstate saturated at PSTATE_MIN.
-
-int
-bias_pstate(Pstate pstate, int bias, Pstate* biased_pstate)
-{
-    int rc, int_pstate;
-
-    int_pstate = (int)pstate + bias;
-    if (int_pstate != (Pstate)int_pstate) {
-    if (bias < 0) {
-        *biased_pstate = PSTATE_MIN;
-            rc = -PSTATE_UNDERFLOW;
-    } else {
-        *biased_pstate = PSTATE_MAX;
-            rc = -PSTATE_OVERFLOW;
-    }
-    } else {
-    *biased_pstate = int_pstate;
-    rc = 0;
-    }
-
-    return rc;
-}
-
-
-/// Bias a DPLL frequency code with saturation and bounds checking
-///
-/// \param fcode The initial frequency code to bias
-///
-/// \param bias The signed bias amount
-///
-/// \param biased_fcode The final biased frequency code
-///
-/// This API adds a signed bias to the \a fcode and returns the saturated and
-/// bounded sum as \a biased_fcode.  Any application that biases frequency
-/// codes should use this API rather than simple addition/subtraction.
-///
-/// The following return codes are not considered errors:
-///
-/// \retval 0 Success
-///
-/// \retval -DPLL_OVERFLOW The biased frequency code saturated at DPLL_MAX.
-///
-/// \retval -DPLL_UNDERFLOW The biased frequency code saturated at DPLL_MIN.
-
-int
-bias_frequency(DpllCode fcode, int bias, DpllCode* biased_fcode)
-{
-    int rc;
-    unsigned uint_fcode;
-
-    uint_fcode = (unsigned)fcode + bias;
-    if (uint_fcode != (DpllCode)uint_fcode) {
-    if (bias < 0) {
-        *biased_fcode = DPLL_MIN;
-            rc = -DPLL_UNDERFLOW;
-    } else {
-        *biased_fcode = DPLL_MAX;
-            rc = -DPLL_OVERFLOW;
-    }
-    } else if (uint_fcode < DPLL_MIN) {
-        *biased_fcode = DPLL_MIN;
-        rc = -DPLL_UNDERFLOW;
-    } else {
-    *biased_fcode = uint_fcode;
-    rc = 0;
-    }
-
-    return rc;
-}
-
-
-/// Bias a VRM11 VID code with saturation and bounds checking
-///
-/// \param vid The initial vid code to bias
-///
-/// \param bias The signed bias amount
-///
-/// \param biased_vid The final biased VID code
-///
-/// This API adds a signed bias to the \a vid and returns the saturated and
-/// bounded sum as \a biased_vid.  Any application that biases VID codes
-/// should use this API rather than simple addition/subtraction.
-///
-/// The following return codes are not considered errors:
-///
-/// \retval 0 Success
-///
-/// \retval -VID11_OVERFLOW The biased VID code saturated at VID11_MAX.
-///
-/// \retval -VID11_UNDERFLOW The biased VID code saturated at VID11__MIN.
-
-int
-bias_vid11(Vid11 vid, int bias, Vid11* biased_vid)
-{
-    int rc;
-    unsigned uint_vid;
-
-    uint_vid = (unsigned)vid + bias;
-    if (uint_vid != (DpllCode)uint_vid) {
-    if (bias < 0) {
-        *biased_vid = VID11_MIN;
-            rc = -VID11_UNDERFLOW;
-    } else {
-        *biased_vid = VID11_MAX;
-            rc = -VID11_OVERFLOW;
-    }
-    } else {
-
-        rc = vid11_validate(uint_vid);
-    *biased_vid = uint_vid;
-
-    }
-
-    return rc;
-}
-
-
-/// Retrieve an entry from the Global Pstate Table abstraction
-///
-/// \param gpst An initialized GlobalPstateTable structure.
-///
-/// \param pstate The Pstate index of the entry to fetch
-///
-/// \param bias This is a signed bias. The entry searched is the \a pstate +
-/// \a bias entry.
-///
-/// \param entry A pointer to a gpst_entry_t to hold the returned data.
-///
-/// This routine functions similar to PMC harwdare.  When a Pstate is
-/// requested the index is first biased (under/over-volted) and clipped to the
-/// defined bounds, then the Pstate entry is returned.
-///
-/// The following return codes are not considered errors:
-///
-/// \retval 0 Success
-///
-/// \retval -GPST_PSTATE_CLIPPED_HIGH The requested Pstate does not exist in
-/// the table. The maximum Pstate entry in the table has been returned.
-///
-/// \retval -GPST_PSTATE_CLIPPED_LOW The requested Pstate does not exist in
-/// the table. The minimum Pstate entry in the table has been returned.
-///
-/// The following return codes are considered errors:
-///
-/// \retval -GPST_INVALID_OBJECT The Global Pstate Table is either null (0) or
-/// otherwise invalid.
-
-int
-gpst_entry(const GlobalPstateTable *gpst,
-           const Pstate pstate,
-           int bias,
-           gpst_entry_t *entry)
-{
-    int rc, index;
-    Pstate biased_pstate;
-
-    if (gpst == 0) {
-        return -GPST_INVALID_OBJECT;
-    }
-
-    rc = bias_pstate(pstate, bias, &biased_pstate);
-
-    if ((rc == -PSTATE_UNDERFLOW) || (pstate < gpst_pmin(gpst))) {
-
-    rc = -GPST_PSTATE_CLIPPED_LOW;
-    index = 0;
-
-    } else if ((rc == -PSTATE_OVERFLOW) || (pstate > gpst_pmax(gpst))) {
-
-    rc = -GPST_PSTATE_CLIPPED_HIGH;
-    index = gpst->entries - 1;
-
-    } else {
-
-    rc = 0;
-    index = pstate - gpst_pmin(gpst);
-
-    }
-
-    *entry = gpst->pstate[index];
-
-    return rc;
-}
-
-
-/// Translate a Vdd VID code to the closest Pstate in a Global Pstate table.
-///
-/// \param gpst The GlobalPstateTable to search
-///
-/// \param vdd A VID code representing an external VDD voltage
-///
-/// \param pstate The Pstate most closely matching the \a vid.
-///
-/// \param entry The GlobalPstateTable entry of the returned \a pstate.
-///
-/// This routine assumes that Pstate voltages increase monotonically from
-/// lower to higher Pstates.  The algorithm operates from lowest to highest
-/// voltage, scanning until the Pstate voltage is >= the VID voltage.  Thus
-/// the algorithm effectively rounds up voltage (unless clipped at the highest
-/// Pstate).
-///
-/// The following return codes are not considered errors:
-///
-/// \retval 0 Success
-///
-/// \retval -GPST_PSTATE_CLIPPED_HIGH The requested voltage does not exist in
-/// the table. The highest legal Pstate is returned.
-///
-/// \retval -GPST_PSTATE_CLIPPED_LOW The requested voltage does not exist in
-/// the table.  The lowest legal Pstate in the table is returned.
-///
-/// The following return codes are considered errors:
-///
-/// \retval -VRM_INVALID_VOLTAGE The \a vid is invalid.
-///
-/// \retval -GPST_INVALID_OBJECT The \a gpst argument is NULL (0).
-
-// Recall that VID codes _decrease_ as voltage _increases_
-
-#ifdef _BIG_ENDIAN
-
-#define revle16(x) x
-#define revle32(x) x
-#define revle64(x) x
-
-#else
-
-uint16_t revle16(uint16_t i_x);
-uint32_t revle32(uint32_t i_x);
-uint64_t revle64(uint64_t i_x);
-
-#endif
-
-int
-gpst_vdd2pstate(const GlobalPstateTable* gpst,
-                const Vid11 vdd,
-                Pstate* pstate,
-                gpst_entry_t* entry)
-{
-    size_t i;
-    int rc;
-    gpst_entry_t         entry_rev;       // jwy
-  
-
-    if (gpst == 0) {
-         return -GPST_INVALID_OBJECT;
-    }
-
-    do {
-        rc =vid11_validate(vdd);
-        if (rc) break;
-
-        // Search for the Pstate that contains (close to) the requested
-        // voltage, then handle special cases.
-
-        for (i = 0; i < gpst->entries; i++) {
-            entry_rev.value = revle64(gpst->pstate[i].value);       // jwy
-
-            if (entry_rev.fields.evid_vdd <= vdd) {                 // jwy
-                break;
-            }
-        }
-
-        if (i == gpst->entries) {
-
-            *pstate = gpst_pmax(gpst);
-            *entry = gpst->pstate[i - 1];
-            rc = -GPST_PSTATE_CLIPPED_HIGH;
-
-        } else if ((i == 0) && (entry_rev.fields.evid_vdd < vdd)) {
-
-            *pstate = gpst_pmin(gpst);
-            *entry = gpst->pstate[0];
-            rc = -GPST_PSTATE_CLIPPED_LOW;
-
-        } else {
-
-            rc = bias_pstate(gpst_pmin(gpst), i, pstate);
-            if (rc) break;
-
-            *entry = gpst->pstate[i];
-        }
-    } while (0);
-    return rc;
-}
-
-int freq2pState (const GlobalPstateTable* gpst, 
-                 const uint32_t freq_khz,
-                 Pstate* pstate) 
-{
-  int rc = 0;
-  int32_t pstate32 = 0;
-  
-  // ----------------------------------
-  // compute pstate for given frequency
-  // ----------------------------------  
-  pstate32 = ((int32_t)((freq_khz - revle32(gpst->pstate0_frequency_khz)))) / (int32_t)revle32(gpst->frequency_step_khz);
-  *pstate    = (Pstate)pstate32;
-  
-  // ------------------------------
-  // perform pstate bounds checking
-  // ------------------------------
-  if (pstate32 < PSTATE_MIN)
-     rc = -PSTATE_LT_PSTATE_MIN;
-    
-  if (pstate32 > PSTATE_MAX)
-     rc = -PSTATE_GT_PSTATE_MAX;  
- 
-  return rc;
-}
-
-
-
-int pstate_minmax_chk (const GlobalPstateTable* gpst, 
-                       Pstate* pstate) 
-{
-  int rc = 0;
-  
-   // if pstate is greater than pmax, generate an error
-   if (*pstate > gpst_pmax(gpst))
-     rc = -GPST_PSTATE_GT_GPST_PMAX;                                                                                               
-   
-   // if pstate is less than than pmin, clip pstate to pmin
-   if (*pstate < gpst_pmin(gpst) )                                                                       
-     *pstate = gpst_pmin(gpst);                                      
- 
-  return rc;
-}
-
-#ifdef __cplusplus
-} // end extern C
-#endif
diff --git a/src/usr/hwpf/hwp/pstates/pstates/pstates.h b/src/usr/hwpf/hwp/pstates/pstates/pstates.h
deleted file mode 100755
index fd0e876ea..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/pstates.h
+++ /dev/null
@@ -1,854 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/pstates.h $                  */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2015                        */
-/* [+] Google Inc.                                                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#ifndef __PSTATES_H__
-#define __PSTATES_H__
-
-// $Id: pstates.h,v 1.14 2015/06/01 19:02:17 stillgs Exp $
-
-/// \file pstates.h
-/// \brief Pstate structures and support routines for OCC product firmware
-
-#include "pgp_common.h"
-
-////////////////////////////////////////////////////////////////////////////
-// Global and Local Pstate Tables
-////////////////////////////////////////////////////////////////////////////
-
-/// The Global Pstate Table must be 1KB-aligned in SRAM. The alignment is
-/// specified in the traditional log2 form.
-#define GLOBAL_PSTATE_TABLE_ALIGNMENT 10
-
-/// The Global Pstate table has 128 * 8-byte entries
-#define GLOBAL_PSTATE_TABLE_ENTRIES 128
-
-/// The Local Pstate table has 32 x 64-bit entries
-#define LOCAL_PSTATE_ARRAY_ENTRIES 32
-
-/// The VDS/VIN table has 32 x 64-bit entries
-#define VDSVIN_ARRAY_ENTRIES       64
-
-/// The VRM-11 VID base voltage in micro-Volts
-#define VRM11_BASE_UV 1612500
-
-/// The VRM-11 VID step as an unsigned number (micro-Volts)
-#define VRM11_STEP_UV 6250
-
-/// The iVID base voltage in micro-Volts
-#define IVID_BASE_UV 600000
-
-/// The iVID step as an unsigned number (micro-Volts)
-#define IVID_STEP_UV 6250
-
-/// CPM Inflection Points
-#define CPM_RANGES 8
-
-/// VPD #V Operating Points
-#define VPD_PV_POINTS 4
-#define VPD_PV_ORDER_STR {"PowerSave", "Nominal    ", "Turbo    ", "UltraTurbo"}
-#define POWERSAVE   0
-#define NOMINAL     1
-#define TURBO       2
-#define ULTRA       3
-
-/// IDDQ readings
-#define CORE_IDDQ_MEASUREMENTS 6
-#define CHIP_IDDQ_MEASUREMENTS 1
-
-#define CORE_IDDQ_ARRAY_VOLTAGES {0.80, 0.90, 1.00, 1.10, 1.20, 1.25}
-#define CHIP_IDDQ_ARRAY_VOLTAGES {1.10}
-
-/// Iddq LRPx and CRPx elements
-#define LRP_IDDQ_RECORDS    CORE_IDDQ_MEASUREMENTS
-#define CRP_IDDQ_RECORDS    CHIP_IDDQ_MEASUREMENTS
-#define IDDQ_READINGS_PER_IQ 2
-
-/// LRPx mapping to Core measurements      1      2      3      4      5       6
-///    Index                               0      1      2      3      4       5     
-#define CORE_IDDQ_MEASUREMENTS_ORDER   {   1,     2,     3,     4,     5,      0}
-#define CORE_IDDQ_MEASUREMENT_VOLTAGES {"0.90", "1.00", "1.10", "1.20", "1.25", "0.80"}
-#define CORE_IDDQ_VALIDITY_CHECK       {   1,     1,     1,     1,     1,      0}
-#define CORE_IDDQ_VALID_SECOND         {   1,     1,     1,     1,     1,      0}
-
-// CRPx mapping to Chip measurements       0
-#define CHIP_IDDQ_MEASUREMENTS_ORDER    {  0 }
-#define CHIP_IDDQ_MEASUREMENT_VOLTAGES  {"1.10"}
-#define CHIP_IDDQ_VALID_SECOND          {  0 }
-
-/// WOF Items
-#define NUM_ACTIVE_CORES 12
-#define MAX_UT_PSTATES   64     // Oversized
-
-// Error/Panic codes for support routines
-
-#define VRM11_INVALID_VOLTAGE 0x00876101
-
-#define PSTATE_OVERFLOW  0x00778a01
-#define PSTATE_UNDERFLOW 0x00778a02
-
-#define PSTATE_LT_PSTATE_MIN 0x00778a03
-#define PSTATE_GT_PSTATE_MAX 0x00778a04
-
-#define DPLL_OVERFLOW  0x00d75501
-#define DPLL_UNDERFLOW 0x00d75502
-
-#define VID11_OVERFLOW  0x00843101
-#define VID11_UNDERFLOW 0x00843102
-
-#define GPST_INVALID_OBJECT      0x00477801
-#define GPST_INVALID_ARGUMENT    0x00477802
-#define GPST_INVALID_ENTRY       0x00477803
-#define GPST_PSTATE_CLIPPED_LOW  0x00477804
-#define GPST_PSTATE_CLIPPED_HIGH 0x00477805
-#define GPST_BUG                 0x00477806
-#define GPST_PSTATE_GT_GPST_PMAX 0x00477807
-
-#define LPST_INVALID_OBJECT      0x00477901
-#define LPST_GPST_WARNING        0x00477902
-#define LPST_INCR_CLIP_ERROR     0x00477903
-
-/// PstateSuperStructure Magic Number
-///
-/// This magic number identifies a particular version of the
-/// PstateSuperStructure and its substructures.  The version number should be
-/// kept up to date as changes are made to the layout or contents of the
-/// structure.
-
-#define PSTATE_SUPERSTRUCTURE_MAGIC 0x5053544154453034ull /* PSTATE04 */
-
-
-/// \defgroup pstate_options Pstate Options
-///
-/// These are flag bits for the \a options field of the PstateOptions
-/// structure.
-///
-/// @{
-
-/// gpsm_gpst_install() - Bypass copying the Pstate table from the
-/// PstateSuperStructure into the aligned global location.
-#define PSTATE_NO_COPY_GPST       0x01
-
-/// gpsm_gpst_install() - Bypass Global Pstate Table installation and setup.
-#define PSTATE_NO_INSTALL_GPST    0x02
-
-/// gpsm_lpsa_install() - Bylass Local Pstate Array installation and setup
-#define PSTATE_NO_INSTALL_LPSA    0x04
-
-/// gpsm_resclk_install - Bypass resonant clocking Pstate limit setup
-#define PSTATE_NO_INSTALL_RESCLK  0x08
-
-/// gpsm_enable_pstates() - Force the system to the minimum Pstate at
-/// initialization
-///
-/// This mode is added as a workaround for the case that the SPIVID interface
-/// is not working correctly during initial bringup.  This forces Pstate mode
-/// to come up at a low frequency.
-#define PSTATE_FORCE_INITIAL_PMIN 0x10
-
-/// Flag to indicated that the 0.8V readings in the IDDQ Table are valid
-#define PSTATE_IDDQ_0P80V_VALID   0x20
-#define PSTATE_IDDQ_0P80V_INVALID ~PSTATE_IDDQ_0P80V_VALID
-
-/// @}
-
-#ifndef __ASSEMBLER__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdint.h>
-
-#include <p8_ivrm.H>
-
-/// A Global Pstate Table Entry, in the form of a packed 'firmware register'
-///
-/// Global Pstate table entries are referenced by OCC firmware, for example
-/// in procedures that do 'manual' Pstate manipulation.
-
-typedef union gpst_entry {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-    uint64_t evid_vdd     : 8;
-    uint64_t evid_vcs     : 8;
-    uint64_t reserved16   : 1;
-    uint64_t evid_vdd_eff : 7;
-    uint64_t reserved24   : 1;
-    uint64_t evid_vcs_eff : 7;
-    uint64_t reserved32   : 1;
-    uint64_t maxreg_vdd   : 7;
-    uint64_t reserved40   : 1;
-    uint64_t maxreg_vcs   : 7;
-        uint64_t reserved48   : 8;
-        uint64_t ecc          : 8;
-#else
-        uint64_t ecc          : 8;
-        uint64_t reserved48   : 8;
-    uint64_t maxreg_vcs   : 7;
-    uint64_t reserved40   : 1;
-    uint64_t maxreg_vdd   : 7;
-    uint64_t reserved32   : 1;
-    uint64_t evid_vcs_eff : 7;
-    uint64_t reserved24   : 1;
-    uint64_t evid_vdd_eff : 7;
-    uint64_t reserved16   : 1;
-    uint64_t evid_vcs     : 8;
-    uint64_t evid_vdd     : 8;
-#endif // _BIG_ENDIAN
-    } fields;
-
-} gpst_entry_t;
-
-
-/// A Local Pstate Table Entry, in the form of a packed 'firmware register'
-///
-/// This structure is provided for reference only; Currently the OCC firmware
-/// does not manupulate Local Pstate table entries, however it is possible
-/// that future lab applications will require this.
-
-typedef union lpst_entry {
-
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-    uint64_t ivid_vdd          : 7;
-    uint64_t ivid_vcs          : 7;
-    uint64_t vdd_core_pwrratio : 6;
-    uint64_t vcs_core_pwrratio : 6;
-    uint64_t vdd_eco_pwrratio  : 6;
-    uint64_t vcs_eco_pwrratio  : 6;
-    uint64_t ps1_vid_incr      : 3;
-    uint64_t ps2_vid_incr      : 3;
-    uint64_t ps3_vid_incr      : 3;
-    uint64_t reserved47        : 7;
-    uint64_t inc_step          : 3;
-    uint64_t dec_step          : 3;
-    uint64_t reserved60        : 4;
-#else
-    uint64_t reserved60        : 4;
-    uint64_t dec_step          : 3;
-    uint64_t inc_step          : 3;
-    uint64_t reserved47        : 7;
-    uint64_t ps3_vid_incr      : 3;
-    uint64_t ps2_vid_incr      : 3;
-    uint64_t ps1_vid_incr      : 3;
-    uint64_t vcs_eco_pwrratio  : 6;
-    uint64_t vdd_eco_pwrratio  : 6;
-    uint64_t vcs_core_pwrratio : 6;
-    uint64_t vdd_core_pwrratio : 6;
-    uint64_t ivid_vcs          : 7;
-    uint64_t ivid_vdd          : 7;
-#endif // _BIG_ENDIAN
-    } fields;
-
-} lpst_entry_t;
-
-
-/// A VDS/VIN table Entry
-
-typedef union vdsvin_entry {
-    uint64_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        uint32_t high_order;
-        uint32_t low_order;
-#else
-        uint32_t low_order;
-        uint32_t high_order;
-#endif // _BIG_ENDIAN
-    } words;
-    struct {
-#ifdef _BIG_ENDIAN
-    uint64_t ivid0             : 7;
-    uint64_t ivid1             : 7;
-    uint64_t reserved14        : 2;
-    uint64_t pfet0             : 5;
-    uint64_t pfet1             : 5;
-    uint64_t pfet2             : 5;
-    uint64_t pfet3             : 5;
-    uint64_t pfet4             : 5;
-    uint64_t pfet5             : 5;
-    uint64_t pfet6             : 5;
-    uint64_t pfet7             : 5;
-    uint64_t reserved_56       : 8;
-#else
-    uint64_t reserved_56       : 8;
-    uint64_t pfet7             : 5;
-    uint64_t pfet6             : 5;
-    uint64_t pfet5             : 5;
-    uint64_t pfet4             : 5;
-    uint64_t pfet3             : 5;
-    uint64_t pfet2             : 5;
-    uint64_t pfet1             : 5;
-    uint64_t pfet0             : 5;
-    uint64_t reserved14        : 2;
-    uint64_t ivid1             : 7;
-    uint64_t ivid0             : 7;
-#endif // _BIG_ENDIAN
-    } fields;
-} vdsvin_entry_t;
-
-/// Standard options controlling Pstate setup and GPSM procedures
-
-typedef struct {
-
-    /// Option flags; See \ref pstate_options
-    uint32_t options;
-
-    /// Pad structure to 8 bytes.  Could also be used for other options later.
-    uint32_t pad;
-
-} PstateOptions;
-
-
-/// An abstract Global Pstate table
-///
-/// The GlobalPstateTable is an abstraction of a set of voltage/frequency
-/// operating points along with hardware limits.  Besides the hardware global
-/// Pstate table, the abstract table contains enough extra information to make
-/// it the self-contained source for setting up and managing voltage and
-/// frequency in either Hardware or Firmware Pstate mode.
-///
-/// When installed in PMC, Global Pstate table indices are adjusted such that
-/// the defined Pstates begin with table entry 0. The table need not be full -
-/// the \a pmin and \a entries fields define the minimum and maximum Pstates
-/// represented in the table.  However at least 1 entry must be defined to
-/// create a legal table.
-///
-/// Note that Global Pstate table structures to be mapped into PMC hardware
-/// must be 1KB-aligned.  This requirement is fullfilled by ensuring that
-/// instances of this structure are 1KB-aligned.
-
-typedef struct {
-
-    /// The Pstate table
-    gpst_entry_t pstate[GLOBAL_PSTATE_TABLE_ENTRIES];
-
-    /// Pstate options
-    ///
-    /// The options are included as part of the GlobalPstateTable so that they
-    /// are available to all procedures after gpsm_initialize().
-    PstateOptions options;
-
-    /// The frequency associated with Pstate[0] in KHz
-    uint32_t pstate0_frequency_khz;
-
-    /// The frequency step in KHz
-    uint32_t frequency_step_khz;
-
-    /// The DPLL frequency code corresponding to Pstate 0
-    ///
-    /// This frequency code is installed in the PCB Slave as the DPLL Fnom
-    /// when the Pstate table is activated. Normally this frequency code is
-    /// computed as
-    ///
-    ///     pstate0_frequency_khz / frequency_step_khz
-    ///
-    /// however it may be replaced by any other code as a way to
-    /// transparently bias frequency on a per-core basis.
-    DpllCode pstate0_frequency_code[PGP_NCORES];
-
-    /// The DPLL Fmax bias
-    ///
-    /// This bias value (default 0, range -8 to +7 frequency ticks) is
-    /// installed when the Pstate table is installed.  The value is allowed to
-    /// vary per core.  This bias value will usually be set to a small
-    /// positive number to provide a small amount of frequency headroom for
-    /// the CPM-DPLL voltage control algorithm.
-    ///
-    /// \bug Hardware currently specifies this field as unsigned for the
-    /// computation of frequency stability in
-    /// dpll_freqout_mode_en. (HW217404).  This issue will be fixed in
-    /// Venice. Since we never plan to use this mode no workaround or
-    /// mitigation is provided by GPSM procedures.
-
-    int8_t dpll_fmax_bias[PGP_NCORES];
-
-    /// The number of entries defined in the table.
-    uint8_t entries;
-
-    /// The minimum Pstate in the table
-    ///
-    /// Note that gpsi_min = pmin - PSTATE_MIN, gpsi_max = pmin + entries - 1.
-    Pstate pmin;
-
-    /// The "Safe" Global Pstate
-    ///
-    /// This Pstate is installed in the PMC and represents the safe-mode
-    /// voltage.
-    Pstate pvsafe;
-
-    /// The "Safe" Local Pstate
-    ///
-    /// This Pstate is installed in the PCB Slaves and represents the
-    /// safe-mode frequency.
-    Pstate psafe;
-
-    /// Step size of Global Pstate steps
-    uint8_t pstate_stepsize;
-
-    /// The exponent of the exponential encoding of Pstate stepping delay
-    uint8_t vrm_stepdelay_range;
-
-    /// The significand of the exponential encoding of Pstate stepping delay
-    uint8_t vrm_stepdelay_value;
-
-    /// The Pstate for minimum core frequency in the system, defined by MRW
-    uint8_t pfloor;
-    
-    /// The Pstate representing the Turbo VPD point  
-    Pstate turbo_ps;
-    
-    /// The Pstate representing the Nominal VPD point  
-    Pstate nominal_ps;
-    
-    /// The Pstate representing the PowerSave VPD point  
-    Pstate powersave_ps;
-    
-    /// The Pstate within the GPST which is the maximum for which iVRMs are
-    /// defined.  This allows WOF Pstate and iVRM Pstates to be non-overlapping
-    /// to simplify characterization.  
-    Pstate ivrm_max_ps;
-    
-    /// The number of entries over which iVRM enablement is possible.  The
-    /// starting entry is PMin.
-    uint8_t ivrm_entries;
-    
-
-} GlobalPstateTable;
-
-
-/// This macro creates a properly-aligned Global Pstate table structure as a
-/// static initialization.
-
-#define GLOBAL_PSTATE_TABLE(x)                                  \
-    GlobalPstateTable x                                         \
-    ALIGNED_ATTRIBUTE(POW2_32(GLOBAL_PSTATE_TABLE_ALIGNMENT))   \
-        SECTION_ATTRIBUTE(".noncacheable")                      \
-        = {.entries = 0}
-
-
-/// An opaque Local Pstate Array
-///
-/// An array local to each core contains the Local Pstate Table, Vds table and
-/// Vin table. The array contents are presented to OCC firmware as an opaque
-/// set of 96 x 64-bit entries which are simply installed verbatim into each
-/// core. Every core stores the same table.
-///
-/// When installed in the core, Local Pstate table indices are adjusted such
-/// that the defined Pstates begin with table entry 0. The table need not be
-/// full - the \a pmin and \a entries fields define the minimum and maximum
-/// Pstates represented in the table.  However at least 1 entry must be
-/// defined to create a legal table.
-
-typedef struct {
-
-    /// The vdsvin table contents
-    vdsvin_entry_t vdsvin[VDSVIN_ARRAY_ENTRIES];
-
-    /// The local pstate table contents
-    lpst_entry_t pstate[LOCAL_PSTATE_ARRAY_ENTRIES];
-
-    /// The number of entries defined in the Local Pstate Table
-    uint8_t entries;
-
-    /// The minimum Pstate in the Local Pstate table
-    ///
-    /// Note that lpsi_min = pmin - PSTATE_MIN, lpsi_max = pmin + entries - 1.
-    Pstate pmin;
-
-    /// Pstate step delay for rising iVRM voltages
-    uint8_t stepdelay_rising;
-
-    /// Pstate step delay for falling iVRM voltages
-    uint8_t stepdelay_lowering;
-
-    /// Pad structure to 8-byte alignment
-    uint8_t pad[4];
-
-} LocalPstateArray;
-
-
-/// Resonant Clocking setup parameters
-///
-/// All Pstate parameters are specified in terms of Pstates as defined in the
-/// current PstateSuperStructure.
-
-typedef struct {
-
-    /// Full Clock Sector Buffer Pstate
-    Pstate full_csb_ps;
-
-    /// Low-Frequency Resonant Lower Pstate
-    Pstate res_low_lower_ps;
-
-    /// Low-Frequency Resonant Upper Pstate
-    Pstate res_low_upper_ps;
-
-    /// High-Frequency Resonant Lower Pstate
-    Pstate res_high_lower_ps;
-
-    /// High-Frequency Resonant Upper Pstate
-    Pstate res_high_upper_ps;
-
-    /// Pad structure to 8-byte alignment
-    uint8_t pad[3];
-
-} ResonantClockingSetup;
-
-/// CPM Pstate ranges per mode
-///
-/// These Pstate range specifications apply to all chiplets operating in the
-/// same mode.
-
-typedef union {
-
-    /// Forces alignment
-    uint64_t quad[2];
-
-    struct {
-
-        /// Lower limit of each CPM calibration range
-        ///
-        /// The entries in this table are Pstates representing the
-        /// lowest-numbered (lowest-voltage) Pstate of each range. This is the
-        /// inflection point between range N and range N+1.
-        Pstate inflectionPoint[CPM_RANGES];
-
-        /// The number of ranges valid in the \a inflectionPoint table
-        ///
-        /// Validity here is defined by the original characterization
-        /// data. Whether or not OCC will use any particular range is managed
-        /// by OCC.
-        uint8_t validRanges;
-
-        /// The Pstate corresponding to the upper limit of range 0.
-        ///
-        /// This is the "CPmax" for the mode. The "CPmin" for this
-        /// mode is the value of inflectionPoint[valid_ranges - 1].
-        Pstate pMax;
-
-        uint8_t pad[6];
-    };
-
-} CpmPstateModeRanges;
-
-
-/// A VPD operating point
-///
-/// VPD operating points are stored without load-line correction.  Frequencies
-/// are in MHz, voltages are specified in units of 5mV, and characterization
-/// currents are specified in units of 500mA.
-///
-/// \bug The assumption is that the 'maxreg' points for the iVRM will also be
-/// supplied in the VPD in units of 5mv.  If they are supplied in some other
-/// form then chip_characterization_create() will need to be modified.
-
-typedef struct {
-
-    uint32_t vdd_5mv;
-    uint32_t vcs_5mv;
-    uint32_t vdd_maxreg_5mv;
-    uint32_t vcs_maxreg_5mv;
-    uint32_t idd_500ma;
-    uint32_t ics_500ma;
-    uint32_t frequency_mhz;
-
-} VpdOperatingPoint;
-
-/// System Power Distribution Paramenters
-///
-/// Parameters set by system design that influence the power distribution
-/// for a rail to the processor module.  This values are typically set in the 
-/// system machine readable workbook and are used in the generation of the 
-/// Global Pstate Table.  This values are carried in the Pstate SuperStructure
-/// for use and/or reference by OCC firmware (eg the WOF algorithm)
-
-typedef struct {
-
-    /// Loadline
-    ///   Impedance (binary microOhms) of the load line from a processor VDD VRM
-    ///   to the Processor Module pins.
-    uint32_t loadline_uohm;
-
-    /// Distribution Loss
-    ///   Impedance (binary in microOhms) of the VDD distribution loss sense point
-    ///   to the circuit.
-    uint32_t distloss_uohm;
-
-    /// Distribution Offset
-    ///   Offset voltage (binary in microvolts) to apply to the rail VRM 
-    ///   distribution to the processor module.
-    uint32_t distoffset_uv;
-
-} SysPowerDistParms;
-
-
-
-/// IDDQ Reading Type
-/// Each entry is 2 bytes. The values are in 10mA units; this allow for a
-/// maximum value of 655.36A represented.
-///
-typedef uint16_t iddq_entry_t;
-
-/// IDDQ Reading
-///
-/// Structure with "raw" and "temperature corrected" values.  See VPD
-/// documentation for the correction function that is applied to the raw
-/// value to load the corrected value.
-///
-typedef union {
-    uint32_t value;
-    struct {
-#ifdef _BIG_ENDIAN
-        iddq_entry_t iddq_raw_value;
-        iddq_entry_t iddq_corrected_value;
-#else       
-        iddq_entry_t iddq_corrected_value;
-        iddq_entry_t iddq_raw_value;
-#endif // _BIG_ENDIAN
-    } fields;
-
-} IddqReading;
-
-/// Iddq Table
-///
-/// A set of arrays of leakage values (Iddq) collected at various voltage
-/// conditions during manufacturing test that will feed into the Workload
-/// Optimized Frequency algorithms on the OCC.  These values are not installed
-/// in any hardware facilities.
-///
-typedef struct {
-
-    /// IDDQ version
-    uint8_t     iddq_version;
-
-    /// VDD IDDQ readings
-    IddqReading iddq_vdd[CORE_IDDQ_MEASUREMENTS];
-
-    /// VCS IDDQ readings
-    IddqReading iddq_vcs[CORE_IDDQ_MEASUREMENTS];
-
-    /// VIO IDDQ readings
-    IddqReading iddq_vio[CHIP_IDDQ_MEASUREMENTS];
-
-} IddqTable;
-
-
-
-/// UltraTurbo Segment VIDs by Core Count
-typedef struct {
-
-    /// Number of Segment Pstates
-    uint8_t     ut_segment_pstates;
-    
-    /// Maximum number of core possibly active
-    uint8_t     ut_max_cores;
-
-    /// VDD VID modification
-    ///      1 core active  = offset 0
-    ///      2 cores active = offset 1
-    ///         ...
-    ///      12 cores active = offset 11
-    uint8_t ut_segment_vdd_vid[MAX_UT_PSTATES][NUM_ACTIVE_CORES];
-
-    /// VCS VID modification
-    ///      1 core active  = offset 0
-    ///      2 cores active = offset 1
-    ///         ...
-    ///      12 cores active = offset 11
-    uint8_t ut_segment_vcs_vid[MAX_UT_PSTATES][NUM_ACTIVE_CORES];
-
-} VIDModificationTable;
-
-/// Workload Optimized Frequency (WOF) Elements
-///
-/// Structure defining various control elements needed by the WOF algorithm
-/// firmware running on the OCC.
-///
-typedef struct {
-
-    /// WOF Enablement
-    uint8_t wof_enabled;
-
-    /// Operating points
-    ///
-    /// VPD operating points are stored without load-line correction.  Frequencies
-    /// are in MHz, voltages are specified in units of 5mV, and currents are
-    /// in units of 500mA.
-    VpdOperatingPoint operating_points[VPD_PV_POINTS];
-
-    /// Loadlines and Distribution values for the VDD rail
-    SysPowerDistParms vdd_sysparm;
-    
-    /// Loadlines and Distribution values for the VCS rail
-    SysPowerDistParms vcs_sysparm;
-
-    /// TDP<>RDP Current Factor
-    ///   Value read from ??? VPD
-    ///   Defines the scaling factor that converts current (amperage) value from
-    ///   the Thermal Design Point to the Regulator Design Point (RDP) as input
-    ///   to the Workload Optimization Frequency (WOF) OCC algorithm.
-    ///
-    ///   This is a ratio value and has a granularity of 0.01 decimal.  Data
-    ///   is held in hexidecimal (eg 1.22 is represented as 122 and then converted
-    ///   to hex 0x7A).
-    uint32_t tdp_rdp_factor;
-
-    /// UltraTurbo Segment VIDs by Core Count
-    VIDModificationTable ut_vid_mod;
-
-    uint8_t pad[4];
-
-} WOFElements;
-
-/// The layout of the data created by the Pstate table creation firmware
-///
-/// This structure is only used for passing Pstate data from the FSP into OCC,
-/// therefore there is no alignment requirement.  The \gpst member is copied
-/// to an aligned location, and the \a lpsa and \a resclk members are directly
-/// installed in hardware.
-///
-/// Both the master and slave OCCs (in DCM-mode) install their Pstate tables
-/// independently via the API gpsm_initialize().  At that point the
-/// PstateSuperStructure can be discarded.
-
-typedef struct {
-
-    /// Magic Number
-    uint64_t magic;
-
-    /// Global Pstate Table
-    GlobalPstateTable gpst;
-
-    /// Local Pstate Array
-    LocalPstateArray lpsa;
-
-    /// Resonant Clocking Setup
-    ResonantClockingSetup resclk;
-
-    /// CPM Pstate ranges
-    CpmPstateModeRanges cpmranges;
-
-    /// Iddq Table
-    IddqTable iddq;
-
-    /// WOF Controls
-    WOFElements wof;
-
-} PstateSuperStructure;
-
-
-int
-vid11_validate(Vid11 vid);
-
-int
-bias_pstate(Pstate pstate, int bias, Pstate* biased_pstate);
-
-int
-bias_frequency(DpllCode fcode, int bias, DpllCode* biased_fcode);
-
-int
-bias_vid11(Vid11 vid, int bias, Vid11* biased_fcode);
-
-int
-gpst_entry(const GlobalPstateTable* gpst,
-           const Pstate pstate,
-           const int bias,
-           gpst_entry_t* entry);
-
-
-int
-freq2pState (const GlobalPstateTable* gpst,
-             const uint32_t freq_khz,
-             Pstate* pstate);
-
-int
-gpst_vdd2pstate(const GlobalPstateTable* gpst,
-                const uint8_t vdd,
-                Pstate* pstate,
-                gpst_entry_t* entry);
-
-int
-pstate_minmax_chk (const GlobalPstateTable* gpst,
-                   Pstate* pstate);
-
-/// Return the Pmin value associated with a GlobalPstateTable
-static inline Pstate
-gpst_pmin(const GlobalPstateTable* gpst)
-{
-    return gpst->pmin;
-}
-
-
-/// Return the Pmax value associated with a GlobalPstateTable
-static inline Pstate
-gpst_pmax(const GlobalPstateTable* gpst)
-{
-    return (int)(gpst->pmin) + (int)(gpst->entries) - 1;
-}
-
-/// Return the Pmin value associated with a LocalPstateTable
-static inline Pstate
-lpst_pmin(const LocalPstateArray* lpsa)
-{
-    return lpsa->pmin;
-}
-
-
-/// Return the Pmax value associated with a GlobalPstateTable
-static inline Pstate
-lpst_pmax(const LocalPstateArray* lpsa)
-{
-    return (int)(lpsa->pmin) + (int)(lpsa->entries) - 1;
-}
-
-#ifdef __cplusplus
-} // end extern C
-#endif
-
-#endif    /* __ASSEMBLER__ */
-
-#endif    /* __PSTATES_H__ */
diff --git a/src/usr/hwpf/hwp/pstates/pstates/ssx.h b/src/usr/hwpf/hwp/pstates/pstates/ssx.h
deleted file mode 100755
index 58f02f87a..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates/ssx.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/pstates/pstates/ssx.h $                      */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2013,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#ifndef __SSX_H__
-#define __SSX_H__
-
-// $ID$
-
-/// \file ssx.h
-/// \brief Dummy "ssx.h" for X86 testing
-
-#define __SSX__
-
-#ifndef __ASSEMBLER__
-#include <stdint.h>
-#include <stddef.h>
-#include <string.h>
-#include <stdlib.h>
-#include <stdio.h>
-
-#endif    /* __ASSEMBLER__ */
-
-#ifndef __ASSEMBLER__
-
-#define MIN(X, Y) \
-    ({ \
-    typeof (X) __x = (X); \
-    typeof (Y) __y = (Y); \
-    (__x < __y) ? __x : __y; })
-
-#define MAX(X, Y) \
-    ({ \
-    typeof (X) __x = (X); \
-    typeof (Y) __y = (Y); \
-    (__x > __y) ? __x : __y; \
-    })
-
-#endif    /* __ASSEMBLER__ */
-
-
-#define SSX_ERROR_CHECK_API    1
-#define SSX_ERROR_CHECK_KERNEL 1
-#define SSX_ERROR_PANIC        1
-
-#define SSX_NONCRITICAL 0
-#define SSX_CRITICAL    1
-
-#define SSX_INVALID_ARGUMENT           0x00888005
-#define SSX_INVALID_OBJECT             0x0088800e
-
-typedef int SsxMachineContext;
-
-static inline void
-ssx_critical_section_enter(int priority, SsxMachineContext *ctx)
-{}
-
-static inline void
-ssx_critical_section_exit(SsxMachineContext *ctx)
-{}
-
-
-#define SSX_PANIC(code) \
-    do { \
-    fprintf(stderr, "%s : %d  : PANIC : 0x%08x\n", \
-        __FUNCTION__, __LINE__, code);           \
-    exit(1); \
-    } while (0)
-
-
-/// This macro encapsulates error handling boilerplate in the SSX API
-/// functions, for errors that do not occur in critical sections.
-
-#define SSX_ERROR_IF(condition, code) \
-    if (condition) { \
-    if (SSX_ERROR_PANIC) { \
-        SSX_PANIC(code);   \
-    } else { \
-        return -(code); \
-    } \
-    }
-
-#define printk(...) printf(__VA_ARGS__)
-
-#endif    /* __SSX_H__ */
diff --git a/src/usr/hwpf/hwp/pstates/pstates_common.mk b/src/usr/hwpf/hwp/pstates/pstates_common.mk
deleted file mode 100644
index 98dddd856..000000000
--- a/src/usr/hwpf/hwp/pstates/pstates_common.mk
+++ /dev/null
@@ -1,63 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/hwp/pstates/pstates_common.mk $
-#
-# OpenPOWER HostBoot Project
-#
-# Contributors Listed Below - COPYRIGHT 2013,2015
-# [+] International Business Machines Corp.
-#
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-
-##      support for Targeting and fapi
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/ecmddatabuffer
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/fapi
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/plat
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/initservice
-
-## pointer to common HWP files
-EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/include
-
-##  NOTE: add the base istep dir here.
-##@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/@istepname
-EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/pstates
-EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/slave_sbe
-##  Include sub dirs
-##  NOTE: add a new EXTRAINCDIR when you add a new HWP
-##@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/???
-EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/pstates/pstates
-EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/
-
-
-##  NOTE: add new object files when you add a new HWP
-OBJS += gpstCheckByte.o
-OBJS += lab_pstates.o
-OBJS += p8_build_pstate_datablock.o
-OBJS += proc_get_voltage.o
-OBJS += pstates.o
-OBJS += pstate_tables.o
-OBJS += freqVoltageSvc.o
-OBJS += proc_set_max_pstate.o
-
-## allow FAPI macros in c files
-CFLAGS += -D __FAPI
-CC_OVERRIDE = 1
-
-##  NOTE: add a new directory onto the vpaths when you add a new HWP
-##@ VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/???
-VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/pstates/pstates
diff --git a/src/usr/hwpf/hwp/pstates/runtime/makefile b/src/usr/hwpf/hwp/pstates/runtime/makefile
deleted file mode 100644
index 004996877..000000000
--- a/src/usr/hwpf/hwp/pstates/runtime/makefile
+++ /dev/null
@@ -1,38 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/hwp/pstates/runtime/makefile $
-#
-# OpenPOWER HostBoot Project
-#
-# Contributors Listed Below - COPYRIGHT 2015
-# [+] International Business Machines Corp.
-#
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-
-HOSTBOOT_RUNTIME = 1
-
-ROOTPATH = ../../../../../..
-VPATH += ../
-
-MODULE = pstates_rt
-
-## Objects unique to HBRT
-
-## Objects common to HBRT and HB IPL
-include ../pstates_common.mk
-
-include ${ROOTPATH}/config.mk
diff --git a/src/usr/hwpf/hwp/runtime_attributes/memory_occ_attributes.xml b/src/usr/hwpf/hwp/runtime_attributes/memory_occ_attributes.xml
deleted file mode 100644
index b232db8df..000000000
--- a/src/usr/hwpf/hwp/runtime_attributes/memory_occ_attributes.xml
+++ /dev/null
@@ -1,49 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_attributes/memory_occ_attributes.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<attributes>
-<!-- $Id: memory_occ_attributes.xml,v 1.1 2013/10/08 08:23:08 bellows Exp $ -->
-<!-- *********************************************************************** -->
-
-<attribute>
-    <id>ATTR_MSS_DATABUS_UTIL_PER_MBA</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>MBA DRAM data bus utilization percent to use to determine cfg_nm_n_per_mba</description>
-    <valueType>uint8</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_UTIL_N_PER_MBA</id>
-    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>cfg_nm_n_per_mba throttle N value that was calculated from MSS_DATABUS_UTIL_PER_MBA</description>
-    <valueType>uint32</valueType>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-    <persistRuntime/>
-</attribute>
-
-</attributes>
diff --git a/src/usr/hwpf/hwp/runtime_attributes/pm_plat_attributes.xml b/src/usr/hwpf/hwp/runtime_attributes/pm_plat_attributes.xml
deleted file mode 100644
index e463c8e07..000000000
--- a/src/usr/hwpf/hwp/runtime_attributes/pm_plat_attributes.xml
+++ /dev/null
@@ -1,775 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_attributes/pm_plat_attributes.xml $  -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: pm_plat_attributes.xml,v 1.13 2015/03/12 18:02:45 stillgs Exp $ -->
-<!--
-    XML file specifying Power Management HWPF attributes.
-    These attributes are initialized by the platform.
--->
-
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_EXTERNAL_VRM_STEPSIZE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <!-- <<<<<<< PROC_CHIP POSSIBLE -->
-    <description>
-      Step size (binary in microvolts) to take upon external VRM voltage
-      transitions. The value set here must take into account where internal
-      VRMs are enabled or not as, when they are enabled, the step size must
-      account for the tracking (eg PFET strength recalculation) for the step.
-
-      Consumer: p8_build_gpstate_tables.C, p8_pmc_init.C
-
-      Provided by the Machine Readable Workbook after system characterization.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_EXTERNAL_VRM_STEPDELAY</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <!-- <<<<<<< PROC_CHIP POSSIBLE -->
-    <description>
-      Step delay (binary in microseconds) after a voltage change
-
-      Consumer: p8_pmc_init
-
-      Provided by the Machine Readable Workbook after system characterization.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_UNDERVOLTING_FRQ_MINIMUM</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Override for Minimum frequency for which undervolting is allowed.
-      
-      If value = 0, the value of VPD CPMin data point is passed to OCC FW via 
-      Pstate SuperStructure.
-      
-      If value != 0, this value will be passed to OCC FW via Pstate SuperStructure
-      as the floor frequency for enabled CPMs.
-      
-      Will be internally rounded to the nearest ATTR_PROC_REFCLK_FREQUENCY / 8 value.
-
-      Consumer: OCC FW; OCC Lab Tools
-
-      Provided by the Machine Readable Workbook.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_UNDERVOLTING_FREQ_MAXIMUM</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Override for Maximum frequency for which undervolting is allowed.
-      
-      If value = 0, the value of VPD Turbo data point is passed to OCC FW via 
-      Pstate SuperStructure.
-      
-      If value != 0, this value will be passed to OCC FW via Pstate SuperStructure
-      as the ceiling frequency for enabled CPMs.
-      
-      Will be internally rounded to the nearest ATTR_PROC_REFCLK_FREQUENCY / 8 value.
-
-      Consumer: OCC FW; OCC Lab Tools
-
-      Provided by the Machine Readable Workbook.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_SPIVID_FREQUENCY</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <!-- <<<<<<< PROC_CHIP POSSIBLE -->
-    <description>
-      SPI Clock Frequency (binary in KHz)
-
-      Consumer: p8_pmc_init
-
-      Produces ATTR_PM_SPIVID_CLOCK_DIVIDER
-
-      Overridden by the Machine Readable Workbook.
-
-      If default of 0 is read, HWP will set SPIVID frequency to 1MHz.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_SPIVID_PORT_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Defines the configuration of the SPIVID ports from the target.
-      - NONE means that no VRM is attached.
-      - PORTxNONRED means that the indicated port is used in a non-redundant
-                    configuration.
-      - REDUNDANT means that all three are connected and considered redundant.
-
-      Producer:  Machine Readable Workbook
-    </description>
-    <valueType>uint8</valueType>
-    <enum>NONE = 0x00, PORT0NONRED = 0x04, PORT1NONRED = 0x02, PORT2NONRED = 0x01, REDUNDANT = 0x07</enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_SAFE_FREQUENCY</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      Frequency (binary in KHz) indicating the frequency that the cores will be moved 
-      to in the event of the loss of the OCC Heartbeat.  This value needs to be the maximum
-      of the DpoMin frequency for proper PowerBus operation and the PowerSave value for
-      the present part.
-
-      Provided by the Machine Readable Workbook after system characterization.
-
-      The value is translated to the Pstate space.
-
-      Producer:  Machine Readable Workbook
-
-      Consumers: p8_build_gpstate_table.C
-
-      DYNAMIC_ATTRIBUTE: ATTR_PM_SAFE_PSTATE
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      Frequency (binary in KHz) for the point at which clock sector buffers
-      should be at full strength.  This is to support Vmin operation.
-      Setting cannot overlap the Low or High bands.
-
-      Provided by the Machine Readable Workbook after system characterization.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      Frequency (binary in KHz)) for the lower end of the Low Frequency
-      Resonant band
-
-      Provided by the Machine Readable Workbook after system characterization.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      Frequency (binary in KHz) for the upper end of the Low Frequency
-      Resonant band
-
-      Provided by the Machine Readable Workbook after system characterization.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      Frequency (binary in KHz) for the lower end of the High Frequency
-      Resonant band
-
-      Provided by the Machine Readable Workbook after system characterization.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      Frequency (binary in KHz)) for the upper end of the High Frequency
-      Resonant band
-
-      Provided by the Machine Readable Workbook after system characterization.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_SPIPSS_FREQUENCY</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      SPIPSS Clock Frequency (binary in KHz)
-
-      Valid range: 500KHz to 2500KHz
-
-      Consumer: p8_pss_init
-
-      Overridden by the Machine Readable Workbook.
-
-      If default of 0 is read, HWP will set SPIPSS frequency to 10MHz.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_APSS_CHIP_SELECT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Defines which of the PSS chip selects that the APSS is connected
-
-      Provided by the Machine Readable Workbook.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>NONE = 0xFF, CS0 = 0x00, CS1 = 0x01</enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_PBAX_NODEID</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Receive PBAX Nodeid. Value that indicates this PBA's PBAX Node affinity.
-      This is matched to pbax_nodeid of the PMISC Address phase.
-
-      Provided by the Machine Readable Workbook.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_PBAX_CHIPID</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Receive PBAX Chipid. Value that indicates this PBA's PBAX Chipid within
-      the PBAX node.  Is matched to pbax_chipid of the Address phase if
-      pbax_type=unicast.
-
-      Provided by the Machine Readable Workbook.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_PBAX_BRDCST_ID_VECTOR</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Receive PBAX Broadcast Group. Vector that is indexed when decoded PMISC
-      pbax_type=broadcast with the decoded PMISC pbax_chipid value.  If the
-      bit in this vector at the decoded bit location is a 1, then this receive
-      engine will participate in the broadcast operation.
-
-      Provided by the Machine Readable Workbook.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_R_LOADLINE_VDD</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Impedance (binary microOhms) of the load line from a processor VDD VRM to the
-      Processor Module pins.  This value is applied to each processor instance.
-
-      Consumers: p8_build_gpstate_table.C
-
-      Provided by the Machine Readable Workbook (via the power subsystem design
-      per system)
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_R_DISTLOSS_VDD</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Impedance (binary in microOhms) of the VDD distribution loss sense point
-      to the circuit. This value is applied to each processor instance.
-
-      Producer:  Machine Readable Workbook (via the power subsystem design per system)
-
-      Consumer: p8_build_gpstate_table.C
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_VRM_VOFFSET_VDD</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Offset voltage (binary in microvolts) to apply to the VDD VRM distribution to
-      the processor module.  This value is applied to each processor instance.
-
-      Producer:  Machine Readable Workbook (via the power subsystem design per system)
-
-      Consumer: p8_build_gpstate_table.C
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-    <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_R_LOADLINE_VCS</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Impedance (binary microOhms) of the load line from a processor VCS VRM to the
-      Processor Module pins.  This value is applied to each processor instance.
-
-      Producer:  Machine Readable Workbook (via the power subsystem design per system)
-
-      Consumer: p8_build_gpstate_table.C
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_R_DISTLOSS_VCS</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Impedance (binary in microOhms) of the VCS distribution loss sense point
-      to the circuit. This value is applied to each processor instance.
-
-      Producer:  Machine Readable Workbook (via the power subsystem design per system)
-
-      Consumer: p8_build_gpstate_table.C
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_VRM_VOFFSET_VCS</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Offset voltage (binary in microvolts) to apply to the VCS VRM distribution to
-      the processor module.  This value is applied to each processor instance.
-
-      Producer:  Machine Readable Workbook (via the power subsystem design per system)
-
-      Consumer: p8_build_gpstate_table.C
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FREQ_CORE_MAX</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      Maximum frequency (binary in MHz) that any processor in the system will
-      run. Used to define the top end of the PState range in the frequency space.
-      From this, the ATTR_PROCPM_PSTATE0_FREQUENCY is computed using
-      ATTR_SYSTEM_REFCLK_FREQUENCY to determine the step size.
-
-      Producer:  DEF file (per T. Rosedahl)
-
-      Consumers: p8_build_gpstate_table.C (among others)
-
-      TODO: Dean's proposal is that each platform will iterate over all chips,
-            reading the super-turbo frequency from MVPD #V and set this attribute
-            to the lowest value.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_CPM_TURBO_BOOST_PERCENT</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-     Percent of Boost Above Turbo for CPMs - (binary in 0.1 percent steps)
-
-     Used in generating extra Pstate tables beyond those that would result from
-     #V data.
-
-     Producer:  DEF file as this is CCIN based
-
-     Consumers: p8_build_gpstate_table.C, p8_cpm_cal_load.C
-
-     Platform default:  0
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FREQ_EXT_BIAS_UP</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-     Frequency Bias - % of bias upward (binary in 0.5 percent steps) in generating
-     Pstate tables.  Either this or FREQ_EXT_BIAS_DOWN can have non-zero value
-     concurrently due to the unsigned definition of attributes.
-
-     Producer:  Attribute Overrides by Lab/Mfg Characterization Team
-
-     Consumers: p8_build_gpstate_table.C
-
-     Platform default:  0
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FREQ_EXT_BIAS_DOWN</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-     Frequency Bias - % of bias downward (binary in 0.5 percent steps) in generating
-     Pstate tables.  Either this or FREQ_EXT_BIAS_UP can have non-zero value
-     concurrently due to the unsigned definition of attributes.
-
-     Producer:  Attribute Overrides by Lab/Mfg Characterization Team
-
-     Consumers: p8_build_gpstate_table.C
-
-     Platform default:  0
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_VOLTAGE_EXT_VDD_BIAS_UP</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-     External VDD Voltage Bias - % of bias upward (binary in 0.5 percent steps) that
-     is applied to each VPD point in generating the Global Pstate tables. Either 
-     this or ATTR_VOLTAGE_EXT_VDD_BIAS_DOWN can have non-zero value concurrently due to
-     the unsigned definition of attributes.
-
-     Producer:  Attribute Overrides by Lab/Mfg Characterization Team
-
-     Consumers: p8_build_gpstate_table.C
-
-     Platform default:  0
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_VOLTAGE_EXT_VDD_BIAS_DOWN</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-     External VDD Voltage Bias - % of bias downward (binary in 0.5 percent steps) that
-     is applied to each VPD point in generating the Global Pstate tables. Either 
-     this or ATTR_VOLTAGE_EXT_VDD_BIAS_UP can have non-zero value concurrently due to
-     the unsigned definition of attributes.
-
-     Producer:  Attribute Overrides by Lab/Mfg Characterization Team
-
-     Consumers: p8_build_gpstate_table.C
-
-     Platform default:  0
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>    
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_VOLTAGE_EXT_VCS_BIAS_UP</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-     External VCS Voltage Bias - % of bias upward (binary in 0.5 percent steps) that
-     is applied to each VPD point in generating the Global Pstate tables. Either 
-     this or ATTR_VOLTAGE_EXT_VCS_BIAS_DOWN can have non-zero value concurrently due to
-     the unsigned definition of attributes.
-
-     Producer:  Attribute Overrides by Lab/Mfg Characterization Team
-
-     Consumers: p8_build_gpstate_table.C
-
-     Platform default:  0
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>    
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_VOLTAGE_EXT_VCS_BIAS_DOWN</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-     External VCS Voltage Bias - % of bias downward (binary in 0.5 percent steps) that
-     is applied to each VPD point in generating the Global Pstate tables. Either 
-     this or ATTR_VOLTAGE_EXT_VCS_BIAS_UP can have non-zero value concurrently due to
-     the unsigned definition of attributes.
-
-     Producer:  Attribute Overrides by Lab/Mfg Characterization Team
-
-     Consumers: p8_build_gpstate_table.C
-
-     Platform default:  0
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>    
-  </attribute>
-    <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_VOLTAGE_INT_VDD_BIAS_UP</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-     Internal VDD Voltage Bias - % of bias upward (binary in 0.5 percent steps) that
-     is applied to the Local Pstate Table voltage entries based on the Global Pstate Table 
-     built *after* the ATTR_VOLTAGE_EXT_VDD_BIAS_UP/ATTR_VOLTAGE_EXT_VDD_BIAS_DOWN bias 
-     have been applied. Either this or ATTR_VOLTAGE_INT_VDD_BIAS_DOWN can have non-zero value 
-     concurrently due to the unsigned definition of attributes.
-
-     Producer:  Attribute Overrides by Lab/Mfg Characterization Team
-
-     Consumers: p8_build_gpstate_table.C
-
-     Platform default:  0
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_VOLTAGE_INT_VDD_BIAS_DOWN</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-     Internal VDD Voltage Bias - % of bias downward (binary in 0.5 percent steps) that
-     is applied to the Local Pstate Table voltage entries based on the Global Pstate Table 
-     built *after* the ATTR_VOLTAGE_EXT_VDD_BIAS_UP/ATTR_VOLTAGE_EXT_VDD_BIAS_DOWN bias 
-     have been applied. Either this or ATTR_VOLTAGE_INT_VDD_BIAS_UP can have non-zero value 
-     concurrently due to the unsigned definition of attributes.
-
-     Producer:  Attribute Overrides by Lab/Mfg Characterization Team
-
-     Consumers: p8_build_gpstate_table.C
-
-     Platform default:  0
-    </description>
-    <valueType>uint32</valueType>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_VOLTAGE_INT_VCS_BIAS_UP</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-     Internal VCS Voltage Bias - % of bias upward (binary in 0.5 percent steps) that
-     is applied to the Local Pstate Table voltage entries based on the Global Pstate Table 
-     built *after* the ATTR_VOLTAGE_EXT_VCS_BIAS_UP/ATTR_VOLTAGE_EXT_VCS_BIAS_DOWN bias 
-     have been applied. Either this or ATTR_VOLTAGE_INT_VCS_BIAS_DOWN can have non-zero value 
-     concurrently due to the unsigned definition of attributes.
-
-     Producer:  Attribute Overrides by Lab/Mfg Characterization Team
-
-     Consumers: p8_build_gpstate_table.C
-
-     Platform default:  0
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>    
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_VOLTAGE_INT_VCS_BIAS_DOWN</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-     Internal VCS Voltage Bias - % of bias downward (binary in 0.5 percent steps) that
-     is applied to the Local Pstate Table voltage entries based on the Global Pstate Table 
-     built *after* the ATTR_VOLTAGE_EXT_VCS_BIAS_UP/ATTR_VOLTAGE_EXT_VCS_BIAS_DOWN bias 
-     have been applied. Either this or ATTR_VOLTAGE_INT_VCS_BIAS_UP can have non-zero value 
-     concurrently due to the unsigned definition of attributes.
-
-     Producer:  Attribute Overrides by Lab/Mfg Characterization Team
-
-     Consumers: p8_build_gpstate_table.C
-
-     Platform default:  0
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>    
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_SLEEP_ENABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Control HW response to execution of PPC sleep instruction
-    if OFF, treat sleep as nap
-    if ON, treat sleep as sleep
-
-    Producer: Hostboot
-
-    Consumer:  p8_slw_build.C
-    </description>
-    <valueType>uint8</valueType>
-    <enum>OFF=0, ON=1</enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_SLEEP_ENTRY</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Setting depends on di/dt charateristics of the system.
-
-    Set Assisted if power off serialization is needed and SLEEP_TYPE=Fast;  Set to Hardware if the system can handle the unrelated powering off between cores.  Hardware setting decreases entry latency
-
-    Producer: MRWB
-
-    Consumer:  p8_poreslw_init.C
-    </description>
-    <valueType>uint8</valueType>
-    <enum>HARDWARE=0, ASSISTED=1</enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_SLEEP_EXIT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Setting depends on di/dt charateristics of the system and the setting of ATTR_PM_SLEEP_TYPE.
-
-    Set to Assisted if power on serialization is needed and SLEEP_TYPE=Fast;  Set to Hardware if the system can handle the unrelated powering off between cores.  Hardware setting decreases entry latency
-    Must be set to Assisted if ATTR_PM_SLEEP_TYPE=Deep as this necessary for restore.
-
-    Setting to Hardware is a test mode for Fast only.
-
-    Producer: MRWB
-
-    Consumer:  p8_poreslw_init.C
-    </description>
-    <valueType>uint8</valueType>
-    <enum>HARDWARE=0, ASSISTED=1</enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_SLEEP_TYPE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Sleep Power Off Select:
-    Selects which voltage level to place the Core domain PFETs upon Sleep entry. 0 = Vret (Fast Sleep Mode), 1 = Voff (Deep Sleep Mode)
-
-    Producer: MRWB
-
-    Consumer:  p8_poreslw_init.C
-    </description>
-    <valueType>uint8</valueType>
-    <enum>FAST=0, DEEP=1</enum>
-    <platInit/>
-  </attribute>
-    <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_WINKLE_ENTRY</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Setting depends on di/dt charateristics of the system.
-
-    Set Assisted if power off serialization is needed and WINKLE_TYPE=Fast;  
-    Set to Hardware if the system can handle the unrelated powering off between cores.  
-    Hardware setting decreases entry latency
-
-    Producer: MRWB
-
-    Consumer:  p8_poreslw_init.C
-    </description>
-    <valueType>uint8</valueType>
-    <enum>HARDWARE=0, ASSISTED=1</enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_WINKLE_EXIT</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Setting depends on di/dt charateristics of the system and the setting of ATTR_PM_WINKLE_TYPE.
-
-    Set to Assisted if power on serialization is needed and WINKLE_TYPE=Fast;  Set to Hardware if the system 
-    can handle the unrelated powering off between cores.  Hardware setting decreases entry latency.
-    Must be set to Assisted if ATTR_PM_WINKLE_TYPE=Deep as this necessary for restore.
-
-    Setting to Hardware is a test mode for Fast only.
-
-    Producer: MRWB
-
-    Consumer:  p8_poreslw_init.C
-    </description>
-    <valueType>uint8</valueType>
-    <enum>HARDWARE=0, ASSISTED=1</enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_WINKLE_TYPE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Winkle Power Off Select:
-    Selects which voltage level to place the Core and ECO domain PFETs upon Winkle entry. 0 = Vret (Fast Winkle Mode), 1 = Voff (Deep Winkle Mode)
-    Producer: MRWB
-
-    Consumer:  p8_poreslw_init.C
-    </description>
-    <valueType>uint8</valueType>
-    <enum>FAST=0, DEEP=1</enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_SYSTEM_IVRMS_ENABLED</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>System control to allow (if all other attribute tests yield true values) or categorically disallow IVRM enablement
-    Producer: MRWB
-
-    Consumer:  p8_build_pstate_datablock.C
-    </description>
-    <valueType>uint8</valueType>
-    <enum>FALSE=0, TRUE=1</enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PM_SYSTEM_IVRM_VPD_MIN_LEVEL</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Version level of #M that represents the minimum for IVRM characterized parts.  
-    If this value is non-zero and the #M version level is less than this value, IVRMs are disabled.  
-    If the #M version is greater than or equal to this value, the IVRMs are allowed to be enable from a level of part perspective.
-    Producer: MRWB
-
-    Consumer:  p8_build_pstate_datablock.C
-    </description>
-    <valueType>uint8</valueType>    
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_force_vsafe_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_force_vsafe_errors.xml
deleted file mode 100644
index da10bb66f..000000000
--- a/src/usr/hwpf/hwp/runtime_errors/p8_force_vsafe_errors.xml
+++ /dev/null
@@ -1,110 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_force_vsafe_errors.xml $   -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_force_vsafe_errors.xml,v 1.7 2014/04/24 17:01:15 daviddu Exp $ -->
-<!-- Error definitions for proc_pmc_force_vsafe procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_VLT_TIMEOUT</rc>
-    <description>Voltage change timeout for the ongoing operation completion.</description>    
-    <ffdc>PSTATETARGET</ffdc>
-    <ffdc>PSTATESTEPTARGET</ffdc>
-    <ffdc>PSTATEACTUAL</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PSTATE_REGISTERS</id> 
-      <id>REG_FFDC_SPIVID_REGISTERS</id>
-      <target>THISCHIP</target>
-    </collectRegisterFfdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PSTATE_REGISTERS</id> 
-      <id>REG_FFDC_SPIVID_REGISTERS</id>
-      <target>DCMCHIP</target>
-    </collectRegisterFfdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PCBS_PSSTATE_MONITOR_REGISTERS</id>
-      <basedOnPresentChildren>
-          <target>THISCHIP</target>
-          <childType>TARGET_TYPE_EX_CHIPLET</childType>
-          <childPosOffsetMultiplier>0x01000000</childPosOffsetMultiplier>
-      </basedOnPresentChildren>     
-    </collectRegisterFfdc> 
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PCBS_PSSTATE_MONITOR_REGISTERS</id>
-      <basedOnPresentChildren>
-          <target>DCMCHIP</target>
-          <childType>TARGET_TYPE_EX_CHIPLET</childType>
-          <childPosOffsetMultiplier>0x01000000</childPosOffsetMultiplier>
-      </basedOnPresentChildren>     
-    </collectRegisterFfdc>      
-    <callout>
-       <target>THISCHIP</target> 
-       <priority>HIGH</priority> 
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSTATE_MONITOR_ERR</rc>
-    <description>Voltage change done but expected pstate did not match after completion.</description>
-    <ffdc>THISCHIP</ffdc>
-    <ffdc>PSTATETARGET</ffdc>
-    <ffdc>PSTATESTEPTARGET</ffdc>
-    <ffdc>PSTATEACTUAL</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PSTATE_REGISTERS</id>
-      <id>REG_FFDC_SPIVID_REGISTERS</id>
-      <target>THISCHIP</target>
-    </collectRegisterFfdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PSTATE_REGISTERS</id>
-      <id>REG_FFDC_SPIVID_REGISTERS</id>
-      <target>DCMCHIP</target>
-    </collectRegisterFfdc>
-    <callout>
-       <target>THISCHIP</target> 
-       <priority>HIGH</priority> 
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
- <hwpError>
-    <rc>RC_PROCPM_VOLTAGE_CHANGE_MODE_ERR</rc>
-    <description>PMC is disabled for Voltage changes.</description>
-    <ffdc>CHIP</ffdc>
-    <ffdc>PMCMODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
- <!-- *********************************************************************** -->
- <hwpError>
-    <rc>RC_PROCPM_MST_SEQUENCER_STATE_ERR</rc>
-    <description>PMC is disabled PMC_MASTER_SEQUENCER.</description>
-    <ffdc>CHIP</ffdc>
-    <ffdc>PMCMODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_gpe_registers.xml b/src/usr/hwpf/hwp/runtime_errors/p8_gpe_registers.xml
deleted file mode 100644
index 881a3f396..000000000
--- a/src/usr/hwpf/hwp/runtime_errors/p8_gpe_registers.xml
+++ /dev/null
@@ -1,75 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_gpe_registers.xml $        -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_gpe_registers.xml,v 1.1 2013/10/08 15:45:17 stillgs Exp $ -->
-<!-- Definition of GPE registers to collect on some errors -->
-<hwpErrors>
-  <registerFfdc>
-    <id>REG_FFDC_PROC_GPE_REGISTERS</id>
-    <scomRegister>PORE_GPE0_STATUS_0x00060000</scomRegister>
-    <scomRegister>PORE_GPE0_CONTROL_0x00060001</scomRegister>
-    <scomRegister>PORE_GPE0_RESET_0x00060002</scomRegister>
-    <scomRegister>PORE_GPE0_ERROR_MASK_0x00060003</scomRegister>
-    <scomRegister>PORE_GPE0_PRV_BASE_ADDRESS0_0x00060004</scomRegister>
-    <scomRegister>PORE_GPE0_PRV_BASE_ADDRESS1_0x00060005</scomRegister>
-    <scomRegister>PORE_GPE0_OCI_BASE_ADDRESS0_0x00060006</scomRegister>
-    <scomRegister>PORE_GPE0_OCI_BASE_ADDRESS1_0x00060007</scomRegister>
-    <scomRegister>PORE_GPE0_TABLE_BASE_ADDR_0x00060008</scomRegister>
-    <scomRegister>PORE_GPE0_EXE_TRIGGER_0x00060009</scomRegister>
-    <scomRegister>PORE_GPE0_SCRATCH0_0x0006000A</scomRegister>
-    <scomRegister>PORE_GPE0_SCRATCH1_0x0006000B</scomRegister>
-    <scomRegister>PORE_GPE0_SCRATCH2_0x0006000C</scomRegister>
-    <scomRegister>PORE_GPE0_IBUF_01_0x0006000D</scomRegister>
-    <scomRegister>PORE_GPE0_IBUF_2_0x0006000E</scomRegister>
-    <scomRegister>PORE_GPE0_DBG0_0x0006000F</scomRegister>
-    <scomRegister>PORE_GPE0_DBG1_0x00060010</scomRegister>
-    <scomRegister>PORE_GPE0_PC_STACK0_0x00060011</scomRegister>
-    <scomRegister>PORE_GPE0_PC_STACK1_0x00060012</scomRegister>
-    <scomRegister>PORE_GPE0_PC_STACK2_0x00060013</scomRegister>
-    <scomRegister>PORE_GPE0_ID_FLAGS_0x00060014</scomRegister>
-    <scomRegister>PORE_GPE0_DATA0_0x00060015</scomRegister>
-    <scomRegister>PORE_GPE0_MEMORY_RELOC_0x00060016</scomRegister>  
-    <scomRegister>PORE_GPE1_STATUS_0x00060020</scomRegister>
-    <scomRegister>PORE_GPE1_CONTROL_0x00060021</scomRegister>
-    <scomRegister>PORE_GPE1_RESET_0x00060022</scomRegister>
-    <scomRegister>PORE_GPE1_ERROR_MASK_0x00060023</scomRegister>
-    <scomRegister>PORE_GPE1_PRV_BASE_ADDRESS0_0x00060024</scomRegister>
-    <scomRegister>PORE_GPE1_PRV_BASE_ADDRESS1_0x00060025</scomRegister>
-    <scomRegister>PORE_GPE1_OCI_BASE_ADDRESS0_0x00060026</scomRegister>
-    <scomRegister>PORE_GPE1_OCI_BASE_ADDRESS1_0x00060027</scomRegister>
-    <scomRegister>PORE_GPE1_TABLE_BASE_ADDR_0x00060028</scomRegister>
-    <scomRegister>PORE_GPE1_EXE_TRIGGER_0x00060029</scomRegister>
-    <scomRegister>PORE_GPE1_SCRATCH0_0x0006002A</scomRegister>
-    <scomRegister>PORE_GPE1_SCRATCH1_0x0006002B</scomRegister>
-    <scomRegister>PORE_GPE1_SCRATCH2_0x0006002C</scomRegister>
-    <scomRegister>PORE_GPE1_IBUF_01_0x0006002D</scomRegister>
-    <scomRegister>PORE_GPE1_IBUF_2_0x0006002E</scomRegister>
-    <scomRegister>PORE_GPE1_DBG0_0x0006002F</scomRegister>
-    <scomRegister>PORE_GPE1_DBG1_0x00060030</scomRegister>
-    <scomRegister>PORE_GPE1_PC_STACK0_0x00060031</scomRegister>
-    <scomRegister>PORE_GPE1_PC_STACK1_0x00060032</scomRegister>
-    <scomRegister>PORE_GPE1_PC_STACK2_0x00060033</scomRegister>
-    <scomRegister>PORE_GPE1_ID_FLAGS_0x00060034</scomRegister>
-    <scomRegister>PORE_GPE1_DATA0_0x00060035</scomRegister>
-    <scomRegister>PORE_GPE1_MEMORY_RELOC_0x00060036</scomRegister>    
-  </registerFfdc>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_ocb_init_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_ocb_init_errors.xml
deleted file mode 100644
index ea80f8eaa..000000000
--- a/src/usr/hwpf/hwp/runtime_errors/p8_ocb_init_errors.xml
+++ /dev/null
@@ -1,61 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_ocb_init_errors.xml $      -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_ocb_init_errors.xml,v 1.3 2013/05/23 18:44:07 stillgs Exp $ -->
-<!-- Error definitions for p8_ocb_init procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCBINIT_BAD_MODE</rc>
-    <description>Unknown mode passed to p8_ocb_init.</description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCBINIT_BAD_Q_LENGTH_PARM</rc>
-    <description>Bad Queue Length Passed to p8_ocb_init.</description>
-  </hwpError>  
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCBINIT_BAD_ITP_TYPE_PARM</rc>
-    <description>Bad Interrupt Type Passed to p8_ocb_init.</description>
-  </hwpError>    
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCBINIT_BAD_Q_OVER_UNDERFLOW_PARM</rc>
-    <description>Bad Queue Over/Underflow Enable Passed to p8_ocb_init.</description>
-  </hwpError>  
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCBINIT_BAD_CHAN_NUM_PARM</rc>
-    <description>Bad Channel Number Passed to p8_ocb_init.</description>
-  </hwpError>    
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCBINIT_BAD_CHAN_TYPE_PARM</rc>
-    <description>Bad Channel Type Passed to p8_ocb_init.</description>
-  </hwpError>    
-   <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCBINIT_BAD_CHAN3_TYPE_PARM</rc>
-    <description>Bad Channel Type for Channel3 Passed to p8_ocb_init.</description>
-  </hwpError>       
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_occ_control_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_occ_control_errors.xml
deleted file mode 100644
index 60972e379..000000000
--- a/src/usr/hwpf/hwp/runtime_errors/p8_occ_control_errors.xml
+++ /dev/null
@@ -1,39 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_occ_control_errors.xml $   -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_occ_control_errors.xml,v 1.3 2013/08/13 18:15:45 jimyac Exp $ -->
-<!-- Error definitions for p8_occ_control procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCC_CONTROL_BAD_405RESET_PARM</rc>
-    <description>Bad Parm value for i_ppc405_reset_ctrl passed to p8_occ_control.</description>
-    <ffdc>RESET_PARM</ffdc>
-  </hwpError>  
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCC_CONTROL_BAD_405BOOT_PARM</rc>
-    <description>Bad Parm value for i_ppc405_boot_ctrl passed to p8_occ_control.</description>
-    <ffdc>BOOT_PARM</ffdc>
-  </hwpError>    
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_occ_sram_init_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_occ_sram_init_errors.xml
deleted file mode 100644
index 2e77fd35d..000000000
--- a/src/usr/hwpf/hwp/runtime_errors/p8_occ_sram_init_errors.xml
+++ /dev/null
@@ -1,32 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_occ_sram_init_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_occ_sram_init_errors.xml,v 1.3 2013/08/13 18:15:47 jimyac Exp $ -->
-<!-- Error definitions for p8_occ_sram_init procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCCSRAM_CODE_BAD_MODE</rc>
-    <description>Unknown mode passed to p8_occ_sram_init. </description>
-    <ffdc>MODE</ffdc>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_oha_init_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_oha_init_errors.xml
deleted file mode 100644
index 72ab1c0ee..000000000
--- a/src/usr/hwpf/hwp/runtime_errors/p8_oha_init_errors.xml
+++ /dev/null
@@ -1,43 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_oha_init_errors.xml $      -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_oha_init_errors.xml,v 1.3 2013/05/23 18:44:14 stillgs Exp $ -->
-<!-- Error definitions for proc_oha_init procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_OHA_CODE_PUTGETSCOM_FAILED</rc>
-    <description>Register read/write failed in proc_oha_init.</description>
-    <ffdc>ERRORS</ffdc>    
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_OHA_CODE_BAD_MODE</rc>
-    <description>Unknown mode passed to proc_oha_init.</description>
-  </hwpError>
-  <!-- *********************************************************************** -->  
-  <hwpError>
-    <rc>RC_PROC_OHA_CODE_BITOP_FAILED</rc>
-    <description>Bit operation failed in proc_oha_init.</description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_pba_init_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_pba_init_errors.xml
deleted file mode 100644
index 6b997e67a..000000000
--- a/src/usr/hwpf/hwp/runtime_errors/p8_pba_init_errors.xml
+++ /dev/null
@@ -1,138 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_pba_init_errors.xml $      -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-
-<!-- $Id: p8_pba_init_errors.xml,v 1.7 2014/03/17 23:14:22 stillgs Exp $ -->
-<!-- Error definitions for p8_pba_init procedure -->
-<hwpErrors>
-    <registerFfdc>
-        <id>REG_FFDC_PROC_PBA_REGISTERS</id>
-        <scomRegister>PBA_MODE_0x00064000</scomRegister>
-        <scomRegister>PBA_CONFIG_0x0201084B</scomRegister>
-        <scomRegister>PBA_SLVCTL2_0x00064006</scomRegister>
-        <scomRegister>PBA_SLVCTL0_0x00064004</scomRegister>
-        <scomRegister>PBA_SLVCTL1_0x00064005</scomRegister>
-        <scomRegister>PBA_SLVCTL2_0x00064006</scomRegister>
-        <scomRegister>PBA_SLVCTL3_0x00064007</scomRegister>
-        <scomRegister>PBA_FIR_0x02010840</scomRegister>
-        <scomRegister>PBA_ERR_RPT0_0x0201084C</scomRegister>
-        <scomRegister>PBA_ERR_RPT1_0x0201084D</scomRegister>
-        <scomRegister>PBA_ERR_RPT2_0x0201084E</scomRegister>
-        <scomRegister>PBA_BCDE_CTL_0x00064010</scomRegister>
-        <scomRegister>PBA_BCDE_SET_0x00064011</scomRegister>
-        <scomRegister>PBA_BCDE_STAT_0x00064012</scomRegister>
-        <scomRegister>PBA_BCDE_PBADR_0x00064013</scomRegister>
-        <scomRegister>PBA_BCDE_OCIBAR_0x00064014</scomRegister>
-        <scomRegister>PBA_BCUE_CTL_0x00064015</scomRegister>
-        <scomRegister>PBA_BCUE_SET_0x00064016</scomRegister>
-        <scomRegister>PBA_BCUE_STAT_0x00064017</scomRegister>
-        <scomRegister>PBA_BCUE_PBADR_0x00064018</scomRegister>
-        <scomRegister>PBA_BCUE_OCIBAR_0x00064019</scomRegister>
-        <scomRegister>PBA_PBOCR0_0x00064020</scomRegister>
-        <scomRegister>PBA_PBOCR1_0x00064021</scomRegister>
-        <scomRegister>PBA_PBOCR2_0x00064022</scomRegister>
-        <scomRegister>PBA_PBOCR3_0x00064023</scomRegister>
-        <scomRegister>PBA_PBOCR4_0x00064024</scomRegister>
-        <scomRegister>PBA_BAR0_0x02013F00</scomRegister>
-        <scomRegister>PBA_BARMSK0_0x02013F04</scomRegister>
-        <scomRegister>PBA_BAR1_0x02013F01</scomRegister>
-        <scomRegister>PBA_BARMSK1_0x02013F05</scomRegister>
-        <scomRegister>PBA_BAR2_0x02013F02</scomRegister>
-        <scomRegister>PBA_BARMSK2_0x02013F06</scomRegister>
-        <scomRegister>PBA_BAR3_0x02013F03</scomRegister>
-        <scomRegister>PBA_BARMSK3_0x02013F07</scomRegister>
-        <scomRegister>PBA_TRUSTMODE_0x02013F08</scomRegister>
-    </registerFfdc>
-    <!-- *********************************************************************** -->
-    <hwpError>
-        <rc>RC_PMPROC_PBA_INIT_INCORRECT_MODE</rc>
-        <description>pba init procedure incorrect mode by calling function</description>
-        <ffdc>PM_MODE</ffdc>
-        <callout>
-            <procedure>CODE</procedure>
-            <priority>HIGH</priority>
-        </callout>
-    </hwpError>
-    <!-- *********************************************************************** -->
-    <hwpError>
-        <rc>RC_PMPROC_PBA_SLAVE_RESET_TIMEOUT</rc>
-        <description>pba_init timed out waited for the PBA slave to reset.</description>
-        <ffdc>POLLCOUNT</ffdc>
-        <ffdc>SLAVENUM</ffdc>
-        <ffdc>PBASLVREG</ffdc>
-        <collectRegisterFfdc>
-            <id>REG_FFDC_PROC_PBA_REGISTERS</id>
-            <target>CHIP</target>
-        </collectRegisterFfdc>
-        <callout>
-            <target>CHIP</target>
-            <priority>HIGH</priority>
-        </callout>
-    </hwpError>
-    <!-- *********************************************************************** -->
-    <hwpError>
-        <rc>RC_PMPROC_PBA_SLAVE_BUSY_AFTER_RESET</rc>
-        <description>pba_init detected a busy PBA slave after the slave was reset.</description>
-        <ffdc>POLLCOUNT</ffdc>
-        <ffdc>SLAVENUM</ffdc>
-        <ffdc>PBASLVREG</ffdc>
-        <collectRegisterFfdc>
-            <id>REG_FFDC_PROC_PBA_REGISTERS</id>
-            <target>CHIP</target>
-        </collectRegisterFfdc>
-        <callout>
-            <target>CHIP</target>
-            <priority>HIGH</priority>
-        </callout>
-    </hwpError>
-    <!-- *********************************************************************** -->
-    <hwpError>
-        <rc>RC_PROCPM_PBA_BCDE_STOP_TIMEOUT</rc>
-        <description>pba_init timed out waiting to stop the Block Copy Download Engine.</description>
-        <ffdc>POLLCOUNT</ffdc>
-        <ffdc>POLLVALUE</ffdc>
-        <collectRegisterFfdc>
-            <id>REG_FFDC_PROC_PBA_REGISTERS</id>
-            <target>CHIP</target>
-        </collectRegisterFfdc>
-        <callout>
-            <target>CHIP</target>
-            <priority>HIGH</priority>
-        </callout>
-    </hwpError>
-    <!-- *********************************************************************** -->
-    <hwpError>
-        <rc>RC_PROCPM_PBA_BCUE_STOP_TIMEOUT</rc>
-        <description>pba_init timed out waiting to stop the Block Copy Upload Engine.</description>
-        <ffdc>POLLCOUNT</ffdc>
-        <ffdc>POLLVALUE</ffdc>
-        <collectRegisterFfdc>
-            <id>REG_FFDC_PROC_PBA_REGISTERS</id>
-            <target>CHIP</target>
-        </collectRegisterFfdc>
-        <callout>
-            <target>CHIP</target>
-            <priority>HIGH</priority>
-        </callout>
-    </hwpError>
-    <!-- *********************************************************************** -->
-</hwpErrors>
\ No newline at end of file
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_pcbs_init_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_pcbs_init_errors.xml
deleted file mode 100644
index fb58ea907..000000000
--- a/src/usr/hwpf/hwp/runtime_errors/p8_pcbs_init_errors.xml
+++ /dev/null
@@ -1,51 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_pcbs_init_errors.xml $     -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2014                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_pcbs_init_errors.xml,v 1.9 2014/10/10 02:01:53 cmolsen Exp $ -->
-<!-- Error definitions for proc_pcbs_init procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_PCBS_CODE_SAFE_FSM_TIMEOUT</rc>
-    <description>Psafe Pstate and FSM-stable timeout in proc_pcbs_init.</description>
-    <ffdc>LOOPCOUNT</ffdc>
-    <ffdc>PMSR</ffdc>
-    <ffdc>PCBSPM_MON1</ffdc>
-    <ffdc>PCBSPM_MON2</ffdc>
-    <ffdc>PMGP0</ffdc>
-    <ffdc>PMGP1</ffdc>
-    <ffdc>PMERR</ffdc>
-    <ffdc>IVRM_CTRL</ffdc>
-    <ffdc>IVRM_VAL</ffdc>
-    <ffdc>PCBSMODE</ffdc>
-    <callout><target>PROC_CHIP</target><priority>HIGH</priority></callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_PCBS_CODE_BAD_MODE</rc>
-    <description>Unknown mode passed to proc_pcbs_init.</description>
-    <ffdc>MODE</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_pm_prep_for_reset_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_pm_prep_for_reset_errors.xml
deleted file mode 100644
index 76209516d..000000000
--- a/src/usr/hwpf/hwp/runtime_errors/p8_pm_prep_for_reset_errors.xml
+++ /dev/null
@@ -1,48 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_pm_prep_for_reset_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_pm_prep_for_reset_errors.xml,v 1.6 2013-10-15 17:29:30 dcrowell Exp $ -->
-<!-- Error definitions for p8_pm_prep_for_reset procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PREP_UNSUPPORTED_MODE_ERR</rc>
-    <description>Mode parameter value not supported</description>
-    <ffdc>MODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PREP_TARGET_ERR</rc>
-    <description>Primary target must be set to a valid value in the SCM case.</description>
-    <ffdc>PRIMARY_TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->  
-</hwpErrors>
-
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_pmc_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_pmc_errors.xml
deleted file mode 100644
index 1c29b1fbb..000000000
--- a/src/usr/hwpf/hwp/runtime_errors/p8_pmc_errors.xml
+++ /dev/null
@@ -1,208 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_pmc_errors.xml $           -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_pmc_errors.xml,v 1.10 2014/03/10 15:04:05 stillgs Exp $ -->
-<!-- Error definitions for proc_pmc_init and proc_pm_init procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PMC_CODE_BAD_MODE</rc>
-    <description>Unknown mode passed to proc_pmc_init.</description>
-    <ffdc>MODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PMCINIT_TIMEOUT</rc>
-    <description>time out in polling some register condition.</description>
-    <callout>
-      <procedure>CHIP_IN_ERROR</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PMCRESET_SPIVID_CONFIG_ERROR</rc>
-    <description>Master target does not have SPIVID ports enabled: check the configuration setup.</description>
-    <ffdc>MASTER_TARGET</ffdc>
-    <ffdc>ATTR_SPIVID_PORT_ENABLE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PMCRESET_SCM_INSTALL_ERROR</rc>
-    <description>Error found in DCM installment attribute settings for the SCM case.</description>
-    <ffdc>MASTER_TARGET</ffdc>
-    <ffdc>SLAVE_TARGET</ffdc>
-    <ffdc>DCM_INSTALLED_1</ffdc>
-    <ffdc>DCM_INSTALLED_2</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PMCRESET_DCM_INSTALL_ERROR</rc>
-    <description>Error found in DCM installment attribute settings.</description>
-    <ffdc>MASTER_TARGET</ffdc>
-    <ffdc>SLAVE_TARGET</ffdc>
-    <ffdc>DCM_INSTALLED_1</ffdc>
-    <ffdc>DCM_INSTALLED_2</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PMC_MASTER_CONFIG_ERROR</rc>
-    <description>MasterPMC bit of Master PMC is not set.</description>
-    <ffdc>MASTERPMCMODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PMC_SLAVE_CONFIG_ERROR</rc>
-    <description>MasterPMC bit of Slave PMC is not set.</description>
-    <ffdc>SLAVEPMCMODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PMC_INTERCHIP_CONFIG_ERROR</rc>
-    <description>Master is enabled with interchip interface but slave is not.</description>
-    <ffdc>MASTERPMCMODE</ffdc>
-    <ffdc>SLAVEPMCMODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PMC_FW_MODE_ERROR</rc>
-    <description>Master is enabled with FW pstate mode but slave is not </description>
-    <ffdc>MASTERPMCMODE</ffdc>
-    <ffdc>SLAVEPMCMODE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-   <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PMCRESET_IDLE_ERROR</rc>
-    <description>PMC Idle halt errors exist.  OCC recovery cannot proceed.</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>PORR</ffdc>
-    <ffdc>PMCSTATUS</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PMCRESET_IDLE_TIMEOUT_ERROR</rc>
-    <description>Timed out in polling for Idle to Halt. OCC recovery cannot proceed </description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>PORR</ffdc>
-    <ffdc>PMCSTATUS</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PMCRESET_SPIVID_TIMEOUT_ERROR</rc>
-    <description>Timed out in polling for SPIVID controller to Halt. OCC reset is suspious but carried out</description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_SPIVID_REGISTERS</id>
-      <target>TARGET</target>
-    </collectRegisterFfdc>
-    <!-- No callout as this only logs data for use if the PMC reset (part of the OCC reset) actually fails -->
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PMCRESET_INTCHP_TIMEOUT_ERROR</rc>
-    <description>Timed out in polling for InterChip Interface to Halt. OCC reset is suspious but carried out</description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PSTATE_REGISTERS</id>
-      <id>REG_FFDC_SPIVID_REGISTERS</id>
-      <target>THISTARGET</target>
-    </collectRegisterFfdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PSTATE_REGISTERS</id>
-      <id>REG_FFDC_SPIVID_REGISTERS</id>
-      <target>DCMTARGET</target>
-    </collectRegisterFfdc>
-    <!-- No callout as this only logs data for use if the PMC reset (part of the OCC reset) actually fails -->
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PMCRESET_O2P_TIMEOUT_ERROR</rc>
-    <description>Timed out in polling for OCI to PIB Bridge to Halt. OCC reset is suspious but carried out</description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>O2PSTATUS</ffdc>
-    <!-- No callout as this only logs data for use if the PMC reset (part of the OCC reset) actually fails -->
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PMCINIT_SCM_INSTALL_ERROR</rc>
-    <description>Error found in DCM installment attribute settings for the SCM case in the PMC INIT phase..</description>
-    <ffdc>MASTER_TARGET</ffdc>
-    <ffdc>SLAVE_TARGET</ffdc>
-    <ffdc>DCM_INSTALLED_1</ffdc>
-    <ffdc>DCM_INSTALLED_2</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PMCINIT_DCM_INSTALL_ERROR</rc>
-    <description>Error found in DCM installment attribute settings in the PMC INIT phase.</description>
-    <ffdc>MASTER_TARGET</ffdc>
-    <ffdc>SLAVE_TARGET</ffdc>
-    <ffdc>DCM_INSTALLED_1</ffdc>
-    <ffdc>DCM_INSTALLED_2</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_poregpe_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_poregpe_errors.xml
deleted file mode 100644
index 2df46ba1c..000000000
--- a/src/usr/hwpf/hwp/runtime_errors/p8_poregpe_errors.xml
+++ /dev/null
@@ -1,64 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_poregpe_errors.xml $       -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_poregpe_errors.xml,v 1.4 2013-10-15 17:36:07 dcrowell Exp $ -->
-<!-- Error definitions for proc_poregpe procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_GPE_RESET_TIMEOUT</rc>
-    <description>GPE reset failed in proc_poregpe_init.</description>
-    <ffdc>POLLCOUNT</ffdc>
-    <ffdc>MAXPOLLS</ffdc>
-    <ffdc>IENGINE</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_GPE_REGISTERS</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>  
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_GPE_CODE_BAD_MODE</rc>
-    <description>Unknown mode passed to proc_poregpe_init.</description>
-    <ffdc>IMODE</ffdc>
-    <ffdc>CHIP</ffdc>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_GPE_BAD_ENGINE</rc>
-    <description>Unknown engine passed to proc_poregpe_init. </description>
-    <ffdc>IENGINE</ffdc>
-    <ffdc>CHIP</ffdc>
-    <callout>
-      <procedure>CODE</procedure>      
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_pss_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_pss_errors.xml
deleted file mode 100644
index 31d53ce64..000000000
--- a/src/usr/hwpf/hwp/runtime_errors/p8_pss_errors.xml
+++ /dev/null
@@ -1,64 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_pss_errors.xml $           -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_pss_errors.xml,v 1.6 2013-10-17 19:22:08 dcrowell Exp $ -->
-<!-- Error definitions for proc_pss_init procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSS_CODE_BAD_MODE</rc>
-    <description>Unknown mode passed to proc_pss_init.</description>
-    <ffdc>IMODE</ffdc>
-    <ffdc>CHIP</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError> 
-   <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSS_ADC_ERROR</rc>
-    <description>SPIADC error bit asserted waiting for operation to complete.</description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_PSS_REGISTERS</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>   
-  </hwpError> 
-   <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PSS_P2S_ERROR</rc>
-    <description>SPIP2S error bit asserted waiting for operation to complete.</description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_PSS_REGISTERS</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>   
-  </hwpError> 
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_pss_registers.xml b/src/usr/hwpf/hwp/runtime_errors/p8_pss_registers.xml
deleted file mode 100644
index ef8a03a92..000000000
--- a/src/usr/hwpf/hwp/runtime_errors/p8_pss_registers.xml
+++ /dev/null
@@ -1,49 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_pss_registers.xml $        -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_pss_registers.xml,v 1.1 2013/10/08 15:45:12 stillgs Exp $ -->
-<!-- Definition of PSS registers to collect on some errors -->
-<hwpErrors>
-  <registerFfdc>
-    <id>REG_FFDC_PROC_PSS_REGISTERS</id>
-    <scomRegister>SPIPSS_ADC_CTRL_REG0_0x00070000</scomRegister>  
-    <scomRegister>SPIPSS_ADC_CTRL_REG1_0x00070001</scomRegister>  
-    <scomRegister>SPIPSS_ADC_CTRL_REG2_0x00070002</scomRegister>  
-    <scomRegister>SPIPSS_ADC_STATUS_REG_0x00070003</scomRegister>  
-    <scomRegister>SPIPSS_ADC_CMD_REG_0x00070004</scomRegister>  
-    <scomRegister>SPIPSS_ADC_WDATA_REG_0x00070010</scomRegister>  
-    <scomRegister>SPIPSS_ADC_RDATA_REG0_0x00070020</scomRegister>  
-    <scomRegister>SPIPSS_ADC_RDATA_REG1_0x00070021</scomRegister>  
-    <scomRegister>SPIPSS_ADC_RDATA_REG2_0x00070022</scomRegister>  
-    <scomRegister>SPIPSS_ADC_RDATA_REG3_0x00070023</scomRegister>  
-    <scomRegister>SPIPSS_100NS_REG_0x00070028</scomRegister>  
-    <scomRegister>SPIPSS_P2S_CTRL_REG0_0x00070040</scomRegister>  
-    <scomRegister>SPIPSS_P2S_CTRL_REG1_0x00070041</scomRegister>  
-    <scomRegister>SPIPSS_P2S_CTRL_REG2_0x00070042</scomRegister>  
-    <scomRegister>SPIPSS_P2S_STATUS_REG_0x00070043</scomRegister>  
-    <scomRegister>SPIPSS_P2S_COMMAND_REG_0x00070044</scomRegister>  
-    <scomRegister>SPIPSS_P2S_WDATA_REG_0x00070050</scomRegister>  
-    <scomRegister>SPIPSS_P2S_RDATA_REG_0x00070060</scomRegister>  
-    <scomRegister>SPIPSS_ADC_RESET_REGISTER_0x00070005</scomRegister>  
-    <scomRegister>SPIPSS_P2S_RESET_REGISTER_0x00070045</scomRegister>  
-  </registerFfdc>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_pstate_registers.xml b/src/usr/hwpf/hwp/runtime_errors/p8_pstate_registers.xml
deleted file mode 100644
index c6ef7a5f7..000000000
--- a/src/usr/hwpf/hwp/runtime_errors/p8_pstate_registers.xml
+++ /dev/null
@@ -1,99 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_pstate_registers.xml $     -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2014                   -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_pstate_registers.xml,v 1.3 2014/03/05 21:03:14 stillgs Exp $ -->
-<!-- Definition of PMC registers to collect on some errors -->
-<hwpErrors>
-  <registerFfdc>
-    <id>REG_FFDC_PSTATE_REGISTERS</id>
-    <scomRegister>PMC_STATUS_REG_0x00062009</scomRegister>
-    <scomRegister>PMC_LFIR_0x01010840</scomRegister> 
-    <scomRegister>PMC_LFIR_MASK_0x01010843</scomRegister> 
-    <scomRegister>PMC_MODE_REG_0x00062000</scomRegister> 
-    <scomRegister>PMC_PSTATE_MONITOR_AND_CTRL_REG_0x00062002</scomRegister> 
-    <scomRegister>PMC_RAIL_BOUNDS_0x00062003</scomRegister> 
-    <scomRegister>PMC_PARAMETER_REG0_0x00062005</scomRegister> 
-    <scomRegister>PMC_PARAMETER_REG1_0x00062006</scomRegister> 
-    <scomRegister>PMC_EFF_GLOBAL_ACTUAL_VOLTAGE_REG_0x00062007</scomRegister> 
-    <scomRegister>PMC_INTCHP_CTRL_REG1_0x00062010</scomRegister> 
-    <scomRegister>PMC_INTCHP_CTRL_REG4_0x00062012</scomRegister> 
-    <scomRegister>PMC_INTCHP_STATUS_REG_0x00062013</scomRegister> 
-    <scomRegister>PMC_INTCHP_PSTATE_REG_0x00062017</scomRegister> 
-    <scomRegister>PMC_INTCHP_COMMAND_REG_0x00062014</scomRegister> 
-  </registerFfdc>
-  <registerFfdc>
-    <id>REG_FFDC_O2S_REGISTERS</id>
-    <scomRegister>PMC_O2S_CTRL_REG0A_0x00062050</scomRegister>
-    <scomRegister>PMC_O2S_CTRL_REG0B_0x00062051</scomRegister>
-    <scomRegister>PMC_O2S_CTRL_REG1_0x00062052</scomRegister>
-    <scomRegister>PMC_O2S_CTRL_REG2_0x00062053</scomRegister>
-    <scomRegister>PMC_O2S_CTRL_REG4_0x00062055</scomRegister>
-    <scomRegister>PMC_O2S_STATUS_REG_0x00062056</scomRegister>
-    <scomRegister>PMC_O2S_COMMAND_REG_0x00062057</scomRegister>
-    <scomRegister>PMC_O2S_WDATA_REG_0x00062058</scomRegister>
-    <scomRegister>PMC_O2S_RDATA_REG_0x00062059</scomRegister>    
-  </registerFfdc>
-  <registerFfdc>
-    <id>REG_FFDC_SPIVID_REGISTERS</id>
-    <scomRegister>PMC_SPIV_CTRL_REG0A_0x00062040</scomRegister> 
-    <scomRegister>PMC_SPIV_CTRL_REG0B_0x00062041</scomRegister> 
-    <scomRegister>PMC_SPIV_CTRL_REG1_0x00062042</scomRegister>  
-    <scomRegister>PMC_SPIV_CTRL_REG2_0x00062043</scomRegister>  
-    <scomRegister>PMC_SPIV_CTRL_REG3_0x00062044</scomRegister>  
-    <scomRegister>PMC_SPIV_CTRL_REG4_0x00062045</scomRegister>  
-    <scomRegister>PMC_SPIV_STATUS_REG_0x00062046</scomRegister> 
-    <scomRegister>PMC_SPIV_COMMAND_REG_0x00062047</scomRegister>
-  </registerFfdc>
-  <registerFfdc>
-    <id>REG_FFDC_PCBS_PSSTATE_REGISTERS</id> 
-    <scomRegister>EX_DPLL_CPM_PARM_REG_0x100F0152</scomRegister>
-    <scomRegister>EX_PCBS_POWER_MANAGEMENT_STATUS_REG_0x100F0153</scomRegister>
-    <scomRegister>EX_PCBS_iVRM_Control_Status_Reg_0x100F0154</scomRegister>
-    <scomRegister>EX_PCBS_iVRM_Value_Setting_Reg_0x100F0155</scomRegister>
-    <scomRegister>EX_PCBSPM_MODE_REG_0x100F0156</scomRegister>
-    <scomRegister>EX_PCBS_iVRM_PFETSTR_Sense_Reg_0x100F0157</scomRegister>
-    <scomRegister>EX_PCBS_Power_Management_Idle_Control_Reg_0x100F0158</scomRegister>
-    <scomRegister>EX_PCBS_Power_Management_Control_Reg_0x100F0159</scomRegister>
-    <scomRegister>EX_PCBS_PMC_VF_CTRL_REG_0x100F015A</scomRegister>
-    <scomRegister>EX_PCBS_UNDERVOLTING_REG_0x100F015B</scomRegister>
-    <scomRegister>EX_PCBS_Pstate_Index_Bound_Reg_0x100F015C</scomRegister>
-    <scomRegister>EX_PCBS_Power_Management_Bounds_Reg_0x100F015D</scomRegister>
-    <scomRegister>EX_PCBS_PSTATE_TABLE_CTRL_REG_0x100F015E</scomRegister>
-    <scomRegister>EX_PCBS_PSTATE_TABLE_REG_0x100F015F</scomRegister>
-    <scomRegister>EX_PCBS_Pstate_Step_Target_Register_0x100F0160</scomRegister>
-    <scomRegister>EX_PCBS_iVRM_VID_Control_Reg0_0x100F0162</scomRegister>
-    <scomRegister>EX_PCBS_DPLL_STATUS_REG_100F0161</scomRegister>
-    <scomRegister>EX_PCBS_iVRM_VID_Control_Reg1_0x100F0163</scomRegister>
-    <scomRegister>EX_PCBS_Resonant_Clock_Control_Reg0_0x100F0165</scomRegister>
-    <scomRegister>EX_PCBS_Resonant_Clock_Control_Reg1_0x100F0166</scomRegister>
-    <scomRegister>EX_PCBS_Resonant_Clock_Status_Reg_0x100F0167</scomRegister>
-    <scomRegister>EX_PCBS_FSM_MONITOR1_REG_0x100F0170</scomRegister>
-    <scomRegister>EX_PCBS_FSM_MONITOR2_REG_0x100F0171</scomRegister>
-  </registerFfdc>
-  <registerFfdc>
-    <id>REG_FFDC_PCBS_PSSTATE_MONITOR_REGISTERS</id> 
-    <scomRegister>EX_DPLL_CPM_PARM_REG_0x100F0152</scomRegister>
-    <scomRegister>EX_PCBS_PMC_VF_CTRL_REG_0x100F015A</scomRegister>
-    <scomRegister>EX_PCBS_FSM_MONITOR1_REG_0x100F0170</scomRegister>
-    <scomRegister>EX_PCBS_FSM_MONITOR2_REG_0x100F0171</scomRegister>
-  </registerFfdc>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/proc_cpu_special_wakeup_errors.xml b/src/usr/hwpf/hwp/runtime_errors/proc_cpu_special_wakeup_errors.xml
deleted file mode 100644
index 82ad73c7c..000000000
--- a/src/usr/hwpf/hwp/runtime_errors/proc_cpu_special_wakeup_errors.xml
+++ /dev/null
@@ -1,141 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_errors/proc_cpu_special_wakeup_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_cpu_special_wakeup_errors.xml,v 1.9 2014/03/10 21:36:58 stillgs Exp $ -->
-<!-- Error definitions for proc_cpu_special_wakeup procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_SPCWKUP_TIMEOUT</rc>
-    <description>Special wakeup to all EX chiplets timed out.</description>
-    <ffdc>I_OPERATION</ffdc>
-    <ffdc>EX</ffdc>
-    <ffdc>ENTITY</ffdc>
-    <ffdc>POLLCOUNT</ffdc>
-    <ffdc>PMGP0</ffdc>
-    <ffdc>SP_WKUP_REG_ADDRESS</ffdc>
-    <ffdc>SP_WKUP_REG_VALUE</ffdc>
-    <ffdc>HISTORY_ADDRESS</ffdc>
-    <ffdc>HISTORY_VALUE</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_SLW_PCBS_REGISTERS</id>
-      <target>EX_IN_ERROR</target>
-    </collectRegisterFfdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_SLW_REGISTERS</id>
-      <id>REG_FFDC_PROC_SLW_FIR_REGISTERS</id>
-      <id>REG_FFDC_PROC_SLW_PMC_REGISTERS</id>
-      <id>REG_FFDC_PROC_SLW_PBA_REGISTERS</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>EX_IN_ERROR</target>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_SPCWKUP_CODE_BAD_ENTITY</rc>
-    <description>An invalid entity (eg besides FSP, OCC, or PHYP ENUM) was passed to proc_cpu_special_wakeup</description>
-     <ffdc>I_ENTITY</ffdc>
-     <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_SPCWKUP_CODE_BAD_OP</rc>
-    <description>An invalid operation (eg besides Set or Clear ENUM) was passed to proc_cpu_special_wakeup</description>
-   <ffdc>I_OPERATION</ffdc>
-   <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_CHKSTOP</rc>
-    <description>Special_wakeup requested with the system checkstopped and ATTR_PM_SPWUP_IGNORE_XSTOP_FLAG not set</description>
-    <ffdc>PCBSINTRTYPE</ffdc>
-    <ffdc>ATTRIGNOREXSTOP</ffdc>
-    <ffdc>EX_TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_SPCWKUP_SLW_IN_CHKSTOP</rc>
-    <description>Special_wakeup requested to an EX chiplet in either Sleep or Winkle with the system checkstopped
-    Calling firmware will have to check for this return code to influence dump flow.  Note:  this is NOT a loggable error.
-    </description>
-    <ffdc>EX_TARGET</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-   <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_SPCWKUP_NOT_SET</rc>
-    <description>Special wake-up done is not set but a platform COUNT greater than 0 exists.  Hardware and code are out of sync.</description>
-    <ffdc>PMGP0</ffdc>
-    <ffdc>ENTITY_COUNT</ffdc>
-    <ffdc>I_ENTITY</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <target>EX_TARGET</target>
-      <priority>LOW</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_SPCWKUP_OHA_FLAG_SET_ON_EXIT</rc>
-    <description>Register read/write failed in proc_cpu_special_wakeup</description>
-    <ffdc>I_OPERATION</ffdc>
-    <ffdc>EX</ffdc>
-    <ffdc>ENTITY</ffdc>
-    <ffdc>PHYP_SPCWKUP_COUNT</ffdc>
-    <ffdc>FSP_SPCWKUP_COUNT</ffdc>
-    <ffdc>OCC_SPCWKUP_COUNT</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_SPCWKUP_INVALID_PMHISTORY</rc>
-    <description>Invalid PM History detected in proc_cpu_special_wakeup</description>
-    <ffdc>PMHIST</ffdc>
-    <callout>
-      <target>EX_IN_ERROR</target>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/proc_ocb_indir_access_errors.xml b/src/usr/hwpf/hwp/runtime_errors/proc_ocb_indir_access_errors.xml
deleted file mode 100644
index f402f952d..000000000
--- a/src/usr/hwpf/hwp/runtime_errors/proc_ocb_indir_access_errors.xml
+++ /dev/null
@@ -1,67 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/runtime_errors/proc_ocb_indir_access_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- Error definitions for proc_ocb_indir_access procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCB_ACCESS_PUT_SCOM</rc>
-    <description>Put to OCB indirect channel failed</description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCB_ACCESS_GET_SCOM</rc>
-    <description>Get from OCB indirect channel failed.</description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCB_ACCESS_LENGTH_CHECK</rc>
-    <description>Input length of data transfered via indirect channel did not match 
-    the output length</description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCB_ACCESS_CHANNEL</rc>
-    <description>Invalid OCB indirect channel passed to proc_ocb_indir_access. </description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCB_ACCESS_OP</rc>
-    <description>Invalid OCB indirect operation to proc_ocb_indir_access. </description>
-  </hwpError>
-   <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCB_PUT_DATA_LENGTH_ERROR</rc>
-    <description>No data passed for Put operation. </description>
-  </hwpError> <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCB_ACCESS_GET_BUFFER</rc>
-    <description>Get of OCB data reg had non-zero response code. </description>
-  </hwpError>
-   <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_OCB_PUT_DATA_POLL_NOT_FULL_ERROR</rc>
-    <description>Indicates that a timeout occured waiting for a push queue to be non-full
-    before writing data.  Is likely due to OCC firmware not pulling entries off of the 
-    queue in a timely manner. </description>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/sbe_centaur_init/cen_xip_customize_errors.xml b/src/usr/hwpf/hwp/sbe_centaur_init/cen_xip_customize_errors.xml
deleted file mode 100644
index 8d33b064b..000000000
--- a/src/usr/hwpf/hwp/sbe_centaur_init/cen_xip_customize_errors.xml
+++ /dev/null
@@ -1,102 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/sbe_centaur_init/cen_xip_customize_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: cen_xip_customize_errors.xml,v 1.4 2014/05/28 15:50:19 cmolsen Exp $ -->
-<!-- Error definitions for proc_slw_build procedure -->
-<hwpErrors>
-<!-- *********************************************************************** -->
-<hwpError>
-  <rc>RC_CEN_XIPC_UNSPECIFIED_IMAGE_ERR</rc>
-  <description>Unspecified image error. Check sbe_xip_image.h for meaning of local rcLoc.</description>
-  <ffdc>RC_LOCAL</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-<!-- *********************************************************************** -->
-<hwpError>
-  <rc>RC_CEN_XIPC_IMAGE_SIZE_MISMATCH</rc>
-  <description>Supplied image size differs from size in image header in MS.</description>
-  <ffdc>DATA_IMG_SIZE_INP</ffdc>
-  <ffdc>DATA_IMG_SIZE</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-<!-- *********************************************************************** -->
-<hwpError>
-  <rc>RC_CEN_XIPC_PLL_RING_SIZE_TOO_LARGE</rc>
-  <description>PLL ring size returned from attribute is too large.</description>
-  <ffdc>DATA_ATTRIBUTE_RING_SIZE</ffdc>
-  <ffdc>DATA_MAX_PLL_RING_SIZE</ffdc>
-  <ffdc>DATA_SIZE_OF_BUF1</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-<!-- *********************************************************************** -->
-<hwpError>
-  <rc>RC_CEN_XIPC_IMGBUILD_ERROR</rc>
-  <description>Local IMGBUILD_xyz error from non-FAPI image build routine. Check rcLoc code in p8_delta_scan_rw.h.</description>
-  <ffdc>RC_LOCAL</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-<!-- *********************************************************************** -->
-<hwpError>
-  <rc>RC_CEN_XIPC_PLL_RING_BLOCK_TOO_LARGE</rc>
-  <description>PLL ring block is too large.</description>
-  <ffdc>DATA_RING_BLOCK_SIZEOFTHIS</ffdc>
-  <ffdc>DATA_SIZE_OF_BUF1</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-<!-- *********************************************************************** -->
-<hwpError>
-  <rc>RC_CEN_XIPC_RING_BLOCK_ALIGN_ERROR</rc>
-  <description>Problem with WF PLL ring block alignment.</description>
-  <ffdc>DATA_RING_BLOCK_ENTRYOFFSET</ffdc>
-  <ffdc>DATA_RING_BLOCK_SIZEOFTHIS</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-<!-- *********************************************************************** -->
-<hwpError>
-  <rc>RC_CEN_XIPC_KEYWORD_NOT_FOUND_ERROR</rc>
-  <description>A keyword in the XIP image was not found.</description>
-  <ffdc>RC_LOCAL</ffdc>
-  <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-  </callout>
-</hwpError>
-<!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/scratch_attributes.xml b/src/usr/hwpf/hwp/scratch_attributes.xml
deleted file mode 100644
index 6bff77573..000000000
--- a/src/usr/hwpf/hwp/scratch_attributes.xml
+++ /dev/null
@@ -1,183 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/scratch_attributes.xml $                     -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2011,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!--
-    XML file specifying HWPF attributes.
-    These are scratch attributes that can be used by PLAT FW for  unit test.
-    They can also be used temporarily by a HWP while waiting for an official
-    attribute to be supported.
--->
-
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SCRATCH_UINT8_1</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Scratch uint8_t attribute.
-        Can be used by HWPs for testing.
-    </description>
-    <valueType>uint8</valueType>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SCRATCH_UINT8_2</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Scratch uint8_t attribute.
-        Can be used by HWPs for testing.
-    </description>
-    <valueType>uint8</valueType>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SCRATCH_UINT32_1</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Scratch uint32_t attribute.
-        Can be used by HWPs for testing.
-    </description>
-    <valueType>uint32</valueType>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SCRATCH_UINT32_2</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Scratch uint32_t attribute.
-        Can be used by HWPs for testing.
-    </description>
-    <valueType>uint32</valueType>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SCRATCH_UINT64_1</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Scratch uint64_t attribute.
-        Can be used by HWPs for testing.
-    </description>
-    <valueType>uint64</valueType>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SCRATCH_UINT64_2</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Scratch uint64_t attribute
-        Can be used by HWPs for testing.
-    </description>
-    <valueType>uint64</valueType>
-    <enum>VAL_A = 0, VAL_B = 5, VAL_C = 0xffffffffffffffff</enum>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SCRATCH_UINT8_ARRAY_1</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Scratch uint8_t[32] attribute.
-        Can be used by HWPs for testing.
-    </description>
-    <valueType>uint8</valueType>
-    <array>32</array>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SCRATCH_UINT8_ARRAY_2</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Scratch uint8_t[2][3][4] attribute.
-        Can be used by HWPs for testing.
-    </description>
-    <valueType>uint8</valueType>
-    <array>2 3 4</array>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SCRATCH_UINT32_ARRAY_1</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Scratch uint32_t[8] attribute.
-        Can be used by HWPs for testing.
-    </description>
-    <valueType>uint32</valueType>
-    <array>8</array>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SCRATCH_UINT32_ARRAY_2</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Scratch uint32_t[2][3] attribute.
-        Can be used by HWPs for testing.
-    </description>
-    <valueType>uint32</valueType>
-    <array>2,3</array>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SCRATCH_UINT64_ARRAY_1</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Scratch uint64_t[4] attribute.
-        Can be used by HWPs for testing.
-    </description>
-    <valueType>uint64</valueType>
-    <array>4</array>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SCRATCH_UINT64_ARRAY_2</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Scratch uint64_t[2][2] attribute.
-        Can be used by HWPs for testing.
-    </description>
-    <valueType>uint64</valueType>
-    <array> 2, 2 </array>
-    <enum>VAL_A = 0x0123456789abcdef, VAL_B = 0, VAL_C = 0xffffffffffffffff</enum>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_DUMMY_SCRATCH_PLAT_INIT_UINT8</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Dummy platInit uint8[1][3][5] attribute used for testing.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-    <array>1, 3, 5</array>
-  </attribute>
-</attributes>
diff --git a/src/usr/hwpf/hwp/secure_boot/proc_sbe_scan_service_errors.xml b/src/usr/hwpf/hwp/secure_boot/proc_sbe_scan_service_errors.xml
deleted file mode 100644
index 812cb87a6..000000000
--- a/src/usr/hwpf/hwp/secure_boot/proc_sbe_scan_service_errors.xml
+++ /dev/null
@@ -1,52 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/secure_boot/proc_sbe_scan_service_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2015                             -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_sbe_scan_service_errors.xml,v 1.2 2015/05/15 15:25:36 jmcgill Exp $ -->
-<!-- Halt codes for proc_sbe_scan_service -->
-<hwpErrors>
-  <!-- ******************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_SBE_SCAN_SERVICE_INVALID_OPERATION</rc>
-    <description>
-      Procedure: proc_sbe_scan_service
-      Invalid PLL configuration requested by caller.
-    </description>
-    <sbeError/>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_SBE_SCAN_SERVICE</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ******************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_SBE_SCAN_SERVICE</id>
-    <scomRegister>MBOX_SCRATCH_REG0_0x00050038</scomRegister>
-    <scomRegister>MBOX_SCRATCH_REG1_0x00050039</scomRegister>
-  </registerFfdc>
-  <!-- ******************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/secure_boot/proc_stop_sbe_scan_service_errors.xml b/src/usr/hwpf/hwp/secure_boot/proc_stop_sbe_scan_service_errors.xml
deleted file mode 100644
index 233d55424..000000000
--- a/src/usr/hwpf/hwp/secure_boot/proc_stop_sbe_scan_service_errors.xml
+++ /dev/null
@@ -1,87 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/secure_boot/proc_stop_sbe_scan_service_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2015                             -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_stop_sbe_scan_service_errors.xml,v 1.2 2015/07/27 00:49:30 jmcgill Exp $ -->
-<!-- Error definitions for proc_stop_sbe_scan_service procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_STOP_SBE_SCAN_SERVICE_SBE_NOT_STOPPED</rc>
-    <description>
-      Procedure: proc_stop_sbe_scan_service
-      The slave SBE is still running, when expected to be halted
-    </description>
-    <ffdc>TARGET</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
-      <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-      <target>TARGET</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>TARGET</target>
-      <priority>LOW</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_STOP_SBE_SCAN_SERVICE_SBE_BAD_HALT</rc>
-    <description>
-      Procedure: proc_stop_sbe_scan_service
-      The slave SBE is not halted at the correct istep/substep number
-    </description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>ISTEP_NUM</ffdc>
-    <ffdc>SUBSTEP_NUM</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
-      <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-      <target>TARGET</target>
-    </collectRegisterFfdc>
-    <deconfigure>
-      <target>TARGET</target>
-    </deconfigure>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_STOP_SBE_SCAN_SERVICE_UNEXPECTED_FINAL_STATE</rc>
-    <description>
-      Procedure: proc_stop_sbe_scan_service
-      SBE did not reahch acceptable final state
-    </description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>SBE_RUNNING</ffdc>
-    <ffdc>HALT_CODE</ffdc>
-    <ffdc>ISTEP_NUM</ffdc>
-    <ffdc>SUBSTEP_NUM</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
-      <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-      <target>TARGET</target>
-    </collectRegisterFfdc>
-    <deconfigure>
-      <target>TARGET</target>
-    </deconfigure>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_base_ffdc.xml b/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_base_ffdc.xml
deleted file mode 100644
index e52dcd870..000000000
--- a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_base_ffdc.xml
+++ /dev/null
@@ -1,137 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_base_ffdc.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2014,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_extract_pore_base_ffdc.xml,v 1.4 2015/04/22 14:14:58 jmcgill Exp $ -->
-<!-- Error definitions for proc_extract_pore_base_ffdc procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_PORE_BASE_FFDC</rc>
-    <description>
-      Base error code used to invoke PORE engine state FFDC logging function
-    </description>
-    <collectFfdc>proc_extract_pore_base_ffdc, pore_state, pore_sbe_state</collectFfdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_PORE_BASE_FFDC_ENGINE_STATE</rc>
-    <description>
-      PORE engine state collected on all SBE/SLW fails
-    </description>
-    <!-- target/engine type -->
-    <ffdc>CHIP</ffdc>
-    <ffdc>ENGINE</ffdc>
-    <ffdc>VIRTUAL</ffdc>
-    <!-- SBE/SLW vital state -->
-    <ffdc>PORE_VITAL_REG</ffdc>
-    <!-- PORE register state -->
-    <ffdc>PORE_STATUS_REG</ffdc>
-    <ffdc>PORE_CONTROL_REG</ffdc>
-    <ffdc>PORE_RESET_REG</ffdc>
-    <ffdc>PORE_ERR_MASK_REG</ffdc>
-    <ffdc>PORE_P0_REG</ffdc>
-    <ffdc>PORE_P1_REG</ffdc>
-    <ffdc>PORE_A0_REG</ffdc>
-    <ffdc>PORE_A1_REG</ffdc>
-    <ffdc>PORE_TBL_BASE_REG</ffdc>
-    <ffdc>PORE_EXE_TRIGGER_REG</ffdc>
-    <ffdc>PORE_CTR_REG</ffdc>
-    <ffdc>PORE_D0_REG</ffdc>
-    <ffdc>PORE_D1_REG</ffdc>
-    <ffdc>PORE_IBUF0_REG</ffdc>
-    <ffdc>PORE_IBUF1_REG</ffdc>
-    <ffdc>PORE_DEBUG0_REG</ffdc>
-    <ffdc>PORE_DEBUG1_REG</ffdc>
-    <ffdc>PORE_STACK0_REG</ffdc>
-    <ffdc>PORE_STACK1_REG</ffdc>
-    <ffdc>PORE_STACK2_REG</ffdc>
-    <ffdc>PORE_IDFLAGS_REG</ffdc>
-    <ffdc>PORE_SPRG0_REG</ffdc>
-    <ffdc>PORE_MRR_REG</ffdc>
-    <ffdc>PORE_I2CE0_REG</ffdc>
-    <ffdc>PORE_I2CE1_REG</ffdc>
-    <ffdc>PORE_I2CE2_REG</ffdc>
-    <!-- PORE engine PC -->
-    <ffdc>PORE_PC</ffdc>
-    <!-- RC associated with SBE/SLW halt point -->
-    <ffdc>PORE_RC</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_PORE_BASE_FFDC_SBE_WO_TP_DATA</rc>
-    <description>
-      SBE specific register FFDC to collect (via chip target) on all fails, exclude TP ring data
-    </description>
-    <ffdc>PNOR_ECCB_STATUS</ffdc>
-    <ffdc>SEEPROM_ECCB_STATUS</ffdc>
-    <ffdc>SOFT_ERROR_STATUS</ffdc>
-    <ffdc>ATTN_REPORTED</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
-      <id>REG_FFDC_PROC_MBOX_REGISTERS</id>
-      <id>REG_FFDC_PROC_CFAM_REGISTERS</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-  </hwpError>    
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_PORE_BASE_FFDC_SBE_W_TP_DATA</rc>
-    <description>
-      SBE specific register FFDC to collect (via chip target) on all fails, include TP ring data
-    </description>
-    <ffdc>PNOR_ECCB_STATUS</ffdc>
-    <ffdc>SEEPROM_ECCB_STATUS</ffdc>
-    <ffdc>SOFT_ERROR_STATUS</ffdc>
-    <ffdc>ATTN_REPORTED</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
-      <id>REG_FFDC_PROC_MBOX_REGISTERS</id>
-      <id>REG_FFDC_PROC_CFAM_REGISTERS</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <collectFfdc>proc_tp_collect_dbg_data, CHIP</collectFfdc>
-  </hwpError>    
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_PORE_BASE_FFDC_SLW</rc>
-    <description>
-      SLW specific register FFDC to collect (via chip target) on all fails
-    </description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_SLW_PBA_REGISTERS</id>
-      <id>REG_FFDC_PROC_SLW_FIR_REGISTERS</id>
-      <id>REG_FFDC_PROC_SLW_PMC_REGISTERS</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_SLW_PCBS_REGISTERS</id>
-      <basedOnPresentChildren>
-        <target>CHIP</target>
-        <childType>TARGET_TYPE_EX_CHIPLET</childType>
-        <childPosOffsetMultiplier>0x01000000</childPosOffsetMultiplier>
-      </basedOnPresentChildren>     
-    </collectRegisterFfdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_engine_state_errors.xml b/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_engine_state_errors.xml
deleted file mode 100644
index 711e5119e..000000000
--- a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_engine_state_errors.xml
+++ /dev/null
@@ -1,93 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_engine_state_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2014                             -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_extract_pore_engine_state_errors.xml,v 1.2 2014/07/24 03:11:21 jmcgill Exp $ $ -->
-<!-- Error definitions for proc_extract_pore_engine_state HWP -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_PORE_ENGINE_STATE_VSBE_MODEL_ERROR</rc>
-    <description>
-      Procedure: proc_extract_pore_engine_state
-      Virtual SBE model error occurred when attempting to access SBE vital state.
-    </description>
-    <ffdc>CHIP</ffdc>
-    <ffdc>MODEL_ERROR</ffdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_PORE_ENGINE_STATE_VSBE_PIB_ERROR</rc>
-    <description>
-      Procedure: proc_extract_pore_engine_state
-      PIB error occurred when attempting to access SBE vital state from virtual SBE model.
-    </description>
-    <ffdc>CHIP</ffdc>
-    <ffdc>PIB_ERROR</ffdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_PORE_ENGINE_STATE_UNSUPPORTED_INVOCATION</rc>
-    <description>
-      Procedure: proc_extract_pore_engine_state
-      Unsupported engine type presented for analysis.
-    </description>
-    <ffdc>CHIP</ffdc>
-    <ffdc>ENGINE</ffdc>
-    <ffdc>VIRTUAL</ffdc>
-    <ffdc>VIRTUAL_IS_SUPPORTED</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
\ No newline at end of file
diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_halt_ffdc.xml b/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_halt_ffdc.xml
deleted file mode 100644
index 99afc14dc..000000000
--- a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_halt_ffdc.xml
+++ /dev/null
@@ -1,59 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_halt_ffdc.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2014                             -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_extract_pore_halt_ffdc.xml,v 1.1 2014/07/23 19:43:18 jmcgill Exp $ -->
-<!-- Error definitions for proc_extract_pore_halt_ffdc procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_PORE_HALT_FFDC</rc>
-    <description>
-      FFDC collected on selected PORE engine halt failures
-    </description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>PORE_HALT_TYPE</ffdc>
-    <ffdc>FFDC_ADDRESSES</ffdc>
-    <ffdc>FFDC_DATA</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_PORE_HALT_FFDC_BAD_MULTICAST</rc>
-    <description>
-      Unsupported multicast analysis requested
-    </description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>CHIPLET_ID</ffdc>
-    <ffdc>MC_GROUP</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_PORE_HALT_FFDC_BAD_TYPE</rc>
-    <description>
-      Unsupported halt type analysis requested
-    </description>
-    <ffdc>TARGET</ffdc>
-    <ffdc>PORE_HALT_TYPE</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
\ No newline at end of file
diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc_errors.xml b/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc_errors.xml
deleted file mode 100644
index 8deb98ba7..000000000
--- a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc_errors.xml
+++ /dev/null
@@ -1,503 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_extract_sbe_rc_errors.xml,v 1.20 2015/09/16 19:34:24 jmcgill Exp $ -->
-<!-- Error definitions for proc_extract_sbe_rc procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_ADDR_UNALIGNED</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      The PORE engine PC isn't properly aligned
-    </description>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_UNRECOVERABLE_ECC_SEEPROM</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      ECCB indicates unrecoverable ECC error from I2C during SBE execution
-      Reload/update of SEEPROM required
-    </description>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_UNRECOVERABLE_ECC_PNOR</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      ECCB indicates unrecoverable ECC error from PNOR during SBE execution
-      Reload/Update of PNOR required
-    </description>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_INTERNAL_ERROR</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      PORE engine encountered an internal HW error
-    </description>
-    <ffdc>GROUP_PARITY_ERROR_0_4</ffdc>
-    <ffdc>SCAN_DATA_CRC_ERROR</ffdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_I2C_ERROR</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      PORE engine encountered a I2C interface/setup error
-    </description>
-    <ffdc>I2C_BAD_STATUS_0_3</ffdc>
-    <ffdc>FI2C_HANG</ffdc>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_I2C_ERROR_REGS</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_ENGINE_RETRY</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      First SCOM into pervasive chiplet from SBE failed
-      Trigger reconfig loop with no deconfig/GARD
-    </description>
-    <ffdc>SCOM_ADDRESS</ffdc>
-    <ffdc>PIB_ERROR_CODE</ffdc>
-    <ffdc>PIB_DATA_READ_PARITY_ERROR</ffdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_PCI_CLOCK_ERROR</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      First SCOM into PCIe chiplet from SBE failed
-      Trigger callout for PCI reference clock
-    </description>
-    <ffdc>SCOM_ADDRESS</ffdc>
-    <ffdc>PIB_ERROR_CODE</ffdc>
-    <ffdc>PIB_DATA_READ_PARITY_ERROR</ffdc>
-    <callout>
-      <hw>
-        <hwid>PCI_REF_CLOCK</hwid>
-        <refTarget>CHIP</refTarget>
-      </hw>
-      <priority>HIGH</priority>
-    </callout>
-    <!-- No support for deconfig/gard yet, must be handled at PLAT layer
-    <deconfigure>
-      <hw>
-        <hwid>PCI_REF_CLOCK</hwid>
-        <refTarget>CHIP</refTarget>
-      </hw>
-    </deconfigure>
-    <gard>
-      <hw>
-        <hwid>PCI_REF_CLOCK</hwid>
-        <refTarget>CHIP</refTarget>
-      </hw>
-    </gard>
-    -->
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_SCOM_ERROR</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      PORE engine encountered a SCOM error
-    </description>
-    <ffdc>SCOM_ADDRESS</ffdc>
-    <ffdc>PIB_ERROR_CODE</ffdc>
-    <ffdc>PIB_DATA_READ_PARITY_ERROR</ffdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_OCI_ERROR</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      PORE SLW engine encountered error on OCI interface
-    </description>
-    <ffdc>OCI_ERROR_CODE</ffdc>
-    <ffdc>OCI_DATA_READ_PARITY_ERROR</ffdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_IMAGE_POINTER_NULL</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      PORE image pointer provided was NULL.
-    </description>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_ADDR_NOT_RECOGNIZED</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      The PORE halt address isn't in a recognized address space
-    </description>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_SBE_UNKNOWN_ERROR</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      FAPI_SET_SBE_ERROR did not resolve PORE halt code to known return code
-      May be caused by platform attempting to resolve engine state with mismatched binary image.
-    </description>
-    <callout>
-      <target>CHIP</target>
-      <priority>LOW</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_FROM_ADDR_CODE_BUG</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      Failed to association PORE halt code with known return code
-    </description>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_INSTRUCTION_ERROR</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      PORE engine encountered an instruction fetch/decode/execution error
-    </description>
-    <ffdc>INSTRUCTION_PARITY_ERROR</ffdc>
-    <ffdc>INVALID_INSTRUCTION_NON_ROTATE</ffdc>
-    <ffdc>PC_OVERFLOW_UNDERFLOW</ffdc>
-    <ffdc>PC_STACK_ERROR</ffdc>
-    <ffdc>INSTRUCTION_FETCH_ERROR</ffdc>
-    <ffdc>INVALID_OPERAND</ffdc>
-    <ffdc>I2C_ENGINE_MISS</ffdc>
-    <ffdc>INVALID_START_VECTOR</ffdc>
-    <ffdc>INVALID_INSTRUCTION_ROTATE</ffdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_BAD_CHIP_TYPE</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      PORE SBE execution of OTPROM code failed chip type (Murano/Venice) check
-    </description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_FIRST_OTPROM_INSTRUCTIONS</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_SEEPROM_MAGIC_NUMBER_MISMATCH</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      PORE SBE execution of OTPROM code failed SEEPROM magic number check
-    </description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_FIRST_OTPROM_INSTRUCTIONS</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_BRANCH_TO_SEEPROM_FAIL</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      PORE SBE execution of OTPROM code failed to branch to SEEPROM
-    </description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_FIRST_OTPROM_INSTRUCTIONS</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_UNEXPECTED_OTPROM_HALT</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      PORE SBE execution of OTPROM code halted at an unexpected location
-    </description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_FIRST_OTPROM_INSTRUCTIONS</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_NEVER_STARTED</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      Procedure was called when no error bits were set and PC is all zeros.
-      PORE engine was probably never started.
-    </description>
-    <collectRegisterFfdc>
-      <id>REG_FFDC_PROC_FIRST_OTPROM_INSTRUCTIONS</id>
-      <target>CHIP</target>
-    </collectRegisterFfdc>
-    <callout>
-      <target>CHIP</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-    <gard>
-      <target>CHIP</target>
-    </gard>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_SOFT_ECC_ERROR_SEEPROM</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      ECCB indicates correctable ECC error threshold from I2C was exceeded during SBE execution
-      Reload/update of SEEPROM required
-    </description>
-    <callout>
-      <target>CHIP</target>
-      <priority>LOW</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_SOFT_ECC_ERROR_PNOR</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      ECCB indicates correctable ECC error threshold from PNOR was exceeded during SBE execution
-      Reload/update of PNOR required
-    </description>
-    <callout>
-      <target>CHIP</target>
-      <priority>LOW</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_SOFT_ECC_ERROR_SEEPROM_AND_PNOR</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      ECCB indicates correctable ECC error threshold from both I2C and PNOR was exceeded during SBE execution
-      Reload/update of SEEPROM/PNOR required
-    </description>
-    <callout>
-      <target>CHIP</target>
-      <priority>LOW</priority>
-    </callout>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_EXTRACT_SBE_RC_CODE_BUG</rc>
-    <description>
-      Procedure: proc_extract_sbe_rc
-      PORE SBE reported attention, but procedure attempted to return SUCCESS
-    </description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>CHIP</target>
-    </deconfigure>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <registerFfdc>
-    <id>REG_FFDC_I2C_ERROR_REGS</id>
-    <scomRegister>I2CM_MODE_REGISTER_0_0x000A0006</scomRegister>
-    <scomRegister>I2CM_WATER_MARK_0_0x000A0007</scomRegister>
-    <scomRegister>I2CM_INTERRUPT_MASK_0_0x000A0008</scomRegister>
-    <scomRegister>I2CM_INTERRUPT_COND_0_0x000A0009</scomRegister>
-    <scomRegister>I2CM_INTERRUPTS_0_0x000A000A</scomRegister>
-    <scomRegister>I2CM_STATUS_REGISTER_ENGINE_0_0x000A000B</scomRegister>
-    <scomRegister>I2CM_EXTENDED_STATUS_0_0x000A000C</scomRegister>
-    <scomRegister>I2CM_RESIDUAL_FE_BE_LENGTH_0_0x000A000D</scomRegister>
-    <scomRegister>I2CM_BUSY_REGISTER_0_0x000A000E</scomRegister>
-  </registerFfdc>
-</hwpErrors>
-
-
-
-
-
diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_read_seeprom_errors.xml b/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_read_seeprom_errors.xml
deleted file mode 100644
index b3e9ec8fe..000000000
--- a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_read_seeprom_errors.xml
+++ /dev/null
@@ -1,153 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_read_seeprom_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_read_seeprom_errors.xml,v 1.3 2013/07/26 22:46:42 rjknight Exp $ -->
-<!-- Error definitions for proc_read_seeprom procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_PIB_BUS_ADDR_NVLD_ERR_BIT_SET</rc>
-    <description>Invalid address from PIB</description>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_PIB_BUS_WRITE_NVLD_ERR_BIT_SET</rc>
-    <description>Invalid write from PIB</description>
-   </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_PIB_BUS_READ_NVLD_ERR_BIT_SET</rc>
-    <description>Invalid read from PIB</description>
-   </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_PIB_BUS_ADDR_PAR_ERR_BIT_SET</rc>
-    <description>Address parity error from PIB</description>
-     </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_PIB_BUS_PAR_ERR_BIT_SET</rc>
-    <description>Parity error form PIB</description>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_LOCAL_BUS_PAR_ERR_BIT_SET</rc>
-    <description>A parity error on LB between I2C and PIB occurred</description>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_PIB_INVALID_COMMAND_BIT_SET</rc>
-    <description>Bit 45 of status register set</description>
-  </hwpError> 
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_PIB_PARITY_ERR_BIT_SET</rc>
-    <description>Bit 46 of status register set</description>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_I2C_BACK_END_OVERRUN_ERR_BIT_SET</rc>
-    <description>Bit 47 of status register set</description>
-    </hwpError>  
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_I2C_BACK_END_ACCESS_ERR_BIT_SET</rc>
-    <description>Bit 48 of status register set</description>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_I2C_ARBITRATION_LOST_ERR_BIT_SET</rc>
-    <description>Bit 49 of status register set</description>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_I2C_NACK_RECIEVED_ERR_BIT_SET</rc>
-    <description>Bit 50 of status register set</description>
- </hwpError> 
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_I2C_COMMAND_COMPLETE_NOT_SET</rc>
-    <description>Bit 52 of status register not set after bit 44 is cleared</description>
- </hwpError> 
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_I2C_COMMAND_COMPLETE_TIME_OUT</rc>
-    <description>Bit 52 of status register not set and time out after certain time</description>
- </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_I2C_STOP_ERR_BIT_SET</rc>
-    <description>Bit 53 of status register set</description>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_PARITY_ERROR_BIT_SET</rc>
-    <description>Bit 56 of status register set</description>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_CE_COUNTER_OVERFLOW_BIT_SET</rc>
-    <description>Bit 57 of status register set</description>
-  </hwpError>
-
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_PIB_MASTER_RESP_INFO_BITS_SET</rc>
-    <description>Some bits between 38 to 40 of status register set</description>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_PIB_CONTROL_REG_DATA_LGT_ERR</rc>
-    <description>Bits 41:43 equal 100, control reg data length err</description>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_PIB_CONTROL_REG_ADD_LGT_ERR</rc>
-    <description>Bit 41:43 equal 101, control reg address length err</description>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_PIB_CONTROL_REG_ADDR_BDY_ERR</rc>
-    <description>Bit 41:43 equal 110, control reg address boudary err</description>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_PIB_ECCADDR_REG_ERR</rc>
-    <description>Bit 41:43 equal 111, ecc address register err</description>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_PIB_EFF_PIBM_RESET</rc>
-    <description>Bit 41:43 equal 010,pib master reset</description>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_PIB_UEC_Q</rc>
-    <description>Bit 41:43 equal 001, uncorrectable ecc error</description>
-  </hwpError>
-<!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROC_READ_SEEPROM_PIB_SLAVE_RESET</rc>
-    <description>Bit 41:43 equal 011, reset from pib slave</description>
-  </hwpError>
-
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_tp_collect_dbg_data/proc_tp_collect_dbg_data.xml b/src/usr/hwpf/hwp/slave_sbe/proc_tp_collect_dbg_data/proc_tp_collect_dbg_data.xml
deleted file mode 100644
index 3bf185a89..000000000
--- a/src/usr/hwpf/hwp/slave_sbe/proc_tp_collect_dbg_data/proc_tp_collect_dbg_data.xml
+++ /dev/null
@@ -1,41 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/slave_sbe/proc_tp_collect_dbg_data/proc_tp_collect_dbg_data.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2014,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_tp_collect_dbg_data.xml,v 1.5 2014/10/03 20:25:09 jmcgill Exp $ -->
-<!-- Error definitions for proc_tp_collect_dbg_data procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_TP_COLLECT_DBG_DATA</rc>
-    <description>
-      Procedure: proc_tp_collect_dbg_data
-    </description>
-    <ffdc>VITL_DATA</ffdc>
-    <collectTrace>FSI</collectTrace>
-    <collectTrace>SCOM</collectTrace>
-    <collectTrace>SCAN</collectTrace>
-    <collectTrace>MBOX</collectTrace>
-  </hwpError>
-  <!-- *********************************************************************** -->
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_tp_collect_dbg_data/proc_tp_collect_dbg_data_attributes.xml b/src/usr/hwpf/hwp/slave_sbe/proc_tp_collect_dbg_data/proc_tp_collect_dbg_data_attributes.xml
deleted file mode 100644
index 5a0689f0d..000000000
--- a/src/usr/hwpf/hwp/slave_sbe/proc_tp_collect_dbg_data/proc_tp_collect_dbg_data_attributes.xml
+++ /dev/null
@@ -1,69 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/slave_sbe/proc_tp_collect_dbg_data/proc_tp_collect_dbg_data_attributes.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2015                             -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_tp_collect_dbg_data_attributes.xml,v 1.1 2014/10/03 20:24:15 jmcgill Exp $ -->
-<!-- proc_tp_collect_dbg_data_attributes.xml -->
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_PERV_VITL_LENGTH</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Length of perv_vitl_chain ring in bits
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_TP_VITL_SPY_LENGTH</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Length of tp_vitl FFDC spy in bits
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_TP_VITL_SPY_OFFSETS</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Set of ring offsets which form tp_vitl FFDC spy definition.
-                 High-order 16 bits provide starting bit of range.
-                 Low-order 16 bits provide ending bit of range.
-                 Entries will be processed from index 0 to 23 (value of 0xFFFFFF should be used to signify last entry to process).
-      creator: platform
-      firmware notes:
-    </description>
-    <valueType>uint32</valueType>
-    <array>24</array>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/spd_accessors/getSpdAttrAccessorErrors.xml b/src/usr/hwpf/hwp/spd_accessors/getSpdAttrAccessorErrors.xml
deleted file mode 100644
index 625c29913..000000000
--- a/src/usr/hwpf/hwp/spd_accessors/getSpdAttrAccessorErrors.xml
+++ /dev/null
@@ -1,70 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/spd_accessors/getSpdAttrAccessorErrors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2013,2014                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: getSpdAttrAccessorErrors.xml,v 1.2 2014/06/27 19:55:53 thi Exp $ -->
-<hwpErrors>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_GET_SPD_ACCESSOR_INVALID_ATTRIBUTE_ID</rc>
-    <description>
-      Request to get DIMM SPD field with invalid attribute ID. Code bug
-    </description>
-    <ffdc>ATTR_ID</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_GET_SPD_ACCESSOR_INVALID_OUTPUT_SIZE</rc>
-    <description>
-      Request to get DIMM SPD field with invalid output buffer size. Code bug
-    </description>
-    <ffdc>ATTR_ID</ffdc>
-    <ffdc>ACTUAL_SIZE</ffdc>
-    <ffdc>EXPECTED_SIZE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_GET_SPD_ACCESSOR_INVALID_DDR_TYPE</rc>
-    <description>
-      Request to get DIMM SPD field from DIMM with incorrect DDR Type
-      Only DDR3 and DDR4 supported
-    </description>
-    <ffdc>DIMM</ffdc>
-    <ffdc>TYPE</ffdc>
-    <callout>
-      <target>DIMM</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>DIMM</target>
-    </deconfigure>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/sync_attributes.xml b/src/usr/hwpf/hwp/sync_attributes.xml
deleted file mode 100644
index eaeb33577..000000000
--- a/src/usr/hwpf/hwp/sync_attributes.xml
+++ /dev/null
@@ -1,43 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/sync_attributes.xml $                        -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!--
-    XML file specifying HWPF attribute
--->
-
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SYNC_BETWEEN_STEPS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Attribute to enable targetting attribute sync when in istep mode.
-        This value should be altered using the fapi attribute overide tools.
-        0 = Disabled  (default)
-        1 = Enabled
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/system_attributes.xml b/src/usr/hwpf/hwp/system_attributes.xml
deleted file mode 100644
index 9181f2c3d..000000000
--- a/src/usr/hwpf/hwp/system_attributes.xml
+++ /dev/null
@@ -1,472 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/system_attributes.xml $                      -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2015                        -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: system_attributes.xml,v 1.28 2015/05/28 20:44:22 jmcgill Exp $ -->
-<!--
-    XML file specifying HWPF attributes.
-    These are platInit attributes associated with the system.
-    These attributes are not associated with particular targets.
-    Each execution platform must initialize.
--->
-
-<attributes>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_EXECUTION_PLATFORM</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Which execution platform the HW Procedure is running on
-        Some HWPs (e.g. special wakeup) use different registers for different
-          platforms to avoid arbitration problems when multiple platforms do
-          the same thing concurrently
-    </description>
-    <valueType>uint8</valueType>
-    <enum>HOST = 0x01, FSP = 0x02, OCC = 0x03</enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_IS_SIMULATION</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>env: 1 = Awan/HWSimulator. 0 = Simics/RealHW.</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MNFG_FLAGS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        The manufacturing flags.
-        This is a bitfield. Each bit is a flag and multiple flags can be set
-    </description>
-    <valueType>uint64</valueType>
-    <enum>
-        MNFG_NO_FLAG                        = 0x0000000000000000,
-        MNFG_THRESHOLDS                     = 0x0000000000000001,
-        MNFG_AVP_ENABLE                     = 0x0000000000000002,
-        MNFG_HDAT_AVP_ENABLE                = 0x0000000000000004,
-        MNFG_SRC_TERM                       = 0x0000000000000008,
-        MNFG_IPL_MEMORY_CE_CHECKING         = 0x0000000000000010,
-        MNFG_FAST_BACKGROUND_SCRUB          = 0x0000000000000020,
-        MNFG_TEST_DRAM_REPAIRS              = 0x0000000000000040,
-        MNFG_DISABLE_DRAM_REPAIRS           = 0x0000000000000080,
-        MNFG_ENABLE_EXHAUSTIVE_PATTERN_TEST = 0x0000000000000100,
-        MNFG_ENABLE_STANDARD_PATTERN_TEST   = 0x0000000000000200,
-        MNFG_ENABLE_MINIMUM_PATTERN_TEST    = 0x0000000000000400,
-        MNFG_DISABLE_FABRIC_eREPAIR         = 0x0000000000000800,
-        MNFG_DISABLE_MEMORY_eREPAIR         = 0x0000000000001000,
-        MNFG_FABRIC_DEPLOY_LANE_SPARES      = 0x0000000000002000,
-        MNFG_DMI_DEPLOY_LANE_SPARES         = 0x0000000000004000,
-        MNFG_PSI_DIAGNOSTIC                 = 0x0000000000008000,
-        MNFG_BRAZOS_WRAP_CONFIG             = 0x0000000000010000
-    </enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_IS_MPIPL</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>1 = in Memory Preserving IPL mode. 0 = in normal IPL mode.</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_EPS_TABLE_TYPE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      Processor epsilon table type. Used to calculate the processor nest
-      epsilon register values.
-      Provided by the Machine Readable Workbook.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>EPS_TYPE_LE = 0x01, EPS_TYPE_HE = 0x02, EPS_TYPE_1S = 0x03</enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_FABRIC_PUMP_MODE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      Processor SMP Fabric broadcast scope configuration.
-      MODE1 = default = chip/group/system/remote group/foreign.
-      MODE2 = group/system/remote group/foreign.
-      Provided by the Machine Readable Workbook.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>MODE1 = 0x01, MODE2 = 0x02</enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_X_BUS_WIDTH</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      Processor SMP X bus width.
-      Provided by the Machine Readable Workbook.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>W4BYTE = 0x01, W8BYTE = 0x02</enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_ALL_MCS_IN_INTERLEAVING_GROUP</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      If all MCS chiplets are in an interleaving group (1=true, 0=false).
-      If true the SMP fabric is setup in normal mode.
-      If false the SMP fabric is setup in checkerboard mode.
-      Provided by the Machine Readable Workbook.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_NEST_FREQ_MHZ</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-     Nest Freq for system in MHz
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_BOOT_FREQ_MHZ</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Boot frequency in MHZ.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_EX_GARD_BITS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      Vector to communicate the guarded EX chiplets to SBE
-      One Guard bit per EX chiplet, bit location aligned to chiplet ID
-      (bit 16: EX00, bit 17: EX01, bit 18: EX02 ... bit 31: EX15)
-      Guarded EX chiplets are marked by a '1'.
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_DISABLE_I2C_ACCESS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      Set to skip physical access to i2c interface in SBE execution.
-      Consumed by SBE hooks to permit skipping of selected code when
-      running on a test platform (i.e., wafer) which does not have a physical
-      SEEPROM connected.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PIB_I2C_REFCLOCK</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      i2c reference clock for the system
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PIB_I2C_NEST_PLL</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      i2c pll for the system
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SBE_IMAGE_OFFSET</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      HostBoot image for SBE, offset to account for ECC
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_BOOT_VOLTAGE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-     Boot Voltage for system
-    </description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_RISK_LEVEL</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Defines risk level to consider for initialization values applied during IPL.
-        Risk level 0 should contain solutions for all known errata, and may sacrifice performance to avoid data integrity issue/error checking cases.
-        Risk level 100 may introduce data integrity/error scenarios to provide full performance or visibility to state space/coverage behind known issues.
-    </description>
-    <valueType>uint32</valueType>
-    <enum>
-        RL0 = 0x000,
-        RL100 = 0x100
-    </enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PROC_REFCLOCK_RCVR_TERM</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Defines system specific value of processor refclock receiver termination (FSI GP4 bits 8:9)
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_PCI_REFCLOCK_RCVR_TERM</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Defines system specific value of PCI refclock receiver termination (FSI GP4 bits 10:11)
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_DMI_REFCLOCK_RCVR_TERM</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Defines system specific value of DMI refclock receiver termination (FSI GP4 bits 8:9)
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEMB_DDR_REFCLOCK_RCVR_TERM</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Defines system specific value of DDR refclock receiver termination (FSI GP4 bits 10:11)
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MEM_FILTER_PLL_SOURCE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Defines source of MEM filter PLL input (FSI GP4 bit 23)
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-        PROC_REFCLK = 0x0,
-        PCI_REFCLK = 0x1
-    </enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MULTI_SCOM_BUFFER_MAX_SIZE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-      Defines maximum size of data buffer to allocate for optimal
-      performance with platform implementation of fapiMultiScom API.
-    </description>
-    <valueType>uint64</valueType>
-    <enum>
-        MULTI_SCOM_BUFFER_SIZE_1KB   = 0x0000000000000400,
-        MULTI_SCOM_BUFFER_SIZE_2KB   = 0x0000000000000800,
-        MULTI_SCOM_BUFFER_SIZE_4KB   = 0x0000000000001000,
-        MULTI_SCOM_BUFFER_SIZE_8KB   = 0x0000000000002000,
-        MULTI_SCOM_BUFFER_SIZE_16KB  = 0x0000000000004000,
-        MULTI_SCOM_BUFFER_SIZE_32KB  = 0x0000000000008000,
-        MULTI_SCOM_BUFFER_SIZE_64KB  = 0x0000000000010000,
-        MULTI_SCOM_BUFFER_SIZE_128KB = 0x0000000000020000,
-        MULTI_SCOM_BUFFER_SIZE_256KB = 0x0000000000040000,
-        MULTI_SCOM_BUFFER_SIZE_512KB = 0x0000000000080000,
-        MULTI_SCOM_BUFFER_SIZE_1MB   = 0x0000000000100000
-    </enum>
-    <platInit/>
-    <persistRuntime/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_RECONFIGURE_LOOP</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Used to inidicate if a reconfigure loop is needed
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-        DECONFIGURE      = 0x1,
-        BAD_DQ_BIT_SET   = 0x2
-    </enum>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-    <attribute>
-      <id>ATTR_PM_HWP_ATTR_VERSION</id>
-      <targetType>TARGET_TYPE_SYSTEM</targetType>
-      <description>
-          Defines HWP version to be checked inside HWPs to determine if new
-          code should be loaded/skipped/modified/etc. Service pack versions
-          of the procedures may diverge from the working branch. Specific
-          values to be defined as needed in the service pack release stream.
-      </description>
-      <valueType>uint32</valueType>
-      <platInit/>
-      <writeable/>
-    </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_REDUNDANT_CLOCKS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        1 = System has redundant clock oscillators
-        0 = System does not have redundant clock oscillators
-        From the Machine Readable Workbook
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_MFG_TRACE_ENABLE</id>
-   <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Override this to a non-zero value to have the FAPI manufacturing
-        traces output to the console or go to a fsp trace buffer when
-        console not enabled.
-        In cronus, setting this to a non-zero will output the FAPI_MFG
-        traces to the same location as your other FAPI traces.
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_WOF_ENABLED</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Defines if the Workload Optimization Frequency (WOF) system feature
-        where OCC algorithms will change (typically boost) the operational 
-        frequency based on measured power available and any currently idling 
-        cores.        
-    </description>
-    <valueType>uint8</valueType>
-    <enum>
-        DISABLED = 0x0,
-        ENABLED = 0x1
-    </enum>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FORCE_USE_SBE_SLAVE_SCAN_SERVICE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Set to force use of SBE scan service for slave chips.
-        Default is to enable the use of the SBE scan service
-        only for slave chips with security enabled.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>FALSE = 0, TRUE = 1</enum>
-    <writeable/>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_TRUSTED_SLAVE_SCAN_PATH_ACTIVE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Set to indicate state of master->slave scan path.
-        Platform should default to false at beginning of IPL, and set to
-        true once trusted XSCOM path is active to all slave chips in drawer
-    </description>
-    <valueType>uint8</valueType>
-    <enum>FALSE = 0, TRUE = 1</enum>
-    <writeable/>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_FORCE_SKIP_SBE_MASTER_INTR_SERVICE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Set to force skip of SBE interrupt service for master chip.
-        Default is to enable the use of the SBE interrupt service.
-    </description>
-    <valueType>uint8</valueType>
-    <enum>FALSE = 0, TRUE = 1</enum>
-    <writeable/>
-    <platInit/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SBE_MASTER_INTR_SERVICE_DELAY_CYCLES</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Cycle delay of SBE master interrupt service loop wait statement.
-        Paces rate of decrementer progress and prevents SBE from consuming PIB.
-    </description>
-    <valueType>uint32</valueType>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-  <attribute>
-    <id>ATTR_SBE_MASTER_INTR_SERVICE_DELAY_US</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>
-        Execution delay (in microseconds) of SBE master interrupt service loop.
-    </description>
-    <valueType>uint32</valueType>
-    <writeable/>
-  </attribute>
-  <!-- ********************************************************************* -->
-</attributes>
diff --git a/src/usr/hwpf/hwp/thread_activate/proc_thread_control/proc_thread_control.xml b/src/usr/hwpf/hwp/thread_activate/proc_thread_control/proc_thread_control.xml
deleted file mode 100644
index e06c58b97..000000000
--- a/src/usr/hwpf/hwp/thread_activate/proc_thread_control/proc_thread_control.xml
+++ /dev/null
@@ -1,142 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/thread_activate/proc_thread_control/proc_thread_control.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_thread_control.xml,v 1.8 2014/04/11 20:28:02 jklazyns Exp $ -->
-<!-- Error definitions for proc_thread_control procedure -->
-<hwpErrors>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_PROC_THREAD_CONTROL_INV_COMMAND</rc>
-    <ffdc>COMMAND</ffdc>
-    <description>Invalid command issued to proc_thread_control procedure</description>
-    <callout>
-    <procedure>CODE</procedure>
-    <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_PROC_THREAD_CONTROL_SRESET_FAIL</rc>
-    <ffdc>CORE_TARGET</ffdc>
-    <ffdc>THREAD</ffdc>
-    <ffdc>RAS_STATUS</ffdc>
-    <description>Sreset command failed: RAS STAT instruction completed bit was not set after sreset command.</description>
-    <callout>
-      <target>CORE_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-    <deconfigure>
-      <target>CORE_TARGET</target>
-    </deconfigure>
-    <gard>
-      <target>CORE_TARGET</target>
-    </gard>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_PROC_THREAD_CONTROL_START_PRE_NOMAINT</rc>
-    <description>Start command precondition not met: RAS STAT Maintenance bit is not set.</description>
-    <ffdc>CORE_TARGET</ffdc>
-    <ffdc>THREAD</ffdc>
-    <ffdc>RAS_STATUS</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_PROC_THREAD_CONTROL_START_FAIL</rc>
-    <description>Start command failed: RAS STAT instruction completed bit was not set after start command.</description>
-    <ffdc>CORE_TARGET</ffdc>
-    <ffdc>THREAD</ffdc>
-    <ffdc>RAS_STATUS</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_PROC_THREAD_CONTROL_STOP_FAIL</rc>
-    <description>Stop command issued to core PC, but RAS STAT maintenance bit is not set.</description>
-    <ffdc>CORE_TARGET</ffdc>
-    <ffdc>THREAD</ffdc>
-    <ffdc>RAS_STATUS</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_PROC_THREAD_CONTROL_STEP_PRE_NOMAINT</rc>
-    <description>Step command precondition not met: RAS STAT Maintenance bit is not set.</description>
-    <ffdc>CORE_TARGET</ffdc>
-    <ffdc>THREAD</ffdc>
-    <ffdc>RAS_STATUS</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_PROC_THREAD_CONTROL_STEP_FAIL</rc>
-    <description>Step command issued to core PC, but RAS STAT run bit is still set.</description>
-    <ffdc>CORE_TARGET</ffdc>
-    <ffdc>THREAD</ffdc>
-    <ffdc>RAS_STATUS</ffdc>
-    <ffdc>PTC_STEP_COMP_POLL_LIMIT</ffdc>
-    <ffdc>PTC_RAS_MODE_SINGLE</ffdc>
-    <ffdc>stepCompletePollCount</ffdc>
-    <callout>
-      <target>CORE_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_PROC_THREAD_CONTROL_ACTIVATE_FAIL</rc>
-    <description>Activate command issued to core PC, but THREAD ACTIVE bit was not set.</description>
-    <ffdc>CORE_TARGET</ffdc>
-    <ffdc>THREAD</ffdc>
-    <ffdc>RAS_STATUS</ffdc>
-    <ffdc>thd_activate_bit</ffdc>
-    <callout>
-      <target>CORE_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>LOW</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/tp_dbg_attributes/n1_10_tp_dbg_data.attributes b/src/usr/hwpf/hwp/tp_dbg_attributes/n1_10_tp_dbg_data.attributes
deleted file mode 100644
index caddb9c11..000000000
--- a/src/usr/hwpf/hwp/tp_dbg_attributes/n1_10_tp_dbg_data.attributes
+++ /dev/null
@@ -1,28 +0,0 @@
-# $Id: n1_10_tp_dbg_data.attributes,v 1.2 2015/05/08 00:31:00 thi Exp $
-
-ATTR_PROC_PERV_VITL_LENGTH u32 2773
-ATTR_PROC_TP_VITL_SPY_LENGTH u32 590
-ATTR_PROC_TP_VITL_SPY_OFFSETS[0] u32[24] 0x00D10110
-ATTR_PROC_TP_VITL_SPY_OFFSETS[1] u32[24] 0x01620179
-ATTR_PROC_TP_VITL_SPY_OFFSETS[2] u32[24] 0x018E0194
-ATTR_PROC_TP_VITL_SPY_OFFSETS[3] u32[24] 0x01CF01E9
-ATTR_PROC_TP_VITL_SPY_OFFSETS[4] u32[24] 0x01F201F4
-ATTR_PROC_TP_VITL_SPY_OFFSETS[5] u32[24] 0x02000200
-ATTR_PROC_TP_VITL_SPY_OFFSETS[6] u32[24] 0x02030218
-ATTR_PROC_TP_VITL_SPY_OFFSETS[7] u32[24] 0x021A022D
-ATTR_PROC_TP_VITL_SPY_OFFSETS[8] u32[24] 0x02360335
-ATTR_PROC_TP_VITL_SPY_OFFSETS[9] u32[24] 0x03490373
-ATTR_PROC_TP_VITL_SPY_OFFSETS[10] u32[24] 0x039E03AF
-ATTR_PROC_TP_VITL_SPY_OFFSETS[11] u32[24] 0x0A300A58
-ATTR_PROC_TP_VITL_SPY_OFFSETS[12] u32[24] 0x09C70A06
-ATTR_PROC_TP_VITL_SPY_OFFSETS[13] u32[24] 0xFFFFFFFF
-ATTR_PROC_TP_VITL_SPY_OFFSETS[14] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[15] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[16] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[17] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[18] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[19] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[20] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[21] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[22] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[23] u32[24] 0x00000000
diff --git a/src/usr/hwpf/hwp/tp_dbg_attributes/p8_10_tp_dbg_data.attributes b/src/usr/hwpf/hwp/tp_dbg_attributes/p8_10_tp_dbg_data.attributes
deleted file mode 100644
index 075c2c36a..000000000
--- a/src/usr/hwpf/hwp/tp_dbg_attributes/p8_10_tp_dbg_data.attributes
+++ /dev/null
@@ -1,28 +0,0 @@
-# $Id: p8_10_tp_dbg_data.attributes,v 1.1 2014/10/03 19:58:34 jmcgill Exp $
-
-ATTR_PROC_PERV_VITL_LENGTH u32 2773
-ATTR_PROC_TP_VITL_SPY_LENGTH u32 590
-ATTR_PROC_TP_VITL_SPY_OFFSETS[0] u32[24] 0x00D10110
-ATTR_PROC_TP_VITL_SPY_OFFSETS[1] u32[24] 0x01620179
-ATTR_PROC_TP_VITL_SPY_OFFSETS[2] u32[24] 0x018E0194
-ATTR_PROC_TP_VITL_SPY_OFFSETS[3] u32[24] 0x01CF01E9
-ATTR_PROC_TP_VITL_SPY_OFFSETS[4] u32[24] 0x01F201F4
-ATTR_PROC_TP_VITL_SPY_OFFSETS[5] u32[24] 0x02000200
-ATTR_PROC_TP_VITL_SPY_OFFSETS[6] u32[24] 0x02030218
-ATTR_PROC_TP_VITL_SPY_OFFSETS[7] u32[24] 0x021A022D
-ATTR_PROC_TP_VITL_SPY_OFFSETS[8] u32[24] 0x02360335
-ATTR_PROC_TP_VITL_SPY_OFFSETS[9] u32[24] 0x03490373
-ATTR_PROC_TP_VITL_SPY_OFFSETS[10] u32[24] 0x039E03AF
-ATTR_PROC_TP_VITL_SPY_OFFSETS[11] u32[24] 0x0A300A58
-ATTR_PROC_TP_VITL_SPY_OFFSETS[12] u32[24] 0x09C70A06
-ATTR_PROC_TP_VITL_SPY_OFFSETS[13] u32[24] 0xFFFFFFFF
-ATTR_PROC_TP_VITL_SPY_OFFSETS[14] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[15] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[16] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[17] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[18] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[19] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[20] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[21] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[22] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[23] u32[24] 0x00000000
diff --git a/src/usr/hwpf/hwp/tp_dbg_attributes/p8_20_tp_dbg_data.attributes b/src/usr/hwpf/hwp/tp_dbg_attributes/p8_20_tp_dbg_data.attributes
deleted file mode 100644
index 8a2bd5727..000000000
--- a/src/usr/hwpf/hwp/tp_dbg_attributes/p8_20_tp_dbg_data.attributes
+++ /dev/null
@@ -1,28 +0,0 @@
-# $Id: p8_20_tp_dbg_data.attributes,v 1.1 2014/10/03 19:59:22 jmcgill Exp $
-
-ATTR_PROC_PERV_VITL_LENGTH u32 2773
-ATTR_PROC_TP_VITL_SPY_LENGTH u32 590
-ATTR_PROC_TP_VITL_SPY_OFFSETS[0] u32[24] 0x00D10110
-ATTR_PROC_TP_VITL_SPY_OFFSETS[1] u32[24] 0x01620179
-ATTR_PROC_TP_VITL_SPY_OFFSETS[2] u32[24] 0x018E0194
-ATTR_PROC_TP_VITL_SPY_OFFSETS[3] u32[24] 0x01CF01E9
-ATTR_PROC_TP_VITL_SPY_OFFSETS[4] u32[24] 0x01F201F4
-ATTR_PROC_TP_VITL_SPY_OFFSETS[5] u32[24] 0x02000200
-ATTR_PROC_TP_VITL_SPY_OFFSETS[6] u32[24] 0x02030218
-ATTR_PROC_TP_VITL_SPY_OFFSETS[7] u32[24] 0x021A022D
-ATTR_PROC_TP_VITL_SPY_OFFSETS[8] u32[24] 0x02360335
-ATTR_PROC_TP_VITL_SPY_OFFSETS[9] u32[24] 0x03490373
-ATTR_PROC_TP_VITL_SPY_OFFSETS[10] u32[24] 0x039E03AF
-ATTR_PROC_TP_VITL_SPY_OFFSETS[11] u32[24] 0x0A300A58
-ATTR_PROC_TP_VITL_SPY_OFFSETS[12] u32[24] 0x09C70A06
-ATTR_PROC_TP_VITL_SPY_OFFSETS[13] u32[24] 0xFFFFFFFF
-ATTR_PROC_TP_VITL_SPY_OFFSETS[14] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[15] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[16] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[17] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[18] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[19] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[20] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[21] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[22] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[23] u32[24] 0x00000000
diff --git a/src/usr/hwpf/hwp/tp_dbg_attributes/s1_10_tp_dbg_data.attributes b/src/usr/hwpf/hwp/tp_dbg_attributes/s1_10_tp_dbg_data.attributes
deleted file mode 100644
index 98697ffa3..000000000
--- a/src/usr/hwpf/hwp/tp_dbg_attributes/s1_10_tp_dbg_data.attributes
+++ /dev/null
@@ -1,28 +0,0 @@
-# $Id: s1_10_tp_dbg_data.attributes,v 1.1 2014/10/03 20:00:14 jmcgill Exp $
-
-ATTR_PROC_PERV_VITL_LENGTH u32 2310
-ATTR_PROC_TP_VITL_SPY_LENGTH u32 576
-ATTR_PROC_TP_VITL_SPY_OFFSETS[0] u32[24] 0x04AD04EC
-ATTR_PROC_TP_VITL_SPY_OFFSETS[1] u32[24] 0x053E0570
-ATTR_PROC_TP_VITL_SPY_OFFSETS[2] u32[24] 0x0579057B
-ATTR_PROC_TP_VITL_SPY_OFFSETS[3] u32[24] 0x06690669
-ATTR_PROC_TP_VITL_SPY_OFFSETS[4] u32[24] 0x066C0681
-ATTR_PROC_TP_VITL_SPY_OFFSETS[5] u32[24] 0x0683068F
-ATTR_PROC_TP_VITL_SPY_OFFSETS[6] u32[24] 0x06980797
-ATTR_PROC_TP_VITL_SPY_OFFSETS[7] u32[24] 0x07AB07D5
-ATTR_PROC_TP_VITL_SPY_OFFSETS[8] u32[24] 0x05DF05F0
-ATTR_PROC_TP_VITL_SPY_OFFSETS[9] u32[24] 0x03510379
-ATTR_PROC_TP_VITL_SPY_OFFSETS[10] u32[24] 0x02E80327
-ATTR_PROC_TP_VITL_SPY_OFFSETS[11] u32[24] 0xFFFFFFFF
-ATTR_PROC_TP_VITL_SPY_OFFSETS[12] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[13] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[14] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[15] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[16] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[17] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[18] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[19] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[20] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[21] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[22] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[23] u32[24] 0x00000000
diff --git a/src/usr/hwpf/hwp/tp_dbg_attributes/s1_13_tp_dbg_data.attributes b/src/usr/hwpf/hwp/tp_dbg_attributes/s1_13_tp_dbg_data.attributes
deleted file mode 100644
index 18d8899c1..000000000
--- a/src/usr/hwpf/hwp/tp_dbg_attributes/s1_13_tp_dbg_data.attributes
+++ /dev/null
@@ -1,28 +0,0 @@
-# $Id: s1_13_tp_dbg_data.attributes,v 1.1 2014/10/03 20:00:46 jmcgill Exp $
-
-ATTR_PROC_PERV_VITL_LENGTH u32 2310
-ATTR_PROC_TP_VITL_SPY_LENGTH u32 576
-ATTR_PROC_TP_VITL_SPY_OFFSETS[0] u32[24] 0x04AD04EC
-ATTR_PROC_TP_VITL_SPY_OFFSETS[1] u32[24] 0x053E0570
-ATTR_PROC_TP_VITL_SPY_OFFSETS[2] u32[24] 0x0579057B
-ATTR_PROC_TP_VITL_SPY_OFFSETS[3] u32[24] 0x06690669
-ATTR_PROC_TP_VITL_SPY_OFFSETS[4] u32[24] 0x066C0681
-ATTR_PROC_TP_VITL_SPY_OFFSETS[5] u32[24] 0x0683068F
-ATTR_PROC_TP_VITL_SPY_OFFSETS[6] u32[24] 0x06980797
-ATTR_PROC_TP_VITL_SPY_OFFSETS[7] u32[24] 0x07AB07D5
-ATTR_PROC_TP_VITL_SPY_OFFSETS[8] u32[24] 0x05DF05F0
-ATTR_PROC_TP_VITL_SPY_OFFSETS[9] u32[24] 0x03510379
-ATTR_PROC_TP_VITL_SPY_OFFSETS[10] u32[24] 0x02E80327
-ATTR_PROC_TP_VITL_SPY_OFFSETS[11] u32[24] 0xFFFFFFFF
-ATTR_PROC_TP_VITL_SPY_OFFSETS[12] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[13] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[14] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[15] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[16] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[17] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[18] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[19] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[20] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[21] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[22] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[23] u32[24] 0x00000000
diff --git a/src/usr/hwpf/hwp/tp_dbg_attributes/s1_20_tp_dbg_data.attributes b/src/usr/hwpf/hwp/tp_dbg_attributes/s1_20_tp_dbg_data.attributes
deleted file mode 100644
index 14c1c862b..000000000
--- a/src/usr/hwpf/hwp/tp_dbg_attributes/s1_20_tp_dbg_data.attributes
+++ /dev/null
@@ -1,28 +0,0 @@
-# $Id: s1_20_tp_dbg_data.attributes,v 1.1 2014/10/03 20:01:19 jmcgill Exp $
-
-ATTR_PROC_PERV_VITL_LENGTH u32 2288
-ATTR_PROC_TP_VITL_SPY_LENGTH u32 590
-ATTR_PROC_TP_VITL_SPY_OFFSETS[0] u32[24] 0x049804D7
-ATTR_PROC_TP_VITL_SPY_OFFSETS[1] u32[24] 0x05290540
-ATTR_PROC_TP_VITL_SPY_OFFSETS[2] u32[24] 0x0555055B
-ATTR_PROC_TP_VITL_SPY_OFFSETS[3] u32[24] 0x059605B0
-ATTR_PROC_TP_VITL_SPY_OFFSETS[4] u32[24] 0x05B905BB
-ATTR_PROC_TP_VITL_SPY_OFFSETS[5] u32[24] 0x05C705C7
-ATTR_PROC_TP_VITL_SPY_OFFSETS[6] u32[24] 0x05CA05DF
-ATTR_PROC_TP_VITL_SPY_OFFSETS[7] u32[24] 0x05E105F4
-ATTR_PROC_TP_VITL_SPY_OFFSETS[8] u32[24] 0x05FD06FC
-ATTR_PROC_TP_VITL_SPY_OFFSETS[9] u32[24] 0x0710073A
-ATTR_PROC_TP_VITL_SPY_OFFSETS[10] u32[24] 0x07650776
-ATTR_PROC_TP_VITL_SPY_OFFSETS[11] u32[24] 0x03510379
-ATTR_PROC_TP_VITL_SPY_OFFSETS[12] u32[24] 0x02E80327
-ATTR_PROC_TP_VITL_SPY_OFFSETS[13] u32[24] 0xFFFFFFFF
-ATTR_PROC_TP_VITL_SPY_OFFSETS[14] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[15] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[16] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[17] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[18] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[19] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[20] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[21] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[22] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[23] u32[24] 0x00000000
diff --git a/src/usr/hwpf/hwp/tp_dbg_attributes/s1_21_tp_dbg_data.attributes b/src/usr/hwpf/hwp/tp_dbg_attributes/s1_21_tp_dbg_data.attributes
deleted file mode 100644
index 1d95c38cf..000000000
--- a/src/usr/hwpf/hwp/tp_dbg_attributes/s1_21_tp_dbg_data.attributes
+++ /dev/null
@@ -1,28 +0,0 @@
-# $Id: s1_21_tp_dbg_data.attributes,v 1.1 2014/10/03 20:01:54 jmcgill Exp $
-
-ATTR_PROC_PERV_VITL_LENGTH u32 2288
-ATTR_PROC_TP_VITL_SPY_LENGTH u32 590
-ATTR_PROC_TP_VITL_SPY_OFFSETS[0] u32[24] 0x049804D7
-ATTR_PROC_TP_VITL_SPY_OFFSETS[1] u32[24] 0x05290540
-ATTR_PROC_TP_VITL_SPY_OFFSETS[2] u32[24] 0x0555055B
-ATTR_PROC_TP_VITL_SPY_OFFSETS[3] u32[24] 0x059605B0
-ATTR_PROC_TP_VITL_SPY_OFFSETS[4] u32[24] 0x05B905BB
-ATTR_PROC_TP_VITL_SPY_OFFSETS[5] u32[24] 0x05C705C7
-ATTR_PROC_TP_VITL_SPY_OFFSETS[6] u32[24] 0x05CA05DF
-ATTR_PROC_TP_VITL_SPY_OFFSETS[7] u32[24] 0x05E105F4
-ATTR_PROC_TP_VITL_SPY_OFFSETS[8] u32[24] 0x05FD06FC
-ATTR_PROC_TP_VITL_SPY_OFFSETS[9] u32[24] 0x0710073A
-ATTR_PROC_TP_VITL_SPY_OFFSETS[10] u32[24] 0x07650776
-ATTR_PROC_TP_VITL_SPY_OFFSETS[11] u32[24] 0x03510379
-ATTR_PROC_TP_VITL_SPY_OFFSETS[12] u32[24] 0x02E80327
-ATTR_PROC_TP_VITL_SPY_OFFSETS[13] u32[24] 0xFFFFFFFF
-ATTR_PROC_TP_VITL_SPY_OFFSETS[14] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[15] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[16] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[17] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[18] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[19] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[20] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[21] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[22] u32[24] 0x00000000
-ATTR_PROC_TP_VITL_SPY_OFFSETS[23] u32[24] 0x00000000
diff --git a/src/usr/hwpf/hwp/tp_dbg_data_accessors/getTpDbgDataAttr.C b/src/usr/hwpf/hwp/tp_dbg_data_accessors/getTpDbgDataAttr.C
deleted file mode 100644
index dc6aa588b..000000000
--- a/src/usr/hwpf/hwp/tp_dbg_data_accessors/getTpDbgDataAttr.C
+++ /dev/null
@@ -1,250 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/tp_dbg_data_accessors/getTpDbgDataAttr.C $   */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015                             */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: getTpDbgDataAttr.C,v 1.1 2015/05/07 20:11:12 thi Exp $
-/**
- *  @file getTpDbgDataAttr.C
- *
- *  @brief Fetch TP Debug data attributes based on chip EC
- *         from static arrays (fapiTpDbgDataAttr.H)
- *
- */
-
-#include <stdint.h>
-#include <fapi.H>
-#include <getTpDbgDataAttr.H>
-
-extern "C"
-{
-
-/**
- * @brief Internal utility function to verify if TP_DBG data is found for
- *        input target's type and EC level.
- *        Output the index number of the data array for the target.
- *
- * @param i_fapiTarget cpu target
- * @param o_index      The index where TP_DBG data is held for this target.
- *
- * @return fapi::ReturnCode -   FAPI_RC_SUCCESS if success,
- *                              relevant error code for failure.
- */
-fapi::ReturnCode verifyTpDbgData(const fapi::Target  &i_fapiTarget,
-                                 uint32_t & o_index)
-{
-    FAPI_INF("verifyTpDbgData: entry" );
-
-    // Define and initialize variables
-    uint8_t                    l_attrDdLevel = 0;
-    fapi::TargetType           l_targetType = fapi::TARGET_TYPE_NONE;
-    fapi::ATTR_NAME_Type       l_chipType = 0x00;
-    fapi::ReturnCode           rc;
-
-    do
-    {
-        // Verify input target is a processor
-        l_targetType = i_fapiTarget.getType();
-        if (l_targetType != fapi::TARGET_TYPE_PROC_CHIP)
-        {
-            FAPI_ERR("verifyTpDbgData: Invalid target type passed on "
-                     "invocation. target type=0x%08X ", 
-                      static_cast<uint32_t>(l_targetType));
-            // Return error on get attr
-            fapi::TargetType & TARGET_TYPE = l_targetType;
-            FAPI_SET_HWP_ERROR(rc, RC_GET_TP_DBG_DATA_PARAMETER_ERR );
-            break;
-        }
-
-        // Get chip type
-        rc = FAPI_ATTR_GET_PRIVILEGED(ATTR_NAME,
-                                      &i_fapiTarget,
-                                      l_chipType);
-        if (rc)
-        {
-            FAPI_ERR("verifyTpDbgData: FAPI_ATTR_GET_PRIVILEGED of "
-                     "ATTR_NAME failed w/rc=0x%08X", 
-                      static_cast<uint32_t>(rc));
-            break;
-        }
-
-        // Get EC level
-        rc = FAPI_ATTR_GET_PRIVILEGED(ATTR_EC,
-                                      &i_fapiTarget,
-                                      l_attrDdLevel);
-        // Exit on error
-        if (rc)
-        {
-            FAPI_ERR("verifyTpDbgData: FAPI_ATTR_GET_PRIVILEGED of "
-                     "ATTR_EC failed w/rc=0x%08X", static_cast<uint32_t>(rc));
-            break;
-        }
-
-        FAPI_INF("verifyTpDbgData:  Chip type=0x%02x EC=0x%02x ",
-                 l_chipType, l_attrDdLevel);
-
-        // Murano DD1.2 and DD1.0 are equivalent in terms of engineering data
-        if ((l_chipType == fapi::ENUM_ATTR_NAME_MURANO) &&
-            (l_attrDdLevel == 0x12))
-        {
-            FAPI_INF("verifyTpDbgData: Treating EC1.2 like EC1.0");
-            l_attrDdLevel = 0x10;
-        }
-
-        FAPI_INF("verifyTpDbgData: chiptype=0x%x EC=0x%x", l_chipType, l_attrDdLevel);
-        // Use chip & ec to select array entry and selection attr to select 
-        // data array entry
-        o_index = 0;
-        uint32_t ii = 0;
-        for (ii = 0;
-             ii < (sizeof(TP_DBG_DATA_array) / sizeof(TP_DBG_DATA_ATTR));
-             ii++)
-        {
-             if ((TP_DBG_DATA_array[ii].l_ATTR_CHIPTYPE == l_chipType) &&
-                 (TP_DBG_DATA_array[ii].l_ATTR_EC       == l_attrDdLevel))
-             {
-                 o_index = ii;
-                 break;
-             }
-        }
-
-        // No match found
-        if (ii == (sizeof(TP_DBG_DATA_array)/sizeof(TP_DBG_DATA_ATTR)))
-        {
-            FAPI_ERR("verifyTpDbgData:  No match found for chiptype=0x%x "
-                     "EC=0x%x", l_chipType, l_attrDdLevel);
-            // Return error on get attr
-            fapi::ATTR_NAME_Type & CHIP_NAME = l_chipType;
-            uint8_t & CHIP_EC = l_attrDdLevel;
-            FAPI_SET_HWP_ERROR(rc, RC_GET_TP_DBG_DATA_ERR );
-            break;
-        }
-        
-    } while (0);
-
-    FAPI_INF("verifyTpDbgData: exit rc=0x%x",
-             static_cast<uint32_t>(rc) );
-    return  rc;
-}
-
-
-/**
- * @brief Get processor TP VITL spy length for the specified target CPU.
- * See doxygen in .H file
- */
-fapi::ReturnCode getPervVitlRingLengthAttr(const fapi::Target  &i_fapiTarget,
-                                           uint32_t (&o_ringLength))
-{
-    FAPI_INF("getPervVitlRingLengthAttr: entry" );
-
-    // Initialize return values to 0x00
-    fapi::ReturnCode rc;
-    uint32_t l_dataIndex = 0;
-    o_ringLength = 0;
-
-    // Get attributes, currently there's only one array entry
-    do
-    {
-        rc = verifyTpDbgData(i_fapiTarget, l_dataIndex);
-        if (rc)
-        {
-            FAPI_ERR("getPervVitlRingLengthAttr: verifyTpDbgData() returns error");
-            break;
-        }
-        o_ringLength = TP_DBG_DATA_array [l_dataIndex].l_ATTR_RING_LENGTH;
-        FAPI_INF("getPervVitlRingLengthAttr: index %d, o_ringLength=%d",
-                 l_dataIndex, o_ringLength);
-    } while (0);
-
-    FAPI_INF("getPervVitlRingLengthAttr: exit rc=0x%x",
-             static_cast<uint32_t>(rc) );
-    return  rc;
-}
-
-
-/**
- * @brief Get processor PERV VITL ring length for the specified target CPU.
- * See doxygen in .H file
- */
-fapi::ReturnCode getTpVitlSpyLengthAttr(const fapi::Target  &i_fapiTarget,
-                                        uint32_t (&o_spyLength))
-{
-    FAPI_INF("getTpVitlSpyLengthAttr: entry" );
-
-    // Initialize return values to 0x00
-    uint32_t l_dataIndex = 0;
-    fapi::ReturnCode rc;
-
-    // Get attributes, currently there's only one array entry
-    do
-    {
-        rc = verifyTpDbgData(i_fapiTarget, l_dataIndex);
-        if (rc)
-        {
-            FAPI_ERR("getTpVitlSpyLengthAttr: verifyTpDbgData() returns error");
-            break;
-        }
-        o_spyLength = TP_DBG_DATA_array [l_dataIndex].l_ATTR_SPY_LENGTH;
-        FAPI_INF("getTpVitlSpyLengthAttr: index %d, o_spyLength=%d",
-                 l_dataIndex, o_spyLength);
-    } while (0);
-
-    FAPI_INF("getTpVitlSpyLengthAttr: exit rc=0x%x",
-             static_cast<uint32_t>(rc) );
-    return  rc;
-}
-
-
-/**
- * @brief Get processor TP VITL spy offsets for the specified target CPU.
- * See doxygen in .H file
- */
-fapi::ReturnCode getTpVitlSpyOffsetAttr(const fapi::Target  &i_fapiTarget,
-                                        uint32_t (&o_data)[SPY_OFFSET_SIZE])
-{
-    FAPI_INF("getTpVitlSpyOffsetAttr: entry" );
-
-    // Initialize return values to 0x00
-    fapi::ReturnCode rc;
-    uint32_t l_dataIndex = 0;
-    memset(o_data, 0x00, sizeof(o_data));
-
-    // Get attributes, currently there's only one array entry
-    do
-    {
-        rc = verifyTpDbgData(i_fapiTarget, l_dataIndex);
-        if (rc)
-        {
-            FAPI_ERR("getTpVitlSpyOffsetAttr: verifyTpDbgData() returns error");
-            break;
-        }
-        memcpy(o_data, TP_DBG_DATA_array[l_dataIndex].l_ATTR_TP_DBG_DATA,
-               sizeof(o_data));
-    } while (0);
-
-    FAPI_INF("getTpVitlSpyOffsetAttr: exit rc=0x%x",
-             static_cast<uint32_t>(rc) );
-    return  rc;
-}
-
-}   // extern "C"
-
diff --git a/src/usr/hwpf/hwp/tp_dbg_data_accessors/proc_tp_dbg_data_errors.xml b/src/usr/hwpf/hwp/tp_dbg_data_accessors/proc_tp_dbg_data_errors.xml
deleted file mode 100644
index 1efc6218c..000000000
--- a/src/usr/hwpf/hwp/tp_dbg_data_accessors/proc_tp_dbg_data_errors.xml
+++ /dev/null
@@ -1,61 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/tp_dbg_data_accessors/proc_tp_dbg_data_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2015                             -->
-<!-- [+] International Business Machines Corp.                              -->
-<!--                                                                        -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_tp_dbg_data_errors.xml,v 1.1 2015/05/07 20:11:12 thi Exp $ -->
-<!-- Error definitions for getTpDbgDataAttr procedures -->
-
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_GET_TP_DBG_DATA_ERR</rc>
-    <description>No matching entry was found for requested chip type and EC level.</description>
-    <ffdc>CHIP_NAME</ffdc>
-    <ffdc>CHIP_EC</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_GET_TP_DBG_DATA_PARAMETER_ERR</rc>
-    <description>Invalid target type passed on invocation.</description>
-    <ffdc>TARGET_TYPE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <hwpError>
-    <rc>RC_GET_TP_DEBUG_DATA_ERR</rc>
-    <description>No matching entry was found for requested chip type and EC level.</description>
-    <ffdc>CHIP_NAME</ffdc>
-    <ffdc>CHIP_EC</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/tp_dbg_data_accessors/tp_dbg.mk b/src/usr/hwpf/hwp/tp_dbg_data_accessors/tp_dbg.mk
deleted file mode 100644
index ec4dc60dd..000000000
--- a/src/usr/hwpf/hwp/tp_dbg_data_accessors/tp_dbg.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/hwp/tp_dbg_data_accessors/tp_dbg.mk $
-#
-# OpenPOWER HostBoot Project
-#
-# Contributors Listed Below - COPYRIGHT 2015
-# [+] International Business Machines Corp.
-#
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp/tp_dbg_data_accessors
-
-VPATH += ${HWPPATH}/tp_dbg_data_accessors
-
-OBJS += getTpDbgDataAttr.o
-
diff --git a/src/usr/hwpf/hwp/unit_attributes.xml b/src/usr/hwpf/hwp/unit_attributes.xml
deleted file mode 100644
index b3b230e79..000000000
--- a/src/usr/hwpf/hwp/unit_attributes.xml
+++ /dev/null
@@ -1,45 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/unit_attributes.xml $                        -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- XML file specifying Unit attributes used by HW Procedures. -->
-<attributes>
-
-<attribute>
-    <id>ATTR_CHIP_UNIT_POS</id>
-    <targetType>
-        TARGET_TYPE_EX_CHIPLET, TARGET_TYPE_MBA_CHIPLET, TARGET_TYPE_MCS_CHIPLET
-    </targetType>
-    <description>
-        A unit's position within the chip with respect to similar units.
-        This data is from the MRW.
-        It not always 0, 1, 2, 3... For example:
-          MCS units in Murano are 4, 5, 6, 7
-          EX units in Murano are 4, 5, 6, 12, 13, 14
-          MCS units in Venice are 0, 1, 2, 3, 4, 5, 6, 7
-          EX units in Venice are 1, 2, 3, 4, 5, 6, 9, 10, 11, 12, 13, 14
-          MBA units in Centaur are 0, 1
-    </description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-</attributes>
diff --git a/src/usr/hwpf/hwp/winkle_ring_accessors/getL3DeltaDataAttr.C b/src/usr/hwpf/hwp/winkle_ring_accessors/getL3DeltaDataAttr.C
deleted file mode 100755
index 787d4f5a6..000000000
--- a/src/usr/hwpf/hwp/winkle_ring_accessors/getL3DeltaDataAttr.C
+++ /dev/null
@@ -1,184 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/hwp/winkle_ring_accessors/getL3DeltaDataAttr.C $ */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2013,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: getL3DeltaDataAttr.C,v 1.5 2014/03/20 16:24:48 whs Exp $
-/**
- *  @file getL3DeltaDataAttr.C
- *
- *  @brief fetch processor ex func l3 delta data attributes based on chip type, 
- *  EC and PROC_PBIEX_ASYNC_SEL value from static arrays in 
- *  fapiL3DeltaDataAttr.H
- *
- */
-
-#include    <stdint.h>
-
-//  fapi support
-#include    <fapi.H>
-#include    <getL3DeltaDataAttr.H>
-#include    <fapiL3DeltaDataAttr.H>
-
-// Logic overview
-
-// Define and initialize variables
-// Get chip type
-// Get EC level
-// Get PROC_PBIEX_ASYNC_SEL attr
-// Use chip & ec to select array entry and selection attr to select data array 
-//   entry
-// Set return delta data attr value
-
-extern "C"
-{
-
-fapi::ReturnCode getL3DeltaDataAttr( const fapi::Target  &i_fapiTarget,
-                                     uint32_t (&o_data)[DELTA_DATA_SIZE],
-                                     uint32_t (&o_ringLength))
-{
-     FAPI_INF("getL3DeltaDataAttr: entry" );
-
-     // Initialize return values to 0x00
-     memset(o_data, 0x00, sizeof(o_data));
-     o_ringLength = 0;
-
-     // Define and initialize variables
-
-     uint8_t                    i = 0;
-     uint8_t                    l_attrDdLevel = 0;
-     fapi::TargetType           l_targetType = fapi::TARGET_TYPE_NONE;
-     fapi::ATTR_NAME_Type       l_chipType = 0x00;
-     fapi::ATTR_PROC_PBIEX_ASYNC_SEL_Type l_selection = 0;
-     fapi::ReturnCode           rc;
-
-     // Get attributes used to determine delta data
-
-     do
-     {
-         // Verify input target is a processor
-         l_targetType = i_fapiTarget.getType();
-         if (l_targetType != fapi::TARGET_TYPE_PROC_CHIP)
-         {
-             FAPI_ERR("getL3DeltaDataAttr:  Invalid target type passed on "
-                      "invocation. target type=0x%08X ", 
-                       static_cast<uint32_t>(l_targetType));
-             // Return error on get attr
-             fapi::TargetType & TARGET_TYPE = l_targetType;
-             FAPI_SET_HWP_ERROR(rc, RC_GET_L3_DELTA_DATA_PARAMETER_ERR );
-             break;
-         }
-
-         // Get chip type
-         rc = FAPI_ATTR_GET_PRIVILEGED(ATTR_NAME,
-                                       &i_fapiTarget,
-                                       l_chipType);
-         if (rc)
-         {
-             FAPI_ERR("getL3DeltaDataAttr: FAPI_ATTR_GET_PRIVILEGED of "
-                      "ATTR_NAME failed w/rc=0x%08X", 
-                       static_cast<uint32_t>(rc));
-             break;
-         }
-
-         // Get EC level
-         rc = FAPI_ATTR_GET_PRIVILEGED(ATTR_EC,
-                                       &i_fapiTarget,
-                                       l_attrDdLevel);
-         // Exit on error
-         if (rc)
-         {
-             FAPI_ERR("getL3DeltaDataAttr: FAPI_ATTR_GET_PRIVILEGED of "
-                      "ATTR_EC failed w/rc=0x%08X", static_cast<uint32_t>(rc));
-             break;
-         }
-
-         // Get proc_pbiex_async_sel
-         rc = FAPI_ATTR_GET(ATTR_PROC_PBIEX_ASYNC_SEL,
-                            NULL,
-                            l_selection);
-         // Exit on error
-         if (rc)
-         {
-             FAPI_ERR("getL3DeltaDataAttr: FAPI_ATTR_GET of "
-                      "ATTR_PROC_PBIEX_ASYNC_SEL failed w/rc=0x%08X", 
-                       static_cast<uint32_t>(rc));
-             break;
-         }
-         // Check for valid value
-         if ((l_selection != fapi::ENUM_ATTR_PROC_PBIEX_ASYNC_SEL_SEL0) &&
-             (l_selection != fapi::ENUM_ATTR_PROC_PBIEX_ASYNC_SEL_SEL1) &&
-             (l_selection != fapi::ENUM_ATTR_PROC_PBIEX_ASYNC_SEL_SEL2)) 
-         {
-             FAPI_ERR("getL3DeltaDataAttr:  FAPI_ATTR_GET() returned "
-                      "unsupported value ATTR_PROC_PBIEX_ASYNC_SEL=0x%02x", 
-                       l_selection);
-             fapi::ATTR_PROC_PBIEX_ASYNC_SEL_Type & SELECT_VAL = l_selection;
-             FAPI_SET_HWP_ERROR(rc, RC_GET_L3_DELTA_DATA_SELECT_ERR );
-             break;
-         }
-
-         FAPI_INF("getL3DeltaDataAttr:  Chip type=0x%02x EC=0x%02x "
-                  "ATTR_PROC_PBIEX_ASYNC_SEL = %i",
-                  l_chipType, l_attrDdLevel, l_selection);
-
-         // Murano DD1.2 and DD1.0 are equivalent in terms of engineering data
-         if ((l_chipType == fapi::ENUM_ATTR_NAME_MURANO) &&
-             (l_attrDdLevel == 0x12))
-         {
-             FAPI_INF("getL3DeltaDataAttr: Treating EC1.2 like EC1.0");
-             l_attrDdLevel = 0x10;
-         }
-
-         // Use chip & ec to select array entry and selection attr to select 
-         // data array entry
-         for (i = 0; ((i < (sizeof(L3_DELTA_DATA_array) / 
-                            sizeof(L3_DELTA_DATA_ATTR))) &&
-             ((L3_DELTA_DATA_array[i].l_ATTR_CHIPTYPE != l_chipType) ||
-              (L3_DELTA_DATA_array[i].l_ATTR_EC       != l_attrDdLevel) ||
-              (L3_DELTA_DATA_array[i].l_ATTR_SELECT   != l_selection))); i++)
-         { }
-         // No match found
-         if (i == (sizeof(L3_DELTA_DATA_array)/sizeof(L3_DELTA_DATA_ATTR)))
-         {
-             FAPI_ERR("getL3DeltaDataAttr:  No match found for chiptype=0x%x "
-                      "EC=0x%x selection=%d", 
-                      l_chipType, l_attrDdLevel, l_selection);
-             // Return error on get attr
-             fapi::ATTR_NAME_Type & CHIP_NAME = l_chipType;
-             uint8_t & CHIP_EC = l_attrDdLevel;
-             FAPI_SET_HWP_ERROR(rc, RC_GET_L3_DELTA_DATA_ERR );
-             break;
-         }
-
-         // Set return delta data attr value
-         memcpy(o_data,L3_DELTA_DATA_array[i].l_ATTR_L3_DELTA_DATA,
-                sizeof(o_data));
-         o_ringLength = L3_DELTA_DATA_array[i].l_ATTR_BIT_LENGTH;
-
-     } while (0);
-
-     FAPI_INF("getL3DeltaDataAttr: exit rc=0x%x", static_cast<uint32_t>(rc) );
-
-     return  rc;
-}
-
-}   // extern "C"
-
diff --git a/src/usr/hwpf/hwp/winkle_ring_accessors/n1_10_winkle_ring.attributes b/src/usr/hwpf/hwp/winkle_ring_accessors/n1_10_winkle_ring.attributes
deleted file mode 100644
index 6d92a0afe..000000000
--- a/src/usr/hwpf/hwp/winkle_ring_accessors/n1_10_winkle_ring.attributes
+++ /dev/null
@@ -1,274 +0,0 @@
-# $Id: n1_10_winkle_ring.attributes,v 1.1 2014/11/06 22:44:21 szhong Exp $
-#===============================================================================BEGIN Entry
-#
-#SELECT=0
-#PU_EX_DPLL_FREQ = 4800
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10000
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10000
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  49198
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14C00020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14C30002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14C50002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14C60080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14D50020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14D80002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x14DA0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x14DB0080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x15770078
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x15F2001E
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x168A0009
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x168B0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x168C0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x16EE0010
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x16EF0020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x16F60009
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x16F70002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x16F80040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x17DE0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x17EA0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x17ED0024
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x17F50040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x18010040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x18040024
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
-#===============================================================================BEGIN Entry
-#
-#SELECT=1
-#PU_EX_DPLL_FREQ = 2400
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  49198
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14C00020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14C30002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14C50002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14C60080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14D50020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14D80002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x14DA0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x14DB0080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x15770078
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x15F2001E
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x168A0005
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x168B0001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x168C0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x16EE0090
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x16EF00A0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x16F60005
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x16F70001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x16F80040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x17DE0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x17EA0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x17ED0024
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x17F50040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x18010040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x18040024
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
-#===============================================================================BEGIN Entry
-#
-#SELECT=2
-#PU_EX_DPLL_FREQ = 1200
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  49198
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14C00020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14C30002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14C50002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14C60080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14D50020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14D80002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x14DA0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x14DB0080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x168A000D
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x168B0003
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x168C0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x16F6000D
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x16F70003
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x16F80040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x17DE0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x17EA0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x17ED0024
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x17F50040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x18010040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x18040024
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
diff --git a/src/usr/hwpf/hwp/winkle_ring_accessors/p8_10_winkle_ring.attributes b/src/usr/hwpf/hwp/winkle_ring_accessors/p8_10_winkle_ring.attributes
deleted file mode 100644
index b604d10b3..000000000
--- a/src/usr/hwpf/hwp/winkle_ring_accessors/p8_10_winkle_ring.attributes
+++ /dev/null
@@ -1,274 +0,0 @@
-# $Id: p8_10_winkle_ring.attributes,v 1.3 2014/03/20 02:43:32 jmcgill Exp $
-#===============================================================================BEGIN Entry
-#
-#SELECT=0
-#PU_EX_DPLL_FREQ = 4800
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10000
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10000
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  49022
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14AA0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14AE0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14B00050
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14BF0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14C30040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14C50050
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x15610078
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x15DC001E
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x16740009
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x16750002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x16760040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x16D80010
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x16D90020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x16E00009
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x16E10002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x16E20040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x17C80040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x17D40040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x17D70024
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x17DF0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x17EB0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x17EE0024
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
-#===============================================================================BEGIN Entry
-#
-#SELECT=1
-#PU_EX_DPLL_FREQ = 2400
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  49022
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14AA0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14AE0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14B00050
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14BF0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14C30040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14C50050
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x15610078
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x15DC001E
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x16740005
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x16750001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x16760040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x16D80090
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x16D900A0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x16E00005
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x16E10001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x16E20040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x17C80040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x17D40040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x17D70024
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x17DF0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x17EB0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x17EE0024
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
-#===============================================================================BEGIN Entry
-#
-#SELECT=2
-#PU_EX_DPLL_FREQ = 1200
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  49022
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14AA0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14AE0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14B00050
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14BF0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14C30040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14C50050
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x1674000D
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x16750003
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x16760040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x16E0000D
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x16E10003
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x16E20040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x17C80040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x17D40040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x17D70024
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x17DF0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x17EB0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x17EE0024
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
diff --git a/src/usr/hwpf/hwp/winkle_ring_accessors/p8_20_winkle_ring.attributes b/src/usr/hwpf/hwp/winkle_ring_accessors/p8_20_winkle_ring.attributes
deleted file mode 100644
index 46913a36b..000000000
--- a/src/usr/hwpf/hwp/winkle_ring_accessors/p8_20_winkle_ring.attributes
+++ /dev/null
@@ -1,274 +0,0 @@
-# $Id: p8_20_winkle_ring.attributes,v 1.3 2014/03/20 02:46:32 jmcgill Exp $
-#===============================================================================BEGIN Entry
-#
-#SELECT=0
-#PU_EX_DPLL_FREQ = 4800
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10000
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10000
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  49195
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14C00020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14C30002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14C50002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14C60080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14D50020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14D80002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x14DA0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x14DB0080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x15760003
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x157700C0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x15F200F0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x168A0048
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x168B0012
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x16EE0081
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x16F60048
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x16F70012
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x17DD0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x17E90002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x17EC0001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x17ED0020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x17F40002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x18000002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x18030001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x18040020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
-#===============================================================================BEGIN Entry
-#
-#SELECT=1
-#PU_EX_DPLL_FREQ = 2400
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  49195
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14C00020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14C30002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14C50002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14C60080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14D50020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14D80002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x14DA0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x14DB0080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x15760003
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x157700C0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x15F200F0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x168A0028
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x168B000A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x16ED0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x16EE0085
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x16F60028
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x16F7000A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x17DD0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x17E90002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x17EC0001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x17ED0020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x17F40002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x18000002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x18030001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0x18040020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
-#===============================================================================BEGIN Entry
-#
-#SELECT=2
-#PU_EX_DPLL_FREQ = 1200
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  49195
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14C00020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14C30002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14C50002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14C60080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14D50020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14D80002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x14DA0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x14DB0080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x168A0068
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x168B001A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x16F60068
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x16F7001A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x17DD0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x17E90002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x17EC0001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x17ED0020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x17F40002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x18000002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x18030001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x18040020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
diff --git a/src/usr/hwpf/hwp/winkle_ring_accessors/proc_l3_delta_data_errors.xml b/src/usr/hwpf/hwp/winkle_ring_accessors/proc_l3_delta_data_errors.xml
deleted file mode 100755
index d7c173103..000000000
--- a/src/usr/hwpf/hwp/winkle_ring_accessors/proc_l3_delta_data_errors.xml
+++ /dev/null
@@ -1,58 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
-<!-- This is an automatically generated prolog.                             -->
-<!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/winkle_ring_accessors/proc_l3_delta_data_errors.xml $ -->
-<!--                                                                        -->
-<!-- OpenPOWER HostBoot Project                                             -->
-<!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2013,2014              -->
-<!--                                                                        -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
-<!-- you may not use this file except in compliance with the License.       -->
-<!-- You may obtain a copy of the License at                                -->
-<!--                                                                        -->
-<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
-<!--                                                                        -->
-<!-- Unless required by applicable law or agreed to in writing, software    -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
-<!-- implied. See the License for the specific language governing           -->
-<!-- permissions and limitations under the License.                         -->
-<!--                                                                        -->
-<!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_l3_delta_data_errors.xml,v 1.2 2013/12/11 22:49:43 mjjones Exp $ -->
-<!-- Error definitions for getL3DeltaData  procedure -->
-<hwpErrors>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_GET_L3_DELTA_DATA_ERR</rc>
-    <description>No matching entry was found for requested chip type and EC level.</description>
-    <ffdc>CHIP_NAME</ffdc>
-    <ffdc>CHIP_EC</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <hwpError>
-    <rc>RC_GET_L3_DELTA_DATA_PARAMETER_ERR</rc>
-    <description>Invalid target type passed on invocation.</description>
-    <ffdc>TARGET_TYPE</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-  <hwpError>
-    <rc>RC_GET_L3_DELTA_DATA_SELECT_ERR</rc>
-    <description>
-        The ATTR_PROC_PBIEX_ASYNC_SEL attribute, used to select the correct
-        data to return is not valid.
-    </description>
-    <ffdc>SELECT_VAL</ffdc>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
-  </hwpError>
-</hwpErrors>
diff --git a/src/usr/hwpf/hwp/winkle_ring_accessors/s1_10_winkle_ring.attributes b/src/usr/hwpf/hwp/winkle_ring_accessors/s1_10_winkle_ring.attributes
deleted file mode 100644
index 4af3ba016..000000000
--- a/src/usr/hwpf/hwp/winkle_ring_accessors/s1_10_winkle_ring.attributes
+++ /dev/null
@@ -1,274 +0,0 @@
-# $Id: s1_10_winkle_ring.attributes,v 1.6 2014/03/20 02:38:43 jmcgill Exp $
-#===============================================================================BEGIN Entry
-#
-#SELECT=0
-#PU_EX_DPLL_FREQ = 4800
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10000
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10000
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  48826
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14920040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14950004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14970005
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14A70040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14AA0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14AC0005
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x15480007
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x15490080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x15C30001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x15C400E0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x165C0090
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x165D0024
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x16BF0001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x16C00002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x16C80090
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x16C90024
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x17AF0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x17BB0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x17BE0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x17BF0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x17C60004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x17D20004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x17D50002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x17D60040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
-#===============================================================================BEGIN Entry
-#
-#SELECT=1
-#PU_EX_DPLL_FREQ = 2400
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  48826
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14920040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14950004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14970005
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14A70040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14AA0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14AC0005
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x15480007
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x15490080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x15C30001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x15C400E0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x165C0050
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x165D0014
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x16BF0009
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x16C0000A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x16C80050
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x16C90014
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x17AF0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x17BB0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x17BE0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x17BF0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x17C60004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x17D20004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x17D50002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x17D60040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
-#===============================================================================BEGIN Entry
-#
-#SELECT=2
-#PU_EX_DPLL_FREQ = 1200
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  48826
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14920040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14950004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14970005
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14A70040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14AA0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14AC0005
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x165C00D0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x165D0034
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x16C800D0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x16C90034
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x17AF0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x17BB0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x17BE0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x17BF0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x17C60004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x17D20004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x17D50002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x17D60040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
diff --git a/src/usr/hwpf/hwp/winkle_ring_accessors/s1_13_winkle_ring.attributes b/src/usr/hwpf/hwp/winkle_ring_accessors/s1_13_winkle_ring.attributes
deleted file mode 100644
index b80e6de98..000000000
--- a/src/usr/hwpf/hwp/winkle_ring_accessors/s1_13_winkle_ring.attributes
+++ /dev/null
@@ -1,274 +0,0 @@
-# $Id: s1_13_winkle_ring.attributes,v 1.3 2014/03/20 02:40:36 jmcgill Exp $
-#===============================================================================BEGIN Entry
-#
-#SELECT=0
-#PU_EX_DPLL_FREQ = 4800
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10000
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10000
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  48826
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14920040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14950004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14970005
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14A70040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14AA0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14AC0005
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x15480007
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x15490080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x15C30001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x15C400E0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x165C0090
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x165D0024
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x16BF0001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x16C00002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x16C80090
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x16C90024
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x17AF0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x17BB0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x17BE0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x17BF0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x17C60004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x17D20004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x17D50002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x17D60040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
-#===============================================================================BEGIN Entry
-#
-#SELECT=1
-#PU_EX_DPLL_FREQ = 2400
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  48826
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14920040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14950004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14970005
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14A70040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14AA0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14AC0005
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x15480007
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x15490080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x15C30001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x15C400E0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x165C0050
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x165D0014
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x16BF0009
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x16C0000A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x16C80050
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x16C90014
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x17AF0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x17BB0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x17BE0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x17BF0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x17C60004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x17D20004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x17D50002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x17D60040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
-#===============================================================================BEGIN Entry
-#
-#SELECT=2
-#PU_EX_DPLL_FREQ = 1200
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  48826
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14920040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14950004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14970005
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14A70040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14AA0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14AC0005
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x165C00D0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x165D0034
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x16C800D0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x16C90034
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x17AF0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x17BB0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x17BE0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x17BF0040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x17C60004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x17D20004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x17D50002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x17D60040
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
diff --git a/src/usr/hwpf/hwp/winkle_ring_accessors/s1_20_winkle_ring.attributes b/src/usr/hwpf/hwp/winkle_ring_accessors/s1_20_winkle_ring.attributes
deleted file mode 100644
index 1ca618a7d..000000000
--- a/src/usr/hwpf/hwp/winkle_ring_accessors/s1_20_winkle_ring.attributes
+++ /dev/null
@@ -1,274 +0,0 @@
-# $Id: s1_20_winkle_ring.attributes,v 1.3 2014/03/20 02:41:15 jmcgill Exp $
-#===============================================================================BEGIN Entry
-#
-#SELECT=0
-#PU_EX_DPLL_FREQ = 4800
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10000
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10000
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  49193
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14C00080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14C30008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14C5000A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14D50080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14D80008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14DA000A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x1576000F
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x15F10003
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x15F200C0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x16890001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x168A0020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x168B0048
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x16ED0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x16EE0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x16F50001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x16F60020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x16F70048
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x17DD0008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x17E90008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x17EC0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x17ED0080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x17F40008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x18000008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x18030004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0x18040080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
-#===============================================================================BEGIN Entry
-#
-#SELECT=1
-#PU_EX_DPLL_FREQ = 2400
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  49193
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14C00080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14C30008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14C5000A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14D50080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14D80008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14DA000A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x1576000F
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x15F10003
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x15F200C0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x168A00A0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x168B0028
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x16ED0012
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x16EE0014
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x16F600A0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x16F70028
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x17DD0008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x17E90008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x17EC0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x17ED0080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x17F40008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x18000008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x18030004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x18040080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
-#===============================================================================BEGIN Entry
-#
-#SELECT=2
-#PU_EX_DPLL_FREQ = 1200
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  49193
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14C00080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14C30008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14C5000A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14D50080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14D80008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14DA000A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x16890001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x168A00A0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x168B0068
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x16F50001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x16F600A0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x16F70068
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x17DD0008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x17E90008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x17EC0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x17ED0080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x17F40008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x18000008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x18030004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x18040080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
diff --git a/src/usr/hwpf/hwp/winkle_ring_accessors/s1_21_winkle_ring.attributes b/src/usr/hwpf/hwp/winkle_ring_accessors/s1_21_winkle_ring.attributes
deleted file mode 100644
index 0b9fad3be..000000000
--- a/src/usr/hwpf/hwp/winkle_ring_accessors/s1_21_winkle_ring.attributes
+++ /dev/null
@@ -1,274 +0,0 @@
-# $Id: s1_21_winkle_ring.attributes,v 1.3 2014/03/20 02:41:48 jmcgill Exp $
-#===============================================================================BEGIN Entry
-#
-#SELECT=0
-#PU_EX_DPLL_FREQ = 4800
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10000
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10000
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10010
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  49193
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14C00080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14C30008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14C5000A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14D50080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14D80008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14DA000A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x1576000F
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x15F10003
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x15F200C0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x16890001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x168A0020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x168B0048
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x16ED0002
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x16EE0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x16F50001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x16F60020
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x16F70048
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x17DD0008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x17E90008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x17EC0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x17ED0080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x17F40008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x18000008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x18030004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0x18040080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
-#===============================================================================BEGIN Entry
-#
-#SELECT=1
-#PU_EX_DPLL_FREQ = 2400
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CMD1_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.DATA0_C2I_SND_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b11000
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  49193
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14C00080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14C30008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14C5000A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14D50080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14D80008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14DA000A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x1576000F
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x15F10003
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x15F200C0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x168A00A0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x168B0028
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x16ED0012
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x16EE0014
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x16F600A0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x16F70028
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x17DD0008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x17E90008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x17EC0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x17ED0080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x17F40008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0x18000008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x18030004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x18040080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
-#===============================================================================BEGIN Entry
-#
-#SELECT=2
-#PU_EX_DPLL_FREQ = 1200
-#PU_NEST_FREQ = 2400
-#------------------------------------------------------------------------------- Ring String View
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.CRSP1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:3) 0b1010
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.DATA1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:4) 0b10110
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD0_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.PB_CFG_MODEQ.ESC.L2(0:5) 0b100100
-#    EHP.EX.RCMD1_I2C_RCV_CTL.SERIAL_MODEQ.SHIFT_DATAQ.ESC.L2(0:5) 0b100100
-#------------------------------------------------------------------------------- Attribute View
-
-ATTR_PROC_EX_FUNC_L3_LENGTH u32  49193
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[0] u32[64]  0x14C00080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[1] u32[64]  0x14C30008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[2] u32[64]  0x14C5000A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[3] u32[64]  0x14D50080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[4] u32[64]  0x14D80008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[5] u32[64]  0x14DA000A
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[6] u32[64]  0x16890001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[7] u32[64]  0x168A00A0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[8] u32[64]  0x168B0068
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[9] u32[64]  0x16F50001
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[10] u32[64]  0x16F600A0
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[11] u32[64]  0x16F70068
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[12] u32[64]  0x17DD0008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[13] u32[64]  0x17E90008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[14] u32[64]  0x17EC0004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[15] u32[64]  0x17ED0080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[16] u32[64]  0x17F40008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[17] u32[64]  0x18000008
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[18] u32[64]  0x18030004
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[19] u32[64]  0x18040080
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[20] u32[64]  0xFFFF0000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[21] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[22] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[23] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[24] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[25] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[26] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[27] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[28] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[29] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[30] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[31] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[32] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[33] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[34] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[35] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[36] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[37] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[38] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[39] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[40] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[41] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[42] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[43] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[44] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[45] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[46] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[47] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[48] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[49] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[50] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[51] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[52] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[53] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[54] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[55] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[56] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[57] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[58] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[59] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[60] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[61] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[62] u32[64]  0x00000000
-ATTR_PROC_EX_FUNC_L3_DELTA_DATA[63] u32[64]  0x00000000
-#===============================================================================END   Entry
-
diff --git a/src/usr/hwpf/hwp/winkle_ring_accessors/winkle_ring.mk b/src/usr/hwpf/hwp/winkle_ring_accessors/winkle_ring.mk
deleted file mode 100644
index ac15de95b..000000000
--- a/src/usr/hwpf/hwp/winkle_ring_accessors/winkle_ring.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/hwp/winkle_ring_accessors/winkle_ring.mk $
-#
-# OpenPOWER HostBoot Project
-#
-# COPYRIGHT International Business Machines Corp. 2013,2014
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp/winkle_ring_accessors
-
-VPATH += ${HWPPATH}/winkle_ring_accessors
-
-OBJS += getL3DeltaDataAttr.o
-
diff --git a/src/usr/hwpf/ifcompiler/initCompiler.C b/src/usr/hwpf/ifcompiler/initCompiler.C
deleted file mode 100755
index 0ea6dfb7d..000000000
--- a/src/usr/hwpf/ifcompiler/initCompiler.C
+++ /dev/null
@@ -1,354 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/ifcompiler/initCompiler.C $                      */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// Change Log *************************************************************************************
-//                                                                      
-//  Flag   Track    Userid   Date     Description                
-//  ----- -------- -------- -------- -------------------------------------------------------------
-//         D754106 dgilbert 06/14/10 Create
-//  dg002 SW039868 dgilbert 10/15/10 Add support to filter unneeded inits by EC
-//  dg003  D779902 dgilbert 12/08/10 Add ability to specify ouput if file
-//                 andrewg  05/24/11 Port over for VPL/PgP
-//                 andrewg  09/19/11 Updates based on review
-//                 mjjones  11/17/11 Output attribute listing
-//                 camvanng 04/12/12 Ability to specify search paths for include files
-//                 camvanng 06/27/12 Improve error and debug tracing
-// End Change Log *********************************************************************************
-// $Id: initCompiler.C,v 1.4 2014/06/27 19:59:45 thi Exp $
-/**
- * @file initCompiler.C
- * @brief Compile an initfile into bytecode.
- */
-#include <stdint.h>
-#include <stdio.h>
-#include <string>
-#include <sstream>
-#include <iostream>
-#include <fstream>
-#include <iomanip>
-#include <map>
-#include <stdexcept>
-#include <initCompiler.H>
-#include <initRpn.H>
-#include <initSymbols.H>
-#include <initScom.H>
-//#include <initSpy.H>
-
-using namespace init;
-using namespace std;
-
-//Globals
-
-int yyline = 1;
-init::ScomList * yyscomlist = NULL;
-vector<string> yyincludepath;  //path to search for include files
-vector<string> yyfname;        //list of initfile/define files being parsed
-string dbg_fname;              //file to dump dbg stringstream
-
-ostringstream init::dbg;
-ostringstream init::erros;
-ostringstream init::stats;   // TODO move to Parser
-
-// Main
-int main(int narg, char ** argv)
-{
-    int rc = 0;
-
-#if 0
-    yyin = fopen("sample.initfile","r");
-    if(!yyin)
-    {
-        std::cerr << "\nERROR: Failed to open sample.initfile! " << std::endl;
-        exit(-1);
-    }
-    yyparse();
-    fclose(yyin);
-#endif
-
-    try
-    {
-        // Parser: 
-        //   - Parse args
-        //   - Set up source location and source type
-        //   - Load & parse Symbols & Spy/Array tables
-        //   - Load & parse the initfile (if there is one)
-        //
-        Parser parsed(narg,argv);
-
-        string initfile = parsed.source_fn();
-        uint32_t type = parsed.get_source_type();
-
-        BINSEQ bin_seq;
-        bin_seq.reserve(0x38000);
-
-        if(type == Parser::IF_TYPE)  // input is binary *.if file - build listing from it.
-        {
-
-            //for(SPY_LIST::iterator i = yyspylist->begin(); i != yyspylist->end(); ++i)
-            //{
-            //    cout << (*i)->listing() << endl;
-            //}
-
-            ifstream ifs(initfile.c_str(), ios_base::in | ios_base::binary);
-            if(!ifs)
-            {
-                std::ostringstream msg;
-                msg << "initCompiler.C: main: Could not open " << initfile << endl;
-                throw invalid_argument(msg.str());
-            }
-            while(1)
-            {
-                int ch = ifs.get();
-                if (!(ifs.good())) break;
-                bin_seq.push_back(ch);
-            }
-            ifs.close();
-
-            yyscomlist->listing(bin_seq, cout);
-
-            erros << yyscomlist->get_symbols()->not_found_listing();
-
-        }
-        else // normal initfile processing
-        {
-            // Already parsed
-            yyscomlist->compile(bin_seq);
-
-
-            std::cerr << "Compiled size = " << std::dec << bin_seq.size() << endl;
-
-            // if there are missing symbols, SpyList::listing() will add duplicates
-            // So get the listing now
-            erros << yyscomlist->get_symbols()->not_found_listing();
-
-            string if_fn = parsed.binseq_fn();
-            ofstream ofs(if_fn.c_str(), ios_base::out | ios_base::binary);
-            if(!ofs)
-            {
-                std::ostringstream msg;
-                msg << "initCompiler.C: main: Could not open " << if_fn << endl;
-                throw invalid_argument(msg.str());
-            }
-            else
-            {
-                for(BINSEQ::const_iterator bli = bin_seq.begin(); bli != bin_seq.end(); ++bli)
-                    ofs.put((char)(*bli));
-
-                ofs.close();
-            }
-            //cout << dbg << std::endl;
-            printf("Generate Listing\n");
-            yyscomlist->listing(bin_seq, parsed.listing_ostream());
-            yyscomlist->attr_listing(bin_seq, parsed.attr_listing_ostream());
-
-            // open if file and read in to new SpyList
-            
-            printf("Generate Stats\n");
-            stats << "*********************************************************\n";
-
-            cerr << stats.str() << endl;  // TODO -> cout
-
-        }
-
-        if (parsed.debug_mode())
-        {
-            printf("Generate Debug\n");
-            capture_dbg(dbg_fname);
-        }
-        //if(parsed.debug_mode()) cout << dbg.str() << endl;
-    }
-    catch(exception & e)
-    {
-        //Dump dbg stringstream to file
-        capture_dbg(dbg_fname);
-
-        //Dump current stats
-        stats << "*********************************************************\n";
-        cerr << stats.str() << endl;
-
-        cerr << "ERROR! exception caught: " << e.what() << endl;
-        rc = 2;
-    }
-
-    if(erros.str().size())
-    {
-        rc = 1;
-        cerr << erros.str() << endl;
-    }
-    return rc;
-}
-
-// ------------------------------------------------------------------------------------------------
-//  Parser:
-//    Check the args and build the symbol table
-//  -----------------------------------------------------------------------------------------------
-
-Parser::Parser(int narg, char ** argv)
-: iv_type(0), iv_scomlist(NULL), iv_dbg(false), iv_ec(0xFFFFFFFF)   //dg002c
-{
-    set<string> header_files;
-    iv_prog_name = argv[0];
-
-    stats << iv_prog_name << endl;
-    --narg; ++argv;
-
-    string type;
-
-    pair<string,string> compare;
-
-    for(int i = 0; i < narg; ++i)
-    {
-        string arg(argv[i]);
-        if(arg.compare(0,5,"-init") == 0)  iv_source_path = argv[++i];
-        else if (arg.compare(0,3,"-kw") == 0 ||
-                 arg.compare(0,4,"-spy") == 0 ||
-                 arg.compare(0,5,"-attr") == 0 || 
-                 arg.compare(0,6,"-array") == 0 ) header_files.insert(string(argv[++i]));
-        else if (arg.compare(0,7,"-outdir") == 0) iv_outdir = argv[++i];
-        else if (arg.compare(0,2,"-o") == 0)      iv_outfile = argv[++i];              //dg003a
-        else if (arg.compare(0,3,"-if") == 0)     iv_source_path = argv[++i];
-        else if (arg.compare(0,3,"-ec") == 0)     iv_ec = strtoul(argv[++i],NULL,16);  //dg002a
-        else if (arg.compare(0,2, "-I") == 0) yyincludepath.push_back(argv[++i]);
-        else if (arg.compare(0,9,"--compare") == 0)
-        {
-            compare.first = argv[++i];
-            compare.second = argv[++i];
-        }
-        else if (arg.compare(0,7,"--debug") == 0) iv_dbg = true;
-
-    }
-    if(iv_source_path.size() == 0)
-    {
-        iv_source_path = compare.first;
-    }
-    else
-    {
-        yyfname.push_back(iv_source_path);
-    }
-
-    if(!narg) // TEST MODE
-    {
-        iv_source_path = "p7.initfile";
-        header_files.insert("p7_init_spies.h");
-        header_files.insert("p7_init_arrays.h");
-        header_files.insert("ciniIfSymbols.H");
-    }
-
-    size_t pos = iv_source_path.rfind('.');
-    if(pos != string::npos)
-    {
-        string type = iv_source_path.substr(pos+1);
-        if(type.compare(0,2,"if") == 0) iv_type = IF_TYPE;
-        else if(type.compare(0,8,"initfile") == 0) iv_type = INITFILE_TYPE;
-
-        size_t pos1 = iv_source_path.rfind('/',pos);
-        if(pos1 == string::npos) pos1 = 0;
-        else ++pos1;
-
-        iv_initfile = iv_source_path.substr(pos1,pos-pos1);
-    }
-
-    if(iv_outdir.length() == 0) iv_outdir.push_back('.');
-    if(iv_outdir.at(iv_outdir.size()-1) != '/') iv_outdir.push_back('/');
-
-    if(iv_outfile.size() == 0) 
-    {
-        iv_outfile.append(iv_initfile);
-        iv_outfile.append(".if");
-    }
-
-    iv_outfile.insert(0,iv_outdir);
-
-    dbg_fname = dbg_fn();
-
-    stats << "*********************************************************" << endl;
-    stats << "* source:  " << iv_source_path << endl;
-    stats << "* listing: " << listing_fn() << endl;
-    stats << "* attr: " << attr_listing_fn() << endl;
-    stats << "* binary:  " << binseq_fn() << endl;
-
-    if (yyincludepath.size())
-    {
-        stats << "* search paths for include files:" << endl;
-        for (size_t i = 0; i < yyincludepath.size(); i++)
-        {
-            stats << "*   " << yyincludepath.at(i) << endl;
-        }
-        stats << "*" << endl;
-    }
-            
-    iv_scomlist = new ScomList(iv_source_path, header_files, stats, iv_ec);   //dg002c
-    if(compare.second.size())
-    {
-        ScomList cmplist(compare.second, header_files, stats, iv_ec);  //dg002c
-        if(iv_scomlist->compare(cmplist))
-        {
-            cout << "Compare SUCCESS" << endl;
-        }
-        else
-        {
-            cout << stats;
-        }
-    }
-
-    iv_list_ostream.open(listing_fn().c_str());
-    if(!iv_list_ostream)
-    {
-        std::ostringstream msg;
-        msg << "initCompiler.C: Parser: Could not open " << listing_fn() << endl;
-        throw invalid_argument(msg.str());
-    }
-
-    iv_attr_list_ostream.open(attr_listing_fn().c_str());
-    if(!iv_attr_list_ostream)
-    {
-        std::ostringstream msg;
-        msg << "initCompiler.C: Parser: Could not open " << attr_listing_fn() << endl;
-        throw invalid_argument(msg.str());
-    }
-}
-
-Parser::~Parser()
-{
-    iv_list_ostream.close();
-    iv_attr_list_ostream.close();
-}
-
-void init::capture_dbg(string i_fname)
-{
-    ofstream dbgfs(i_fname.c_str());
-    if(!dbgfs)
-    {
-        std::ostringstream msg;
-        msg << "initCompiler.C: capture_dbg: Could not open " << i_fname << endl;
-        throw invalid_argument(msg.str());
-    }
-    dbgfs << dbg.str() << endl;
-    dbgfs.close();
-}
-
-// TODO
-//  - Detect all errors down to a line # ?
-//  - bad rows/cols check - have already?
-//
diff --git a/src/usr/hwpf/ifcompiler/initCompiler.H b/src/usr/hwpf/ifcompiler/initCompiler.H
deleted file mode 100755
index 9655554e5..000000000
--- a/src/usr/hwpf/ifcompiler/initCompiler.H
+++ /dev/null
@@ -1,128 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/ifcompiler/initCompiler.H $                      */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#if !defined(INITCOMPILER_H)
-#define INITCOMPILER_H
-
-// Change Log *************************************************************************************
-//                                                                      
-//  Flag   Track    Userid   Date     Description                
-//  ----- -------- -------- -------- -------------------------------------------------------------
-//        D754106  dgilbert 06/14/10 Create
-//  dg002 SW039868 dgilbert 10/15/10 Add support to filter unneeded inits by EC
-//  dg003 D779902  dgilbert 12/08/10 Ability to specify output if file
-//                 andrewg  05/24/11 Port over for VPL/PgP
-//                 andrewg  09/19/11 Updates based on review
-//                 mjjones  11/17/11 Output attribute listing
-//                 camvanng 04/12/12 Ability to specify search paths for include files
-//                 camvanng 06/27/12 Improve error and debug tracing
-// End Change Log *********************************************************************************
-// $Id: initCompiler.H,v 1.4 2014/06/27 20:02:27 thi Exp $
-/**
- * @file initCompiler.H
- * @brief Compile an initfile into bytecode.
- */
-
-#include <initRpn.H>
-#include <initScom.H>
-#include <set>
-#include <string>
-#include <fstream>
-
-using namespace std;
-
-
-// bison & flex globals
-
-extern int yyline;
-extern FILE * yyin;
-extern int yyparse();
-void yyerror(const char * s);
-extern init::ScomList * yyscomlist;
-extern vector<string> yyincludepath;
-extern vector<string> yyfname;
-extern string dbg_fname;
-
-namespace init
-{
-
-
-    extern ostringstream dbg;    // debug (verbose) output
-    extern ostringstream erros;  // error output stream
-    extern ostringstream stats;  // Misc info to be displayed
-
-    /**
-     * Dump the dbg stringstream to a file
-     * @param i_fname file to dump dbg stringstream
-     */
-    void capture_dbg(string i_fname);
-
-
-
-    class Parser
-    {
-        public:
-
-            enum
-            {
-                IF_TYPE  = 1,
-                INITFILE_TYPE = 2
-            };
-
-            Parser(int narg, char ** argv);
-            ~Parser();
-
-            string listing_fn() { return (binseq_fn()).append(".list"); }
-            string attr_listing_fn() { return (binseq_fn()).append(".attr"); }
-            string source_fn()  { return iv_source_path; }
-            string binseq_fn()  { return iv_outfile; }  //dg003a
-            //{ string s(iv_outdir); s.append(iv_initfile); s.append(".if"); return s; } //dg003d
-
-            // File to dump dbg stringstream
-            string dbg_fn() {string fname(iv_outdir); fname += iv_initfile + ".dbg"; return fname; }
-
-            uint32_t get_source_type() { return iv_type; }
-
-            ostream & listing_ostream() { return iv_list_ostream; }
-            ostream & attr_listing_ostream() { return iv_attr_list_ostream; }
-
-            bool debug_mode() { return iv_dbg; }
-
-        private:
-            string iv_prog_name;
-            string iv_source_path;
-            string iv_initfile;
-            string iv_outdir;
-            string iv_outfile;    //dg003a
-            ofstream iv_list_ostream;
-            ofstream iv_attr_list_ostream;
-            uint32_t iv_type;
-            ScomList * iv_scomlist;
-            bool iv_dbg;
-            uint32_t iv_ec;             // ec filter (if there is one) dg002a
-
-    };
-}
-
-#endif
diff --git a/src/usr/hwpf/ifcompiler/initCompiler.lex b/src/usr/hwpf/ifcompiler/initCompiler.lex
deleted file mode 100755
index 26248e7d9..000000000
--- a/src/usr/hwpf/ifcompiler/initCompiler.lex
+++ /dev/null
@@ -1,681 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/ifcompiler/initCompiler.lex $                    */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/* Change Log *************************************************************************************
-// $Id: initCompiler.lex,v 1.15 2014/07/07 20:44:40 thi Exp $
-//                                                                      
-//  Flag Track    Userid   Date       Description                
-//  ---- -------- -------- --------   -------------------------------------------------------------
-//       D754106  dgilbert 06/14/10   Create
-//  dg01 D766229  dgilbert 08/03/10   add check for hex/bin data > 64 bits
-//  dg02 SW058986 dgilbert 02/28/11   More noticeable fail for missing col headers
-//                andrewg  09/19/11   Updates based on review
-//                camvanng 11/08/11   Added support for attribute enums
-//                camvanng 11/16/11   Support system & target attributes
-//                camvanng 12/12/11   Support multiple address ranges within a SCOM address
-//                camvanng 01/20/12   Support for using a range of indexes for array attributes
-//                camvanng 02/07/12   Ability to #include common scom initfile defines
-//                camvanng 02/14/12   Support binary and hex scom addresses
-//                                    Support for array at beginning of scom address
-//                camvanng 04/12/12   Right justify SCOM data
-//                                    Ability to specify search paths for include files
-//                camvanng 04/16/12   Support defines for SCOM address
-//                                    Support defines for bits, scom_data and attribute columns
-//                camvanng 05/07/12   Support for associated target attributes
-//                                    Save and restore line numbers for each include file
-//                camvanng 05/22/12   Fix "OP" definition
-//                camvanng 06/11/12   Fix shift/reduce warnings from yacc
-//                camvanng 06/15/12   Ability to do bitwise OR and AND operations
-//                camvanng 06/27/12   Improve error handling
-//                camvanng 07/12/12   Support for "ANY"
-//                thi      07/07/14   Add compilation option to sync with HB and CVS
-// End Change Log *********************************************************************************/
-/**
- * @file initCompiler.lex
- * @brief Contains the rules for the lex/flex  lexical scanner for scanning initfiles
- * 
- * This code runs as part of the build process to generate a
- * byte-coded representation of an initfile
- */
-%{
-#include <stdint.h>
-#include <iostream>
-#include <sstream>
-#include <iomanip>
-#include <vector>
-#include <initRpn.H>
-
-#ifdef HOSTBOOT_COMPILE
-#include <ifcompiler.y.tab.h>
-#else
-#include <y.tab.h>
-#endif
-
-uint64_t bits2int( const char * bitString);
-uint64_t hexs2int(const char * hexString, int32_t size);
-void pushBackScomBody();
-void push_col(const char *s);
-void lex_err(const char *s );
-void add_define(const char *s);
-void pushBackDefine(const char *s);
-
-std::ostringstream oss;
-std::ostringstream t_oss;
-
-typedef std::vector<std::ostringstream *> OSS_LIST;
-OSS_LIST g_colstream;
-
-inline void clear_colstream() 
-{ for( OSS_LIST::iterator i = g_colstream.begin(); i != g_colstream.end(); ++i) delete *i;
-  g_colstream.clear();
-}
-uint32_t g_scomcol;
-uint32_t g_coltype = 0;
-uint32_t g_scomtype = 0;
-uint32_t g_paren_level = 0;
-bool g_equation = false;   // equation inside scomv col
-std::string g_scomdef_name;
-std::map<std::string,std::string> g_defines; //container for all the defines
-    //i.e. define def_A = (attrA > 1) => key = "DEF_A", value = "(attr_A > 1)"
-
-std::string g_target;  //storage for current target
-
-extern int yyline;
-extern std::vector<std::string> yyincludepath;
-extern std::map<std::string,std::string> yytarget; //container for all defined targets
-    //i.e. define MBA0 = TGT1 => key = "TGT1", value = "MBA0"
-
-#define MAX_INCLUDE_DEPTH 10
-YY_BUFFER_STATE include_stack[MAX_INCLUDE_DEPTH];
-int yyline_stack[MAX_INCLUDE_DEPTH];
-int include_stack_num = 0;
-
-extern std::vector<std::string> yyfname;
-
-%}
-
-
-
-
-NEWLINE  \n
-FILENAME [A-Za-z][A-Za-z0-9_\.]*
-ID      [A-Za-z][A-Za-z0-9_]*
-ID2     [A-Za-z][A-Za-z0-9_]*(\[[0-9]+(\.\.[0-9]+)?(,[0-9]+(\.\.[0-9]+)?)*\]){0,4}
-ID3      [0-9]+[A-Za-z_]+[0-9]*
-DIGIT    [0-9]
-COMMENT  #.*\n
-OP      "="|"+"|"-"|"!"|"<"|">"|"*"|"/"|"%"|"&"|"|"
-FLOAT   [0-9]+"."[0-9]*
-BINARY  0[bB][0-1]+
-SINGLE_BIN [0-1]
-SCOM_DATA [ ]*[scom_data][ ]+
-HEX     0[xX][A-Fa-f0-9]+
-SINGLE_HEX [A-Fa-f0-9]
-ATTRIBUTE [\[[A-Fa-f0-9]\]]
-MULTI_DIGIT [0-9]+
-MULTI_INDEX_RANGE [0-9]+(\.\.[0-9]+)?(,[0-9]+(\.\.[0-9]+)?)*
-
-%x      scomop 
-%x      scomop_hex 
-%x      scomop_hex_array
-%x      scomop_hex_suffix
-%x      scomop_bin
-%x      scomop_bin_array
-%x      scomop_bin_suffix
-%x      scomdata
-%x      when_kw
-%x      when_expr
-%x      scomcolname
-%x      scomrow
-%x      list
-%x      enumcol
-%x      fnames
-%x      target
-%x      attribute
-%x      array
-%x      incl
-%x      scomdef
-%x      scomdef_value
-
-
-%%
-
-{COMMENT}               ++yyline;    /* toss comments  - need first line */
-\$Id:.*\n               ++yyline;    /* toss this - read by initCompiler.C */
-
- /* Special end-of-file character. */
-<<EOF>>		        {
-                        if (--include_stack_num < 0)
-                        {
-                            g_defines.clear();
-                            return 0;
-                        }
-                        else
-                        {
-                            yy_delete_buffer(YY_CURRENT_BUFFER);
-                            fclose(yyin);
-                            yy_switch_to_buffer(include_stack[include_stack_num]);
-                            yyline = yyline_stack[include_stack_num];
-                            yyfname.pop_back();
-                        }
-                    }
-
-SyntaxVersion           return INIT_VERSION;
-
- /* The list of initfile versions is just copied into the *.if file
-  * so just make it one chunk of string data */
-Versions                BEGIN(fnames);
-<fnames>[=]             oss.str("");
-<fnames>{FLOAT}         oss << yytext;
-<fnames>[:]             oss << yytext;
-<fnames>[,]             oss << ", ";
-<fnames>{FILENAME}      oss << yytext;
-<fnames>{NEWLINE}       {   ++yyline;
-                            yylval.str_ptr = new std::string(oss.str());
-                            BEGIN(INITIAL);
-                            return INIT_VERSIONS;
-                        }
-
-include                 { BEGIN(incl); }
-<incl>[ \t]*            /* Eat up whitespace */
-<incl>[^ \t\n]+         {   /* Got the include file name */
-                            /*printf("lex: include file %s\n", yytext);*/
-                            if ( include_stack_num >= MAX_INCLUDE_DEPTH )
-                            {
-                                lex_err("Include nested too deeply");
-                                lex_err(yytext);
-                                exit( 1 );
-                            }
-
-                            /* Save current line number */
-                            yyline_stack[include_stack_num] =
-                                yyline;
-
-                            /* Save current input buffer */
-                            include_stack[include_stack_num++] =
-                                YY_CURRENT_BUFFER;
-
-                            /* Switch input buffer */
-                            std::string filename = yytext;
-                            yyin = fopen( filename.c_str(), "r" );
-                            for (size_t i = 0; (i < yyincludepath.size()) && (NULL == yyin); i++)
-                            {
-                                filename = yyincludepath.at(i) + "/" + yytext;
-                                yyin = fopen( filename.c_str(), "r" );
-                            }
-                            if (NULL == yyin)
-                            {
-                                oss.str("");
-                                oss << "Cannot open include file: " << yytext;
-                                lex_err(oss.str().c_str());
-                                exit(1);
-                            }
-                            printf("Include file %s\n", filename.c_str());
-                            yyline = 1;  //set line number for new buffer
-                            yyfname.push_back(filename); //save file name of new file being parsed
-                            yy_switch_to_buffer(yy_create_buffer(yyin, YY_BUF_SIZE));
-
-                            BEGIN(INITIAL);
-                        }
-
-                         /* Adding the ability to use defines for SCOM address and the different
-                          * columns (bits, scom_data and attribute columns).
-                          * Since the SCOM address and the different columns all have different
-                          * parsing rules, it is complicated to handle this in both the scanner and parser.
-                          * The simplest thing to do is to keep track of all the defines in the scanner
-                          * then push the specific define value back into the input stream for scanning
-                          * when it is used.
-                          */
-
-define                       { BEGIN(scomdef); }
-
-<scomdef>{ID}                { g_scomdef_name = yytext; }
-<scomdef>[ \t\r]*=[ \t\r]*   { BEGIN(scomdef_value); }
-<scomdef_value>[^;\n#\{\}]+  { add_define(yytext); }
-<scomdef_value>;             { g_scomdef_name = ""; BEGIN(INITIAL); }
-
-scom              { BEGIN(scomop); oss.str("");  return INIT_SCOM; }
-
-<scomop>{HEX} { /*printf("lex: hex string %s\n", yytext);*/
-                yylval.str_ptr = new std::string(yytext);
-                BEGIN(scomop_hex);
-                return INIT_SCOM_ADDR; 
-              }
-
-<scomop>0[xX] { BEGIN(scomop_hex); }
-<scomop>0[bB] { BEGIN(scomop_bin); }
-
-<scomop_hex,scomop_hex_suffix>[\(] {
-                    /*printf("lex: hex string %s\n", yytext);*/
-                    BEGIN(scomop_hex_array);
-                }
-
-<scomop_hex_array>{SINGLE_HEX}+\.\.{SINGLE_HEX}+ {
-                    /*printf("lex: hex string %s\n", yytext);*/
-                    yylval.str_ptr = new std::string(yytext);
-                    return INIT_INT64_STR; 
-                }
-
-<scomop_hex_array>{SINGLE_HEX}+ {
-                    /*printf("lex: hex string %s\n", yytext);*/
-                    yylval.str_ptr = new std::string(yytext);
-                    return INIT_INT64_STR; 
-                }
-
-<scomop_hex_array>[\)] {
-                    /*printf("lex: hex string %s\n", yytext);*/
-                    BEGIN(scomop_hex_suffix);
-                }
-
-<scomop_hex,scomop_hex_suffix>{SINGLE_HEX}+ {
-                    /*printf("lex: hex string %s\n", yytext);*/
-                    yylval.str_ptr = new std::string(yytext);
-                    return INIT_SCOM_SUFFIX; 
-                }
-
-<scomop_hex,scomop_hex_suffix>\.0[bB] { BEGIN(scomop_bin); return yytext[0]; }
-
-<scomop_bin>{SINGLE_BIN}+ {
-                    /*printf("lex: bin string %s\n", yytext);*/
-                    yylval.str_ptr = new std::string(yytext);
-                    return INIT_SCOM_ADDR_BIN;
-                }
-
-<scomop_bin,scomop_bin_suffix>[\(] {
-                    /*printf("lex: bin string %s\n", yytext);*/
-                    BEGIN(scomop_bin_array);
-                }
-<scomop_bin_array>{SINGLE_BIN}+\.\.{SINGLE_BIN}+ {
-                    /*printf("lex: bin string %s\n", yytext);*/
-                    yylval.str_ptr = new std::string(yytext);
-                    return INIT_BINARY_STR;
-                }
-
-<scomop_bin_array>{SINGLE_BIN}+ {
-                    /*printf("lex: bin string %s\n", yytext);*/
-                    yylval.str_ptr = new std::string(yytext);
-                    return INIT_BINARY_STR;
-                }
-
-<scomop_bin_array>[\)] {
-                    /*printf("lex: bin string %s\n", yytext);*/
-                    BEGIN(scomop_bin_suffix);
-                }
-
-<scomop_bin_suffix>{SINGLE_BIN}+ {
-                    /*printf("lex: bin string %s\n", yytext);*/
-                    yylval.str_ptr = new std::string(yytext);
-                    return INIT_SCOM_SUFFIX_BIN;
-                }
-
-<scomop_bin,scomop_bin_suffix>\.(0[xX])? {
-                    /*printf("lex: bin string %s\n", yytext);*/
-                    BEGIN(scomop_hex); return yytext[0];
-                }
-
-<scomop_bin,scomop_bin_suffix>\.0[bB] {
-                    /*printf("lex: bin string %s\n", yytext);*/
-                }
-
-<scomop_hex_array,scomop_bin_array>{ID}\.\.{ID} { pushBackDefine(yytext); }
-<scomop_hex,scomop_hex_suffix,scomop_bin,scomop_bin_suffix>\.{ID} { pushBackDefine(yytext + 1); unput('.'); }
-<scomop,scomop_hex_array,scomop_hex_suffix,scomop_bin_array,scomop_bin_suffix>{ID}  { pushBackDefine(yytext); }
-
-<scomop>[:;\[]    { BEGIN(INITIAL); g_coltype = 0; return yytext[0]; }
-<scomop>{NEWLINE} { BEGIN(INITIAL); ++yyline; }
-
-<scomop_hex,scomop_hex_suffix,scomop_bin,scomop_bin_suffix>[\{]   {  
-                                 oss.str("");
-                                 BEGIN(scomcolname);
-                                 return yytext[0];
-                             }
-
-
-
-
-                         /* The column & row format is really hard to handle in the parser,
-                          * especially since each column can have different parsing rules.
-                          * So fix it here in the scanner by converting the format to
-                          * coltitle1 , row1, row2, ..., row n ;
-                          * coltitle2 , row1, row2, ..., row n ;
-                          * then push it all back into the input stream and scan the new format
-                          */	
-
-<scomcolname>{COMMENT}   ++yyline;
-<scomcolname>\n          ++yyline;
-<scomcolname>{ID}        {  // Only non-array attributes are supported for attribute column
-                            g_colstream.push_back(new std::ostringstream());
-                            *(g_colstream.back()) << yytext;
-                         }
-<scomcolname>,           {}
-<scomcolname>;           { BEGIN(scomrow); g_scomcol = 0; }
-
-<scomrow>{COMMENT}       ++yyline;
-<scomrow>{NEWLINE}       ++yyline;
-<scomrow>([^,;\n#\{\}]+{ID2}*)+ push_col(yytext);
-<scomrow>[,]             ++g_scomcol;
-<scomrow>[;]             { 
-                             if ((g_scomcol + 1) < g_colstream.size())
-                             {
-                                 lex_err("# Scom columns < # of column headers");
-                                 exit(1);
-                             }
-                             g_scomcol = 0;
-                         }
-<scomrow>[\}]            {
-                            pushBackScomBody();  // create new format and put it back on yyin
-                            BEGIN(INITIAL);
-                         }
-
-
-                        /* The scombody is the modified format - don't track yyline as it's already
-                         * accounted for. Any errors in here will point back to the last line in the
-                         * 'real' scombody 
-                         */
-              
-bits                    { g_coltype = INIT_BITS;  return INIT_BITS;}
-expr                    { g_coltype = INIT_EXPR;  return INIT_EXPR;}
-scom_data               { g_coltype = INIT_SCOMD; return INIT_SCOMD;}
-
-                        /*HEX and Binary numbers in the scombody can be up to 64bit, 
-                        * decimal numbers will always fit in 32bit int */
-
-{BINARY}                { yylval.uint64 = bits2int(yytext); return INIT_INT64; }
-
-<*>;                    { g_coltype = 0; return ';'; }
-                            
-END_INITFILE            return INIT_ENDINITFILE;
-
-<*>SYS\.                yymore(); //System attribute
-
-<*>TGT{MULTI_DIGIT}\.   {
-                            if (g_target.length())
-                            {
-                                std::string tgt(yytext);
-                                tgt = tgt.substr(0, tgt.length() -1);
-                                yytarget[tgt] = g_target;
-                                g_target.clear();
-                            }
-
-                            yymore(); //Associated target attribute
-                        }
-
-                        /* All attribute enums start with "ENUM_ATTR_" */
-<*>ENUM_ATTR_{ID}       {
-                            yylval.str_ptr = new std::string(yytext); return ATTRIBUTE_ENUM;
-                        } 
-
-                        /* All attributes start with "ATTR_"; then there's "any". */
-<*>ATTR_{ID}|"any"|"ANY" {
-                            yylval.str_ptr = new std::string(yytext); return INIT_ID; 
-                        }
-
-                        /* Anything else is a define.
-                         * Removing any requirements that defines has to start with "def_" or "DEF_" */
-<*>{ID}\.               {   // push back the define value for scanning
-                            g_target = yytext;
-                            g_target = g_target.substr(0, g_target.length() - 1);
-                            //printf("lex: %s\n", g_target.c_str());
-                            unput('.');
-                            pushBackDefine(g_target.c_str());
-                        }
-
-<*>{ID}                 {   // push back the define value for scanning
-                            pushBackDefine(yytext);
-                        } 
-
-<*>{DIGIT}+             {
-                          sscanf(yytext, "%d", &yylval.integer); return INIT_INTEGER;
-                        }
-
-<*>{HEX}                {
-                            // normal right-justified 64 bit hex integer
-                            yylval.uint64 = hexs2int(yytext,yyleng);
-                            return INIT_INT64;
-                        }
-
-<*>"&&"                 return INIT_LOGIC_AND;
-<*>"||"                 return INIT_LOGIC_OR;
-<*>"=="                 return INIT_EQ;
-<*>"!="                 return INIT_NE;
-<*>"<="                 return INIT_LE;
-<*>">="                 return INIT_GE;
-<*>">>"                 return INIT_SHIFT_RIGHT;
-<*>"<<"                 return INIT_SHIFT_LEFT;
-
-<*>{OP}                 { g_equation = true; return yytext[0]; }
-<*>[\(]                 { ++g_paren_level; return yytext[0]; }
-<*>[\)]                 { --g_paren_level; return yytext[0]; }
-
-<*>\[{MULTI_INDEX_RANGE}\]    { yylval.str_ptr = new std::string(yytext);  return ATTRIBUTE_INDEX; }
-
-<*>[\{\},:]             {g_equation = false; return yytext[0]; }
-
-<*>[ \t\r]+             /* Eat up whitespace */
-[\n]                    { BEGIN(INITIAL);++yyline;}
-
-<*>.                    {
-                            oss.str("");
-                            oss << yytext << " is not valid syntax";
-                            lex_err(oss.str().c_str());
-                            exit(1);
-                        }
-
-%%
-
-int yywrap() { return 1; }
-
-void lex_err(const char *s )
-{
-    std::cerr << "\nERROR: lex: " << yyfname.back().c_str()
-              << ", line " << yyline << ": " << s << std::endl << std::endl;
-}
-
-// Convert left justified bitstring to right-justified 64 bit integer
-uint64_t bits2int( const char * bitString)
-{
-    uint32_t idx = 0;
-    uint64_t mask = 0x0000000000000001ull;
-    uint64_t val = 0;
-
-    if( (bitString[0] != '0') ||
-        ((bitString[1] != 'b') && (bitString[1] != 'B')))
-    {
-        lex_err("Invalid bit string");
-        lex_err(bitString);
-        exit(1);
-    }
-    idx = 2;
-
-    while( bitString[idx] != 0 )
-    {
-        val <<= 1;
-        char c = bitString[idx];
-        if( c == '1') val |= mask;
-        else if(c != '0')
-        {
-            lex_err("Invalid bit string");
-            lex_err(bitString);
-            exit(1);
-        }
-        ++idx;
-    }
-    if(idx > 66) //dg01a  64bits + "0B" prefix
-    {
-        lex_err("Bit string greater than 64 bits!");
-        lex_err(bitString);
-        exit(1);
-    }
-
-    return val;   
-}
-
-// Convert left justified hex string to 64 right-justified bit integer
-uint64_t hexs2int(const char * hexString, int32_t size)
-{
-    uint64_t val = 0;
-    std::string s(hexString);
-    if(size > 18) //dg01a
-    {
-        lex_err("HEX literal greater than 64 bits");
-        lex_err(hexString);
-        exit(1);
-    }
-    s.insert(2, 18-size,'0');  // 0x + 16 digits
-    val = strtoull(s.c_str(),NULL,16);
-    return val;
-}
-
-void pushBackScomBody()
-{
-    std::ostringstream ost;
-    for(OSS_LIST::iterator i = g_colstream.begin(); i != g_colstream.end(); ++i)
-    {
-        ost << (*i)->str() << ';';
-    }
-    ost << '}';
-    std::string t = ost.str();  // Was causing weird stuff if I didn't copy the string out first
-    //std::cout << "<lex comment> Pushing:" << t << std::endl;
-    //std::cout << "<lex comment> " << std::endl;
-
-    for(std::string::reverse_iterator r = t.rbegin();
-        r != t.rend();
-        ++r)
-    {
-       //std::cout << *r;
-        unput(*r);
-    }
-    //std::cout << std::endl;
-    clear_colstream();
-}
-
-
-/// help collect column data
-void push_col(const char * s)
-{
-    if(g_scomcol >= g_colstream.size())  // more data cols than headers cols
-    {
-        lex_err("Missing column header");
-        exit(1);
-    }
-
-    std::ostringstream & o = *(g_colstream[g_scomcol]);
-    std::ostringstream token;
-    std::istringstream iss(s);
-    std::string t;
-    //std::cout << "Pushing ";
-    while(iss >> t) token << t; // get rid of white space
-    if(token.str().size()) // don't add blank tokens
-    {
-        //std::cout << "Pushing ," << token.str() << std::endl;
-        o << ',' << token.str();
-    }
-}
-
-
-/// Save the define
-void add_define(const char * s)
-{
-    if (g_defines.end() != g_defines.find(g_scomdef_name))
-    {
-        oss.str("");
-        oss << g_scomdef_name << " already defined";
-        lex_err(oss.str().c_str());
-        exit(1);
-    }
-
-    //remove trailing white spaces
-    std::string str(s);
-    std::string whitespaces(" \t\r");
-    size_t pos;
-    pos=str.find_last_not_of(whitespaces);
-    if (pos != std::string::npos)
-    {
-        str.erase(pos+1);
-    }
-
-    g_defines[g_scomdef_name] =  str;
-    //std::cout << "g_defines[" << g_scomdef_name << "] = " << g_defines[g_scomdef_name] << std::endl;
-}
-
-// Push the define(s) back into the input stream for scanning
-void pushBackDefine(const char *s)
-{
-    std::string key(s); //set key to input string
-    std::string key2;
-    std::string value;
-
-    //std::cout << "lex: pushBackDefine input string: " << s << " key: " << key << std::endl;
-
-    //Is this a range?
-    size_t pos = key.find("..");
-    if (pos != std::string::npos)
-    {
-        key2 = key.substr(pos+2); //2nd key in the range
-        key = key.substr(0,pos);  //Reset 1st key in the range
-    }
-
-    //Exit if cannot find 1st key
-    if (g_defines.end() == g_defines.find(key))
-    {
-        oss.str("");
-        oss << "Cannot find define " << key;
-        lex_err(oss.str().c_str());
-        exit(1);
-    }
-
-    // Set value string
-    value = g_defines[key];
-    if (key2.size())
-    {
-        //Exit if cannot find 2nd key
-        if (g_defines.end() == g_defines.find(key2))
-        {
-            oss.str("");
-            oss << "Cannot find define " << key;
-            lex_err(oss.str().c_str());
-            exit(1);
-        }
-
-        //Get rid of spaces & append key2 value
-        size_t pos = value.find(' ');
-        if (pos != std::string::npos)
-        {
-            value = value.substr(0,pos);
-        }
-        value += ".." + g_defines[key2];
-    }
-
-    //std::cout << "lex: pushBackDefine: " << value << std::endl;
-
-    //Push back the value into the input stream
-    for(std::string::reverse_iterator r = value.rbegin();
-        r != value.rend();
-        ++r)
-    {
-        //std::cout << *r;
-        unput(*r);
-    }
-    //std::cout << std::endl;
-}
diff --git a/src/usr/hwpf/ifcompiler/initCompiler.y b/src/usr/hwpf/ifcompiler/initCompiler.y
deleted file mode 100755
index cacc890f3..000000000
--- a/src/usr/hwpf/ifcompiler/initCompiler.y
+++ /dev/null
@@ -1,366 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/ifcompiler/initCompiler.y $                      */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// Change Log *************************************************************************************
-//                                                                      
-//  Flag Track    Userid   Date       Description                
-//  ---- -------- -------- --------   -------------------------------------------------------------
-//        D754106  dgilbert 06/14/10  Create
-//        D774126  dgilbert 09/30/10  Add ERROR: to yyerror message
-//                 andrewg  09/19/11  Updates based on review
-//                 camvanng 11/08/11  Added support for attribute enums
-//                 andrewg  11/09/11  Refactor to use common include with hwp framework.
-//                 camvanng 12/12/11  Support multiple address ranges within a SCOM address
-//                 camvanng 01/20/12  Support for using a range indexes for array attributes
-//                 camvanng 02/14/12  Support binary and hex scom addresses
-//                                    Support for array at beginning of scom address
-//                 camvanng 04/16/12  Support defines for SCOM address
-//                                    Support defines for bits, scom_data and attribute columns
-//                                    Delete obsolete code for defines support
-//                 camvanng 05/22/12  Ability to do simple operations on attributes
-//                                    in the scom_data column
-//                 camvanng 06/11/12  Ability to do logical operations with attribute columns
-//                                    Fix shift/reduce warnings from yacc
-//                 camvanng 06/15/12  Ability to do bitwise OR and AND operations
-//                 camvanng 06/27/12  Improve error and debug tracing
-// End Change Log *********************************************************************************
-// $Id: initCompiler.y,v 1.10 2014/06/30 19:49:24 thi Exp $
-/**
- * @file initCompiler.y
- * @brief Contains the yacc/bison code for parsing an initfile.
- * 
- * This code runs as part of the build process to generate a
- * byte-coded representation of an initfile
- */
-%{
-#include <stdio.h>
-#include <stdint.h>
-#include <stdlib.h>
-#include <string>
-#include <iostream>
-#include <iomanip>
-#include <sstream>
-#include <initCompiler.H>
-#include <initSymbols.H>
-
-
-init::Scom * current_scom = NULL;
-
-extern int yylex();
-void yyerror(const char * s);
-
-int scom;
-
-%}
-
-/* Union for the yylval variable in lex or $$ variables in bsion code.
- * Used to store the data associated with a parsed token.
- */
-%union{
-    uint32_t integer;
-    uint64_t uint64;
-    std::string * str_ptr;
-    init::Rpn * rpn_ptr;
-}
-
-    /* indicates the name for the start symbol */
-%start input
-
-    /* Define terminal symbols and the union type
-     * associated with each. */
-
-%token <integer> INIT_INTEGER
-%token <uint64>  INIT_INT64
-%token <str_ptr>  INIT_INT64_STR
-%token <str_ptr>  INIT_SCOM_ADDR
-%token <str_ptr>  INIT_SCOM_SUFFIX
-%token <str_ptr>  INIT_BINARY_STR
-%token <str_ptr>  INIT_SCOM_ADDR_BIN
-%token <str_ptr>  INIT_SCOM_SUFFIX_BIN
-%token <uint64>  INIT_SCOM_DATA
-%token <str_ptr> INIT_ID
-%token <str_ptr> INIT_VERSIONS
-%token <str_ptr> ATTRIBUTE_INDEX
-%token <str_ptr> ATTRIBUTE_ENUM
-
-
-    /* Define terminal symbols that don't have any associated data */
-
-%token INIT_VERSION
-%token INIT_ENDINITFILE
-%token INIT_BITS
-%token INIT_EXPR
-%token INIT_TARG
-%token INIT_EQ
-%token INIT_NE
-%token INIT_LE
-%token INIT_GE
-%token INIT_SCANINIT
-%token INIT_SCOMINIT
-%token INIT_SCOM
-%token INIT_SCOMD
-
-
-    /* non-terminal tokens and the union data-type associated with them */
-
-%type <str_ptr> bitsrows
-%type <rpn_ptr> expr id_colexpr id_col num_list scomdexpr
-
-
-
-
-
-/* top is lowest precedent - done last */
-%left INIT_LOGIC_OR
-%left INIT_LOGIC_AND
-%left '|'     /* bitwise OR */
-%left '^'     /* bitwise XOR */
-%left '&'     /* bitwise AND */
-%left INIT_EQ INIT_NE
-%left INIT_LE INIT_GE '<' '>'
-%left INIT_SHIFT_RIGHT INIT_SHIFT_LEFT
-%left '-' '+'
-%left '*' '/' '%'
-%right '!' '~'   /* logic negation  bitwise complement*/
-%left ATTRIBUTE_INDEX /* highest precedence */
-/* bottom is highest precedent - done first */
-
-
-
-
-%%
-/* Grammars */
-    /* the 'input' is simply all the lines */
-input:
-        | input line
-;
-
-line:   scom
-        | cvs_versions
-        | syntax_version
-        | INIT_ENDINITFILE   {}
-;
-
-
-cvs_versions:   INIT_VERSIONS
-            {
-                yyscomlist->set_cvs_versions($1); delete $1;
-            }
-;
-
-syntax_version: INIT_VERSION '=' INIT_INTEGER
-            { 
-                yyscomlist->set_syntax_version($3);
-            }
-;
-
-scom:       INIT_SCOM {current_scom = new init::Scom(yyscomlist->get_symbols(),yyline);}
-            | scom scomaddr '{' scombody '}'
-		{
-                     /* printf("Found an INIT_SCOM!\n"); */
-                    /* current_scom = new init::Scom(yyscomlist->get_symbols(),yyline); */
-                    yyscomlist->insert(current_scom);
-                    init::dbg << current_scom->addr_listing() << std::endl;
-                }
-;	
-
-scomaddr: 
-      scomaddr_hex { /*printf("Found a hex scom address\n");*/ }
-      | scomaddr_bin { /*printf("Found a binary scom address\n");*/
-                       current_scom->append_scom_address_bin(); }
-      | scomaddr '.' scomaddr_hex { /*printf("Found a hex scom address 2\n");*/ }
-      | scomaddr '.' scomaddr_bin { /*printf("Append binary scom address 2\n");*/
-                                current_scom->append_scom_address_bin(); }
-;
-
-
-
-scomaddr_hex:  INIT_SCOM_ADDR { /*printf("Found an INIT_SCOM_ADDR %s\n", (*($1)).c_str());*/
-                                current_scom->set_scom_address(*($1)); delete $1; }
-                | scom_list { current_scom->copy_dup_scom_address(); }
-                | INIT_SCOM_SUFFIX { current_scom->set_scom_suffix(*($1)); delete $1; }
-                | scomaddr_hex scom_list { /*printf("Found a scom_list 2\n");*/
-                                           current_scom->copy_dup_scom_address(); }
-                | scomaddr_hex INIT_SCOM_SUFFIX { /*printf("Found a scom suffix %s\n", (*($2)).c_str());*/
-                                                  current_scom->set_scom_suffix(*($2)); delete $2;}
-;
-
-
-scom_list:       INIT_INT64_STR                { current_scom->dup_scom_address(*($1));delete $1;}
-                | scom_list ',' INIT_INT64_STR  { current_scom->dup_scom_address(*($3));delete $3;}
-;
-
-
-scomaddr_bin:    INIT_SCOM_ADDR_BIN { /*printf("Found an INIT_SCOM_ADDR_BIN %s\n", (*($1)).c_str());*/
-                                      current_scom->set_scom_address_bin(*($1)); delete $1; }
-                | scom_bin_list { /*printf("Found a scom_bin_list\n");*/
-                                  current_scom->copy_dup_scom_address_bin(); }
-                | scomaddr_bin INIT_SCOM_ADDR_BIN { /*printf("Found an INIT_SCOM_ADDR_BIN 2 %s\n", (*($2)).c_str());*/
-                                                    current_scom->set_scom_suffix_bin(*($2)); delete $2;}
-                | scomaddr_bin scom_bin_list { /*printf("Found a scom_bin_list 2\n");*/
-                                               current_scom->copy_dup_scom_address_bin(); }
-                | scomaddr_bin INIT_SCOM_SUFFIX_BIN { /*printf("Found a scom binary suffix %s\n", (*($2)).c_str());*/
-                                                      current_scom->set_scom_suffix_bin(*($2)); delete $2;}
-;
-
-scom_bin_list:   INIT_BINARY_STR { current_scom->dup_scom_address_bin(*($1));delete $1; }
-                | scom_bin_list ',' INIT_BINARY_STR { current_scom->dup_scom_address_bin(*($3));delete $3; }
-;
-
-    /* The scombody was reformatted by the scanner
-     * colname1 , row1 , row 2, ... , row n ;
-     * colname2 , row1 , row 2, ... , row n ;
-     */
-
-scombody:        scombodyline ';' {}
-                | scombody scombodyline ';' {}
-;
-
-scombodyline:   INIT_SCOMD  ',' scomdrows  {}
-                | INIT_BITS ',' bitsrows  {}
-                | INIT_EXPR ',' exprrows  { init::dbg << "Add col EXPR" << endl; current_scom->add_col("EXPR"); }
-                | INIT_ID   ',' idrows  {
-                                            current_scom->add_col(*($1));
-                                            init::dbg << "Add col " << *($1) << endl;
-                                            delete $1;
-                                        }
-;
-
-
-scomdrows:      scomdexpr  {
-                          /* printf("\n\nscomdrows - RPN Address:0x%X\n\n\n",$1); */
-                          init::dbg << $1->listing("Length scom RPN");
-                          current_scom->add_scom_rpn($1);
-                       }
-                | scomdrows ',' scomdexpr {  init::dbg << $3->listing("Length scom RPN"); current_scom->add_scom_rpn($3); }
-;
-    
-scomdexpr:   INIT_INTEGER               { $$= new init::Rpn($1,yyscomlist->get_symbols());}
-        | INIT_ID                       { $$= new init::Rpn(*($1),yyscomlist->get_symbols()); delete $1;}
-        | ATTRIBUTE_ENUM                { $$= new init::Rpn((yyscomlist->get_symbols())->get_attr_enum_val(*($1)),yyscomlist->get_symbols()); delete $1; }
-        | INIT_INT64                    { $$=new init::Rpn($1,yyscomlist->get_symbols()); }
-        | scomdexpr ATTRIBUTE_INDEX     { $1->push_array_index(*($2)); delete $2; }
-        | scomdexpr INIT_SHIFT_RIGHT scomdexpr  { $$ = $1->push_merge($3,SHIFTRIGHT); }
-        | scomdexpr INIT_SHIFT_LEFT scomdexpr   { $$ = $1->push_merge($3,SHIFTLEFT); }
-        | scomdexpr '+' scomdexpr               { $$ = $1->push_merge($3,PLUS); }
-        | scomdexpr '-' scomdexpr               { $$ = $1->push_merge($3,MINUS); }
-        | scomdexpr '*' scomdexpr               { $$ = $1->push_merge($3,MULT); }
-        | scomdexpr '/' scomdexpr               { $$ = $1->push_merge($3,DIVIDE); }
-        | scomdexpr '%' scomdexpr               { $$ = $1->push_merge($3,MOD); }
-        | scomdexpr '&' scomdexpr               { $$ = $1->push_merge($3,BITWISEAND); }
-        | scomdexpr '|' scomdexpr               { $$ = $1->push_merge($3,BITWISEOR); }
-        | '!' scomdexpr                         { $$ = $2->push_op(NOT); }
-        | '(' scomdexpr ')'             { $$ = $2; }
-;
-
-bitsrows:       bitrange {}
-                | bitsrows ',' bitrange {}
-;
-
-bitrange:       INIT_INTEGER { current_scom->add_bit_range($1,$1);  }
-                | INIT_INTEGER ':' INIT_INTEGER 
-                    { current_scom->add_bit_range($1,$3); }
-;
-
-exprrows:       expr { init::dbg << $1->listing(NULL); current_scom->add_row_rpn($1); }
-                | exprrows ',' expr
-                        { init::dbg << $3->listing(NULL); current_scom->add_row_rpn($3); }
-;
-
-idrows:         id_colexpr  { init::dbg << $1->listing(NULL); current_scom->add_row_rpn($1); }
-                | idrows ',' id_colexpr { init::dbg << $3->listing(NULL); current_scom->add_row_rpn($3); }
-;
-
-        // TODO num_list could be VARs,LITs, or even ranges eg {1,2..5,7}
-
-id_colexpr: id_col { $1->push_op(EQ); }
-            | INIT_EQ id_col { $$ = $2; $2->push_op(EQ); }
-            | INIT_NE id_col { $$ = $2; $2->push_op(NE); }
-            | INIT_LE id_col { $$ = $2; $2->push_op(LE); }
-            | INIT_GE id_col { $$ = $2; $2->push_op(GE); }
-            | '<' id_col     { $$ = $2; $2->push_op(LT); }
-            | '>' id_col     { $$ = $2; $2->push_op(GT); }
-;
-
-id_col:         INIT_ID { $$ = new init::Rpn(*($1),yyscomlist->get_symbols()); delete $1; }  
-                | INIT_INTEGER { $$ = new init::Rpn($1,yyscomlist->get_symbols()); }
-                | '{' num_list '}' { $$ = $2; $2->push_op(LIST); }
-                | ATTRIBUTE_ENUM { $$ = new init::Rpn((yyscomlist->get_symbols())->get_attr_enum_val(*($1)),yyscomlist->get_symbols()); delete $1; }  
-;
-
-num_list:       INIT_INTEGER { $$ = new init::Rpn($1,yyscomlist->get_symbols()); }
-                | INIT_ID    { $$ = new init::Rpn(*($1),yyscomlist->get_symbols()); }
-                | num_list ',' INIT_INTEGER { $$ = $1; $1->merge(new init::Rpn($3,yyscomlist->get_symbols())); }
-                | num_list ',' INIT_ID { $$ = $1; $1->merge(new init::Rpn(*($3),yyscomlist->get_symbols())); }
-                | ATTRIBUTE_ENUM { $$ = new init::Rpn((yyscomlist->get_symbols())->get_attr_enum_val(*($1)),yyscomlist->get_symbols()); }
-;
-
- /* expr should return an RPN string of some kind */
-expr:   INIT_INTEGER                    { $$= new init::Rpn($1,yyscomlist->get_symbols()); }
-        | INIT_ID                       { $$= new init::Rpn(*($1),yyscomlist->get_symbols()); delete $1; }
-        | ATTRIBUTE_ENUM                { $$= new init::Rpn((yyscomlist->get_symbols())->get_attr_enum_val(*($1)),yyscomlist->get_symbols()); delete $1; }
-        | INIT_INT64                    { $$=new init::Rpn($1,yyscomlist->get_symbols()); }
-        | expr ATTRIBUTE_INDEX          { $1->push_array_index(*($2)); delete $2; }
-        | expr INIT_LOGIC_OR expr       { $$ = $1->push_merge($3,OR); }
-        | expr INIT_LOGIC_AND expr      { $$ = $1->push_merge($3,AND); }
-        | expr INIT_EQ expr             { $$ = $1->push_merge($3,EQ); }
-        | expr INIT_NE expr             { $$ = $1->push_merge($3,NE); }
-        | expr INIT_LE expr             { $$ = $1->push_merge($3,LE); }
-        | expr INIT_GE expr             { $$ = $1->push_merge($3,GE); }
-        | expr '<' expr                 { $$ = $1->push_merge($3,LT); }
-        | expr '>' expr                 { $$ = $1->push_merge($3,GT); }
-        | expr INIT_SHIFT_RIGHT expr    { $$ = $1->push_merge($3,SHIFTRIGHT); }
-        | expr INIT_SHIFT_LEFT expr     { $$ = $1->push_merge($3,SHIFTLEFT); }
-        | expr '+' expr                 { $$ = $1->push_merge($3,PLUS); }
-        | expr '-' expr                 { $$ = $1->push_merge($3,MINUS); }
-        | expr '*' expr                 { $$ = $1->push_merge($3,MULT); }
-        | expr '/' expr                 { $$ = $1->push_merge($3,DIVIDE); }
-        | expr '%' expr                 { $$ = $1->push_merge($3,MOD); }
-        | expr '&' expr                 { $$ = $1->push_merge($3,BITWISEAND); }
-        | expr '|' expr                 { $$ = $1->push_merge($3,BITWISEOR); }
-        | '!' expr                      { $$ = $2->push_op(NOT); }
-        | '(' expr ')'                  { $$ = $2; }
-;
-
-
-%%
-
-void yyerror(const char * s)
-{
-    //dump dbg stringstream to file
-    init::capture_dbg(dbg_fname);
-
-    init::erros << setfill('-') << setw(80) << '-' << endl;
-    init::erros << setfill('0');
-    init::erros << "Parse Error: " << yyfname.back().c_str() << ", line "
-                << dec << setw(4) << yyline << ": yychar = " 
-                << dec << (uint32_t) yychar << " = 0x" << hex << (uint32_t) yychar << " = '";
-    if(isprint(yychar)) init::erros << (char)yychar;
-    else  init::erros << ' ';
-    init::erros << "'  yylval = " << hex << "0x" <<  setw(16) << yylval.uint64 << endl;
-    init::erros << "ERROR: " << s << endl;
-    init::erros << setfill('-') << setw(80) << '-' << endl << endl;
-
-    cout << init::erros.str() << endl;
-}
diff --git a/src/usr/hwpf/ifcompiler/initRpn.C b/src/usr/hwpf/ifcompiler/initRpn.C
deleted file mode 100755
index 1679d38c6..000000000
--- a/src/usr/hwpf/ifcompiler/initRpn.C
+++ /dev/null
@@ -1,1396 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/ifcompiler/initRpn.C $                           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// Change Log *************************************************************************************
-//
-//  Flag   Reason  Userid   Date     Description
-//  ----- -------- -------- -------- -------------------------------------------------------------
-//         D754106 dgilbert 06/14/10 Create
-//  dg002 SW039868 dgilbert 10/15/10 Add support to filter unneeded inits by EC
-//  dg003 SW047506 dgilbert 12/09/10 SERIES filtering
-//                 andrewg  05/24/11 Port over for VPL/PgP
-//                 andrewg  09/19/11 Updates based on review
-//                 camvanng 11/08/11 Added support for attribute enums
-//                 andrewg  11/09/11 Multi-dimensional array and move to common fapi include
-//                 camvanng 01/06/12 Support for writing an attribute to a SCOM register
-//                 camvanng 01/20/12 Support for using a range of indexes for array attributes
-//                 camvanng 04/16/12 Support defines for SCOM address
-//                                   Support defines for bits, scom_data and attribute columns
-//                                   Delete obsolete code for defines support
-//                 camvanng 05/07/12 Support for associated target attributes
-//                 camvanng 05/22/12 Ability to do simple operations on attributes
-//                                   in the scom_data column
-//        SW146714 camvanng 06/08/12 Use two bytes to store row rpn sequence byte count
-//                 camvanng 06/15/12 Ability to do bitwise OR and AND operations
-//                 camvanng 06/27/12 Improve error and debug tracing
-// End Change Log *********************************************************************************
-// $Id: initRpn.C,v 1.11 2014/06/30 19:56:40 thi Exp $
-/**
- * @file initRpn.C
- * @brief Definition of the initRpn class. Handles Reverse Polish Notation equations for initfiles
- */
-#include <initRpn.H>
-#include <initSymbols.H>
-//#include <initSpy.H>
-#include <stdlib.h>
-#include <sstream>
-#include <iomanip>
-#include <iostream>
-#include <stdexcept>
-#include <cstring>
-#include <fapiHwpInitFileInclude.H>  // Requires file from hwpf
-
-extern void yyerror(const char * s);
-
-using namespace init;
-
-const char * OP_TXT[] =
-{
-    "PUSH",
-    "AND",
-    "OR",
-    "NOT",
-    "EQ",
-    "NE",
-    "GT",
-    "GE",
-    "LT",
-    "LE",
-    "PLUS",
-    "MINUS",
-    "MULT",
-    "DIVIDE",
-    "MOD",
-    "LIST",
-    "SHIFTLEFT",
-    "SHIFTRIGHT",
-    "FALSE",             //dg003a
-    "TRUE",              //dg003a
-    "BITWISEAND",
-    "BITWISEOR",
-};
-
-std::string Rpn::cv_empty_str;
-
-//-------------------------------------------------------------------------------------------------
-
-Rpn::Rpn(uint32_t i_uint,Symbols * symbols) : iv_symbols(symbols)
-{ push_int(i_uint); }
-
-//-------------------------------------------------------------------------------------------------
-
-Rpn::Rpn(std::string  i_id, Symbols * symbols, TYPE i_type) : iv_symbols(symbols)
-{ push_id(i_id, i_type); }
-
-//-------------------------------------------------------------------------------------------------
-
-Rpn::Rpn(uint64_t i_uint, Symbols * symbols) : iv_symbols(symbols)
-{
-    push_int64(i_uint);
-}
-
-//-------------------------------------------------------------------------------------------------
-
-bool Rpn::operator==(const Rpn & r)
-{
-    bool result = false;
-    if (iv_rpnstack.size() == r.iv_rpnstack.size())
-    {
-        if (iv_symbols == r.iv_symbols)
-        {
-            result = true;
-            RPNSTACK::const_iterator c1 = iv_rpnstack.begin();
-            RPNSTACK::const_iterator c2 = r.iv_rpnstack.begin();
-            for (; c1 != iv_rpnstack.end(); ++c1, ++c2)
-            {
-                if (*c1 != *c2)
-                {
-                    result = false;
-                    break;
-                }
-            }
-        }
-        else // they have different symbol tables
-        {
-            result = true;
-            RPNSTACK::const_iterator c1 = iv_rpnstack.begin();
-            RPNSTACK::const_iterator c2 = r.iv_rpnstack.begin();
-            for (; c1 != iv_rpnstack.end(); ++c1, ++c2)
-            {
-                uint32_t t1 = (*c1) & TYPE_MASK;
-                uint32_t t2 = (*c2) & TYPE_MASK;
-                if(t1 != t2)
-                {
-                    result = false;
-                    break;
-                }
-                switch (t1)
-                {
-                    case SYMBOL:
-                        {
-                            string s1 = iv_symbols->find_name(*c1);
-                            string s2 = (r.iv_symbols)->find_name(*c2);
-                            if(s1 != s2) result = false;
-                        }
-                        break;
-                    case NUMBER:
-                        {
-                            uint32_t size = 0;
-                            uint64_t data1 = iv_symbols->get_numeric_data(*c1,size);
-                            uint64_t data2 = (r.iv_symbols)->get_numeric_data(*c2,size);
-                            // do we care if the size is different only the value?
-                            if(data1 != data2) result = false;
-                        }
-                        break;
-                    case OPERATION:   // independent of symbol table - just compare
-                    default:          // just compare
-                        if(*c1 != *c2) result = false;
-                        break;
-                }
-                if(result == false) break;
-            }
-        }
-    }
-    return result;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Rpn::push_int(uint32_t i_uint)
-{
-    uint32_t rpn_id = iv_symbols->find_numeric_lit(i_uint,4);
-    iv_rpnstack.push_back(rpn_id);
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Rpn::push_int64(uint64_t i_uint)
-{
-    uint32_t rpn_id = iv_symbols->find_numeric_lit(i_uint,8);
-    iv_rpnstack.push_back(rpn_id);
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Rpn::push_id(std::string & i_id, TYPE i_type)
-{
-    uint32_t rpn_id = 0;
-    std::string s(i_id);
-
-    for (std::string::iterator c = s.begin(); c != s.end(); ++c)
-    {
-        *c = toupper(*c);
-    }
-
-    rpn_id = iv_symbols->use_symbol(s);
-
-    iv_rpnstack.push_back(rpn_id);
-
-    //If this is an associated target's attribute,
-    //Add the target number as a numerical literal
-    size_t pos = s.find(ASSOC_TGT_ATTR);
-    if (pos != string::npos)
-    {
-        size_t len = ASSOC_TGT_ATTR.length();
-        pos = s.find('.');
-        if ((pos != string::npos) && (pos > len))
-        {
-            uint32_t targetNum = strtoul(s.substr(len, pos-len).c_str(), NULL, 0);
-            //printf("Rpn::push_id: Target# %u\n", targetNum);
-            push_int(targetNum);
-        }
-        else
-        {
-            std::ostringstream oss;
-            oss << "Rpn::push_id: Invalid associated target attribute " << i_id.c_str();
-            yyerror(oss.str().c_str());
-        }
-    }
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Rpn::push_array_index(std::string &i_array_idx)
-{
-    string l_idx = i_array_idx;
-    // strip of leading "[" and last "]"
-    l_idx = l_idx.substr(1,(l_idx.length() - 2));
-    uint32_t l_num_idx = 0;
-    std::vector<string> l_idxstr;
-
-    // find index strings in comma separated list and save in vector
-    size_t l_pos = 0;
-    l_pos = l_idx.find(',');
-    while(l_pos != string::npos)
-    {
-        l_idxstr.push_back(l_idx.substr(0, l_pos));
-        l_idx = l_idx.substr(l_pos+1);
-        l_pos = l_idx.find(',');
-    }
-
-    // Push back the original idx string or the last string in the list
-    l_idxstr.push_back(l_idx);
-
-    uint32_t l_array_val = 0, l_array_val2 = 0;
-    uint32_t rpn_id = 0;
-    for (size_t i = 0; i < l_idxstr.size(); i++)
-    {
-        //Is it a range?
-        l_pos = l_idxstr.at(i).find("..");
-        if (l_pos != string::npos)
-        {
-            l_array_val = atoi(l_idxstr.at(i).substr(0,l_pos).c_str());
-            l_array_val2 = atoi(l_idxstr.at(i).substr(l_pos + 2).c_str());
-            //printf("I>Rpn::push_array_index: %u..%u\n", l_array_val, l_array_val2);
-            if (l_array_val >= l_array_val2)
-            {
-                std::ostringstream oss;
-                oss << "Rpn::push_array_index: Invalid attribute array index range: "
-                    << l_idxstr.at(i);
-                yyerror(oss.str().c_str());
-            }
-
-            for (uint32_t val = l_array_val; val <= l_array_val2; val++)
-            {
-                l_num_idx++;
-                rpn_id = iv_symbols->find_numeric_array_lit(val,4);
-                iv_rpnstack.push_back(rpn_id);
-                //printf("Array Index: %u  rpn_id:0x%8X\n", val, rpn_id);
-            }
-        }
-        else
-        {
-            l_num_idx++;
-            l_array_val = atoi(l_idxstr.at(i).c_str());
-            rpn_id = iv_symbols->find_numeric_array_lit(l_array_val,4);
-            iv_rpnstack.push_back(rpn_id);
-
-            //printf("Array Index: %s  decimal:%u  rpn_id:0x%8X\n",l_idxstr.at(i).c_str(),l_array_val,rpn_id);
-        }
-    }
-
-    // Save the index range for this rpn
-    if (iv_array_idx_range.size())
-    {
-        if (iv_array_idx_range.back() != l_num_idx)
-        {
-            std::ostringstream oss;
-            oss << "Rpn::push_array_index: Array attribute has different range of index "
-                << "for each dimension: " << i_array_idx << " iv_array_idx_range: "
-                << iv_array_idx_range.back() << " l_num_idx: " << l_num_idx;
-            yyerror(oss.str().c_str());
-        }
-    }
-    else
-    {
-       iv_array_idx_range.push_back(l_num_idx);
-    }
-
-    //printf("Rpn::push_array_index: %s, iv_array_idx_range.size %u\n", i_array_idx.c_str(), iv_array_idx_range.size());
-}
-
-//-------------------------------------------------------------------------------------------------
-
-bool Rpn::isTrue() const  //dg003a
-{
-    if((iv_rpnstack.size() == 1) && (iv_rpnstack[0] == (TRUE_OP | OPERATION))) return true;
-    return false;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-bool Rpn::isFalse() const //dg003a
-{
-    if((iv_rpnstack.size() == 1) && (iv_rpnstack[0] == (FALSE_OP | OPERATION))) return true;
-    return false;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-Rpn * Rpn::push_op(IfRpnOp op)
-{
-    uint32_t v = op;
-    if(op == LIST)  // calculate list size
-    {
-        uint32_t count = 0;
-        for(RPNSTACK::const_reverse_iterator r = iv_rpnstack.rbegin(); r != iv_rpnstack.rend(); ++r)
-        {
-            if(((*r) & TYPE_MASK) == OPERATION) break;
-            ++count;
-        }
-        v |= (count << 8);
-    }
-    iv_rpnstack.push_back(v | OPERATION);
-
-    return this;
-}
-
-//-------------------------------------------------------------------------------------------------
-// @post i_rpn is deleted
-
-Rpn *  Rpn::push_merge(Rpn * i_rpn, IfRpnOp op)
-{
-    //dg003a begin
-    Rpn * result = this;
-
-    // oportunity for Rpn optimization
-    //   rpn && true, -> rpn
-    //   rpn && false, -> false
-    //   rpn || false, -> rpn
-    //   rpn || true, -> true
-    if(op == AND)
-    {
-        if(i_rpn->isTrue())
-        {
-            delete i_rpn;
-            return result; // leave this RPN alone
-        }
-        if(this->isTrue())
-        {
-            iv_rpnstack.clear();
-            iv_array_idx_range.clear();
-            return merge(i_rpn); // merge deletes i_rpn
-        }
-        if(i_rpn->isFalse() || this->isFalse())
-        {
-            iv_rpnstack.clear();
-            iv_array_idx_range.clear();
-            delete i_rpn;
-            push_op(FALSE_OP);
-            return result;
-        }
-    }
-    else if(op == OR)
-    {
-        if(i_rpn->isFalse())
-        {
-            delete i_rpn;
-            return result;
-        }
-        if(this->isFalse())
-        {
-            iv_rpnstack.clear();
-            iv_array_idx_range.clear();
-            return merge(i_rpn);  // merge deletes i_rpn
-        }
-        if(i_rpn->isTrue() || this->isTrue())
-        {
-            iv_rpnstack.clear();
-            iv_array_idx_range.clear();
-            delete i_rpn;
-            push_op(TRUE_OP);
-            return result;
-        }
-    }
-
-    // Filter out SERIES calculations since this is for SERIES_IP only
-    // There might be a better place/way to do this??
-    // TODO - No idea what this is really
-#if 0
-    Rpn r1("SERIES",iv_symbols);
-    Rpn r2("SERIES_IP",iv_symbols);
-    Rpn r3("SERIES_Z",iv_symbols);
-    if( *this == r1)
-    {
-        if((op == EQ && *i_rpn == r2) || (op == NE && *i_rpn == r3))
-        {
-            iv_rpnstack.clear();
-            iv_array_idx_range.clear();
-            push_op(TRUE_OP);
-            delete i_rpn;
-            return result;
-        }
-        if((op == EQ && *i_rpn == r3) || (op == NE && *i_rpn == r2))
-        {
-            iv_rpnstack.clear();
-            iv_array_idx_range.clear();
-            push_op(FALSE_OP);
-            delete i_rpn;
-            return result;
-        }
-    }
-#endif
-    // These two expressions are seen as a result of macro expansion
-    // Reduce (expr1 == expr2) == 0 ->  expr1 != expr2
-    // Reduce (expr1 == expr2) == 1 ->  expr1 == expr2
-    //      Reduce for any logic operation
-    if(op == EQ)
-    {
-        Rpn r_zero((uint32_t)0,iv_symbols);
-        Rpn r_one((uint32_t)1, iv_symbols);
-
-        if ((*i_rpn) == r_zero)
-        {
-            if((*this) == r_zero)
-            {
-                delete i_rpn;
-                iv_rpnstack.pop_back();
-                push_op(TRUE_OP);
-                return result;
-            }
-            if((*this) == r_one)
-            {
-                delete i_rpn;
-                iv_rpnstack.pop_back();
-                push_op(FALSE_OP);
-                return result;
-            }
-            // else check for logical op
-            switch (iv_rpnstack.back())
-            {
-                case (AND | OPERATION):
-                case (OR  | OPERATION):
-                    push_op(NOT);
-                    delete i_rpn;
-                    return result;
-
-                case (NOT | OPERATION):  // untie the NOT
-                    iv_rpnstack.pop_back();
-                    delete i_rpn;
-                    return result;
-
-                case (EQ | OPERATION):
-                    iv_rpnstack.back() = (NE | OPERATION);
-                    delete i_rpn;
-                    return result;
-
-                case (NE | OPERATION):
-                    iv_rpnstack.back() = (EQ | OPERATION);
-                    delete i_rpn;
-                    return result;
-
-                case (GT | OPERATION):
-                    iv_rpnstack.back() = (LE | OPERATION);
-                    delete i_rpn;
-                    return result;
-
-                case (GE | OPERATION):
-                    iv_rpnstack.back() = (LT | OPERATION);
-                    delete i_rpn;
-                    return result;
-
-                case (LT | OPERATION):
-                    iv_rpnstack.back() = (GE | OPERATION);
-                    delete i_rpn;
-                    return result;
-
-                case (LE | OPERATION):
-                    iv_rpnstack.back() = (GT | OPERATION);
-                    delete i_rpn;
-                    return result;
-
-                case (TRUE_OP | OPERATION):
-                    iv_rpnstack.back() = (FALSE_OP | OPERATION);
-                    delete i_rpn;
-                    return result;
-
-                case (FALSE_OP | OPERATION):
-                    iv_rpnstack.back() = (TRUE_OP | OPERATION);
-                    delete i_rpn;
-                    return result;
-
-                default: // Not a logic operation - leave it alone
-                    break;
-            }
-        }
-        else if((*i_rpn) == r_one)
-        {
-            if((*this) == r_one)
-            {
-                delete i_rpn;
-                iv_rpnstack.pop_back();
-                push_op(TRUE_OP);
-                return result;
-            }
-            if((*this) == r_zero)
-            {
-                delete i_rpn;
-                iv_rpnstack.pop_back();
-                push_op(FALSE_OP);
-                return result;
-            }
-            // else check for logical op - leave it as is
-            uint32_t l_op = iv_rpnstack.back();
-            if((l_op == (AND | OPERATION)) ||
-               (l_op == (OR  | OPERATION)) ||
-               (l_op == (NOT | OPERATION)) ||
-               (l_op == (EQ  | OPERATION)) ||
-               (l_op == (NE  | OPERATION)) ||
-               (l_op == (GT  | OPERATION)) ||
-               (l_op == (GE  | OPERATION)) ||
-               (l_op == (LT  | OPERATION)) ||
-               (l_op == (LE  | OPERATION)) ||
-               (l_op == (TRUE_OP | OPERATION)) ||
-               (l_op == (FALSE_OP | OPERATION)))
-            {
-                delete i_rpn;
-                return result;
-            }
-        }
-    }
-
-    // other stuff i've seen  TODO
-    //     (0 == 1) == 1 , reduced already to (0 == 1)  used to turn off a row - Could eliminate the row?
-    //
-
-
-    //dg003a end
-
-    iv_rpnstack.insert(iv_rpnstack.end(), i_rpn->iv_rpnstack.begin(), i_rpn->iv_rpnstack.end());
-    for (size_t i = 0; i < i_rpn->iv_array_idx_range.size(); i++)
-    {
-        iv_array_idx_range.push_back(i_rpn->iv_array_idx_range.at(i));
-    }
-    result = push_op(op);
-
-    delete i_rpn;
-    return result;
-}
-
-//-------------------------------------------------------------------------------------------------
-// @post i_rpn is deleted
-
-Rpn * Rpn::merge(Rpn * i_rpn)
-{
-    iv_rpnstack.insert(iv_rpnstack.end(), i_rpn->iv_rpnstack.begin(), i_rpn->iv_rpnstack.end());
-    for (size_t i = 0; i < i_rpn->iv_array_idx_range.size(); i++)
-    {
-        iv_array_idx_range.push_back(i_rpn->iv_array_idx_range.at(i));
-    }
-    delete i_rpn;
-    return this;
-}
-
-//-------------------------------------------------------------------------------------------------
-// See header file for contract
-void Rpn::bin_read(BINSEQ::const_iterator & bli, uint16_t i_size, Symbols * symbols)
-{
-
-    if(symbols) iv_symbols = symbols;
-    iv_rpnstack.clear();
-    iv_array_idx_range.clear();
-
-    while(i_size)
-    {
-        uint32_t v = *bli++;
-        --i_size;
-        if(v < LAST_OP) // operator
-        {
-            if(v == LIST)
-            {
-                --i_size;
-                v |= (*bli++) << 8;
-            }
-           iv_rpnstack.push_back(v | OPERATION);
-        }
-        else    // tag
-        {
-            v = (v << 8) + (*bli++);
-            --i_size;
-
-            uint32_t l_rpn_id = iv_symbols->get_rpn_id(v);
-            iv_rpnstack.push_back(l_rpn_id);
-           
-            //Check for attribute of array type
-            if (v & IF_ATTR_TYPE)
-            {
-                //Check for associated target attribute
-                if ((v & IF_TYPE_MASK) == IF_ASSOC_TGT_ATTR_TYPE)
-                {
-                    v = *bli++;
-                    v = (v << 8) + (*bli++);
-                    i_size -= 2;
-                    iv_rpnstack.push_back(iv_symbols->get_rpn_id(v));
-                    //printf("Rpn::bin_read: Assoc target attribute id 0x%x\n", v);
-                }
-
-                //Get the attribute dimension & shift it to the LS nibble
-                uint32_t l_type = iv_symbols->get_attr_type(l_rpn_id);
-                uint8_t l_attrDimension = (static_cast<uint8_t>(l_type) & ATTR_DIMENSION_MASK) >> 4;
-                for(uint8_t i=0; i < l_attrDimension; i++)
-                {
-                    v = *bli++;
-                    v = (v << 8) + (*bli++);
-                    iv_rpnstack.push_back(iv_symbols->get_rpn_id(v));
-                    i_size -= 2;
-                }
-            }
-        }
-    }
-}
-
-//-------------------------------------------------------------------------------------------------
-BINSEQ::const_iterator Rpn::bin_read_one_op(BINSEQ::const_iterator & bli, Symbols * symbols)
-{
-    if(symbols) iv_symbols = symbols;
-    while(true)
-    {
-        uint32_t v = *bli++;
-        if(v < LAST_OP) // operator
-        {
-            if(v == LIST)  // list has a size and another OP associated with it.
-            {
-                v |= (*bli++) << 8;   // merge size into LIST op
-                iv_rpnstack.push_back(v | OPERATION);
-                v = *bli++;  // get the list operation (EQ or NE)
-            }
-            iv_rpnstack.push_back(v | OPERATION);
-            // we are done
-            break;
-        }
-        // not op - always two bytes
-        v = (v << 8) + (*bli++);
-        iv_rpnstack.push_back(iv_symbols->get_rpn_id(v));
-    }
-    return bli;
-}
-
-//-------------------------------------------------------------------------------------------------
-void Rpn::bin_read_one_id(BINSEQ::const_iterator & io_bli, Symbols * i_symbols)
-{
-    if(i_symbols) iv_symbols = i_symbols;
-
-    uint32_t v = *io_bli++;
-    if(v < LAST_OP) // operator
-    {
-        std::ostringstream errss;
-        errss << "Rpn::bin_read_one_id: This is an op 0x" << hex << v << endl;
-        throw std::invalid_argument(errss.str());
-    }
-
-    // not op - always two bytes
-    v = (v << 8) + (*io_bli++);
-
-    uint32_t l_rpn_id = iv_symbols->get_rpn_id(v);
-    iv_rpnstack.push_back(l_rpn_id);
-
-    //Check for attribute of array type
-    if (v & IF_ATTR_TYPE)
-    {
-        //Check for associated target attribute
-        if ((v & IF_TYPE_MASK) == IF_ASSOC_TGT_ATTR_TYPE)
-        {
-            v = *io_bli++;
-            v = (v << 8) + (*io_bli++);
-            iv_rpnstack.push_back(iv_symbols->get_rpn_id(v));
-            //printf("Rpn::bin_read_one_id: Assoc target attribute id 0x%x\n", v);
-        }
-
-        //Get the attribute dimension & shift it to the LS nibble
-        uint32_t l_type = iv_symbols->get_attr_type(l_rpn_id);
-        uint8_t l_attrDimension = (static_cast<uint8_t>(l_type) & ATTR_DIMENSION_MASK) >> 4;
-        for(uint8_t i=0; i < l_attrDimension; i++)
-        {
-            v = *io_bli++;
-            v = (v << 8) + (*io_bli++);
-            iv_rpnstack.push_back(iv_symbols->get_rpn_id(v));
-        }
-    }
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Rpn::append(const Rpn & i_rpn)
-{
-    iv_rpnstack.insert(iv_rpnstack.end(), i_rpn.iv_rpnstack.begin(), i_rpn.iv_rpnstack.end());
-    for (size_t i = 0; i < i_rpn.iv_array_idx_range.size(); i++)
-    {
-        iv_array_idx_range.push_back(i_rpn.iv_array_idx_range.at(i));
-    }
-}
-
-//-------------------------------------------------------------------------------------------------
-
-std::string Rpn::symbol_names() const
-{
-    std::string result;
-    for(RPNSTACK::const_iterator i = iv_rpnstack.begin(); i != iv_rpnstack.end(); ++i)
-    {
-        if((*i) & SYMBOL)
-        {
-            if(result.size()) result.append(" ");  // space or lf??
-            result.append(iv_symbols->find_name(*i));
-        }
-    }
-    return result;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-std::string  Rpn::listing(const char * i_desc, const std::string & spyname, bool i_final)
-{
-    std::ostringstream odesc;
-    std::ostringstream oss;
-    uint32_t rpn_byte_size = 0;
-
-
-    oss << std::hex << std::setfill('0');
-
-    //oss << "0x" << std::setw(2) << iv_rpnstack.size() << '\t' << i_desc << std::endl;
-    for(RPNSTACK::iterator i = iv_rpnstack.begin(); i != iv_rpnstack.end(); ++i)
-    {
-        if( (*i) & OPERATION ) // operator
-        {
-            ++rpn_byte_size;
-            uint32_t op_id = (*i) - OPERATION;
-            uint32_t count = op_id >> 8;   // NOTE: only the LIST operator has a count
-            op_id &= OP_MASK;
-
-            if(op_id < LAST_OP)
-            {
-                oss << "0x" << std::setw(2) << op_id << "\t\t" << OP_TXT[op_id] << std::endl;
-                if(op_id == LIST)
-                {
-                    ++rpn_byte_size;
-                    oss << "0x" << std::setw(2) << count << "\t\t"
-                        << std::dec << count << std::hex << std::endl;
-                }
-            }
-            else
-            {
-                oss << "0x" << op_id << "\t\t" << "INVALID OPERATION" << std::endl;
-            }
-        }
-        else if((*i) & NUMBER)
-        {
-            uint32_t size = 0;
-            uint64_t data = iv_symbols->get_numeric_data(*i,size);
-            if(i_final)
-            {
-                uint32_t tag = iv_symbols->get_numeric_tag(*i);
-                rpn_byte_size += 2;
-                oss << "0x" << std::setw(4) << tag << "\t\t" << "PUSH 0x"
-                    << std::setw(size*2) << data << std::endl;
-            }
-            else
-            {
-                rpn_byte_size += size;
-                oss << "0x" << std::setw(size * 2) << data << '\t' << "Numerical Literal" << std::endl;
-            }
-        }
-        else if((*i) & ARRAY_INDEX)
-        {
-            uint32_t size = 0;
-            uint64_t data = iv_symbols->get_numeric_array_data(*i,size);
-            if(i_final)
-            {
-                uint32_t tag = iv_symbols->get_numeric_array_tag(*i);
-                rpn_byte_size += 2;
-                oss << "0x" << std::setw(4) << tag << "\t\t" << "PUSH 0x"
-                    << std::setw(size*2) << data << std::endl;
-            }
-            else
-            {
-                rpn_byte_size += size;
-                oss << "0x" << std::setw(size * 2) << data << '\t' << "Numerical Literal (array index)" << std::endl;
-            }
-        }
-        else if((*i) & SYMBOL)
-        {
-            std::string name = iv_symbols->find_name(*i);
-
-            if(i_final)
-            {
-                uint32_t val = iv_symbols->get_tag(*i);
-
-                if (val & IF_ATTR_TYPE)
-                {
-                    rpn_byte_size += 2;
-                    oss << "0x" << std::setw(4) << val << "\t\t" << "PUSH " << name << std::endl;
-                }
-                else
-                {
-                    rpn_byte_size +=4;
-                    oss << "0x" << std::setw(8) << val  << '\t' << name << "\tUnresolved!" << std::endl;
-                }
-            }
-            else  // debug listing
-            {
-                rpn_byte_size +=2;
-                //oss << "0x" << std::setw(8) << *i << '\t'
-                oss << "\t\t" << "PUSH " << name << std::endl;
-
-            }
-        }
-        else
-        {
-            oss << "0x" << std::setw(8) << *i << '\t' << "Unknown RPN id" << std::endl;
-        }
-    }
-
-    //Skip size and desc for empty desc string and SYMBOL literal
-    if(i_desc && (0 == strlen(i_desc)) && (iv_rpnstack.front() & SYMBOL))
-    {
-        odesc << oss.str();
-    }
-    else
-    {
-        odesc << std::hex << std::setfill('0')
-            << "0x" << std::setw(4) << rpn_byte_size << "\t\t";
-        if(i_desc) odesc << i_desc;
-        else odesc << std::dec << rpn_byte_size << " BYTES";
-        odesc << std::endl;
-        odesc << oss.str();
-    }
-
-    return odesc.str();
-}
-
-//-------------------------------------------------------------------------------------------------
-
-// binary version to write to file
-void Rpn::bin_str(BINSEQ & o_blist, uint32_t i_num_addrs, uint32_t i_addr_num,
-                  bool i_prepend_count, bool i_one_byte_count)
-{
-    BINSEQ blist;
-    uint32_t count = 0;
-    uint32_t l_num_idx = 0; //number of array index in the range
-    uint32_t l_num_array_attrs = 0;
-
-    for(RPNSTACK::iterator i = iv_rpnstack.begin(); i != iv_rpnstack.end(); ++i)
-    {
-        uint32_t v = *i;
-        uint32_t type = v & TYPE_MASK;
-        uint16_t tag;
-
-        switch (type)
-        {
-            case OPERATION:     blist.push_back((uint8_t)v);
-                                ++count;
-                                if((v & OP_MASK) == LIST)
-                                {
-                                    ++count;
-                                    blist.push_back((uint8_t)(v >> 8));
-                                }
-                                l_num_idx = 0;  //reset
-                                break;
-
-            case SYMBOL:        tag = iv_symbols->get_tag(v);
-                                blist.push_back((uint8_t)(tag >> 8));
-                                blist.push_back((uint8_t) tag);
-                                count += 2;
-                                l_num_idx = 0;  //reset
-                                break;
-
-            case NUMBER:        tag = iv_symbols->get_numeric_tag(v);
-                                blist.push_back((uint8_t)(tag >> 8));
-                                blist.push_back((uint8_t) tag);
-                                count += 2;
-                                l_num_idx = 0;  //reset
-                                break;
-            case ARRAY_INDEX:
-                                //Check if this rpn has any array attribute with a range of index specified
-                                if ((0 == l_num_idx) && iv_array_idx_range.size())
-                                {
-                                    if (iv_array_idx_range.size() > l_num_array_attrs)
-                                    {
-                                        l_num_idx = iv_array_idx_range.at(l_num_array_attrs);
-                                        l_num_array_attrs++;
-
-                                        //Error if index range is not equal to address range
-                                        if ((1 < l_num_idx) && (l_num_idx != i_num_addrs))
-                                        {
-                                            std::ostringstream errss;
-                                            errss << "Rpn::bin_str: Index range " << l_num_idx 
-                                                  << " != Address range " << i_num_addrs << endl;
-                                            throw std::invalid_argument(errss.str());
-                                        }
-                                    }
-                                }
-
-                                if (0 == l_num_idx)
-                                {
-                                    //Error if no index range specified
-                                    std::ostringstream errss;
-                                    errss << "Rpn::bin_str: No index range specified for array attribute\n";
-                                    throw std::invalid_argument(errss.str());
-                                }
-
-                                if (1 < l_num_idx)
-                                {
-                                    v = *(i + i_addr_num);
-                                    if ((v & TYPE_MASK) != ARRAY_INDEX)
-                                    {
-                                        std::ostringstream errss;
-                                        errss << "Rpn::bin_str: Rpn 0x" << hex << v
-                                              << " is not array index " << endl;
-                                        throw std::invalid_argument(errss.str());
-                                    }
-                                }
-                                tag = iv_symbols->get_numeric_array_tag(v);
-                                blist.push_back((uint8_t)(tag >> 8));
-                                blist.push_back((uint8_t) tag);
-                                count += 2;
-                                if (1 < l_num_idx)      //Skip the other indexes in the range
-                                {
-                                    i += l_num_idx - 1;
-                                }
-                                break;
-
-            default:
-                    std::ostringstream errss;
-                    errss << "Rpn::bin_str: Invalid Rpn type: 0x" << hex << v << endl;
-                    throw std::invalid_argument(errss.str());
-                    break;
-        }
-    }
-
-    //std::cout << "Rpn::bit_str(): iv_rpnstack size: " << iv_rpnstack.size() << std::endl;
-    //std::cout << " Rpn::bit_str(): rpn byte count: " << count << std::endl;
-    if (i_prepend_count)
-    {
-        if (true == i_one_byte_count)
-        {
-            //Expect count <= 255
-            if (0xFF < count)
-            {
-                std::ostringstream errss;
-                errss << "Rpn::bin_str: count " << count << " > 0xFF\n";
-                throw std::invalid_argument(errss.str());
-            }
-
-            o_blist.push_back((uint8_t) count);
-        }
-        else
-        {
-            //Expect count <= 65535 
-            if (0xFFFF < count)
-            {
-                std::ostringstream errss;
-                errss << "Rpn::bin_str: count " << count << " > 0xFFFF\n";
-                throw std::invalid_argument(errss.str());
-            }
-
-            o_blist.push_back((uint8_t)(count >> 8));
-            o_blist.push_back((uint8_t) count);
-        }
-    }
-
-    o_blist.insert(o_blist.end(), blist.begin(), blist.end());
-}
-
-//-------------------------------------------------------------------------------------------------
-// Used for RPN filtering (resolve())
-void Rpn::pop_bool(EVAL_STACK & i_stack, RPN_VALUE & o_value) //dg002a
-{
-    // convert numbers or any to bool
-    if(i_stack.size())
-    {
-        o_value = i_stack.back();
-        i_stack.pop_back();
-        if(o_value.type == RPN_NUMBER)
-        {
-            if(o_value.data == 0) o_value.type = RPN_FALSE;
-            else
-            {
-                o_value.type = RPN_TRUE;
-                if(o_value.data != 1)
-                {
-                    cerr << "Was expecting a bool, got a number - assume true" << endl;
-                }
-            }
-        }
-        else if(o_value.type == RPN_ANY) o_value.type = RPN_TRUE;
-        // else already a bool
-    }
-    else
-    {
-        o_value.type = RPN_TRUE;
-        cerr << "Empty stack!" << endl;
-    }
-}
-//-------------------------------------------------------------------------------------------------
-
-void Rpn::pop_number(EVAL_STACK & i_stack, RPN_VALUE & o_value) //dg002a
-{
-    // Convert bools to ANY if a number is expected (eg true == 1)
-    if(i_stack.size())
-    {
-        o_value = i_stack.back();
-        i_stack.pop_back();
-        //if(o_value.type != RPN_NUMBER && o_value.type != RPN_ANY)
-        //{
-        //    if(o_value.type == RPN_FALSE) o_value.data = 0;
-        //    else if(o_value.type == RPN_TRUE) o_value.data = 1;
-        //    //o_value.type = RPN_NUMBER; // not safe when just checking EC
-        //    o_value.type = RPN_ANY;
-        //}
-        // else leave as is
-    }
-    else
-    {
-        o_value.type = RPN_ANY;
-        cerr << "Empty stack!" << endl;
-    }
-}
-
-//-------------------------------------------------------------------------------------------------
-
-bool Rpn::resolve_ec(uint32_t i_ec)  //dg002a
-{
-    SYMBOL_VAL_LIST v;
-    SYMBOL_VAL_PAIR p(string("EC"),i_ec);
-    v.push_back(p);
-
-    //SYMBOL_VAL_PAIR p1(string("SERIES"),0xA000006C);
-    //SYMBOL_VAL_PAIR p2(string("SERIES_IP"),0xA000006C);
-    //SYMBOL_VAL_PAIR p3(string("SERIES_Z"),0xA000006D);
-    //v.push_back(p1);
-    //v.push_back(p2);
-    //v.push_back(p3);
-
-    return resolve(v);
-}
-
-//-------------------------------------------------------------------------------------------------
-// Tries to resolve as much of the RPN as  possible
-// @return false means that based on the given varlist, the RPN will never evaluate to true.
-//               eg. unconditionally false
-//         true means RPN either evaluated to true or there is not enough information to evaluate the RPN
-// @note SPY RPNs are not supported
-//
-bool Rpn::resolve(SYMBOL_VAL_LIST & i_varlist)
-{
-
-    bool result = true;
-
-    EVAL_STACK stack;
-    RPN_VALUE rpn_true(RPN_TRUE);
-    RPN_VALUE rpn_false(RPN_FALSE);
-    RPN_VALUE r1;
-    RPN_VALUE r2;
-
-    for(RPNSTACK::const_iterator i = iv_rpnstack.begin(); i != iv_rpnstack.end(); ++i)
-    {
-        if( (*i) & OPERATION )
-        {
-            uint32_t op = (*i) - OPERATION;
-            uint32_t count = op >> 8;
-            op &= OP_MASK;
-
-            switch(op)
-            {
-                case AND:
-                    pop_bool(stack,r1);
-                    pop_bool(stack,r2);
-                    if(r1.type == RPN_TRUE && r2.type == RPN_TRUE) stack.push_back(rpn_true);
-                    else stack.push_back(rpn_false);
-                    break;
-
-                case OR:
-                    pop_bool(stack,r1);
-                    pop_bool(stack,r2);
-                    if(r1.type == RPN_TRUE || r2.type == RPN_TRUE) stack.push_back(rpn_true);
-                    else stack.push_back(rpn_false);
-                    break;
-
-                case NOT:
-                    pop_bool(stack,r1);
-                    if(r1.type == RPN_TRUE) stack.push_back(rpn_false);
-                    else if(r1.type == RPN_FALSE) stack.push_back(rpn_true);
-                    break;
-
-                case EQ:
-                    pop_number(stack,r1);
-                    pop_number(stack,r2);
-                    if(r1.type == RPN_ANY || r2.type == RPN_ANY) stack.push_back(rpn_true);
-                    else if(r1.type == RPN_NUMBER && r2.type == RPN_NUMBER)
-                    {
-                        if(r1.data == r2.data) stack.push_back(rpn_true);
-                        else stack.push_back(rpn_false);
-                    }
-                    else if(r1.type == RPN_TRUE && r2.type == RPN_NUMBER)
-                    {
-                        if(r2.data == 0) stack.push_back(rpn_false);
-                        else stack.push_back(rpn_true);
-                    }
-                    else if(r2.type == RPN_TRUE && r1.type == RPN_NUMBER)
-                    {
-                        if(r1.data == 0) stack.push_back(rpn_false);
-                        else stack.push_back(rpn_true);
-                    }
-                    else if(r1.type == RPN_FALSE && r2.type == RPN_NUMBER)
-                    {
-                        if(r2.data == 0) stack.push_back(rpn_true);
-                        else stack.push_back(rpn_false);
-                    }
-                    else if(r2.type == RPN_FALSE && r1.type == RPN_NUMBER)
-                    {
-                        if(r1.data == 0) stack.push_back(rpn_true);
-                        else stack.push_back(rpn_false);
-                    }
-                    else if((r1.type == RPN_TRUE && r2.type == RPN_FALSE) ||
-                            (r1.type == RPN_FALSE && r2.type == RPN_TRUE)) stack.push_back(rpn_false);
-                    else stack.push_back(rpn_true);
-                    break;
-
-                case NE:
-                    pop_number(stack,r1);
-                    pop_number(stack,r2);
-                    if(r1.type == RPN_ANY || r2.type == RPN_ANY) stack.push_back(rpn_true);
-                    else
-                    {
-                        if(r1.data != r2.data) stack.push_back(rpn_true);
-                        else stack.push_back(rpn_false);
-                    }
-                    break;
-
-                case GT:
-                    pop_number(stack,r1);
-                    pop_number(stack,r2);
-                    if(r1.type == RPN_ANY || r2.type == RPN_ANY) stack.push_back(rpn_true);
-                    else
-                    {
-                        if(r2.data > r1.data) stack.push_back(rpn_true);
-                        else stack.push_back(rpn_false);
-                    }
-                    break;
-
-                case GE:
-                    pop_number(stack,r1);
-                    pop_number(stack,r2);
-                    if(r1.type == RPN_ANY || r2.type == RPN_ANY) stack.push_back(rpn_true);
-                    else
-                    {
-                        if(r2.data >= r1.data) stack.push_back(rpn_true);
-                        else stack.push_back(rpn_false);
-                    }
-                    break;
-
-                case LT:
-                    pop_number(stack,r1);
-                    pop_number(stack,r2);
-                    if(r1.type == RPN_ANY || r2.type == RPN_ANY) stack.push_back(rpn_true);
-                    else
-                    {
-                        if(r2.data < r1.data) stack.push_back(rpn_true);
-                        else stack.push_back(rpn_false);
-                    }
-                    break;
-
-                case LE:
-                    pop_number(stack,r1);
-                    pop_number(stack,r2);
-                    if(r1.type == RPN_ANY || r2.type == RPN_ANY) stack.push_back(rpn_true);
-                    else
-                    {
-                        if(r2.data <= r1.data) stack.push_back(rpn_true);
-                        else stack.push_back(rpn_false);
-                    }
-                    break;
-
-                case PLUS:
-                    r1 = stack.back(); stack.pop_back();
-                    r2 = stack.back(); stack.pop_back();
-                    if(r1.type == RPN_NUMBER && r2.type == RPN_NUMBER)
-                        stack.push_back(RPN_VALUE(r1.data + r2.data,RPN_NUMBER));
-                    else cerr << "Was not expecting a non-numeric value for operator +" << endl;
-                    break;
-
-                case MINUS:
-                    r1 = stack.back(); stack.pop_back();
-                    r2 = stack.back(); stack.pop_back();
-                    if(r1.type == RPN_NUMBER && r2.type == RPN_NUMBER)
-                        stack.push_back(RPN_VALUE(r2.data - r1.data,RPN_NUMBER));
-                    else cerr << "Was not expecting a non-numeric value for operator -" << endl;
-                    break;
-
-                case MULT:
-                    r1 = stack.back(); stack.pop_back();
-                    r2 = stack.back(); stack.pop_back();
-                    if(r1.type == RPN_NUMBER && r2.type == RPN_NUMBER)
-                        stack.push_back(RPN_VALUE(r2.data * r1.data,RPN_NUMBER));
-                    else cerr << "Was not expecting a non-numeric value for operator *" << endl;
-                    break;
-
-                case DIVIDE:
-                    r1 = stack.back(); stack.pop_back();
-                    r2 = stack.back(); stack.pop_back();
-                    if(r1.type == RPN_NUMBER && r2.type == RPN_NUMBER)
-                        stack.push_back(RPN_VALUE(r2.data / r1.data,RPN_NUMBER));
-                    else cerr << "Was not expecting a non-numeric value for operator /" << endl;
-                    break;
-
-                case MOD:
-                    r1 = stack.back(); stack.pop_back();
-                    r2 = stack.back(); stack.pop_back();
-                    if(r1.type == RPN_NUMBER && r2.type == RPN_NUMBER)
-                        stack.push_back(RPN_VALUE(r2.data % r1.data,RPN_NUMBER));
-                    else cerr << "Was not expecting a non-numeric value for operator %" << endl;
-                    break;
-
-                case LIST: // lists are always true - TODO look for EC list ??
-                    ++i;
-                    while(count--) stack.pop_back();
-                    stack.push_back(rpn_true);
-                    break;
-
-                case SHIFTLEFT:
-                    r1 = stack.back(); stack.pop_back();
-                    r2 = stack.back(); stack.pop_back();
-                    if(r1.type == RPN_NUMBER && r2.type == RPN_NUMBER)
-                        stack.push_back(RPN_VALUE(r2.data << r1.data,RPN_NUMBER));
-                    else cerr << "Was not expecting a non-numeric value for operator <<" << endl;
-                    break;
-
-                case SHIFTRIGHT:
-                    r1 = stack.back(); stack.pop_back();
-                    r2 = stack.back(); stack.pop_back();
-                    if(r1.type == RPN_NUMBER && r2.type == RPN_NUMBER)
-                        stack.push_back(RPN_VALUE(r2.data >> r1.data,RPN_NUMBER));
-                    else cerr << "Was not expecting a non-numeric value for operator >>" << endl;
-                    break;
-
-                case TRUE_OP:  //dg003a
-                    stack.push_back(rpn_true);
-                    break;
-
-                case FALSE_OP:  //dg003a
-                    stack.push_back(rpn_false);
-                    break;
-
-                default:
-                    cerr << "Invalid operator " << op << endl;
-                    break;
-            }
-        }
-        else if((*i) & NUMBER)
-        {
-            uint32_t size = 0;
-            uint64_t data = iv_symbols->get_numeric_data(*i,size);
-            stack.push_back(RPN_VALUE(data,RPN_NUMBER));
-        }
-        else if((*i) & SYMBOL)  // variables and cini enums
-        {
-            std::string name = iv_symbols->find_name(*i);
-            SYMBOL_VAL_LIST::iterator vvi = i_varlist.begin();
-            for(; vvi != i_varlist.end(); ++vvi)
-            {
-                if(name == vvi->first)
-                {
-                    // cerr << name << " = " << vvi->second << endl;
-                    stack.push_back(RPN_VALUE((uint64_t)vvi->second,RPN_NUMBER));
-                    break;
-                }
-            }
-            if(vvi == i_varlist.end())
-            {
-                // cerr << name << " = ANY" << endl;
-                stack.push_back(RPN_VALUE(RPN_ANY));
-            }
-        }
-    }
-    // an empty RPN is true, if it's not empty then check for false
-    if(stack.size())
-    {
-        RPN_VALUE r = stack.back();
-        if(r.type == RPN_FALSE) result = false;
-    }
-    return result;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-uint8_t Rpn::extract8(BINSEQ::const_iterator & bli)
-{
-    uint8_t val = 0;
-    val += (uint8_t)(*bli++);
-    return val;
-}
-
-
-//-------------------------------------------------------------------------------------------------
-
-uint16_t Rpn::extract16(BINSEQ::const_iterator & bli)
-{
-    uint16_t val = 0;
-    val = ((uint16_t)(*bli++)) << 8;
-    val += (uint16_t)(*bli++);
-    return val;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-uint32_t Rpn::extract32(BINSEQ::const_iterator & bli)
-{
-    uint32_t val = extract16(bli);
-    val <<= 16;
-    val += extract16(bli);
-    return val;
-}
-
-
-//-------------------------------------------------------------------------------------------------
-
-uint64_t Rpn::extract64(BINSEQ::const_iterator & bli)
-{
-    uint64_t val = extract32(bli);
-    val <<= 32;
-    val += extract32(bli);
-    return val;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Rpn::set8(BINSEQ & bl, uint8_t v)
-{
-    bl.push_back((uint8_t)(v));
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Rpn::set16(BINSEQ & bl, uint16_t v)
-{
-    bl.push_back((uint8_t)(v >> 8));
-    bl.push_back((uint8_t)(v));
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Rpn::set32(BINSEQ & bl, uint32_t v)
-{
-    bl.push_back((uint8_t)(v >> 24));
-    bl.push_back((uint8_t)(v >> 16));
-    bl.push_back((uint8_t)(v >> 8));
-    bl.push_back((uint8_t)(v));
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Rpn::set64(BINSEQ & bl, uint64_t v)
-{
-    bl.push_back((uint8_t)(v >> 56));
-    bl.push_back((uint8_t)(v >> 48));
-    bl.push_back((uint8_t)(v >> 40));
-    bl.push_back((uint8_t)(v >> 32));
-    bl.push_back((uint8_t)(v >> 24));
-    bl.push_back((uint8_t)(v >> 16));
-    bl.push_back((uint8_t)(v >> 8));
-    bl.push_back((uint8_t)(v));
-}
-
-
-//-------------------------------------------------------------------------------------------------
-
-
diff --git a/src/usr/hwpf/ifcompiler/initRpn.H b/src/usr/hwpf/ifcompiler/initRpn.H
deleted file mode 100755
index c63933a33..000000000
--- a/src/usr/hwpf/ifcompiler/initRpn.H
+++ /dev/null
@@ -1,329 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/ifcompiler/initRpn.H $                           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#if !defined(INITRPN_H)
-#define INITRPN_H
-
-// Change Log *************************************************************************************
-//                                                                      
-//  Flag  Reason   Userid   Date     Description                
-//  ---- --------  -------- -------- -------------------------------------------------------------
-//       D754106   dgilbert 06/14/10 Create
-//                 dgilbert 10/15/10 Add support to filter unneeded inits by EC
-//  dg002 SW039868 dgilbert 10/15/10 Add support to filter unneeded inits by EC
-//  dg003 SW047506 dgilbert 12/09/10 SERIES filtering
-//                 andrewg  09/19/11 Updates based on review
-//                 camvanng 11/08/11 Added support for attribute enums
-//                 andrewg  11/09/11 Multi-dimensional array and move to common fapi include
-//                 camvanng 01/20/12 Support for using a range of indexes for array attributes
-//                 camvanng 05/22/12 Ability to do simple operations on attributes
-//                                   in the scom_data column
-//        SW146714 camvanng 06/08/12 Use two bytes to store row rpn sequence byte count
-//                 camvanng 06/27/12 Delete push_attr_enum()
-// End Change Log *********************************************************************************
-// $Id: initRpn.H,v 1.8 2014/06/30 19:56:53 thi Exp $
-/**
- * @file initRpn.H
- * @brief Declaration of the initRpn class. Handles Reverse Polish Notation equations for initfiles
- */
-
-#include <stdint.h>
-#include <string>
-#include <vector>
-#include <map>
-#include <fapiHwpInitFileInclude.H>
-
-
-namespace init
-{
-    class Symbols;
-
-    typedef std::vector<uint8_t> BINSEQ;
-
-    typedef std::pair<std::string,uint32_t> SYMBOL_VAL_PAIR;
-    typedef std::vector<SYMBOL_VAL_PAIR> SYMBOL_VAL_LIST;
-
-    class Rpn
-    {
-    public:
-
-        enum TYPE
-        {
-            DEFINE       = 0x08000000,
-            SYMBOL       = 0x10000000,
-            NUMBER       = 0x20000000,
-            ARRAY_INDEX  = 0x40000000,
-            OPERATION    = 0x80000000,
-            TYPE_MASK    = 0xF8000000,
-
-        };
-
-        /**
-         * @brief Create empty RPN
-         *
-         */
-        Rpn() : iv_symbols(NULL) {}
-
-        /**
-         * @brief Create empty RPN w/ symbol table
-         *
-         * @param[in] i_symbols   Pointer to Symbol Table
-         */
-        Rpn(Symbols * i_symbols) : iv_symbols(i_symbols) {}
-
-        /**
-         * @brief Create empty RPN w/ symbol table and input integer
-         *
-         * @param[in] i_int Integer to populate RPN with
-         * @param[in] i_symbols   Pointer to Symbol Table
-         */
-        Rpn(uint32_t i_int, Symbols * i_symbols);
-
-        Rpn(uint64_t i_int, Symbols * symbols);             //<<< Create RPN with single 64 bit integer
-        Rpn(std::string  i_id, Symbols * symbols, TYPE i_type=SYMBOL);   //<<< Create RPN with single symbol
-        Rpn(BINSEQ::const_iterator & bli, Symbols * symbols) //<<< Create RPN from binary sequence
-          : iv_symbols(symbols) { bin_read(bli); }
-
-        /**
-         * Compare two Rpn sequences for equivalence
-         * @note Currently the two Rpn sequences must use the same symbol table to be considered equal.
-         * @note TODO: Allow different symbol tables and resolve the symbols before comparing.
-         */
-        bool operator==(const Rpn & r);
-        bool operator!=(const Rpn & r) { return !(this->operator==(r)); }
-
-        void push_int(uint32_t i_val);              //<<< Add a 32 bit integer to the Rpn sequence
-        void push_id(std::string & i_id, TYPE i_type=SYMBOL); //<<Add a symbol or Spy enum to the Rpn sequence
-        void push_int64(uint64_t i_uint);           //<<< Add a 64 bit integer to the Rpn sequence
-
-        /**
-         * @brief Add an attribute array index
-         *
-         * @param[in] i_array_idx Array index for this attribute
-         *
-         * @return Void
-         */
-        void push_array_index(std::string &i_array_idx);
-
-        Rpn * push_op(IfRpnOp op);                   //<<< Add an operation to the Rpn sequence
-
-        /**
-         * @brief Merge an Rpn to this Rpn sequence with input operation
-         *
-         * @param[inout] io_rpn Input RPN to merge into this one.  Will be deleted.
-         * @param[in] i_op Operation to perform between the 2 RPN's
-         *
-         * @return Merged RPN
-         */
-        Rpn * push_merge(Rpn * io_rpn, IfRpnOp i_op);
-
-        /**
-         * Merge (append) Rpn with this Rpn sequence
-         * @returns this
-         * @post i_rpn is deleted
-         */
-        Rpn * merge(Rpn * i_rpn);
-
-        /**
-         * Append a copy of an Rpn sequence to this Rpn sequence
-         */
-        void append(const Rpn & i_rpn);
-
-        void append(uint32_t i_rpn_id) { iv_rpnstack.push_back(i_rpn_id); }
-
-        /**
-         * isTrue returns true if the RPN has a single element that is RPN_TRUE
-         * @note Used in RPN optimization
-         */
-        bool isTrue() const;  //dg003a
-
-        /**
-         * isFalse returns true if the RPN has a single element that is RPN_FALSE
-         * @note Used in RPN optimization
-         */
-        bool isFalse() const; //dg003a
-
-        void clear() { iv_rpnstack.clear(); } //<<< clear the sequence
-
-        /**
-         * Human readable listing of RPN string
-         * @param String Description to use;  NULL -> use default: "n BYTES"
-         * @param bool i_final true: convert cini symbol id's to offset tags
-         * @returns string
-         * @NOTE i_final should never be set to true until all symbols in the
-         * init file have been "looked up"
-         */
-        std::string listing(const char * i_desc,
-                            const std::string & spyname = cv_empty_str,
-                            bool i_final = false);
-
-        std::string symbol_names() const;  //<<< Return a string of all the SYMBOL names in the Rpn
-
-        /**
-         * @brief Push all RPN stack entries of object as numerical values onto input blist
-         *
-         * @param blist Binary string of RPN to write to file
-         * @param i_num_addrs number of Scom addresses for this Scom
-         * @param i_addr_num the nth addr with the range of Scom addresses
-         * @param i_prepend_count Flag to indicate prepend rpn count to binary string
-         * @param i_one_byte_count Flag to indicate whether to use 1 byte to store
-         * the byte count (default is to use 2 bytes) when i_prepend_count == true
-         * @PRE should never be called until all symbols in the initfile have been
-         * "looked up" or the binary tags for Symbols and Numbers may not be accurate
-         * @return void
-         */
-        void bin_str(BINSEQ & blist, uint32_t i_num_addrs, uint32_t i_addr_num,
-                     bool i_prepend_count = false, bool i_one_byte_count = false);
-
-        /**
-         * Read binary sequence to recreate this Rpn sequence
-         * @param binary sequence interator
-         * @param number of bytes to read
-         * @param symbol table to use
-         * @post this rpn sequence is appended
-         * @post if symbols != NULL then iv_symbols is replaced with symbols
-         */
-        void bin_read(BINSEQ::const_iterator & bli,
-                      uint16_t i_size = 2,
-                      Symbols * symbols = NULL); // read binary sequence to recreate RPN
-
-        /**
-         * Copy one rpn operation from bli and add to this Rpn sequence
-         * @returns an iterator one past the last byte used.
-         * @param iterator of a binary rpn sequence
-         * @param symbol table to use.
-         * @pre bli points to a valid rpn sequence - ie the correct number of PUSHES for the operand
-         * @post this Rpn sequence is appended
-         * @post Internal symbol table ptr is replace with given symbol table ptr if not NULL
-         * @note Reads byte sequence from bli sequence until an operation is found.
-         * @note The input sequence should NOT have a size byte on the front
-         */
-        BINSEQ::const_iterator bin_read_one_op(BINSEQ::const_iterator & bli, Symbols * symbols = NULL); // read one rpn operation from bli to create Rpn
-
-        /**
-         * Copy one numeric literal or attribute from io_bli and add to this Rpn sequence
-         * @param[in,out] io_bli  iterator of a binary rpn sequence
-         * @param[in] i_symbols table to use.
-         * @pre io_bli points to a valid rpn sequence
-         * @post this Rpn sequence is appended
-         * @post Internal symbol table ptr is replaced with given symbol table ptr if not NULL
-         * @post iterator of binary sequence is one past the last byte used.
-         */
-        void bin_read_one_id(BINSEQ::const_iterator & io_bli, Symbols * i_symbols = NULL);
-
-        //dg002a
-        /**
-         * Resolve the RPN and returns false if the given EC level causes the RPN expression to be false.
-         * @returns true | false
-         * @note This routine will always return true unless the RPN contains an EC comparison that resolves to false.
-         */
-        bool resolve_ec(uint32_t i_ec);
-
-        //dg003a
-        /**
-         * Resove as much of the RPN as possible, given the list of Symbol -> value substitutions. Result is true until proven false.
-         * @returns true | false. False is returned if the Rpn is unconditionally false; otherwise true is returned.
-         * @note Any Symbol found in the RPN not included in i_varlist resolves to ANY.  All comparison operands to ANY resolves to true
-         * @code
-         * // Example 1
-         * SYMBOL_VAL_PAIR p(string("EC"),0x10);
-         * SYMBOL_VAL_LIST lst;
-         * lst.push_back(p);
-         * if(anRpn.resolve(lst)) { .... }
-         * // In this example, any instants of the variable "EC" in the RPN will be replaced with the value 0x10.
-         * // Any other variables will be set to ANY and the RPN will be evaluated.
-         * // if the RPN does not contain the variable "EC", it will resolve to true.
-         *
-         * // Example 2
-         * SYMBOL_VAL_PAIR p1(string("SERIES"),0xA000006C);
-         * SYMBOL_VAL_PAIR p2(string("SERIES_IP"),0xA000006C);
-         * SYMBOL_VAL_PAIR p3(string("SERIES_Z"),0xA000006D);
-         * SYMBOL_VAL_LIST lst;
-         * lst.push_back(p1);
-         * lst.push_back(p2);
-         * lst.push_back(p3);
-         * if(anRpn.resolve(lst)) {.....}  // resolves to false if rpn contains SERIES == SERIES_Z
-         *                                 //  or SERIES != SERIES_IP
-         * @endcode
-         */
-        bool resolve(SYMBOL_VAL_LIST & i_varlist);
-
-
-        uint32_t op_count() const { return iv_rpnstack.size(); }
-
-        // Helper functions in reading and writing binary sequences (compiled initfiles *.if)
-        static uint8_t extract8(BINSEQ::const_iterator & bli);
-        static uint16_t extract16(BINSEQ::const_iterator & bli);
-        static uint32_t extract32(BINSEQ::const_iterator & bli);
-        static uint64_t extract64(BINSEQ::const_iterator & bli);
-        static void set8(BINSEQ & bl, uint8_t v);
-        static void set16(BINSEQ & bl, uint16_t v);
-        static void set32(BINSEQ & bl, uint32_t v);
-        static void set64(BINSEQ & bl, uint64_t v);
-
-        static std::string cv_empty_str;
-
-      private: // types and data
-        typedef std::vector<uint32_t> RPNSTACK;
-        typedef std::vector<uint32_t> INDEXRANGE;
-
-        RPNSTACK iv_rpnstack;       ///< Rpn sequence
-        Symbols * iv_symbols;       ///< Symbol table to use
-        INDEXRANGE iv_array_idx_range; ///< indicates range of indexes for an array attribute
-
-
-
-
-        //dg002a begin  Used in resolve operations to interpret the Rpn sequence
-        enum RPN_TYPE
-        {
-          RPN_NUMBER = 0,
-          RPN_FALSE  = 1,
-          RPN_TRUE   = 2,
-          RPN_ANY    = 3,
-        };
-
-        // Used in resolve operations to interpret the Rpn sequence
-        struct RPN_VALUE
-        { 
-          uint64_t data;
-          RPN_TYPE type;
-          RPN_VALUE() : data(0), type(RPN_NUMBER) {}
-          RPN_VALUE(RPN_TYPE i_type) : data(0), type(i_type) {}
-          RPN_VALUE(uint64_t i_data, RPN_TYPE i_type) : data(i_data), type(i_type) {}
-          RPN_VALUE(uint64_t i_data) : data(i_data), type(RPN_NUMBER) {}
-        };
-
-        typedef std::vector<RPN_VALUE> EVAL_STACK;
-
-      private: // functions
-
-        // Used in resolve operations to interpret the Rpn sequence
-        static void pop_bool(EVAL_STACK & i_stack, RPN_VALUE & o_value);
-        static void pop_number(EVAL_STACK & i_stack, RPN_VALUE & o_value);
-        // dg002a end
-    };
-};
-
-#endif
diff --git a/src/usr/hwpf/ifcompiler/initScom.C b/src/usr/hwpf/ifcompiler/initScom.C
deleted file mode 100755
index 35b93812c..000000000
--- a/src/usr/hwpf/ifcompiler/initScom.C
+++ /dev/null
@@ -1,1778 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/ifcompiler/initScom.C $                          */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// Change Log *************************************************************************************
-//
-//  Flag  Track    Userid   Date     Description
-//  ----- -------- -------- -------- -------------------------------------------------------------
-//         D754106 dgilbert 06/14/10 Create
-//  dg001  D774126 dgilbert 09/30/10 Check that colname EXPR is last column in spytable
-//  dg002 SW039868 dgilbert 10/15/10 Add support to filter unneeded inits by EC
-//  dg003 SW047506 dgilbert 12/09/10 More filtering enhancements
-//                 andrewg  05/24/11 Port over for VPL/PgP
-//                 andrewg  09/19/11 Updates based on review
-//                 andrewg  11/09/11 Multi-dimensional array and move to common fapi include
-//                 mjjones  11/17/11 Output attribute listing
-//                 camvanng 12/12/11 Support multiple address ranges within a SCOM address
-//                                   Use strtoull vs strtoul for 32-bit platforms
-//                 camvanng 12/15/11 Support for multiple duplicate addresses setting different bits
-//                 camvanng 01/20/12 Support for using a range of indexes for array attributes
-//                 camvanng 02/14/12 Support binary and hex scom addresses
-//                                   Support for array at beginning of scom address
-//                                   Fix bug in string size when converting decimal to hex string
-//                 camvanng 05/07/12 Support for associated target attributes
-//                 camvanng 05/22/12 Ability to do simple operations on attributes
-//                                   in the scom_data column
-//        SW146714 camvanng 06/08/12 Use two bytes to store row rpn sequence byte count
-//                                   Handle case where after row_optimize(), there's no Scom to write
-//                 camvanng 06/27/12 Improve error and debug tracing
-// End Change Log *********************************************************************************
-// $Id: initScom.C,v 1.11 2014/06/30 20:20:00 thi Exp $
-/**
- * @file initSpy.C
- * @brief Definition of the initScom Class. Represents the information parsed from an initfile scom
- *        statement.
- */
-
-#include <initScom.H>
-#include <initSymbols.H>
-#include <initCompiler.H>
-#include <stdlib.h>
-#include <iostream>
-#include <iomanip>
-#include <sstream>
-#include <fstream>
-#include <set>
-#include <stdexcept>
-
-extern void yyerror(const char * s);
-extern init::ScomList * yyscomlist;  // only use this during parsing
-std::map<string,string> yytarget; //generic target name & corresponding real name
-
-namespace init {
-extern ostringstream dbg;  // debug output
-};
-
-using namespace init;
-
-Scom::WHEN_SUBTYPE_MAP Scom::cv_when_subtypes;
-
-//-------------------------------------------------------------------------------------------------
-
-Scom::Scom(BINSEQ::const_iterator & bli, Symbols * i_symbols):
-             iv_symbols(i_symbols),
-             iv_when(NONE),
-             iv_scom_length(0),
-             iv_scom_offset(0),
-             iv_when_rpn(i_symbols)
-
-{
-
-    iv_scom_length   = Rpn::extract16(bli);
-    iv_scom_offset   = Rpn::extract16(bli);
-    uint32_t id      = Rpn::extract16(bli);
-    uint32_t numcols = Rpn::extract16(bli);
-    uint32_t numrows = Rpn::extract16(bli);
-
-    numcols &= ~SUBTYPE_MASK;
-
-    // Get our SCOM address
-    uint32_t l_addr_size = 0;
-    iv_scom_addr_hex = iv_symbols->get_numeric_data(iv_symbols->get_rpn_id(id),l_addr_size);
-
-
-    if( iv_scom_length != 0 && iv_scom_length != 0xffff) // most common values
-    {
-        if(iv_scom_length < 65)  // max scom len is 64 bits
-        {
-            for(size_t i = 0; i < numrows; ++i)
-                add_bit_range(iv_scom_offset, iv_scom_offset + iv_scom_length - 1);
-        }
-        else // What's this?
-        {
-            ostringstream errs;
-            errs << "ERROR: Scom::Scom: Invalid scom bit length ["
-                 << iv_scom_length << "]" << endl;
-            throw range_error(errs.str());
-        }
-    }
-
-    for(size_t i = 0; i < numrows; ++i)
-    {
-        uint8_t length = *bli++; // first byte is length of rpn sequence
-        //printf("Creating scom data rpn, length %u\n", length);
-
-        Rpn rpn(iv_symbols);       // blank RPNs
-        rpn.bin_read(bli, length); // read rpn sequence
-        iv_scom_rpn.push_back(rpn);
-    }
-
-    if(numcols)
-    {
-        for(size_t i = 0; i < numrows; ++i) iv_row_rpn.push_back(Rpn(iv_symbols)); // blank RPNs
-
-        // Read col heads
-        for(size_t i = 0; i < numcols; ++i)
-        {
-            Rpn col_name_rpn(iv_symbols);       // blank RPNs
-            col_name_rpn.bin_read_one_id(bli);
-            iv_col_vars.push_back(col_name_rpn);
-            iv_cols_rpn.push_back(iv_row_rpn);  // copy in blank row RPNs for this column
-        }
-
-        for(size_t row_n = 0; row_n < numrows; ++row_n)
-        {
-            COL_LIST::iterator cli = iv_cols_rpn.begin();       // *cli is list of row rpns for col
-            RPN_LIST::iterator rpi = (*cli).begin() + row_n;    // *rpi is current row rpn for first col
-
-            // The next len bytes belong to this row
-            uint16_t rpn_byte_count = (*bli++ << 8) + (*bli++); // length of rpn sequece
-            //printf("Create scom from binseq: rpn byte count: %u\n", rpn_byte_count);
-            BINSEQ::const_iterator bli_end = bli + rpn_byte_count; // end of rpn in bin seq
-            
-            // Simple cols are divided by OPs
-            // LIST op has two additional bytes (len,op)
-            while(bli < bli_end)
-            {
-                // Last col rpn is not limited to one op if it's "expr" - it gets the rest of the RPN
-                if(cli == (iv_cols_rpn.end() - 1))
-                {
-                    while(bli < bli_end) bli = rpi->bin_read_one_op(bli);
-                    break;
-                }
-                bli = rpi->bin_read_one_op(bli);
-                ++cli;
-                rpi = (*cli).begin() + row_n;
-            }
-        }
-    }
-    else ++bli;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Scom::set_when(const string * when_str)
-{
-
-    string s(*when_str);
-    for(string::iterator c = s.begin(); c != s.end(); ++c) *c = toupper(*c);
-    if(s.size())
-    {
-        size_t i = 0;
-        for(size_t i = 1; i < sizeof(when_char)/sizeof(when_char[0]); ++i)
-        {
-            if(s[0] == when_char[i])
-            {
-                set_when((SCOM_WHEN)i);
-                break;
-            }
-        }
-        if(i == sizeof(when_char)/sizeof(when_char[0]))
-        {
-            string errs("Illegal when=");
-            errs.append(s);
-            yyerror(errs.c_str());
-        }
-        s.erase(0,1);
-
-        if(s.size())
-        {
-            WHEN_SUBTYPE_MAP::const_iterator i = cv_when_subtypes.find(s);
-            if(i != cv_when_subtypes.end())
-            {
-                set_sub_when(i->second);
-            }
-            else
-            {
-                std::ostringstream oss;
-                oss << "Illegal 'when=' subvalue: [" << s << ']';
-                yyerror(oss.str().c_str());
-            }
-        }
-    }
-    else
-    {
-        yyerror("Missing 'when =' value");
-    }
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Scom::add_col(const string & i_colname)
-{
-    string s(i_colname);
-    for(string::iterator i = s.begin(); i != s.end(); ++i) *i = toupper(*i);
-    Rpn col_rpn(s,iv_symbols); // = iv_symbols->use_symbol(s);
-
-    // add check - Can't add any more cols after EXPR column dg001a
-    if(iv_col_vars.size())
-    {
-        Rpn exp_rpn("EXPR",iv_symbols);
-        if(exp_rpn == iv_col_vars.back()) // expr col already added - can't add any more cols
-        {
-            if (s == "EXPR")
-            {
-                yyerror("Scom:: add_col: Multiple EXPR columns specified.");
-            }
-            else
-            {
-                yyerror("Scom:: add_col: EXPR must be the last column");
-            }
-        }
-    }
-
-    // if the entire column is unconditionally true it can be left out
-    //  This check will be done later as this scom might be split by bit-ranges.
-
-    iv_col_vars.push_back(col_rpn);
-    iv_cols_rpn.push_back(iv_row_rpn); // add the collected row RPNs
-    iv_row_rpn.clear();
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Scom::add_row_rpn(Rpn * i_rpn)
-{
-    // The row gets parsed before the col name
-    //  So collect the row RPNs and apply them when the col name gets added
-
-    // Replace the Rpn "ANY" EQ with TRUE   dg003a
-    Rpn any_rpn("ANY",iv_symbols);
-    Rpn true_rpn(iv_symbols);
-    true_rpn.push_op(TRUE_OP);
-
-    // The column EXPR can have an lone "ANY" rpn - so add EQ.
-    if(any_rpn == (*i_rpn)) i_rpn->push_op(EQ);
-    any_rpn.push_op(EQ);
-
-    if(any_rpn == (*i_rpn)) iv_row_rpn.push_back(true_rpn); // Replace col == ANY with TRUE
-    else
-    {
-        iv_row_rpn.push_back(*i_rpn);
-    }
-    delete i_rpn;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Scom::add_bit_range(uint32_t start, uint32_t end)
-{
-    // make sure they are added in order
-    dbg << "Add bit range " << dec << start << " to " << end << endl;
-    iv_range_list.push_back(RANGE(start,end));
-}
-
-//-------------------------------------------------------------------------------------------------
-// Range gets parsed before the target symbol (k,n,p,c) - so save it
-void Scom::add_target_range(uint32_t r1, uint32_t r2)
-{
-    if(r1 > r2)
-    {
-        uint32_t rt = r1;
-        r1 = r2;
-        r2 = rt;
-    }
-    iv_target_ranges.push_back(RANGE(r1,r2));
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Scom::make_target(const char * i_symbol)
-{
-    string s(i_symbol);
-    Rpn r(iv_symbols);
-    size_t rsize = iv_target_ranges.size();
-
-    if(rsize == 0)
-    {
-        yyerror("Target given w/o a range");
-    }
-    // if more than one target - use list
-    else
-    {
-        for(RANGE_LIST::iterator iter = iv_target_ranges.begin(); iter != iv_target_ranges.end(); ++iter)
-        {
-            for(uint32_t v = iter->first; v <= iter->second; ++v)
-            {
-                r.push_int(v);
-            }
-        }
-        if(rsize > 1) r.push_op(LIST);   // if more than one target
-        r.push_op(EQ);
-    }
-
-    iv_row_rpn.push_back(r);
-    add_col(s);
-    iv_target_ranges.clear();
-}
-
-//-------------------------------------------------------------------------------------------------
-
-string Scom::list_one(RANGE range)
-{
-    ostringstream oss;
-
-    uint32_t numcols = iv_col_vars.size() | (iv_when & SUBTYPE_MASK);  // WHEN subtype goes in numcols
-    uint32_t bitlen = range.second + 1 - range.first;
-    if (bitlen)
-    {
-        iv_scom_length = bitlen;         // don't overwrite iv_scom_length if bitlen == 0
-        iv_scom_offset = range.first;    // don't overwrite iv_scom_offset if bitlen == 0
-    }
-
-    uint32_t allrows = 0;
-    uint32_t numrows = 0;
-
-    if(iv_cols_rpn.size()) allrows = iv_cols_rpn.front().size();
-    if (allrows == 0) allrows = 1;
-
-    // If there is a bit range we need to select only the rows that apply to this spyname
-    if(bitlen)
-    {
-        for(RANGE_LIST::iterator r = iv_range_list.begin(); r != iv_range_list.end(); ++r)
-        {
-            if((*r) == range) ++numrows;
-        }
-    }
-    else numrows = allrows; // else select all the rows
-
-    oss << hex << setfill('0');
-    oss << "------------";
-    oss << " Scom Address: 0x" << setw(16) << iv_scom_addr_hex;
-    dbg << " Scom Address: 0x" << hex << setfill('0') << setw(16) << iv_scom_addr_hex << endl;
-    if(bitlen)
-    {
-        oss << '~' << dec << range.first;
-        if(range.first != range.second) oss << ':' << range.second;
-        oss << hex;
-    }
-    oss << ' ' << "------------" << endl
-        << "When= " << (iv_when & WHEN_MASK) << endl;
-
-    oss << "0x" << setw(4) << iv_scom_length << "\t\t" << "Scom length" << endl
-      << "0x" << setw(4) << iv_scom_offset << "\t\t" << "Scom offset" << endl;
-
-    //oss << "0x" << setw(8) << iv_symbols->get_spy_id(spyname) << '\t';
-
-    oss << "0x" << setw(4) << numcols << "\t\t" << "Number of columns" << endl
-        << "0x" << setw(4) << numrows << "\t\t" << "Number of rows" << endl;
-
-    // If there is a bit range we need to select only the spyv rows that apply to this spyname
-
-    if(bitlen)
-    {
-        RPN_LIST::iterator i = iv_scom_rpn.begin();
-        for(RANGE_LIST::iterator r = iv_range_list.begin(); r != iv_range_list.end(); ++r,++i)
-        {
-            if ((*r) == range)
-            {
-                oss << i->listing("Length of rpn for spyv",Rpn::cv_empty_str,true);
-            }
-        }
-    }
-    else // get all rows
-    {
-        for(RPN_LIST::iterator i = iv_scom_rpn.begin(); i != iv_scom_rpn.end(); ++i)
-        {
-            oss << i->listing("Length of rpn for spyv",Rpn::cv_empty_str,true);
-        }
-    }
-    oss << endl;
-
-
-    // list the column names that are really CINI VARS
-    for(RPN_LIST::iterator i = iv_col_vars.begin(); i != iv_col_vars.end(); ++i)
-    {
-        oss << i->listing("",Rpn::cv_empty_str,true);
-        //Rpn col_rpn = *i;
-        //string desc = iv_symbols->find_name(rpn_id);
-        //if(desc.size() == 0) desc = "Variable not found!";
-
-        //oss << "0x" << setw(4) << iv_symbols->get_tag(*i) << "\t\t" << desc << endl;
-    }
-    oss << endl << endl;
-
-
-
-    uint32_t usedrows = 0;
-    if(iv_cols_rpn.size() == 0)
-    {
-        oss << "ROW " << 1 << "\n0x00" << "\t\t" << "0 BYTES" << endl;
-    }
-    else
-    {
-        for(size_t n = 0; n < allrows; ++n)
-        {
-            Rpn rpn(iv_symbols);
-            if(bitlen) // only get rows that match the current bitrange
-            {
-                if(iv_range_list[n] != range) continue;
-            }
-            ++usedrows;
-            oss << "ROW " << usedrows << endl;
-
-            // Build up the row Rpn for row n
-            for(COL_LIST::iterator i = iv_cols_rpn.begin(); i != iv_cols_rpn.end(); ++i)
-            {
-                rpn.append(i->at(n));
-            }
-            oss << rpn.listing(NULL,Rpn::cv_empty_str,true) << endl;
-        }
-    }
-
-    return oss.str();
-}
-
-//-------------------------------------------------------------------------------------------------
-
-string Scom::listing()
-{
-    ostringstream oss;
-
-    set<RANGE> ranges;
-    ranges.insert(iv_range_list.begin(),iv_range_list.end());
-
-    //oss << list_one(RANGE(1,0)) << endl;
-    if(ranges.size())
-    {
-        for(set<RANGE>::iterator r = ranges.begin(); r != ranges.end(); ++r)
-        {
-            oss << list_one(*r) << endl;
-        }
-    }
-    else
-    {
-        oss << list_one(RANGE(1,0)) << endl;
-    }
-
-    return oss.str();
-}
-
-//-------------------------------------------------------------------------------------------------
-
-uint32_t Scom::bin_listing(BINSEQ & blist)
-{
-    set<RANGE> ranges;
-    uint32_t scom_count = 0;
-    uint32_t addr_num = 0;
-
-    row_optimize();   // delete any rows that are unconditionally false. + merge rows
-
-    //printf("bin_listing:  iv_scom_rpn size = %u\n", iv_scom_rpn.size());
-
-    //Skip this scom if after row_optimize, there's no scom data to write
-    if (iv_scom_rpn.size())
-    {
-        ranges.insert(iv_range_list.begin(),iv_range_list.end());
-
-        SCOM_ADDR::iterator i = iv_scom_addr.begin();
-
-        for(; i != iv_scom_addr.end(); ++i, ++addr_num)
-        {
-            dbg << "SCOM::bin_listing: SCOM[" << dec << scom_count << "]  Address: "
-                << hex << *i << endl;
-            if(ranges.size())
-            {
-                for(set<RANGE>::iterator r = ranges.begin(); r != ranges.end(); ++r)
-                {
-                    ++scom_count;
-                    //bin_list_one(blist,*i,*r);
-                    // The following sequence will optimize the bytecode for this spy
-                    //   - Compile the spy into bytecode for a range of bits
-                    //   - Recreate the spy from the bytecode
-                    //   - Compile the recreated spy back into bytecode.
-                    BINSEQ temp;
-                    bin_list_one(temp,strtoull((*i).c_str(),NULL,16), addr_num, *r);
-                    BINSEQ::const_iterator bi = temp.begin();
-                    Scom s(bi,iv_symbols);
-                    s.bin_list_one(blist,strtoull((*i).c_str(),NULL,16), addr_num, RANGE(1,0));
-                }
-            }
-            else
-            {
-                ++scom_count;
-                bin_list_one(blist,strtoull((*i).c_str(),NULL,16), addr_num, RANGE(1,0));
-            }
-        }
-    }
-
-    return scom_count;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Scom::bin_list_one(BINSEQ & blist,uint64_t i_addr, uint32_t i_addr_num, RANGE range)
-{
-
-    uint32_t numaddrs = iv_scom_addr.size(); //Number of Scom addresses for this Scom
-    uint32_t numcols = iv_col_vars.size() | (iv_when & SUBTYPE_MASK); // WHEN subtype goes in numcols
-
-// No range support
-    uint32_t bitlen = range.second + 1 - range.first;
-
-    if (bitlen)
-    {
-        iv_scom_length = bitlen;         // don't overwrite iv_scom_length if bitlen == 0
-        iv_scom_offset = range.first;    // don't overwrite iv_scom_offset if bitlen == 0
-    }
-
-    uint32_t allrows = 0;
-    uint32_t numrows = 0;
-
-    if(iv_cols_rpn.size()) allrows = iv_cols_rpn.front().size();
-    if (allrows == 0) allrows = 1;
-
-    // If there is a bit range we need to select only the rows that apply to this spyname
-    if(bitlen)
-    {
-        for(RANGE_LIST::iterator r = iv_range_list.begin(); r != iv_range_list.end(); ++r)
-        {
-            if((*r) == range) ++numrows;
-        }
-    }
-    else numrows = allrows; // else select all the rows
-
-    // If every row rpn in a column is unconditionally true then remove the col.
-    if(iv_col_vars.size())
-    {
-        vector< pair<RPN_LIST::iterator, COL_LIST::iterator> > deletes;
-        RPN_LIST::iterator cv = iv_col_vars.begin();  // -> column header Rpn
-        COL_LIST::iterator cr = iv_cols_rpn.begin();  // -> RPN list of row segments for the column
-        for(; cv != iv_col_vars.end(); ++cv,++cr)
-        {
-            bool remove_it = true;
-            for(RPN_LIST::const_iterator r = cr->begin(); r != cr->end(); ++r)
-            {
-                if(!(r->isTrue()))
-                {
-                    remove_it = false;
-                    break;
-                }
-            }
-            if(remove_it)
-            {
-                deletes.push_back( pair<RPN_LIST::iterator, COL_LIST::iterator>(cv,cr) );
-            }
-        }
-        while(deletes.size())
-        {
-            pair<RPN_LIST::iterator, COL_LIST::iterator> p = deletes.back();
-            deletes.pop_back();
-            dbg << "COL is unconditionally true. Removing column " << (p.first)->symbol_names()
-                << endl;
-            iv_col_vars.erase(p.first);
-            iv_cols_rpn.erase(p.second);
-            --numcols;
-        }
-    }
-
-    Rpn::set16(blist,(uint16_t)iv_scom_length);
-    Rpn::set16(blist,(uint16_t)iv_scom_offset);
-
-    // Just put the SCOM address in place of the spy id
-    //uint32_t id = iv_symbols->get_spy_id(spyname);
-    //Rpn::set32(blist,id);
-    // TODO - Probably need to get scom address id here
-    //Rpn::set32(blist,(uint32_t)iv_address);
-
-    Rpn *l_scom_addr = new init::Rpn(i_addr,yyscomlist->get_symbols());
-    l_scom_addr->bin_str(blist,numaddrs,i_addr_num,false);
-    delete l_scom_addr;
-
-
-    Rpn::set16(blist,(uint16_t)numcols);
-    Rpn::set16(blist,(uint16_t)numrows);
-
-    // If there is a bit range we need to select only the spyv rows that apply to this spyname
-    if(bitlen)
-    {
-        RPN_LIST::iterator i = iv_scom_rpn.begin();
-        for(RANGE_LIST::iterator r = iv_range_list.begin(); r != iv_range_list.end(); ++r,++i)
-        {
-            if ((*r) == range)
-            {
-                i->bin_str(blist,numaddrs,i_addr_num,true,true); //Add length to blist
-            }
-        }
-    }
-    else // get all rows
-    {
-        for(RPN_LIST::iterator i = iv_scom_rpn.begin(); i != iv_scom_rpn.end(); ++i)
-        {
-            i->bin_str(blist,numaddrs,i_addr_num,true,true); //Add length to blist
-        }
-    }
-
-    // list the column names that are really CINI VARS
-    for(RPN_LIST::iterator i = iv_col_vars.begin(); i != iv_col_vars.end(); ++i)
-    {
-        i->bin_str(blist,numaddrs,i_addr_num,false);  // false means don't prepend an RPN byte count to the binary rpn appended.
-        //uint16_t tag = iv_symbols->get_tag(*i);
-        //blist.push_back((uint8_t)(tag >> 8));
-        //blist.push_back((uint8_t) tag);
-    }
-
-    if(iv_cols_rpn.size() == 0) blist.push_back(0);
-    else
-    {
-        for(size_t n = 0; n < allrows; ++n)
-        {
-            Rpn rpn(iv_symbols);
-            if(bitlen) // only get rows that match the current bitrange
-            {
-                if(iv_range_list[n] != range) continue;
-            }
-
-            // Build up the row Rpn for row n
-            for(COL_LIST::iterator i = iv_cols_rpn.begin(); i != iv_cols_rpn.end(); ++i)
-            {
-                rpn.append(i->at(n));
-            }
-            rpn.bin_str(blist,numaddrs,i_addr_num,true);
-        }
-    }
-}
-
-//-------------------------------------------------------------------------------------------------
-// Delete any rows that are unconditionally false
-// Merge rows that can be merged
-//
-void Scom::row_optimize()  //dg003a
-{
-    size_t row = 0;
-    if (iv_cols_rpn.size()) row = iv_cols_rpn.front().size();
-    if(row == 0) return;
-
-    // Look for false rows
-    do
-    {
-        bool remove_me = false;
-        --row;
-        for(COL_LIST::iterator i = iv_cols_rpn.begin(); i != iv_cols_rpn.end(); ++i)
-        {
-            if (i->at(row).isFalse())
-            {
-                remove_me = true;
-                break;
-            }
-        }
-        if(remove_me)
-        {
-            iv_scom_rpn.erase(iv_scom_rpn.begin() + row);   //remove spyv
-            if (0 == iv_scom_rpn.size())
-            {
-                iv_col_vars.clear();
-                iv_cols_rpn.clear();
-                if(iv_range_list.size())
-                {
-                    iv_range_list.clear();
-                }
-            }
-            else
-            {
-                //Need to remove rpn row segment from each iv_cols_rpn rpn list
-                for(COL_LIST::iterator i = iv_cols_rpn.begin(); i != iv_cols_rpn.end(); ++i)
-                {
-                    i->erase(i->begin() + row);
-                }
-                if(iv_range_list.size()) iv_range_list.erase(iv_range_list.begin() + row);
-            }
-
-            dbg << "initScom: row_optimize: ROW is unconditionally false. Removing row " << row+1 << endl;
-            dbg << "initScom: row_optimize: iv_scom_rpn size " << iv_scom_rpn.size() << endl;
-        }
-    } while (row);
-
-    // now look for rows to merge
-    // for now limit to spies with EXPR as the only column
-    // Because the interpreter looks down the rows until it finds one that's "true" then stops, the order
-    // of rows cant't be modified. This means only rows next to each other can be merged.
-    // This makes for very large Rpn strings - turn on later when we have better redundancy reduction in RPNs
-#if defined(__LATER__)
-    Rpn r_expr("EXPR", iv_symbols);
-    row = iv_spyv_rpn.size();
-    if ((row > 1) && (iv_col_vars.size() == 1) && (iv_col_vars.front() == r_expr))
-    {
-        --row;
-        do
-        {
-            size_t row1 = row - 1;
-
-            if (iv_spyv_rpn.at(row) == iv_spyv_rpn.at(row1))
-            {
-                if (iv_range_list.size() == 0 || (iv_range_list.at(row) == iv_range_list.at(row1)))
-                {
-                    // merge
-                    Rpn * rp = new Rpn(iv_cols_rpn.back().at(row));
-                    iv_cols_rpn.back().at(row1).push_merge(rp, Rpn::OR); // this will delete rp
-                    iv_spyv_rpn.erase(iv_spyv_rpn.begin() + row);
-                    if (iv_range_list.size()) iv_range_list.erase(iv_range_list.begin() + row);
-                    for (COL_LIST::iterator i = iv_cols_rpn.begin(); i != iv_cols_rpn.end(); ++i)
-                    {
-                        i->erase(i->begin() + row);
-                    }
-                    dbg << "ROW " << row+1 << " and " << row1+1 << " have been merged in " << get_key_name() << endl;
-                }
-            }
-        } while (--row);
-    }
-#endif
-}
-
-
-
-//-------------------------------------------------------------------------------------------------
-
-bool Scom::compare(Scom & that)
-{
-    bool result = false; //true;
-// TODO
-#if 0
-    ostringstream oss;
-    oss << hex << setfill('0');
-    // spyname(s) should have already been tested
-    oss << get_key_name() << endl;
-    if(iv_spy_type != that.iv_spy_type ||
-       iv_when != that.iv_when ||
-       iv_spy_length != that.iv_spy_length ||
-       iv_spy_offset != that.iv_spy_offset ||
-       iv_array_addr != that.iv_array_addr)
-    {
-        result = false;
-        oss << "type:   " << setw(8) << iv_spy_type << ' ' << that.iv_spy_type << endl;
-        oss << "when:   " << setw(8) << iv_when << ' ' << that.iv_when << endl;
-        oss << "len:    " << setw(8) << iv_spy_length << ' ' << that.iv_spy_length << endl;
-        oss << "offset: " << setw(8) << iv_spy_offset << ' ' << that.iv_spy_offset << endl;
-        oss << "array:  " << setw(8) << iv_array_addr << ' ' << that.iv_array_addr << endl;
-    }
-    // need to expand all Rpns to verify resolution of vars and lits
-    // when Rpn
-    string rpn1 = iv_when_rpn.listing("",iv_spy_names.front(),false);
-    string rpn2 = that.iv_when_rpn.listing("",iv_spy_names.front(),false);
-    if(rpn1 != rpn2)
-    {
-        result = false;
-        oss << "this when Rpn:" << endl << rpn1 << endl;
-        oss << "that when Rpn:" << endl << rpn2 << endl;
-    }
-
-    // spyv Rpn
-    if(iv_spyv_rpn.size() != that.iv_spyv_rpn.size())
-    {
-       result = false;
-       oss << "this spyv Rpn(s):" << endl;
-       for(RPN_LIST::iterator r1 = iv_spyv_rpn.begin(); r1 != iv_spyv_rpn.end(); ++r1)
-           oss << r1->listing("",iv_spy_names.front(),false) << endl;
-       oss << "that spyv Rpn(s):" << endl;
-       for(RPN_LIST::iterator r1 = that.iv_spyv_rpn.begin(); r1 != that.iv_spyv_rpn.end(); ++r1)
-           oss << r1->listing("",iv_spy_names.front(),false) << endl;
-    }
-    else
-    {
-        RPN_LIST::iterator r1 = iv_spyv_rpn.begin();
-        RPN_LIST::iterator r2 = that.iv_spyv_rpn.begin();
-        for(; r1 != iv_spyv_rpn.end(); ++r1, ++r2)
-        {
-            rpn1 = r1->listing("",iv_spy_names.front(),false);
-            rpn2 = r2->listing("",iv_spy_names.front(),false);
-            if(rpn1 != rpn2)
-            {
-                result = false;
-                oss << "this spyv Rpn:" << endl << rpn1 << endl;
-                oss << "that spyv Rpn:" << endl << rpn2 << endl;
-            }
-        }
-    }
-
-    // column names
-    if(iv_col_vars.size() != that.iv_col_vars.size())
-    {
-        result = false;
-        oss << "this col names:" << endl;
-        for(RPN_LIST::iterator i = iv_col_vars.begin(); i != iv_col_vars.end(); ++i)
-        {
-            oss << i->symbol_names() << endl;
-        }
-        oss << "that col names:" << endl;
-        for(RPN_LIST::iterator i = that.iv_col_vars.begin(); i != that.iv_col_vars.end(); ++i)
-        {
-            oss << i->symbol_names() << endl;
-        }
-    }
-    else
-    {
-        RPN_LIST::iterator i = iv_col_vars.begin();
-        RPN_LIST::iterator j = that.iv_col_vars.begin();
-        for(;i != iv_col_vars.end(); ++i, ++j)
-        {
-            //string s1 = iv_symbols->find_name(*i);
-            //string s2 = that.iv_symbols->find_name(*j);
-            if((*i) != (*j))
-            {
-                result = false;
-                oss << "this col name: " << i->symbol_names() << endl;
-                oss << "that col name: " << j->symbol_names() << endl;
-            }
-        }
-    }
-
-    // row Rpns
-    Rpn r1(iv_symbols);
-    Rpn r2(that.iv_symbols);
-    for(COL_LIST::iterator c = iv_cols_rpn.begin(); c != iv_cols_rpn.end(); ++c)
-    {
-        for(RPN_LIST::iterator r = c->begin(); r != c->end(); ++r)
-        {
-            r1.append(*r);
-        }
-    }
-    for(COL_LIST::iterator c = that.iv_cols_rpn.begin(); c != that.iv_cols_rpn.end(); ++c)
-    {
-        for(RPN_LIST::iterator r = c->begin(); r != c->end(); ++r)
-        {
-            r2.append(*r);
-        }
-    }
-    rpn1 = r1.listing("",iv_spy_names.front(),false);
-    rpn2 = r2.listing("",iv_spy_names.front(),false);
-    if(rpn1 != rpn2)
-    {
-        result = false;
-        oss << "this row/col rpn:" << endl;
-        oss << rpn1 << endl;
-        oss << "that row/col rpn:" << endl;
-        oss << rpn2 << endl;
-    }
-
-    if(!result) cout << oss.str();
-#endif
-    return result;
-}
-
-
-//=================================================================================================
-//  SpyList Class definitions
-//=================================================================================================
-
-ScomList::ScomList(const string & initfile, FILELIST & defines, ostream & stats, uint32_t i_ec)
-    :
-        iv_syntax_version(0),
-        iv_symbols(new Symbols(defines)),
-        iv_stats(stats),
-        iv_ec(i_ec)
-
-{
-    yyscomlist = this;
-
-    // What type of input? text(*.initfile) or binary(*.if) ?
-    size_t pos = initfile.rfind('.');
-    string type;
-    if(pos != string::npos)
-    {
-        type = initfile.substr(pos+1);
-    }
-
-    if(type.compare(0,8,"initfile") == 0)   // source is text *.initfile
-    {
-        char line[100];
-        string first_line;
-        yyin = fopen(initfile.c_str(), "r");
-        if(!yyin)
-        {
-            string ers("ERROR: ScomList::ScomList: Could not open initfile: ");
-            ers.append(initfile);
-            throw invalid_argument(ers);
-        }
-
-        // In Syntax version 1 the first or second line contains the CVS version
-        fgets(line,100,yyin);
-        first_line = line;
-        fgets(line,100,yyin);
-        first_line.append(line);
-        yyline = 3;
-
-        dbg << "======================= Begin Parse ========================" << endl;
-        yyparse();   // Parse the initfile
-        dbg << "======================= End Parse ==========================" << endl;
-
-        if(iv_syntax_version == 1)
-        {
-            // example pattern  ..... $Id: galaxy.initfile,v 5.0 ......
-            size_t pos = first_line.find("$Id:");
-            if(pos != string::npos)
-            {
-                istringstream iss(first_line.substr(pos+4));
-                string tok;
-                iss >> tok;     // ex. galaxy.initfile,v
-                iss >> tok;     // ex. 5.0
-                iv_cvs_versions = tok;    // just want the version number - eg '5.0'
-            }
-        }
-
-        iv_stats << '*' << setw(20) << "lines:" << setw(6) << yyline-1 << endl;
-        iv_stats << '*' << setw(20) << "Scom statements:" << setw(6) << iv_scom_list.size() << endl;
-        // TODO num var/lits num lits found
-    }
-    else if(type.compare(0,2,"if") == 0)  // source is binary *.if file
-    {
-// TODO - No support for this currently
-#if 0
-        dbg << "======================= Begin Uncompiling ========================" << endl;
-
-        BINSEQ bin_seq;
-        ifstream ifs(initfile.c_str(), ios_base::in | ios_base::binary);
-        if(!ifs)
-        {
-            string msg("ERROR: SpyList::Could not open ");
-            msg.append(initfile);
-            throw invalid_argument(msg);
-        }
-        while(1)
-        {
-            int ch = ifs.get();
-            if (!(ifs.good())) break;
-            bin_seq.push_back(ch);
-        }
-        ifs.close();
-
-        // Turn this back into a list of spies
-        BINSEQ::const_iterator bli = bin_seq.begin();
-        BINSEQ::const_iterator b;
-
-        iv_syntax_version = Rpn::extract32(bli);
-        bli += 8;
-        if(iv_syntax_version == 1)
-        {
-            for(b = bli-8; (b != bli) && (*b); ++b)
-            {
-                iv_cvs_versions.push_back(*b);
-            }
-        }
-        else
-        {
-            // offset to CVS sub version section
-            b = bin_seq.begin() + Rpn::extract32(bli);
-            size_t size = Rpn::extract16(b);
-            while(size--) iv_cvs_versions.push_back(*b++);
-        }
-
-        b = bin_seq.begin() + Rpn::extract32(bli);
-        iv_symbols->restore_var_bseq(b);
-
-        b =  bin_seq.begin() + Rpn::extract32(bli);
-        iv_symbols->restore_lit_bseq(b);
-
-        size_t section_count    = Rpn::extract32(bli);
-        if(section_count > LAST_WHEN_TYPE)
-        {
-            throw range_error("ERROR: SpyList::SpyList - Inalid # of sections");
-        }
-
-        for(size_t i = 0; i < section_count; ++i)
-        {
-            size_t spy_type = Rpn::extract32(bli);        // type
-            size_t offset   = Rpn::extract32(bli);        // offset
-            size_t count    = Rpn::extract32(bli);        // Number of spies
-
-            b = bin_seq.begin() + offset;
-            if(!(b < bin_seq.end()))
-            {
-                throw overflow_error("ERROR: SpyList::SpyList - iterator overflowed sequence");
-            }
-            if(spy_type > LAST_WHEN_TYPE || spy_type == 0)
-            {
-                throw range_error("ERROR: SpyList::SpyList - when= type out of range");
-            }
-            while(count--)
-            {
-                Scom * s = new Scom(b,iv_symbols);
-                insert(s);
-                s->set_when((SPY_WHEN)spy_type);
-            }
-        }
-#endif
-        dbg << "======================= End Uncompiling ========================" << endl;
-    }
-    else
-    {
-        ostringstream ess;
-        ess << "ERROR: SpyList::SpyList Invalid file type: " << type;
-        ess << "\n   source: " << initfile;
-        throw invalid_argument(ess.str());
-    }
-}
-
-//-------------------------------------------------------------------------------------------------
-
-ScomList::~ScomList()
-{
-    delete iv_symbols;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void ScomList::clear()
-{
-    for(SCOM_LIST::iterator i = iv_scom_list.begin(); i != iv_scom_list.end(); ++i) delete i->second;
-    iv_scom_list.clear();
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void ScomList::set_syntax_version(uint32_t v)
-{
-    if(v != 1 && v != 2) yyerror("ScomList:: set_syntax_version: Invalid Syntax Version");
-    iv_syntax_version = v;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void ScomList::compile(BINSEQ & bin_seq)
-{
-    uint32_t count_s = 0;
-    uint32_t section_count = 0;
-    size_t   offset = 0;
-
-
-    BINSEQ blist_v;     // vars
-    BINSEQ blist_i;     // lits
-    BINSEQ blist_l;     // when=L spies
-    BINSEQ blist_s;     // when=S spies
-    BINSEQ blist_c;     // when=C spies
-    BINSEQ blist_d;     // when=D spies
-
-    // Make the BINSEQs big enough to hopefully never have to resize
-    blist_v.reserve(0x00400);
-    blist_i.reserve(0x02000);
-    blist_l.reserve(0x30000);
-    blist_s.reserve(0x03000);
-    blist_c.reserve(0x03000);
-    blist_d.reserve(0x03000);
-
-
-    dbg << "======================== Begin compile ============================" << endl;
-    Rpn::set32(bin_seq,iv_syntax_version);      //  bytes[0:3]
-
-    // bytes [4:12]
-    if(iv_syntax_version == 2)
-    {
-        const char * s = "SEE SUBV";
-        for(; *s != 0; ++s) bin_seq.push_back(*s);
-        istringstream iss(iv_cvs_versions);
-        string vers;
-        while(iss >> vers)
-        {
-            stats << '*' << setw(20) << "Version:" << "  " << vers << endl;
-        }
-    }
-    else if (iv_syntax_version == 1)
-    {
-        if(iv_cvs_versions.size())
-        {
-            size_t len = iv_cvs_versions.size();
-            if(len > 8) { iv_cvs_versions.erase(9); len = 8; }
-            for(string::const_iterator s = iv_cvs_versions.begin();
-                s != iv_cvs_versions.end(); ++s)
-            {
-                bin_seq.push_back(*s);
-            }
-            while(len < 8) { bin_seq.push_back(0); ++len; }
-            stats << '*' << setw(20) << "Version:" << setw(6) << iv_cvs_versions << endl;
-        }
-        else
-        {
-            throw range_error("ERROR: ScomList::compile: No CVS version(s) specified");
-        }
-    }
-    else // syntax version already validated to be 1 or 2 - so if we get here it was never set.
-    {
-        throw range_error("ERROR: ScomList::compile: No syntax version specified!");
-    }
-    stats << '*' << setw(20) << "Syntax Version:" << setw(6) << iv_syntax_version << endl;
-
-
-    // Determine the number of scoms in each section
-
-    for(SCOM_LIST::iterator i = iv_scom_list.begin(); i != iv_scom_list.end(); ++i)
-    {
-        // Filter out filtered spies dg003a
-        if(!(i->second->valid_when(dbg,iv_ec)))
-        {
-            continue;
-        }
-
-        count_s += i->second->bin_listing(blist_s);
-
-    }
-    if(count_s) ++section_count;
-
-    // 28 bytes of File Header Data
-    offset = 28;
-    stats << '*' << setw(20) << "Sections:" << setw(6) << section_count << endl;
-
-    // for verion 2 add offset to CVS versions section
-    if(iv_syntax_version == 2)
-    {
-        offset += 4;
-        Rpn::set32(bin_seq,offset);
-        offset += iv_cvs_versions.length() + 2;
-    }
-    // offset now points to start of Var Symbol Table
-
-    iv_symbols->bin_vars(blist_v);         // get Var table
-    iv_symbols->bin_lits(blist_i);         // Get Lit table
-
-    Rpn::set32(bin_seq,offset);           // Offset to Variable Symbol Table
-    offset += blist_v.size();             // offset += var table byte size
-    Rpn::set32(bin_seq,offset);           // Offset to Literal Symbol Table
-    offset += blist_i.size();             // offset += lit table byte size
-
-    //if(count_s)   //Need to write this either way
-    {
-        Rpn::set32(bin_seq,offset);             // SCOM Section offset
-        Rpn::set32(bin_seq,count_s);            // Number of SCOM's
-    }
-
-    if(iv_syntax_version == 2) // Add Sub-version section
-    {
-        Rpn::set16(bin_seq,(uint16_t)iv_cvs_versions.length()); // Length of Sub version
-        bin_seq.insert(bin_seq.end(), iv_cvs_versions.begin(), iv_cvs_versions.end());
-    }
-
-    bin_seq.insert(bin_seq.end(), blist_v.begin(), blist_v.end());      // add var table section
-    bin_seq.insert(bin_seq.end(), blist_i.begin(), blist_i.end());      // add lit table section
-
-    if(count_s)
-    {
-        bin_seq.insert(bin_seq.end(), blist_s.begin(), blist_s.end());  // add SCOM section
-    }
-    stats << '*' << setw(20) << "S scoms:" << setw(6) << count_s << endl;
-    dbg << "======================== End compile ============================" << endl;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-bool Scom::valid_when(ostream & msg, uint32_t i_ec)    //dg002a dg003c
-{
-    bool result = true;
-
-    // unconditional state was determined earlier
-    if( iv_when_rpn.isTrue()) // unconditionally true - Rpn is not needed.
-        iv_when_rpn.clear();
-    else if( iv_when_rpn.isFalse()) //unconditionally false
-        result = false;
-    else if(i_ec != 0xffffffff)
-    {
-        if(iv_when_rpn.resolve_ec(i_ec) == false) result = false;
-    }
-#if 0
-    if(result == false)
-    {
-        msg << hex;
-        SPY_NAMES::iterator i = iv_spy_names.begin();
-        // if more than one spyname, the first is just the stem of the name - skip it
-        if(iv_spy_names.size() > 1) ++i;
-
-        for(; i != iv_spy_names.end(); ++i)
-        {
-            if(i_ec != 0xffffffff)
-                msg << "For EC " << i_ec << ": ";
-
-            msg << "Removing spy " << *i << endl;
-        }
-        msg << iv_when_rpn.listing("WHEN RPN","",true) << endl;
-    }
-#endif
-    return result;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void ScomList::listing(BINSEQ & bin_seq,ostream & olist)
-{
-    dbg << "======================= Begin Listing ========================" << endl;
-
-    BINSEQ::const_iterator bli = bin_seq.begin();
-    BINSEQ::const_iterator b;
-    uint32_t syntax_version = Rpn::extract32(bli);
-
-    string cvs_versions;
-
-    olist << hex << setfill('0');
-    olist << "--------------- FILE HEADER ------------------------\n\n";
-    olist << fmt8(syntax_version)               << "[Syntax Version]\n"
-          << "0x";
-    bli += 8;
-    for(b = bli-8; b != bli; ++b) olist << setw(2) << (uint32_t)(*b);
-    olist << " [";
-    for(b = bli-8; b != bli; ++b) if((*b) != 0) olist << (char)(*b);
-    olist << "]\t[CVS Version]\n";
-    if(syntax_version == 2)
-    {
-        size_t offset = Rpn::extract32(bli);
-        olist << fmt8(offset)    << "[Offset to Sub-Version Section]\n";
-    }
-
-    uint32_t var_table_offset = Rpn::extract32(bli);
-    uint32_t lit_table_offset = Rpn::extract32(bli);
-
-    olist << fmt8(var_table_offset)             << "[Offset to Attribute Symbol Table]\n";
-    olist << fmt8(lit_table_offset)             << "[Offset to Literal Symbol Table]\n";
-
-
-    b = bin_seq.begin() + var_table_offset;
-    iv_symbols->restore_var_bseq(b);
-
-    b =  bin_seq.begin() + lit_table_offset;
-    iv_symbols->restore_lit_bseq(b);
-
-    b = bli;  // save
-
-    size_t offset   = Rpn::extract32(bli);        // offset
-    size_t count    = Rpn::extract32(bli);        // Number of spies
-
-    olist << fmt8(offset)   << "[Scom Section Offset]\n";
-    olist << fmt8(count)    << "[Number of scoms]\n";
-
-    olist << endl;
-
-    if(syntax_version == 2)
-    {
-        olist << "--------------- Sub Version Section ---------------\n\n";
-        uint16_t len = Rpn::extract16(bli);
-        olist << "0x" << setw(4) << len << "\t\t"
-            << "Length of Sub Version Section\n\n";
-        for(uint16_t i = 0; i < len; ++i) olist << (char)(*bli++);
-        olist << endl;
-    }
-
-    if (yytarget.size())
-    {
-        olist << "------------------- TARGET MAPPING ------------------------\n\n"
-              << endl;
-        std::map<string,string>::iterator i;
-        for (i = yytarget.begin(); i != yytarget.end(); i++)
-        {
-            olist << i->first << setfill(' ') << setw(30 - i->first.length())
-                  << " = " << i->second << endl;
-        }
-    }
-
-    olist << iv_symbols->listing() << endl;
-
-    if (count)
-    {
-        olist << "------------------- SCOM TABLES ------------------------\n\n"
-              << endl;
-
-        bli = b;   // restore
-
-        olist << "------------ Scoms -----------\n\n";
-
-        b = bin_seq.begin() + offset;
-        if(!(b < bin_seq.end()))
-        {
-            throw overflow_error("ERROR: ScomList::listing: iterator overflowed sequence");
-        }
-
-        SCOM_LIST l_scom_list;
-        SCOM_LIST::const_iterator i;
-        pair<SCOM_LIST::const_iterator, SCOM_LIST::const_iterator> ret;
-        while (count --)
-        {
-            Scom * s = new Scom(b,iv_symbols);
-            olist << s->listing() << endl;
-
-            uint64_t l_addr = s->get_address_hex();
-            //cout << "ScomList::listing: iv_scom_address_hex 0x" << hex << l_addr << endl;
-
-            //Check for duplicate scom statements
-            bool l_dup_scoms = false;
-            ret = l_scom_list.equal_range(l_addr);
-            if (ret.first != ret.second)
-            {
-                //cout << "ScomList::listing: Duplicate scom addresses found" << endl;
-
-                uint32_t l_length = s->get_scom_length();
-
-                //If writing all bits
-                if (l_length == 0)
-                {
-                    l_dup_scoms = true;
-                }
-                else
-                {
-                    uint32_t l_start = s->get_scom_offset();    //start bit
-                    uint32_t l_end = l_start + l_length - 1;    //end bit
-                    //cout << "ScomList::listing: offset " << dec << l_start
-                    //     << " end " << l_end << " length " << l_length << endl;
-
-                    //loop through all the matches and check for duplicate bits
-                    for (i = ret.first; i != ret.second; ++i)
-                    {
-                        uint32_t l_length2 = i->second->get_scom_length();
-
-                        //If writing all bits
-                        if (l_length2 == 0)
-                        {
-                            l_dup_scoms = true;
-                            break;
-                        }
-
-                        uint32_t l_start2 = i->second->get_scom_offset(); //start bit
-                        uint32_t l_end2 = l_start2 + l_length2 - 1;       //end bit
-                        //cout << "ScomList::listing: offset2 " << l_start2
-                        //     << " end2 " << l_end2 << " length2 " << l_length2 << endl;
-
-                        // check for duplicate bits
-                        if ((l_start <= l_end2) && (l_start2 <= l_end))
-                        {
-                            // ranges overlap
-                            l_dup_scoms = true;
-                            break;
-                        }
-                    }
-                }
-            }
-
-            if (false == l_dup_scoms)
-            {
-                l_scom_list.insert(pair<uint64_t,Scom *>(l_addr, s));
-                //cout << "ScomList::listing: l_scom_list size " << l_scom_list.size() << endl;
-            }
-            else
-            {
-                ostringstream oss;
-                oss << "ScomList::listing: Duplicate scom statements found: "
-                       "Address 0x" << hex << l_addr << endl;
-                throw invalid_argument(oss.str());
-            }
-        }
-
-        //Free memory
-        for (i = l_scom_list.begin(); i != l_scom_list.end(); ++i)
-        {
-            delete i->second;
-        }
-        l_scom_list.clear();
-    }
-
-    dbg << "======================= End Listing ========================" << endl;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void ScomList::attr_listing(BINSEQ & bin_seq,ostream & olist)
-{
-    olist << iv_symbols->attr_listing();
-}
-
-//-------------------------------------------------------------------------------------------------
-
-string ScomList::fmt8(uint32_t val)
-{
-    ostringstream oss;
-    oss << setfill('0');
-    oss << "0x" << hex << setw(8) << val << "\t   " << '[' << dec << val << ']' << '\t';
-    if(val < 1000) oss  << '\t';
-    return oss.str();
-}
-
-
-//-------------------------------------------------------------------------------------------------
-
-void ScomList::insert(Scom * i_scom)
-{
-    uint64_t l_addr = i_scom->get_address();
-    iv_scom_list.insert(pair<uint64_t, Scom *>(l_addr, i_scom));
-}
-
-//-------------------------------------------------------------------------------------------------
-
-bool ScomList::compare(ScomList & that)
-{
-    bool result = true;
-    dbg << "======================= Begin Compare ========================" << endl;
-    if(iv_scom_list.size() != that.iv_scom_list.size())
-    {
-        cout << "E> Lists are not the same size" << endl;
-        result = false;
-    }
-
-    // check each spy section
-    for(SCOM_LIST::iterator i = iv_scom_list.begin(); i != iv_scom_list.end(); ++i)
-    {
-        // The name checks spyname, arrayaddr (if array), bitrange(s) (if any)
-        uint64_t l_addr = i->second->get_address();
-        SCOM_LIST::iterator j = that.iv_scom_list.find(l_addr);
-        if(j == that.iv_scom_list.end())
-        {
-            cout << "E> " << l_addr << " not found in both lists!" << endl;
-            result = false;
-            continue;
-        }
-        if(i->second->compare(*(j->second)) == false)
-        {
-            cout << "E> Spy: " << l_addr << " does not match!" << endl;
-            result = false;
-        }
-    }
-
-    // check for spies in that that are not in this
-    for(SCOM_LIST::iterator i = that.iv_scom_list.begin(); i != that.iv_scom_list.end(); ++i)
-    {
-        uint64_t l_addr = i->second->get_address();
-        SCOM_LIST::iterator j = iv_scom_list.find(l_addr);
-        if(j == iv_scom_list.end())
-        {
-            cout << "E> " << l_addr << " not found in both lists!" << endl;
-            result = false;
-        }
-    }
-    dbg << "======================= End Compare ========================" << endl;
-    return result;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-//-------------------------------------------------------------------------------------------------
-
-void Scom::set_scom_address(const string & i_scom_addr)
-{
-
-    if(iv_scom_addr.size())
-    {
-        yyerror("Scom::set_scom_address: SCOM Address already set!");
-    }
-    else
-    {
-        iv_scom_addr.push_back(i_scom_addr);
-        // cout << "I>Scom::set_scom_address: " << i_scom_addr << " is the output string!" << endl;
-    }
-}
-
-//-------------------------------------------------------------------------------------------------
-
-
-void Scom::dup_scom_address(const string & i_scom_addr)
-{
-    // cout << "I>Scom::dup_scom_address: "<< i_scom_addr << " is the output string!" << endl;
-
-    //If we have a range of values
-    size_t l_pos = i_scom_addr.find("..");
-    if (l_pos != string::npos)
-    {
-        // Convert the range specified to decimal values and check for valid range
-        uint64_t l_num1 = strtoull((i_scom_addr.substr(0,l_pos)).c_str(), NULL, 16);
-        uint64_t l_num2 = strtoull((i_scom_addr.substr(l_pos + 2)).c_str(), NULL, 16);
-        // cout << "I>Scom:dup_scom_address: " <<  l_num1 << " - " << l_num2 << endl;
-        if (l_num1 >= l_num2)
-        {
-            std::ostringstream oss;
-            oss << "Scom::dup_scom_address: Invalid scom address range: " << i_scom_addr;
-            yyerror(oss.str().c_str());
-        }
-
-        for (uint64_t num = l_num1; num <= l_num2; num++)
-        {
-            // For each value within the range, create a hex string of the correct size
-            string l_scom_addr = dec2hexString(num, l_pos);
-
-            if (iv_scom_addr.size() == 0)
-            {
-                // If there are no base address, create the duplicate addresses by pushing back
-                // each value within the range
-                iv_dup_scom_addr.push_back(l_scom_addr);
-                // cout << "I>Scom::dup_scom_address: iv_dup_scom_addr" << iv_dup_scom_addr.back() << endl;
-            }
-            else
-            {
-                // If there are base addresses, create the dupicate addresses by appending each 
-                // value within the range to the base addresses.
-                for (size_t i = 0; i < iv_scom_addr.size(); i++)
-                {
-                    iv_dup_scom_addr.push_back(iv_scom_addr.at(i) + l_scom_addr);
-                    // cout << "I>Scom::dup_scom_address: iv_dup_scom_addr " << iv_dup_scom_addr.back() << endl;
-                }
-            }
-        }
-    }
-    // Else we have a single value
-    else
-    {
-        // If there are no base address, create the duplicate address by pushing back the specified
-        // value
-        if (iv_scom_addr.size() == 0)
-        {
-            iv_dup_scom_addr.push_back(i_scom_addr);
-            // cout << "I>Scom::dup_scom_address: iv_dup_scom_addr " << iv_dup_scom_addr.back() << endl;
-        }
-        else
-        {
-            // If there are base addresses, create the dupicate addresses by appending the
-            // specified value to the base addresses.
-            for (size_t i = 0; i < iv_scom_addr.size(); i++)
-            {
-                iv_dup_scom_addr.push_back(iv_scom_addr.at(i) + i_scom_addr);
-                // cout << "I>Scom::dup_scom_address: iv_dup_scom_addr " << iv_dup_scom_addr.back() << endl;
-            }
-        }
-    }
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Scom::copy_dup_scom_address()
-{
-    // cout << "I>Scom::copy_dup_scom_address: iv_scom_addr size "<< iv_scom_addr.size()
-    //      << " iv_dup_scom_addr size " << iv_dup_scom_addr.size() << endl;
-
-    iv_scom_addr.clear();
-    iv_scom_addr = iv_dup_scom_addr;
-    iv_dup_scom_addr.clear();
-
-    // cout << "I>Scom::copy_dup_scom_address: iv_scom_addr size "<< iv_scom_addr.size()
-    //      << " iv_dup_scom_addr size " << iv_dup_scom_addr.size() << endl;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Scom::set_scom_suffix(const string & i_scom_addr)
-{
-
-    if(iv_scom_addr.size() == 0)
-    {
-        std::ostringstream oss;
-        oss << "Scom::set_scom_suffix: No base scom address to append suffix " << i_scom_addr;
-        yyerror(oss.str().c_str());
-    }
-    else
-    {
-        // cout << "I>Scom::set_scom_suffix: iv_scom_addr size " << iv_scom_addr.size() << endl;
-        for(size_t i = 0; i < iv_scom_addr.size(); ++i)
-        {
-            // cout << "I>Scom::set_scom_suffix: iv_scom_addr " << iv_scom_addr.at(i) << endl;
-            iv_scom_addr.at(i) = iv_scom_addr.at(i) + i_scom_addr;
-            // cout << "I>Scom::set_scom_suffix: iv_scom_addr appended " << iv_scom_addr.at(i) << endl;
-        }
-    }
-
-    // cout << "I>Scom::set_scom_suffix: "<< i_scom_addr << " is the output string!" << endl;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Scom::set_scom_address_bin(const string & i_scom_addr)
-{
-
-    if(iv_scom_addr_bin.size())
-    {
-        yyerror("Scom::set_scom_address_bin: Binary SCOM Address already set!");
-    }
-    else
-    {
-        iv_scom_addr_bin.push_back(i_scom_addr);
-    }
-
-    // cout << "I>Scom::set_scom_address_bin: " << i_scom_addr << " is the output string!" << endl;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Scom::dup_scom_address_bin(const string & i_scom_addr)
-{
-    // cout << "I>Scom::dup_scom_address_bin: "<< i_scom_addr << " is the output string!" << endl;
-
-    //If we have a range of values
-    size_t l_pos = i_scom_addr.find("..");
-    if (l_pos != string::npos)
-    {
-        // Convert the range specified to decimal values and check for valid range
-        uint64_t l_num1 = strtoull((i_scom_addr.substr(0,l_pos)).c_str(), NULL, 2);
-        uint64_t l_num2 = strtoull((i_scom_addr.substr(l_pos + 2)).c_str(), NULL, 2);
-        // cout << "I>Scom:dup_scom_address_bin: " <<  l_num1 << " - " << l_num2 << endl;
-        if (l_num1 >= l_num2)
-        {
-            std::ostringstream oss;
-            oss << "Scom::dup_scom_address_bin: Invalid binary scom address range: "
-                << i_scom_addr;
-            yyerror(oss.str().c_str());
-        }
-
-        for (uint64_t num = l_num1; num <= l_num2; num++)
-        {
-            // For each value within the range, create a binary string of the correct size
-            string l_scom_addr = dec2binString(num, l_pos);
-
-            if (iv_scom_addr_bin.size() == 0)
-            {
-                // If there are no base address, create the duplicate addresses by pushing back
-                // each value within the range
-                iv_dup_scom_addr_bin.push_back(l_scom_addr);
-                // cout << "I>Scom::dup_scom_address_bin: iv_dup_scom_addr_bin " << iv_dup_scom_addr_bin.back() << endl;
-            }
-            else
-            {
-                // If there are base addresses, create the dupicate addresses by appending each 
-                // value within the range to the base addresses.
-                for (size_t i = 0; i < iv_scom_addr_bin.size(); i++)
-                {
-                    iv_dup_scom_addr_bin.push_back(iv_scom_addr_bin.at(i) + l_scom_addr);
-                    // cout << "I>Scom::dup_scom_address_bin: iv_dup_scom_addr_bin " << iv_dup_scom_addr_bin.back() << endl;
-                }
-            }
-        }
-    }
-    // Else we have a single value
-    else
-    {
-        // If there are no base address, create the duplicate address by pushing back the specified
-        // value
-        if (iv_scom_addr_bin.size() == 0)
-        {
-            iv_dup_scom_addr_bin.push_back(i_scom_addr);
-            // cout << "I>Scom::dup_scom_address_bin: iv_dup_scom_addr_bin " << iv_dup_scom_addr_bin.back() << endl;
-        }
-        else
-        {
-            // If there are base addresses, create the dupicate addresses by appending the
-            // specified value to the base addresses.
-            for (size_t i = 0; i < iv_scom_addr_bin.size(); i++)
-            {
-                iv_dup_scom_addr_bin.push_back(iv_scom_addr_bin.at(i) + i_scom_addr);
-                // cout << "I>Scom::dup_scom_address_bin: iv_dup_scom_addr_bin " << iv_dup_scom_addr_bin.back() << endl;
-            }
-        }
-    }
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Scom::copy_dup_scom_address_bin()
-{
-    // cout << "I>Scom::copy_dup_scom_address_bin: iv_scom_addr_bin size "<< iv_scom_addr_bin.size()
-    //      << " iv_dup_scom_addr_bin size " << iv_dup_scom_addr_bin.size() << endl;
-
-    iv_scom_addr_bin.clear();
-    iv_scom_addr_bin = iv_dup_scom_addr_bin;
-    iv_dup_scom_addr_bin.clear();
-
-    // cout << "I>Scom::copy_dup_scom_address_bin: iv_scom_addr_bin size "<< iv_scom_addr_bin.size()
-    //      << " iv_dup_scom_addr_bin size " << iv_dup_scom_addr_bin.size() << endl;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Scom::set_scom_suffix_bin(const string & i_scom_addr)
-{
-
-    if(iv_scom_addr_bin.size() == 0)
-    {
-        std::ostringstream oss;
-        oss << "Scom::set_scom_suffix_bin: No base binary scom address to append suffix "
-            << i_scom_addr;
-        yyerror(oss.str().c_str());
-    }
-    else
-    {
-        for(size_t i = 0; i < iv_scom_addr_bin.size(); ++i)
-        {
-            iv_scom_addr_bin.at(i) = iv_scom_addr_bin.at(i) + i_scom_addr;
-        }
-    }
-
-    // cout << "I>Scom::set_scom_suffix_bin: "<< i_scom_addr << " is the output string!" << endl;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-void Scom::append_scom_address_bin()
-{
-    for (size_t i = 0; i < iv_scom_addr_bin.size(); i++)
-    {
-        if (0 != (iv_scom_addr_bin.at(i).size() % 4))
-        {
-            std::ostringstream oss;
-            oss << "Scom::append_scom_address_bin: Binary scom address "
-                << iv_scom_addr_bin.at(i) << " is a partial hex!";
-            yyerror(oss.str().c_str());
-            break;
-        }
-        else
-        {
-            // Duplicate the scom addresses
-            uint64_t l_num = strtoull(iv_scom_addr_bin.at(i).c_str(), NULL, 2);
-            string l_scom_addr = dec2hexString(l_num, iv_scom_addr_bin.at(i).size() / 4);
-            dup_scom_address(l_scom_addr);
-        }
-    }
-
-    if (iv_dup_scom_addr.size())
-    {
-        // Copy duplicate scom addresses to the base scom addresses
-        copy_dup_scom_address();
-        iv_scom_addr_bin.clear();
-    }
-}
-
-//-------------------------------------------------------------------------------------------------
-string Scom::dec2hexString(uint64_t i_num, size_t i_str_size)
-{
-    stringstream l_ss;
-    l_ss.width(i_str_size); // Set string width
-    l_ss.fill('0');         // Prefill with '0'
-    l_ss << hex << i_num;
-
-    return l_ss.str();
-}
-
-//-------------------------------------------------------------------------------------------------
-string Scom::dec2binString(uint64_t i_num, size_t i_str_size)
-{
-    size_t l_size = sizeof(i_num) * 8;
-    char l_buf[l_size];
-    size_t l_idx = l_size;
-
-    do
-    {
-        l_buf[--l_idx] = '0' + (i_num & 1);
-        i_num >>= 1;
-    } while (--i_str_size);
-
-    return string(l_buf + l_idx, l_buf + l_size);
-}
-
-string Scom::addr_listing()
-{
-    std::stringstream l_ss;
-    l_ss << "\t\t\tSCOM Addresses" << endl;
-    //l_ss << std::hex << std::setfill('0');
-
-    for (size_t i = 0; i < iv_scom_addr.size(); i++)
-    {
-        //l_ss << "0x" << std::setw(16) << op_id << "\t\t" << OP_TXT[op_id] << std::endl;
-        l_ss << iv_scom_addr.at(i) << endl;
-    }
-    return l_ss.str();
-}
diff --git a/src/usr/hwpf/ifcompiler/initScom.H b/src/usr/hwpf/ifcompiler/initScom.H
deleted file mode 100755
index 5b342d5ad..000000000
--- a/src/usr/hwpf/ifcompiler/initScom.H
+++ /dev/null
@@ -1,333 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/ifcompiler/initScom.H $                          */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#if !defined(INITSPY_H)
-#define INITSPY_H
-
-// Change Log *************************************************************************************
-//
-//  Flag Track     Userid   Date     Description
-//  ----- -------- -------- -------- -------------------------------------------------------------
-//         D754106 dgilbert 06/14/10 Create
-//  dg002 SW039868 dgilbert 10/15/10 Add support to filter unneeded inits by EC
-//  dg003 SW047506 dgilbert 12/09/10 More filtering enhancements
-//                 andrewg  05/24/11 Port over for VPL/PgP
-//                 andrewg  09/19/11 Updates based on review
-//                 mjjones  11/17/11 Output attribute listing
-//                 camvanng 12/12/11 Support multiple address ranges within a SCOM address
-//                                   Use strtoull vs strtoul for 32-bit platforms
-//                 camvanng 12/15/11 Support for multiple duplicate addresses setting different bits
-//                 camvanng 01/20/12 Support for using a range of indexes for array attributes
-//                 camvanng 02/14/12 Support binary and hex scom addresses
-//                 camvanng 04/16/12 Support defines for SCOM address
-//                                   Support defines for bits, scom_data and attribute columns
-//                                   Delete obsolete code for defines support 
-//                 camvanng 06/27/12 Improve error and debug tracing
-// End Change Log *********************************************************************************
-// $Id: initScom.H,v 1.9 2014/06/30 20:19:48 thi Exp $
-/**
- * @file initSpy.H
- * @brief Declairation of the initSpy Class. Represents the information parsed from an initfile spy
- *        statement.
- */
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <string>
-#include <vector>
-#include <map>
-#include <set>
-#include <initRpn.H>
-#include <initSymbols.H>
-
-
-using namespace std;
-
-namespace init
-{
-    typedef vector<string> SCOM_ADDR;
-    typedef vector<Rpn> RPN_LIST;
-    typedef vector<RPN_LIST> COL_LIST;
-    typedef vector<uint32_t> VAR_LIST;
-    typedef pair<uint32_t,uint32_t> RANGE;
-    typedef vector<RANGE> RANGE_LIST;
-
-    enum SCOM_WHEN
-    {
-        NONE                = 0x00000000,
-
-        // WHEN= types
-        LONG_SCAN           = 0x00000001,
-        SCOM                = 0x00000002,
-        DRAMINIT            = 0x00000003,
-        CFAMINIT            = 0x00000004,
-        LAST_WHEN_TYPE      = CFAMINIT,
-        WHEN_MASK           = 0x000000FF,
-
-        // WHEN= sub types
-        SUBTYPE_MASK        = 0x0000F000,
-        HOT_ADD_NODE        = 0x00004000,
-        AFTER_HOT_ADD_NODE  = 0x00006000,
-        HOT_ADD_GX          = 0x00008000,
-        HOT_ADD_GX0         = 0x00007000,
-        HOT_ADD_GX1         = 0x00005000,
-        AFTER_HOT_ADD_GX    = 0x0000A000,
-        AFTER_HOT_ADD_GX0   = 0x00003000,
-        AFTER_HOT_ADD_GX1   = 0x00002000,
-    };
-
-    const char when_char[] = { '@','L','S','D','C' };
-
-    class Scom
-    {
-        public:
-
-            enum SPY_TYPE
-            {
-                NOTYPE,
-                ISPY,
-                ESPY,
-                ARRAY
-            };
-
-
-            Scom(Symbols * i_symbols,uint32_t i_line = 0) :
-                iv_symbols(i_symbols),
-                iv_line(i_line),
-                iv_scom_length(0),
-                iv_scom_offset(0),
-                iv_when(NONE)        {}
-
-            // Build from binary sequence
-            Scom(BINSEQ::const_iterator & bli, Symbols * i_symbols);
-
-            bool compare(Scom & that);
-            uint32_t get_when(void)              { return(iv_when); }
-            void set_when(SCOM_WHEN i_when)              { iv_when |= (uint32_t)i_when; }
-            void set_when(const string * when_str);
-            bool do_when(SCOM_WHEN i_when)      { return ((uint32_t)i_when == (WHEN_MASK & iv_when)); }
-            void set_sub_when(SCOM_WHEN i_when)          { iv_when |= i_when; }
-            void set_when_rpn(const Rpn * i_rpn)        { iv_when_rpn = *i_rpn; delete i_rpn; }
-            uint32_t get_line() { return iv_line; }
-            void add_scom_rpn(const Rpn * i_rpn)        { iv_scom_rpn.push_back(*i_rpn); delete i_rpn; }
-
-
-
-            /**
-             * Is when statement valid for this spy
-             * @param stats: ostream to print debug information
-             * @param ec restriction - true if valid for this ec, 0xffffffff means ANY ec
-             * @return false if Rpn for when statement resolves to false, otherwise true
-             */
-            bool valid_when(ostream & stats, uint32_t i_ec = 0xffffffff);
-
-            void add_col(const string & i_colname);
-
-            /**
-             * Add a row rpn to the current column
-             * @param pointer to Rpn object
-             * @pre add_col()
-             */
-            void add_row_rpn(Rpn * i_rpn);
-
-            void add_bit_range(uint32_t start, uint32_t end);
-            void add_target_range(uint32_t r1, uint32_t r2);
-            void make_target(const char * i_symbol);
-
-
-            uint64_t get_address(void) {return(strtoull(iv_scom_addr[0].c_str(),NULL,16));}
-
-            /**
-             * @brief Get the SCOM address
-             * @return iv_scom_addr_hex  the SCOM address
-             */
-            uint64_t get_address_hex(void) {return iv_scom_addr_hex;}
-
-            /**
-             * @brief Get the bit offset to start writing the SCOM data
-             * @return iv_scom_offset  the starting bit within the SCOM to write the data
-             */
-            uint32_t get_scom_offset(void) {return iv_scom_offset;}
-
-            /**
-             * @brief Get the total number of bits to write
-             * @return iv_scom_length  the number of bits to write
-             */
-            uint32_t get_scom_length(void) {return iv_scom_length;}
-
-            // string name();
-            string listing();
-
-            /**
-             * Append binary listing of this Spy
-             * @param when [init::LONG_SCAN | init::SCOM]
-             * @param BINSEQ binary listing to append
-             * @returns uint32_t number of spies added
-             */
-            uint32_t bin_listing(BINSEQ & blist);
-
-            void set_scom_address(const string & i_scom_addr);
-            void dup_scom_address(const string & i_scom_addr);
-            void copy_dup_scom_address();
-            void set_scom_suffix(const string & i_scom_addr);
-
-            /**
-             * @brief Set the binary SCOM address
-             * @param i_scom_addr  binary address string
-             */
-            void set_scom_address_bin(const string & i_scom_addr);
-            
-            /**
-             * @brief Create duplicate binary SCOM addresses and append input address string
-             * @param i_scom_addr  binary address string
-             */
-            void dup_scom_address_bin(const string & i_scom_addr);
-
-            /**
-             * @brief Copy duplicate binary SCOM addresses to main binary address vector
-             */
-            void copy_dup_scom_address_bin();
-
-            /**
-             * @brief Append the input binary address string to the binary address
-             * @param i_scom_addr  binary address string
-             */
-            void set_scom_suffix_bin(const string & i_scom_addr);
-
-            /**
-             * @brief Append the binary address to the hex address
-             */
-            void append_scom_address_bin();
-
-            /**
-             * @brief Convert decimal to hex string
-             * @param i_num  decimal number
-             * @param i_str_size   string size
-             */
-            string dec2hexString(uint64_t i_num, size_t i_str_size);
-
-            /**
-             * @brief Convert decimal to bin string
-             * @param i_num  decimal number
-             * @param i_str_size   string size
-             */
-            string dec2binString(uint64_t i_num, size_t i_str_size);
-
-            /**
-             * @brief Return scom address strings
-             */
-            string addr_listing();
-
-        private:  // functions
-
-            string list_one(RANGE range);
-            void bin_list_one(BINSEQ & blist,uint64_t i_addr, uint32_t i_addr_num, RANGE range);
-
-            /**
-             * Optimize the row RPNs
-             * @note Remove any rows that resolve to unconditionally false.
-             */
-            void row_optimize();
-
-        private:  // data
-
-          typedef map<string,SCOM_WHEN> WHEN_SUBTYPE_MAP;
-
-            SCOM_ADDR   iv_scom_addr;
-            SCOM_ADDR   iv_dup_scom_addr;      ///< contains the duplicate scom addresses
-            uint64_t    iv_scom_addr_hex;
-            SCOM_ADDR   iv_scom_addr_bin;      ///< temp storage for binary scom addresses
-            SCOM_ADDR   iv_dup_scom_addr_bin;  ///< contains the duplicate binary scom addresses
-            uint32_t    iv_scom_length;
-            uint32_t    iv_scom_offset;
-            RPN_LIST    iv_scom_rpn;            ///< spyv - for each row
-            RPN_LIST    iv_col_vars;            ///< RPNs of column name for each column
-            COL_LIST    iv_cols_rpn;            ///< A list of row rpn segments one rpn list for each column
-            RPN_LIST    iv_row_rpn;             ///< row rpns for current column being parsed.
-            RANGE_LIST  iv_range_list;          ///< bit range list
-            RANGE_LIST  iv_target_ranges;       ///< target range for current target begin parsed.
-            Symbols   * iv_symbols;
-            uint32_t    iv_line;                ///< line # in the initfile
-            uint32_t    iv_when;
-            Rpn         iv_when_rpn;
-
-
-            static WHEN_SUBTYPE_MAP  cv_when_subtypes;
-
-    };
-
-
-    //=================================================================================================
-    //  SpyList Class declarations
-    //=================================================================================================
-    // Container to track scoms
-    typedef multimap<uint64_t, init::Scom *> SCOM_LIST;
-
-    class ScomList
-    {
-        public:
-            ScomList(const string & initfile, FILELIST & defines, ostream & stats, uint32_t i_ec = 0xFFFFFFFF);
-            ~ScomList();
-            //size_t size() { return iv_spy_list.size(); }
-            //SPY_LIST::iterator begin() { return iv_spy_list.begin(); }
-            //SPY_LIST::iterator end() { return iv_spy_list.end(); }
-            void clear();
-            void insert(Scom * i_scom);
-
-            void compile(BINSEQ & bin_seq);
-
-            void listing(BINSEQ & bin_seq, ostream & out);
-            void attr_listing(BINSEQ & bin_seq, ostream & out);
-
-            /**
-             * Compare two spylists for equivalance
-             * @returns true if equal
-             * @note Both spylists should have been built from a binary sequence
-             *    not directly from an initfile
-             */
-            bool compare(ScomList & that);
-
-
-
-            void set_cvs_versions(const string * s) { iv_cvs_versions = *s; }
-            void set_syntax_version(uint32_t v);
-            size_t get_syntax_version() { return iv_syntax_version; }
-
-            Symbols * get_symbols() { return iv_symbols; }
-
-        private: // functions
-
-            string fmt8(uint32_t val);
-
-        private:
-
-              SCOM_LIST iv_scom_list;
-              string iv_cvs_versions;
-              uint32_t iv_syntax_version;
-              Symbols * iv_symbols;
-              ostream & iv_stats;
-              uint32_t iv_ec;
-    };
-};
-#endif
diff --git a/src/usr/hwpf/ifcompiler/initSymbols.C b/src/usr/hwpf/ifcompiler/initSymbols.C
deleted file mode 100755
index 5ffbd013e..000000000
--- a/src/usr/hwpf/ifcompiler/initSymbols.C
+++ /dev/null
@@ -1,1160 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/ifcompiler/initSymbols.C $                       */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// Change Log *************************************************************************************
-//                                                                      
-//  Flag Track     Userid   Date     Description                
-//  ---- --------  -------- -------- -------------------------------------------------------------
-//       D754106   dgilbert 06/14/10 Create
-//                 dgilbert 10/22/10 Add spies_are_in()
-//                 andrewg  09/19/11 Updates based on review
-//                 camvanng 11/08/11 Added support for attribute enums
-//                 andrewg  11/09/11 Multi-dimensional array and move to common fapi include
-//                 mjjones  11/17/11 Output attribute listing
-//                 camvanng 11/17/11 Support for system & target attributes
-//                 camvanng 01/07/12 Support for writing an attribute to a SCOM register
-//                 camvanng 04/10/12 Support fixed attribute enum value
-//                 camvanng 04/16/12 Support defines for SCOM address
-//                                   Support defines for bits, scom_data and attribute columns
-//                                   Delete obsolete code for defines support
-//                 camvanng 05/07/12 Support for associated target attributes
-//                 camvanng 06/27/12 Improve error and debug tracing
-//                                   Add get_numeric_array_data()
-// End Change Log *********************************************************************************
-// $Id: initSymbols.C,v 1.8 2014/06/30 20:27:49 thi Exp $
-/**
- * @file initSymbols.C
- * @brief Definition of the initSymbols class. Handles all symbols for initfiles
- */
-
-#include <initSymbols.H>
-#include <initRpn.H>
-#include <sstream>
-#include <iomanip>
-#include <iostream>
-#include <fstream>
-#include <stdexcept>
-#include <stdlib.h>
-
-using namespace init;
-
-ostringstream errss;
-
-#define SYM_EXPR 0x10000000
-const string SYS_ATTR = "SYS.";
-
-// ------------------------------------------------------------------------------------------------
-
-Symbols::Symbols(FILELIST & i_filenames)
-    : iv_used_var_count(1), iv_used_lit_count(1), iv_rpn_id(1)
-{
-    string fileline;
-
-    for(FILELIST::iterator fn = i_filenames.begin(); fn != i_filenames.end(); ++fn)
-    {
-        printf("Parsing file %s\n",fn->c_str());
-        uint32_t lineno = 0;
-        ifstream infs(fn->c_str());
-        if(!infs)
-        {
-            errss.str("");
-            errss << "ERROR! Symbols::Symbols: Could not open "
-                  << *fn << endl;
-            throw invalid_argument(errss.str());
-        }
-        while(getline(infs,fileline))
-        {
-            ++lineno;
-            if(fileline.size() == 0) continue;
-            if(fileline[0] == '/') continue;
-            istringstream iss(fileline);
-            string def;
-            iss >> def;
-            //printf("def: %s\n",def.c_str());
-            if(def == "enum")
-            {
-                // Make sure it's the AttributeId enum
-                iss >> def;
-                if(def == "AttributeId")
-                {
-                    // We've now found the beginning of the attribute enum definition
-                    // Read and skip the '{' on the next line
-                    getline(infs,fileline);
-                    getline(infs,fileline);
-
-                    while(fileline[0] != '}')
-                    {
-                        istringstream attr_stream(fileline);
-                        string attr;
-                        char tempChar = 0;
-                        uint32_t attrId = 0;
-
-                        // Read the attribute name
-                        attr_stream >> attr;
-
-                        // Read and ignore the '=' '0' 'x' characters
-                        attr_stream >> tempChar;
-                        attr_stream >> tempChar;
-                        attr_stream >> tempChar;
-
-                        // Read the attribute ID
-                        attr_stream >> hex >> attrId;
-
-                        // Store the value
-                        iv_symbols[attr] = MAP_DATA(attrId,NOT_USED);
-
-                        getline(infs,fileline);
-                    }
-                }
-                else
-                {
-                    // Make sure it's an attribute enum
-
-                    string attribute_enum_name;
-                    string find_enum = "_Enum";
-
-                    // Check for _Enum in the name
-                    size_t pos = def.find(find_enum);
-                    if(pos != string::npos)
-                    {
-                        // We've now found the beginning of the attribute enum definition
-                        // Read and skip the '{' on the next line
-                        getline(infs,fileline);
-                        getline(infs,fileline);
-
-                        // We're just parsing the enum in order so values start
-                        // at 0 and increment by 1 after that unless they are
-                        // explicitly assigned.
-                        uint64_t value = 0;
-
-                        while(fileline[0] != '}')
-                        {
-                            istringstream attr_enum_stream(fileline);
-                            string attr_enum;
-                            string tmp;
-                         
-                            // Get the attribute enum name
-                            attr_enum_stream >> attr_enum;
-
-                            // Strip off the "," at the end.
-                            pos = attr_enum.find(',');
-                            if(pos != string::npos)
-                            {
-                                attr_enum = attr_enum.substr(0,attr_enum.length()-1);
-                            }
-                            else
-                            {
-                                // Is a value for the enum specified?
-                                attr_enum_stream >> tmp;
-
-                                if (!attr_enum_stream.eof())
-                                {
-                                    //Make sure it's an '='
-                                    if ("=" != tmp)
-                                    {
-                                        printf ("ERROR: Unknown attribute enum! %s\n",attr_enum.c_str());
-                                        exit(1);
-                                    }
-                                    else
-                                    {
-                                        attr_enum_stream >> tmp;
-                                        value = strtoull(tmp.c_str(), NULL, 0);
-                                    }
-                                }
-                            }
-
-                            //printf("Attribute Enum String:%s Value %u\n",attr_enum.c_str(), value);
-
-                            // Get a value for the string
-                            iv_attr_enum[attr_enum] = value;
-                            value++;
-                            getline(infs,fileline);
-                        }
-                    }
-                }
-            }
-            else if(def == "typedef")
-            {
-                 string type;
-                 string attribute_name;
-                 string find_type = "_Type";
-                 string find_array = "[";
-                 uint32_t array = 0;
-                 iss >> type;
-                 iss >> attribute_name;
-                 if(attribute_name == "*")
-                 {
-                     // It's a pointer type so read in the next string
-                     iss >> attribute_name;
-                     type = type + "*";
-                 }
-                 //printf("typedef: type:%s  attribute_name:%s\n",type.c_str(),attribute_name.c_str());
-
-                 // Determine how many (if any) dimensions this array has
-                 size_t pos = attribute_name.find(find_array);
-                 while(pos != string::npos)
-                 {
-                     array++;
-                     pos = attribute_name.find(find_array,pos+1);
-                 }
-
-                 // Now strip off the _type in the name
-                 pos = attribute_name.find(find_type);
-                 if(pos != string::npos)
-                 {
-                     attribute_name = attribute_name.substr(0,pos);
-                 }
-                 else
-                 {
-                     printf ("ERROR: Unknown attribute type! %s\n",attribute_name.c_str());
-                     exit(1);
-                 }
-
-                 iv_attr_type[attribute_name] = get_attr_type(type,array);
-                 //printf("Attribute %s Type  with array dimension %u for %s is %u\n",attribute_name.c_str(),array,
-                 //       type.c_str(),get_attr_type(type,array));
-            }
-        }
-        infs.close();
-    }
-    iv_rpn_map[Rpn::SYMBOL | INIT_EXPR_VAR] = RPN_DATA("EXPR",SYM_EXPR);
-    iv_rpn_map[Rpn::SYMBOL | INIT_ANY_LIT]  = RPN_DATA("ANY",CINI_LIT_MASK);
-}
-
-uint32_t Symbols::get_attr_type(const string &i_type, const uint32_t i_array)
-{
-    uint32_t l_type = 0;
-
-    if (i_type == "uint8_t")
-    {
-        l_type = SYM_ATTR_UINT8_TYPE;
-    }
-    else if(i_type == "uint32_t")
-    {
-        l_type = SYM_ATTR_UINT32_TYPE;   
-    }
-    else if(i_type == "uint64_t")
-    {
-        l_type = SYM_ATTR_UINT64_TYPE;
-    }
-    else
-    {
-        printf("Unknown data type: %s\n",i_type.c_str());
-        exit(-1);
-    }
-
-    if(i_array > MAX_ATTRIBUTE_ARRAY_DIMENSION)
-    {
-        printf("Array dimension size for %s %u exceeded maximum dimension of %u\n",
-               i_type.c_str(),i_array,MAX_ATTRIBUTE_ARRAY_DIMENSION);
-        exit(-1);
-    }
-    // See enum definition on why this works
-    l_type += (i_array*ATTR_DIMENSION_SIZE_MULT)+i_array;
-
-    return(l_type);
-}
-
-uint32_t Symbols::get_attr_type(const uint32_t i_rpn_id)
-{
-    string l_attr_name = find_name(i_rpn_id);
-    return(iv_attr_type[l_attr_name]);
-}
-
-// ------------------------------------------------------------------------------------------------
-
-uint32_t Symbols::use_symbol(string & i_symbol)
-{
-    uint32_t rpn_id = Rpn::SYMBOL | NOT_FOUND;
-    string l_symbol = i_symbol;
-
-    if(i_symbol == "ANY") rpn_id = INIT_ANY_LIT | Rpn::SYMBOL;
-    else if(i_symbol == "EXPR") rpn_id = INIT_EXPR_VAR | Rpn::SYMBOL;
-    else
-    {
-        SYMBOL_MAP::iterator i = iv_symbols.find(i_symbol);
-        if(i != iv_symbols.end())
-        {
-            if(i->second.second == NOT_USED)
-            {
-                rpn_id = Rpn::SYMBOL | iv_rpn_id++;
-                i->second.second = rpn_id;
-                iv_rpn_map[rpn_id] = RPN_DATA(i_symbol,i->second.first);
-
-                //printf ("Symbols::use_symbol: Just added %s symbol, rpn_id:0x%8X to iv_rpn_map\n",i_symbol.c_str(),rpn_id);
-
-                if(i->second.first & CINI_LIT_MASK)     ++iv_used_lit_count;
-                else                                    ++iv_used_var_count;
-            }
-            else
-            {
-                rpn_id = i->second.second;
-            }
-        }
-        else 
-        {
-            //Strip off any prefix (i.e. "SYS." or "TGT<#>.")
-            size_t pos = i_symbol.find('.');
-            if(pos != string::npos)
-            {
-                //Find the attribute without the prefix.
-                //If found, then add this system or assoc target attribute
-                //to our containers.
-                l_symbol = i_symbol.substr(pos+1);
-                SYMBOL_MAP::iterator i = iv_symbols.find(l_symbol);
-                if(i != iv_symbols.end())
-                {
-                    //Add the new attribute
-
-                    rpn_id = Rpn::SYMBOL | iv_rpn_id++;
-                    uint32_t attrId = iv_symbols[l_symbol].first;
-
-                    iv_rpn_map[rpn_id] = RPN_DATA(i_symbol,attrId);
-                    iv_symbols[i_symbol] = MAP_DATA(attrId, rpn_id);
-                    iv_attr_type[i_symbol] = iv_attr_type[l_symbol];
-
-                    ++iv_used_var_count;
-
-                    //printf ("Symbols::use_symbol: Just added %s symbol, rpn_id:0x%8X\n",i_symbol.c_str(),rpn_id);
-                }
-                else
-                {
-                    rpn_id = add_undefined(i_symbol);
-                }
-            }
-            else
-            {
-                rpn_id = add_undefined(i_symbol);
-            }
-        }
-    }
-
-    return rpn_id;
-}
-
-// ------------------------------------------------------------------------------------------------
-
-uint32_t Symbols::add_undefined(const string & i_symbol)
-{
-    uint32_t rpn_id = 0;
-
-    SYMBOL_MAP::iterator i = iv_not_found.find(i_symbol);
-    if(i != iv_not_found.end())
-    {
-        rpn_id = i->second.second;
-    }
-    else
-    {
-        rpn_id = Rpn::SYMBOL | iv_rpn_id++;
-        iv_not_found[i_symbol] = MAP_DATA(NOT_FOUND,rpn_id);
-        iv_rpn_map[rpn_id] = RPN_DATA(i_symbol,CINI_ID_NOT_FOUND);
-    }
-    return rpn_id;
-}
-
-// ------------------------------------------------------------------------------------------------
-
-uint16_t Symbols::get_tag(uint32_t i_rpn_id)
-{
-    uint16_t tag = NOT_FOUND;
-
-    // Set up tag table if not already setup
-    if(iv_used_var.size() == 0)
-    {
-        iv_used_var.reserve(iv_used_var_count); // makes if faster
-        iv_used_lit.reserve(iv_used_lit_count);
-
-        //To differentiate between system, target, and associated target attributes
-        //which have the same attribute id, save the attribute name also.
-        iv_used_var.push_back(RPN_DATA("EXPR",SYM_EXPR));                    // EXPR var always first
-        iv_used_lit.push_back(iv_rpn_map[Rpn::SYMBOL|INIT_ANY_LIT].second);  // ANY lit always first
-
-        for(SYMBOL_MAP::iterator i = iv_symbols.begin(); i != iv_symbols.end(); ++i)
-        {
-            if(i->second.second != NOT_USED)
-            {
-                //printf("Symbols::get_tag adding rpn_id[0x%x]\n", i->second.second);
-
-                if((i->second.first & CINI_LIT_MASK) ==  CINI_LIT_MASK)
-                {
-                    iv_used_lit.push_back(i->second.first);
-                    //printf("Symbols::get_tag added to iv_used_lit[0x%x]\n", iv_used_lit.back());
-                }
-                else  //VAR
-                {
-                    iv_used_var.push_back(RPN_DATA(i->first, i->second.first));
-                    //printf("Symbols::get_tag added to iv_used_var[%s, 0x%x]\n",
-                    //       iv_used_var.back().first.c_str(), iv_used_var.back().second);
-                }
-            }
-        }
-    }
-
-    do
-    {
-        string name = find_name(i_rpn_id);
-        if ("NOT_FOUND" == name)
-        {
-            //SYMBOL_MAP::iterator sm = iv_not_found.begin();
-            //for(; sm != iv_not_found.end(); ++sm)
-            //{
-            //    if((sm->second).second == i_rpn_id)
-            //    {
-            //        break;
-            //    }
-            //}
-
-            //if(sm == iv_not_found.end())
-            //{
-                ostringstream err;
-                err << hex;
-                err << "ERROR! Symbols::get_tag() bad arg rpn_id = " << i_rpn_id << endl;
-                throw invalid_argument(err.str());
-            //}
-            break;
-        }
-
-        uint32_t offset = 0;
-        for(VAR_SYMBOL_USED::iterator i = iv_used_var.begin(); i != iv_used_var.end(); ++i,++offset)
-        {
-            if (name == (*i).first)
-            {
-                if (name.compare(0, ASSOC_TGT_ATTR.length(), ASSOC_TGT_ATTR) == 0)
-                {
-                    tag = (uint16_t) (offset | IF_ASSOC_TGT_ATTR_TYPE);
-                }
-                else if (name.compare(0, SYS_ATTR.length(), SYS_ATTR) == 0)
-                {
-                    tag = (uint16_t) (offset | IF_SYS_ATTR_TYPE);
-                }
-                else
-                {
-                    tag = (uint16_t) (offset | IF_ATTR_TYPE);
-                }
-
-                //printf ("get tag: %s tag 0x%x\n", name.c_str(), tag);
-                break;
-            }
-        }
-        
-    } while(0);
-
-    return tag;
-}
-
-
-
-
-// ------------------------------------------------------------------------------------------------
-
-string Symbols::find_name(uint32_t i_rpn_id)
-{
-    string name;
-    RPN_MAP::iterator rm = iv_rpn_map.find(i_rpn_id);
-    if(rm != iv_rpn_map.end())
-    {
-        name = (rm->second).first;
-    }
-    else name = "NOT FOUND";
-    return name;
-}
-
-// ------------------------------------------------------------------------------------------------
-
-uint32_t Symbols::find_numeric_lit(uint64_t i_data, int32_t byte_size)
-{
-    uint32_t offset = 0;
-    LIT_LIST::iterator i = iv_lits.begin();
-    for(; i != iv_lits.end(); ++i,++offset)
-    {
-        if(i_data == i->first && (uint32_t)byte_size == i->second)
-            break;
-    }
-    if(i == iv_lits.end())
-    {
-        iv_lits.push_back(LIT_DATA(i_data,byte_size));
-    }
-    //printf("Symbols::find_numeric_lit: i_data:0x%llX byte_size:%d Tag:0x%X\n",
-    //      i_data,byte_size, offset | Rpn::NUMBER);
-    return offset | Rpn::NUMBER;
-}
-
-uint32_t Symbols::find_numeric_array_lit(uint64_t i_data, int32_t byte_size)
-{
-    uint32_t offset = 0;
-    LIT_LIST::iterator i = iv_lits.begin();
-    for(; i != iv_lits.end(); ++i,++offset)
-    {
-        if(i_data == i->first && (uint32_t)byte_size == i->second)
-            break;
-    }
-    if(i == iv_lits.end())
-    {
-        iv_lits.push_back(LIT_DATA(i_data,byte_size));
-    }
-    //printf("Symbols::find_numeric_lit: i_data:0x%llX byte_size:%d Tag:0x%X\n",
-    //      i_data,byte_size, offset | Rpn::NUMBER);
-    return offset | Rpn::ARRAY_INDEX;
-}
-
-// ------------------------------------------------------------------------------------------------
-
-uint16_t Symbols::get_numeric_tag(uint32_t i_rpn_id)
-{
-    uint32_t tag = NOT_FOUND;
-    uint32_t offset = i_rpn_id - Rpn::NUMBER;
-    string any("ANY");
-    if(iv_used_lit.size() == 0) get_tag(use_symbol(any));
-    if(offset < iv_lits.size())
-    {
-        // numeric lits are numbered after enum lits, but with different TYPE
-        tag = (iv_used_lit.size() + offset) | IF_NUM_TYPE;
-    }
-    else
-    {
-        ostringstream err;
-        err << hex;
-        err << "ERROR! - Symbols::get_numeric_tag() invalid arg rpn_id = " << i_rpn_id << endl;
-        throw invalid_argument(err.str());
-    }
-    return  (uint16_t)tag;
-}
-
-// ------------------------------------------------------------------------------------------------
-
-uint16_t Symbols::get_numeric_array_tag(uint32_t i_rpn_id)
-{
-    uint32_t tag = NOT_FOUND;
-    uint32_t offset = i_rpn_id - Rpn::ARRAY_INDEX;
-    string any("ANY");
-    if(iv_used_lit.size() == 0) get_tag(use_symbol(any));
-    if(offset < iv_lits.size())
-    {
-        // numeric lits are numbered after enum lits, but with different TYPE
-        tag = (iv_used_lit.size() + offset) | IF_NUM_TYPE;
-    }
-    else
-    {
-        ostringstream err;
-        err << hex;
-        err << "ERROR! - Symbols::get_numeric_array_tag() invalid arg rpn_id = " << i_rpn_id << endl;
-        throw invalid_argument(err.str());
-    }
-    return  (uint16_t)tag;
-}
-
-// ------------------------------------------------------------------------------------------------
-
-uint64_t Symbols::get_numeric_data(uint32_t i_rpn_id, uint32_t & o_size)
-{
-    uint64_t data = 0;
-    o_size = 0;
-    uint32_t offset = i_rpn_id - Rpn::NUMBER;
-    if(offset < iv_lits.size())
-    {
-        LIT_DATA d = iv_lits[offset];
-        data = d.first;
-        o_size = d.second;
-    }
-    else
-    {
-        ostringstream err;
-        err << hex;
-        err << "ERROR! - Symbols::get_numeric_data() invalid arg rpn_id = " << i_rpn_id << endl;
-        throw invalid_argument(err.str());
-    }
-    return data;
-}
-
-// ------------------------------------------------------------------------------------------------
-
-uint64_t Symbols::get_numeric_array_data(uint32_t i_rpn_id, uint32_t & o_size)
-{
-    uint64_t data = 0;
-    o_size = 0;
-    uint32_t offset = i_rpn_id - Rpn::ARRAY_INDEX;
-    if(offset < iv_lits.size())
-    {
-        LIT_DATA d = iv_lits[offset];
-        data = d.first;
-        o_size = d.second;
-    }
-    else
-    {
-        ostringstream err;
-        err << hex;
-        err << "ERROR! - Symbols::get_numeric_array_data() invalid arg rpn_id = " << i_rpn_id << endl;
-        throw invalid_argument(err.str());
-    }
-    return data;
-}
-
-// ------------------------------------------------------------------------------------------------
-uint64_t Symbols::get_attr_enum_val(string & i_attr_enum)
-{
-    return iv_attr_enum[i_attr_enum];
-}
-
-// ------------------------------------------------------------------------------------------------
-
-string Symbols::find_text(uint32_t i_cini_id)
-{
-    string name = "NOT FOUND";
-    if(i_cini_id == CINI_LIT_MASK) name = "ANY";
-    else if(i_cini_id == SYM_EXPR) name = "EXPR";
-    else
-    {
-        //NOTE:  if there are multiple elements of the same cini_id, then this function will return the
-        //first element found
-        for(SYMBOL_MAP::const_iterator i = iv_symbols.begin(); i != iv_symbols.end(); ++i)
-        {
-            //printf("SYMBOL:%s\n",i->first.c_str());
-            if((i->second).first == i_cini_id)
-            {
-                name = i->first;
-                break;
-            }
-        }
-//        for(RPN_MAP::iterator i = iv_rpn_map.begin(); i != iv_rpn_map.end(); ++i)
-//        {
-//            if((i->second).second == i_cini_id) 
-//            {
-//                name = (i->second).first;
-//                break;
-//            }
-//        }
-    }
-    return name;
-}
-
-
-// ------------------------------------------------------------------------------------------------
-
-uint32_t Symbols::get_spy_id(const string & spyname)
-{
-    uint32_t id = NOT_FOUND;
-    string s = spyname;
-    translate_spyname(s);
-    SPY_MAP::iterator sm = iv_spymap.find(s);
-    if(sm != iv_spymap.end())
-    {
-        id = sm->second;
-    }
-    else
-    {
-        size_t pos = s.find('-');
-        if(pos == string::npos) s.insert(0,"SPY_");
-        else
-        {
-            s[pos] = '_';
-            s.insert(pos+1,"SPY_");
-            s.insert(0,"ENUM_");
-        }
-        iv_not_found[s] = MAP_DATA(0,0);
-        //cerr << "ERROR! Symbols::get_spy_id() Spyname not found " << '[' << s << ']' << endl;
-    }
-    return id;
-}
-
-// ------------------------------------------------------------------------------------------------
-
-uint32_t Symbols::use_enum(const string & enumname)
-{
-    uint32_t rpn_id = NOT_FOUND;
-    string s = enumname;
-    translate_spyname(s);
-    SPY_MAP::iterator sm = iv_enums.find(s);
-    if(sm != iv_enums.end())
-    {
-        rpn_id = sm->second;
-    }
-    else
-    {
-        printf("Error!\n");
-        exit(0);
-    }
-    return rpn_id;
-}
-
-// ------------------------------------------------------------------------------------------------
-
-uint32_t Symbols::get_spy_enum_id(uint32_t i_rpn_id, const string & spyname)
-{
-    //uint32_t id = NOT_FOUND;
-    string enumname = get_enum_name(i_rpn_id);
-    enumname.append("-");
-    enumname.append(spyname);
-    return get_spy_id(enumname);
-}
-
-// ------------------------------------------------------------------------------------------------
-
-string Symbols::get_enum_name(uint32_t i_rpn_id)
-{
-    string name("SPY ENUM NOT FOUND");
-    for(SPY_MAP::iterator i = iv_enums.begin(); i != iv_enums.end(); ++i)
-    {
-        if(i->second == i_rpn_id)
-        {
-            name = i->first;
-            break;
-        }
-    }
-    return name;
-}
-
-// ------------------------------------------------------------------------------------------------
-
-string Symbols::full_listing()
-{
-    uint32_t count = 0;
-    ostringstream oss;
-    oss << hex << setfill('0');
-
-    for(SYMBOL_MAP::iterator i = iv_symbols.begin(); i != iv_symbols.end(); ++i)
-    {
-        if(i->second.first < CINI_LIT_MASK) //VAR
-        {
-            ++count;
-            oss << "0x" << setw(8) << i->second.first << '\t'
-                << '[' << i->first << ']' << endl;
-        }
-    }
-
-    ostringstream title;
-    title << "\n--------------- Attribute Symbol Table ---------------\n\n"
-          << "0x" << hex << setfill('0') << setw(8) << count << '\t' 
-          << "Number of variables\n" << oss.str();
-
-    oss.str("");
-    count = 0;
-
-    for(SYMBOL_MAP::iterator i = iv_symbols.begin(); i != iv_symbols.end(); ++i)
-    {
-        if((i->second.first & CINI_LIT_MASK) == CINI_LIT_MASK) //LIT
-        {
-            ++count;
-            oss << "0x" << setw(8) << i->second.first << '\t'
-                << '[' << i->first << ']' << endl;
-        }
-    }
-
-    title << "\n--------------- Literal Symbol Table -----------------\n\n"
-        << setw(8) << count << '\t' << "Number of enumerated literals\n"
-        << oss.str();
-    
-    oss.str("");
-    title << "\n-------------------- Spies and arrays ----------------------\n\n"
-          << "0x" << setw(8) << iv_spymap.size() << '\t' << "Number of spies and array symbols\n";
-
-    for(SPY_MAP::iterator i = iv_spymap.begin(); i != iv_spymap.end(); ++i)
-    {
-        oss << "0x" << setw(8) << i->second << '\t' << '[' << i->first << ']' << endl;
-    }
-
-    title << oss.str();
-
-    return title.str();
-}
-
-// ------------------------------------------------------------------------------------------------
-
-string Symbols::listing()
-{
-    uint32_t count = 0;
-    ostringstream oss;
-
-    // Set up tag table if not already setup
-    string any = "ANY";
-    get_tag(use_symbol(any));
-
-    oss << hex << setfill('0');
-
-    oss << "\n--------------- Attribute Symbol Table ---------------\n\n"
-        << "0x" << setw(4) << iv_used_var.size()-1 << '\t' << "Number of variables\n";
-
-    for(VAR_SYMBOL_USED::iterator i = iv_used_var.begin() + 1; i != iv_used_var.end(); ++i)
-    {
-        ++count;
-        uint32_t id = count;
-
-        string name = (*i).first;
-        uint32_t attrId = (*i).second;
-        if(name.compare(0, ASSOC_TGT_ATTR.length(), ASSOC_TGT_ATTR) == 0)
-        {
-            id |= IF_ASSOC_TGT_ATTR_TYPE;
-        }
-        else if(name.compare(0, SYS_ATTR.length(), SYS_ATTR) == 0)
-        {
-            id |= IF_SYS_ATTR_TYPE;
-        }
-        else
-        {
-            id |= IF_ATTR_TYPE;
-        }
-
-        oss << "Type:" << setw(2) << iv_attr_type[name] << " Value:0x" << setw(8) << attrId << '\t' << "ID 0X" << setw(4) << id
-            << '\t' << '[' << name << ']' << endl;
-
-        //printf("ATTRIBUTE: %s  Value:0x%02X\n",name,iv_attr_type[name]);
-    }
-
-    oss << "\n--------------- Literal Symbol Table -----------------\n\n";
-
-    oss << "\n0x" << setw(4) << iv_lits.size() << '\t' << "Number of numeric literals\n";
-
-    count = 0;
-    for(LIT_LIST::iterator i = iv_lits.begin(); i != iv_lits.end(); ++i,++count)
-    {
-        oss << "0x" << setw(2) << i->second << endl
-            << "0x" << setw(2 * i->second) << i->first;
-        if(i->second < 6)        oss << "\t\t";
-        else                    oss<< '\t';
-        oss << "ID 0x" << setw(4) << get_numeric_tag(count | Rpn::NUMBER) << endl;
-    }
-
-    oss << not_found_listing();
-
-    return oss.str();
-}
-
-// ------------------------------------------------------------------------------------------------
-
-string Symbols::attr_listing()
-{
-    ostringstream oss;
-
-    // Set up tag table if not already setup
-    string any = "ANY";
-    get_tag(use_symbol(any));
-
-    for(VAR_SYMBOL_USED::iterator i = iv_used_var.begin() + 1; i != iv_used_var.end(); ++i)
-    {
-        string name = (*i).first;
-
-        //Strip off any prefix (i.e. "SYS." or "TGT<#>.")
-        size_t pos = name.find('.');
-        if(pos != string::npos)
-        {
-            name = name.substr(pos+1);
-        }
-
-        oss << name << endl;
-    }
-
-    return oss.str();
-}
-
-// ------------------------------------------------------------------------------------------------
-
-string Symbols::not_found_listing()
-{
-    ostringstream oss;
-    if(iv_not_found.size())
-    {
-        oss << "\n------------- Symbols requested that were NOT FOUND ---------------\n\n";
-        for(SYMBOL_MAP::iterator i = iv_not_found.begin(); i != iv_not_found.end(); ++i)
-        {
-            //if(i->first == "SPY_NOTFOUND" || (i->first).compare(0,13,"ENUM_NOTFOUND") == 0) continue;
-            oss << '[' << i->first << ']' << endl;
-        }
-    }
-    return oss.str();
-}
-
-// ------------------------------------------------------------------------------------------------
-
-uint32_t Symbols::bin_vars(BINSEQ & blist)
-{
-    // Set up tag table if not already setup
-    string any = "ANY";
-    get_tag(use_symbol(any));
-
-    uint32_t count = iv_used_var.size() - 1; // first VAR is 'EXPR' and is not stored
-
-    Rpn::set16(blist,(uint16_t)count);
-
-    for(VAR_SYMBOL_USED::iterator i = iv_used_var.begin() + 1; i != iv_used_var.end(); ++i)
-    {
-        // Write out the attribute type (i.e. uint8_t, uint16_t, ...) and it's attribute id number
-
-        string name = (*i).first;
-        uint32_t attrId = (*i).second;
-
-        Rpn::set8(blist,iv_attr_type[name]);
-
-        Rpn::set32(blist,attrId);
-        //printf("Symbols::bin_vars: Just wrote out type:%u attrId:0x%x\n",iv_attr_type[name],attrId);
-    }
-    return count;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-uint32_t Symbols::bin_lits(BINSEQ & blist)
-{
-    // Set up tag table if not already setup
-    string any = "ANY";
-    get_tag(use_symbol(any));
-
-    uint32_t count = iv_lits.size();
-    uint32_t total = count;
-
-    Rpn::set16(blist,(uint16_t)count);
-
-    for(LIT_LIST::iterator i = iv_lits.begin(); i != iv_lits.end(); ++i)
-    {
-        uint32_t size = i->second;
-        uint64_t data = i->first;
-        blist.push_back( (uint8_t)size );
-        uint32_t shift_count = size * 8;
-        while(shift_count)
-        {
-            shift_count -= 8;
-            blist.push_back( (uint8_t)(data >> shift_count) );
-        }
-    }
-    total += count;
-
-    return total;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-uint32_t Symbols::restore_var_bseq(BINSEQ::const_iterator & bli)
-{
-    uint32_t count = Rpn::extract16(bli);
-
-    for(uint32_t i = 0; i < count; ++i)
-    {
-        uint8_t type = Rpn::extract8(bli);
-        uint32_t attrId = Rpn::extract32(bli);
-
-        string name = find_text(attrId);
-        string used_var_name = iv_used_var.at(i+1).first;
-
-        // Account for system & associated target attributes
-        if (name != used_var_name)
-        {
-            size_t pos = used_var_name.find(name);
-            if(pos != string::npos)
-            {
-                attrId = iv_symbols[used_var_name].first;
-
-            }
-            else
-            {
-                ostringstream errs;
-                errs << "ERROR! Symbols::restore_var_bseq().  Invalid attribute id ["
-                    << attrId << ']' << endl;
-                throw invalid_argument(errs.str());
-            }
-
-        }
-
-        iv_attr_type[used_var_name] = type;
-        iv_used_var.at(i+1).second = attrId;
-    }
-
-    return count;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-uint32_t Symbols::restore_lit_bseq(BINSEQ::const_iterator & bli)
-{
-    iv_used_lit.clear();
-    iv_used_lit.push_back(iv_rpn_map[Rpn::SYMBOL|INIT_ANY_LIT].second);  // ANY lit always first
-
-    iv_lits.clear();
-    uint32_t num_count = Rpn::extract16(bli);
-
-    for(uint32_t i = 0; i < num_count; ++i)
-    {
-        uint8_t size = *bli++;
-        uint64_t data = 0;
-        switch (size)
-        {
-            case 1: data = *bli++;  break;
-            case 2: data = Rpn::extract16(bli); break;
-            case 4: data = Rpn::extract32(bli); break;
-            case 8: data = Rpn::extract64(bli); break;
-            default:
-                    {
-                        ostringstream errs;
-                        errs << "ERROR! Symbols::restore_lit_bseq().  Invalid literal data size ["
-                            << size << ']' << endl;
-                        throw invalid_argument(errs.str());
-                    }
-                    break;
-        }
-
-        iv_lits.push_back( LIT_DATA(data, size) );
-    }
-
-    return num_count;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-string Symbols::get_spyname(uint32_t spy_id)
-{
-    string name;
-
-    for(SPY_MAP::const_iterator i = iv_spymap.begin(); i != iv_spymap.end(); ++i)
-    {
-        if (i->second == spy_id) 
-        {
-            name = i->first;
-            break;
-        }
-    }
-    if(name.length() == 0)
-    {
-        ostringstream oss;
-        oss << hex << setfill('0');
-        oss << "[0x" << setw(8) << spy_id << ']';
-        name = oss.str();
-    }
-    return name;
-}
-//-------------------------------------------------------------------------------------------------
-
-string Symbols::get_enumname(uint32_t spy_id)
-{
-    string name = get_spyname(spy_id);
-    size_t pos = name.find('-');
-    if(pos != string::npos)
-    {
-        name = name.substr(0,pos);
-    }
-    return name;
-}
-
-//-------------------------------------------------------------------------------------------------
-
-uint32_t Symbols::get_rpn_id(uint32_t bin_tag)
-{
-    uint32_t rpn_id = NOT_FOUND;
-    uint32_t type = bin_tag & IF_TYPE_MASK;
-    uint32_t offset = bin_tag & ~IF_TYPE_MASK;
-    switch(type)
-    {
-        case IF_ATTR_TYPE:
-        case IF_SYS_ATTR_TYPE:
-        case IF_ASSOC_TGT_ATTR_TYPE:
-                        {
-                            string name = iv_used_var[offset].first;
-                            rpn_id = use_symbol(name);
-                        }
-                        break;
-
-        case IF_NUM_TYPE:  {
-                            offset -= iv_used_lit.size();
-                            if(offset >= iv_lits.size())
-                            {
-                                ostringstream erros;
-                                erros << hex;
-                                erros << "ERROR! Symbols::get_rpn_id() Invalid NUM_TYPE 0x" 
-                                    << bin_tag;
-                                throw range_error(erros.str());
-                            }
-                            LIT_DATA d = iv_lits[offset];
-                            rpn_id = find_numeric_lit(d.first,d.second);
-                        }
-                        break;
-
-        default:
-                        {
-                            ostringstream erros;
-                            erros << hex
-                                  << "ERROR! Symbols::get_rpn_id()  Invalid bin_tag = 0x" 
-                                  << bin_tag << endl;
-                            throw range_error(erros.str());
-                        }
-                        break;
-    }
-    return rpn_id;
-}
-//-------------------------------------------------------------------------------------------------
-
-string Symbols::spies_are_in(Symbols & i_full_list, const set<string> & i_ignore_spies)
-{
-    ostringstream result;
-    result << hex;
-
-    for(SPY_MAP::iterator i = iv_spymap.begin(); i != iv_spymap.end(); ++i)
-    {
-        // enums in the reduced file will soon no longer contain the spyname as part of the enum name <enum name>-<spy name>
-        // At that time we will just need to check the enum part of the name  <enum name> in both the ignore file and the full list
-        //  When initfile processing AND spyhunter both use only enum names for enum spies then we can simplify all this
-        string spyname = i->first;
-        size_t pos = spyname.find('-');  // check for enum - if so just use the spy part of the name
-        if(pos != string::npos)
-        {
-            spyname = spyname.substr(pos+1);
-        }
-
-        if(i_ignore_spies.find(spyname) != i_ignore_spies.end()) //don't check this spy or any of it's enums
-        {
-            cout << "Will not check spy: " << i->first << endl;
-            continue;
-        }
-
-        uint32_t hash = 0;
-        if(pos != string::npos)  // old enum style name - check by hash - only check enumname
-        {
-            // just compare enum names based on hash
-            string enumname1 = (i->first).substr(0,pos);
-            string enumname2 = i_full_list.get_enumname(i->second);
-            if(enumname1 != enumname2)
-            {
-                result << "ERROR! Enum not found for spy " << i->first << '\n'
-                       << "       Enum: " << enumname1 << "!=" << enumname2 << endl;
-            }
-        }
-        else   // check spyname by name or new-style enum by name
-        {
-            hash = i_full_list.get_spy_id(i->first);
-            if(hash != NOT_FOUND)
-            {
-                if(hash != i->second)
-                {
-                    result << "ERROR! HASH not the same for spy " 
-                        << i->first << ' ' << hash << ' ' << i->second << endl;
-                }
-                // else cout << "Found " << i->first << ' ' << i->second << endl;
-            }
-        }
-    }
-    result << i_full_list.not_found_listing();
-    
-
-    return result.str();
-}
-
-
-
-
-
diff --git a/src/usr/hwpf/ifcompiler/initSymbols.H b/src/usr/hwpf/ifcompiler/initSymbols.H
deleted file mode 100755
index f1653f2d3..000000000
--- a/src/usr/hwpf/ifcompiler/initSymbols.H
+++ /dev/null
@@ -1,295 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/ifcompiler/initSymbols.H $                       */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#if !defined(INITSYMBOLS_H)
-#define INITSYMBOLS_H
-
-// Change Log *************************************************************************************
-//                                                                      
-//  Flag Track     Userid   Date     Description                
-//  ---- --------  -------- -------- -------------------------------------------------------------
-//       D754106   dgilbert 06/14/10 Create
-//                 andrewg  09/19/11 Updates based on review
-//                 camvanng 11/08/11 Added support for attribute enums
-//                 andrewg  11/09/11 Multi-dimensional array and move to common fapi include
-//                 mjjones  11/17/11 Output attribute listing
-//                 camvanng 11/17/11 Support for system & target attributes
-//                 camvanng 01/07/12 Support for writing an attribute to a SCOM register
-//                 camvanng 04/16/12 Support defines for SCOM address
-//                                   Support defines for bits, scom_data and attribute columns
-//                                   Delete obsolete code for defines support
-//                 camvanng 05/07/12 Support for associated target attributes
-//                 camvanng 06/27/12 Add get_numeric_array_data()
-// End Change Log *********************************************************************************
-// $Id: initSymbols.H,v 1.7 2014/06/30 20:28:09 thi Exp $
-/**
- * @file initSymbols.H
- * @brief Definition of the initSymbols class. Handles all symbols for initfiles
- */
-
-// Definitions:
-// cini_id is the 32 bit symbol tag value of a CINI initfile literal or variable as defined in ciniIfSymbols.H
-// rpn_id  is an internal representation used by the Rpn class for all numbers, symbols, Spy enums, etc. that is not an operator
-// bin_id  is the 16 bit tag used to represet number, symbols, enums, etc. in the compiled initfile.
-
-
-#include <stdint.h>
-#include <string>
-#include <vector>
-#include <map>
-#include <set>
-#include <initRpn.H>
-#include <fapiHwpInitFileInclude.H>  // Requires file from hwpf
-
-using namespace std;
-
-
-namespace init
-{
-    typedef set<string> FILELIST;
-    const string ASSOC_TGT_ATTR = "TGT";
-
-    class Symbols
-    {
-        public:
-
-            enum
-            {
-                CINI_LIT_MASK   = 0xA0000000,
-                INIT_ANY_LIT    = 0x07FFFFFE,
-                INIT_EXPR_VAR   = 0x07FFFFFF,
-            };
-
-
-
-            enum 
-            {
-                NOT_FOUND       = 0x00000000,
-                NOT_USED        = 0x00000000,
-                CINI_ID_NOT_FOUND = 0x80000000,
-            };
-
-            /**
-             * Build symbol map for list of files
-             * @param List of files to open to build Symbols
-             */
-            Symbols(FILELIST & i_filenames);
-
-            /**
-             * Add a Symbol to the "used" symbol table if not already there
-             * @param string Symbols name
-             * @returns Symbols Rpn id
-             * @post marks the id as 'USED'
-             *
-             */
-            uint32_t use_symbol(string & i_symbol);
-
-            /**
-             * Lookup the tag id from the rpn_id provided by use_symbol()
-             * @returns tag id
-             * @param rpn_id
-             * @pre  all the symbols have been marked used (no new symbols)
-             * @post tag table built if not already built.
-             * @note  tag bits 0btttxxxxx xxxxxxxx
-             *               ttt == 0b010 ->  Numeric constant
-             *               ttt == 0b100 ->  Target attribute
-             *               ttt == 0b101 ->  System attribute
-             *               ttt == 0b110 ->  Associated target attribute
-             *               xxxxx xxxxxxxx assigned tag offset
-             */
-            uint16_t get_tag(uint32_t i_rpn_id);
-
-            /**
-             * Find the symbol name associated with an rpn_id
-             * @param uint32_t rpn_id
-             * @returns string Symbol name | "" if not found
-             */
-            string find_name(uint32_t i_rpn_id);
-
-             /**
-             * Find the tag for the numeric lit
-             * @param data
-             * @param number of significant bytes in the data [1-8]
-             * @returns Rpn id
-             */
-            uint32_t find_numeric_lit(uint64_t i_data, int32_t byte_size);
-
-             /**
-             * Find the tag for the numeric array lit
-             * @param data
-             * @param number of significant bytes in the data [1-8]
-             * @returns Rpn id
-             */
-            uint32_t find_numeric_array_lit(uint64_t i_data, int32_t byte_size);
-
-            /**
-             * Convert a numeric literal Rpn tag to an initfile tag
-             * @param Rpn id returned by find_numeric_lit
-             * @return tag
-             * @pre Must not be called until find_numeric_lit() has been called for all numbers
-             *      in the initfile.
-             */
-            uint16_t get_numeric_tag(uint32_t i_rpn_id);
-
-            /**
-             * Convert a numeric array literal Rpn tag to an initfile tag
-             * @param Rpn id returned by find_numeric_lit
-             * @return tag
-             * @pre Must not be called until find_numeric_array_lit() has been called for all numbers
-             *      in the initfile.
-             */
-            uint16_t get_numeric_array_tag(uint32_t i_rpn_id);
-
-            /**
-             * Get the literal data value from the Rpn id returned by find_numeric_lit()
-             * @param uint32_t Rpn id
-             * @param uint32_t for returned byte size
-             * @returns uint64_t data
-             */
-            uint64_t get_numeric_data(uint32_t i_rpn_id, uint32_t & o_size);
-
-            /**
-             * Get the literal data value from the Rpn id returned by find_numeric_array_lit()
-             * @param uint32_t Rpn id
-             * @param uint32_t for returned byte size
-             * @returns uint64_t data
-             */
-            uint64_t get_numeric_array_data(uint32_t i_rpn_id, uint32_t & o_size);
-
-            /**
-             * Get the attribute enum value for the attr enum
-             * @param string attribute enum name
-             * @returns uint64_t value
-             */
-            uint64_t get_attr_enum_val(string & i_attr_enum);
-
-
-            /**
-             * Store enum name & return rpn_id
-             */
-            uint32_t use_enum(const string & enumname);
-            uint32_t get_spy_enum_id(uint32_t i_rpn_id, const string & spyname);
-            string get_enum_name(uint32_t i_rpn_id);
-
-            string get_enumname(uint32_t spy_id);
-            string get_spyname(uint32_t spy_id);
-
-            /**
-             * Return spy id
-             */
-            uint32_t get_spy_id(const string & spyname);
-
-
-            string listing();              ///< listing of used vars & lits
-            string attr_listing();         ///< listing of used HWPF attributes
-            uint32_t bin_vars(BINSEQ & blist);  ///< binary byte output of used vars. ret # vars
-            uint32_t bin_lits(BINSEQ & blist);  ///< binary byte sequence of used lits ret # lits
-
-            string full_listing();         ///< listing of all vars & lits (debug)
-            string not_found_listing();    ///< listing of all vars searched for, but not found
-
-            /**
-             * Get the rpn_id from an initfile binary tag
-             */
-            uint32_t get_rpn_id(uint32_t bin_tag);
-
-
-            /**
-             * Restore used symbol lists from binary sequence
-             * @returns number of symbols
-             */
-            uint32_t restore_var_bseq(BINSEQ::const_iterator & bli);
-            uint32_t restore_lit_bseq(BINSEQ::const_iterator & bli);
-
-            /**
-             * Test that all spies in this object are a subset of the object provided
-             * @param Symbols object to compare against
-             * @return string will all error messages. Empty string indicates success.
-             */
-            string spies_are_in(Symbols & i_full_list, const set<string> & i_ignore_spies);
-
-            static void translate_spyname(string & s)
-            { 
-                for(string::iterator i = s.begin(); i != s.end(); ++i)
-                    if((*i) == '.' || (*i) == '#' ||
-                       (*i) == '=' || (*i) == '&' ||
-                       (*i) == '<' || (*i) == '>' ||
-                       (*i) == '!' || (*i) == '*' ||
-                       (*i) == '/' || (*i) == '%' ||
-                       (*i) == '$')                      *i = '_';
-                    else *i = toupper(*i);
-            }
-
-            /**
-             * @brief Get the attribute type
-             * @param[in] i_rpn_id RPN id of the attribute
-             * @return uint32_t Attribute type
-             */
-            uint32_t get_attr_type(const uint32_t i_rpn_id);
-
-        private:  // functions
-
-            string find_text(uint32_t i_cini_id);
-            uint32_t add_undefined(const string & s);
-            uint32_t get_attr_type(const string &i_type, const uint32_t i_array);
-
-        private: //data
-
-            //   map | symbol name | (cini_id, usage flags) |
-            typedef pair<uint32_t,uint32_t> MAP_DATA; //cini_id & corresponding rpn_id/NOT_USED
-            typedef map<string,MAP_DATA > SYMBOL_MAP; //attr name & corresponding cini_id, rpn_id/NOT_USED pair
-            typedef map<string,uint32_t> SPY_MAP;
-            typedef map<string,uint32_t> SYMBOL_ATTR_TYPE; //attr name & corresponding type
-            typedef map<string,uint64_t> SYMBOL_ATTR_ENUM; //enum name & corresponding value
-
-            typedef pair<string,uint32_t>  RPN_DATA;  //attribute name & corresponding cini_id
-            typedef map<uint32_t,RPN_DATA> RPN_MAP;   //rpn_id & corresponding attr name, cini_id pair
-
-            typedef vector<RPN_DATA> VAR_SYMBOL_USED;
-            typedef vector<uint32_t>  SYMBOL_USED;
-
-            typedef pair<uint64_t,uint32_t> LIT_DATA; //numeric literal & corresponding size
-            typedef vector<LIT_DATA> LIT_LIST; ///< List of numeric literals and their size
-
-            SYMBOL_MAP  iv_symbols;     ///< From ciniIfSymbols.H all vars and enumerated lits
-            SYMBOL_ATTR_TYPE iv_attr_type; ///< List of attributes and their type
-            SYMBOL_ATTR_ENUM iv_attr_enum; ///< List of attribute enums and their value
-            SYMBOL_MAP  iv_not_found;   ///< List of symbols not found
-            RPN_MAP     iv_rpn_map;     ///< Map rpn_id to symbol name/cini_id of used Symbols
-            VAR_SYMBOL_USED iv_used_var; ///< List of used attributes and their ids ordered by name
-            SYMBOL_USED iv_used_lit;    ///< List of cini_ids of used enum lits ordered by name
-
-            LIT_LIST iv_lits;           ///< Numeric literals
-
-            SPY_MAP iv_spymap;          ///< Spies & arrays & enum spies
-            SPY_MAP iv_enums;           ///< Spy enums
-
-            uint32_t iv_used_var_count;
-            uint32_t iv_used_lit_count;
-            uint32_t iv_rpn_id;         ///< Current rpn offset assignment
-    };
-};
-
-
-#endif
diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile
deleted file mode 100644
index cb7cc6249..000000000
--- a/src/usr/hwpf/makefile
+++ /dev/null
@@ -1,450 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/makefile $
-#
-# OpenPOWER HostBoot Project
-#
-# Contributors Listed Below - COPYRIGHT 2011,2016
-# [+] International Business Machines Corp.
-#
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-ROOTPATH = ../../..
-SUBDIRS = fapi.d hwp.d plat.d test.d
-
-#------------------------------------------------------------------------------
-# This makefile controls the generation of HWPF files
-#------------------------------------------------------------------------------
-
-#------------------------------------------------------------------------------
-# Source XML files
-#------------------------------------------------------------------------------
-
-HWP_ERROR_XML_FILES += hwp/fapiHwpErrorInfo.xml
-HWP_ERROR_XML_FILES += hwp/dmi_training/proc_cen_framelock/proc_cen_framelock_errors.xml
-HWP_ERROR_XML_FILES += hwp/dimm_errors.xml
-HWP_ERROR_XML_FILES += hwp/chip_accessors/chip_errors.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/memory_errors.xml
-HWP_ERROR_XML_FILES += hwp/nest_chiplets/proc_start_clocks_chiplets/proc_start_clocks_chiplets_errors.xml
-HWP_ERROR_XML_FILES += hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml
-HWP_ERROR_XML_FILES += hwp/mvpd_accessors/mvpd_errors.xml
-HWP_ERROR_XML_FILES += hwp/spd_accessors/getSpdAttrAccessorErrors.xml
-HWP_ERROR_XML_FILES += hwp/winkle_ring_accessors/proc_l3_delta_data_errors.xml
-HWP_ERROR_XML_FILES += hwp/pll_accessors/getPllRingInfoAttrErrors.xml
-HWP_ERROR_XML_FILES += hwp/pll_accessors/getPllRingAttrErrors.xml
-HWP_ERROR_XML_FILES += ../pore/fapiporeve/fapiPoreVe_errors.xml
-HWP_ERROR_XML_FILES += hwp/dram_initialization/proc_setup_bars/proc_setup_bars_errors.xml
-HWP_ERROR_XML_FILES += hwp/build_winkle_images/p8_slw_build/p8_slw_build_errors.xml
-HWP_ERROR_XML_FILES += hwp/build_winkle_images/p8_slw_build/p8_xip_customize_errors.xml
-HWP_ERROR_XML_FILES += hwp/build_winkle_images/p8_slw_build/p8_pba_bar_config_errors.xml
-HWP_ERROR_XML_FILES += hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup_errors.xml
-HWP_ERROR_XML_FILES += hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle_errors.xml
-HWP_ERROR_XML_FILES += hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer_errors.xml
-HWP_ERROR_XML_FILES += hwp/activate_powerbus/proc_build_smp/proc_build_smp_errors.xml
-HWP_ERROR_XML_FILES += hwp/activate_powerbus/proc_build_smp/proc_adu_utils_errors.xml
-HWP_ERROR_XML_FILES += hwp/nest_chiplets/proc_pcie_slot_power/proc_pcie_slot_power_errors.xml
-HWP_ERROR_XML_FILES += hwp/thread_activate/proc_thread_control/proc_thread_control.xml
-HWP_ERROR_XML_FILES += hwp/bus_training/erepair_errors.xml
-HWP_ERROR_XML_FILES += hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_errors.xml
-HWP_ERROR_XML_FILES += hwp/dram_initialization/proc_pcie_config/proc_pcie_config_errors.xml
-HWP_ERROR_XML_FILES += hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar_errors.xml
-HWP_ERROR_XML_FILES += hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup_errors.xml
-HWP_ERROR_XML_FILES += hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_errors.xml
-HWP_ERROR_XML_FILES += hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml
-HWP_ERROR_XML_FILES += hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc_errors.xml
-HWP_ERROR_XML_FILES += hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_read_seeprom_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_registers.xml
-HWP_ERROR_XML_FILES += hwp/runtime_errors/p8_ocb_init_errors.xml
-HWP_ERROR_XML_FILES += hwp/runtime_errors/p8_occ_control_errors.xml
-HWP_ERROR_XML_FILES += hwp/runtime_errors/p8_occ_sram_init_errors.xml
-HWP_ERROR_XML_FILES += hwp/runtime_errors/p8_oha_init_errors.xml
-HWP_ERROR_XML_FILES += hwp/runtime_errors/p8_pcbs_init_errors.xml
-HWP_ERROR_XML_FILES += hwp/runtime_errors/p8_pm_prep_for_reset_errors.xml
-HWP_ERROR_XML_FILES += hwp/runtime_errors/p8_force_vsafe_errors.xml
-HWP_ERROR_XML_FILES += hwp/runtime_errors/p8_pmc_errors.xml
-HWP_ERROR_XML_FILES += hwp/runtime_errors/p8_pss_errors.xml
-HWP_ERROR_XML_FILES += hwp/runtime_errors/proc_cpu_special_wakeup_errors.xml
-HWP_ERROR_XML_FILES += hwp/runtime_errors/p8_poregpe_errors.xml
-HWP_ERROR_XML_FILES += hwp/runtime_errors/p8_pba_init_errors.xml
-HWP_ERROR_XML_FILES += hwp/runtime_errors/proc_ocb_indir_access_errors.xml
-HWP_ERROR_XML_FILES += hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup_errors.xml
-HWP_ERROR_XML_FILES += hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init_errors.xml
-HWP_ERROR_XML_FILES += hwp/poreve_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_fab_iovalid_errors.xml
-HWP_ERROR_XML_FILES += hwp/dmi_training/proc_dmi_scominit_errors.xml
-HWP_ERROR_XML_FILES += hwp/dmi_training/cen_dmi_scominit_errors.xml
-HWP_ERROR_XML_FILES += hwp/sbe_centaur_init/cen_xip_customize_errors.xml
-HWP_ERROR_XML_FILES += hwp/tod_init/proc_tod_utils/proc_tod_utils.xml
-HWP_ERROR_XML_FILES += hwp/pstates/pstates/p8_build_pstate_datablock_errors.xml
-HWP_ERROR_XML_FILES += hwp/pstates/pstates/proc_get_voltage_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_cfam_registers.xml
-HWP_ERROR_XML_FILES += hwp/p8_slw_registers.xml
-HWP_ERROR_XML_FILES += hwp/utility_procedures/memory_mss_maint_cmds.xml
-HWP_ERROR_XML_FILES += hwp/utility_procedures/proc_mpipl_force_winkle_errors.xml
-
-HWP_ERROR_XML_FILES += hwp/dram_training/memory_mss_funcs.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/mss_draminit_training/memory_mss_draminit_training.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/mss_ddr_phy_reset/memory_mss_ddr_phy_reset.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/memory_mss_termination_control.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/mem_startclocks/memory_cen_stopclocks.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/mss_scominit/memory_mss_scominit.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/mss_draminit_trainadv/memory_mss_mcbist_common.xml
-HWP_ERROR_XML_FILES += hwp/dram_initialization/proc_setup_bars/memory_mss_setup_bars.xml
-HWP_ERROR_XML_FILES += hwp/dmi_training/mss_getecid/memory_mss_get_cen_ecid.xml
-HWP_ERROR_XML_FILES += hwp/dram_initialization/mss_extent_setup/memory_mss_extent_setup.xml
-HWP_ERROR_XML_FILES += hwp/dram_initialization/mss_thermal_init/memory_mss_thermal_init.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/mss_draminit/memory_mss_draminit.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/mss_draminit_mc/memory_mss_draminit_mc.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/mss_draminit_trainadv/memory_mss_access_delay_reg.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/mss_draminit_trainadv/memory_mss_draminit_training_advanced.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/mss_draminit_trainadv/memory_mss_mss_ddr4_pda_errors.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/mss_draminit_trainadv/memory_mss_generic_shmoo.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/mss_draminit_trainadv/memory_mss_mcbist.xml
-HWP_ERROR_XML_FILES += hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr_errors.xml
-HWP_ERROR_XML_FILES += hwp/build_winkle_images/proc_mailbox_utils/p8_mailbox_utils_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_otprom_registers.xml
-HWP_ERROR_XML_FILES += hwp/runtime_errors/p8_gpe_registers.xml
-HWP_ERROR_XML_FILES += hwp/runtime_errors/p8_pss_registers.xml
-HWP_ERROR_XML_FILES += hwp/proc_hwreconfig/proc_enable_reconfig/proc_enable_reconfig_errors.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/mem_startclocks/cen_mem_startclocks_errors.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/mem_pll_setup/cen_mem_pll_initf_errors.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/mem_pll_setup/cen_mem_pll_setup_errors.xml
-HWP_ERROR_XML_FILES += hwp/core_activate/proc_check_slw_done/proc_check_slw_done_errors.xml
-HWP_ERROR_XML_FILES += hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync_errors.xml
-HWP_ERROR_XML_FILES += hwp/dram_initialization/mss_power_cleanup/memory_mss_power_cleanup.xml
-HWP_ERROR_XML_FILES += hwp/runtime_errors/p8_pstate_registers.xml
-HWP_ERROR_XML_FILES += hwp/nest_chiplets/proc_a_x_pci_dmi_pll_registers.xml
-HWP_ERROR_XML_FILES += hwp/dram_training/mss_lrdimm_funcs/memory_mss_lrdimm_funcs.xml
-HWP_ERROR_XML_FILES += hwp/bus_training/gcr_funcs_errors.xml
-HWP_ERROR_XML_FILES += hwp/bus_training/io_run_training_errors.xml
-HWP_ERROR_XML_FILES += hwp/bus_training/io_funcs_errors.xml
-HWP_ERROR_XML_FILES += hwp/bus_training/io_dccal_errors.xml
-HWP_ERROR_XML_FILES += hwp/bus_training/io_power_down_lanes_errors.xml
-HWP_ERROR_XML_FILES += hwp/bus_training/io_read_erepair_errors.xml
-HWP_ERROR_XML_FILES += hwp/bus_training/io_fir_isolation_errors.xml
-HWP_ERROR_XML_FILES += hwp/bus_training/io_restore_erepair_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_pibmem_registers.xml
-HWP_ERROR_XML_FILES += hwp/proc_clock_control_registers.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_sbe_check_master_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_sbe_chiplet_init_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_sbe_decompress_scan_halt_codes.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_sbe_ex_dpll_setup_halt_codes.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_sbe_ex_startclocks_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_sbe_fabricinit_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_sbe_instruct_start_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_sbe_lco_loader_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_sbe_npll_setup_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_sbe_pb_startclocks.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_sbe_pibmem_loader_halt_codes.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_sbe_scominit_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_sbe_select_ex_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_sbe_setup_evid_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_sbe_tp_switch_gears_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_sbe_trigger_winkle_errors.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/proc_slw_base_halt_codes.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/sbe_common_halt_codes.xml
-HWP_ERROR_XML_FILES += hwp/proc_sbe_errors/sbe_load_ring_vec_ex_errors.xml
-HWP_ERROR_XML_FILES += hwp/slave_sbe/proc_tp_collect_dbg_data/proc_tp_collect_dbg_data.xml
-HWP_ERROR_XML_FILES += hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_engine_state_errors.xml
-HWP_ERROR_XML_FILES += hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_base_ffdc.xml
-HWP_ERROR_XML_FILES += hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_halt_ffdc.xml
-HWP_ERROR_XML_FILES += hwp/proc_pba_utils_registers.xml
-HWP_ERROR_XML_FILES += hwp/p8_fir_registers.xml
-HWP_ERROR_XML_FILES += hwp/cen_fir_registers.xml
-HWP_ERROR_XML_FILES += hwp/tp_dbg_data_accessors/proc_tp_dbg_data_errors.xml
-HWP_ERROR_XML_FILES += hwp/secure_boot/proc_sbe_scan_service_errors.xml
-HWP_ERROR_XML_FILES += hwp/secure_boot/proc_stop_sbe_scan_service_errors.xml
-
-#------------------------------------------------------------------------------
-# PLL Ring Data files
-#------------------------------------------------------------------------------
-HWP_PLL_FILES += hwp/pll_attributes/s1_10_pll_ring.attributes
-HWP_PLL_FILES += hwp/pll_attributes/s1_13_pll_ring.attributes
-HWP_PLL_FILES += hwp/pll_attributes/s1_20_pll_ring.attributes
-HWP_PLL_FILES += hwp/pll_attributes/s1_21_pll_ring.attributes
-HWP_PLL_FILES += hwp/pll_attributes/p8_10_pll_ring.attributes
-HWP_PLL_FILES += hwp/pll_attributes/p8_20_pll_ring.attributes
-HWP_PLL_FILES += hwp/pll_attributes/n1_10_pll_ring.attributes
-HWP_PLL_FILES += hwp/pll_attributes/centaur_10_pll_ring.attributes
-HWP_PLL_FILES += hwp/pll_attributes/centaur_20_pll_ring.attributes
-HWP_PLL_FILES += hwp/pll_attributes/centaur_21_pll_ring.attributes
-
-#------------------------------------------------------------------------------
-# Winkle Ring data files
-#------------------------------------------------------------------------------
-HWP_WINKLE_RING_FILES += hwp/winkle_ring_accessors/s1_10_winkle_ring.attributes
-HWP_WINKLE_RING_FILES += hwp/winkle_ring_accessors/s1_13_winkle_ring.attributes
-HWP_WINKLE_RING_FILES += hwp/winkle_ring_accessors/s1_20_winkle_ring.attributes
-HWP_WINKLE_RING_FILES += hwp/winkle_ring_accessors/s1_21_winkle_ring.attributes
-HWP_WINKLE_RING_FILES += hwp/winkle_ring_accessors/p8_10_winkle_ring.attributes
-HWP_WINKLE_RING_FILES += hwp/winkle_ring_accessors/p8_20_winkle_ring.attributes
-HWP_WINKLE_RING_FILES += hwp/winkle_ring_accessors/n1_10_winkle_ring.attributes
-
-#------------------------------------------------------------------------------
-# Tp_dbg Spy data files
-#------------------------------------------------------------------------------
-HWP_TP_DBG_SPY_FILES += hwp/tp_dbg_attributes/s1_10_tp_dbg_data.attributes
-HWP_TP_DBG_SPY_FILES += hwp/tp_dbg_attributes/s1_13_tp_dbg_data.attributes
-HWP_TP_DBG_SPY_FILES += hwp/tp_dbg_attributes/s1_20_tp_dbg_data.attributes
-HWP_TP_DBG_SPY_FILES += hwp/tp_dbg_attributes/s1_21_tp_dbg_data.attributes
-HWP_TP_DBG_SPY_FILES += hwp/tp_dbg_attributes/p8_10_tp_dbg_data.attributes
-HWP_TP_DBG_SPY_FILES += hwp/tp_dbg_attributes/n1_10_tp_dbg_data.attributes
-
-#------------------------------------------------------------------------------
-# Initfiles
-#------------------------------------------------------------------------------
-HWP_INITFILES += hwp/initfiles/sample.initfile
-HWP_INITFILES += hwp/initfiles/cen.dmi.scom.initfile
-HWP_INITFILES += hwp/initfiles/p8.dmi.scom.initfile
-HWP_INITFILES += hwp/initfiles/mbs_def.initfile
-HWP_INITFILES += hwp/initfiles/mba_def.initfile
-HWP_INITFILES += hwp/initfiles/cen_ddrphy.initfile
-HWP_INITFILES += hwp/initfiles/p8.fbc.scom.initfile
-HWP_INITFILES += hwp/initfiles/p8.pe.phase1.scom.initfile
-HWP_INITFILES += hwp/initfiles/p8.pe.phase2.scom.initfile
-HWP_INITFILES += hwp/initfiles/p8.abus.scom.initfile
-HWP_INITFILES += hwp/initfiles/p8.xbus.scom.initfile
-HWP_INITFILES += hwp/initfiles/p8.mcs.scom.initfile
-HWP_INITFILES += hwp/initfiles/p8.as.scom.initfile
-HWP_INITFILES += hwp/initfiles/p8.nx.scom.initfile
-HWP_INITFILES += hwp/initfiles/p8.dmi.custom.scom.initfile
-HWP_INITFILES += hwp/initfiles/cen.dmi.custom.scom.initfile
-HWP_INITFILES += hwp/initfiles/p8.abus.custom.scom.initfile
-HWP_INITFILES += hwp/initfiles/p8.xbus.custom.scom.initfile
-HWP_INITFILES += hwp/initfiles/p8.psi.scom.initfile
-HWP_INITFILES += hwp/initfiles/p8.tpbridge.scom.initfile
-HWP_INITFILES += hwp/initfiles/p8.cxa.scom.initfile
-HWP_INITFILES += hwp/initfiles/p8.a_x_pci_dmi_fir.scom.initfile
-HWP_INITFILES += hwp/initfiles/p8.npu.scom.initfile
-
-HWP_IF_DEFINE_DIR = hwp/initfiles
-
-#------------------------------------------------------------------------------
-# Generated files
-#------------------------------------------------------------------------------
-
-# Initfile compiler files
-IF_CMP_SUBDIR = hwp_ifcompiler
-
-IF_CMP_YACC_C_TARGET = $(IF_CMP_SUBDIR)/ifcompiler.y.tab.c
-IF_CMP_YACC_H_TARGET = $(IF_CMP_SUBDIR)/ifcompiler.y.tab.h
-IF_CMP_FLEX_TARGET = $(IF_CMP_SUBDIR)/ifcompiler.lex.yy.c
-IF_CMP_COMPILER_TARGET = ifcompiler
-
-IF_COMPILER_C_FILES += ifcompiler/initCompiler.C
-IF_COMPILER_C_FILES += ifcompiler/initRpn.C
-IF_COMPILER_C_FILES += ifcompiler/initScom.C
-IF_COMPILER_C_FILES += ifcompiler/initSymbols.C
-
-IF_COMPILER_H_FILES += ifcompiler/initCompiler.H
-IF_COMPILER_H_FILES += ifcompiler/initRpn.H
-IF_COMPILER_H_FILES += ifcompiler/initScom.H
-IF_COMPILER_H_FILES += ifcompiler/initSymbols.H
-
-IF_COMPILER_O_FILES = $(addprefix $(GENDIR)/$(IF_CMP_SUBDIR)/, \
-			    $(call notdir, $(IF_COMPILER_C_FILES:.C=.host.o)) \
-			    $(call notdir, $(IF_CMP_YACC_C_TARGET:.c=.host.o)) \
-			    $(call notdir, $(IF_CMP_FLEX_TARGET:.c=.host.o)) \
-		      )
-
-CLEAN_TARGETS += $(IF_COMPILER_O_FILES)
-
-# The FAPI files generated from Error XML files
-FAPI_ERROR_TARGETS += fapiHwpReturnCodes.H
-FAPI_ERROR_TARGETS += fapiHwpErrorInfo.H
-FAPI_ERROR_TARGETS += fapiCollectRegFfdc.C
-FAPI_ERROR_TARGETS += fapiSetSbeError.H
-
-# The PLAT HWP Error Parser file generated from Error XML files
-PLAT_HWP_ERR_PARSER = fapiPlatHwpErrParser.H
-
-# The FAPI attribute id file generated from Attribute XML files
-FAPI_ATTR_ID_TARGET = fapiAttributeIds.H
-
-# The FAPI PLL attribute header file generated from data files
-FAPI_PLL_TARGET = fapiPllRingAttr.H
-
-# The FAPI Winkle Ring attribute header file generated from data files
-FAPI_WINKLE_RING_TARGET = fapiL3DeltaDataAttr.H
-
-# The FAPI tp_dbg spy attribute header file generated from data files
-FAPI_TP_DBG_SPY_TARGET = fapiTpDbgDataAttr.H
-
-# The FAPI files generated from Attribute XML files
-FAPI_ATTR_TARGETS += fapiChipEcFeature.C
-FAPI_ATTR_TARGETS += fapiAttributePlatCheck.H
-FAPI_ATTR_TARGETS += fapiAttributesSupported.html
-FAPI_ATTR_TARGETS += fapiAttrInfo.csv
-FAPI_ATTR_TARGETS += fapiAttrEnumInfo.csv
-
-# The binary, list and attr files generated from Initfiles
-# Generation depends on ifcompiler and fapiAttributeIds.H
-HWP_IF_NAMES = $(notdir ${HWP_INITFILES})
-HWP_IF_BASENAMES = $(basename ${HWP_IF_NAMES})
-HWP_IF_BIN_TARGETS = $(addsuffix .if, ${HWP_IF_BASENAMES})
-HWP_IF_LST_TARGETS = $(addsuffix .if.list.bz2, ${HWP_IF_BASENAMES})
-HWP_IF_ATT_TARGETS = $(addsuffix .if.attr, ${HWP_IF_BASENAMES})
-HWP_IF_ALL_TARGETS += ${HWP_IF_BIN_TARGETS}
-HWP_IF_ALL_TARGETS += ${HWP_IF_LST_TARGETS}
-HWP_IF_ALL_TARGETS += ${HWP_IF_ATT_TARGETS}
-
-# The FAPI Initfile attribute service
-# Generation depends on the Initfile <name>.if.attr files
-FAPI_ATTR_IF_TARGET = fapiAttributeService.C
-
-GENFILES += ${IF_CMP_YACC_C_TARGET}
-GENFILES += ${IF_CMP_YACC_H_TARGET}
-GENFILES += ${IF_CMP_FLEX_TARGET}
-GENFILES += ${IF_CMP_COMPILER_TARGET}
-GENFILES += ${FAPI_ERROR_TARGETS}
-GENFILES += ${FAPI_ATTR_ID_TARGET}
-GENFILES += ${FAPI_ATTR_TARGETS}
-GENFILES += ${HWP_IF_ALL_TARGETS}
-GENFILES += ${FAPI_ATTR_IF_TARGET}
-GENFILES += ${FAPI_PLL_TARGET}
-GENFILES += ${FAPI_WINKLE_RING_TARGET}
-GENFILES += ${FAPI_TP_DBG_SPY_TARGET}
-
-GENFILES_PLUGINS = ${PLAT_HWP_ERR_PARSER}
-
-EXTRA_PARTS = $(addprefix ${ROOTPATH}/img/,${HWP_IF_BIN_TARGETS})
-GEN_PASS_PRE += make_ifcompiler_dir
-
-include ${ROOTPATH}/config.mk
-
-#------------------------------------------------------------------------------
-# The Initfile compiler
-#------------------------------------------------------------------------------
-make_ifcompiler_dir:
-	@mkdir -p $(GENDIR)/$(IF_CMP_SUBDIR)
-
-$(call GENTARGET, ${IF_CMP_YACC_C_TARGET}) : \
-        ifcompiler/initCompiler.y
-	$(C2) "    YACC       $(notdir $<)"
-	$(C1)yacc -d -o ${GENDIR}/${IF_CMP_YACC_C_TARGET} $^
-
-$(call GENTARGET, ${IF_CMP_YACC_H_TARGET}) : \
-    $(call GENTARGET, ${IF_CMP_YACC_C_TARGET}) ifcompiler/initCompiler.y
-
-$(call GENTARGET, ${IF_CMP_FLEX_TARGET}) : \
-        ifcompiler/initCompiler.lex
-	$(C2) "    FLEX       $(notdir $<)"
-	$(C1)flex -o$@ $^
-
-$(GENDIR)/$(IF_CMP_SUBDIR)/%.host.o: \
-	    ifcompiler/%.C $(IF_COMPILER_H_FILES) \
-	    $(GENDIR)/$(IF_CMP_YACC_H_TARGET)
-	$(C2) "    CXX        $(notdir $<)"
-	$(C1)$(CCACHE) $(HOST_PREFIX)g++ -O3 $< -I ifcompiler -I $(GENDIR) \
-			-I $(GENDIR)/$(IF_CMP_SUBDIR) \
-			-I $(ROOTPATH)/src/include/usr/hwpf/hwp -c -o $@
-
-$(GENDIR)/$(IF_CMP_YACC_C_TARGET:.c=.host.o): \
-    $(GENDIR)/$(IF_CMP_YACC_C_TARGET) $(IF_COMPILER_H_FILES)
-	$(C2) "    CXX        $(notdir $<)"
-	$(C1)$(CCACHE) $(HOST_PREFIX)g++ -O3 $< -I ifcompiler -I $(GENDIR) \
-			-I $(GENDIR)/$(IF_CMP_SUBDIR) \
-			-I $(ROOTPATH)/src/include/usr/hwpf/hwp -c -o $@
-
-$(GENDIR)/$(IF_CMP_FLEX_TARGET:.c=.host.o): \
-    $(GENDIR)/$(IF_CMP_FLEX_TARGET) $(IF_COMPILER_H_FILES) \
-    $(GENDIR)/$(IF_CMP_YACC_H_TARGET)
-	$(C2) "    CXX        $(notdir $<)"
-	$(C1)$(CCACHE) $(HOST_PREFIX)g++ -O3 -DHOSTBOOT_COMPILE $< -I ifcompiler -I $(GENDIR) \
-			-I $(GENDIR)/$(IF_CMP_SUBDIR) \
-			-I $(ROOTPATH)/src/include/usr/hwpf/hwp -c -o $@
-
-$(call GENTARGET, ${IF_CMP_COMPILER_TARGET}) : $(IF_COMPILER_O_FILES)
-	$(C2) "    CXX        $(notdir $<)"
-	$(C1)$(HOST_PREFIX)g++ -O3 $^ -o $@
-
-#------------------------------------------------------------------------------
-# The FAPI return code and error info files generated from Error XML files
-#------------------------------------------------------------------------------
-$(call GENTARGET, ${FAPI_ERROR_TARGETS}) : \
-        fapi/fapiParseErrorInfo.pl ${HWP_ERROR_XML_FILES}
-	$< $(dir $@) ${HWP_ERROR_XML_FILES}
-
-#------------------------------------------------------------------------------
-# The PLAT HWP RC and FFDC parser file generated from Error XML files
-#------------------------------------------------------------------------------
-$(call GENPLUGINTARGET, ${PLAT_HWP_ERR_PARSER}) : \
-        plat/fapiPlatCreateHwpErrParser.pl ${HWP_ERROR_XML_FILES}
-	$< $(dir $@) ${HWP_ERROR_XML_FILES}
-
-#------------------------------------------------------------------------------
-# The FAPI attribute id file, the FAPI attribute platform check file and the
-# FAPI attributes supported file generated from Attribute XML files
-#------------------------------------------------------------------------------
-$(call GENTARGET, ${FAPI_ATTR_ID_TARGET} ${FAPI_ATTR_TARGETS}) : \
-        fapi/fapiParseAttributeInfo.pl ${HWP_ATTR_XML_FILES}
-	$< $(dir $@) ${HWP_ATTR_XML_FILES}
-
-#------------------------------------------------------------------------------
-# The PLL attribute file
-#------------------------------------------------------------------------------
-$(call GENTARGET, ${FAPI_PLL_TARGET}) : \
-        fapi/fapiCreatePllRingAttrVals.pl ${HWP_PLL_FILES}
-	$< $(dir $@) ${HWP_PLL_FILES}
-
-#------------------------------------------------------------------------------
-# The Winkle Ring attribute file
-#------------------------------------------------------------------------------
-$(call GENTARGET, ${FAPI_WINKLE_RING_TARGET}) : \
-        fapi/fapiCreateL3DeltaVals.pl ${HWP_WINKLE_RING_FILES}
-	$< $(dir $@) ${HWP_WINKLE_RING_FILES}
-
-#------------------------------------------------------------------------------
-# The tp_dbg spy attribute file
-#------------------------------------------------------------------------------
-$(call GENTARGET, ${FAPI_TP_DBG_SPY_TARGET}) : \
-	fapi/fapiCreateTpDbgAttrVals.pl ${HWP_TP_DBG_SPY_FILES}
-	$< $(dir $@) ${HWP_TP_DBG_SPY_FILES}
-
-#------------------------------------------------------------------------------
-# The binary, list and attr files generated from Initfiles
-#------------------------------------------------------------------------------
-define HWP_IF_RECIPE
-$${GENDIR}/$(basename $(notdir $1)).if :\
-	$${GENDIR}/$${IF_CMP_COMPILER_TARGET} \
-	$${GENDIR}/$${FAPI_ATTR_ID_TARGET} \
-	$${HWP_IF_DEFINE_DIR} $1
-	    $$(JAILCMD) \
-	        $$< -init $1 -outdir $$(dir $$@) \
-                    -attr $${GENDIR}/$${FAPI_ATTR_ID_TARGET} \
-                    -I $${HWP_IF_DEFINE_DIR}
-	@rm -f $${GENDIR}/$(basename $(notdir $1)).if.list.bz2
-	@bzip2 $${GENDIR}/$(basename $(notdir $1)).if.list
-
-$${GENDIR}/$(basename $(notdir $1)).if.list.bz2: \
-    $${GENDIR}/$(basename $(notdir $1)).if
-$${GENDIR}/$(basename $(notdir $1)).if.attr: \
-    $${GENDIR}/$(basename $(notdir $1)).if
-endef
-$(foreach initfile,${HWP_INITFILES}, \
-	$(eval $(call HWP_IF_RECIPE,$(initfile))))
-
-${EXTRA_PARTS}: ${IMGDIR}/% : ${GENDIR}/%
-	cp -f $< $@
-
-#------------------------------------------------------------------------------
-# The FAPI Initfile attribute service
-#------------------------------------------------------------------------------
-$(call GENTARGET, ${FAPI_ATTR_IF_TARGET}) : \
-        fapi/fapiCreateIfAttrService.pl ${HWP_ATTR_XML_FILES} \
-        $(addprefix ${GENDIR}/, $(HWP_IF_ATT_TARGETS))
-	$< $(dir $@) $(addprefix ${GENDIR}/, $(HWP_IF_ATT_TARGETS)) -a ${HWP_ATTR_XML_FILES}
-
diff --git a/src/usr/hwpf/plat/HBconfig b/src/usr/hwpf/plat/HBconfig
deleted file mode 100644
index 2d9d4ba6c..000000000
--- a/src/usr/hwpf/plat/HBconfig
+++ /dev/null
@@ -1,4 +0,0 @@
-config VPD_GETMACRO_USE_EFF_ATTR
-    default y if !HAVE_MBVPD
-    help
-        Use EFF attribute in VPD GETMACRO
diff --git a/src/usr/hwpf/plat/fapiPlatAttrOverrideSync.C b/src/usr/hwpf/plat/fapiPlatAttrOverrideSync.C
deleted file mode 100644
index 66bbbda1f..000000000
--- a/src/usr/hwpf/plat/fapiPlatAttrOverrideSync.C
+++ /dev/null
@@ -1,631 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/plat/fapiPlatAttrOverrideSync.C $                */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/**
- *  @file fapiPlatAttrOverrideSync.C
- *
- *  @brief Implements the functions for Attribute Override and Sync
- *
- */
-
-//******************************************************************************
-// Includes
-//******************************************************************************
-#include <limits.h>
-#include <sys/msg.h>
-#include <string.h>
-#include <vector>
-#include <sys/msg.h>
-#include <errl/errlentry.H>
-#include <errl/errlmanager.H>
-#include <mbox/mboxif.H>
-#include <hwpf/plat/fapiPlatAttrOverrideSync.H>
-#include <hwpf/plat/fapiPlatTrace.H>
-#include <isteps/hwpf_reasoncodes.H>
-#include <targeting/common/utilFilter.H>
-#include <targeting/common/attributeTank.H>
-
-namespace fapi
-{
-
-//******************************************************************************
-// Global Variables
-//******************************************************************************
-
-#ifndef __HOSTBOOT_RUNTIME
-// Set by a debug tool to directly apply an Attribute Override
-TARGETING::AttributeTank::AttributeHeader g_attrOverrideHeader;
-uint8_t g_attrOverride[AttrOverrideSync::MAX_DIRECT_OVERRIDE_ATTR_SIZE_BYTES];
-uint8_t g_attrOverrideFapiTank = 0;
-#endif
-
-//******************************************************************************
-// Apply a HWPF Attribute Override written directly into Hostboot memory from
-// the Simics/VBU console. This function is called by a Simics/VBU debug tool
-//******************************************************************************
-void directOverride()
-{
-#ifndef __HOSTBOOT_RUNTIME
-    // Apply the attribute override
-    if (g_attrOverrideFapiTank)
-    {
-        FAPI_IMP("directOverride: Applying override to FAPI tank "
-            "Id: 0x%08x, TargType: 0x%08x, Pos: 0x%04x, UPos: 0x%02x",
-            g_attrOverrideHeader.iv_attrId, g_attrOverrideHeader.iv_targetType,
-            g_attrOverrideHeader.iv_pos, g_attrOverrideHeader.iv_unitPos);
-        FAPI_IMP("directOverride: Applying override to FAPI tank "
-            "Node: 0x%02x, Flags: 0x%02x, Size: 0x%08x",
-            g_attrOverrideHeader.iv_node, g_attrOverrideHeader.iv_flags,
-            g_attrOverrideHeader.iv_valSize);
-
-        theAttrOverrideSync().iv_overrideTank.setAttribute(
-            g_attrOverrideHeader.iv_attrId,
-            g_attrOverrideHeader.iv_targetType,
-            g_attrOverrideHeader.iv_pos,
-            g_attrOverrideHeader.iv_unitPos,
-            g_attrOverrideHeader.iv_node,
-            g_attrOverrideHeader.iv_flags,
-            g_attrOverrideHeader.iv_valSize,
-            &g_attrOverride);
-    }
-    else
-    {
-        // Convert the FAPI targeting type to TARGETING
-        TARGETING::TYPE l_targetType = TARGETING::TYPE_SYS;
-
-        switch (g_attrOverrideHeader.iv_targetType)
-        {
-            case fapi::TARGET_TYPE_DIMM:
-                l_targetType = TARGETING::TYPE_DIMM;
-                break;
-            case fapi::TARGET_TYPE_PROC_CHIP:
-                l_targetType = TARGETING::TYPE_PROC;
-                break;
-            case fapi::TARGET_TYPE_MEMBUF_CHIP:
-                l_targetType = TARGETING::TYPE_MEMBUF;
-                break;
-            case fapi::TARGET_TYPE_EX_CHIPLET:
-                l_targetType = TARGETING::TYPE_EX;
-                break;
-            case fapi::TARGET_TYPE_MBA_CHIPLET:
-                l_targetType = TARGETING::TYPE_MBA;
-                break;
-            case fapi::TARGET_TYPE_MCS_CHIPLET:
-                l_targetType = TARGETING::TYPE_MCS;
-                break;
-            case fapi::TARGET_TYPE_XBUS_ENDPOINT:
-                l_targetType = TARGETING::TYPE_XBUS;
-                break;
-            case fapi::TARGET_TYPE_ABUS_ENDPOINT:
-                l_targetType = TARGETING::TYPE_ABUS;
-                break;
-            case fapi::TARGET_TYPE_L4:
-                l_targetType = TARGETING::TYPE_L4;
-                break;
-        }
-
-        FAPI_IMP("directOverride: Applying override to TARG tank "
-            "Id: 0x%08x, TargType: 0x%08x, Pos: 0x%04x, UPos: 0x%02x",
-            g_attrOverrideHeader.iv_attrId, l_targetType,
-            g_attrOverrideHeader.iv_pos, g_attrOverrideHeader.iv_unitPos);
-        FAPI_IMP("directOverride: Applying override to TARG tank "
-            "Node: 0x%02x, Flags: 0x%02x, Size: 0x%08x",
-            g_attrOverrideHeader.iv_node, g_attrOverrideHeader.iv_flags,
-            g_attrOverrideHeader.iv_valSize);
-
-        TARGETING::Target::theTargOverrideAttrTank().setAttribute(
-            g_attrOverrideHeader.iv_attrId,
-            l_targetType,
-            g_attrOverrideHeader.iv_pos,
-            g_attrOverrideHeader.iv_unitPos,
-            g_attrOverrideHeader.iv_node,
-            g_attrOverrideHeader.iv_flags,
-            g_attrOverrideHeader.iv_valSize,
-            &g_attrOverride);
-    }
-#endif
-}
-
-//******************************************************************************
-AttrOverrideSync & theAttrOverrideSync()
-{
-    return Singleton<AttrOverrideSync>::instance();
-}
-
-//******************************************************************************
-AttrOverrideSync::AttrOverrideSync() {}
-
-//******************************************************************************
-AttrOverrideSync::~AttrOverrideSync() {}
-
-//******************************************************************************
-void AttrOverrideSync::monitorForFspMessages()
-{
-#ifndef __HOSTBOOT_RUNTIME
-    FAPI_IMP("monitorForFspMessages starting");
-
-    // Register a message queue with the mailbox
-    msg_q_t l_pMsgQ = msg_q_create();
-    errlHndl_t l_pErr = MBOX::msgq_register(MBOX::HB_HWPF_ATTR_MSGQ, l_pMsgQ);
-
-    if (l_pErr)
-    {
-        // In the unlikely event that registering fails, the code will commit an
-        // error and then wait forever for a message to appear on the queue
-        FAPI_ERR("monitorForFspMessages: Error registering msgq with mailbox");
-        errlCommit(l_pErr, HWPF_COMP_ID);
-    }
-
-    while (1)
-    {
-        msg_t * l_pMsg = msg_wait(l_pMsgQ);
-
-        if (l_pMsg->type == MSG_SET_OVERRIDES)
-        {
-            // FSP is setting attribute override(s).
-            uint64_t l_tank = l_pMsg->data[0];
-            TARGETING::AttributeTank::AttributeSerializedChunk l_chunk;
-            l_chunk.iv_size = l_pMsg->data[1];
-            l_chunk.iv_pAttributes = static_cast<uint8_t *>(l_pMsg->extra_data);
-
-            if (l_chunk.iv_pAttributes == NULL)
-            {
-                FAPI_ERR("monitorForFspMessages: tank %d, size %d, NULL data pointer",
-                         l_tank, l_chunk.iv_size);
-                /*@
-                 * @errortype
-                 * @moduleid     fapi::MOD_ATTR_OVERRIDE
-                 * @reasoncode   fapi::RC_NULL_POINTER
-                 * @userdata1    Attribute Tank (FAPI/TARG)
-                 * @userdata2    Size of attribute overrides
-                 * @devdesc      Override message received from HWSV
-                 *               contains NULL data pointer
-                 */
-                 const bool hbSwError = false;
-                 errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                    ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                    fapi::MOD_ATTR_OVERRIDE,
-                    fapi::RC_NULL_POINTER,
-                    l_tank, l_chunk.iv_size, hbSwError);
-                 l_pError->addProcedureCallout(HWAS::EPUB_PRC_SP_CODE,
-                                               HWAS::SRCI_PRIORITY_HIGH);
-                 errlCommit(l_pError, HWPF_COMP_ID);
-            }
-            else if (l_tank == TARGETING::AttributeTank::TANK_LAYER_FAPI)
-            {
-                FAPI_INF(
-                    "monitorForFspMessages: MSG_SET_OVERRIDES FAPI (size %lld)",
-                    l_pMsg->data[1]);
-                iv_overrideTank.deserializeAttributes(l_chunk);
-            }
-            else
-            {
-                FAPI_INF(
-                    "monitorForFspMessages: MSG_SET_OVERRIDES TARG (size %lld)",
-                    l_pMsg->data[1]);
-                TARGETING::Target::theTargOverrideAttrTank().
-                    deserializeAttributes(l_chunk);
-            }
-
-            // Free the memory
-            free(l_pMsg->extra_data);
-            l_pMsg->extra_data = NULL;
-            l_pMsg->data[0] = 0;
-            l_pMsg->data[1] = 0;
-
-            if (msg_is_async(l_pMsg))
-            {
-                msg_free(l_pMsg);
-            }
-            else
-            {
-                // Send the message back as a response
-                msg_respond(l_pMsgQ, l_pMsg);
-            }
-        }
-        else if (l_pMsg->type == MSG_CLEAR_ALL_OVERRIDES)
-        {
-            // FSP is clearing all attribute overrides.
-            FAPI_INF("monitorForFspMessages: MSG_CLEAR_ALL_OVERRIDES");
-            iv_overrideTank.clearAllAttributes();
-            TARGETING::Target::theTargOverrideAttrTank().clearAllAttributes();
-
-            if (msg_is_async(l_pMsg))
-            {
-                msg_free(l_pMsg);
-            }
-            else
-            {
-                // Send the message back as a response
-                msg_respond(l_pMsgQ, l_pMsg);
-            }
-        }
-        else
-        {
-            FAPI_ERR("monitorForFspMessages: Unrecognized message 0x%x",
-                     l_pMsg->type);
-            free(l_pMsg->extra_data);
-            l_pMsg->extra_data = NULL;
-            msg_free(l_pMsg);
-        }
-    }
-#endif
-}
-
-//******************************************************************************
-errlHndl_t AttrOverrideSync::sendAttrsToFsp(
-    const MAILBOX_MSG_TYPE i_msgType,
-    const TARGETING::AttributeTank::TankLayer i_tankLayer,
-    std::vector<TARGETING::AttributeTank::AttributeSerializedChunk> &
-        io_attributes)
-{
-    errlHndl_t l_pErr = NULL;
-
-#ifndef __HOSTBOOT_RUNTIME
-    std::vector<TARGETING::AttributeTank::AttributeSerializedChunk>::iterator
-        l_itr;
-
-    // Send Attributes through the mailbox chunk by chunk.
-    for (l_itr = io_attributes.begin(); l_itr != io_attributes.end(); ++l_itr)
-    {
-        msg_t * l_pMsg = msg_allocate();
-        l_pMsg->type = i_msgType;
-        l_pMsg->data[0] = i_tankLayer;
-        l_pMsg->data[1] = (*l_itr).iv_size;
-        l_pMsg->extra_data = (*l_itr).iv_pAttributes;
-
-        // Send the message and wait for a response, the response message is not
-        // read, it just ensures that the code waits until the FSP is done
-        // Note: A possible performance boost could be to send only the last
-        //       message synchronously to avoid the small delay between each
-        //       message
-        l_pErr = MBOX::sendrecv(MBOX::FSP_HWPF_ATTR_MSGQ, l_pMsg);
-
-        if (l_pErr)
-        {
-            FAPI_ERR("sendAttrsToFsp: Error sending to FSP");
-            msg_free(l_pMsg);
-            l_pMsg = NULL;
-            break;
-        }
-
-        // Mailbox freed the chunk data
-        (*l_itr).iv_pAttributes = NULL;
-        msg_free(l_pMsg);
-        l_pMsg = NULL;
-    }
-
-    // Free any memory (only in error case will there be memory to free) and
-    // clear the vector of Attribute Chunks
-    for (l_itr = io_attributes.begin(); l_itr != io_attributes.end(); ++l_itr)
-    {
-        free((*l_itr).iv_pAttributes);
-        (*l_itr).iv_pAttributes = NULL;
-    }
-    io_attributes.clear();
-#endif
-
-    return l_pErr;
-}
-
-//******************************************************************************
-void AttrOverrideSync::sendAttrOverridesAndSyncsToFsp()
-{
-#ifndef __HOSTBOOT_RUNTIME
-    const uint32_t MAILBOX_CHUNK_SIZE = 4096;
-
-    if (MBOX::mailbox_enabled())
-    {
-        errlHndl_t l_pErr = NULL;
-
-        // Non-const overrides may have been cleared by being written to.
-        // Therefore, clear the FSP Attribute Overrides for this node and
-        // send the current set of overrides to the FSP for this node
-
-        // Clear all current FSP Attribute Overrides for this node
-        msg_t * l_pMsg = msg_allocate();
-        l_pMsg->type = MSG_CLEAR_ALL_OVERRIDES;
-        l_pMsg->data[0] = 0;
-        l_pMsg->data[1] = 0;
-        l_pMsg->extra_data = NULL;
-
-        // Send the message
-        l_pErr = MBOX::send(MBOX::FSP_HWPF_ATTR_MSGQ, l_pMsg);
-
-        if (l_pErr)
-        {
-            FAPI_ERR(
-                "sendAttrOverridesAndSyncsToFsp: Error clearing overrides");
-            errlCommit(l_pErr, HWPF_COMP_ID);
-            msg_free(l_pMsg);
-            l_pMsg = NULL;
-        }
-        else
-        {
-            l_pMsg = NULL;
-
-            // Send Hostboot Attribute Overrides to the FSP
-            for (uint32_t i = TARGETING::AttributeTank::TANK_LAYER_FAPI;
-                 i <= TARGETING::AttributeTank::TANK_LAYER_TARG; i++)
-            {
-                std::vector<TARGETING::AttributeTank::AttributeSerializedChunk>
-                    l_attributes;
-
-                // Note that NODE_FILTER_NOT_ALL_NODES retrieves all overrides
-                // that are not for all nodes - i.e. overrides for this node.
-                // The FSP already has all overrides for all nodes.
-                if (i == TARGETING::AttributeTank::TANK_LAYER_FAPI)
-                {
-                    iv_overrideTank.serializeAttributes(
-                        TARGETING::AttributeTank::ALLOC_TYPE_MALLOC,
-                        MAILBOX_CHUNK_SIZE, l_attributes,
-                        TARGETING::AttributeTank::NODE_FILTER_NOT_ALL_NODES);
-                }
-                else
-                {
-                    TARGETING::Target::theTargOverrideAttrTank().
-                        serializeAttributes(
-                            TARGETING::AttributeTank::ALLOC_TYPE_MALLOC,
-                            MAILBOX_CHUNK_SIZE, l_attributes,
-                            TARGETING::AttributeTank::
-                                NODE_FILTER_NOT_ALL_NODES);
-                }
-
-                if (l_attributes.size())
-                {
-                    l_pErr = sendAttrsToFsp(MSG_SET_OVERRIDES,
-                        static_cast<TARGETING::AttributeTank::TankLayer>(i),
-                        l_attributes);
-
-                    if (l_pErr)
-                    {
-                        FAPI_ERR(
-                            "sendAttrOverridesAndSyncsToFsp: Error sending overrides (%d)",
-                            i);
-                        errlCommit(l_pErr, HWPF_COMP_ID);
-                        break;
-                    }
-                }
-            }
-
-            // Send Hostboot Attributes to Sync to the FSP
-            for (uint32_t i = TARGETING::AttributeTank::TANK_LAYER_FAPI;
-                 i <= TARGETING::AttributeTank::TANK_LAYER_TARG; i++)
-            {
-                std::vector<TARGETING::AttributeTank::AttributeSerializedChunk>
-                    l_attributes;
-
-                if (i == TARGETING::AttributeTank::TANK_LAYER_FAPI)
-                {
-                    iv_syncTank.serializeAttributes(
-                        TARGETING::AttributeTank::ALLOC_TYPE_MALLOC,
-                        MAILBOX_CHUNK_SIZE, l_attributes);
-                }
-                else
-                {
-                    TARGETING::Target::theTargSyncAttrTank().
-                        serializeAttributes(
-                            TARGETING::AttributeTank::ALLOC_TYPE_MALLOC,
-                            MAILBOX_CHUNK_SIZE, l_attributes);
-                }
-
-                if (l_attributes.size())
-                {
-                    l_pErr = sendAttrsToFsp(MSG_SET_SYNC_ATTS,
-                        static_cast<TARGETING::AttributeTank::TankLayer>(i),
-                        l_attributes);
-
-                    if (l_pErr)
-                    {
-                        FAPI_ERR(
-                            "sendAttrOverridesAndSyncsToFsp: Error sending syncs (%d)",
-                            i);
-                        errlCommit(l_pErr, HWPF_COMP_ID);
-                        break;
-                    }
-                    else
-                    {
-                        // Clear Sync tank
-                        if (i == TARGETING::AttributeTank::TANK_LAYER_FAPI)
-                        {
-                            iv_syncTank.clearAllAttributes();
-                        }
-                        else
-                        {
-                            TARGETING::Target::theTargSyncAttrTank().
-                                clearAllAttributes();
-                        }
-                    }
-                }
-            }
-        }
-    }
-#endif
-}
-
-//******************************************************************************
-void AttrOverrideSync::getAttrOverridesFromFsp()
-{
-#ifndef __HOSTBOOT_RUNTIME
-    FAPI_IMP("Requesting Attribute Overrides from the FSP");
-
-    errlHndl_t l_pErr = NULL;
-
-    msg_t * l_pMsg = msg_allocate();
-    l_pMsg->type = MSG_GET_OVERRIDES;
-    l_pMsg->data[0] = 0;
-    l_pMsg->data[1] = 0;
-    l_pMsg->extra_data = NULL;
-
-    // Send the message and wait for a response, the response message is not
-    // read, it just ensures that the code waits until the FSP is done sending
-    // attribute overrides
-    l_pErr = MBOX::sendrecv(MBOX::FSP_HWPF_ATTR_MSGQ, l_pMsg);
-
-    if (l_pErr)
-    {
-        FAPI_ERR("getAttrOverridesFromFsp: Error sending to FSP");
-        errlCommit(l_pErr, HWPF_COMP_ID);
-    }
-
-    msg_free(l_pMsg);
-    l_pMsg = NULL;
-#endif
-}
-
-//******************************************************************************
-bool AttrOverrideSync::getAttrOverride(const fapi::AttributeId i_attrId,
-                                       const fapi::Target * const i_pTarget,
-                                       void * o_pVal) const
-{
-    // Very fast check to see if there are any overrides at all
-    if (!(iv_overrideTank.attributesExist()))
-    {
-        return false;
-    }
-
-    // Check to see if there are any overrides for this attr ID
-    if (!(iv_overrideTank.attributeExists(i_attrId)))
-    {
-        return false;
-    }
-
-    // Do the work of figuring out the target's type/position/node and find out
-    // if there is an override for this target
-    uint32_t l_targetType = getTargetType(i_pTarget);
-
-    // Get the Target pointer
-    TARGETING::Target * l_pTarget =
-        reinterpret_cast<TARGETING::Target*>(i_pTarget->get());
-    uint16_t l_pos = 0;
-    uint8_t l_unitPos = 0;
-    uint8_t l_node = 0;
-    l_pTarget->getAttrTankTargetPosData(l_pos, l_unitPos, l_node);
-
-    FAPI_INF("getAttrOverride: Checking for override for ID: 0x%08x, "
-             "TargType: 0x%08x, Pos/Upos/Node: 0x%08x",
-             i_attrId, l_targetType,
-             (static_cast<uint32_t>(l_pos) << 16) +
-             (static_cast<uint32_t>(l_unitPos) << 8) + l_node);
-
-    bool l_override = iv_overrideTank.getAttribute(i_attrId, l_targetType,
-        l_pos, l_unitPos, l_node, o_pVal);
-
-    if (l_override)
-    {
-        FAPI_INF("getAttrOverride: Returning Override for ID: 0x%08x",
-                 i_attrId);
-    }
-
-    return l_override;
-}
-
-//******************************************************************************
-bool AttrOverrideSync::getAttrOverrideFunc(const fapi::AttributeId i_attrId,
-                                           const fapi::Target * const i_pTarget,
-                                           void * o_pVal)
-{
-    return Singleton<AttrOverrideSync>::instance().getAttrOverride(i_attrId,
-        i_pTarget, o_pVal);
-}
-
-
-//******************************************************************************
-void AttrOverrideSync::setAttrActions(const fapi::AttributeId i_attrId,
-                                      const fapi::Target * const i_pTarget,
-                                      const uint32_t i_size,
-                                      const void * i_pVal)
-{
-    // Figure out if effort should be expended figuring out the target's type/
-    // position in order to clear any non-const attribute overrides and/or to
-    // store the attribute for syncing to Cronus
-
-    bool l_clearAnyNonConstOverride = false;
-
-    // Very fast check to see if there are any overrides at all for this Attr ID
-    if (iv_overrideTank.attributesExist())
-    {
-        // Fast check to see if there are any overrides for this attr ID
-        if (iv_overrideTank.attributeExists(i_attrId))
-        {
-            l_clearAnyNonConstOverride = true;
-        }
-    }
-
-    bool l_syncAttribute = TARGETING::AttributeTank::syncEnabled();
-
-    if (l_clearAnyNonConstOverride || l_syncAttribute)
-    {
-        uint32_t l_targetType = getTargetType(i_pTarget);
-
-        // Get the Target pointer
-        TARGETING::Target * l_pTarget =
-            reinterpret_cast<TARGETING::Target*>(i_pTarget->get());
-        uint16_t l_pos = 0;
-        uint8_t l_unitPos = 0;
-        uint8_t l_node = 0;
-        l_pTarget->getAttrTankTargetPosData(l_pos, l_unitPos, l_node);
-
-        if (l_clearAnyNonConstOverride)
-        {
-            // Clear any non const override for this attribute because the
-            // attribute is being written
-            iv_overrideTank.clearNonConstAttribute(i_attrId, l_targetType,
-                l_pos, l_unitPos, l_node);
-        }
-
-        if (l_syncAttribute)
-        {
-            // Write the attribute to the SyncAttributeTank to sync to Cronus
-            iv_syncTank.setAttribute(i_attrId, l_targetType, l_pos, l_unitPos,
-                l_node, 0, i_size, i_pVal);
-        }
-    }
-}
-
-//******************************************************************************
-void AttrOverrideSync::setAttrActionsFunc(const fapi::AttributeId i_attrId,
-                                          const fapi::Target * const i_pTarget,
-                                          const uint32_t i_size,
-                                          const void * i_pVal)
-{
-    Singleton<AttrOverrideSync>::instance().setAttrActions(i_attrId, i_pTarget,
-        i_size, i_pVal);
-}
-
-
-//******************************************************************************
-uint32_t AttrOverrideSync::getTargetType(const fapi::Target * const i_pTarget)
-{
-    uint32_t l_targetType = fapi::TARGET_TYPE_SYSTEM;
-
-    if (i_pTarget != NULL)
-    {
-        l_targetType = i_pTarget->getType();
-    }
-
-    return l_targetType;
-}
-
-} // End fapi namespace
diff --git a/src/usr/hwpf/plat/fapiPlatAttributeService.C b/src/usr/hwpf/plat/fapiPlatAttributeService.C
deleted file mode 100644
index 1d693e896..000000000
--- a/src/usr/hwpf/plat/fapiPlatAttributeService.C
+++ /dev/null
@@ -1,2142 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/plat/fapiPlatAttributeService.C $                */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/**
- *  @file fapiPlatAttributeService.C
- *
- *  @brief Implements the functions that access attributes
- *
- */
-
-//******************************************************************************
-// Includes
-//******************************************************************************
-
-#include <hwpf/fapi/fapiTarget.H>
-#include <hwpf/fapi/fapiHwpExecutor.H>
-#include <targeting/common/targetservice.H>
-#include <targeting/common/predicates/predicatectm.H>
-#include <targeting/common/utilFilter.H>
-#include <errl/errlentry.H>
-#include <hwpf/plat/fapiPlatAttributeService.H>
-#include <isteps/hwpf_reasoncodes.H>
-#include <vpd/spdenums.H>
-#include <devicefw/driverif.H>
-#include <hwpf/hwp/mvpd_accessors/getMvpdExL2SingleMemberEnable.H>
-#include <hwpf/hwp/mvpd_accessors/getMBvpdSlopeInterceptData.H>
-#include <hwpf/hwp/mvpd_accessors/getMBvpdSpareDramData.H>
-#include <hwpf/hwp/mvpd_accessors/getMBvpdVersion.H>
-#include <hwpf/hwp/mvpd_accessors/getMBvpdMemoryDataVersion.H>
-#include <hwpf/hwp/mvpd_accessors/getMBvpdSPDXRecordVersion.H>
-#include <hwpf/hwp/mvpd_accessors/getMBvpdVoltageSettingData.H>
-#include <hwpf/hwp/mvpd_accessors/getMBvpdDram2NModeEnabled.H>
-#include <hwpf/hwp/mvpd_accessors/getMBvpdSensorMap.H>
-#include <hwpf/hwp/mvpd_accessors/getMBvpdAttr.H>
-#include <hwpf/hwp/mvpd_accessors/accessMBvpdL4BankDelete.H>
-#include <hwpf/hwp/chip_accessors/getTdpRdpCurrentFactor.H>
-#include <hwpf/hwp/chip_accessors/getPciOscswitchConfig.H>
-#include <hwpf/hwp/chip_accessors/getOscswitchCtlAttr.H>
-#include <fapiPllRingAttr.H>
-#include <hwpf/hwp/pll_accessors/getPllRingAttr.H>
-#include <hwpf/hwp/pll_accessors/getPllRingInfoAttr.H>
-#include <hwpf/hwp/winkle_ring_accessors/getL3DeltaDataAttr.H>
-#include <hwpf/hwp/tp_dbg_data_accessors/getTpDbgDataAttr.H>
-#include <fapiAttributeIds.H>
-#include <hwas/common/hwasCommon.H>
-#include <proc_setup_bars_defs.H>
-
-// The following file checks at compile time that all HWPF attributes are
-// handled by Hostboot. This is done to ensure that the HTML file listing
-// supported HWPF attributes lists attributes handled by Hostboot
-#include <fapiAttributePlatCheck.H>
-
-
-//******************************************************************************
-// Implementation
-//******************************************************************************
-
-namespace fapi
-{
-
-namespace platAttrSvc
-{
-
-//******************************************************************************
-// fapi::platAttrSvc::getTargetingTarget
-//******************************************************************************
-fapi::ReturnCode getTargetingTarget(
-    const fapi::Target* i_pFapiTarget,
-    TARGETING::Target* & o_pTarget,
-    const TARGETING::TYPE i_expectedType = TARGETING::TYPE_NA)
-{
-    fapi::ReturnCode l_rc;
-
-    if (i_pFapiTarget == NULL)
-    {
-        TARGETING::targetService().getTopLevelTarget(o_pTarget);
-    }
-    else
-    {
-        o_pTarget = reinterpret_cast<TARGETING::Target*>(i_pFapiTarget->get());
-    }
-
-    if (o_pTarget == NULL)
-    {
-        // FAPI Target contained a NULL Targ handle or no top level target!
-        FAPI_ERR("getTargetingTarget. NULL Targ Target");
-
-        /*@
-         *  @errortype
-         *  @moduleid   MOD_ATTR_GET_TARGETING_TARGET
-         *  @reasoncode RC_EMBEDDED_NULL_TARGET_PTR
-         *  @devdesc    NULL TARG Target passed to attribute access macro
-         */
-        const bool hbSwError = true;
-        errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-            ERRORLOG::ERRL_SEV_INFORMATIONAL,
-            MOD_ATTR_GET_TARGETING_TARGET,
-            RC_EMBEDDED_NULL_TARGET_PTR,
-            0, 0, hbSwError);
-        l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-    }
-    else if (i_expectedType != TARGETING::TYPE_NA)
-    {
-        TARGETING::TYPE l_type = o_pTarget->getAttr<TARGETING::ATTR_TYPE>();
-
-        if (l_type != i_expectedType)
-        {
-            FAPI_ERR("getTargetingTarget. Type: %d, expected %d", l_type,
-                     i_expectedType);
-
-            /*@
-             *  @errortype
-             *  @moduleid   MOD_ATTR_GET_TARGETING_TARGET
-             *  @reasoncode RC_UNEXPECTED_TARGET_TYPE
-             *  @userdata1  Target Type
-             *  @userdata2  Expected Target Type
-             *  @devdesc    Unexpected Target Type passed to attribute access
-             *              macro
-             */
-            const bool hbSwError = true;
-            errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                ERRORLOG::ERRL_SEV_INFORMATIONAL,
-                MOD_ATTR_GET_TARGETING_TARGET,
-                RC_UNEXPECTED_TARGET_TYPE,
-                l_type, i_expectedType, hbSwError);
-            l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-        }
-    }
-
-    return l_rc;
-}
-
-//******************************************************************************
-// fapi::platAttrSvc::getTargetingAttr
-//******************************************************************************
-fapi::ReturnCode getTargetingAttr(const fapi::Target * i_pFapiTarget,
-                                  const TARGETING::ATTRIBUTE_ID i_targAttrId,
-                                  const uint32_t i_attrSize,
-                                  void * o_pAttr)
-{
-    TARGETING::Target * l_pTargTarget = NULL;
-
-    fapi::ReturnCode l_rc = getTargetingTarget(i_pFapiTarget, l_pTargTarget);
-
-    if (l_rc)
-    {
-        FAPI_ERR("getTargetingAttr: Error from getTargetingTarget");
-    }
-    else
-    {
-        // Note directly calling Target's private _tryGetAttr function for code
-        // size optimization, the public function is a template function that
-        // cannot be called with a variable attribute ID, the template function
-        // checks at compile time that the Targeting attribute is readable, but
-        // that is already checked by the Targeting compiler
-        bool l_success = l_pTargTarget->_tryGetAttr(i_targAttrId, i_attrSize,
-                                                    o_pAttr);
-
-        if (!l_success)
-        {
-            FAPI_ERR("getTargetingAttr: Error from _tryGetAttr");
-            /*@
-             *  @errortype
-             *  @moduleid   MOD_PLAT_ATTR_SVC_GET_TARG_ATTR
-             *  @reasoncode RC_FAILED_TO_ACCESS_ATTRIBUTE
-             *  @userdata1  Platform attribute ID
-             *  @userdata2  FAPI target type, or NULL if system target
-             *  @devdesc    Failed to get requested attribute.
-             *      Possible causes: Invalid target, attribute not implemented,
-             *          attribute not present on given target, target service
-             *          not initialized
-             */
-            const bool hbSwError = true;
-            errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                ERRORLOG::ERRL_SEV_INFORMATIONAL,
-                MOD_PLAT_ATTR_SVC_GET_TARG_ATTR,
-                RC_FAILED_TO_ACCESS_ATTRIBUTE,
-                i_targAttrId,
-                i_pFapiTarget ? i_pFapiTarget->getType(): NULL,
-                hbSwError);
-            l_rc.setPlatError(reinterpret_cast<void *>(l_pError));
-        }
-    }
-
-    return l_rc;
-}
-
-//******************************************************************************
-// fapi::platAttrSvc::setTargetingAttr
-//******************************************************************************
-fapi::ReturnCode setTargetingAttr(const fapi::Target * i_pFapiTarget,
-                                  const TARGETING::ATTRIBUTE_ID i_targAttrId,
-                                  const uint32_t i_attrSize,
-                                  void * i_pAttr)
-{
-    TARGETING::Target * l_pTargTarget = NULL;
-
-    fapi::ReturnCode l_rc = getTargetingTarget(i_pFapiTarget, l_pTargTarget);
-
-    if (l_rc)
-    {
-        FAPI_ERR("setTargetingAttr: Error from getTargetingTarget");
-    }
-    else
-    {
-        // Note directly calling Target's private _trySetAttr function for code
-        // size optimization, the public function is a template function that
-        // cannot be called with a variable attribute ID, the template function
-        // checks at compile time that the Targeting attribute is writeable, but
-        // that is already checked by the Targeting compiler
-        bool l_success = l_pTargTarget->_trySetAttr(i_targAttrId, i_attrSize,
-                                                    i_pAttr);
-
-        if (!l_success)
-        {
-            FAPI_ERR("setTargetingAttr: Error from _trySetAttr");
-            /*@
-             *  @errortype
-             *  @moduleid   MOD_PLAT_ATTR_SVC_SET_TARG_ATTR
-             *  @reasoncode RC_FAILED_TO_ACCESS_ATTRIBUTE
-             *  @userdata1  Platform attribute ID
-             *  @userdata2  FAPI target type, or NULL if system target
-             *  @devdesc    Failed to Set requested attribute.
-             *      Possible causes: Invalid target, attribute not implemented,
-             *          attribute not present on given target, target service
-             *          not initialized
-             */
-            const bool hbSwError = true;
-            errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                ERRORLOG::ERRL_SEV_INFORMATIONAL,
-                MOD_PLAT_ATTR_SVC_SET_TARG_ATTR,
-                RC_FAILED_TO_ACCESS_ATTRIBUTE,
-                i_targAttrId,
-                i_pFapiTarget ? i_pFapiTarget->getType(): NULL,
-                hbSwError);
-            l_rc.setPlatError(reinterpret_cast<void *>(l_pError));
-        }
-    }
-
-    return l_rc;
-}
-
-//******************************************************************************
-// fapiPlatGetSpdAttr function.
-// Call SPD device driver to retrieve the SPD attribute
-//******************************************************************************
-fapi::ReturnCode fapiPlatGetSpdAttr(const fapi::Target * i_pFapiTarget,
-                                    const uint16_t i_keyword,
-                                    void * o_data, const size_t i_len)
-{
-    FAPI_DBG(ENTER_MRK "fapiPlatGetSpdAttr");
-
-    fapi::ReturnCode l_rc;
-    TARGETING::Target* l_pTarget = NULL;
-
-    l_rc = getTargetingTarget(i_pFapiTarget, l_pTarget, TARGETING::TYPE_DIMM);
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiPlatGetSpdAttr: Error from getTargetingTarget");
-    }
-    else
-    {
-        errlHndl_t l_err = NULL;
-        size_t l_len = i_len;
-        l_err = deviceRead(l_pTarget, o_data, l_len,
-                           DEVICE_SPD_ADDRESS(i_keyword));
-
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            FAPI_ERR("fapiPlatGetSpdAttr: Error from deviceRead, keyword 0x%04x, len %d",
-                     i_keyword, i_len);
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-        }
-        else
-        {
-            if ((i_len == sizeof(uint32_t)) && (l_len == sizeof(uint16_t)))
-            {
-                // This is a uint16_t attribute written to a uint32_t type.
-                // This is because FAPI attributes can only be uint8/32/64
-                // Shift the data to be right aligned
-                *(static_cast<uint32_t *>(o_data)) >>= 16;
-            }
-            else if ((i_len == sizeof(uint32_t)) && (l_len == sizeof(uint8_t)))
-            {
-                // This is a uint8_t attribute written to a uint32_t type.
-                // Shift the data to the lower byte
-                *(static_cast<uint32_t *>(o_data)) >>= 24;
-            }
-        }
-    }
-
-    FAPI_DBG(EXIT_MRK "fapiPlatGetSpdAttr");
-    return l_rc;
-}
-
-//******************************************************************************
-// fapiPlatGetModuleType function.
-//******************************************************************************
-fapi::ReturnCode fapiPlatGetModuleType(const fapi::Target * i_pFapiTarget,
-                                       uint8_t & o_name)
-{
-    fapi::ReturnCode l_rc;
-    TARGETING::Target * l_pHbTarget = NULL;
-    o_name = ENUM_ATTR_NAME_NONE;
-
-    l_rc = getTargetingTarget(i_pFapiTarget, l_pHbTarget ,
-                                          TARGETING::TYPE_DIMM);
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiPlatGetTargetName: Error from getTargetingTarget");
-    }
-    else
-    {
-        errlHndl_t l_err = NULL;
-        size_t l_len = sizeof(uint8_t);
-        uint8_t l_memType = 0;
-        l_err = deviceRead(l_pHbTarget , &l_memType, l_len,
-                           DEVICE_SPD_ADDRESS(SPD::BASIC_MEMORY_TYPE));
-
-
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            FAPI_ERR("fapiPlatGetModuleType: Error from deviceRead")
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-        }
-        else
-        {
-            l_err = deviceRead(l_pHbTarget , &o_name, l_len,
-                           DEVICE_SPD_ADDRESS(SPD::MODULE_TYPE));
-            if (l_err)
-            {
-                // Add the error log pointer as data to the ReturnCode
-                FAPI_ERR("fapiPlatGetModuleType: Error from deviceRead")
-                l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-            }
-            else
-            {
-
-                if(((l_memType == fapi::ENUM_ATTR_SPD_DRAM_DEVICE_TYPE_DDR4) &&
-                                 (o_name == SPD::JEDEC_VER4_LRDIMM_VAL))||
-                   ((l_memType == fapi::ENUM_ATTR_SPD_DRAM_DEVICE_TYPE_DDR3)&&
-                                 (o_name == SPD::JEDEC_VER3_LRDIMM_VAL)))
-                {
-                    o_name = fapi::ENUM_ATTR_SPD_MODULE_TYPE_LRDIMM;
-
-                }
-            }
-        }
-    }
-
-    return l_rc;
-}
-
-
-
-
-
-//******************************************************************************
-// fapiPlatSetSpdAttr function.
-// Call SPD device driver to set the SPD attribute
-//******************************************************************************
-fapi::ReturnCode fapiPlatSetSpdAttr(const fapi::Target * i_pFapiTarget,
-                                    const uint16_t i_keyword,
-                                    void * i_data, const size_t i_len)
-{
-    FAPI_DBG(ENTER_MRK "fapiPlatSetSpdAttr");
-
-    fapi::ReturnCode l_rc;
-    TARGETING::Target* l_pTarget = NULL;
-
-    l_rc = getTargetingTarget(i_pFapiTarget, l_pTarget, TARGETING::TYPE_DIMM);
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiPlatSetSpdAttr: Error from getTargetingTarget");
-    }
-    else
-    {
-        errlHndl_t l_err = NULL;
-        size_t l_len = i_len;
-        l_err = deviceWrite(l_pTarget, i_data, l_len,
-                            DEVICE_SPD_ADDRESS(i_keyword));
-
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            FAPI_ERR("fapiPlatSetSpdAttr: Error from deviceWrite, keyword 0x%04x, len %d",
-                     i_keyword, i_len);
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-        }
-    }
-
-    FAPI_DBG(EXIT_MRK "fapiPlatSetSpdAttr");
-    return l_rc;
-}
-
-//******************************************************************************
-// fapiPlatGetDqMapping function.
-//******************************************************************************
-fapi::ReturnCode fapiPlatGetDqMapping(const fapi::Target * i_pDimmFapiTarget,
-                                      uint8_t (&o_data)[DIMM_DQ_NUM_DQS])
-{
-    fapi::ReturnCode l_rc;
-
-    do
-    {
-        TARGETING::Target * l_pDimmTarget = NULL;
-
-        l_rc = getTargetingTarget(i_pDimmFapiTarget, l_pDimmTarget,
-                              TARGETING::TYPE_DIMM);
-
-        if (l_rc)
-        {
-            FAPI_ERR("fapiPlatGetDqMapping: Error from getTargetingTarget");
-            break;
-        }
-
-        if (l_pDimmTarget->getAttr<TARGETING::ATTR_MODEL>() ==
-            TARGETING::MODEL_CDIMM)
-        {
-            // C-DIMM. There is no DQ mapping from Centaur DQ to DIMM Connector
-            // DQ because there is no DIMM Connector. Return a direct 1:1 map
-            // (0->0, 1->1, etc)
-            for (uint8_t i = 0; i < DIMM_DQ_NUM_DQS; i++)
-            {
-                o_data[i] = i;
-            }
-        }
-        else
-        {
-            // ISDIMM. Work back up from Dimm target to MBA to Mem Buf and
-            // gather dimm position to select ATTR_VPD_ISDIMMTOC4DQ data
-
-            // Get DIMM's Port position off the MBA
-            uint8_t l_port=l_pDimmTarget->getAttr<TARGETING::ATTR_MBA_PORT>();
-
-            // Find MBA from DIMM
-            TARGETING::TargetHandleList l_mbaList;
-            getParentAffinityTargets (l_mbaList,l_pDimmTarget,
-                                  TARGETING::CLASS_UNIT,
-                                  TARGETING::TYPE_MBA, false);
-
-            if (l_mbaList.size () != 1 )
-            {
-                FAPI_ERR("fapiPlatGetDqMapping: expect 1 mba %d ",
-                    l_mbaList.size());
-
-                /*@
-                 * @errortype
-                 * @moduleid     fapi::MOD_PLAT_ATTR_SVC_CEN_DQ_TO_DIMM_CONN_DQ
-                 * @reasoncode   fapi::RC_NO_SINGLE_MBA
-                 * @userdata1    Number of MBAs
-                 * @userdata2    DIMM HUID
-                 * @devdesc      fapiPlatGetVpdVersion could not find the
-                 *               expected 1 mba from the passed dimm target
-                 */
-                const bool hbSwError = true;
-                errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                    ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                    fapi::MOD_PLAT_ATTR_SVC_CEN_DQ_TO_DIMM_CONN_DQ,
-                    fapi::RC_NO_SINGLE_MBA,
-                    l_mbaList.size(),
-                    TARGETING::get_huid(l_pDimmTarget),
-                    hbSwError);
-
-                // Attach the error log to the fapi::ReturnCode
-                l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-                break;
-            }
-            fapi::Target l_fapiMbaTarget(TARGET_TYPE_MBA_CHIPLET,
-                    static_cast<void *>(l_mbaList[0]));
-
-            // Get MBA position off the Mem Buf
-            uint8_t l_mbaPos = l_mbaList[0]->
-                                    getAttr<TARGETING::ATTR_CHIP_UNIT>();
-
-            // find mem buff
-            fapi::Target l_fapiMbTarget;
-            l_rc = fapiGetParentChip(l_fapiMbaTarget, l_fapiMbTarget);
-            if (l_rc)
-            {
-                FAPI_ERR("fapiPlatGetDqMapping: Error getting MBA's parent ");
-                break;
-            }
-
-            // Read wiring data
-            uint8_t l_wiringData[DIMM_TO_C4_PORTS][DIMM_TO_C4_DQ_ENTRIES];
-            l_rc = FAPI_ATTR_GET(ATTR_VPD_ISDIMMTOC4DQ,
-                                    &l_fapiMbTarget,l_wiringData);
-            if (l_rc)
-            {
-                FAPI_ERR("fapiPlatGetDqMapping:"
-                                  " Error getting VPD_ISDIMMTOC4DQ data");
-                break;
-            }
-
-            // Map data
-            uint8_t l_index = l_mbaPos*2+l_port;
-            for (uint8_t i = 0; i < DIMM_DQ_NUM_DQS; i++)
-            {
-                o_data[i] = l_wiringData[l_index][i];
-            }
-        }
-    } while (0);
-
-    return l_rc;
-}
-
-//******************************************************************************
-// fapiPlatGetTargetName function
-//******************************************************************************
-fapi::ReturnCode fapiPlatGetTargetName(const fapi::Target * i_pFapiTarget,
-                                       uint8_t & o_name)
-{
-    fapi::ReturnCode l_rc;
-    TARGETING::Target * l_pHbTarget = NULL;
-    o_name = ENUM_ATTR_NAME_NONE;
-
-    l_rc = getTargetingTarget(i_pFapiTarget, l_pHbTarget);
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiPlatGetTargetName: Error from getTargetingTarget");
-    }
-    else
-    {
-        TARGETING::MODEL l_model =
-            l_pHbTarget->getAttr<TARGETING::ATTR_MODEL>();
-
-        if (l_model == TARGETING::MODEL_VENICE)
-        {
-            o_name = ENUM_ATTR_NAME_VENICE;
-        }
-        else if (l_model == TARGETING::MODEL_MURANO)
-        {
-            o_name = ENUM_ATTR_NAME_MURANO;
-        }
-        else if (l_model == TARGETING::MODEL_NAPLES)
-        {
-            o_name = ENUM_ATTR_NAME_NAPLES;
-        }
-        else if (l_model == TARGETING::MODEL_CENTAUR)
-        {
-            o_name = ENUM_ATTR_NAME_CENTAUR;
-        }
-        else
-        {
-            FAPI_ERR("fapiPlatGetTargetName. Unknown name 0x%x", l_model);
-
-            /*@
-             *  @errortype
-             *  @moduleid   MOD_ATTR_GET_TARGET_NAME
-             *  @reasoncode RC_ATTR_BAD_TARGET_PARAM
-             *  @devdesc    Failed to get the FAPI Target name due to
-             *              unrecognized TARGETING Target model
-             *  @userdata1  TARGETING Target model
-             */
-            const bool hbSwError = true;
-            errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                ERRORLOG::ERRL_SEV_INFORMATIONAL,
-                MOD_ATTR_GET_TARGET_NAME,
-                RC_ATTR_BAD_TARGET_PARAM,
-                l_model, 0, hbSwError);
-            l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-        }
-    }
-
-    return l_rc;
-}
-
-//******************************************************************************
-// fapiPlatGetFunctional function
-//******************************************************************************
-fapi::ReturnCode fapiPlatGetFunctional(const fapi::Target * i_pFapiTarget,
-                                       uint8_t & o_functional)
-{
-    fapi::ReturnCode l_rc;
-    TARGETING::Target * l_pHbTarget = NULL;
-    o_functional = 0;
-
-    l_rc = getTargetingTarget(i_pFapiTarget, l_pHbTarget);
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiPlatGetFunctional: Error from getTargetingTarget");
-    }
-    else
-    {
-        TARGETING::PredicateIsFunctional l_functional;
-        if (l_functional(l_pHbTarget))
-        {
-            o_functional = 1;
-        }
-    }
-
-    return l_rc;
-}
-
-//******************************************************************************
-// fapi::platAttrSvc::fapiPlatGetTargetPos function
-//******************************************************************************
-fapi::ReturnCode fapiPlatGetTargetPos(const fapi::Target * i_pFapiTarget,
-                                      uint32_t & o_pos)
-{
-    fapi::ReturnCode l_rc;
-    TARGETING::Target * l_pTarget = NULL;
-
-    // Get the Targeting Target
-    l_rc = getTargetingTarget(i_pFapiTarget, l_pTarget);
-
-    if (l_rc)
-    {
-        FAPI_ERR("getTargetName: Error from getTargetingTarget");
-    }
-    else
-    {
-        uint16_t l_pos = l_pTarget->getAttr<TARGETING::ATTR_POSITION>();
-        o_pos = l_pos;
-    }
-
-    return l_rc;
-}
-
-/**
- *  @enum
- *  Return values for ATTR_PROC_*_BAR_ENABLE
-*/
-enum
-{
-    PROC_BARS_DISABLE   = 0x0,
-    PROC_BARS_ENABLE    = 0x1,
-};
-
-/**
- *  @brief  Internal routine
- *          Do common checks and return an error if necessary for functions
- *          supporting proc/mss_setup_bars attributes
- *          Return useful parameters
- *
- *  @param[in]  -   i_pFapiTarget incoming target
- *  @param[out] -   o_procNum     found processor number of i_pTarget
- *  @apram[out] -   o_isEnabled   ENABLE/DISABLE flag for BAR_ENABLE ATTRS
- *  @return     -   success or appropriate fapi returncode
-*/
-fapi::ReturnCode barsPreCheck( const fapi::Target * i_pFapiTarget,
-                               uint64_t             &o_procNum,
-                               uint8_t              &o_isEnabled
-                              )
-{
-    fapi::ReturnCode l_rc;
-    TARGETING::Target* l_pTarget = NULL;
-
-    l_rc = getTargetingTarget(i_pFapiTarget, l_pTarget);
-
-    if (l_rc)
-    {
-        FAPI_ERR("barsPreCheck: Error from getTargetingTarget");
-    }
-    else
-    {
-        //  ATTR_POSITION should return the logical proc ID
-        o_procNum  =
-            static_cast<uint64_t>
-                (l_pTarget->getAttr<TARGETING::ATTR_POSITION>() );
-
-        //  if proc is functional then set the BAR_ENABLE ATTR to ENABLE
-        TARGETING::PredicateIsFunctional l_functional;
-        if (l_functional(l_pTarget))
-        {
-            o_isEnabled = PROC_BARS_ENABLE;
-        }
-        else
-        {
-            o_isEnabled = PROC_BARS_DISABLE;
-        }
-    }
-
-    return  l_rc;
-}
-
-
-fapi::ReturnCode fapiPlatGetProcForeignNearBase (
-                                    const fapi::Target * i_pTarget,
-                                    uint64_t (&o_foreignNearBase)[ 2 ] )
-{
-    fapi::ReturnCode    l_rc;
-    uint64_t    l_procNum       =   0;
-    uint8_t     l_isEnabled     =   PROC_BARS_DISABLE;
-
-    do
-    {
-        l_rc = barsPreCheck(i_pTarget, l_procNum, l_isEnabled);
-        if ( l_rc )
-        {
-            FAPI_ERR("fapiPlatGetProcForeignNearBase: Error from barsPreCheck");
-            break;
-        }
-
-        // 2012-06-25 Per Dean return 0 here for now
-        o_foreignNearBase[0]    =   0;
-        o_foreignNearBase[1]    =   0;
-
-    }   while (0);
-
-    return  l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetProcForeignNearSize (
-                                    const fapi::Target * i_pTarget,
-                                    uint64_t (&o_foreignNearSize)[ 2 ] )
-{
-    fapi::ReturnCode l_rc;
-    uint64_t    l_procNum       =   0;
-    uint8_t     l_isEnabled     =   PROC_BARS_DISABLE;
-
-    do
-    {
-        l_rc = barsPreCheck(i_pTarget, l_procNum, l_isEnabled);
-        if ( l_rc )
-        {
-            FAPI_ERR("fapiPlatGetProcForeignNearSize: Error from barsPreCheck");
-            break;
-        }
-
-        // 2012-06-25 Per Dean return 0 here for now
-        o_foreignNearSize[0]    =   0;
-        o_foreignNearSize[1]    =   0;
-
-    }   while(0);
-
-    return  l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetProcForeignFarBase (
-                                    const fapi::Target * i_pTarget,
-                                    uint64_t (&o_foreignFarBase)[ 2 ] )
-{
-    fapi::ReturnCode l_rc;
-    uint64_t    l_procNum       =   0;
-    uint8_t     l_isEnabled     =   PROC_BARS_DISABLE;
-
-    do
-    {
-        l_rc = barsPreCheck(i_pTarget, l_procNum, l_isEnabled);
-        if ( l_rc )
-        {
-            FAPI_ERR("fapiPlatGetProcForeignFarBase: Error from barsPreCheck");
-            break;
-        }
-
-        // 2012-06-25 Per Dean return 0 here for now
-        o_foreignFarBase[0]    =   0;
-        o_foreignFarBase[1]    =   0;
-
-    }   while(0);
-
-    return  l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetProcForeignFarSize (
-                                    const fapi::Target * i_pTarget,
-                                    uint64_t (&o_foreignFarSize)[ 2 ] )
-{
-    fapi::ReturnCode l_rc;
-    uint64_t    l_procNum       =   0;
-    uint8_t     l_isEnabled     =   PROC_BARS_DISABLE;
-
-    do
-    {
-        l_rc = barsPreCheck(i_pTarget, l_procNum, l_isEnabled);
-        if ( l_rc )
-        {
-            FAPI_ERR("fapiPlatGetProcForeignFarSize: Error from barsPreCheck");
-            break;
-        }
-
-        // 2012-06-25 Per Dean return 0 here for now
-        o_foreignFarSize[0]    =   0;
-        o_foreignFarSize[1]    =   0;
-
-    }   while(0);
-
-    return  l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetProcHaBase (
-                                    const fapi::Target * i_pTarget,
-                                    uint64_t (&o_haBase)[ 8 ] )
-{
-    fapi::ReturnCode l_rc;
-    uint64_t    l_procNum       =   0;
-    uint8_t     l_isEnabled     =   PROC_BARS_DISABLE;
-
-    do
-    {
-        l_rc = barsPreCheck(i_pTarget, l_procNum, l_isEnabled);
-        if ( l_rc )
-        {
-            FAPI_ERR("fapiPlatGetProcHaBase: Error from barsPreCheck");
-            break;
-        }
-
-        // 2012-06-25 Per Dean return 0 here for now
-        o_haBase[0]    =   0;
-        o_haBase[1]    =   0;
-        o_haBase[2]    =   0;
-        o_haBase[3]    =   0;
-        o_haBase[4]    =   0;
-        o_haBase[5]    =   0;
-        o_haBase[6]    =   0;
-        o_haBase[7]    =   0;
-
-    }   while(0);
-
-    return  l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetProcHaSize (
-                                    const fapi::Target * i_pTarget,
-                                    uint64_t (&o_haSize)[ 8 ] )
-{
-    fapi::ReturnCode l_rc;
-    uint64_t    l_procNum       =   0;
-    uint8_t     l_isEnabled     =   PROC_BARS_DISABLE;
-
-    do
-    {
-        l_rc = barsPreCheck(i_pTarget, l_procNum, l_isEnabled);
-        if ( l_rc )
-        {
-            FAPI_ERR("fapiPlatGetProcHaSize: Error from barsPreCheck");
-            break;
-        }
-
-        // 2012-06-25 Per Dean return 0 here for now
-        o_haSize[0]    =   0;
-        o_haSize[1]    =   0;
-        o_haSize[2]    =   0;
-        o_haSize[3]    =   0;
-        o_haSize[4]    =   0;
-        o_haSize[5]    =   0;
-        o_haSize[6]    =   0;
-        o_haSize[7]    =   0;
-
-    } while(0);
-
-    return  l_rc;
-}
-
-
-//------------------------------------------------------------------------------
-//  Prototypes to support proc_setup_bars_mmio_attributes
-//  see proc_setup_bars_mmio_attributes for detailed descriptions
-//------------------------------------------------------------------------------
-
-fapi::ReturnCode fapiPlatGetProcPsiBridgeBarEnable (
-                                    const fapi::Target * i_pTarget,
-                                    uint8_t     &o_psiBridgeBarEnable )
-{
-    fapi::ReturnCode l_rc;
-    o_psiBridgeBarEnable =   PROC_BARS_DISABLE;
-    TARGETING::Target* l_pProcTarget = NULL;
-
-    l_rc = getTargetingTarget(i_pTarget, l_pProcTarget);
-
-    if (l_rc)
-    {
-        FAPI_ERR(
-            "fapiPlatGetProcPsiBridgeBarEnable: Error from getTargetingTarget");
-    }
-    else
-    {
-        uint64_t bar = l_pProcTarget->getAttr<TARGETING::ATTR_PSI_BRIDGE_BASE_ADDR>();
-
-        //  if bar is not zero
-        if ( bar )
-        {
-            o_psiBridgeBarEnable =   PROC_BARS_ENABLE;
-        }
-    }
-
-    return  l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetProcFspBarEnable (
-                                    const fapi::Target * i_pTarget,
-                                    uint8_t     &o_fspBarEnable )
-{
-    fapi::ReturnCode l_rc;
-    o_fspBarEnable =   PROC_BARS_DISABLE;
-    TARGETING::Target* l_pProcTarget = NULL;
-
-    l_rc = getTargetingTarget(i_pTarget, l_pProcTarget);
-
-    if (l_rc)
-    {
-        FAPI_ERR(
-            "fapiPlatGetProcFspBarEnable: Error from getTargetingTarget");
-    }
-    else
-    {
-        uint64_t bar = l_pProcTarget->getAttr<TARGETING::ATTR_FSP_BASE_ADDR>();
-
-        //  if bar is not zero
-        if ( bar )
-        {
-            o_fspBarEnable =   PROC_BARS_ENABLE;
-        }
-    }
-
-    return  l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetProcIntpBarEnable (
-                                    const fapi::Target * i_pTarget,
-                                    uint8_t    &o_intpBarEnable )
-{
-    fapi::ReturnCode l_rc;
-    uint64_t    l_procNum       =   0;
-    uint8_t     l_isEnabled     =   PROC_BARS_DISABLE;
-
-    l_rc    =   barsPreCheck(i_pTarget, l_procNum, l_isEnabled);
-    if ( l_rc )
-    {
-        FAPI_ERR("fapiPlatGetProcIntpBarEnable: Error from barsPreCheck");
-    }
-    else
-    {
-        o_intpBarEnable =   l_isEnabled;
-    }
-
-    return  l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetProcNxMmioBarEnable(
-                                    const fapi::Target * i_pTarget,
-                                    uint8_t     &o_nxMmioBarEnable )
-{
-    fapi::ReturnCode l_rc;
-    uint64_t    l_procNum       =   0;
-    uint8_t     l_isEnabled     =   PROC_BARS_DISABLE;
-
-    l_rc    =   barsPreCheck(i_pTarget, l_procNum, l_isEnabled);
-    if ( l_rc )
-    {
-        FAPI_ERR("fapiPlatGetProcNxMmioBarEnable: Error from barsPreCheck");
-    }
-    else
-    {
-        o_nxMmioBarEnable   =   l_isEnabled;
-    }
-
-    return  l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetProcNxMmioBarSize (
-                                    const fapi::Target * i_pTarget,
-                                    uint64_t    &o_nxMmioBarSize )
-{
-    fapi::ReturnCode l_rc;
-    uint64_t    l_procNum       =   0;
-    uint8_t     l_isEnabled     =   PROC_BARS_DISABLE;
-
-    l_rc    =   barsPreCheck(i_pTarget, l_procNum, l_isEnabled);
-    if ( l_rc )
-    {
-        FAPI_ERR("fapiPlatGetProcNxMmioBarSize: Error from barsPreCheck");
-    }
-    else
-    {
-        o_nxMmioBarSize   =   PROC_RNG_SIZE ;
-    }
-
-    return  l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetProcPcieBarEnable (
-                                    const fapi::Target * i_pTarget,
-                                    uint8_t     (&o_pcieBarEnable) [4][3] )
-{
-    fapi::ReturnCode l_rc;
-    uint64_t    l_procNum       =   0;
-    uint8_t     l_isEnabled     =   PROC_BARS_DISABLE;
-
-    l_rc    =   barsPreCheck(i_pTarget, l_procNum, l_isEnabled);
-    if ( l_rc )
-    {
-        FAPI_ERR("fapiPlatGetProcPcieBarEnable: Error from barsPreCheck");
-    }
-    else
-    {
-        // In PHYP mode, we need to leave the PCI BARs disabled
-        bool phyp_mode = false;
-        if( TARGETING::is_phyp_load() )
-        {
-            phyp_mode = true;
-        }
-
-        //  BAR # 0 are the PCIE Mem 64
-        //  BAR # 1 are the PCIE Mem 32
-        //  BAR # 2 are the PHB REGS
-        for( uint8_t u=0; u< PROC_SETUP_BARS_PCIE_NUM_UNITS; u++ )
-        {
-            if( phyp_mode )
-            {
-                o_pcieBarEnable[u][0]   =   PROC_BARS_DISABLE ;
-                o_pcieBarEnable[u][1]   =   PROC_BARS_DISABLE ;
-                o_pcieBarEnable[u][2]   =   PROC_BARS_DISABLE ;
-            }
-            else
-            {
-                o_pcieBarEnable[u][0]   =   l_isEnabled ;
-                o_pcieBarEnable[u][1]   =   l_isEnabled ;
-                o_pcieBarEnable[u][2]   =   l_isEnabled ;
-            }
-
-            FAPI_DBG( "fapiPlatGetProcPcieBarEnable: Unit %d : %p %p %p",
-                      u,
-                      o_pcieBarEnable[u][0],
-                      o_pcieBarEnable[u][1],
-                      o_pcieBarEnable[u][2]    );
-        }
-    }
-
-    return  l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetProcPcieBarBaseAddr (
-                                    const fapi::Target * i_pTarget,
-                                    uint64_t    (&o_pcieBarBase) [4][3] )
-{
-    fapi::ReturnCode l_rc;
-    uint64_t    l_procNum       =   0;
-    uint8_t     l_isEnabled     =   PROC_BARS_DISABLE;
-
-    l_rc = barsPreCheck(i_pTarget, l_procNum, l_isEnabled);
-
-    if ( l_rc )
-    {
-        FAPI_ERR("fapiPlatGetProcPcieBarBaseAddr: Error from barsPreCheck");
-    }
-    else
-    {
-        TARGETING::Target* l_pProcTarget = NULL;
-
-        l_rc = getTargetingTarget(i_pTarget, l_pProcTarget);
-
-        if (l_rc)
-        {
-            FAPI_ERR("fapiPlatGetProcPcieBarBaseAddr: Error from getTargetingTarget");
-        }
-        else
-        {
-            // Pull the data out of the Hostboot attribute
-            uint64_t l_pciMem32[4];
-            uint64_t l_pciMem64[4];
-            l_pProcTarget->tryGetAttr<TARGETING::ATTR_PCI_BASE_ADDRS_32>(
-                l_pciMem32);
-            l_pProcTarget->tryGetAttr<TARGETING::ATTR_PCI_BASE_ADDRS_64>(
-                l_pciMem64);
-            uint64_t l_phbRegs[4];
-            l_pProcTarget->tryGetAttr<TARGETING::ATTR_PHB_BASE_ADDRS>(
-                l_phbRegs);
-
-            //  BAR # 0 are the PCIE mem 64, 64GB window
-            //  BAR # 1 are the PCIE mem 32, 2GB window
-            //  BAR # 2 are the PHB REGS
-
-            //If we are in sapphire mode we need to shift the PCI
-            //Mem addresses down below the 48 bit limit for an NVIDA
-            //adapter.  This is a workaround for GA1 so the adapter
-            //can be supported.  Largest (theoretically dimm) is 1TB,
-            //so max mem is ~32TB for non brazos system.
-
-            //Place mem64 @ 59TB-63TB (0x00003B0000000000)
-            //Place mem32 @ 63.875TB-64TB (0x00030FE000000000)
-
-            //TODO RTC 100773 -- Fix this the correct way by
-            //having base addresses per payload type
-
-            //We will change the base addr down 4 bits, but need to keep
-            //the proc/node offsets the same
-            for ( uint8_t u=0; u < PROC_SETUP_BARS_PCIE_NUM_UNITS; u++ )
-            {
-               if(TARGETING::is_sapphire_load())
-               {
-                   o_pcieBarBase[u][0] = SAPPHIRE_PCIE_BAR0_BASE +
-                                     (l_pciMem64[u] & PCIE_BAR0_OFFSET_MASK);
-                   o_pcieBarBase[u][1] = SAPPHIRE_PCIE_BAR1_BASE +
-                                     (l_pciMem32[u] & PCIE_BAR1_OFFSET_MASK);
-               }
-               else
-               {
-                   o_pcieBarBase[u][0] = l_pciMem64[u];
-                   o_pcieBarBase[u][1] = l_pciMem32[u];
-               }
-
-               o_pcieBarBase[u][2] = l_phbRegs[u];
-
-               FAPI_DBG( "fapiPlatGetProcPcieBarBaseAddr: Chip %x Unit %d : %p %p %p",
-                         TARGETING::get_huid(l_pProcTarget),
-                         u,
-                         o_pcieBarBase[u][0],
-                         o_pcieBarBase[u][1],
-                         o_pcieBarBase[u][2]    );
-            }
-        }
-    }
-
-    return  l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetProcPcieBarSize (
-                                    const fapi::Target * i_pTarget,
-                                    uint64_t    (&o_pcieBarSize) [4][3] )
-{
-    fapi::ReturnCode l_rc;
-    uint64_t    l_procNum       =   0;
-    uint8_t     l_isEnabled     =   PROC_BARS_DISABLE;
-
-    l_rc    =   barsPreCheck(i_pTarget, l_procNum, l_isEnabled);
-    if ( l_rc )
-    {
-        FAPI_ERR("fapiPlatGetProcPcieBarSize: Error from barsPreCheck");
-    }
-    else
-    {
-        //  NOTE: supported BAR0/1 sizes are from 64KB-1PB
-        //  NOTE: only supported BAR2 size is 4KB
-        for ( uint8_t u=0; u < PROC_SETUP_BARS_PCIE_NUM_UNITS; u++ )
-        {
-           o_pcieBarSize[u][0]  =   PCIE_BAR0_SIZE ;
-           o_pcieBarSize[u][1]  =   PCIE_BAR1_SIZE ;
-           o_pcieBarSize[u][2]  =   PCIE_BAR2_SIZE;
-
-           FAPI_DBG( "fapiPlatGetProcPcieBarSize: Unit %d : %p %p %p",
-                     u,
-                     o_pcieBarSize[u][0],
-                     o_pcieBarSize[u][1],
-                     o_pcieBarSize[u][2]    );
-        }
-    }
-
-    return  l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetMBvpdMemoryDataVersion(
-    const fapi::Target * i_pTarget,
-    uint32_t & o_val)
-{
-    // Call a VPD Accessor HWP to get the data
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, getMBvpdMemoryDataVersion, *i_pTarget, o_val);
-    return l_rc;
-}
-fapi::ReturnCode fapiPlatGetMBvpdSPDXRecordVersion(
-    const fapi::Target * i_pTarget,
-    uint32_t & o_val)
-{
-    // Call a VPD Accessor HWP to get the data
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, getMBvpdSPDXRecordVersion, *i_pTarget, o_val);
-    return l_rc;
-}
-fapi::ReturnCode fapiPlatGetMBvpdVoltageSettingData(
-    const fapi::Target * i_pTarget,
-    uint32_t & o_val)
-{
-    // Call a VPD Accessor HWP to get the data
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, getMBvpdVoltageSettingData, *i_pTarget, o_val);
-    return l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetSingleMemberEnableAttr(
-    const fapi::Target * i_pTarget,
-    uint32_t & o_val)
-{
-    // Call a VPD Accessor HWP to get the data
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, getMvpdExL2SingleMemberEnable, *i_pTarget, o_val);
-    return l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetAddrMirrorData (
-             const fapi::Target * i_pTarget,
-             uint8_t   (& o_val) [2][2] )
-{
-    // Get the data using the HWP accessor
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, getMBvpdAddrMirrorData, *i_pTarget, o_val);
-    return l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetAttrData (
-             const fapi::Target * i_pTarget,
-             const fapi::AttributeId i_attr,
-             void  * o_pVal,
-             const size_t i_valSize)
-{
-    // Call a VPD Accessor HWP to get the data
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, getMBvpdAttr,
-                        *i_pTarget, i_attr, o_pVal, i_valSize);
-    return l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetSlopeInterceptData (
-             const fapi::Target * i_pTarget,
-             const fapi::MBvpdSlopeIntercept i_attr,
-             uint32_t  & o_Val)
-{
-    // Call a VPD Accessor HWP to get the data
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, getMBvpdSlopeInterceptData,
-                        *i_pTarget, i_attr, o_Val);
-    return l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetVpdVersion (
-             const fapi::Target * i_pFapiTarget,
-             uint32_t    &o_val )
-{
-    fapi::ReturnCode l_rc;
-    TARGETING::Target * l_pTarget = NULL;
-    TARGETING::TargetHandleList l_mbaList;
-
-    do {
-        // Get the Targeting Target
-        l_rc = getTargetingTarget(i_pFapiTarget, l_pTarget);
-        if (l_rc)
-        {
-            FAPI_ERR("fapiPlatGetVpdVersion: Error from getTargetingTarget");
-            break;
-        }
-
-        // Find MBA target from DIMM target
-        getParentAffinityTargets (l_mbaList, l_pTarget, TARGETING::CLASS_UNIT,
-                                  TARGETING::TYPE_MBA, false);
-
-        if (l_mbaList.size () != 1 )
-        {
-            FAPI_ERR("fapiPlatGetVpdVersion: expect 1 mba %d ",
-               l_mbaList.size());
-
-            /*@
-             * @errortype
-             * @moduleid     fapi::MOD_PLAT_ATTR_SVC_GET_VPD_VERSION
-             * @reasoncode   fapi::RC_NO_SINGLE_MBA
-             * @userdata1    Number of MBAs
-             * @userdata2    DIMM HUID
-             * @devdesc      fapiPlatGetVpdVersion could not find the
-             *               expected 1 mba from the passed dimm target
-             */
-            const bool hbSwError = true;
-            errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                fapi::MOD_PLAT_ATTR_SVC_GET_VPD_VERSION,
-                fapi::RC_NO_SINGLE_MBA,
-                l_mbaList.size(),
-                TARGETING::get_huid(l_pTarget),
-                hbSwError);
-
-            // Attach the error log to the fapi::ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-            break;
-        }
-
-        // Get the Fapi Target
-        fapi::Target l_fapiTarget(TARGET_TYPE_MBA_CHIPLET,
-                    static_cast<void *>(l_mbaList[0]));
-
-        // Get the data using the HWP accessor
-        FAPI_EXEC_HWP(l_rc, getMBvpdVersion, l_fapiTarget, o_val);
-        if (l_rc)
-        {
-            FAPI_ERR("fapiPlatGetVpdVersion:"
-                     " Error from getMBvpdVersion");
-            break;
-        }
-
-    } while (0);
-    return l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetDram2NModeEnabled (
-             const fapi::Target * i_pFapiTarget,
-             uint8_t    &o_val )
-{
-    // Get the data using the HWP accessor
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, getMBvpdDram2NModeEnabled, * i_pFapiTarget, o_val);
-    return l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetSensorMap (
-              const   fapi::Target * i_pFapiTarget,
-              const   fapi::MBvpdSensorMap i_attr,
-              uint8_t & o_val)
-{
-    // Get the data using the HWP accessor
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, getMBvpdSensorMap, * i_pFapiTarget, i_attr, o_val);
-    return l_rc;
-}
-
-fapi::ReturnCode fapiPlatL4BankDelete (
-             const fapi::Target * i_pTarget,
-             uint32_t  & io_val,
-             const fapi::MBvpdL4BankDeleteMode i_mode)
-{
-    // Call a VPD Accessor HWP to get or set the data
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, accessMBvpdL4BankDelete,
-                        *i_pTarget, io_val, i_mode);
-    return l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetEnableAttr ( fapi::AttributeId i_id,
-     const fapi::Target * i_pFapiTarget, uint8_t & o_enable )
-{
-    fapi::ReturnCode l_rc;
-    TARGETING::Target * l_pTarget = NULL;
-    o_enable = 0;
-
-    // Get the Targeting Target
-    l_rc = getTargetingTarget(i_pFapiTarget, l_pTarget);
-
-    if (l_rc)
-    {
-        FAPI_ERR("fapiPlatGetEnableAttr: Error from getTargetingTarget");
-    }
-    else
-    {
-        TARGETING::TargetHandleList l_buses;
-        switch (i_id)
-        {
-            case fapi::ATTR_PROC_NX_ENABLE:
-            case fapi::ATTR_PROC_L3_ENABLE:
-                // The enable flag is based on the target's functional state
-                TARGETING::HwasState hwasState;
-                hwasState = l_pTarget->getAttr<TARGETING::ATTR_HWAS_STATE>();
-                o_enable = hwasState.functional;
-                break;
-            case fapi::ATTR_PROC_PCIE_ENABLE:
-                // The enable flag is 1 if one of the pci target is functional
-                getChildChiplets( l_buses, l_pTarget, TARGETING::TYPE_PCI );
-                o_enable = l_buses.size() ? 1 : 0;
-                break;
-            case fapi::ATTR_PROC_A_ENABLE:
-                // The enable flag reflects the state of the pervasive chiplet,
-                //  NOT the bus logic, so always return true since we don't
-                //  support partial good on the ABUS chiplet
-                o_enable = 1;
-                break;
-            case fapi::ATTR_PROC_X_ENABLE:
-                // Need to support having the X bus chiplet partial good
-                // Look at the saved away PG data
-                TARGETING::ATTR_CHIP_REGIONS_TO_ENABLE_type l_chipRegionData;
-                l_rc = FAPI_ATTR_GET(ATTR_CHIP_REGIONS_TO_ENABLE, i_pFapiTarget,
-                                     l_chipRegionData);
-                if (l_rc) {
-                    FAPI_ERR("fapi_attr_get( ATTR_CHIP_REGIONS_TO_ENABLE ) failed. With rc = 0x%x",
-                             (uint32_t) l_rc );
-                    break;
-                }
-                else if (l_chipRegionData[HWAS::VPD_CP00_PG_XBUS_INDEX] != 0)
-                {
-                    o_enable = 0x1;
-                }
-                break;
-            default:
-                o_enable = 0;
-                break;
-        }
-    }
-
-    return l_rc;
-}
-
-
-//------------------------------------------------------------------------------
-//  Functions to support BAD_DQ_BITMAP_attribute
-//  See dimm_spd_attributes.xml for detailed descriptions
-//------------------------------------------------------------------------------
-
-
-/**
- * @brief This function is called by the FAPI_ATTR_GET macro when getting
- * the Bad DQ Bitmap attribute
- * It should not be called directly.
- *
- *  @param[in]  i_pTarget   DIMM target pointer
- *  @param[out] o_data      Bad DIMM DQ Bitmap
- *  @return     ReturnCode. Zero on success, else platform specified error
- */
-fapi::ReturnCode fapiPlatDimmGetBadDqBitmap (
-                                    const   fapi::Target * i_pTarget,
-                                    uint8_t (&o_data)[DIMM_DQ_MAX_DIMM_RANKS]\
-                                                     [DIMM_DQ_RANK_BITMAP_SIZE])
-{
-    fapi::ReturnCode l_rc;
-    TARGETING::Target * l_pTarget = NULL;
-    TARGETING::TargetHandleList l_mbaList;
-    do
-    {
-        // Get the Targeting Target
-        l_rc = getTargetingTarget(i_pTarget, l_pTarget);
-        if (l_rc)
-        {
-            FAPI_ERR("fapiPlatDimmGetBadDqBitmap:Error from getTargetingTarget");
-            break;
-        }
-
-        // Find MBA target from DIMM target
-        getParentAffinityTargets(l_mbaList, l_pTarget, TARGETING::CLASS_UNIT,
-                                 TARGETING::TYPE_MBA, false);
-
-
-        if (l_mbaList.size() != 1 )
-        {
-            FAPI_ERR("fapiPlatDimmGetBadDqBitmap: expect 1 mba %d ",
-               l_mbaList.size());
-
-            /*@
-             * @errortype
-             * @moduleid     fapi::MOD_PLAT_ATTR_SVC_GET_BADDQ_DATA
-             * @reasoncode   fapi::RC_NO_SINGLE_MBA
-             * @userdata1    Number of MBAs
-             * @userdata2    DIMM HUID
-             * @devdesc      fapiPlatDimmGetBadDqBitmap could not find the
-             *               expected 1 mba from the passed dimm target
-             */
-            const bool hbSwError = true;
-            errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                fapi::MOD_PLAT_ATTR_SVC_GET_BADDQ_DATA,
-                fapi::RC_NO_SINGLE_MBA,
-                l_mbaList.size(),
-                TARGETING::get_huid(l_pTarget),
-                hbSwError);
-
-            // Attach the error log to the fapi::ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-            break;
-        }
-
-
-        // Create the Fapi Target
-        fapi::Target l_mbaTarget(TARGET_TYPE_MBA_CHIPLET,
-                                 static_cast<void *>(l_mbaList[0]));
-
-
-        FAPI_EXEC_HWP(l_rc, dimmBadDqBitmapAccessHwp,
-                      l_mbaTarget, *i_pTarget, o_data, true);
-
-        if (l_rc)
-        {
-            FAPI_ERR("fapiPlatDimmGetBadDqBitmap: "
-                     "Error from dimmBadDqBitmapAccessHwp (get)");
-        }
-
-    }while(0);
-    return l_rc;
-}
-
-
-/**
- * @brief This function is called by the FAPI_ATTR_SET macro when setting
- * the Bad DQ Bitmap attribute
- * It should not be called directly.
- *
- *  @param[in]  i_pTarget   DIMM target pointer
- *  @param[in]  i_data      Bad DIMM DQ Bitmap
- *  @return     ReturnCode. Zero on success, else platform specified error
- */
-fapi::ReturnCode fapiPlatDimmSetBadDqBitmap (
-                                    const fapi::Target * i_pTarget,
-                                    uint8_t (&i_data)[DIMM_DQ_MAX_DIMM_RANKS]\
-                                                     [DIMM_DQ_RANK_BITMAP_SIZE])
-{
-    fapi::ReturnCode l_rc;
-    TARGETING::Target * l_pTarget = NULL;
-    TARGETING::TargetHandleList l_mbaList;
-    do
-    {
-        // Get the Targeting Target
-        l_rc = getTargetingTarget(i_pTarget, l_pTarget);
-        if (l_rc)
-        {
-            FAPI_ERR("fapiPlatDimmSetBadDqBitmap:Error from getTargetingTarget");
-            break;
-        }
-
-        // Find MBA target from DIMM target
-        getParentAffinityTargets(l_mbaList, l_pTarget, TARGETING::CLASS_UNIT,
-                                 TARGETING::TYPE_MBA, false);
-
-
-        if (l_mbaList.size() != 1 )
-        {
-            FAPI_ERR("fapiPlatDimmSetBadDqBitmap: expect 1 mba %d ",
-               l_mbaList.size());
-
-            /*@
-             * @errortype
-             * @moduleid     fapi::MOD_PLAT_ATTR_SVC_SET_BADDQ_DATA
-             * @reasoncode   fapi::RC_NO_SINGLE_MBA
-             * @userdata1    Number of MBAs
-             * @userdata2    DIMM HUID
-             * @devdesc      fapiPlatDimmSetBadDqBitmap could not find the
-             *               expected 1 mba from the passed dimm target
-             */
-            const bool hbSwError = true;
-            errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                fapi::MOD_PLAT_ATTR_SVC_SET_BADDQ_DATA,
-                fapi::RC_NO_SINGLE_MBA,
-                l_mbaList.size(),
-                TARGETING::get_huid(l_pTarget),
-                hbSwError);
-
-            // Attach the error log to the fapi::ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-            break;
-        }
-
-
-        // Create the Fapi Target
-        fapi::Target l_mbaTarget(TARGET_TYPE_MBA_CHIPLET,
-                                 static_cast<void *>(l_mbaList[0]));
-
-
-        FAPI_EXEC_HWP(l_rc, dimmBadDqBitmapAccessHwp,
-                      l_mbaTarget, *i_pTarget, i_data, false);
-
-        if (l_rc)
-        {
-            FAPI_ERR("fapiPlatdimmSetBadDqBitmap: "
-                     "Error from dimmBadDqBitmapAccessHwp (set)");
-        }
-
-    }while(0);
-    return l_rc;
-}
-
-//------------------------------------------------------------------------------
-// Function to support VPD_DIMM_SPARE attribute
-//  See dimm_spd_attributes.xml for detailed description
-//------------------------------------------------------------------------------
-
-/**
- * @brief This function is called by the FAPI_ATTR_GET macro when getting
- * the VPD DIMM Spare attribute
- * It should not be called directly.
- *
- *  @param[in]  i_pTarget   MBA target pointer
- *  @param[out] o_data      Spare DRAM availability for MBA
- *  @return     ReturnCode. Zero on success, else platform specified error
- */
-fapi::ReturnCode fapiPlatDimmGetSpareDram (
-                                    const fapi::Target * i_pTarget,
-                                    uint8_t (&o_data)[DIMM_DQ_MAX_MBA_PORTS]
-                                                 [DIMM_DQ_MAX_MBAPORT_DIMMS]
-                                                    [DIMM_DQ_MAX_DIMM_RANKS])
-{
-
-    fapi::ReturnCode l_rc;
-    do
-    {
-        FAPI_EXEC_HWP(l_rc, getMBvpdSpareDramData, *i_pTarget, o_data);
-
-        if (l_rc)
-        {
-            FAPI_ERR("fapiPlatDimmGetSpareDram: "
-                     "Error from getMBvpdSpareDramData");
-            break;
-        }
-
-    }while(0);
-
-    return l_rc;
-}
-
-//******************************************************************************
-// fapi::platAttrSvc::fapiPlatGetPllAttr function
-//******************************************************************************
-fapi::ReturnCode fapiPlatGetPllAttr(const fapi::AttributeId i_targAttrId,
-                                    const fapi::Target * const i_pChipTarget,
-                                    uint8_t * o_data )
-{
-    // Call a PLL Ring Attribute HWP to get the data
-    fapi::ReturnCode l_rc;
-    uint32_t l_ringLength = 0;
-    FAPI_EXEC_HWP(l_rc, getPllRingAttr, i_targAttrId, *i_pChipTarget,
-                  l_ringLength, o_data);
-    return l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetPllAttr(const fapi::AttributeId i_targAttrId,
-                                    const fapi::Target * const i_pChipTarget,
-                                    uint32_t (&o_pllRingLength))
-{
-    // Call a PLL Ring Attribute HWP to get the data
-    fapi::ReturnCode l_rc;
-    uint8_t l_data[MAX_PLL_RING_SIZE_BYTES] = {};
-    FAPI_EXEC_HWP(l_rc, getPllRingAttr, i_targAttrId, *i_pChipTarget,
-                  o_pllRingLength, l_data);
-    return l_rc;
-}
-
-//-----------------------------------------------------------------------------
-fapi::ReturnCode fapiPlatGetPllInfoAttr(
-    const fapi::Target * i_pProcChip,
-    const fapi::getPllRingInfo::Attr i_attr,
-    void * o_pVal,
-    const size_t i_len)
-{
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, getPllRingInfoAttr, *i_pProcChip, i_attr, o_pVal, i_len);
-    return l_rc;
-}
-
-//-----------------------------------------------------------------------------
-fapi::ReturnCode fapiPlatGetSpdAttrAccessor(
-    const fapi::Target * i_pDimm,
-    const fapi::getSpdAttr::Attr i_attr,
-    void  * o_pVal,
-    const size_t i_len)
-{
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, getSpdAttrAccessor, *i_pDimm, i_attr, o_pVal, i_len);
-    return l_rc;
-}
-
-//-----------------------------------------------------------------------------
-fapi::ReturnCode fapiPlatGetL3DDAttr(const fapi::Target * i_pProcTarget,
-                                     uint32_t (&o_data)[DELTA_DATA_SIZE])
-{
-    fapi::ReturnCode l_rc;
-    uint32_t l_ringLength=0;
-    FAPI_EXEC_HWP(l_rc, getL3DeltaDataAttr,*i_pProcTarget,o_data,l_ringLength);
-    return l_rc;
-}
-
-//-----------------------------------------------------------------------------
-fapi::ReturnCode fapiPlatGetL3Length(const fapi::Target * i_pProcTarget,
-                                     uint32_t (&o_ringLength))
-{
-    fapi::ReturnCode l_rc;
-    uint32_t l_data [DELTA_DATA_SIZE] = {};
-    FAPI_EXEC_HWP(l_rc, getL3DeltaDataAttr,*i_pProcTarget,l_data,o_ringLength);
-    return l_rc;
-}
-
-//-----------------------------------------------------------------------------
-fapi::ReturnCode fapiPlatGetPciOscswitchConfig
-                                     (const fapi::Target * i_pProcTarget,
-                                     uint8_t &o_val)
-{
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, getPciOscswitchConfig, *i_pProcTarget, o_val);
-    return l_rc;
-}
-
-//-----------------------------------------------------------------------------
-fapi::ReturnCode fapiPlatGetTdpRdpCurrentFactor
-                                     (const fapi::Target * i_pProcTarget,
-                                     uint32_t &o_val)
-{
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, getTdpRdpCurrentFactor, *i_pProcTarget, o_val);
-    return l_rc;
-}
-
-//-----------------------------------------------------------------------------
-fapi::ReturnCode fapiPlatGetSpdModspecComRefRawCard
-                                     (const fapi::Target * i_pDimmTarget,
-                                     uint8_t &o_val)
-{
-    fapi::ReturnCode l_rc;
-    uint8_t l_cardExt = 0;
-    uint8_t l_card = 0;
-
-    do {
-
-        // Get the Reference Raw Card Extension (0 or 1)
-        l_rc = fapiPlatGetSpdAttr(i_pDimmTarget,
-            SPD::MODSPEC_COM_REF_RAW_CARD_EXT,
-            &l_cardExt, sizeof(l_cardExt));
-        if (l_rc)
-        {
-            break; //break with error
-        }
-
-        // Get the References Raw Card (bits 4-0)
-        // When Reference Raw Card Extension = 0
-        //    Reference raw cards A through AL
-        // When Reference Raw Card Extension = 1
-        //    Reference raw cards AM through CB
-        l_rc = fapiPlatGetSpdAttr(i_pDimmTarget, SPD::MODSPEC_COM_REF_RAW_CARD,
-            &l_card, sizeof(l_card));
-        if (l_rc)
-        {
-            break; //break with error
-        }
-
-        // Raw Card = 0x1f(ZZ) means no JEDEC reference raw card design used.
-        //   Have one ZZ in the return merged enumeration.
-        if (0x1f == l_card)
-        {
-            l_cardExt = 1;  //Just one ZZ in the enumeration (0x3f)
-        }
-
-        // Merge into a single enumeration
-        o_val = (l_cardExt <<5) | l_card;
-
-    } while (0);
-
-    return l_rc;
-}
-
-//-----------------------------------------------------------------------------
-fapi::ReturnCode fapiPlatGetOscswitchCtl
-                              (const fapi::Target * i_pProcTarget,
-                               const fapi::getOscswitchCtl::Attr i_attr,
-                               void * o_pVal,
-                               const size_t i_len)
-{
-    fapi::ReturnCode l_rc;
-
-    FAPI_EXEC_HWP(l_rc,getOscswitchCtlAttr,*i_pProcTarget,i_attr,o_pVal,i_len);
-
-    return l_rc;
-}
-
-//-----------------------------------------------------------------------------
-fapi::ReturnCode fapiPlatGetControlCapable(const fapi::Target * i_pTarget,
-                uint8_t  & o_val)
-{
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc,getControlCapableData,*i_pTarget,o_val);
-    return l_rc;
-}
-
-//-----------------------------------------------------------------------------
-fapi::ReturnCode fapiPlatGetRCDCntlWord015(const fapi::Target * i_pFapiTarget,
-                uint64_t  & o_val)
-{
-    fapi::ReturnCode l_rc;
-    errlHndl_t l_err = NULL;
-    o_val = 0;
-    size_t  l_nibbleSize = 4;
-    const uint8_t  l_keywordSize = 16;
-    const uint16_t l_keywords [l_keywordSize] = { SPD::RMM_RC0,
-                                                  SPD::RMM_RC1,
-                                                  SPD::RMM_RC2,
-                                                  SPD::RMM_RC3,
-                                                  SPD::RMM_RC4,
-                                                  SPD::RMM_RC5,
-                                                  SPD::RMM_RC6,
-                                                  SPD::RMM_RC7,
-                                                  SPD::RMM_RC8,
-                                                  SPD::RMM_RC9,
-                                                  SPD::RMM_RC10,
-                                                  SPD::RMM_RC11,
-                                                  SPD::RMM_RC12,
-                                                  SPD::RMM_RC13,
-                                                  SPD::RMM_RC14,
-                                                  SPD::RMM_RC15 };
-    do
-    {
-        uint8_t l_dimmType =0;
-        l_rc = FAPI_ATTR_GET(ATTR_SPD_MODULE_TYPE, i_pFapiTarget,l_dimmType);
-        if (l_rc)
-        {
-            FAPI_ERR("fapiPlatGetRCDCntlWord015: Error getting ATTR_SPD_MODULE_TYPE");
-            break;
-        }
-
-
-        if (l_dimmType == ENUM_ATTR_SPD_MODULE_TYPE_RDIMM)
-        {
-            ATTR_SPD_DRAM_DEVICE_TYPE_Type l_spd_dramtype =
-                                         ENUM_ATTR_SPD_DRAM_DEVICE_TYPE_DDR3;
-
-            l_rc = FAPI_ATTR_GET(ATTR_SPD_DRAM_DEVICE_TYPE,
-                                 i_pFapiTarget,
-                                 l_spd_dramtype);
-            if (l_rc)
-            {
-                FAPI_ERR("fapiPlatGetRCDCntlWord015: Error from get"
-                         " ATTR_SPD_DRAM_DEVICE_TYPE");
-                break;
-            }
-
-            // Not defined for DDR4
-            if (ENUM_ATTR_SPD_DRAM_DEVICE_TYPE_DDR4 == l_spd_dramtype)
-            {
-                o_val = 0;
-                break;
-            }
-
-            TARGETING::Target* l_pTarget = NULL;
-            l_rc = getTargetingTarget(i_pFapiTarget, l_pTarget, TARGETING::TYPE_DIMM);
-            if (l_rc)
-            {
-                FAPI_ERR("fapiPlatGetRCDCntlWord015: Error from getTargetingTarget");
-                break;
-            }
-
-            uint8_t l_nibbleRead;
-
-            for (int i = 0; i < l_keywordSize; i++)
-            {
-                l_nibbleRead = 0;
-                l_err = deviceRead(l_pTarget, &l_nibbleRead, l_nibbleSize,
-                           DEVICE_SPD_ADDRESS(l_keywords[i]));
-                if (l_err)
-                {
-                    FAPI_ERR("fapiPlatGetRCDCntlWord015:Error from deviceRead");
-                    l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-                    break;
-                }
-                o_val = (o_val << 4) | (l_nibbleRead & 0x0F);
-            }
-        }
-        else if ((l_dimmType == ENUM_ATTR_SPD_MODULE_TYPE_UDIMM) ||
-                 (l_dimmType == ENUM_ATTR_SPD_MODULE_TYPE_CDIMM))
-        {
-            o_val = 0;
-            break;
-        }
-        else
-        {
-            /*@
-             * @errortype
-             * @moduleid   MOD_GET_RCD_CNTL_WORD
-             * @reasoncode RC_INVALID_DIMM_TYPE
-             * @userdata1  DIMM TYPE
-             * @devdesc    Failed due to wrong DIMM type
-             */
-            l_err = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_INFORMATIONAL,
-                                            MOD_GET_RCD_CNTL_WORD,
-                                            RC_INVALID_DIMM_TYPE,
-                                            l_dimmType, 0, true);
-            FAPI_ERR("fapiPlatGetRCDCntlWord015:Wrong dimm type");
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-            break;
-        }
-    } while (0);
-    return l_rc;
-}
-
-fapi::ReturnCode getIsDimmToC4DQ
-                            (const fapi::Target * i_pTarget,
-                             uint8_t (&o_val) [4][80])
-{
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc,getDQAttrISDIMM,*i_pTarget,o_val);
-    return FAPI_RC_SUCCESS;
-}
-
-fapi::ReturnCode getIsDimmToC4DQS
-                            (const fapi::Target * i_pTarget,
-                             uint8_t (&o_val) [4][20])
-{
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc,getDQSAttrISDIMM,*i_pTarget,o_val);
-    return FAPI_RC_SUCCESS;
-}
-
-/**
- * @brief Get the Perv Vitle ring length.  See doxygen in .H file
- */
-fapi::ReturnCode fapiPlatGetPervVitlRingLengthAttr(
-                               const fapi::Target * i_pProcTarget,
-                               uint32_t (&o_ringLength))
-{
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, getPervVitlRingLengthAttr,
-                  *i_pProcTarget, o_ringLength);
-    return l_rc;
-}
-
-/**
- * @brief Get the TP Vitle spy length.  See doxygen in .H file
- */
-fapi::ReturnCode fapiPlatGetTpVitlSpyLengthAttr(
-                       const fapi::Target * i_pProcTarget,
-                       uint32_t (&o_spyLength))
-{
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, getTpVitlSpyLengthAttr, *i_pProcTarget, o_spyLength);
-    return l_rc;
-}
-
-/**
- * @brief Get the TP Vitle spy offsets.  See doxygen in .H file
- */
-fapi::ReturnCode fapiPlatGetTpVitlSpyOffsetAttr(
-                               const fapi::Target * i_pProcTarget,
-                               uint32_t (&o_data)[SPY_OFFSET_SIZE])
-{
-    fapi::ReturnCode l_rc;
-    FAPI_EXEC_HWP(l_rc, getTpVitlSpyOffsetAttr, *i_pProcTarget, o_data);
-    return l_rc;
-}
-
-fapi::ReturnCode fapiPlatGetNodeMemAttrData (
-                              const fapi::Target * i_pTarget,
-                              const TARGETING::ATTRIBUTE_ID i_attr,
-                              uint32_t & o_val)
-{
-
-    FAPI_DBG("fapiPlatGetNodeMemAttrData: START: i_attr=0x%X", i_attr);
-
-    fapi::ReturnCode l_rc;
-    TARGETING::Target * l_pTgt = NULL;
-
-    do {
-
-        // Get non-FAPI Centaur Target
-        l_rc = getTargetingTarget(i_pTarget, l_pTgt,
-                                  TARGETING::TYPE_MEMBUF);
-
-        if (l_rc)
-        {
-            FAPI_ERR("fapiPlatGetNodeMemAttrData: Error from getTargetingTarget");
-            break;
-        }
-
-        // Get NODE from MEMBUF target
-        TARGETING::TargetHandleList l_nodeList;
-        TARGETING::TargetService& tS = TARGETING::targetService();
-
-        TARGETING::PredicateCTM isaNode(TARGETING::CLASS_ENC,
-                                        TARGETING::TYPE_NODE);
-        tS.getAssociated( l_nodeList,
-                          l_pTgt,
-                          TARGETING::TargetService::PARENT,
-                          TARGETING::TargetService::ALL,
-                          &isaNode);
-
-        // Node list should only have 1 tgt
-        if (l_nodeList.size() != 1 )
-        {
-            FAPI_ERR("fapiPlatGetNodeMemAttrData: expect 1 node %d ",
-                     l_nodeList.size());
-
-            /*@
-             * @errortype
-             * @moduleid     MOD_PLAT_ATTR_SVC_GET_MEM_ATTR_DATA
-             * @reasoncode   RC_NO_SINGLE_NODE
-             * @userdata1    Number of Nodes
-             * @userdata2    MEMBUF Target HUID
-             * @devdesc      fapiPlatGetNodeMemAttrData could not find the single
-             *               node associated with this membuf target
-             */
-            const bool hbSwError = true;
-            errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                MOD_PLAT_ATTR_SVC_GET_MEM_ATTR_DATA,
-                RC_NO_SINGLE_NODE,
-                l_nodeList.size(),
-                TARGETING::get_huid(l_pTgt),
-                hbSwError);
-
-            // Attach the error log to the fapi::ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-            break;
-        }
-
-        // Get the attribute from the node level
-        // NOTE: Using switch statement to explicitly track the attributes
-        //       that need to do this lookup.
-        bool l_success = false;
-
-        switch ( i_attr )
-        {
-            case TARGETING::ATTR_MSS_CENT_VDD_SLOPE_ACTIVE:
-                l_success =
-                    l_nodeList[0]->tryGetAttr<
-                        TARGETING::ATTR_MSS_CENT_VDD_SLOPE_ACTIVE>(o_val);
-                break;
-
-            case TARGETING::ATTR_MSS_CENT_VDD_SLOPE_INACTIVE:
-                l_success =
-                    l_nodeList[0]->tryGetAttr<
-                        TARGETING::ATTR_MSS_CENT_VDD_SLOPE_INACTIVE>(o_val);
-                break;
-
-            case TARGETING::ATTR_MSS_CENT_VDD_INTERCEPT:
-                l_success =
-                    l_nodeList[0]->tryGetAttr<
-                        TARGETING::ATTR_MSS_CENT_VDD_INTERCEPT>(o_val);
-                break;
-
-            case TARGETING::ATTR_MSS_CENT_VCS_SLOPE_ACTIVE:
-                l_success =
-                    l_nodeList[0]->tryGetAttr<
-                        TARGETING::ATTR_MSS_CENT_VCS_SLOPE_ACTIVE>(o_val);
-                break;
-
-            case TARGETING::ATTR_MSS_CENT_VCS_SLOPE_INACTIVE:
-                l_success =
-                    l_nodeList[0]->tryGetAttr<
-                        TARGETING::ATTR_MSS_CENT_VCS_SLOPE_INACTIVE>(o_val);
-                break;
-
-            case TARGETING::ATTR_MSS_CENT_VCS_INTERCEPT:
-                l_success = l_nodeList[0]->tryGetAttr<
-                            TARGETING::ATTR_MSS_CENT_VCS_INTERCEPT>(o_val);
-                break;
-
-            case TARGETING::ATTR_MSS_VOLT_VPP_SLOPE_EFF_CONFIG:
-                l_success =
-                    l_nodeList[0]->tryGetAttr<
-                        TARGETING::ATTR_MSS_VOLT_VPP_SLOPE_EFF_CONFIG>(o_val);
-                break;
-
-            case TARGETING::ATTR_MSS_VOLT_VPP_INTERCEPT_EFF_CONFIG:
-                l_success =
-                    l_nodeList[0]->tryGetAttr<
-                        TARGETING::ATTR_MSS_VOLT_VPP_INTERCEPT_EFF_CONFIG>
-                            (o_val);
-                break;
-
-            case TARGETING::ATTR_MSS_VOLT_DDR3_VDDR_SLOPE_EFF_CONFIG:
-                l_success =
-                    l_nodeList[0]->tryGetAttr<
-                        TARGETING::ATTR_MSS_VOLT_DDR3_VDDR_SLOPE_EFF_CONFIG>
-                            (o_val);
-                break;
-
-            case TARGETING::ATTR_MSS_VOLT_DDR3_VDDR_INTERCEPT_EFF_CONFIG:
-                l_success =
-                    l_nodeList[0]->tryGetAttr<
-                        TARGETING::ATTR_MSS_VOLT_DDR3_VDDR_INTERCEPT_EFF_CONFIG
-                        >(o_val);
-                break;
-
-            case TARGETING::ATTR_MRW_DDR3_VDDR_MAX_LIMIT_EFF_CONFIG:
-                l_success =
-                    l_nodeList[0]->tryGetAttr<
-                        TARGETING::ATTR_MRW_DDR3_VDDR_MAX_LIMIT_EFF_CONFIG>
-                            (o_val);
-                break;
-
-            case TARGETING::ATTR_MSS_VOLT_DDR4_VDDR_SLOPE_EFF_CONFIG:
-                l_success =
-                    l_nodeList[0]->tryGetAttr<
-                        TARGETING::ATTR_MSS_VOLT_DDR4_VDDR_SLOPE_EFF_CONFIG>
-                            (o_val);
-                break;
-
-            case TARGETING::ATTR_MSS_VOLT_DDR4_VDDR_INTERCEPT_EFF_CONFIG:
-                l_success =
-                    l_nodeList[0]->tryGetAttr<
-                        TARGETING::ATTR_MSS_VOLT_DDR4_VDDR_INTERCEPT_EFF_CONFIG
-                        >(o_val);
-                break;
-
-            case TARGETING::ATTR_MRW_DDR4_VDDR_MAX_LIMIT_EFF_CONFIG:
-                l_success =
-                    l_nodeList[0]->tryGetAttr<
-                        TARGETING::ATTR_MRW_DDR4_VDDR_MAX_LIMIT_EFF_CONFIG>
-                            (o_val);
-                break;
-
-            default:
-                // Use error creation below
-                l_success = false;
-                break;
-        }
-
-        if (!l_success)
-        {
-            FAPI_ERR("fapiPlatGetNodeMemAttrData: Error from _tryGetAttr");
-
-            /*@
-             *  @errortype
-             *  @moduleid   MOD_PLAT_ATTR_SVC_GET_MEM_ATTR_DATA
-             *  @reasoncode RC_FAILED_TO_ACCESS_ATTRIBUTE
-             *  @userdata1[0:31]  Platform attribute ID
-             *  @userdata1[32:64] MEMBUF Target
-             *  @userdata2  FAPI target type, or NULL if system target
-             *  @devdesc    Failed to get requested attribute.
-             *      Possible causes: Invalid target, attribute not implemented,
-             *          attribute not present on given target, target service
-             *          not initialized
-             */
-            const bool hbSwError = true;
-            errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                ERRORLOG::ERRL_SEV_INFORMATIONAL,
-                MOD_PLAT_ATTR_SVC_GET_MEM_ATTR_DATA,
-                RC_FAILED_TO_ACCESS_ATTRIBUTE,
-                TWO_UINT32_TO_UINT64(
-                    i_attr,
-                    TARGETING::get_huid(l_pTgt)),
-                i_pTarget ? i_pTarget->getType(): NULL,
-                hbSwError);
-            l_rc.setPlatError(reinterpret_cast<void *>(l_pError));
-        }
-
-    } while (0);
-
-    FAPI_DBG("fapiPlatGetNodeMemAttrData: EXIT: i_attr=0x%X --> o_val = %d (0x%X)",
-             i_attr, o_val, o_val);
-
-    return l_rc;
-
-}
-
-} // End platAttrSvc namespace
-
-} // End fapi namespace
diff --git a/src/usr/hwpf/plat/fapiPlatCreateHwpErrParser.pl b/src/usr/hwpf/plat/fapiPlatCreateHwpErrParser.pl
deleted file mode 100755
index 076bb65ad..000000000
--- a/src/usr/hwpf/plat/fapiPlatCreateHwpErrParser.pl
+++ /dev/null
@@ -1,272 +0,0 @@
-#!/usr/bin/perl
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/plat/fapiPlatCreateHwpErrParser.pl $
-#
-# OpenPOWER HostBoot Project
-#
-# Contributors Listed Below - COPYRIGHT 2012,2015
-# [+] International Business Machines Corp.
-#
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-
-#
-# Purpose:  This perl script will parse HWP Error XML files and create a
-#           file containing functions that parses the return code and FFDC
-#           data in HWP error logs.
-#
-# Author: Mike Jones
-#
-
-use strict;
-
-#------------------------------------------------------------------------------
-# Print Command Line Help
-#------------------------------------------------------------------------------
-my $numArgs = $#ARGV + 1;
-if ($numArgs < 2)
-{
-    print ("Usage: fapiPlatCreateHwpErrParser.pl <output dir> <filename1> <filename2> ...\n");
-    print ("  This perl script will parse HWP Error XML files and create\n");
-    print ("  a file called fapiPlatHwpErrParser.H that contains functions to\n");
-    print ("  parse the return code and FFDC data in HWP error logs\n");
-    exit(1);
-}
-
-#------------------------------------------------------------------------------
-# Specify perl modules to use
-#------------------------------------------------------------------------------
-use Digest::MD5 qw(md5_hex);
-use XML::Simple;
-my $xml = new XML::Simple (KeyAttr=>[]);
-
-# Uncomment to enable debug output
-#use Data::Dumper;
-
-#------------------------------------------------------------------------------
-# Open output files for writing
-#------------------------------------------------------------------------------
-my $rcFile = $ARGV[0];
-$rcFile .= "/";
-$rcFile .= "fapiPlatHwpErrParser.H";
-open(TGFILE, ">", $rcFile);
-
-#------------------------------------------------------------------------------
-# Print start of file information
-#------------------------------------------------------------------------------
-print TGFILE "// fapiPlatHwpErrParser.H\n";
-print TGFILE "// This file is generated by perl script fapiPlatCreateHwpErrParser.pl\n\n";
-print TGFILE "#ifndef FAPIPLATHWPERRPARSER_H_\n";
-print TGFILE "#define FAPIPLATHWPERRPARSER_H_\n\n";
-print TGFILE "#ifdef PARSER\n\n";
-print TGFILE "namespace fapi\n";
-print TGFILE "{\n\n";
-print TGFILE "void fapiParseHwpRc(ErrlUsrParser & i_parser,\n";
-print TGFILE "                    void * i_pBuffer,\n";
-print TGFILE "                    const uint32_t i_buflen)\n";
-print TGFILE "{\n";
-print TGFILE "    uint32_t l_rc = ntohl(*(static_cast<uint32_t *>(i_pBuffer)));\n\n";
-print TGFILE "    switch(l_rc)\n";
-print TGFILE "    {\n";
-
-#------------------------------------------------------------------------------
-# For each XML file
-#------------------------------------------------------------------------------
-foreach my $argnum (1 .. $#ARGV)
-{
-    #--------------------------------------------------------------------------
-    # Read XML file
-    #--------------------------------------------------------------------------
-    my $infile = $ARGV[$argnum];
-    my $errors = $xml->XMLin($infile, ForceArray => ['hwpError']);
-
-    # Uncomment to get debug output of all errors
-    #print "\nFile: ", $infile, "\n", Dumper($errors), "\n";
-
-    #--------------------------------------------------------------------------
-    # For each Error
-    #--------------------------------------------------------------------------
-    foreach my $err (@{$errors->{hwpError}})
-    {
-        #----------------------------------------------------------------------
-        # Get the description, remove newlines, leading and trailing spaces and
-        # multiple spaces
-        #----------------------------------------------------------------------
-        my $desc = $err->{description};
-        $desc =~ s/\n/ /g;
-        $desc =~ s/^ +//g;
-        $desc =~ s/ +$//g;
-        $desc =~ s/ +/ /g;
-        $desc =~ s/\"//g;
-
-        #----------------------------------------------------------------------
-        # Print the RC description
-        # Note that this uses the same code to calculate the error enum value
-        # as fapiParseErrorInfo.pl. This code must be kept in sync
-        #----------------------------------------------------------------------
-        my $errHash128Bit = md5_hex($err->{rc});
-        my $errHash24Bit = substr($errHash128Bit, 0, 6);
-
-        print TGFILE "    case 0x$errHash24Bit:\n";
-        print TGFILE "        i_parser.PrintString(\"HwpReturnCode\", \"$err->{rc}\");\n";
-        print TGFILE "        i_parser.PrintString(\"HWP Error description\", \"$desc\");\n";
-        print TGFILE "        break;\n";
-    }
-}
-
-#------------------------------------------------------------------------------
-# Print end of fapiParseHwpRc function
-#------------------------------------------------------------------------------
-print TGFILE "    default:\n";
-print TGFILE "        i_parser.PrintNumber(\"Unrecognized Error ID\", \"0x%x\", l_rc);\n";
-print TGFILE "    }\n";
-print TGFILE "}\n\n";
-
-#------------------------------------------------------------------------------
-# Print start of fapiParseHwpFfdc function
-#------------------------------------------------------------------------------
-print TGFILE "void fapiParseHwpFfdc(ErrlUsrParser & i_parser,\n";
-print TGFILE "                      void * i_pBuffer,\n";
-print TGFILE "                      const uint32_t i_buflen)\n";
-print TGFILE "{\n";
-print TGFILE "    const uint32_t CFAM_DATA_LEN = 4;\n";
-print TGFILE "    const uint32_t SCOM_DATA_LEN = 8;\n";
-print TGFILE "    const uint32_t POS_LEN = 4;\n";
-print TGFILE "    uint8_t * l_pBuffer = static_cast<uint8_t *>(i_pBuffer);\n";
-print TGFILE "    uint32_t l_buflen = i_buflen;\n\n";
-print TGFILE "    // The first uint32_t is the FFDC ID\n";
-print TGFILE "    uint32_t * l_pFfdcId = static_cast<uint32_t *>(i_pBuffer);\n";
-print TGFILE "    uint32_t l_ffdcId = ntohl(*l_pFfdcId);\n";
-print TGFILE "    l_pBuffer += sizeof(l_ffdcId);\n";
-print TGFILE "    l_buflen -= sizeof(l_ffdcId);\n";
-print TGFILE "    switch(l_ffdcId)\n";
-print TGFILE "    {\n";
-
-#------------------------------------------------------------------------------
-# For each XML file
-#------------------------------------------------------------------------------
-foreach my $argnum (1 .. $#ARGV)
-{
-    #--------------------------------------------------------------------------
-    # Read XML file
-    #--------------------------------------------------------------------------
-    my $infile = $ARGV[$argnum];
-    my $errors = $xml->XMLin($infile, ForceArray =>
-        ['hwpError', 'ffdc', 'registerFfdc', 'cfamRegister', 'scomRegister']);
-
-    # Uncomment to get debug output of all errors
-    #print "\nFile: ", $infile, "\n", Dumper($errors), "\n";
-
-    #--------------------------------------------------------------------------
-    # If it is an FFDC section resulting from a <hwpError><ffdc> element, print
-    # out the FFDC name and hexdump the data
-    #--------------------------------------------------------------------------
-    foreach my $err (@{$errors->{hwpError}})
-    {
-        foreach my $ffdc (@{$err->{ffdc}})
-        {
-            #------------------------------------------------------------------
-            # Figure out the FFDC ID stored in the data. This is calculated in
-            # the same way as fapiParseErrorInfo.pl. This code must be kept in
-            # sync
-            #------------------------------------------------------------------
-            my $ffdcName = $err->{rc} . "_" . $ffdc;
-            my $ffdcHash128Bit = md5_hex($ffdcName);
-            my $ffdcHash32Bit = substr($ffdcHash128Bit, 0, 8);
-
-            print TGFILE "    case 0x$ffdcHash32Bit:\n";
-            print TGFILE "        i_parser.PrintString(\"HwpReturnCode\", \"$err->{rc}\");\n";
-            print TGFILE "        i_parser.PrintString(\"FFDC:\", \"$ffdc\");\n";
-            print TGFILE "        if (l_buflen) ";
-            print TGFILE "{i_parser.PrintHexDump(l_pBuffer, l_buflen);}\n";
-            print TGFILE "        break;\n";
-        }
-    }
-
-    #--------------------------------------------------------------------------
-    # If it is an FFDC section resulting from a <registerFfdc> element, print
-    # out the ID and walk through the registers, printing each out
-    #--------------------------------------------------------------------------
-    foreach my $registerFfdc (@{$errors->{registerFfdc}})
-    {
-        #----------------------------------------------------------------------
-        # Figure out the FFDC ID stored in the data. This is calculated in the
-        # same way as fapiParseErrorInfo.pl. This code must be kept in sync
-        #----------------------------------------------------------------------
-        my $ffdcName = $registerFfdc->{id};
-        my $ffdcHash128Bit = md5_hex($ffdcName);
-        my $ffdcHash32Bit = substr($ffdcHash128Bit, 0, 8);
-        print TGFILE "    case 0x$ffdcHash32Bit:\n";
-        print TGFILE "        i_parser.PrintString(\"Register FFDC:\", \"$ffdcName\");\n";
-        print TGFILE "        while (l_buflen > 0)\n";
-        print TGFILE "        {\n";
-        print TGFILE "            if (l_buflen >= POS_LEN)\n";
-        print TGFILE "            {\n";
-        print TGFILE "                uint32_t * l_pBufferTemp = reinterpret_cast<uint32_t *>(l_pBuffer);\n";
-        print TGFILE "                i_parser.PrintNumber(\"Chip Position:\",\"%X\",ntohl(*l_pBufferTemp));\n";
-        print TGFILE "                l_pBufferTemp = NULL;\n";
-        print TGFILE "                l_pBuffer+= POS_LEN;\n";
-        print TGFILE "                l_buflen -= POS_LEN;\n";
-        print TGFILE "            }\n";
-        foreach my $cfamRegister (@{$registerFfdc->{cfamRegister}})
-        {
-            print TGFILE "            if (l_buflen >= CFAM_DATA_LEN)\n";
-            print TGFILE "            {\n";
-            print TGFILE "                i_parser.PrintString(\"CFAM Register:\", \"$cfamRegister\");\n";
-            print TGFILE "                i_parser.PrintHexDump(l_pBuffer, CFAM_DATA_LEN);\n";
-            print TGFILE "                l_pBuffer+= CFAM_DATA_LEN;\n";
-            print TGFILE "                l_buflen -= CFAM_DATA_LEN;\n";
-            print TGFILE "            }\n";
-        }
-        foreach my $scomRegister (@{$registerFfdc->{scomRegister}})
-        {
-
-            print TGFILE "            if (l_buflen >= SCOM_DATA_LEN)\n";
-            print TGFILE "            {\n";
-            print TGFILE "                i_parser.PrintString(\"SCOM Register:\", \"$scomRegister\");\n";
-            print TGFILE "                i_parser.PrintHexDump(l_pBuffer, SCOM_DATA_LEN);\n";
-            print TGFILE "                l_pBuffer+= SCOM_DATA_LEN;\n";
-            print TGFILE "                l_buflen -= SCOM_DATA_LEN;\n";
-            print TGFILE "            }\n";
-        }
-        print TGFILE "        }\n";
-        print TGFILE "        break;\n";
-    }
-}
-
-#------------------------------------------------------------------------------
-# Print end of fapiParseHwpFfdc function
-#------------------------------------------------------------------------------
-print TGFILE "    default:\n";
-print TGFILE "        i_parser.PrintNumber(\"Unrecognized FFDC\", \"0x%x\", l_ffdcId);\n";
-print TGFILE "        if (l_buflen) ";
-print TGFILE "{i_parser.PrintHexDump(l_pBuffer, l_buflen);}\n";
-print TGFILE "    }\n\n";
-print TGFILE "}\n\n";
-
-#------------------------------------------------------------------------------
-# Print end of file info
-#------------------------------------------------------------------------------
-print TGFILE "}\n\n";
-print TGFILE "#endif\n";
-print TGFILE "#endif\n";
-
-#------------------------------------------------------------------------------
-# Close output file
-#------------------------------------------------------------------------------
-close(TGFILE);
-
diff --git a/src/usr/hwpf/plat/fapiPlatHwAccess.C b/src/usr/hwpf/plat/fapiPlatHwAccess.C
deleted file mode 100644
index 28e313697..000000000
--- a/src/usr/hwpf/plat/fapiPlatHwAccess.C
+++ /dev/null
@@ -1,736 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/plat/fapiPlatHwAccess.C $                        */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/**
- *  @file fapiPlatHwAccess.C
- *
- *  @brief Implements the fapiHwAccess.H functions.
- *
- *  Note that platform code must provide the implementation.
- */
-
-#include <fapiHwAccess.H>
-#include <fapiPlatTrace.H>
-#include <fapiPlatHwAccess.H>
-#include <isteps/hwpf_reasoncodes.H>
-#include <errl/errlentry.H>
-#include <devicefw/userif.H>
-#include <ecmdDataBufferBase.H>
-#include <targeting/common/predicates/predicates.H>
-#include <targeting/common/targetservice.H>
-#include <scan/scanif.H>
-
-extern "C"
-{
-
-// Function prototypes
-uint64_t platGetDDScanMode(const uint32_t i_ringMode);
-
-
-//******************************************************************************
-// platGetScom function, the platform implementation
-//******************************************************************************
-fapi::ReturnCode platGetScom(const fapi::Target& i_target,
-                             const uint64_t i_address,
-                             ecmdDataBufferBase & o_data)
-{
-    FAPI_DBG(ENTER_MRK "platGetScom");
-
-    fapi::ReturnCode l_rc;
-    errlHndl_t l_err = NULL;
-    uint32_t l_ecmdRc = ECMD_DBUF_SUCCESS;
-
-    // Extract the component pointer
-    TARGETING::Target* l_target =
-            reinterpret_cast<TARGETING::Target*>(i_target.get());
-
-    // Perform SCOM read
-    uint64_t l_data = 0;
-    size_t l_size = sizeof(uint64_t);
-
-    l_err = deviceRead(l_target,
-                       &l_data,
-                       l_size,
-                       DEVICE_SCOM_ADDRESS(i_address));
-    if (l_err)
-    {
-        // Add the error log pointer as data to the ReturnCode
-        l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-    }
-    else
-    {
-        // Set buffer to 64-bit long to store data
-        l_ecmdRc = o_data.setBitLength(64);
-        if (l_ecmdRc == ECMD_DBUF_SUCCESS)
-        {
-            l_ecmdRc = o_data.setDoubleWord(0, l_data);
-        }
-
-        if (l_ecmdRc)
-        {
-            FAPI_ERR("platGetScom: ecmdDataBufferBase setBitLength() or setDoubleWord() returns error, ecmdRc 0x%.8X",
-                    l_ecmdRc);
-            l_rc.setEcmdError(l_ecmdRc);
-        }
-    }
-
-    FAPI_DBG(EXIT_MRK "platGetScom");
-    return l_rc;
-}
-
-//******************************************************************************
-// platPutScom function
-//******************************************************************************
-fapi::ReturnCode platPutScom(const fapi::Target& i_target,
-                             const uint64_t i_address,
-                             ecmdDataBufferBase & i_data)
-{
-    FAPI_DBG(ENTER_MRK "platPutScom");
-    fapi::ReturnCode l_rc;
-    errlHndl_t l_err = NULL;
-
-    // Extract the component pointer
-    TARGETING::Target* l_target =
-            reinterpret_cast<TARGETING::Target*>(i_target.get());
-
-    // Perform SCOM write
-    uint64_t l_data = i_data.getDoubleWord(0);
-    size_t l_size = sizeof(uint64_t);
-    l_err = deviceWrite(l_target,
-                        &l_data,
-                        l_size,
-                        DEVICE_SCOM_ADDRESS(i_address));
-    if (l_err)
-    {
-        // Add the error log pointer as data to the ReturnCode
-        l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-    }
-
-    FAPI_DBG(EXIT_MRK "platPutScom");
-    return l_rc;
-}
-
-//******************************************************************************
-// platPutScomUnderMask function
-//******************************************************************************
-fapi::ReturnCode platPutScomUnderMask(const fapi::Target& i_target,
-                                      const uint64_t i_address,
-                                      ecmdDataBufferBase & i_data,
-                                      ecmdDataBufferBase & i_mask)
-{
-    FAPI_DBG(ENTER_MRK "platPutScomUnderMask");
-    fapi::ReturnCode l_rc;
-    errlHndl_t l_err = NULL;
-
-    // Extract the component pointer
-    TARGETING::Target* l_target =
-            reinterpret_cast<TARGETING::Target*>(i_target.get());
-
-    do
-    {
-        // Get current value from HW
-        uint64_t l_data = 0;
-        size_t l_size = sizeof(uint64_t);
-        l_err = deviceRead(l_target,
-                           &l_data,
-                           l_size,
-                           DEVICE_SCOM_ADDRESS(i_address));
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-            break;
-        }
-
-        // Calculate new value to write to reg
-        uint64_t l_inData = i_data.getDoubleWord(0); // Data to write
-        uint64_t l_inMask = i_mask.getDoubleWord(0); // Write mask
-        uint64_t l_inMaskInverted = ~(l_inMask);     // Write mask inverted
-        uint64_t l_newMask = (l_inData & l_inMask);  // Retain set data bits
-
-        // l_data = current data set bits
-        l_data &= l_inMaskInverted;
-
-        // l_data = current data set bit + set mask bits
-        l_data |= l_newMask;
-
-        // Write new value
-        l_err = deviceWrite(l_target,
-                            &l_data,
-                            l_size,
-                            DEVICE_SCOM_ADDRESS(i_address));
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-            break;
-        }
-
-    }
-    while(0);
-
-    FAPI_DBG(EXIT_MRK "platPutScomUnderMask");
-    return l_rc;
-}
-
-/****************************************************************************
- *  @brief Verify target of a cfam access
- *         We can't access the cfam engine of the master processor.
- *         Only allow access to the other processors.
- *         This function will return an error if the input target is
- *         the boot processor.
- *
- *  @param[in]  i_target        The target where cfam access is called on.
- *  @param[in]  i_address       CFAM Address being accessed
- *
- *  @return errlHndl_t if target is a processor, NULL otherwise.
- ****************************************************************************/
-static errlHndl_t verifyCfamAccessTarget(const fapi::Target& i_target,
-                                         uint32_t i_address)
-{
-    errlHndl_t l_err = NULL;
-
-    // Can't access cfam engine on the master processor
-    if (i_target.getType() == fapi::TARGET_TYPE_PROC_CHIP)
-    {
-        TARGETING::Target* l_pMasterProcChip = NULL;
-        TARGETING::targetService().
-            masterProcChipTargetHandle( l_pMasterProcChip );
-
-        TARGETING::Target* l_pTarget =
-            reinterpret_cast<TARGETING::Target*>(i_target.get());
-
-        if( l_pMasterProcChip == l_pTarget )
-        {
-            FAPI_ERR("verifyCfamAccessTarget: Attempt to access CFAM register %.8X on the master processor chip",
-                     i_address);
-
-            /*@
-             * @errortype
-             * @moduleid     fapi::MOD_VERIFY_CFAM_ACCESS_TARGET
-             * @reasoncode   fapi::RC_CFAM_ACCESS_ON_PROC_ERR
-             * @userdata1    Target HUID
-             * @userdata2    CFAM address being accessed
-             * @devdesc      Attempt to access CFAM register on
-             *               the master processor chip
-             */
-            const bool hbSwError = true;
-            l_err = new ERRORLOG::ErrlEntry(
-                            ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                            fapi::MOD_VERIFY_CFAM_ACCESS_TARGET,
-                            fapi::RC_CFAM_ACCESS_ON_PROC_ERR,
-                            TARGETING::get_huid(l_pMasterProcChip),
-                            i_address, hbSwError);
-        }
-    }
-
-    return l_err;
-}
-
-/****************************************************************************
- *  @brief Get chip target for cfam access
- *         HW procedures may pass in non-chip targets (such as MBA or
- *         MBS as a target), so we need to find the parent chip in order
- *         to pass it to the device driver.
- *
- *  @param[in]  i_target        The target as passed in by the procedure.
- *
- *  @return errlHndl_t if can't find parent, NULL otherwise.
- ****************************************************************************/
-static errlHndl_t getCfamChipTarget(const TARGETING::Target* i_target,
-                                    TARGETING::Target*& o_chipTarget)
-{
-    errlHndl_t l_err = NULL;
-
-    // Default to input target
-    o_chipTarget = const_cast<TARGETING::Target*>(i_target);
-
-    // Check to see if this is a chiplet
-    if (i_target->getAttr<TARGETING::ATTR_CLASS>() == TARGETING::CLASS_UNIT)
-    {
-        // Look for its chip parent
-        TARGETING::PredicateCTM l_chipClass(TARGETING::CLASS_CHIP);
-        TARGETING::TargetHandleList l_list;
-        TARGETING::TargetService& l_targetService = TARGETING::targetService();
-        (void) l_targetService.getAssociated(
-                l_list,
-                i_target,
-                TARGETING::TargetService::PARENT,
-                TARGETING::TargetService::ALL,
-                &l_chipClass);
-
-        if ( l_list.size() == 1 )
-        {
-            o_chipTarget = l_list[0];
-        }
-        else
-        {
-            // Something is wrong here, can't have more than one parent chip
-            FAPI_ERR("getCfamChipTarget: Invalid number of parent chip for this target chiplet - # parent chips %d", l_list.size());
-            /*@
-             * @errortype
-             * @moduleid     fapi::MOD_GET_CFAM_CHIP_TARGET
-             * @reasoncode   fapi::RC_INVALID_NUM_PARENT_CHIP
-             * @userdata1    Number of parent chip found
-             * @userdata2    Chiplet HUID
-             * @devdesc      Invalid num of parent chip found for input CFAM target chiplet
-             */
-            const bool hbSwError = true;
-            l_err = new ERRORLOG::ErrlEntry(
-                        ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                        fapi::MOD_GET_CFAM_CHIP_TARGET,
-                        fapi::RC_INVALID_NUM_PARENT_CHIP,
-                        l_list.size(),
-                        TARGETING::get_huid(i_target),
-                        hbSwError);
-        }
-    }
-    return l_err;
-}
-
-//******************************************************************************
-// platGetCfamRegister function
-//******************************************************************************
-fapi::ReturnCode platGetCfamRegister(const fapi::Target& i_target,
-                                     const uint32_t i_address,
-                                     ecmdDataBufferBase & o_data)
-{
-    FAPI_DBG(ENTER_MRK "platGetCfamRegister");
-    fapi::ReturnCode l_rc;
-    errlHndl_t l_err = NULL;
-    uint32_t l_ecmdRc = ECMD_DBUF_SUCCESS;
-
-    do
-    {
-        // Can't access cfam engine on master processor
-        l_err = verifyCfamAccessTarget(i_target,i_address);
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-            break;
-        }
-
-        // Extract the component pointer
-        TARGETING::Target* l_target =
-                reinterpret_cast<TARGETING::Target*>(i_target.get());
-
-        // Get the chip target if l_target is not a chip
-        TARGETING::Target* l_myChipTarget = NULL;
-        l_err = getCfamChipTarget(l_target, l_myChipTarget);
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-            break;
-        }
-
-        // Perform CFAM read via FSI
-        // Address needs to be multiply by 4 because register addresses are word
-        // offsets but the FSI addresses are byte offsets.
-        // However, we need to preserve the engine's offset of 0x0C00 and 0x1000.
-        uint64_t l_addr = ((i_address & 0x003F) << 2) | (i_address & 0xFF00);
-        uint32_t l_data = 0;
-        size_t l_size = sizeof(uint32_t);
-        l_err = deviceRead(l_myChipTarget,
-                           &l_data,
-                           l_size,
-                           DEVICE_FSI_ADDRESS(l_addr));
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-            break;
-        }
-
-        // Set buffer to 32-bit long to store data
-        l_ecmdRc = o_data.setBitLength(32);
-        if (l_ecmdRc == ECMD_DBUF_SUCCESS)
-        {
-            l_ecmdRc = o_data.setWord(0, l_data);
-        }
-        if (l_ecmdRc)
-        {
-            FAPI_ERR("platGetCfamRegister: ecmdDataBufferBase setBitLength()"
-                     " or setWord() returns error, ecmdRc 0x%.8X",
-                     l_ecmdRc);
-            l_rc.setEcmdError(l_ecmdRc);
-        }
-
-    } while(0);
-
-    FAPI_DBG(EXIT_MRK "platGetCfamRegister");
-    return l_rc;
-}
-
-//******************************************************************************
-// platPutCfamRegister function
-//******************************************************************************
-fapi::ReturnCode platPutCfamRegister(const fapi::Target& i_target,
-                                     const uint32_t i_address,
-                                     ecmdDataBufferBase & i_data)
-{
-    FAPI_DBG(ENTER_MRK "platPutCfamRegister");
-    fapi::ReturnCode l_rc;
-    errlHndl_t l_err = NULL;
-
-    do
-    {
-        // Can't access cfam engine on master processor
-        l_err = verifyCfamAccessTarget(i_target,i_address);
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-            break;
-        }
-
-        // Extract the component pointer
-        TARGETING::Target* l_target =
-                reinterpret_cast<TARGETING::Target*>(i_target.get());
-
-        TARGETING::Target* l_myChipTarget = NULL;
-        // Get the chip target if l_target is not a chip
-        l_err = getCfamChipTarget(l_target, l_myChipTarget);
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-            break;
-        }
-
-        // Perform CFAM write via FSI
-        // Address needs to be multiply by 4 because register addresses are word
-        // offsets but the FSI addresses are byte offsets
-        // However, we need to preserve the engine's offset of 0x0C00 and 0x1000.
-        uint64_t l_addr = ((i_address & 0x003F) << 2) | (i_address & 0xFF00);
-        uint32_t l_data = i_data.getWord(0);
-        size_t l_size = sizeof(uint32_t);
-        l_err = deviceWrite(l_myChipTarget,
-                            &l_data,
-                            l_size,
-                            DEVICE_FSI_ADDRESS(l_addr));
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-            break;
-        }
-
-    } while (0);
-
-    FAPI_DBG(EXIT_MRK "platPutCfamRegister");
-    return l_rc;
-}
-
-/****************************************************************************
- * @brief   Modifying input 32-bit data with the specified mode
- *
- * This method modify 32-bit input data (io_modifiedData) by applying the
- * specified modify mode along with the input data (i_origData).
- *
- * @param[in]  i_modifyMode         Modification mode
- * @param[in]  i_origData           32-bit data to be used for modification
- * @param[out] io_modifiedData      32-bit data to be modified
- *
- * @return void
- *
- ****************************************************************************/
-void platProcess32BitModifyMode(const fapi::ChipOpModifyMode i_modifyMode,
-                                const uint32_t i_origDataBuf,
-                                uint32_t& io_modifiedData)
-{
-
-    // OR operation
-    if (fapi::CHIP_OP_MODIFY_MODE_OR == i_modifyMode)
-    {
-        io_modifiedData |= i_origDataBuf;
-    }
-    // AND operation
-    else if (fapi::CHIP_OP_MODIFY_MODE_AND == i_modifyMode)
-    {
-        io_modifiedData &= i_origDataBuf;
-    }
-    // Must be XOR operation
-    else
-    {
-        io_modifiedData ^= i_origDataBuf;
-    }
-
-    return;
-}
-
-//******************************************************************************
-// platModifyCfamRegister function
-//******************************************************************************
-fapi::ReturnCode platModifyCfamRegister(const fapi::Target& i_target,
-                                    const uint32_t i_address,
-                                    ecmdDataBufferBase& i_data,
-                                    const fapi::ChipOpModifyMode i_modifyMode)
-{
-    FAPI_DBG(ENTER_MRK "platModifyCfamRegister");
-    fapi::ReturnCode l_rc;
-    errlHndl_t l_err = NULL;
-
-    do
-    {
-        // Can't access cfam engine on master processor
-        l_err = verifyCfamAccessTarget(i_target,i_address);
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-            break;
-        }
-
-        // Extract the component pointer
-        TARGETING::Target* l_target =
-                reinterpret_cast<TARGETING::Target*>(i_target.get());
-
-        // Get the chip target if l_target is not a chip
-        TARGETING::Target* l_myChipTarget = NULL;
-        l_err = getCfamChipTarget(l_target, l_myChipTarget);
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-            break;
-        }
-
-        // Read current value
-        // Address needs to be multiply by 4 because register addresses are word
-        // offsets but the FSI addresses are byte offsets.
-        // However, we need to preserve the engine's offset of 0x0C00 and 0x1000.
-        uint64_t l_addr = ((i_address & 0x003F) << 2) | (i_address & 0xFF00);
-        uint32_t l_data = 0;
-        size_t l_size = sizeof(uint32_t);
-        l_err = deviceRead(l_myChipTarget,
-                           &l_data,
-                           l_size,
-                           DEVICE_FSI_ADDRESS(l_addr));
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-            break;
-        }
-
-        // Applying modification
-        platProcess32BitModifyMode(i_modifyMode, i_data.getWord(0), l_data);
-
-        // Write back
-        l_err = deviceWrite(l_target,
-                            &l_data,
-                            l_size,
-                            DEVICE_FSI_ADDRESS(l_addr));
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-            break;
-        }
-
-    } while (0);
-
-    FAPI_DBG(EXIT_MRK "platModifyCfamRegister");
-    return l_rc;
-}
-
-//******************************************************************************
-// platGetRing function, the platform implementation
-//******************************************************************************
-fapi::ReturnCode platGetRing(const fapi::Target& i_target,
-                             const scanRingId_t i_address,
-                             ecmdDataBufferBase & o_data,
-                             const uint32_t i_ringMode)
-{
-    FAPI_DBG(ENTER_MRK "platGetRing");
-    fapi::ReturnCode l_rc;
-    errlHndl_t l_err = NULL;
-
-    // Extract the component pointer
-    TARGETING::Target* l_target =
-            reinterpret_cast<TARGETING::Target*>(i_target.get());
-
-    // Output buffer must be set to ring's len by user
-    uint64_t l_ringLen = o_data.getBitLength();
-    uint64_t l_flag = platGetDDScanMode(i_ringMode);
-    size_t l_size = o_data.getByteLength();
-    l_err = deviceRead(l_target,
-                 ecmdDataBufferBaseImplementationHelper::getDataPtr(&o_data),
-                 l_size,
-                 DEVICE_SCAN_ADDRESS(i_address, l_ringLen, l_flag));
-    if (l_err)
-    {
-        // Add the error log pointer as data to the ReturnCode
-        l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-    }
-
-    FAPI_DBG(EXIT_MRK "platGetRing");
-    return l_rc;
-}
-
-//******************************************************************************
-// platPutRing function
-//******************************************************************************
-fapi::ReturnCode platPutRing(const fapi::Target& i_target,
-                             const scanRingId_t i_address,
-                             ecmdDataBufferBase & i_data,
-                             const uint32_t i_ringMode)
-{
-
-    FAPI_DBG(ENTER_MRK "platPutRing");
-    fapi::ReturnCode l_rc;
-    errlHndl_t l_err = NULL;
-
-    // Extract the component pointer
-    TARGETING::Target* l_target =
-            reinterpret_cast<TARGETING::Target*>(i_target.get());
-
-    // Output buffer must be set to ring's len by user
-    uint64_t l_ringLen = i_data.getBitLength();
-    uint64_t l_flag = platGetDDScanMode(i_ringMode);
-    size_t l_size = i_data.getByteLength();
-    l_err = deviceWrite(l_target,
-                 ecmdDataBufferBaseImplementationHelper::getDataPtr(&i_data),
-                 l_size,
-                 DEVICE_SCAN_ADDRESS(i_address, l_ringLen, l_flag));
-    if (l_err)
-    {
-        // Add the error log pointer as data to the ReturnCode
-        l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-    }
-
-    FAPI_DBG(EXIT_MRK "platPutRing");
-    return l_rc;
-}
-
-//******************************************************************************
-// platModifyRing function
-//******************************************************************************
-fapi::ReturnCode platModifyRing(const fapi::Target& i_target,
-                             const scanRingId_t i_address,
-                             ecmdDataBufferBase & i_data,
-                             const fapi::ChipOpModifyMode i_modifyMode,
-                             const uint32_t i_ringMode)
-{
-    FAPI_DBG(ENTER_MRK "platModifyRing");
-    fapi::ReturnCode l_rc;
-    errlHndl_t l_err = NULL;
-    uint32_t l_ecmdRc = ECMD_DBUF_SUCCESS;
-
-    do
-    {
-        // Extract the component pointer
-        TARGETING::Target* l_target =
-                reinterpret_cast<TARGETING::Target*>(i_target.get());
-
-        // --------------------
-        // Read current value
-        // --------------------
-        uint64_t l_ringLen = i_data.getBitLength();
-        ecmdDataBufferBase l_modifiedRingBuffer(l_ringLen);
-        uint64_t l_flag = platGetDDScanMode(i_ringMode);
-        size_t l_size = l_modifiedRingBuffer.getByteLength();
-        l_err = deviceRead(l_target,
-                     ecmdDataBufferBaseImplementationHelper::getDataPtr(
-                                     &l_modifiedRingBuffer),
-                     l_size,
-                     DEVICE_SCAN_ADDRESS(i_address, l_ringLen, l_flag));
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-        }
-
-        // ----------------------
-        // Applying modification
-        // ----------------------
-        if (fapi::CHIP_OP_MODIFY_MODE_OR == i_modifyMode)
-        {
-            l_ecmdRc = l_modifiedRingBuffer.setOr(i_data, 0, l_ringLen);
-        }
-        else if (fapi::CHIP_OP_MODIFY_MODE_AND == i_modifyMode)
-        {
-            l_ecmdRc = l_modifiedRingBuffer.setAnd(i_data, 0, l_ringLen);
-        }
-        else
-        {
-            l_ecmdRc = l_modifiedRingBuffer.setXor(i_data, 0, l_ringLen);
-        }
-
-        if (l_ecmdRc)
-        {
-            FAPI_ERR("platModifyRing: ecmdDataBufferBase operation returns error, ecmdRc 0x%.8X",
-                     l_ecmdRc);
-            l_rc.setEcmdError(l_ecmdRc);
-            break;
-        }
-
-        // ---------------
-        // Write back
-        // ---------------
-        l_err = deviceWrite(l_target,
-                      ecmdDataBufferBaseImplementationHelper::getDataPtr(
-                              &l_modifiedRingBuffer),
-                      l_size,
-                      DEVICE_SCAN_ADDRESS(i_address, l_ringLen, l_flag));
-        if (l_err)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-        }
-
-    } while (0);
-
-    FAPI_DBG(EXIT_MRK "platModifyRing");
-    return l_rc;
-}
-
-//******************************************************************************
-// platPutRing function
-//******************************************************************************
-uint64_t platGetDDScanMode(const uint32_t i_ringMode)
-{
-    fapi::ReturnCode l_rc;
-    uint32_t l_scanMode = 0;
-
-    // Set Pulse
-    if (i_ringMode & fapi::RING_MODE_SET_PULSE)
-    {
-        l_scanMode |= SCAN::SET_PULSE;
-    }
-
-    // Header Check
-    if (i_ringMode & fapi::RING_MODE_NO_HEADER_CHECK)
-    {
-        l_scanMode |= SCAN::NO_HEADER_CHECK;
-    }
-
-    return l_scanMode;
-}
-
-
-
-} // extern "C"
diff --git a/src/usr/hwpf/plat/fapiPlatHwpInvoker.C b/src/usr/hwpf/plat/fapiPlatHwpInvoker.C
deleted file mode 100644
index 09a2815df..000000000
--- a/src/usr/hwpf/plat/fapiPlatHwpInvoker.C
+++ /dev/null
@@ -1,784 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/plat/fapiPlatHwpInvoker.C $                      */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/**
- *  @file fapiPlatHwpInvoker.C
- *
- *  @brief Implements the fapiRcToErrl function.
- */
-
-#include <fapiTarget.H>
-#include <fapiReturnCode.H>
-#include <fapiSystemConfig.H>
-#include <fapiPlatTrace.H>
-#include <fapiErrorInfo.H>
-#include <isteps/hwpf_reasoncodes.H>
-#include <errl/errlentry.H>
-#include <targeting/common/utilFilter.H>
-
-namespace fapi
-{
-
-/**
- * @brief Translates a FAPI callout priority to an HWAS callout priority
- *
- * @param[i] i_fapiPri FAPI callout priority
- *
- * @return HWAS callout priority
- */
-HWAS::callOutPriority xlateCalloutPriority(
-    const fapi::CalloutPriorities::CalloutPriority i_fapiPri)
-{
-    // Use the CalloutPriority enum value as an index
-    HWAS::callOutPriority l_priority = HWAS::SRCI_PRIORITY_HIGH;
-    size_t l_index = i_fapiPri;
-
-    const HWAS::callOutPriority HWAS_PRI[] = {HWAS::SRCI_PRIORITY_LOW,
-                                              HWAS::SRCI_PRIORITY_MED,
-                                              HWAS::SRCI_PRIORITY_HIGH};
-
-    if (l_index < (sizeof(HWAS_PRI)/sizeof(HWAS::callOutPriority)))
-    {
-        l_priority = HWAS_PRI[l_index];
-    }
-    else
-    {
-        FAPI_ERR("fapi::xlateCalloutPriority: Unknown priority 0x%x, assuming HIGH",
-            i_fapiPri);
-    }
-
-    return l_priority;
-}
-
-/**
- * @brief Translates a FAPI Clock HW callout to an HWAS clock callout
- *
- * @param[i] i_fapiClock FAPI Clock HW callout
- *
- * @return HWAS Clock HW callout
- */
-HWAS::clockTypeEnum xlateClockHwCallout(
-    const fapi::HwCallouts::HwCallout i_fapiClock)
-{
-    // Use the HwCallout enum value as an index
-    HWAS::clockTypeEnum l_clock = HWAS::TODCLK_TYPE;
-    size_t l_index = i_fapiClock;
-
-    const HWAS::clockTypeEnum HWAS_CLOCK[] = {
-        HWAS::TODCLK_TYPE,
-        HWAS::MEMCLK_TYPE,
-        HWAS::OSCREFCLK_TYPE,
-        HWAS::OSCPCICLK_TYPE};
-
-    if (l_index < (sizeof(HWAS_CLOCK)/sizeof(HWAS::clockTypeEnum)))
-    {
-        l_clock = HWAS_CLOCK[l_index];
-    }
-    else
-    {
-        FAPI_ERR("fapi::xlateClockHwCallout: Unknown clock 0x%x, assuming TOD",
-            i_fapiClock);
-    }
-
-    return l_clock;
-}
-
-/**
- * @brief Translates a FAPI Part HW callout to an HWAS part callout
- *
- * @param[i] i_fapiPart FAPI part HW callout
- *
- * @return HWAS part HW callout
- */
-HWAS::partTypeEnum xlatePartHwCallout(
-    const fapi::HwCallouts::HwCallout i_fapiPart)
-{
-    // Use the HwCallout enum value as an index
-    HWAS::partTypeEnum l_part;
-
-    // clock xlate function above assumes indexes match
-    // between 2 enums.  seems better to do it explicitly
-
-    switch (i_fapiPart)
-    {
-         case HwCallouts::FLASH_CONTROLLER_PART:
-               l_part = HWAS::FLASH_CONTROLLER_PART_TYPE;
-               break;
-         case HwCallouts::PNOR_PART:
-               l_part = HWAS::PNOR_PART_TYPE;
-               break;
-         case HwCallouts::SBE_SEEPROM_PART:
-               l_part = HWAS::SBE_SEEPROM_PART_TYPE;
-               break;
-         case HwCallouts::VPD_PART:
-               l_part = HWAS::VPD_PART_TYPE;
-               break;
-         case HwCallouts::LPC_SLAVE_PART:
-               l_part = HWAS::LPC_SLAVE_PART_TYPE;
-               break;
-         case HwCallouts::GPIO_EXPANDER_PART:
-               l_part = HWAS::GPIO_EXPANDER_PART_TYPE;
-               break;
-         case HwCallouts::SPIVID_SLAVE_PART:
-               l_part = HWAS::SPIVID_SLAVE_PART_TYPE;
-               break;
-
-         default:
-               FAPI_ERR("fapi::xlatePartHwCallout: Unknown part",
-                 i_fapiPart);
-               l_part = HWAS::NO_PART_TYPE;
-    }
-
-    return l_part;
-}
-/**
- * @brief Translates a FAPI procedure callout to an HWAS procedure callout
- *
- * @param[i] i_fapiProc FAPI procedure callout
- *
- * @return HWAS procedure callout
- */
-HWAS::epubProcedureID xlateProcedureCallout(
-    const fapi::ProcedureCallouts::ProcedureCallout i_fapiProc)
-{
-    // Use the ProcedureCallout enum value as an index
-    HWAS::epubProcedureID l_proc = HWAS::EPUB_PRC_HB_CODE;
-    size_t l_index = i_fapiProc;
-
-    const HWAS::epubProcedureID HWAS_PROC[] = {
-        HWAS::EPUB_PRC_HB_CODE,
-        HWAS::EPUB_PRC_LVL_SUPP,
-        HWAS::EPUB_PRC_MEMORY_PLUGGING_ERROR,
-        HWAS::EPUB_PRC_EIBUS_ERROR};
-
-    if (l_index < (sizeof(HWAS_PROC)/sizeof(HWAS::epubProcedureID)))
-    {
-        l_proc = HWAS_PROC[l_index];
-    }
-    else
-    {
-        FAPI_ERR("fapi::xlateProcedureCallout: Unknown proc 0x%x, assuming CODE",
-            i_fapiProc);
-    }
-
-    return l_proc;
-}
-
-/**
- * @brief Translates a FAPI target type to a Targeting target type
- *
- * @param[i] i_targetType FAPI target type
- * @param[o] o_class      Targeting class
- * @param[o] o_type       Targeting type
- */
-void xlateTargetType(const fapi::TargetType i_targetType,
-                     TARGETING::CLASS & o_class,
-                     TARGETING::TYPE & o_type)
-{
-    switch (i_targetType)
-    {
-    case fapi::TARGET_TYPE_SYSTEM:
-        o_class = TARGETING::CLASS_SYS;
-        o_type = TARGETING::TYPE_SYS;
-        break;
-    case fapi::TARGET_TYPE_DIMM:
-        o_class = TARGETING::CLASS_LOGICAL_CARD;
-        o_type = TARGETING::TYPE_DIMM;
-        break;
-    case fapi::TARGET_TYPE_PROC_CHIP:
-        o_class = TARGETING::CLASS_CHIP;
-        o_type = TARGETING::TYPE_PROC;
-        break;
-    case fapi::TARGET_TYPE_MEMBUF_CHIP:
-        o_class = TARGETING::CLASS_CHIP;
-        o_type = TARGETING::TYPE_MEMBUF;
-        break;
-    case fapi::TARGET_TYPE_EX_CHIPLET:
-        o_class = TARGETING::CLASS_UNIT;
-        o_type = TARGETING::TYPE_EX;
-        break;
-    case fapi::TARGET_TYPE_MBA_CHIPLET:
-        o_class = TARGETING::CLASS_UNIT;
-        o_type = TARGETING::TYPE_MBA;
-        break;
-    case fapi::TARGET_TYPE_MCS_CHIPLET:
-        o_class = TARGETING::CLASS_UNIT;
-        o_type = TARGETING::TYPE_MCS;
-        break;
-    case fapi::TARGET_TYPE_XBUS_ENDPOINT:
-        o_class = TARGETING::CLASS_UNIT;
-        o_type = TARGETING::TYPE_XBUS;
-        break;
-    case fapi::TARGET_TYPE_ABUS_ENDPOINT:
-        o_class = TARGETING::CLASS_UNIT;
-        o_type = TARGETING::TYPE_ABUS;
-        break;
-    case fapi::TARGET_TYPE_L4:
-        o_class = TARGETING::CLASS_UNIT;
-        o_type = TARGETING::TYPE_L4;
-        break;
-    default:
-        o_class = TARGETING::CLASS_NA;
-        o_type = TARGETING::TYPE_NA;
-    }
-}
-
-/**
- * @brief Processes any FFDC in the ReturnCode Error Information and adds them
- *        to the error log
- *
- * @param[i] i_errInfo  Reference to ReturnCode Error Information
- * @param[io] io_pError Errorlog Handle
- */
-void processEIFfdcs(const ErrorInfo & i_errInfo,
-                    errlHndl_t io_pError)
-{
-    // Iterate through the FFDC sections, adding each to the error log
-    uint32_t l_size = 0;
-
-    for (ErrorInfo::ErrorInfoFfdcCItr_t l_itr = i_errInfo.iv_ffdcs.begin();
-         l_itr != i_errInfo.iv_ffdcs.end(); ++l_itr)
-    {
-        const void * l_pFfdc = (*l_itr)->getData(l_size);
-        uint32_t l_ffdcId = (*l_itr)->getFfdcId();
-
-        // Add the FFDC ID as the first word, then the FFDC data
-        FAPI_DBG("processEIFfdcs: Adding %d bytes of FFDC (id:0x%08x)", l_size,
-                 l_ffdcId);
-        ERRORLOG::ErrlUD * l_pUD = io_pError->addFFDC(
-            HWPF_COMP_ID, &l_ffdcId, sizeof(l_ffdcId), 1, HWPF_UDT_HWP_FFDC);
-
-        if (l_pUD)
-        {
-            io_pError->appendToFFDC(l_pUD, l_pFfdc, l_size);
-        }
-    }
-}
-
-/**
- * @brief Processes any HW callouts requests in the ReturnCode Error
- *        Information and adds them to the error log
- *
- * @param[i] i_errInfo  Reference to ReturnCode Error Information
- * @param[io] io_pError Errorlog Handle
- */
-void processEIHwCallouts(const ErrorInfo & i_errInfo,
-                         errlHndl_t io_pError)
-{
-    // Iterate through the HW callout requests, adding each to the error log
-    for (ErrorInfo::ErrorInfoHwCalloutCItr_t l_itr =
-             i_errInfo.iv_hwCallouts.begin();
-         l_itr != i_errInfo.iv_hwCallouts.end(); ++l_itr)
-    {
-        HWAS::callOutPriority l_priority =
-            xlateCalloutPriority((*l_itr)->iv_calloutPriority);
-
-        HwCallouts::HwCallout l_hw = ((*l_itr)->iv_hw);
-
-        TARGETING::Target * l_pRefTarget =
-            reinterpret_cast<TARGETING::Target*>((*l_itr)->iv_refTarget.get());
-
-        if ( ((l_hw == HwCallouts::TOD_CLOCK) ||
-              (l_hw == HwCallouts::MEM_REF_CLOCK) ||
-              (l_hw == HwCallouts::PROC_REF_CLOCK) ||
-              (l_hw == HwCallouts::PCI_REF_CLOCK)) &&
-             l_pRefTarget != NULL)
-        {
-            HWAS::clockTypeEnum l_clock =
-                xlateClockHwCallout((*l_itr)->iv_hw);
-
-            FAPI_ERR("processEIHwCallouts: Adding clock-callout"
-                     " (clock:%d, pri:%d)",
-                     l_clock, l_priority);
-
-            //@fixme-RTC:127069-add native support to deconfig/gard clocks
-            //  Force PCI clocks to be deconfigured and garded
-            if( l_hw == HwCallouts::PCI_REF_CLOCK )
-            {
-                io_pError->addClockCallout(l_pRefTarget,
-                                           l_clock,
-                                           l_priority,
-                                           HWAS::DECONFIG,
-                                           HWAS::GARD_Predictive);
-            }
-            else
-            {
-                io_pError->addClockCallout(l_pRefTarget, l_clock, l_priority);
-            }
-        }
-        else if ( (l_hw == HwCallouts::FLASH_CONTROLLER_PART) ||
-                  (l_hw == HwCallouts::PNOR_PART) ||
-                  (l_hw == HwCallouts::SBE_SEEPROM_PART) ||
-                  (l_hw == HwCallouts::VPD_PART) ||
-                  (l_hw == HwCallouts::LPC_SLAVE_PART) ||
-                  (l_hw == HwCallouts::GPIO_EXPANDER_PART) ||
-                  (l_hw == HwCallouts::SPIVID_SLAVE_PART) )
-        {
-            HWAS::partTypeEnum l_part =
-                xlatePartHwCallout((*l_itr)->iv_hw);
-
-            FAPI_ERR("processEIHwCallouts: Adding part-callout"
-                     " (part:%d, pri:%d)",
-                     l_part, l_priority);
-            io_pError->addPartCallout(l_pRefTarget, l_part, l_priority);
-        }
-        else
-        {
-            FAPI_ERR("processEIHwCallouts: Unsupported HW callout (%d)", l_hw);
-            io_pError->addPartCallout(l_pRefTarget, HWAS::NO_PART_TYPE,
-                     l_priority);
-            io_pError->addProcedureCallout( HWAS::EPUB_PRC_HB_CODE, l_priority);
-        }
-    }
-}
-
-/**
- * @brief Processes any Procedure callouts requests in the ReturnCode Error
- *        Information and adds them to the error log
- *
- * @param[i] i_errInfo  Reference to ReturnCode Error Information
- * @param[io] io_pError Errorlog Handle
- */
-void processEIProcCallouts(const ErrorInfo & i_errInfo,
-                           errlHndl_t io_pError)
-{
-    // Iterate through the procedure callout requests, adding each to the error
-    // log
-    for (ErrorInfo::ErrorInfoProcedureCalloutCItr_t l_itr =
-             i_errInfo.iv_procedureCallouts.begin();
-         l_itr != i_errInfo.iv_procedureCallouts.end(); ++l_itr)
-    {
-        HWAS::epubProcedureID l_procedure =
-            xlateProcedureCallout((*l_itr)->iv_procedure);
-
-        HWAS::callOutPriority l_priority =
-            xlateCalloutPriority((*l_itr)->iv_calloutPriority);
-
-        FAPI_DBG("processEIProcCallouts: Adding proc-callout"
-                 " (proc:0x%02x, pri:%d)",
-                 l_procedure, l_priority);
-        io_pError->addProcedureCallout(l_procedure, l_priority);
-    }
-}
-
-/**
- * @brief Processes any Bus callouts requests in the ReturnCode Error
- *        Information and adds them to the error log
- *
- * @param[i] i_errInfo  Reference to ReturnCode Error Information
- * @param[io] io_pError Errorlog Handle
- */
-void processEIBusCallouts(const ErrorInfo & i_errInfo,
-                          errlHndl_t io_pError)
-{
-    // Iterate through the bus callout requests, adding each to the error log
-    for (ErrorInfo::ErrorInfoBusCalloutCItr_t l_itr =
-             i_errInfo.iv_busCallouts.begin();
-         l_itr != i_errInfo.iv_busCallouts.end(); ++l_itr)
-    {
-        TARGETING::Target * l_pTarget1 =
-            reinterpret_cast<TARGETING::Target*>((*l_itr)->iv_target1.get());
-
-        TARGETING::Target * l_pTarget2 =
-            reinterpret_cast<TARGETING::Target*>((*l_itr)->iv_target2.get());
-
-        HWAS::callOutPriority l_priority =
-            xlateCalloutPriority((*l_itr)->iv_calloutPriority);
-
-        bool l_busTypeValid = true;
-        HWAS::busTypeEnum l_busType = HWAS::FSI_BUS_TYPE;
-        TARGETING::TYPE l_type1 = l_pTarget1->getAttr<TARGETING::ATTR_TYPE>();
-        TARGETING::TYPE l_type2 = l_pTarget2->getAttr<TARGETING::ATTR_TYPE>();
-
-        if ( ((l_type1 == TARGETING::TYPE_MCS) &&
-              (l_type2 == TARGETING::TYPE_MEMBUF)) ||
-             ((l_type1 == TARGETING::TYPE_MEMBUF) &&
-              (l_type2 == TARGETING::TYPE_MCS)) )
-        {
-            l_busType = HWAS::DMI_BUS_TYPE;
-        }
-        else if ((l_type1 == TARGETING::TYPE_ABUS) &&
-                 (l_type2 == TARGETING::TYPE_ABUS))
-        {
-            l_busType = HWAS::A_BUS_TYPE;
-        }
-        else if ((l_type1 == TARGETING::TYPE_XBUS) &&
-                 (l_type2 == TARGETING::TYPE_XBUS))
-        {
-            l_busType = HWAS::X_BUS_TYPE;
-        }
-        else
-        {
-            FAPI_ERR("processEIBusCallouts: Bus between target types not known (0x%08x:0x%08x)",
-                     l_type1, l_type2);
-            l_busTypeValid = false;
-        }
-
-        if (l_busTypeValid)
-        {
-            FAPI_DBG("processEIBusCallouts: Adding bus-callout"
-                     " (bus:%d, pri:%d)",
-                     l_busType, l_priority);
-            io_pError->addBusCallout(l_pTarget1, l_pTarget2, l_busType,
-                                     l_priority);
-        }
-    }
-}
-
-/**
- * @brief Processes any Callout/Deconfigure/GARD requests in the ReturnCode Error
- *        Information and adds them to the error log
- *
- * @param[i] i_errInfo  Reference to ReturnCode Error Information
- * @param[io] io_pError Errorlog Handle
- */
-void processEICDGs(const ErrorInfo & i_errInfo,
-                   errlHndl_t io_pError)
-{
-    // Iterate through the CGD requests, adding each to the error log
-    for (ErrorInfo::ErrorInfoCDGCItr_t l_itr = i_errInfo.iv_CDGs.begin();
-         l_itr != i_errInfo.iv_CDGs.end(); ++l_itr)
-    {
-        TARGETING::Target * l_pTarget =
-            reinterpret_cast<TARGETING::Target*>((*l_itr)->iv_target.get());
-
-        HWAS::callOutPriority l_priority =
-            xlateCalloutPriority((*l_itr)->iv_calloutPriority);
-
-        HWAS::DeconfigEnum l_deconfig = HWAS::NO_DECONFIG;
-        if ((*l_itr)->iv_deconfigure)
-        {
-            l_deconfig = HWAS::DELAYED_DECONFIG;
-        }
-
-        HWAS::GARD_ErrorType l_gard = HWAS::GARD_NULL;
-        if ((*l_itr)->iv_gard)
-        {
-            l_gard = HWAS::GARD_Unrecoverable;
-        }
-
-        FAPI_DBG("processEICDGs: Calling out target"
-                 " (huid:%.8x, pri:%d, deconf:%d, gard:%d)",
-                 TARGETING::get_huid(l_pTarget), l_priority, l_deconfig,
-                 l_gard);
-        io_pError->addHwCallout(l_pTarget, l_priority, l_deconfig, l_gard);
-    }
-}
-
-/**
- * @brief Returns child targets to Callout/Deconfigure/GARD
- *
- * @param[i] i_parentTarget FAPI Parent Target
- * @param[i] i_childType    FAPI Child Type
- * @param[i] i_childPort    Child Port Number
- *                            For DIMMs: MBA Port Number
- *                            Else unused
- * @param[i] i_childNum     Child Number
- *                            For DIMMs: DIMM Socket Number
- *                            For Chips: Chip Position
- *                            For Chiplets: Chiplet Position
- */
-void getChildTargetsForCDG(const fapi::Target & i_parentTarget,
-                           const fapi::TargetType i_childType,
-                           const uint8_t i_childPort,
-                           const uint8_t i_childNum,
-                           TARGETING::TargetHandleList & o_childTargets)
-{
-    o_childTargets.clear();
-
-    do
-    {
-        // Get the parent TARGETING::Target
-        TARGETING::Target * l_pTargParent =
-            reinterpret_cast<TARGETING::Target *>(i_parentTarget.get());
-
-        if (l_pTargParent == NULL)
-        {
-            FAPI_ERR("getChildTargetsForCDG: NULL Target pointer");
-            break;
-        }
-
-        // Find if the child target type is a dimm, chip or chiplet
-        bool l_childIsDimm = false;
-        bool l_childIsChip = false;
-        bool l_childIsChiplet = false;
-
-        if (i_childType == fapi::TARGET_TYPE_DIMM)
-        {
-            l_childIsDimm = true;
-        }
-        else
-        {
-            l_childIsChip = fapi::Target::isChip(i_childType);
-
-            if (!l_childIsChip)
-            {
-                l_childIsChiplet = fapi::Target::isChiplet(i_childType);
-            }
-        }
-
-        // Translate the FAPI child target type into TARGETING Class/Type
-        TARGETING::CLASS l_targChildClass = TARGETING::CLASS_NA;
-        TARGETING::TYPE l_targChildType = TARGETING::TYPE_NA;
-        xlateTargetType(i_childType, l_targChildClass, l_targChildType);
-
-        if (l_targChildType == TARGETING::TYPE_NA)
-        {
-            FAPI_ERR("getChildTargetsForCDG: Could not xlate child type (0x%08x)",
-                     i_childType);
-            break;
-        }
-
-        // Get the child targets
-        TARGETING::TargetHandleList l_targChildList;
-
-        if (fapi::Target::isPhysParentChild(i_parentTarget.getType(),
-                                            i_childType))
-        {
-            // Child by containment
-            TARGETING::getChildChiplets(l_targChildList, l_pTargParent,
-                                        l_targChildType);
-            FAPI_ERR("getChildTargetsForCDG: Got %d candidate children by containment",
-                     l_targChildList.size());
-        }
-        else
-        {
-            // Assumption is child by affinity
-            TARGETING::getChildAffinityTargets(l_targChildList, l_pTargParent,
-                                               l_targChildClass,
-                                               l_targChildType);
-            FAPI_ERR("getChildTargetsForCDG: Got %d candidate children by affinity",
-                     l_targChildList.size());
-        }
-
-        // Filter out child targets based on type and input port/number
-        for (TARGETING::TargetHandleList::const_iterator
-                l_itr = l_targChildList.begin();
-             l_itr != l_targChildList.end(); ++l_itr)
-        {
-            if (l_childIsDimm)
-            {
-                // Match i_childPort and i_childNum
-                if ( ((i_childPort == ErrorInfoChildrenCDG::ALL_CHILD_PORTS) ||
-                      (i_childPort ==
-                           (*l_itr)->getAttr<TARGETING::ATTR_MBA_PORT>()))
-                &&
-                     ((i_childNum == ErrorInfoChildrenCDG::ALL_CHILD_NUMBERS) ||
-                      (i_childNum ==
-                           (*l_itr)->getAttr<TARGETING::ATTR_MBA_DIMM>())) )
-                {
-                    o_childTargets.push_back(*l_itr);
-                }
-            }
-            else if (l_childIsChip)
-            {
-                // Match i_childNum
-                if ((i_childNum == ErrorInfoChildrenCDG::ALL_CHILD_NUMBERS) ||
-                    (i_childNum ==
-                         (*l_itr)->getAttr<TARGETING::ATTR_POSITION>()))
-                {
-                    o_childTargets.push_back(*l_itr);
-                }
-            }
-            else if (l_childIsChiplet)
-            {
-                // Match i_childNum
-                if ((i_childNum == ErrorInfoChildrenCDG::ALL_CHILD_NUMBERS) ||
-                    (i_childNum ==
-                         (*l_itr)->getAttr<TARGETING::ATTR_CHIP_UNIT>()))
-                {
-                    o_childTargets.push_back(*l_itr);
-                }
-            }
-            else
-            {
-                // Do not match on anything
-                o_childTargets.push_back(*l_itr);
-            }
-        }
-    } while(0);
-}
-
-/**
- * @brief Processes any Children Callout/Deconfigure/GARD requests in the
- *        ReturnCode Error Information and adds them to the error log
- *
- * @param[i] i_errInfo  Reference to ReturnCode Error Information
- * @param[io] io_pError Errorlog Handle
- */
-void processEIChildrenCDGs(const ErrorInfo & i_errInfo,
-                           errlHndl_t io_pError)
-{
-    // Iterate through the Child CGD requests, adding each to the error log
-    for (ErrorInfo::ErrorInfoChildrenCDGCItr_t l_itr =
-             i_errInfo.iv_childrenCDGs.begin();
-         l_itr != i_errInfo.iv_childrenCDGs.end(); ++l_itr)
-    {
-        HWAS::callOutPriority l_priority =
-            xlateCalloutPriority((*l_itr)->iv_calloutPriority);
-
-        HWAS::DeconfigEnum l_deconfig = HWAS::NO_DECONFIG;
-        if ((*l_itr)->iv_deconfigure)
-        {
-            l_deconfig = HWAS::DELAYED_DECONFIG;
-        }
-
-        HWAS::GARD_ErrorType l_gard = HWAS::GARD_NULL;
-        if ((*l_itr)->iv_gard)
-        {
-            l_gard = HWAS::GARD_Unrecoverable;
-        }
-
-        // Get a list of children to callout
-        TARGETING::TargetHandleList l_children;
-        getChildTargetsForCDG((*l_itr)->iv_parent,
-                              (*l_itr)->iv_childType,
-                              (*l_itr)->iv_childPort,
-                              (*l_itr)->iv_childNumber,
-                              l_children);
-
-        // Callout/Deconfigure/GARD each child as appropriate
-        for (TARGETING::TargetHandleList::const_iterator
-                l_itr = l_children.begin();
-                l_itr != l_children.end(); ++l_itr)
-        {
-            FAPI_DBG("processEIChildrenCDGs: Calling out target"
-                     " (huid:%.8x, pri:%d, deconf:%d, gard:%d)",
-                     TARGETING::get_huid(*l_itr), l_priority, l_deconfig,
-                     l_gard);
-            io_pError->addHwCallout(*l_itr, l_priority, l_deconfig, l_gard);
-        }
-    }
-}
-
-//******************************************************************************
-// fapiRcToErrl function. Converts a fapi::ReturnCode to an error log
-//******************************************************************************
-errlHndl_t fapiRcToErrl(ReturnCode & io_rc,
-                        ERRORLOG::errlSeverity_t i_sev)
-{
-    errlHndl_t l_pError = NULL;
-
-    if (io_rc)
-    {
-        // ReturnCode contains an error. Find out which component of the HWPF
-        // created the error
-        ReturnCode::returnCodeCreator l_creator = io_rc.getCreator();
-
-        if (l_creator == ReturnCode::CREATOR_PLAT)
-        {
-            // PLAT error. Release the errlHndl_t
-            FAPI_ERR("fapiRcToErrl: PLAT error: 0x%08x",
-                    static_cast<uint32_t>(io_rc));
-            l_pError = reinterpret_cast<errlHndl_t> (io_rc.releasePlatData());
-        }
-        else if (l_creator == ReturnCode::CREATOR_HWP)
-        {
-            // HWP Error. Create an error log
-            uint32_t l_rcValue = static_cast<uint32_t>(io_rc);
-            FAPI_ERR("fapiRcToErrl: HWP error: 0x%08x", l_rcValue);
-
-            /*@
-             * @errortype
-             * @moduleid     MOD_HWP_RC_TO_ERRL
-             * @reasoncode   RC_HWP_GENERATED_ERROR
-             * @userdata1    RC value from HWP
-             * @userdata2    <unused>
-             * @devdesc      HW Procedure generated error. See User Data.
-             * @custdesc     Error initializing processor/memory subsystem
-             *               during boot. See FRU list for repair actions
-             */
-            l_pError = new ERRORLOG::ErrlEntry(i_sev,
-                                               MOD_HWP_RC_TO_ERRL,
-                                               RC_HWP_GENERATED_ERROR,
-                                               TO_UINT64(l_rcValue));
-
-            // Add the rcValue as FFDC. This will explain what the error was
-            l_pError->addFFDC(HWPF_COMP_ID, &l_rcValue, sizeof(l_rcValue), 1,
-                    HWPF_UDT_HWP_RCVALUE);
-
-            // Get the Error Information Pointer
-            const ErrorInfo * l_pErrorInfo = io_rc.getErrorInfo();
-
-            if (l_pErrorInfo)
-            {
-                // There is error information associated with the ReturnCode
-                processEIFfdcs(*l_pErrorInfo, l_pError);
-                processEIProcCallouts(*l_pErrorInfo, l_pError);
-                processEIBusCallouts(*l_pErrorInfo, l_pError);
-                processEICDGs(*l_pErrorInfo, l_pError);
-                processEIChildrenCDGs(*l_pErrorInfo, l_pError);
-                processEIHwCallouts(*l_pErrorInfo, l_pError);
-            }
-            else
-            {
-                FAPI_ERR("fapiRcToErrl: No Error Information");
-            }
-        }
-        else
-        {
-            // FAPI error. Create an error log
-            FAPI_ERR("fapiRcToErrl: FAPI error: 0x%08x",
-                     static_cast<uint32_t>(io_rc));
-
-            // The errlog reason code is the HWPF compID and the rcValue LSB
-            uint32_t l_rcValue = static_cast<uint32_t>(io_rc);
-            uint16_t l_reasonCode = l_rcValue;
-            l_reasonCode &= 0xff;
-            l_reasonCode |= HWPF_COMP_ID;
-
-            // HostBoot errlog tags for FAPI errors are in hwpfReasonCodes.H
-            l_pError = new ERRORLOG::ErrlEntry(i_sev,
-                                               MOD_FAPI_RC_TO_ERRL,
-                                               l_reasonCode);
-
-            // FAPI may have added Error Information.
-            // Get the Error Information Pointer
-            const ErrorInfo * l_pErrorInfo = io_rc.getErrorInfo();
-
-            if (l_pErrorInfo)
-            {
-                processEIFfdcs(*l_pErrorInfo, l_pError);
-                processEIProcCallouts(*l_pErrorInfo, l_pError);
-                processEIBusCallouts(*l_pErrorInfo, l_pError);
-                processEICDGs(*l_pErrorInfo, l_pError);
-                processEIChildrenCDGs(*l_pErrorInfo, l_pError);
-                processEIHwCallouts(*l_pErrorInfo, l_pError);
-            }
-        }
-
-        // Set the ReturnCode to success, this will delete any ErrorInfo or PLAT
-        // DATA associated with the ReturnCode
-        io_rc = FAPI_RC_SUCCESS;
-
-        // add the fapi traces to the elog
-        l_pError->collectTrace(FAPI_TRACE_NAME, 256 );
-        l_pError->collectTrace(FAPI_IMP_TRACE_NAME, 384 );
-        l_pError->collectTrace(FAPI_SCAN_TRACE_NAME, 256 );
-    }
-
-    return l_pError;
-}
-
-} // End namespace
diff --git a/src/usr/hwpf/plat/fapiPlatMBvpdAccess.C b/src/usr/hwpf/plat/fapiPlatMBvpdAccess.C
deleted file mode 100644
index 184093b4b..000000000
--- a/src/usr/hwpf/plat/fapiPlatMBvpdAccess.C
+++ /dev/null
@@ -1,358 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/plat/fapiPlatMBvpdAccess.C $                     */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/**
- *  @file fapiPlatMBvpdAccess.C
- *
- *  @brief Implements the fapiMBvpdAccess.H functions
- */
-
-#include    <stdint.h>
-#include    <errl/errlentry.H>
-
-//  fapi support
-#include <isteps/hwpf_reasoncodes.H>
-#include <fapiMBvpdAccess.H>
-
-//  MBVPD
-#include <devicefw/userif.H>
-#include <vpd/cvpdenums.H>
-
-
-namespace fapi
-{
-
-//******************************************************************************
-// MBvpdRecordXlate
-// Translates a FAPI MBVPD Record enumerator into a Hostboot MBVPD Record
-// enumerator
-//******************************************************************************
-fapi::ReturnCode MBvpdRecordXlate(const fapi::MBvpdRecord i_fapiRecord,
-                                 CVPD::cvpdRecord & o_hbRecord)
-{
-    // Create a lookup table for converting a FAPI MBVPD record enumerator to a
-    // Hostboot CVPD record enumerator. This is a simple array and relies on
-    // the FAPI record enumerators starting at zero and incrementing.
-    static const CVPD::cvpdRecord
-                  mbvpdFapiRecordToHbRecord[] =
-    {
-        CVPD::VEIR,
-        CVPD::VER0,
-        CVPD::MER0,
-        CVPD::VSPD,
-        CVPD::VINI,
-        CVPD::OPFR,
-        CVPD::VNDR,
-        CVPD::SPDX,
-    };
-    const uint8_t NUM_MBVPD_RECORDS =
-        sizeof(mbvpdFapiRecordToHbRecord)/sizeof(mbvpdFapiRecordToHbRecord[0]);
-
-    fapi::ReturnCode l_rc;
-
-    uint8_t l_index = static_cast<uint8_t>(i_fapiRecord);
-
-    if (l_index >= NUM_MBVPD_RECORDS)
-    {
-        FAPI_ERR("MBvpdRecordXlate: Invalid MBVPD Record: 0x%x", i_fapiRecord);
-        /*@
-         * @errortype
-         * @moduleid     MOD_MBVPD_ACCESS
-         * @reasoncode   RC_INVALID_RECORD
-         * @userdata1    Record enumerator
-         * @devdesc      Attempt to read an MVPD field using an invalid record
-         */
-        const bool hbSwError = true;
-        errlHndl_t l_errl = new ERRORLOG::ErrlEntry(
-            ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-            MOD_MBVPD_ACCESS,
-            RC_INVALID_RECORD,
-            i_fapiRecord, 0, hbSwError);
-
-        // Add the error log pointer as data to the ReturnCode
-        l_rc.setPlatError(reinterpret_cast<void *> (l_errl));
-    }
-    else
-    {
-        o_hbRecord = mbvpdFapiRecordToHbRecord[l_index];
-    }
-
-    return l_rc;
-}
-
-//******************************************************************************
-// MBvpdKeywordXlate
-// Translates a FAPI MBVPD Keyword enumerator into a Hostboot CVPD Keyword
-// enumerator
-//******************************************************************************
-fapi::ReturnCode MBvpdKeywordXlate(const fapi::MBvpdKeyword i_fapiKeyword,
-                                  CVPD::cvpdKeyword & o_hbKeyword)
-{
-    // Create a lookup table for converting a FAPI MBVPD keyword enumerator to a
-    // Hostboot CVPD keyword enumerator. This is a simple array and relies on
-    // the FAPI record enumerators starting at zero and incrementing.
-    static const CVPD::cvpdKeyword
-        mbvpdFapiKeywordToHbKeyword[] =
-    {
-        CVPD::pdI,
-        CVPD::PF,
-        CVPD::MT,
-        CVPD::MR,
-        CVPD::pdA,
-        CVPD::EL,
-        CVPD::LM,
-        CVPD::MW,
-        CVPD::MV,
-        CVPD::AM,
-        CVPD::VZ,
-        CVPD::pdD,
-        CVPD::MX,
-        CVPD::DW,
-        CVPD::PN,
-        CVPD::SN,
-        CVPD::DR,
-        CVPD::CE,
-        CVPD::FN,
-        CVPD::CC,
-        CVPD::HE,
-        CVPD::CT,
-        CVPD::HW,
-        CVPD::VD,
-        CVPD::VN,
-        CVPD::VP,
-        CVPD::VS,
-        CVPD::M0,
-        CVPD::M1,
-        CVPD::M2,
-        CVPD::M3,
-        CVPD::M4,
-        CVPD::M5,
-        CVPD::M6,
-        CVPD::M7,
-        CVPD::M8,
-        CVPD::T1,
-        CVPD::T2,
-        CVPD::T4,
-        CVPD::T5,
-        CVPD::T6,
-        CVPD::T8,
-        CVPD::Q0,
-        CVPD::Q1,
-        CVPD::Q2,
-        CVPD::Q3,
-        CVPD::Q4,
-        CVPD::Q5,
-        CVPD::Q6,
-        CVPD::Q7,
-        CVPD::Q8,
-        CVPD::K0,
-        CVPD::K1,
-        CVPD::K2,
-        CVPD::K3,
-        CVPD::K4,
-        CVPD::K5,
-        CVPD::K6,
-        CVPD::K7,
-        CVPD::K8,
-        CVPD::MM,
-        CVPD::SS,
-        CVPD::ET,
-        CVPD::VM,
-        CVPD::pd1,
-        CVPD::pdZ,
-        CVPD::pd4,
-        CVPD::pd5,
-        CVPD::pd6,
-        CVPD::pd8,
-        CVPD::pdY,
-    };
-    const uint8_t NUM_MBVPD_KEYWORDS =
-     sizeof(mbvpdFapiKeywordToHbKeyword)/sizeof(mbvpdFapiKeywordToHbKeyword[0]);
-
-    fapi::ReturnCode l_rc;
-
-    uint8_t l_index = static_cast<uint8_t>(i_fapiKeyword);
-
-    if (l_index >= NUM_MBVPD_KEYWORDS)
-    {
-        FAPI_ERR("MbvpdKeywordXlate: Invalid MVPD Keyword: 0x%x",
-                i_fapiKeyword);
-        /*@
-         * @errortype
-         * @moduleid     MOD_MBVPD_ACCESS
-         * @reasoncode   RC_INVALID_KEYWORD
-         * @userdata1    Keyword enumerator
-         * @devdesc      Attempt to read an MVPD field using an invalid keyword
-         */
-        const bool hbSwError = true;
-        errlHndl_t l_errl = new ERRORLOG::ErrlEntry(
-            ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-            MOD_MBVPD_ACCESS,
-            RC_INVALID_KEYWORD,
-            i_fapiKeyword, 0, hbSwError);
-
-        // Add the error log pointer as data to the ReturnCode
-        l_rc.setPlatError(reinterpret_cast<void *> (l_errl));
-    }
-    else
-    {
-        o_hbKeyword = mbvpdFapiKeywordToHbKeyword[l_index];
-    }
-
-    return l_rc;
-}
-
-}
-
-extern "C"
-{
-
-//******************************************************************************
-// fapiGetMBvpdField
-//******************************************************************************
-fapi::ReturnCode fapiGetMBvpdField(const fapi::MBvpdRecord i_record,
-                                  const fapi::MBvpdKeyword i_keyword,
-                                  const fapi::Target &i_memBufTarget,
-                                  uint8_t * const i_pBuffer,
-                                  uint32_t &io_fieldSize)
-{
-    fapi::ReturnCode l_rc;
-    FAPI_DBG("fapiGetMBvpdField entry");
-
-    do
-    {
-        // Translate the FAPI record to a Hostboot record
-        CVPD::cvpdRecord l_hbRecord = CVPD::CVPD_INVALID_RECORD;
-
-        l_rc = fapi::MBvpdRecordXlate(i_record, l_hbRecord);
-
-        if (l_rc)
-        {
-            break;
-        }
-
-        // Translate the FAPI keyword to a Hostboot keyword
-        CVPD::cvpdKeyword l_hbKeyword = CVPD::CVPD_INVALID_KEYWORD;
-
-        l_rc = fapi::MBvpdKeywordXlate(i_keyword, l_hbKeyword);
-
-        if (l_rc)
-        {
-            break;
-        }
-
-        // Similarly to this function, deviceRead will return the size of the
-        // field if the pointer is NULL
-        size_t l_fieldLen = io_fieldSize;
-
-        errlHndl_t l_errl = deviceRead(
-            reinterpret_cast< TARGETING::Target*>(i_memBufTarget.get()),
-            i_pBuffer,
-            l_fieldLen,
-            DEVICE_CVPD_ADDRESS(l_hbRecord, l_hbKeyword));
-
-        if (l_errl)
-        {
-            FAPI_ERR("fapGetMBvpdField: ERROR: deviceRead : errorlog PLID=0x%x",
-                     l_errl->plid());
-
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_errl));
-
-            break;
-        }
-
-        // Success, update callers io_fieldSize for the case where the pointer
-        // is NULL and deviceRead returned the actual size
-        io_fieldSize = l_fieldLen;
-        FAPI_DBG("fapGetMBvpdField: returning field len=0x%x", io_fieldSize);
-
-    } while(0);
-
-    FAPI_DBG( "fapGetMBvpdField: exit" );
-
-    return  l_rc;
-}
-
-//******************************************************************************
-// fapSetMBvpdField
-//******************************************************************************
-fapi::ReturnCode fapiSetMBvpdField(const fapi::MBvpdRecord i_record,
-                                  const fapi::MBvpdKeyword i_keyword,
-                                  const fapi::Target &i_memBufTarget,
-                                  const uint8_t * const i_pBuffer,
-                                  const uint32_t i_fieldSize)
-{
-    fapi::ReturnCode l_rc;
-    FAPI_DBG("fapiSetMBvpdField entry");
-
-    do
-    {
-        // Translate the FAPI record to a Hostboot record
-        CVPD::cvpdRecord l_hbRecord = CVPD::CVPD_INVALID_RECORD;
-
-        l_rc = fapi::MBvpdRecordXlate(i_record, l_hbRecord);
-
-        if (l_rc)
-        {
-            break;
-        }
-
-        // Translate the FAPI keyword to a Hostboot keyword
-        CVPD::cvpdKeyword l_hbKeyword = CVPD::CVPD_INVALID_KEYWORD;
-
-        l_rc = fapi::MBvpdKeywordXlate(i_keyword, l_hbKeyword);
-
-        if (l_rc)
-        {
-            break;
-        }
-
-        size_t l_fieldLen = i_fieldSize;
-
-        errlHndl_t l_errl = deviceWrite(
-            reinterpret_cast< TARGETING::Target*>(i_memBufTarget.get()),
-            const_cast<uint8_t *>(i_pBuffer),
-            l_fieldLen,
-            DEVICE_CVPD_ADDRESS(l_hbRecord, l_hbKeyword));
-
-        if (l_errl)
-        {
-            FAPI_ERR("fapSetMBvpdField: ERROR:deviceWrite : errorlog PLID=0x%x",
-                     l_errl->plid());
-
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_errl));
-
-            break;
-        }
-
-    } while(0);
-
-    FAPI_DBG( "fapSetMBvpdField: exit" );
-
-    return  l_rc;
-}
-
-} // extern "C"
diff --git a/src/usr/hwpf/plat/fapiPlatMvpdAccess.C b/src/usr/hwpf/plat/fapiPlatMvpdAccess.C
deleted file mode 100644
index ce2b5b6fc..000000000
--- a/src/usr/hwpf/plat/fapiPlatMvpdAccess.C
+++ /dev/null
@@ -1,1694 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/plat/fapiPlatMvpdAccess.C $                      */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/**
- *  @file fapiPlatMvpdAccess.C
- *
- *  @brief Implements the fapiMvpdAccess.H functions
- */
-
-#include    <stdint.h>
-#include    <errl/errlentry.H>
-#include    <freqVoltageSvc.H>
-
-//  fapi support
-#include <fapiAttributeService.H>
-#include <fapiMvpdAccess.H>
-#include <fapiSystemConfig.H>
-#include <isteps/hwpf_reasoncodes.H>
-
-//  MVPD
-#include <devicefw/userif.H>
-#include <vpd/mvpdenums.H>
-
-const uint8_t NON_ECO_VOLTAGE_BUCKET_OFFFSET = 0x04;
-const uint8_t ALTERNATE_BUCKET_OFFSET = 0x05;
-const uint8_t BUCKET_ID_MASK = 0x0F;
-const uint8_t DEFAULT_BUCKET = 1;
-const uint8_t VERSION_01_BUCKET_SZ = 0x33; // 51 decimal
-const uint8_t POUND_V_VERSION_01 = 0x01;
-
-// Decimal 50 - 2 bytes for each 25 attributes.
-const uint8_t MAX_MVPD_VOLTAGE_BUCKET_ATTR_SZ = 0x32;
-// Two byte shift
-const uint8_t MVPD_TWO_BYTE_ATTR_VAL_SHIFT = 0x10;
-// Invalid chip unit
-const uint8_t MVPD_INVALID_CHIP_UNIT = 0xFF;
-
-namespace fapi
-{
-
-//******************************************************************************
-// MvpdRecordXlate
-// Translates a FAPI MVPD Record enumerator into a Hostboot MVPD Record
-// enumerator
-//******************************************************************************
-fapi::ReturnCode MvpdRecordXlate(const fapi::MvpdRecord i_fapiRecord,
-                                 MVPD::mvpdRecord & o_hbRecord,
-                                 uint8_t & o_chipUnitNum)
-{
-    // Create a lookup table for converting a FAPI MVPD record enumerator to a
-    // Hostboot MVPD record enumerator. This is a simple array and relies on
-    // the FAPI record enumerators starting at zero and incrementing.
-
-    //Structure to map fapi::MVPD_RECORD to chiplet chip num position
-    struct mvpdRecordToChip
-    {
-        MVPD::mvpdRecord rec;
-        // This is the chip unit position. 0xFF means record associated to all
-        // chiplets, any other number means record associated to the ex chiplet
-        // corresponding to that number.
-        uint8_t exChipNum;
-    };
-    static const mvpdRecordToChip mvpdFapiRecordToHbRecord[] =
-    {
-        {MVPD::CRP0,0xFF},
-        {MVPD::CP00,0xFF},
-        {MVPD::VINI,0xFF},
-        {MVPD::LRP0,0x00},
-        {MVPD::LRP1,0x01},
-        {MVPD::LRP2,0x02},
-        {MVPD::LRP3,0x03},
-        {MVPD::LRP4,0x04},
-        {MVPD::LRP5,0x05},
-        {MVPD::LRP6,0x06},
-        {MVPD::LRP7,0x07},
-        {MVPD::LRP8,0x08},
-        {MVPD::LRP9,0x09},
-        {MVPD::LRPA,0x0A},
-        {MVPD::LRPB,0x0B},
-        {MVPD::LRPC,0x0C},
-        {MVPD::LRPD,0x0D},
-        {MVPD::LRPE,0x0E},
-        {MVPD::LWP0,0x00},
-        {MVPD::LWP1,0x01},
-        {MVPD::LWP2,0x02},
-        {MVPD::LWP3,0x03},
-        {MVPD::LWP4,0x04},
-        {MVPD::LWP5,0x05},
-        {MVPD::LWP6,0x06},
-        {MVPD::LWP7,0x07},
-        {MVPD::LWP8,0x08},
-        {MVPD::LWP9,0x09},
-        {MVPD::LWPA,0x0A},
-        {MVPD::LWPB,0x0B},
-        {MVPD::LWPC,0x0C},
-        {MVPD::LWPD,0x0D},
-        {MVPD::LWPE,0x0E},
-        {MVPD::VWML,0xFF},
-        {MVPD::MER0,0xFF},
-    };
-    const uint8_t NUM_MVPD_RECORDS =
-           sizeof(mvpdFapiRecordToHbRecord)/sizeof(mvpdFapiRecordToHbRecord[0]);
-
-    fapi::ReturnCode l_rc;
-
-    uint8_t l_index = static_cast<uint8_t>(i_fapiRecord);
-
-    if (l_index >= NUM_MVPD_RECORDS)
-    {
-        FAPI_ERR("MvpdRecordXlate: Invalid MVPD Record: 0x%x", i_fapiRecord);
-        /*@
-         * @errortype
-         * @moduleid     MOD_MVPD_ACCESS
-         * @reasoncode   RC_INVALID_RECORD
-         * @userdata1    Record enumerator
-         * @devdesc      Attempt to read an MVPD field using an invalid record
-         */
-        const bool hbSwError = true;
-        errlHndl_t l_errl = new ERRORLOG::ErrlEntry(
-            ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-            fapi::MOD_MVPD_ACCESS,
-            fapi::RC_INVALID_RECORD,
-            i_fapiRecord, 0, hbSwError);
-
-        // Add the error log pointer as data to the ReturnCode
-        l_rc.setPlatError(reinterpret_cast<void *> (l_errl));
-    }
-    else
-    {
-        o_hbRecord = mvpdFapiRecordToHbRecord[l_index].rec;
-        o_chipUnitNum = mvpdFapiRecordToHbRecord[l_index].exChipNum;
-    }
-
-    return l_rc;
-}
-
-//******************************************************************************
-// MvpdKeywordXlate
-// Translates a FAPI MVPD Keyword enumerator into a Hostboot MVPD Keyword
-// enumerator
-//******************************************************************************
-fapi::ReturnCode MvpdKeywordXlate(const fapi::MvpdKeyword i_fapiKeyword,
-                                  MVPD::mvpdKeyword & o_hbKeyword)
-{
-    // Create a lookup table for converting a FAPI MVPD keyword enumerator to a
-    // Hostboot MVPD keyword enumerator. This is a simple array and relies on
-    // the FAPI record enumerators starting at zero and incrementing.
-    static const MVPD::mvpdKeyword
-        mvpdFapiKeywordToHbKeyword[] =
-    {
-        MVPD::VD,
-        MVPD::ED,
-        MVPD::TE,
-        MVPD::DD,
-        MVPD::pdP,
-        MVPD::ST,
-        MVPD::DN,
-        MVPD::PG,
-        MVPD::PK,
-        MVPD::pdR,
-        MVPD::pdV,
-        MVPD::pdH,
-        MVPD::SB,
-        MVPD::DR,
-        MVPD::VZ,
-        MVPD::CC,
-        MVPD::CE,
-        MVPD::FN,
-        MVPD::PN,
-        MVPD::SN,
-        MVPD::PR,
-        MVPD::HE,
-        MVPD::CT,
-        MVPD::HW,
-        MVPD::pdM,
-        MVPD::IN,
-        MVPD::pd2,
-        MVPD::pd3,
-        MVPD::OC,
-        MVPD::FO,
-        MVPD::pdI,
-        MVPD::pdG,
-        MVPD::MK,
-        MVPD::PB,
-        MVPD::CH,
-        MVPD::IQ,
-    };
-    const uint8_t NUM_MVPD_KEYWORDS =
-       sizeof(mvpdFapiKeywordToHbKeyword)/sizeof(mvpdFapiKeywordToHbKeyword[0]);
-
-    fapi::ReturnCode l_rc;
-
-    uint8_t l_index = static_cast<uint8_t>(i_fapiKeyword);
-
-    if (l_index >= NUM_MVPD_KEYWORDS)
-    {
-        FAPI_ERR("MvpdKeywordXlate: Invalid MVPD Keyword: 0x%x", i_fapiKeyword);
-        /*@
-         * @errortype
-         * @moduleid     MOD_MVPD_ACCESS
-         * @reasoncode   RC_INVALID_KEYWORD
-         * @userdata1    Keyword enumerator
-         * @devdesc      Attempt to read an MVPD field using an invalid keyword
-         */
-        const bool hbSwError = true;
-        errlHndl_t l_errl = new ERRORLOG::ErrlEntry(
-            ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-            fapi::MOD_MVPD_ACCESS,
-            fapi::RC_INVALID_KEYWORD,
-            i_fapiKeyword, 0, hbSwError);
-
-        // Add the error log pointer as data to the ReturnCode
-        l_rc.setPlatError(reinterpret_cast<void *> (l_errl));
-    }
-    else
-    {
-        o_hbKeyword = mvpdFapiKeywordToHbKeyword[l_index];
-    }
-
-    return l_rc;
-}
-
-//******************************************************************************
-// getVoltageBucketAttr
-//******************************************************************************
-fapi::ReturnCode getVoltageBucketAttr(const fapi::Target & i_exchplet,
-                                      const fapi::voltageBucketData_t & i_data,
-                                      uint8_t * io_pData,
-                                      uint32_t & io_dataSz)
-{
-    fapi::ReturnCode l_rc;
-    do
-    {
-        if( io_dataSz < MAX_MVPD_VOLTAGE_BUCKET_ATTR_SZ)
-        {
-            FAPI_ERR("getVltgBucketAttr: Invalid buffer size:0x%08X,"
-                     "expected:0x%08X",io_dataSz,
-                     MAX_MVPD_VOLTAGE_BUCKET_ATTR_SZ);
-            errlHndl_t l_err = NULL;
-
-            /*@
-             * @errortype
-             * @moduleid     fapi::MOD_PLAT_MVPD_GET_VLTG_BUCKET_ATTR
-             * @reasoncode   fapi::RC_INVALID_SIZE
-             * @userdata1    Invalid input length
-             * @userdata2    Expected length
-             * @devdesc      Input buffer size is smaller than expected length.
-             */
-            l_err =
-                new ERRORLOG::ErrlEntry(
-                                 ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                                 fapi::MOD_PLAT_MVPD_GET_VLTG_BUCKET_ATTR,
-                                 fapi::RC_INVALID_SIZE,
-                                 io_dataSz,
-                                 MAX_MVPD_VOLTAGE_BUCKET_ATTR_SZ);
-
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-            break;
-        }
-
-        //NOTE: Below attributes are read and value written to the output
-        // buffer as the VPD voltage bucket data layout. See MVPD documentation
-        // for more details
-        uint32_t l_data = 0;
-        uint32_t l_idx = 0;
-        // Write bucket id. This is written directly as this is not an
-        // override attribute (cannot be changed).
-        io_pData[l_idx] = i_data.bucketId;
-        l_idx++;
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_NOM_FREQ_MHZ,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_NOM_FREQ_MHZ");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_V_NEST_NOM_VOLTAGE,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                      "ATTR_OVERRIDE_MVPD_V_NEST_NOM_VOLTAGE");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_I_NEST_NOM_CURRENT,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_I_NEST_NOM_CURRENT");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_V_CS_NOM_VOLTAGE,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_V_CS_NOM_VOLTAGE");
-            break;
-        }
-
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_I_CS_NOM_CURRENT,
-                             &i_exchplet,
-                             l_data);
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_I_CS_NOM_CURRENT");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_PS_FREQ_MHZ,&i_exchplet,
-                             l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_PS_FREQ_MHZ");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_V_NEST_PS_VOLTAGE,&i_exchplet,
-                             l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_V_NEST_PS_VOLTAGE");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_I_NEST_PS_CURRENT,&i_exchplet,
-                             l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_I_NEST_PS_CURRENT");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_V_CS_PS_VOLTAGE,&i_exchplet,
-                             l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_V_CS_PS_VOLTAGE");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_I_CS_PS_CURRENT,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_I_CS_PS_CURRENT");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_TURBO_FREQ_MHZ,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_TURBO_FREQ_MHZ");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_V_NEST_TURBO_VOLTAGE,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_V_NEST_TURBO_VOLTAGE");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_I_NEST_TURBO_CURRENT,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_I_NEST_TURBO_CURRENT");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_V_CS_TURBO_VOLTAGE,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_V_CS_TURBO_VOLTAGE");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_I_CS_TURBO_CURRENT,
-                             &i_exchplet, l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_I_CS_TURBO_CURRENT");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_FVMIN_FREQ_MHZ,
-                             &i_exchplet,l_data);
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_FVMIN_FREQ_MHZ");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_V_NEST_FVMIN_VOLTAGE,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_V_NEST_FVMIN_VOLTAGE");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_I_NEST_FVMIN_CURRENT,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_I_NEST_FVMIN_CURRENT");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_V_CS_FVMIN_VOLTAGE,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_V_CS_FVMIN_VOLTAGE");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_I_CS_FVMIN_CURRENT,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_I_CS_FVMIN_CURRENT");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_LAB_FREQ_MHZ,
-                             &i_exchplet,l_data);
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_LAB_FREQ_MHZ");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_V_NEST_LAB_VOLTAGE,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                      "ATTR_OVERRIDE_MVPD_V_NEST_LAB_VOLTAGE");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_I_NEST_LAB_CURRENT,
-                             &i_exchplet, l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                     "ATTR_OVERRIDE_MVPD_I_NEST_LAB_CURRENT");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_V_CS_LAB_VOLTAGE,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                      "ATTR_OVERRIDE_MVPD_V_CS_LAB_VOLTAGE");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        l_rc = FAPI_ATTR_GET(ATTR_OVERRIDE_MVPD_I_CS_LAB_CURRENT,
-                             &i_exchplet, l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("getVltgBucketAttr:Err in get "
-                      "ATTR_OVERRIDE_MVPD_I_CS_LAB_CURRENT");
-            break;
-        }
-
-        // Read value and put 2 bytes to the output buffer. FAPI ATTR cannot
-        // be 2 bytes by design so had to make it 4 bytes and do shift to
-        // return 2 bytes which is actual size of the data in the VPD.
-        l_data = l_data << MVPD_TWO_BYTE_ATTR_VAL_SHIFT;
-        memcpy(&io_pData[l_idx],&l_data,sizeof(uint16_t));
-        l_idx += sizeof(uint16_t);
-
-        //Return actual buffer size in output param
-        io_dataSz = l_idx;
-
-    }while(false);
-
-    if(l_rc)
-    {
-        // On error return 0 size
-        io_dataSz = 0;
-    }
-
-    return l_rc;
-}
-
-//******************************************************************************
-// setVoltageBucketAttr
-//******************************************************************************
-fapi::ReturnCode setVoltageBucketAttr(const fapi::Target & i_exchplet,
-                                      const fapi::voltageBucketData_t & i_data)
-{
-    fapi::ReturnCode l_rc;
-    do
-    {
-        // local variable is used as i_data fields are 2 bytes (matching VPD
-        // data length) and FAPI attributes are 4 bytes long. FAPI attributes
-        // cannot be 2 bytes by design.
-        uint32_t l_data = i_data.nomFreq;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_NOM_FREQ_MHZ,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                     "ATTR_OVERRIDE_MVPD_NOM_FREQ_MHZ");
-            break;
-        }
-
-        l_data = i_data.VnestNomVltg;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_V_NEST_NOM_VOLTAGE,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                      "ATTR_OVERRIDE_MVPD_V_NEST_NOM_VOLTAGE");
-            break;
-        }
-
-        l_data = i_data.InestNomCurr;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_I_NEST_NOM_CURRENT,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                     "ATTR_OVERRIDE_MVPD_I_NEST_NOM_CURRENT");
-            break;
-        }
-
-        l_data = i_data.VcsNomVltg;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_V_CS_NOM_VOLTAGE,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                     "ATTR_OVERRIDE_MVPD_V_CS_NOM_VOLTAGE");
-            break;
-        }
-
-        l_data = i_data.IcsNomCurr;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_I_CS_NOM_CURRENT,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                      "ATTR_OVERRIDE_MVPD_I_CS_NOM_CURRENT");
-            break;
-        }
-
-        l_data = i_data.PSFreq;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_PS_FREQ_MHZ,&i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                     "ATTR_OVERRIDE_MVPD_PS_FREQ_MHZ");
-            break;
-        }
-
-        l_data = i_data.VnestPSVltg;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_V_NEST_PS_VOLTAGE,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                      "ATTR_OVERRIDE_MVPD_V_NEST_PS_VOLTAGE");
-            break;
-        }
-
-        l_data = i_data.InestPSCurr;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_I_NEST_PS_CURRENT,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                     "ATTR_OVERRIDE_MVPD_I_NEST_PS_CURRENT");
-            break;
-        }
-
-        l_data = i_data.VcsPSVltg;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_V_CS_PS_VOLTAGE,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                     "ATTR_OVERRIDE_MVPD_V_CS_PS_VOLTAGE");
-            break;
-        }
-
-        l_data = i_data.IcsPSCurr;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_I_CS_PS_CURRENT,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                     "ATTR_OVERRIDE_MVPD_I_CS_PS_CURRENT");
-            break;
-        }
-
-        l_data = i_data.turboFreq;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_TURBO_FREQ_MHZ,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                     "ATTR_OVERRIDE_MVPD_TURBO_FREQ_MHZ");
-            break;
-        }
-
-        l_data = i_data.VnestTurboVltg;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_V_NEST_TURBO_VOLTAGE,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                      "ATTR_OVERRIDE_MVPD_V_NEST_TURBO_VOLTAGE");
-            break;
-        }
-
-        l_data = i_data.InestTurboCurr;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_I_NEST_TURBO_CURRENT,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                      "ATTR_OVERRIDE_MVPD_I_NEST_TURBO_CURRENT");
-            break;
-        }
-
-        l_data = i_data.VcsTurboVltg;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_V_CS_TURBO_VOLTAGE,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                     "ATTR_OVERRIDE_MVPD_V_CS_TURBO_VOLTAGE");
-            break;
-        }
-
-        l_data = i_data.IcsTurboCurr;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_I_CS_TURBO_CURRENT,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                      "ATTR_OVERRIDE_MVPD_I_CS_TURBO_CURRENT");
-            break;
-        }
-        l_data = i_data.fvminFreq;
-
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_FVMIN_FREQ_MHZ,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                     "ATTR_OVERRIDE_MVPD_FVMIN_FREQ_MHZ");
-            break;
-        }
-
-        l_data = i_data.VnestFvminVltg;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_V_NEST_FVMIN_VOLTAGE,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                      "ATTR_OVERRIDE_MVPD_V_NEST_FVMIN_VOLTAGE");
-            break;
-        }
-
-        l_data = i_data.InestFvminCurr;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_I_NEST_FVMIN_CURRENT,
-                             &i_exchplet,l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                      "ATTR_OVERRIDE_MVPD_I_NEST_FVMIN_CURRENT");
-            break;
-        }
-        l_data = i_data.VcsFvminVltg;
-
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_V_CS_FVMIN_VOLTAGE,&i_exchplet,
-                             l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                      "ATTR_OVERRIDE_MVPD_V_CS_FVMIN_VOLTAGE");
-            break;
-        }
-
-        l_data = i_data.IcsFvminCurr;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_I_CS_FVMIN_CURRENT,&i_exchplet,
-                             l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                      "ATTR_OVERRIDE_MVPD_I_CS_FVMIN_CURRENT");
-            break;
-        }
-
-        l_data = i_data.labFreq;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_LAB_FREQ_MHZ,&i_exchplet,
-                             l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                      "ATTR_OVERRIDE_MVPD_LAB_FREQ_MHZ");
-            break;
-        }
-        l_data = i_data.VnestLabVltg;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_V_NEST_LAB_VOLTAGE,&i_exchplet,
-                             l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                      "ATTR_OVERRIDE_MVPD_V_NEST_LAB_VOLTAGE");
-            break;
-        }
-        l_data = i_data.InestLabCurr;
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_I_NEST_LAB_CURRENT,&i_exchplet,
-                             l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                     "ATTR_OVERRIDE_MVPD_I_NEST_LAB_CURRENT");
-            break;
-        }
-        l_data = i_data.VcsLabVltg;
-
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_V_CS_LAB_VOLTAGE,&i_exchplet,
-                             l_data);
-
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                     "ATTR_OVERRIDE_MVPD_V_CS_LAB_VOLTAGE");
-            break;
-        }
-        l_data = i_data.IcsLabCurr;
-
-        l_rc = FAPI_ATTR_SET(ATTR_OVERRIDE_MVPD_I_CS_LAB_CURRENT,&i_exchplet,
-                             l_data);
-        if( l_rc )
-        {
-            FAPI_ERR("setVltgBucketAttr:Err in set "
-                     "ATTR_OVERRIDE_MVPD_I_CS_LAB_CURRENT");
-            break;
-        }
-
-    }while(false);
-
-    return l_rc;
-}
-
-/**
- * @brief Parse and get #V version one bucket data
- *
- * @par Detailed Description:
- *     This function handles parsing of version one #V data and returns
- *     bucket data buffer.
- *
- * @param[in] i_prBucketId  Bucket id to read data for
- * @param[in] i_dataSz      #V data buffer size
- * @param[in] i_vDataPtr    #V data buffer
- * @param[out] o_data       On success, structure with #V version one bucket
- *                          data from VPD
- *
- * @return fapi::ReturnCode. FAPI_RC_SUCCESS, or failure value.
- */
-fapi::ReturnCode fapiGetVerOneVoltageBucketData(
-                                 const TARGETING::Target * i_pChipTarget,
-                                 const uint8_t i_prBucketId,
-                                 const uint32_t i_dataSz,
-                                 const uint8_t *i_vDataPtr,
-                                 fapi::voltageBucketData_t & o_data)
-{
-    fapi::ReturnCode l_rc;
-    errlHndl_t l_err = NULL;
-
-    do
-    {
-        memset (&o_data,0,sizeof (o_data));
-
-        // For version 0x01, valid bucket id is 1 through 5.
-        if( (i_prBucketId == 0 ) ||
-            (i_prBucketId > 5) )
-        {
-            FAPI_ERR("Found invalid bucket ID:0x%02X", i_prBucketId);
-
-            /*@
-             * @errortype
-             * @moduleid     fapi::MOD_GET_VER_ONE_VOLTAGE_BUCKET_DATA
-             * @reasoncode   fapi::RC_INVALID_PARAM
-             * @userdata1    Invalid bucket id
-             * @devdesc      Invalid bucket id found for the voltage data.
-             */
-            l_err =
-                new ERRORLOG::ErrlEntry(
-                                 ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                                 fapi::MOD_GET_VER_ONE_VOLTAGE_BUCKET_DATA,
-                                 fapi::RC_INVALID_PARAM,
-                                 i_prBucketId);
-
-            // Callout HW as VPD data is incorrect
-            l_err->addHwCallout(i_pChipTarget, HWAS::SRCI_PRIORITY_HIGH,
-                                 HWAS::DECONFIG, HWAS::GARD_NULL);
-
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-
-            break;
-        }
-
-        // Documented in Module VPD document: mvpd-p8-100212.pdf Version 1.0
-        // skip (1 byte version +  3 byte PNP +
-        //       ((bucketId-1(as bucketId starts at 1)) * bucket data size )
-        uint32_t l_bucketOffset = 4 + ((i_prBucketId -1)* VERSION_01_BUCKET_SZ);
-
-        if( i_dataSz < (l_bucketOffset + VERSION_01_BUCKET_SZ))
-        {
-            FAPI_ERR("Not enough data to get bucket data "
-                     "Returned data length:[0x%08X],expected len:[0x%08X]",
-                     i_dataSz, l_bucketOffset + VERSION_01_BUCKET_SZ);
-
-            /*@
-             * @errortype
-             * @moduleid     fapi::MOD_GET_VER_ONE_VOLTAGE_BUCKET_DATA
-             * @reasoncode   fapi::RC_INVALID_SIZE
-             * @userdata1    Voltage data length
-             * @userdata2    Expected length
-             * @devdesc      Not enough voltage data to read bucket data.
-             */
-            l_err =
-                new ERRORLOG::ErrlEntry(
-                                 ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                                 fapi::MOD_GET_VER_ONE_VOLTAGE_BUCKET_DATA,
-                                 fapi::RC_INVALID_SIZE,
-                                 i_dataSz,
-                                 (l_bucketOffset + VERSION_01_BUCKET_SZ));
-
-            // Callout HW as VPD data is incorrect
-            l_err->addHwCallout(i_pChipTarget, HWAS::SRCI_PRIORITY_HIGH,
-                                 HWAS::DECONFIG, HWAS::GARD_NULL);
-
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-
-            break;
-        }
-
-        // Got bucket data, now make sure input bucket id matches with the
-        // bucket id pointed to by the bucket data. Ignore default value
-        // since it means VPD is not initialized.
-        if( (i_prBucketId != i_vDataPtr[l_bucketOffset]) &&
-            (i_prBucketId != DEFAULT_BUCKET) )
-        {
-            FAPI_ERR("BucketId:[0x%02x] from PR data "
-                     "does not match bucketId:[0x%02X] from the voltage "
-                     "data for HUID:[0x%08X]",
-                     i_prBucketId, i_vDataPtr[l_bucketOffset],
-                     i_pChipTarget->getAttr<TARGETING::ATTR_HUID>());
-
-            /*@
-             * @errortype
-             * @moduleid         fapi::MOD_GET_VER_ONE_VOLTAGE_BUCKET_DATA
-             * @reasoncode       fapi::RC_DATA_MISMATCH
-             * @userdata1[0:31]  Voltage bucket id
-             * @userdata1[32:63] PR bucket id
-             * @userdata2        Voltage bucket id offset
-             * @devdesc          Bucket id from PR keyword does not match
-             *                   bucket id in the voltage data
-             */
-            l_err =
-                new ERRORLOG::ErrlEntry(
-                                 ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                                 fapi::MOD_GET_VER_ONE_VOLTAGE_BUCKET_DATA,
-                                 fapi::RC_DATA_MISMATCH,
-            TWO_UINT32_TO_UINT64(i_vDataPtr[l_bucketOffset], i_prBucketId),
-                                 l_bucketOffset);
-
-            // Callout HW as VPD data is incorrect
-            l_err->addHwCallout(i_pChipTarget, HWAS::SRCI_PRIORITY_HIGH,
-                                HWAS::DECONFIG, HWAS::GARD_NULL);
-
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-
-            break;
-        }
-
-        // Make sure bucket data is large enough to process output structure
-        if (sizeof(o_data) < (VERSION_01_BUCKET_SZ))
-        {
-            FAPI_ERR("Not enough bucket data to fill o_data,"
-                     "bucket length:[0x%08X],o_data size:[0x%08X]",
-                     VERSION_01_BUCKET_SZ,sizeof(o_data));
-
-            /*@
-             * @errortype
-             * @moduleid     fapi::MOD_GET_VER_ONE_VOLTAGE_BUCKET_DATA
-             * @reasoncode   fapi::RC_INVALID_DATA
-             * @userdata1    Bucket data length
-             * @userdata2    Output Data size
-             * @devdesc      Not enough bucket data to fill output data.
-             */
-            l_err =
-                new ERRORLOG::ErrlEntry(
-                                ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                                fapi::MOD_GET_VER_ONE_VOLTAGE_BUCKET_DATA,
-                                fapi::RC_INVALID_DATA,
-                                VERSION_01_BUCKET_SZ,
-                                (sizeof(o_data)));
-
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-
-            break;
-        }
-
-        // TODO RTC 116552 Clean up logic to map data to a struct
-        uint8_t l_idx = l_bucketOffset;
-        //Bucket id
-        o_data.bucketId = i_vDataPtr[l_idx];
-        l_idx += sizeof(o_data.bucketId);
-        //Nominal
-        o_data.nomFreq = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.nomFreq);
-        o_data.VnestNomVltg = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.VnestNomVltg);
-        o_data.InestNomCurr = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.InestNomCurr);
-        o_data.VcsNomVltg = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.VcsNomVltg);
-        o_data.IcsNomCurr = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.IcsNomCurr);
-
-        //PowerSave
-        o_data.PSFreq = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.PSFreq);
-        o_data.VnestPSVltg = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.VnestPSVltg);
-        o_data.InestPSCurr = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.InestPSCurr);
-        o_data.VcsPSVltg = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.VcsPSVltg);
-        o_data.IcsPSCurr = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.IcsPSCurr);
-        //Turbo
-        o_data.turboFreq = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.turboFreq);
-        o_data.VnestTurboVltg = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.VnestTurboVltg);
-        o_data.InestTurboCurr = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.InestTurboCurr);
-        o_data.VcsTurboVltg = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.VcsTurboVltg);
-        o_data.IcsTurboCurr = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.IcsTurboCurr);
-
-        // Fvmin
-        o_data.fvminFreq = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.fvminFreq);
-        o_data.VnestFvminVltg = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.VnestFvminVltg);
-        o_data.InestFvminCurr = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.InestFvminCurr);
-        o_data.VcsFvminVltg = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.VcsFvminVltg);
-        o_data.IcsFvminCurr = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.IcsFvminCurr);
-
-        //Lab
-        o_data.labFreq = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.labFreq);
-        o_data.VnestLabVltg = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.VnestLabVltg);
-        o_data.InestLabCurr = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.InestLabCurr);
-        o_data.VcsLabVltg = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.VcsLabVltg);
-        o_data.IcsLabCurr = *(reinterpret_cast<uint16_t*>(
-                                const_cast<uint8_t*>(&i_vDataPtr[l_idx])));
-        l_idx += sizeof(o_data.IcsLabCurr);
-
-    } while(0);
-
-    return l_rc;
-}
-
-}
-
-extern "C"
-{
-
-//******************************************************************************
-// fapiGetMvpdField
-//******************************************************************************
-fapi::ReturnCode fapiGetMvpdField(const fapi::MvpdRecord i_record,
-                                  const fapi::MvpdKeyword i_keyword,
-                                  const fapi::Target &i_procTarget,
-                                  uint8_t * const i_pBuffer,
-                                  uint32_t &io_fieldSize)
-{
-    uint8_t l_chipUnitNum = MVPD_INVALID_CHIP_UNIT;
-    errlHndl_t l_errl = NULL;
-    fapi::ReturnCode l_rc;
-    FAPI_DBG("fapiGetMvpdField entry");
-
-    do
-    {
-        // Translate the FAPI record to a Hostboot record
-        MVPD::mvpdRecord l_hbRecord = MVPD::MVPD_INVALID_RECORD;
-
-        l_rc = fapi::MvpdRecordXlate(i_record, l_hbRecord, l_chipUnitNum);
-
-        if (l_rc)
-        {
-            break;
-        }
-
-        // Translate the FAPI keyword to a Hostboot keyword
-        MVPD::mvpdKeyword l_hbKeyword = MVPD::INVALID_MVPD_KEYWORD;
-
-        l_rc = fapi::MvpdKeywordXlate(i_keyword, l_hbKeyword);
-
-        if (l_rc)
-        {
-            break;
-        }
-
-        // For #V keyword need to read the bucket id from the processor VPD
-        // and then read #V data to get the voltage bucket data. Use exsiting
-        // freq voltage service call to get the voltage bucket data
-        if(i_keyword == fapi::MVPD_KEYWORD_PDV)
-        {
-            fapi::voltageBucketData_t l_pVData;
-
-            // Get #V bucket data
-            l_rc = fapiGetPoundVBucketData(i_procTarget,
-                                  (uint32_t) l_hbRecord,
-                                             l_pVData);
-            if (l_rc)
-            {
-                TARGETING::Target * l_pChipTarget =
-                   reinterpret_cast<TARGETING::Target*>(i_procTarget.get());
-
-                FAPI_ERR("fapiGetMvpdField: Error getting #V bucket data "
-                         "HUID: 0x%08X",
-                         l_pChipTarget->getAttr<TARGETING::ATTR_HUID>());
-
-                break;
-            }
-
-            // Get EX - CHPLET list and find the correct chiplet to read
-            // write attributes
-            std::vector<fapi::Target> l_exchiplets;
-            fapi::TargetState l_state = fapi::TARGET_STATE_PRESENT;
-
-            l_rc = fapiGetChildChiplets(
-                                      i_procTarget,fapi::TARGET_TYPE_EX_CHIPLET,
-                                      l_exchiplets,l_state);
-
-            if( l_rc)
-            {
-                FAPI_ERR("fapiGetMvpdField:Error getting exchiplet list");
-                break;
-            }
-
-            std::vector<fapi::Target>::iterator l_itr;
-            // Traverse through ex-chiplet and compare chip unit pos to find
-            // right ex chiplet
-            for(l_itr = l_exchiplets.begin();l_itr!=l_exchiplets.end();l_itr++)
-            {
-                uint8_t l_chipUnit = MVPD_INVALID_CHIP_UNIT;
-                // get chip unit
-                l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS,&(*(l_itr)),l_chipUnit);
-
-                if( l_rc)
-                {
-                    FAPI_ERR("fapiGetMvpdField:Err getting CHIP_UNIT_POS Attr");
-                    break;
-                }
-
-                //Find correct chiplet
-                // If ex-chiplet chip unit pos does not match the one input
-                // record corresponds to then go to the next ex-chiplet
-                if( l_chipUnit != l_chipUnitNum)
-                {
-                    continue;
-                }
-                // Matching ex-chiplet found. Write MVPD voltage bucket
-                // attributes associated to it.
-                l_rc = setVoltageBucketAttr(*l_itr,l_pVData);
-
-                if( l_rc)
-                {
-                    FAPI_ERR("fapiGetMvpdField:Error setting voltage bucket "
-                             "attribute");
-                    break;
-                }
-
-                // Read it back to get override value (if any)
-                l_rc = getVoltageBucketAttr(*l_itr,l_pVData,i_pBuffer,
-                                            io_fieldSize);
-
-                if( l_rc)
-                {
-                    FAPI_ERR("fapiGetMvpdField:Error reading voltage bucket "
-                             "attribute");
-                    break;
-                }
-                // found correct core so we are done
-                break;
-            } //end for loop
-
-            if( l_rc)
-            {
-                break;
-            }
-
-        }
-        else // non-#V Module VPD data
-        {
-            // Similarly to this function, deviceRead will return the size of
-            // the field if the pointer is NULL
-            size_t l_fieldLen = io_fieldSize;
-
-            l_errl = deviceRead(
-                reinterpret_cast< TARGETING::Target*>(i_procTarget.get()),
-                i_pBuffer,
-                l_fieldLen,
-                DEVICE_MVPD_ADDRESS(l_hbRecord, l_hbKeyword));
-
-            if (l_errl)
-            {
-                FAPI_ERR("fapiGetMvpdField: ERROR: deviceRead : errorlog PLID=0x%x",
-                         l_errl->plid());
-
-                // Add the error log pointer as data to the ReturnCode
-                l_rc.setPlatError(reinterpret_cast<void *> (l_errl));
-
-                break;
-            }
-
-            // Success, update callers io_fieldSize for the case where the
-            // pointer is NULL and deviceRead returned the actual size
-            io_fieldSize = l_fieldLen;
-
-        }
-
-        FAPI_DBG("fapiGetMvpdField: returning field len=0x%x", io_fieldSize);
-
-    } while(0);
-
-    if( l_rc)
-    {
-        io_fieldSize = 0;
-    }
-
-    FAPI_DBG( "fapiGetMvpdField: exit" );
-
-    return  l_rc;
-}
-
-//******************************************************************************
-// fapiSetMvpdField
-//******************************************************************************
-fapi::ReturnCode fapiSetMvpdField(const fapi::MvpdRecord i_record,
-                                  const fapi::MvpdKeyword i_keyword,
-                                  const fapi::Target &i_procTarget,
-                                  const uint8_t * const i_pBuffer,
-                                  const uint32_t i_fieldSize)
-{
-    fapi::ReturnCode l_rc;
-    uint8_t l_chipUnitNum = MVPD_INVALID_CHIP_UNIT;
-    FAPI_DBG("fapiSetMvpdField entry");
-
-    do
-    {
-        // Translate the FAPI record to a Hostboot record
-        MVPD::mvpdRecord l_hbRecord = MVPD::MVPD_INVALID_RECORD;
-
-        l_rc = fapi::MvpdRecordXlate(i_record, l_hbRecord, l_chipUnitNum);
-
-        if (l_rc)
-        {
-            break;
-        }
-
-        // Translate the FAPI keyword to a Hostboot keyword
-        MVPD::mvpdKeyword l_hbKeyword = MVPD::INVALID_MVPD_KEYWORD;
-
-        l_rc = fapi::MvpdKeywordXlate(i_keyword, l_hbKeyword);
-
-        if (l_rc)
-        {
-            break;
-        }
-
-        size_t l_fieldLen = i_fieldSize;
-
-        errlHndl_t l_errl = deviceWrite(
-            reinterpret_cast< TARGETING::Target*>(i_procTarget.get()),
-            const_cast<uint8_t *>(i_pBuffer),
-            l_fieldLen,
-            DEVICE_MVPD_ADDRESS(l_hbRecord, l_hbKeyword));
-
-        if (l_errl)
-        {
-            FAPI_ERR("fapiSetMvpdField: ERROR: deviceWrite : errorlog PLID=0x%x",
-                     l_errl->plid());
-
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_errl));
-
-            break;
-        }
-
-    } while(0);
-
-    FAPI_DBG( "fapiSetMvpdField: exit" );
-
-    return  l_rc;
-}
-
-fapi::ReturnCode fapiGetPoundVBucketData(
-                                      const fapi::Target &i_procTarget,
-                                      const uint32_t i_record,
-                                      fapi::voltageBucketData_t & o_data)
-{
-    fapi::ReturnCode l_rc;
-    size_t     l_vpdSize = 0;
-    uint8_t   *l_prDataPtr = NULL;
-    uint8_t   *l_vDataPtr = NULL;
-    errlHndl_t l_err = NULL;
-
-    do
-    {
-        TARGETING::Target * l_pChipTarget =
-                   reinterpret_cast<TARGETING::Target*>(i_procTarget.get());
-
-        // Read PR keyword size
-        l_err = deviceRead( l_pChipTarget,
-                            NULL,
-                            l_vpdSize,
-                            DEVICE_MVPD_ADDRESS( MVPD::VINI,
-                                                 MVPD::PR ) );
-        if (l_err)
-        {
-            FAPI_ERR("Error getting PR keyword size for HUID: "
-                     "0x%08X, errorlog PLID=0x%x",
-                      l_pChipTarget->getAttr<TARGETING::ATTR_HUID>(),
-                      l_err->plid());
-
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-
-            break;
-        }
-
-        // Assert if deviceRead returned success but size is 0
-        assert(l_vpdSize != 0);
-
-        l_prDataPtr = new uint8_t [l_vpdSize];
-
-        // Read PR keyword data
-        l_err = deviceRead(l_pChipTarget,
-                            l_prDataPtr,
-                            l_vpdSize,
-                            DEVICE_MVPD_ADDRESS( MVPD::VINI,
-                                             MVPD::PR ) );
-        if (l_err)
-        {
-            FAPI_ERR("Error getting PR keyword data for HUID: "
-                     "0x%08X, errorlog PLID=0x%x",
-                      l_pChipTarget->getAttr<TARGETING::ATTR_HUID>(),
-                      l_err->plid());
-
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-
-            break;
-        }
-
-        // Get non-ECO mode bucket id - bits 4-7
-        uint8_t l_bucketId =
-                 (l_prDataPtr[NON_ECO_VOLTAGE_BUCKET_OFFFSET] & BUCKET_ID_MASK);
-        if( l_bucketId == 0)
-        {
-            FAPI_INF("bucketId is zero, using alternate offset");
-            l_bucketId = l_prDataPtr[ALTERNATE_BUCKET_OFFSET];
-        }
-        if( l_bucketId == 0) // VPD is not initialized / programmed correctly
-        {
-            FAPI_INF("bucketId is zero, invalid VPD, using default value 0x%x",
-                      DEFAULT_BUCKET);
-            l_bucketId = DEFAULT_BUCKET;
-        }
-
-        l_vpdSize = 0;
-        l_err = deviceRead( l_pChipTarget,
-                            NULL,
-                            l_vpdSize,
-                            DEVICE_MVPD_ADDRESS( i_record,
-                                                 MVPD::pdV ) );
-        if (l_err)
-        {
-            FAPI_ERR("Error getting #V keyword size for HUID: "
-                     "0x%08X, errorlog PLID=0x%x",
-                      l_pChipTarget->getAttr<TARGETING::ATTR_HUID>(),
-                      l_err->plid());
-
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-
-            break;
-        }
-
-        // Assert if deviceRead returned success but size is 0
-        assert(l_vpdSize != 0);
-
-        l_vDataPtr = new uint8_t [l_vpdSize];
-
-        l_err = deviceRead( l_pChipTarget,
-                            l_vDataPtr,
-                            l_vpdSize,
-                            DEVICE_MVPD_ADDRESS( i_record,
-                                             MVPD::pdV ) );
-        if (l_err)
-        {
-            FAPI_ERR("Error getting #V keyword data for HUID: "
-                     "0x%08X, errorlog PLID=0x%x",
-                      l_pChipTarget->getAttr<TARGETING::ATTR_HUID>(),
-                      l_err->plid());
-
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-
-            break;
-        }
-
-        uint8_t l_version = 0x0;
-
-        l_version = l_vDataPtr[0];
-
-        if( l_version != POUND_V_VERSION_01)
-        {
-            FAPI_ERR("Found unsupported version:[0x%02X] of "
-                     "the #V data", l_version);
-
-            /*@
-             * @errortype
-             * @moduleid         fapi::MOD_GET_POUNDV_BUCKET_DATA
-             * @reasoncode       fapi::RC_DATA_NOT_SUPPORTED
-             * @userdata1[0:31]  Unsupported version
-             * @userdata1[32:63] Expected version
-             * @userdata2        #V KW data size
-             * @devdesc          Unsupported #V keyword data version found.
-             */
-            l_err =
-                new ERRORLOG::ErrlEntry(
-                                 ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                                 fapi::MOD_GET_POUNDV_BUCKET_DATA,
-                                 fapi::RC_DATA_NOT_SUPPORTED,
-            TWO_UINT32_TO_UINT64(l_version, POUND_V_VERSION_01),
-                                 l_vpdSize);
-
-            // Callout HW as VPD data is incorrect
-            l_err->addHwCallout(l_pChipTarget, HWAS::SRCI_PRIORITY_HIGH,
-                                 HWAS::DECONFIG, HWAS::GARD_NULL);
-
-            // Code (SW) callout in case this is downlevel VPD version
-            l_err->addProcedureCallout(HWAS::EPUB_PRC_HB_CODE,
-                                       HWAS::SRCI_PRIORITY_MED);
-
-            // Add the error log pointer as data to the ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_err));
-
-            break;
-        }
-
-        // Parse #V Version one data to get bucket data
-        l_rc = fapiGetVerOneVoltageBucketData(l_pChipTarget,
-                                      l_bucketId,
-                                      l_vpdSize,
-                                      l_vDataPtr,
-                                      o_data);
-        if (l_rc)
-        {
-            FAPI_ERR("Error getting voltage bucket data for version 0x%x, "
-                     "PR KW bucketId:[0x%02X], errorlog PLID=0x%x",
-                     POUND_V_VERSION_01, l_bucketId, l_err->plid());
-
-            break;
-        }
-
-    } while(0);
-
-    if (l_prDataPtr != NULL)
-    {
-        delete [] l_prDataPtr;
-    }
-    if (l_vDataPtr != NULL)
-    {
-        delete [] l_vDataPtr;
-    }
-
-    return  l_rc;
-}
-
-} // extern "C"
diff --git a/src/usr/hwpf/plat/fapiPlatReturnCodeDataRef.C b/src/usr/hwpf/plat/fapiPlatReturnCodeDataRef.C
deleted file mode 100644
index 5a2b261db..000000000
--- a/src/usr/hwpf/plat/fapiPlatReturnCodeDataRef.C
+++ /dev/null
@@ -1,51 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/plat/fapiPlatReturnCodeDataRef.C $               */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2011,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/**
- *  @file platReturnCodeDataRef.C
- *
- *  @brief Implements the platform part of the ReturnCodeDataRef class.
- *
- *  Note that platform code must provide the implementation. FAPI has provided
- *  an example for platforms that do not attach ReturnCodeData to a ReturnCode.
- */
-
-#include <fapiReturnCodeDataRef.H>
-#include <fapiPlatTrace.H>
-#include <errl/errlentry.H>
-
-namespace fapi
-{
-
-//******************************************************************************
-// deletePlatData function
-//******************************************************************************
-void ReturnCodeDataRef::deletePlatData()
-{
-	FAPI_DBG("ReturnCodePlatDataRef::deleteData");
-
-    // HostBoot platform uses iv_pData to point at an error log.
-    delete (static_cast<errlHndl_t>(iv_pPlatData));
-    iv_pPlatData = NULL;
-}
-
-}
diff --git a/src/usr/hwpf/plat/fapiPlatSystemConfig.C b/src/usr/hwpf/plat/fapiPlatSystemConfig.C
deleted file mode 100644
index 55820824c..000000000
--- a/src/usr/hwpf/plat/fapiPlatSystemConfig.C
+++ /dev/null
@@ -1,579 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/plat/fapiPlatSystemConfig.C $                    */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/**
- *  @file fapiPlatSystemConfig.C
- *
- *  @brief Implements the fapiSystemConfig.H functions.
- *
- *  Note that platform code must provide the implementation.
- */
-
-#include <fapiPlatTrace.H>
-#include <fapiSystemConfig.H>
-#include <isteps/hwpf_reasoncodes.H>
-#include <errl/errlentry.H>
-#include <targeting/common/commontargeting.H>
-#include <targeting/common/utilFilter.H>
-#include <targeting/common/targetservice.H>
-#include <targeting/common/predicates/predicatectm.H>
-
-extern "C"
-{
-using   namespace   TARGETING;
-
-//******************************************************************************
-// fapiGetOtherSideOfMemChannel function
-//******************************************************************************
-fapi::ReturnCode fapiGetOtherSideOfMemChannel(
-    const fapi::Target& i_target,
-    fapi::Target & o_target,
-    const fapi::TargetState i_state)
-{
-    fapi::ReturnCode l_rc;
-    TargetHandleList l_targetList;
-
-    FAPI_DBG(ENTER_MRK "fapiGetOtherSideOfMemChannel. State: 0x%08x",
-             i_state);
-
-   TargetHandle_t   l_target =
-          reinterpret_cast<TargetHandle_t>(i_target.get());
-
-    if (l_target == NULL)
-    {
-        FAPI_ERR("fapiGetOtherSideOfMemChannel. Embedded NULL target pointer");
-        /*@
-         * @errortype
-         * @moduleid     fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL
-         * @reasoncode   fapi::RC_EMBEDDED_NULL_TARGET_PTR
-         * @devdesc      Target has embedded null target pointer
-         */
-        const bool hbSwError = true;
-        errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                    ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                    fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL,
-                    fapi::RC_EMBEDDED_NULL_TARGET_PTR,
-                    0, 0, hbSwError);
-
-        // Attach the error log to the fapi::ReturnCode
-        l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-    }
-    else if (i_target.getType() == fapi::TARGET_TYPE_MCS_CHIPLET)
-    {
-        // find the Centaur that is associated with this MCS
-        getChildAffinityTargetsByState(l_targetList, l_target,
-                        CLASS_CHIP, TYPE_MEMBUF, UTIL_FILTER_PRESENT);
-
-        if(l_targetList.size() != 1) // one and only one expected
-        {
-            FAPI_ERR("fapiGetOtherSideOfMemChannel. expect 1 Centaur %d",
-                     l_targetList.size());
-            /*@
-             * @errortype
-             * @moduleid     fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL
-             * @reasoncode   fapi::RC_NO_SINGLE_MEMBUFF
-             * @userdata1    Number of Memory Buffers
-             * @userdata2    MCS HUID
-             * @devdesc      fapiGetOtherSideOfMemChannel could not find exactly
-             *               one target on the other side of the correct state
-             * @custdesc  A problem occurrred during the IPL of the system.
-             */
-            const bool hbSwError = true;
-            errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL,
-                fapi::RC_NO_SINGLE_MEMBUFF,
-                l_targetList.size(),
-                TARGETING::get_huid(l_target),
-                hbSwError);
-
-            // Attach the error log to the fapi::ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-
-        }
-        else
-        {
-            o_target.setType(fapi::TARGET_TYPE_MEMBUF_CHIP);
-            o_target.set(reinterpret_cast<void *>(l_targetList[0]));
-        }
-
-    }
-    else if (i_target.getType() == fapi::TARGET_TYPE_MEMBUF_CHIP)
-    {
-        // find the MCS that is associated with this Centaur
-        getParentAffinityTargets (l_targetList, l_target,
-                           CLASS_UNIT, TYPE_MCS, false);
-
-        if(l_targetList.size() != 1) // one and only one expected
-        {
-            FAPI_ERR("fapiGetOtherSideOfMemChannel. expect 1 MCS %d",
-                     l_targetList.size());
-            /*@
-             * @errortype
-             * @moduleid     fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL
-             * @reasoncode   fapi::RC_NO_SINGLE_MCS
-             * @userdata1    Number of MCSs
-             * @userdata2    Membuf HUID
-             * @devdesc      fapiGetOtherSideOfMemChannel could not find exactly
-             *               one target on the other side of the correct state
-             * @custdesc  A problem occurrred during the IPL of the system.
-             */
-            const bool hbSwError = true;
-            errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL,
-                fapi::RC_NO_SINGLE_MCS,
-                l_targetList.size(),
-                TARGETING::get_huid(l_target),
-                hbSwError);
-
-            // Attach the error log to the fapi::ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-        }
-        else
-        {
-            o_target.setType(fapi::TARGET_TYPE_MCS_CHIPLET);
-            o_target.set(reinterpret_cast<void *>(l_targetList[0]));
-        }
-
-    }
-    else
-    {
-      FAPI_ERR("fapiGetOtherSideOfMemChannel. target 0x%08x not supported",
-                     i_target.getType());
-        /*@
-         * @errortype
-         * @moduleid     fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL
-         * @reasoncode   fapi::RC_UNSUPPORTED_REQUEST
-         * @userdata1    Requested type
-         * @userdata2    Unsupported Target HUID
-         * @devdesc      fapiGetOtherSideOfMemChannel request for unsupported
-         *               or invalid target type
-         * @custdesc  A problem occurrred during the IPL of the system: Request
-         *            for unsupported or invalid target type.
-         */
-        const bool hbSwError = true;
-        errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL,
-                fapi::RC_UNSUPPORTED_REQUEST,
-                i_target.getType(),
-                TARGETING::get_huid(l_target),
-                hbSwError);
-
-        // Attach the error log to the fapi::ReturnCode
-        l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-    }
-
-    if (!l_rc)  // OK so far, check that state is as requested 
-    {
-       HwasState l_state =
-                l_targetList[0]->getAttr<ATTR_HWAS_STATE>();
-
-       if (((i_state == fapi::TARGET_STATE_PRESENT) && !l_state.present) ||
-           ((i_state == fapi::TARGET_STATE_FUNCTIONAL) && !l_state.functional))
-       {
-           FAPI_ERR("fapiGetOtherSideOfMemChannel. state mismatch");
-           /*@
-            * @errortype
-            * @moduleid     fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL
-            * @reasoncode   fapi::RC_STATE_MISMATCH
-            * @userdata1    Requested state
-            * @userdata2    Other Target HUID
-            * @devdesc      fapiGetOtherSideOfMemChannel target not present or
-            *               functional as requested
-            * @custdesc     A problem occurred during the IPL of the system:
-            *               Requested target not present or not functional.
-            */
-           const bool hbSwError = true;
-           errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL,
-                fapi::RC_STATE_MISMATCH,
-                i_state,
-                TARGETING::get_huid(l_targetList[0]),
-                hbSwError);
-
-           // Attach the error log to the fapi::ReturnCode
-           l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-       }
-
-    }
-
-    FAPI_DBG(EXIT_MRK "fapiGetOtherSideOfMemChannel. rc = 0x%x",
-           static_cast<uint32_t>(l_rc));
-
-    return l_rc;
-}
-
-//******************************************************************************
-// fapiGetChildChiplets function
-//******************************************************************************
-fapi::ReturnCode fapiGetChildChiplets(
-    const fapi::Target & i_chip,
-    const fapi::TargetType i_chipletType,
-    std::vector<fapi::Target> & o_chiplets,
-    const fapi::TargetState i_state)
-{
-    FAPI_DBG(ENTER_MRK "fapiGetChildChiplets. Chiplet Type:0x%08x State:0x%08x",
-             i_chipletType, i_state);
-
-    fapi::ReturnCode l_rc;
-    o_chiplets.clear();
-
-    // Extract the HostBoot Target pointer for the input chip
-    TARGETING::Target * l_pChip =
-        reinterpret_cast<TARGETING::Target*>(i_chip.get());
-
-    // Check that the input target is a chip
-    if (!i_chip.isChip())
-    {
-        FAPI_ERR("fapiGetChildChiplets. Input target type 0x%08x is not a chip",
-                 i_chip.getType());
-        /*@
-         * @errortype
-         * @moduleid     fapi::MOD_FAPI_GET_CHILD_CHIPLETS
-         * @reasoncode   fapi::RC_INVALID_REQUEST
-         * @userdata1    Type of input target
-         * @userdata2    Input Target HUID
-         * @devdesc      fapiGetChildChiplets request for non-chip
-         * @custdesc     A problem occurred during the IPL of the system.
-         */
-        const bool hbSwError = true;
-        errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-            ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-            fapi::MOD_FAPI_GET_CHILD_CHIPLETS,
-            fapi::RC_INVALID_REQUEST,
-            i_chip.getType(),
-            TARGETING::get_huid(l_pChip),
-            hbSwError);
-
-        // Attach the error log to the fapi::ReturnCode
-        l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-    }
-    else
-    {
-        TARGETING::TYPE l_type = TARGETING::TYPE_NA;
-
-        if (i_chipletType == fapi::TARGET_TYPE_EX_CHIPLET)
-        {
-            l_type = TARGETING::TYPE_EX;
-        }
-        else if (i_chipletType == fapi::TARGET_TYPE_MBA_CHIPLET)
-        {
-            l_type = TARGETING::TYPE_MBA;
-        }
-        else if (i_chipletType == fapi::TARGET_TYPE_MCS_CHIPLET)
-        {
-            l_type = TARGETING::TYPE_MCS;
-        }
-        else if (i_chipletType == fapi::TARGET_TYPE_XBUS_ENDPOINT)
-        {
-            l_type = TARGETING::TYPE_XBUS;
-        }
-        else if (i_chipletType == fapi::TARGET_TYPE_ABUS_ENDPOINT)
-        {
-            l_type = TARGETING::TYPE_ABUS;
-        }
-        else if (i_chipletType == fapi::TARGET_TYPE_L4)
-        {
-            l_type = TARGETING::TYPE_L4;
-        }
-        else
-        {
-            FAPI_ERR("fapiGetChildChiplets. Chiplet type 0x%08x not supported",
-                     i_chipletType);
-            /*@
-             * @errortype
-             * @moduleid     fapi::MOD_FAPI_GET_CHILD_CHIPLETS
-             * @reasoncode   fapi::RC_UNSUPPORTED_REQUEST
-             * @userdata1    Type of requested chiplet
-             * @userdata2    Input Chip Target HUID
-             * @devdesc      fapiGetChildChiplets request for unsupported
-             *               or invalid chiplet type
-            * @custdesc     A problem occurred during the IPL of the system:
-            *               Request for an unsupported or invalid chiplet type.
-             */
-            const bool hbSwError = true;
-            errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                fapi::MOD_FAPI_GET_CHILD_CHIPLETS,
-                fapi::RC_UNSUPPORTED_REQUEST,
-                i_chipletType,
-                TARGETING::get_huid(l_pChip),
-                hbSwError);
-
-            // Attach the error log to the fapi::ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-        }
-        if (!l_rc)
-        {
-            if (l_pChip == NULL)
-            {
-                FAPI_ERR("fapiGetChildChiplets. Embedded NULL target pointer");
-                /*@
-                 * @errortype
-                 * @moduleid     fapi::MOD_FAPI_GET_CHILD_CHIPLETS
-                 * @reasoncode   fapi::RC_EMBEDDED_NULL_TARGET_PTR
-                 * @devdesc      Target has embedded null target pointer
-                 */
-                const bool hbSwError = true;
-                errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                    ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                    fapi::MOD_FAPI_GET_CHILD_CHIPLETS,
-                    fapi::RC_EMBEDDED_NULL_TARGET_PTR,
-                    0, 0, hbSwError);
-
-                // Attach the error log to the fapi::ReturnCode
-                l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-            }
-            else
-            {
-                TARGETING::TargetHandleList l_chipletList;
-
-                TARGETING::getChildChiplets(l_chipletList, l_pChip, l_type,
-                                            false);
-
-                // Return fapi::Targets to the caller
-                for (TARGETING::TargetHandleList::const_iterator
-                        chipletIter = l_chipletList.begin();
-                        chipletIter != l_chipletList.end();
-                        ++chipletIter)
-                {
-                    TARGETING::HwasState l_state =
-                        (*chipletIter)->getAttr<TARGETING::ATTR_HWAS_STATE>();
-
-                    // HWPs/FAPI considers partial good chiplets as present, but
-                    // firmware considers them not-present. Return all chiplets
-                    // in the model when caller requests PRESENT
-                    if ((fapi::TARGET_STATE_FUNCTIONAL == i_state) &&
-                        !l_state.functional)
-                    {
-                        continue;
-                    }
-
-                    fapi::Target l_chiplet(i_chipletType,
-                        reinterpret_cast<void *>(*chipletIter));
-                    o_chiplets.push_back(l_chiplet);
-                }
-            }
-        }
-    }
-
-    FAPI_DBG(EXIT_MRK "fapiGetChildChiplets. %d results", o_chiplets.size());
-    return l_rc;
-}
-
-//******************************************************************************
-// fapiGetAssociatedDimms function
-//******************************************************************************
-fapi::ReturnCode fapiGetAssociatedDimms(
-    const fapi::Target& i_target,
-    std::vector<fapi::Target> & o_dimms,
-    const fapi::TargetState i_state)
-{
-    FAPI_DBG(ENTER_MRK "fapiGetAssociatedDimms. State: 0x%08x", i_state);
-
-    fapi::ReturnCode l_rc;
-    o_dimms.clear();
-
-    // Extract the HostBoot Target pointer for the input target
-    TARGETING::Target * l_pTarget =
-        reinterpret_cast<TARGETING::Target*>(i_target.get());
-
-    if (l_pTarget == NULL)
-    {
-        FAPI_ERR("fapiGetAssociatedDimms. Embedded NULL target pointer");
-        /*@
-         * @errortype
-         * @moduleid     fapi::MOD_FAPI_GET_ASSOCIATE_DIMMS
-         * @reasoncode   fapi::RC_EMBEDDED_NULL_TARGET_PTR
-         * @devdesc      Target has embedded null target pointer
-         */
-        const bool hbSwError = true;
-        errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                fapi::MOD_FAPI_GET_ASSOCIATE_DIMMS,
-                fapi::RC_EMBEDDED_NULL_TARGET_PTR,
-                0, 0, hbSwError);
-
-        // Attach the error log to the fapi::ReturnCode
-        l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-    }
-    else
-    {
-        // Get associated dimms
-        TARGETING::PredicateCTM l_predicate(TARGETING::CLASS_LOGICAL_CARD,
-                                            TARGETING::TYPE_DIMM);
-        TARGETING::TargetHandleList l_dimmList;
-
-        TARGETING::targetService().
-        getAssociated(l_dimmList, l_pTarget,
-                      TARGETING::TargetService::CHILD_BY_AFFINITY,
-                      TARGETING::TargetService::ALL, &l_predicate);
-
-        // Return fapi::Targets to the caller
-        for (TARGETING::TargetHandleList::const_iterator
-                dimmIter = l_dimmList.begin();
-                dimmIter != l_dimmList.end();
-                ++dimmIter)
-        {
-            TARGETING::HwasState l_state =
-                (*dimmIter)->getAttr<TARGETING::ATTR_HWAS_STATE>();
-
-            if ((fapi::TARGET_STATE_PRESENT == i_state) && !l_state.present)
-            {
-                continue;
-            }
-            if ((fapi::TARGET_STATE_FUNCTIONAL == i_state) &&
-                !l_state.functional)
-            {
-                continue;
-            }
-
-            fapi::Target l_dimm(fapi::TARGET_TYPE_DIMM,
-                                reinterpret_cast<void *>(*dimmIter));
-            o_dimms.push_back(l_dimm);
-        }
-    }
-
-    FAPI_DBG(EXIT_MRK "fapiGetAssociatedDimms. %d results", o_dimms.size());
-    return l_rc;
-}
-
-//******************************************************************************
-// fapiGetParentChip function
-//******************************************************************************
-fapi::ReturnCode fapiGetParentChip(
-    const fapi::Target& i_chiplet,
-    fapi::Target & o_chip)
-{
-    FAPI_DBG(ENTER_MRK "fapiGetParentChip");
-
-    fapi::ReturnCode l_rc;
-
-    // Extract the HostBoot Target pointer for the input chiplet
-    TARGETING::Target * l_pChiplet =
-        reinterpret_cast<TARGETING::Target*>(i_chiplet.get());
-
-    // Check that the input target is a chiplet
-    if (!i_chiplet.isChiplet())
-    {
-        FAPI_ERR("fapiGetParentChip. Input target type 0x%08x is not a chiplet",
-                 i_chiplet.getType());
-
-        /*@
-         * @errortype
-         * @moduleid     fapi::MOD_FAPI_GET_PARENT_CHIP
-         * @reasoncode   fapi::RC_INVALID_REQUEST
-         * @userdata1    Type of input target
-         * @userdata2    Input Target HUID
-         * @devdesc      fapiGetParentChip request for non-chiplet
-         * @custdesc     A problem occurred during the IPL of the system.
-         */
-        const bool hbSwError = true;
-        errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-            ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-            fapi::MOD_FAPI_GET_PARENT_CHIP,
-            fapi::RC_INVALID_REQUEST,
-            i_chiplet.getType(),
-            TARGETING::get_huid(l_pChiplet),
-            hbSwError);
-
-        // Attach the error log to the fapi::ReturnCode
-        l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-    }
-    else
-    {
-        if (l_pChiplet == NULL)
-        {
-            /*@
-             * @errortype
-             * @moduleid     fapi::MOD_FAPI_GET_PARENT_CHIP
-             * @reasoncode   fapi::RC_EMBEDDED_NULL_TARGET_PTR
-             * @devdesc      Target has embedded null target pointer
-             */
-            const bool hbSwError = true;
-            errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                fapi::MOD_FAPI_GET_PARENT_CHIP,
-                fapi::RC_EMBEDDED_NULL_TARGET_PTR,
-                0, 0, hbSwError);
-
-            // Attach the error log to the fapi::ReturnCode
-            l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-        }
-        else
-        {
-            const TARGETING::Target * l_pChip =
-                TARGETING::getParentChip(l_pChiplet);
-
-            if (l_pChip == NULL)
-            {
-                FAPI_ERR("fapiGetParentChip. Parent not found");
-                /*@
-                 * @errortype
-                 * @moduleid     fapi::MOD_FAPI_GET_PARENT_CHIP
-                 * @reasoncode   fapi::RC_NO_SINGLE_PARENT
-                 * @userdata1    Input Chiplet Target HUID
-                 * @devdesc      fapiGetParentChip did not find one parent
-                 * @custdesc     A problem occurred during the IPL of the system.
-                 */
-                const bool hbSwError = true;
-                errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
-                    ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                    fapi::MOD_FAPI_GET_PARENT_CHIP,
-                    fapi::RC_NO_SINGLE_PARENT,
-                    TARGETING::get_huid(l_pChiplet),
-                    0, hbSwError);
-
-                // Attach the error log to the fapi::ReturnCode
-                l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-            }
-            else
-            {
-                // Set the output chip type
-                if (l_pChip->getAttr<TARGETING::ATTR_TYPE>() ==
-                    TARGETING::TYPE_PROC)
-                {
-                    o_chip.setType(fapi::TARGET_TYPE_PROC_CHIP);
-                }
-                else
-                {
-                    o_chip.setType(fapi::TARGET_TYPE_MEMBUF_CHIP);
-                }
-
-                // Set the output chip (platform specific) handle
-                o_chip.set(reinterpret_cast<void *>
-                    (const_cast<TARGETING::Target*>(l_pChip)));
-            }
-        }
-    }
-
-    FAPI_DBG(EXIT_MRK "fapiGetParentChip");
-    return l_rc;
-}
-
-
-} // extern "C"
diff --git a/src/usr/hwpf/plat/fapiPlatTarget.C b/src/usr/hwpf/plat/fapiPlatTarget.C
deleted file mode 100644
index 66299e1e0..000000000
--- a/src/usr/hwpf/plat/fapiPlatTarget.C
+++ /dev/null
@@ -1,279 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/plat/fapiPlatTarget.C $                          */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/**
- *  @file platTarget.C
- *
- *  @brief Implements the platform part of the Target class.
- *
- *  Note that platform code must provide the implementation.
- *
- *  FAPI has provided a default implementation for platforms that use the
- *  handle pointer to point to a Component that is not created/deleted when a
- *  Target object is created/deleted (i.e. two Target objects that reference
- *  the same component have the same pointer). It could be possible for a
- *  platform specific ID structure to be created and pointed to each time a new
- *  Target is created, in that case, the pointed to object's type needs to be
- *  be known in order to do a deep compare/copy and a delete.
- */
-
-#include <fapiTarget.H>
-#include <fapiPlatTrace.H>
-#include <fapiUtil.H>
-#include <targeting/common/attributes.H>
-#include <string.h>
-
-namespace fapi
-{
-
-//******************************************************************************
-// Compare the handle
-//
-// If the pointers point to the same component then the handles are the same
-//******************************************************************************
-bool Target::compareHandle(const Target & i_right) const
-{
-    return (iv_pHandle == i_right.iv_pHandle);
-}
-
-//******************************************************************************
-// Copy the handle
-//
-// Note shallow copy of iv_pHandle. Both Targets point to the same component
-//******************************************************************************
-void Target::copyHandle(const Target & i_right)
-{
-    iv_pHandle = i_right.iv_pHandle;
-}
-
-//******************************************************************************
-// Delete the handle
-//******************************************************************************
-void Target::deleteHandle()
-{
-    // Intentionally does nothing. The component must not be deleted
-}
-
-//******************************************************************************
-// Get the ecmd-format string
-//******************************************************************************
-const char * Target::toEcmdString() const
-{
-    if (iv_pEcmdString == NULL)
-    {
-        iv_pEcmdString = reinterpret_cast<char(*)>(
-                fapiMalloc(fapi::MAX_ECMD_STRING_LEN * sizeof(char)));
-        char (&l_ecmdString)[fapi::MAX_ECMD_STRING_LEN] =
-            *(reinterpret_cast<char(*)[fapi::MAX_ECMD_STRING_LEN]>
-                (iv_pEcmdString));
-        toString(l_ecmdString);
-    }
-
-    return iv_pEcmdString;
-}
-
-//******************************************************************************
-// Get the ECMD String
-//******************************************************************************
-void Target::toString(char (&o_ecmdString)[MAX_ECMD_STRING_LEN]) const
-{
-    // Extract the Targeting target pointer
-    TARGETING::Target* l_pTarget =
-        reinterpret_cast<TARGETING::Target*>(iv_pHandle);
-
-    if (l_pTarget == NULL)
-    {
-        FAPI_ERR("toString: Called on NULL target");
-        strcpy(o_ecmdString, "ecmd-no-target");
-    }
-    else
-    {
-        // TODO. RTC 98421
-        // This is a temporary function that constructs the ECMD String from the
-        // target's physical path attribute, eventually, the ECMD String will be
-        // its own attribute (sourced from the MRW) and this function will be
-        // changed to simply get the attribute
-
-        // Try to get the physical path attribute
-        TARGETING::EntityPath l_path;
-        if (l_pTarget->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_path))
-        {
-            uint32_t l_sizePath = l_path.size();
-
-            // This function returns the ecmd string for chips and chiplets. The
-            // output string is:
-            // Chiplet: <chip>.<unit> kX:nX:sX:pXX:cX
-            // Chip:    <chip> kX:nX:sX:pXX
-            // There is officially a tab character between ">" and "k", this is
-            // replaced with the number of spaces seen in the Cronus trace
-            // If the k.. string is less than 19 chars, it is padded to 19 chars
-            //
-            // <chip> = chip type ("p8" = processor, "centaur" = memory buffer)
-            // <unit> = unit type ("ex", "mcs", "mba", "abus", "xbus")
-            // kX     = cage number. Always zero
-            // nX     = node number. Always zero (right now)
-            // sX     = slot number. Always zero
-            // pXX    = chip position
-            // cX     = unit position
-            //
-            // Examples:
-            //   "p8 k0:n0:s0:p01       "
-            //   "p8.ex      k0:n0:s0:p01:c0    "
-            //   "p8.mcs     k0:n0:s0:p01:c0    "
-            //   "centaur    k0:n0:s0:p01       "
-            const char * const ECMD_CHIP_PROC = "p8";
-            const char * const ECMD_CHIP_PROC_SPC = " ";
-            const char * const ECMD_CHIP_MEMBUF = "centaur";
-            const char * const ECMD_CHIP_MEMBUF_SPC = "    ";
-            const char * const ECMD_CHIPLET_EX   = "ex      ";
-            const char * const ECMD_CHIPLET_MCS  = "mcs     ";
-            const char * const ECMD_CHIPLET_MBA  = "mba     ";
-            const char * const ECMD_CHIPLET_XBUS = "xbus    ";
-            const char * const ECMD_CHIPLET_ABUS = "abus    ";
-            const int K_STRING_LEN = 19;
-
-            // Look for a chip in the path
-            const char * l_pChipType = NULL;
-            const char * l_pChipTypeSpc = NULL;
-            uint32_t l_chipPos = 0;
-            uint32_t l_node = 0;
-
-            for (uint32_t i = 0; ((i < l_sizePath) && (l_pChipType == NULL));
-                 i++)
-            {
-                if(l_path[i].type == TARGETING::TYPE_NODE){
-                    l_node = l_path[i].instance;
-                }
-                if (l_path[i].type == TARGETING::TYPE_PROC)
-                {
-                    l_pChipType = ECMD_CHIP_PROC;
-                    l_pChipTypeSpc = ECMD_CHIP_PROC_SPC;
-                    l_chipPos = l_path[i].instance;
-                }
-                else if (l_path[i].type == TARGETING::TYPE_MEMBUF)
-                {
-                    l_pChipType = ECMD_CHIP_MEMBUF;
-                    l_pChipTypeSpc = ECMD_CHIP_MEMBUF_SPC;
-                    l_chipPos = l_path[i].instance;
-                }
-            }
-
-            if (l_pChipType == NULL)
-            {
-                FAPI_ERR("toString: Physical Path does not contain known chip");
-                strcpy(o_ecmdString, "ecmd-no-chip");
-            }
-            else
-            {
-                // Look for the last chiplet in the path (some chiplets are
-                // children of other chiplets in PHYS_PATH e.g. MBS->MBA)
-                const char * l_pChipletType = NULL;
-                uint32_t l_chipletPos = 0;
-
-                for (int32_t i = l_sizePath - 1;
-                     ((i >= 0) && (l_pChipletType == NULL));
-                     i--)
-                {
-                    if (l_path[i].type == TARGETING::TYPE_EX)
-                    {
-                        l_pChipletType = ECMD_CHIPLET_EX;
-                        l_chipletPos = l_path[i].instance;
-                    }
-                    else if (l_path[i].type == TARGETING::TYPE_MCS)
-                    {
-                        l_pChipletType = ECMD_CHIPLET_MCS;
-                        l_chipletPos = l_path[i].instance;
-                    }
-                    else if (l_path[i].type == TARGETING::TYPE_MBA)
-                    {
-                        l_pChipletType = ECMD_CHIPLET_MBA;
-                        l_chipletPos = l_path[i].instance;
-                    }
-                    else if (l_path[i].type == TARGETING::TYPE_XBUS)
-                    {
-                        l_pChipletType = ECMD_CHIPLET_XBUS;
-                        l_chipletPos = l_path[i].instance;
-                    }
-                    else if (l_path[i].type == TARGETING::TYPE_ABUS)
-                    {
-                        l_pChipletType = ECMD_CHIPLET_ABUS;
-                        l_chipletPos = l_path[i].instance;
-                    }
-                }
-
-                // Construct the ecmd string
-                char * l_pStr = &o_ecmdString[0];
-
-                // Chip Type
-                strcpy(l_pStr, l_pChipType);
-                l_pStr += strlen(l_pChipType);
-
-                if (l_pChipletType != NULL)
-                {
-                    // Chiplet Type
-                    *l_pStr = '.';
-                    l_pStr++;
-
-                    strcpy(l_pStr, l_pChipletType);
-                    l_pStr += strlen(l_pChipletType);
-                }
-                else
-                {
-                    strcpy(l_pStr, l_pChipTypeSpc);
-                    l_pStr += strlen(l_pChipTypeSpc);
-                }
-
-                int l_kstringlen = sprintf(l_pStr, "k0:n%d:s0:p%02d",
-                                l_node, l_chipPos);
-                l_pStr += l_kstringlen;
-
-                if (l_pChipletType != NULL)
-                {
-                    // Chiplet Pos
-                    int l_num = sprintf(l_pStr, ":c%d", l_chipletPos);
-                    l_pStr += l_num;
-                    l_kstringlen += l_num;
-                }
-
-                // Pad the k-string to K_STRING_LEN characters
-                while (l_kstringlen < K_STRING_LEN)
-                {
-                    *l_pStr = ' ';
-                    l_pStr++;
-                    l_kstringlen++;
-                }
-
-                *l_pStr = '\0';
-            }
-        }
-        else
-        {
-            FAPI_ERR("toString: Physical Path Attribute does not exist");
-            strcpy(o_ecmdString, "ecmd-no-path");
-        }
-    }
-}
-
-}
-
diff --git a/src/usr/hwpf/plat/fapiPlatTask.C b/src/usr/hwpf/plat/fapiPlatTask.C
deleted file mode 100644
index b4c06a7e0..000000000
--- a/src/usr/hwpf/plat/fapiPlatTask.C
+++ /dev/null
@@ -1,83 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/plat/fapiPlatTask.C $                            */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/**
- *  @file fapiPlatTask.C
- *
- *  @brief Performs the Hostboot fapi::plat startup task
- */
-
-//******************************************************************************
-// Includes
-//******************************************************************************
-#include <initservice/taskargs.H>
-#include <hwpf/plat/fapiPlatAttrOverrideSync.H>
-#include <hwpf/plat/fapiPlatTrace.H>
-
-namespace fapi
-{
-
-//******************************************************************************
-// Global Variables
-//******************************************************************************
-// Defined in fapiPlatAttrOverrideSync.C
-extern TARGETING::AttributeTank::AttributeHeader g_attrOverrideHeader;
-extern uint8_t g_attrOverride[AttrOverrideSync::MAX_DIRECT_OVERRIDE_ATTR_SIZE_BYTES];
-extern uint8_t g_attrOverrideFapiTank;
-
-//******************************************************************************
-// This function monitors for FSP mailbox messages
-//******************************************************************************
-void * platMonitorForFspMessages(void * i_pContext)
-{
-    FAPI_IMP("Starting platMonitorForFspMessages");
-    fapi::theAttrOverrideSync().monitorForFspMessages();
-    return NULL; // Execution should never reach here
-}
-
-//******************************************************************************
-// This function is run when the extended initservice loads the plat module
-//
-// It writes the global variables associated with direct attribute override to
-// ensure they are paged and pinned in memory. These variables are used by a
-// debug tool to override attributes
-//
-// It starts a task that monitors for FSP mailbox messages on the
-// HB_HWPF_ATTR_MSGQ message queue
-//******************************************************************************
-void platTaskEntry(errlHndl_t &io_errl)
-{
-    FAPI_IMP("Starting platTaskEntry");
-
-    // Write the global variables associated with direct attribute override
-    g_attrOverrideHeader.iv_attrId = 0;
-    g_attrOverride[0] = 0;
-    g_attrOverrideFapiTank = 0;
-
-    // Start task that monitors for FSP mailbox messages
-    task_create(fapi::platMonitorForFspMessages, NULL);
-}
-
-} // End fapi namespace
-
-// Macro that creates the _start function
-TASK_ENTRY_MACRO(fapi::platTaskEntry);
diff --git a/src/usr/hwpf/plat/fapiPlatUtil.C b/src/usr/hwpf/plat/fapiPlatUtil.C
deleted file mode 100644
index a61cd012a..000000000
--- a/src/usr/hwpf/plat/fapiPlatUtil.C
+++ /dev/null
@@ -1,340 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/plat/fapiPlatUtil.C $                            */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/**
- *  @file fapiPlatUtil.C
- *
- *  @brief Implements the fapiUtil.H utility functions.
- *
- *  Note that platform code must provide the implementation.
- */
-
-#include <assert.h>
-#include <fapi.H>
-#include <trace/interface.H>
-#include <sys/time.h>
-#include <errl/errlmanager.H>
-#include <fapiPlatHwpInvoker.H>
-#include <vfs/vfs.H>
-#include <initservice/initsvcbreakpoint.H>
-#include <errl/errlentry.H>
-#include <initservice/initserviceif.H>
-#include <util/align.H>
-#include <fapiPlatUtil.H>
-
-#ifdef __HOSTBOOT_RUNTIME
-#include <runtime/interface.h>
-#include <targeting/common/targetservice.H>
-#include <runtime/rt_targeting.H>
-#include <isteps/hwpf_reasoncodes.H>
-#include "handleSpecialWakeup.H"
-#endif
-
-//******************************************************************************
-// Trace descriptors
-//******************************************************************************
-trace_desc_t* g_fapiTd;
-trace_desc_t* g_fapiImpTd;
-trace_desc_t* g_fapiScanTd;
-trace_desc_t* g_fapiMfgTd;
-
-//******************************************************************************
-// Global TracInit objects. Construction will initialize the trace buffer
-//******************************************************************************
-TRAC_INIT(&g_fapiTd, FAPI_TRACE_NAME, 2*KILOBYTE);
-TRAC_INIT(&g_fapiImpTd, FAPI_IMP_TRACE_NAME, 2*KILOBYTE);
-TRAC_INIT(&g_fapiScanTd, FAPI_SCAN_TRACE_NAME, 4*KILOBYTE);
-TRAC_INIT(&g_fapiMfgTd, FAPI_MFG_TRACE_NAME, 4*KILOBYTE);
-
-extern "C"
-{
-
-//******************************************************************************
-// fapiAssert
-//******************************************************************************
-void fapiAssert(bool i_expression)
-{
-    assert(i_expression);
-}
-
-//******************************************************************************
-// fapiDelay
-//
-// At the present time, VBU runs hostboot without a Simics
-// front end. If a HW procedure wants to delay, we just make the
-// syscall nanosleep().  In the syscall, the kernel will continue to consume
-// clock cycles as it looks for a runnable task. When the sleep time expires,
-// the calling task will resume running.
-//
-// In the future there could be a Simics front end to hostboot VBU. Then
-// a possible implementation will be to use the Simics magic instruction
-// to trigger a Simics hap. The Simics hap handler can call the simdispatcher
-// client/server API to tell the Awan to advance some number of cycles.
-//
-// Monte  4 Aug 2011
-//******************************************************************************
-
-fapi::ReturnCode fapiDelay(uint64_t i_nanoSeconds, uint64_t i_simCycles)
-{
-    FAPI_DBG( INFO_MRK "delay %lld nanosec", i_nanoSeconds );
-    nanosleep( 0, i_nanoSeconds );
-    return fapi::FAPI_RC_SUCCESS;
-}
-
-//******************************************************************************
-// fapiLogError
-//******************************************************************************
-void fapiLogError(fapi::ReturnCode & io_rc,
-                  fapi::fapiErrlSeverity_t i_sev,
-                  bool i_unitTestError)
-{
-    // ENUM CONVERSION FAPI to PLATFORM
-
-    errlHndl_t l_pError = NULL;
-
-    FAPI_INF("fapiLogError: logging error");
-
-    // Convert a FAPI severity to a ERRORLOG severity
-    ERRORLOG::errlSeverity_t l_sev = ERRORLOG::ERRL_SEV_UNRECOVERABLE;
-    switch (i_sev)
-    {
-        case fapi::FAPI_ERRL_SEV_RECOVERED:
-            l_sev = ERRORLOG::ERRL_SEV_RECOVERED;
-            break;
-        case fapi::FAPI_ERRL_SEV_PREDICTIVE:
-            l_sev = ERRORLOG::ERRL_SEV_PREDICTIVE;
-            break;
-        case fapi::FAPI_ERRL_SEV_UNRECOVERABLE:
-            // l_sev set above
-            break;
-        default:
-            FAPI_ERR("severity (i_sev) of %d is unknown",i_sev);
-    }
-
-    // Convert the return code to an error log.
-    // This will set the return code to FAPI_RC_SUCCESS and clear any PLAT Data,
-    // HWP FFDC data, and Error Target associated with it.
-    l_pError = fapiRcToErrl(io_rc, l_sev);
-
-    // Commit the error log. This will delete the error log and set the handle
-    // to NULL.
-    if (i_unitTestError)
-    {
-        errlCommit(l_pError, CXXTEST_COMP_ID);
-    }
-    else
-    {
-        errlCommit(l_pError, HWPF_COMP_ID);
-    }
-}
-
-//******************************************************************************
-// platIsScanTraceEnabled
-//******************************************************************************
-bool platIsScanTraceEnabled()
-{
-  // SCAN trace can be dynamically turned on/off, always return true here
-  return 1;
-}
-
-//******************************************************************************
-// platSetScanTrace
-// Implementation to be added if needed
-//******************************************************************************
-//void platSetScanTrace(bool i_enable)
-//{
-//
-//}
-
-//******************************************************************************
-// fapiLoadInitFile
-//******************************************************************************
-fapi::ReturnCode fapiLoadInitFile(const fapi::Target & i_Target,
-    const char * i_file, const char *& o_addr, size_t & o_size)
-{
-#ifndef __HOSTBOOT_RUNTIME
-    fapi::ReturnCode l_rc = fapi::FAPI_RC_SUCCESS;
-    errlHndl_t l_pError = NULL;
-    o_size = 0;
-    o_addr = NULL;
-
-    FAPI_INF("fapiLoadInitFile: %s", i_file);
-
-    l_pError = VFS::module_load(i_file);
-    if(l_pError)
-    {
-        // Add the error log pointer as data to the ReturnCode
-        FAPI_ERR("fapiLoadInitFile: module_load failed");
-        l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-    }
-    else
-    {
-        l_pError = VFS::module_address(i_file, o_addr, o_size);
-        if(l_pError)
-        {
-            // Add the error log pointer as data to the ReturnCode
-            FAPI_ERR("fapiLoadInitFile: module_address failed");
-            l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-        }
-        else
-        {
-            FAPI_DBG("fapiLoadInitFile: data module addr = %p, size = %ld",
-                      o_addr, o_size);
-            FAPI_DBG("fapiLoadInitFile: *addr = 0x%llX",
-                      *(reinterpret_cast<const uint64_t*>(o_addr)));
-        }
-    }
-#else
-    fapi::ReturnCode l_rc = fapi::FAPI_RC_PLAT_NOT_SUPPORTED_AT_RUNTIME;
-#endif
-
-    return l_rc;
-}
-
-//******************************************************************************
-// fapiUnloadInitFile
-//******************************************************************************
-fapi::ReturnCode fapiUnloadInitFile(const char * i_file, const char *& io_addr,
-    size_t & io_size)
-{
-#ifndef __HOSTBOOT_RUNTIME
-    fapi::ReturnCode l_rc = fapi::FAPI_RC_SUCCESS;
-    errlHndl_t l_pError = NULL;
-
-    FAPI_INF("fapiUnloadInitFile: %s", i_file);
-
-    l_pError = VFS::module_unload(i_file);
-    if(l_pError)
-    {
-        // Add the error log pointer as data to the ReturnCode
-        FAPI_ERR("fapiUnloadInitFile: module_unload failed %s", i_file);
-        l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
-    }
-    else
-    {
-        io_addr = NULL;
-        io_size = 0;
-    }
-#else
-    fapi::ReturnCode l_rc = fapi::FAPI_RC_PLAT_NOT_SUPPORTED_AT_RUNTIME;
-#endif
-
-    return l_rc;
-}
-
-//******************************************************************************
-// fapiBreakPoint
-//******************************************************************************
-void fapiBreakPoint( uint32_t i_info)
-{
-#ifndef __HOSTBOOT_RUNTIME
-    INITSERVICE::iStepBreakPoint( i_info );
-#endif
-}
-
-//******************************************************************************
-// fapiSpecialWakeup
-//******************************************************************************
-fapi::ReturnCode fapiSpecialWakeup(const fapi::Target & i_target,
-                                   const bool i_enable)
-{
-    fapi::ReturnCode fapi_rc = fapi::FAPI_RC_SUCCESS;
-    FAPI_INF("fapiSpecialWakeup");
-#ifdef __HOSTBOOT_RUNTIME
-    if(!INITSERVICE::spBaseServicesEnabled())
-    {
-        TARGETING::Target* l_EXtarget =
-            reinterpret_cast<TARGETING::Target*>(i_target.get());
-
-        errlHndl_t err_SW = handleSpecialWakeup(l_EXtarget,i_enable);
-        if(err_SW)
-        {
-            fapi_rc.setPlatError(reinterpret_cast<void *>(err_SW));
-        }
-
-    }
-    else if(g_hostInterfaces && g_hostInterfaces->wakeup)
-    {
-        TARGETING::Target* target =
-            reinterpret_cast<TARGETING::Target*>(i_target.get());
-
-        RT_TARG::rtChipId_t core_id = 0;
-        errlHndl_t err = RT_TARG::getRtTarget(target, core_id);
-        if(err)
-        {
-            fapi_rc.setPlatError(reinterpret_cast<void *>(err));
-        }
-        else
-        {
-            uint32_t mode = 0;   //Force awake
-            if(!i_enable)
-            {
-                mode = 1;       // clear force
-            }
-            int rc = g_hostInterfaces->wakeup(core_id, mode);
-
-            if(rc)
-            {
-                FAPI_ERR("CPU core wakeup call to hypervisor returned rc = %d",
-                         rc);
-                /*@
-                 * @errortype
-                 * @moduleid     fapi::MOD_PLAT_SPECIAL_WAKEUP
-                 * @reasoncode   fapi::RC_RT_WAKEUP_FAILED
-                 * @userdata1    Hypervisor return code
-                 * @userdata2    Chiplet HUID
-                 * @devdesc      Error code from hypervisor wakeup call
-                 */
-                const bool hbSwError = true;
-                err = new ERRORLOG::ErrlEntry(
-                                              ERRORLOG::ERRL_SEV_UNRECOVERABLE,
-                                              fapi::MOD_PLAT_SPECIAL_WAKEUP,
-                                              fapi::RC_RT_WAKEUP_FAILED,
-                                              rc,
-                                              TARGETING::get_huid(target),
-                                              hbSwError);
-
-                fapi_rc.setPlatError(reinterpret_cast<void*>(err));
-            }
-        }
-    }
-#endif
-    // On Hostboot, processor cores cannot sleep so return success to the
-    // fapiSpecialWakeup enable/disable calls
-    return fapi_rc;
-}
-
-}
-
-//******************************************************************************
-// fapiPlatMalloc
-//******************************************************************************
-void* fapiPlatMalloc(size_t s)
-{
-    if (s > PAGE_SIZE)
-    {
-        s = PAGE_SIZE * ALIGN_POW2(ALIGN_PAGE(s) / PAGE_SIZE);
-    }
-    return malloc(s);
-}
diff --git a/src/usr/hwpf/plat/makefile b/src/usr/hwpf/plat/makefile
deleted file mode 100644
index 912a359ea..000000000
--- a/src/usr/hwpf/plat/makefile
+++ /dev/null
@@ -1,33 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/plat/makefile $
-#
-# OpenPOWER HostBoot Project
-#
-# COPYRIGHT International Business Machines Corp. 2011,2014
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-ROOTPATH = ../../../..
-MODULE = plat
-
-# include common fapi OBJs between HB and HBRT
-include plat.mk
-
-OBJS += fapiPlatTask.o
-
-SUBDIRS += runtime.d
-
-include ${ROOTPATH}/config.mk
diff --git a/src/usr/hwpf/plat/plat.mk b/src/usr/hwpf/plat/plat.mk
deleted file mode 100644
index 063796055..000000000
--- a/src/usr/hwpf/plat/plat.mk
+++ /dev/null
@@ -1,44 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/plat/plat.mk $
-#
-# OpenPOWER HostBoot Project
-#
-# Contributors Listed Below - COPYRIGHT 2014,2015
-# [+] International Business Machines Corp.
-#
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-# Common to both HB and HBRT
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/ecmddatabuffer
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/plat
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/fapi
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp
-EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/include
-EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/pstates/pstates
-EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars
-
-OBJS += fapiPlatHwAccess.o
-OBJS += fapiPlatHwpInvoker.o
-OBJS += fapiPlatReturnCodeDataRef.o
-OBJS += fapiPlatSystemConfig.o
-OBJS += fapiPlatTarget.o
-OBJS += fapiPlatUtil.o
-OBJS += fapiPlatAttributeService.o
-OBJS += fapiPlatMvpdAccess.o
-OBJS += fapiPlatMBvpdAccess.o
-OBJS += fapiPlatAttrOverrideSync.o
-
diff --git a/src/usr/hwpf/plat/runtime/makefile b/src/usr/hwpf/plat/runtime/makefile
deleted file mode 100644
index 76e324d85..000000000
--- a/src/usr/hwpf/plat/runtime/makefile
+++ /dev/null
@@ -1,35 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/plat/runtime/makefile $
-#
-# OpenPOWER HostBoot Project
-#
-# Contributors Listed Below - COPYRIGHT 2013,2015
-# [+] International Business Machines Corp.
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-HOSTBOOT_RUNTIME = 1
-ROOTPATH = ../../../../..
-MODULE = plat_rt
-VPATH += ../
-
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp/pll_accessors/
-EXTRAINCDIR += ${ROOTPATH}/src/usr/scom/runtime
-
-# include common fapi OBJs
-include ../plat.mk
-
-include ${ROOTPATH}/config.mk
diff --git a/src/usr/hwpf/test/fapiAttrTest.C b/src/usr/hwpf/test/fapiAttrTest.C
deleted file mode 100644
index fa1575812..000000000
--- a/src/usr/hwpf/test/fapiAttrTest.C
+++ /dev/null
@@ -1,585 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/test/fapiAttrTest.C $                            */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2013,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/**
- *  @file fapiAttrTest.C
- *
- *  @brief Implements FAPI Attribute unit test functions.
- *
- *  This is provided by FAPI and can be pulled into any unit test framework.
- *  Each unit test returns 0 for success, else error value.
- */
-
-/*
- * Change Log ******************************************************************
- * Flag     Defect/Feature  User        Date        Description
- * ------   --------------  ----------  ----------- ----------------------------
- *                          mjjones     02/15/2013  Created. Ported from HWP.
- */
-
-#include <fapi.H>
-
-namespace fapi
-{
-
-//******************************************************************************
-// attrTest1. Test ATTR_SCRATCH_UINT8_1
-//******************************************************************************
-uint32_t attrTest1()
-{
-    uint32_t l_result = 0;
-
-    do
-    {
-        fapi::ReturnCode l_rc;
-
-        uint8_t l_uint8 = 0x87;
-
-        // Test set
-        l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT8_1, NULL, l_uint8);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest1: ATTR_SCRATCH_UINT8_1. Error from SET (1)");
-            l_result = 1;
-            break;
-        }
-
-        // Test get
-        l_uint8 = 8;
-        l_rc = FAPI_ATTR_GET(ATTR_SCRATCH_UINT8_1, NULL, l_uint8);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest1: ATTR_SCRATCH_UINT8_1. Error from GET (2)");
-            l_result = 2;
-            break;
-        }
-
-        // Check value
-        if (l_uint8 != 0x87)
-        {
-            FAPI_ERR("attrTest1: ATTR_SCRATCH_UINT8_1. GET returned %d (3)",
-                     l_uint8);
-            l_result = 3;
-            break;
-        }
-
-        // Set to zero
-        l_uint8 = 0;
-        l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT8_1, NULL, l_uint8);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest1: ATTR_SCRATCH_UINT8_1. Error from SET (4)");
-            l_result = 4;
-            break;
-        }
-
-    } while (0);
-
-    if (!l_result)
-    {
-        FAPI_INF("attrTest1: unit test success");
-    }
-    return l_result;
-}
-
-//******************************************************************************
-// attrTest2. Test ATTR_SCRATCH_UINT32_1
-//******************************************************************************
-uint32_t attrTest2()
-{
-    uint32_t l_result = 0;
-
-    do
-    {
-        fapi::ReturnCode l_rc;
-
-        uint32_t l_uint32 = 0x80000001;
-
-        // Test set
-        l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT32_1, NULL, l_uint32);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest2: ATTR_SCRATCH_UINT32_1. Error from SET (1)");
-            l_result = 1;
-            break;
-        }
-
-        // Test get
-        l_uint32 = 8;
-        l_rc = FAPI_ATTR_GET(ATTR_SCRATCH_UINT32_1, NULL, l_uint32);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest2: ATTR_SCRATCH_UINT32_1. Error from GET (2)");
-            l_result = 2;
-            break;
-        }
-
-        // Check value
-        if (l_uint32 != 0x80000001)
-        {
-            FAPI_ERR("attrTest2: ATTR_SCRATCH_UINT32_1. GET returned %d (3)",
-                     l_uint32);
-            l_result = 3;
-            break;
-        }
-
-        // Set to zero
-        l_uint32 = 0;
-        l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT32_1, NULL, l_uint32);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest2: ATTR_SCRATCH_UINT32_1. Error from SET (4)");
-            l_result = 4;
-            break;
-        }
-
-    } while (0);
-
-    if (!l_result)
-    {
-        FAPI_INF("attrTest2: unit test success");
-    }
-    return l_result;
-}
-
-//******************************************************************************
-// attrTest3. Test ATTR_SCRATCH_UINT64_1
-//******************************************************************************
-uint32_t attrTest3()
-{
-    uint32_t l_result = 0;
-
-    do
-    {
-        fapi::ReturnCode l_rc;
-
-        uint64_t l_uint64 = 3;
-
-        // Test set
-        l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT64_1, NULL, l_uint64);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest3: ATTR_SCRATCH_UINT64_1. Error from SET (1)");
-            l_result = 1;
-            break;
-        }
-
-        // Test get
-        l_uint64 = 8;
-        l_rc = FAPI_ATTR_GET(ATTR_SCRATCH_UINT64_1, NULL, l_uint64);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest3: ATTR_SCRATCH_UINT64_1. Error from GET (2)");
-            l_result = 2;
-            break;
-        }
-
-        // Check value
-        if (l_uint64 != 3)
-        {
-            FAPI_ERR("attrTest3: ATTR_SCRATCH_UINT64_1. GET returned %d (3)",
-                     static_cast<uint32_t>(l_uint64));
-            l_result = 3;
-            break;
-        }
-
-        // Set to zero
-        l_uint64 = 0;
-        l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT64_1, NULL, l_uint64);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest3: ATTR_SCRATCH_UINT64_1. Error from SET (4)");
-            l_result = 4;
-            break;
-        }
-
-    } while (0);
-
-    if (!l_result)
-    {
-        FAPI_INF("attrTest3: unit test success");
-    }
-    return l_result;
-}
-
-//******************************************************************************
-// attrTest4. Test ATTR_SCRATCH_UINT8_ARRAY_1
-//******************************************************************************
-uint32_t attrTest4()
-{
-    uint32_t l_result = 0;
-
-    do
-    {
-        fapi::ReturnCode l_rc;
-
-        uint8_t l_uint8array1[32];
-
-        // Test set
-        for (uint32_t i = 0; i < 32; i++)
-        {
-            l_uint8array1[i] = i + 1;
-        }
-
-        l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT8_ARRAY_1, NULL, l_uint8array1);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest4: ATTR_SCRATCH_UINT8_ARRAY_1. Error from SET (1)");
-            l_result = 1;
-            break;
-        }
-
-        // Test get
-        for (uint32_t i = 0; i < 32; i++)
-        {
-            l_uint8array1[i] = 0;
-        }
-
-        l_rc = FAPI_ATTR_GET(ATTR_SCRATCH_UINT8_ARRAY_1, NULL, l_uint8array1);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest4: ATTR_SCRATCH_UINT8_ARRAY_1. Error from GET (2)");
-            l_result = 2;
-            break;
-        }
-
-        // Check value
-        for (uint32_t i = 0; i < 32; i++)
-        {
-            if (l_uint8array1[i] != (i + 1))
-            {
-                FAPI_ERR("attrTest4: ATTR_SCRATCH_UINT8_ARRAY_1. GET [%d] returned %d (3)",
-                          i, l_uint8array1[i]);
-                l_result = 3;
-                break;
-            }
-        }
-
-        if (l_result)
-        {
-            break;
-        }
-
-        // Set to zero
-        for (uint32_t i = 0; i < 32; i++)
-        {
-            l_uint8array1[i] = 0;
-        }
-
-        l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT8_ARRAY_1, NULL, l_uint8array1);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest4: ATTR_SCRATCH_UINT8_ARRAY_1. Error from SET (4)");
-            l_result = 4;
-            break;
-        }
-
-    } while (0);
-
-    if (!l_result)
-    {
-        FAPI_INF("attrTest4: unit test success");
-    }
-    return l_result;
-}
-
-//******************************************************************************
-// attrTest5. Test ATTR_SCRATCH_UINT32_ARRAY_2
-//******************************************************************************
-uint32_t attrTest5()
-{
-    uint32_t l_result = 0;
-
-    do
-    {
-        fapi::ReturnCode l_rc;
-
-        uint32_t l_uint32 = 1;
-        uint32_t l_uint32array2[2][3];
-
-        // Test set
-        l_uint32 = 1;
-        for (uint32_t i = 0; i < 2; i++)
-        {
-            for (uint32_t j = 0; j < 3; j++)
-            {
-                l_uint32array2[i][j] = l_uint32++;
-            }
-        }
-
-        l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT32_ARRAY_2, NULL, l_uint32array2);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest5: ATTR_SCRATCH_UINT32_ARRAY_2. Error from SET (1)");
-            l_result = 1;
-            break;
-        }
-
-        // Test get
-        for (uint32_t i = 0; i < 2; i++)
-        {
-            for (uint32_t j = 0; j < 3; j++)
-            {
-                l_uint32array2[i][j] = 0;
-            }
-        }
-
-        l_rc = FAPI_ATTR_GET(ATTR_SCRATCH_UINT32_ARRAY_2, NULL, l_uint32array2);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest5: ATTR_SCRATCH_UINT32_ARRAY_2. Error from GET (2)");
-            l_result = 2;
-            break;
-        }
-
-        // Check value
-        l_uint32 = 1;
-        for (uint32_t i = 0; i < 2; i++)
-        {
-            for (uint32_t j = 0; j < 3; j++)
-            {
-                if (l_uint32array2[i][j] != l_uint32++)
-                {
-                    FAPI_ERR("attrTest5: ATTR_SCRATCH_UINT32_ARRAY_2. GET [%d:%d] returned %d (3)",
-                             i, j, l_uint32array2[i][j]);
-                    l_result = 3;
-                    break;
-                }
-            }
-            if (l_result)
-            {
-                break;
-            }
-        }
-
-        if (l_result)
-        {
-            break;
-        }
-
-        // Set to zero
-        for (uint32_t i = 0; i < 2; i++)
-        {
-            for (uint32_t j = 0; j < 3; j++)
-            {
-                l_uint32array2[i][j]= 0;
-            }
-        }
-
-        l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT32_ARRAY_2, NULL, l_uint32array2);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest5: ATTR_SCRATCH_UINT32_ARRAY_2. Error from SET (4)");
-            l_result = 4;
-            break;
-        }
-
-    } while (0);
-
-    if (!l_result)
-    {
-        FAPI_INF("attrTest5: unit test success");
-    }
-    return l_result;
-}
-
-//******************************************************************************
-// attrTest6. Test ATTR_SCRATCH_UINT64_ARRAY_2
-//******************************************************************************
-uint32_t attrTest6()
-{
-    uint32_t l_result = 0;
-
-    do
-    {
-        fapi::ReturnCode l_rc;
-
-        uint64_t l_uint64 = 1;
-        uint64_t l_uint64array2[2][2];
-
-        // Test set
-        l_uint64 = 1;
-        for (uint32_t i = 0; i < 2; i++)
-        {
-            for (uint32_t j = 0; j < 2; j++)
-            {
-                l_uint64array2[i][j] = l_uint64++;
-            }
-        }
-
-        l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT64_ARRAY_2, NULL, l_uint64array2);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest6: ATTR_SCRATCH_UINT64_ARRAY_2. Error from SET (1)");
-            l_result = 1;
-            break;
-        }
-
-        // Test get
-        for (uint32_t i = 0; i < 2; i++)
-        {
-            for (uint32_t j = 0; j < 2; j++)
-            {
-                l_uint64array2[i][j] = 0;
-            }
-        }
-
-        l_rc = FAPI_ATTR_GET(ATTR_SCRATCH_UINT64_ARRAY_2, NULL, l_uint64array2);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest6: ATTR_SCRATCH_UINT64_ARRAY_2. Error from GET (2)");
-            l_result = 2;
-            break;
-        }
-
-        // Check value
-        l_uint64 = 1;
-        for (uint32_t i = 0; i < 2; i++)
-        {
-            for (uint32_t j = 0; j < 2; j++)
-            {
-                if (l_uint64array2[i][j] != l_uint64++)
-                {
-                    FAPI_ERR("attrTest6: ATTR_SCRATCH_UINT64_ARRAY_2. GET [%d:%d] returned %d (3)",
-                             i, j, static_cast<uint32_t>(l_uint64array2[i][j]));
-                    l_result = 3;
-                    break;
-                }
-            }
-            if (l_result)
-            {
-                break;
-            }
-        }
-
-        if (l_result)
-        {
-            break;
-        }
-
-        // Set to zero
-        for (uint32_t i = 0; i < 2; i++)
-        {
-            for (uint32_t j = 0; j < 2; j++)
-            {
-                l_uint64array2[i][j]= 0;
-            }
-        }
-
-        l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT64_ARRAY_2, NULL, l_uint64array2);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest6: ATTR_SCRATCH_UINT64_ARRAY_2. Error from SET (4)");
-            l_result = 4;
-            break;
-        }
-    } while (0);
-
-    if (!l_result)
-    {
-        FAPI_INF("attrTest6: unit test success");
-    }
-    return l_result;
-}
-
-//******************************************************************************
-// attrTest7. Test setting and getting an enum value from a scratch attribute
-//******************************************************************************
-uint32_t attrTest7()
-{
-    uint32_t l_result = 0;
-
-    do
-    {
-        fapi::ReturnCode l_rc;
-
-        uint64_t l_uint64 = fapi::ENUM_ATTR_SCRATCH_UINT64_2_VAL_C;
-
-        // Test set
-        l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT64_2, NULL, l_uint64);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest7: ATTR_SCRATCH_UINT64_2. Error from SET (enum) (1)");
-            l_result = 1;
-            break;
-        }
-
-        // Test get
-        l_uint64 = 0;
-        l_rc = FAPI_ATTR_GET(ATTR_SCRATCH_UINT64_2, NULL, l_uint64);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest7: ATTR_SCRATCH_UINT64_2. Error from GET (enum) (2)");
-            l_result = 2;
-            break;
-        }
-
-        // Check value
-        if (l_uint64 != fapi::ENUM_ATTR_SCRATCH_UINT64_2_VAL_C)
-        {
-            FAPI_ERR("attrTest7: ATTR_SCRATCH_UINT64_2. GET returned %d (enum) (3)",
-                     static_cast<uint32_t>(l_uint64));
-            l_result = 3;
-            break;
-        }
-
-        // Set to zero
-        l_uint64 = 0;
-        l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT64_2, NULL, l_uint64);
-        if (l_rc)
-        {
-            fapiLogError(l_rc);
-            FAPI_ERR("attrTest7: ATTR_SCRATCH_UINT64_2. Error from SET (enum2) (4)");
-            l_result = 4;
-            break;
-        }
-
-    } while (0);
-
-    if (!l_result)
-    {
-        FAPI_INF("attrTest7: unit test success");
-    }
-    return l_result;
-}
-
-}
diff --git a/src/usr/hwpf/test/fapiRcTest.C b/src/usr/hwpf/test/fapiRcTest.C
deleted file mode 100755
index f82de7c10..000000000
--- a/src/usr/hwpf/test/fapiRcTest.C
+++ /dev/null
@@ -1,1753 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/test/fapiRcTest.C $                              */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-// $Id: fapiRcTest.C,v 1.16 2015/03/18 19:41:51 pragupta Exp $
-/**
- *  @file fapiTargetTest.C
- *
- *  @brief Implements Target class unit test functions.
- */
-
-/*
- * Change Log ******************************************************************
- * Flag     Defect/Feature  User        Date        Description
- * ------   --------------  ----------  ----------- ----------------------------
- *                          mjjones     04/13/2011  Created.
- *                          mjjones     07/26/2011  Added more tests
- *                          mjjones     09/23/2011  Updated test for ErrorInfo
- *                          mjjones     01/13/2012  Use new ReturnCode interfaces
- *                          mjjones     08/14/2012  Use new ErrorInfo structures
- *                          mjjones     03/28/2013  Added proc-callout tests
- *                          mjjones     03/28/2013  Added children-cdg tests
- *                          sangeet2    29/01/2015  Added testcase rcTest18
- */
-
-#include <fapi.H>
-#include <fapiPlatHwpInvoker.H>
-#ifdef fips
-#include <srcisrc.H>
-#endif
-
-namespace fapi
-{
-
-//******************************************************************************
-// rcTest1. Ensures that the ReturnCode default constructor works
-//******************************************************************************
-uint32_t rcTest1()
-{
-    uint32_t l_result = 0;
-
-    // Create ReturnCode using default constructor
-    ReturnCode l_rc;
-
-    // Ensure that the embedded return code is success
-    if (l_rc != FAPI_RC_SUCCESS)
-    {
-        FAPI_ERR("rcTest1. Code is 0x%x, expected success",
-                 static_cast<uint32_t>(l_rc));
-        l_result = 1;
-    }
-    else
-    {
-        // Ensure that ok function works
-        if (l_rc.ok() == false)
-        {
-            FAPI_ERR("rcTest1. ok returned false");
-            l_result = 2;
-        }
-        else
-        {
-            // Ensure that testing l_rc works
-            if (l_rc)
-            {
-                FAPI_ERR("rcTest1. testing rc returned true");
-                l_result = 3;
-            }
-            else
-            {
-                FAPI_INF("rcTest1. Success!");
-            }
-        }
-    }
-
-    return l_result;
-}
-
-//******************************************************************************
-// rcTest2. Ensures that the ReturnCode creator reflects the return code
-//******************************************************************************
-uint32_t rcTest2()
-{
-    uint32_t l_result = 0;
-
-    // Create ReturnCode using default constructor
-    ReturnCode l_rc;
-
-    // Set the return code to a FAPI code
-    l_rc.setFapiError(FAPI_RC_INVALID_ATTR_GET);
-
-    // Ensure that the creator is FAPI
-    ReturnCode::returnCodeCreator l_creator = l_rc.getCreator();
-
-    if (l_creator != ReturnCode::CREATOR_FAPI)
-    {
-        FAPI_ERR("rcTest2. Creator is 0x%x, expected FAPI", l_creator);
-        l_result = 1;
-    }
-    else
-    {
-        // Set the return code to a PLAT code
-        l_rc.setPlatError(NULL);
-
-        // Ensure that the creator is PLAT
-        l_creator = l_rc.getCreator();
-
-        if (l_creator != ReturnCode::CREATOR_PLAT)
-        {
-            FAPI_ERR("rcTest2. Creator is 0x%x, expected PLAT", l_creator);
-            l_result = 2;
-        }
-        else
-        {
-            // Set the return code to a HWP code (intentionally use function
-            // that does not add error information).
-            l_rc._setHwpError(RC_TEST_ERROR_A);
-
-            // Ensure that the creator is HWP
-            l_creator = l_rc.getCreator();
-
-            if (l_creator != ReturnCode::CREATOR_HWP)
-            {
-                FAPI_ERR("rcTest2. Creator is 0x%x, expected HWP", l_creator);
-                l_result = 3;
-            }
-            else
-            {
-                FAPI_INF("rcTest2. Success!");
-            }
-        }
-    }
-
-    return l_result;
-}
-
-//******************************************************************************
-// rcTest3. Ensures that the ReturnCode constructor works when specifying a
-//          return code
-//******************************************************************************
-uint32_t rcTest3()
-{
-    uint32_t l_result = 0;
-
-    // Create ReturnCode specifying a return code
-    ReturnCode l_rc(FAPI_RC_INVALID_ATTR_GET);
-
-    // Ensure that the embedded return code is as expected
-    uint32_t l_codeCheck = l_rc;
-
-    if (l_codeCheck != FAPI_RC_INVALID_ATTR_GET)
-    {
-        FAPI_ERR("rcTest3. Code is 0x%x, expected FAPI_RC_INVALID_ATTR_GET",
-                 l_codeCheck);
-        l_result = 1;
-    }
-    else
-    {
-        // Ensure that ok function returns false
-        if (l_rc.ok())
-        {
-            FAPI_ERR("rcTest3. ok returned true");
-            l_result = 2;
-        }
-        else
-        {
-            // Ensure that testing l_rc works
-            if (!l_rc)
-            {
-                FAPI_ERR("rcTest3. testing rc returned false");
-                l_result = 3;
-            }
-            else
-            {
-                FAPI_INF("rcTest3. Success!");
-            }
-        }
-    }
-
-    return l_result;
-}
-
-//******************************************************************************
-// rcTest4. Ensures that the comparison operators work (comparing with another
-//          ReturnCode)
-//******************************************************************************
-uint32_t rcTest4()
-{
-    uint32_t l_result = 0;
-
-    // Create similar ReturnCodes
-    ReturnCode l_rc(FAPI_RC_INVALID_ATTR_GET);
-    ReturnCode l_rc2(FAPI_RC_INVALID_ATTR_GET);
-
-    // Ensure that the equality comparison returns true
-    if (!(l_rc == l_rc2))
-    {
-        FAPI_ERR("rcTest4. 1. Equality comparison false");
-        l_result = 1;
-    }
-    else
-    {
-        // Ensure that the inequality comparison returns false
-        if (l_rc != l_rc2)
-        {
-            FAPI_ERR("rcTest4. 2. Inequality comparison true");
-            l_result = 2;
-        }
-        else
-        {
-            // Change the code of l_rc2
-            l_rc2.setFapiError(FAPI_RC_PLAT_ERR_SEE_DATA);
-
-            // Ensure that the equality comparison returns false
-            if (l_rc == l_rc2)
-            {
-                FAPI_ERR("rcTest4. 3. Equality comparison true");
-                l_result = 3;
-            }
-            else
-            {
-                // Ensure that the inequality comparison returns true
-                if (!(l_rc != l_rc2))
-                {
-                    FAPI_ERR("rcTest4. 4. Inequality comparison false");
-                    l_result = 4;
-                }
-                else
-                {
-                    FAPI_INF("rcTest4. Success!");
-                }
-            }
-        }
-    }
-
-    return l_result;
-}
-
-//******************************************************************************
-// rcTest5. Ensures that the comparison operators work (comparing with a return
-//          code value)
-//******************************************************************************
-uint32_t rcTest5()
-{
-    uint32_t l_result = 0;
-
-    // Create a ReturnCode
-    ReturnCode l_rc(FAPI_RC_INVALID_ATTR_GET);
-
-    // Ensure that the equality comparison returns true when comparing to the
-    // same return code value
-    if (!(l_rc == FAPI_RC_INVALID_ATTR_GET))
-    {
-        FAPI_ERR("rcTest5. 1. Equality comparison false");
-        l_result = 1;
-    }
-    else
-    {
-        // Ensure that the inequality comparison returns false when comparing to
-        // the same return code value
-        if (l_rc != FAPI_RC_INVALID_ATTR_GET)
-        {
-            FAPI_ERR("rcTest5. 2. Inequality comparison true");
-            l_result = 2;
-        }
-        else
-        {
-            // Ensure that the equality comparison returns false when comparing
-            // to a different return code value
-            if (l_rc == FAPI_RC_PLAT_ERR_SEE_DATA)
-            {
-                FAPI_ERR("rcTest5. 3. Equality comparison true");
-                l_result = 3;
-            }
-            else
-            {
-                // Ensure that the inequality comparison returns true when
-                // comparing to a different return code value
-                if (!(l_rc != FAPI_RC_PLAT_ERR_SEE_DATA))
-                {
-                    FAPI_ERR("rcTest5. 4. Inequality comparison false");
-                    l_result = 4;
-                }
-                else
-                {
-                    FAPI_INF("rcTest5. Success!");
-                }
-            }
-        }
-    }
-
-    return l_result;
-}
-
-//******************************************************************************
-// rcTest6. Ensures that the getPlatData and releasePlatData functions work when
-//          there is no attached data
-//******************************************************************************
-uint32_t rcTest6()
-{
-    uint32_t l_result = 0;
-
-    // Create a ReturnCode
-    ReturnCode l_rc(FAPI_RC_INVALID_ATTR_GET);
-
-    // Ensure that the getPlatData function returns NULL
-    void * l_pData = reinterpret_cast<void *> (0x12345678);
-
-    l_pData = l_rc.getPlatData();
-
-    if (l_pData != NULL)
-    {
-        FAPI_ERR("rcTest6. getPlatData did not return NULL");
-        l_result = 1;
-    }
-    else
-    {
-        // Ensure that the releasePlatData function returns NULL
-        l_pData = reinterpret_cast<void *> (0x12345678);
-
-        l_pData = l_rc.releasePlatData();
-
-        if (l_pData != NULL)
-        {
-            FAPI_ERR("rcTest6. releasePlatData did not return NULL");
-            l_result = 2;
-        }
-        else
-        {
-            FAPI_INF("rcTest6. Success!");
-        }
-    }
-
-    return l_result;
-}
-
-//******************************************************************************
-// rcTest7. Ensures that the getPlatData function works when there is attached
-//          data
-//******************************************************************************
-uint32_t rcTest7()
-{
-    uint32_t l_result = 0;
-
-    // Create a ReturnCode
-    ReturnCode l_rc;
-
-    // Assign PlatData. Note that this should really be an errlHndl_t, because
-    // the FSP deleteData function will attempt to delete an error log, but this
-    // is just for test, the data will be released before the ReturnCode is
-    // destructed.
-    uint32_t l_myData = 6;
-    void * l_pMyData = reinterpret_cast<void *> (&l_myData);
-    (void) l_rc.setPlatError(l_pMyData);
-
-    // Ensure that getPlatData retrieves the PlatData
-    void * l_pMyDataCheck = l_rc.getPlatData();
-
-    if (l_pMyDataCheck != l_pMyData)
-    {
-        FAPI_ERR("rcTest7. 1. getPlatData returned unexpected data ptr");
-        l_result = 1;
-    }
-    else
-    {
-        // Ensure that getPlatData retrieves the PlatData again
-        l_pMyDataCheck = NULL;
-        l_pMyDataCheck = l_rc.getPlatData();
-
-        if (l_pMyDataCheck != l_pMyData)
-        {
-            FAPI_ERR("rcTest7. 2. getPlatData returned unexpected data ptr");
-            l_result = 2;
-        }
-        else
-        {
-            FAPI_INF("rcTest7. Success!");
-        }
-    }
-
-    // Release the data to avoid ReturnCode from deleting in on destruction
-    l_pMyDataCheck = l_rc.releasePlatData();
-
-    return l_result;
-}
-
-//******************************************************************************
-// rcTest8. Ensures that the releasePlatData function works when there is
-//          attached data
-//******************************************************************************
-uint32_t rcTest8()
-{
-    uint32_t l_result = 0;
-
-    // Create a ReturnCode
-    ReturnCode l_rc;
-
-    // Assign PlatData. Note that this should really be an errlHndl_t, because
-    // the FSP deleteData function will attempt to delete an error log, but this
-    // is just for test, the data will be released before the ReturnCode is
-    // destructed.
-    uint32_t l_myData = 6;
-    void * l_pMyData = reinterpret_cast<void *> (&l_myData);
-    (void) l_rc.setPlatError(l_pMyData);
-
-    // Ensure that releasePlatData retrieves the PlatData
-    void * l_pMyDataCheck = l_rc.releasePlatData();
-
-    if (l_pMyDataCheck != l_pMyData)
-    {
-        FAPI_ERR("rcTest8. getPlatData returned unexpected data ptr");
-        l_result = 1;
-    }
-    else
-    {
-        // Ensure that releasePlatData now returns NULL
-        l_pMyDataCheck = NULL;
-        l_pMyDataCheck = l_rc.releasePlatData();
-
-        if (l_pMyDataCheck != NULL)
-        {
-            FAPI_ERR("rcTest8. 2. getPlatData returned non NULL ptr");
-            l_result = 2;
-        }
-        else
-        {
-            FAPI_INF("rcTest8. Success!");
-        }
-    }
-
-    return l_result;
-}
-
-//******************************************************************************
-// rcTest9. Ensures that the copy constructor works when there is attached
-//          PlatData and that the getPlatData function works
-//******************************************************************************
-uint32_t rcTest9()
-{
-    uint32_t l_result = 0;
-
-    // Create a ReturnCode
-    ReturnCode l_rc;
-
-    // Assign PlatData. Note that this should really be an errlHndl_t, because
-    // the FSP deleteData function will attempt to delete an error log, but this
-    // is just for test, the data will be released before the ReturnCode is
-    // destructed.
-    uint32_t l_myData = 6;
-    void * l_pMyData = reinterpret_cast<void *> (&l_myData);
-    (void) l_rc.setPlatError(l_pMyData);
-
-    // Create a ReturnCode using the copy constructor
-    ReturnCode l_rc2(l_rc);
-
-    // Ensure that the two ReturnCodes are the same
-    if (l_rc != l_rc2)
-    {
-        FAPI_ERR("rcTest9. ReturnCodes differ");
-        l_result = 1;
-    }
-    else
-    {
-        // Ensure that getPlatData retrieves the PlatData from l_rc
-        void * l_pMyDataCheck = l_rc.getPlatData();
-
-        if (l_pMyDataCheck != l_pMyData)
-        {
-            FAPI_ERR("rcTest9. 1. getPlatData returned unexpected data ptr");
-            l_result = 2;
-        }
-        else
-        {
-            // Ensure that getPlatData retrieves the PlatData from l_rc2
-            l_pMyDataCheck = NULL;
-            l_pMyDataCheck = l_rc2.getPlatData();
-
-            if (l_pMyDataCheck != l_pMyData)
-            {
-                FAPI_ERR("rcTest9. 2. getPlatData returned unexpected data ptr");
-                l_result = 3;
-            }
-            else
-            {
-                FAPI_INF("rcTest9. Success!");
-            }
-        }
-    }
-
-    // Release the data to avoid ReturnCode from deleting in on destruction.
-    // This will release the data from both copies of the ReturnCode.
-    (void) l_rc.releasePlatData();
-
-    return l_result;
-}
-
-//******************************************************************************
-// rcTest10. Ensures that the assignment operator works when there is attached
-//           PlatData and that the releasePlatData function works
-//******************************************************************************
-uint32_t rcTest10()
-{
-    uint32_t l_result = 0;
-
-    // Create a ReturnCode
-    ReturnCode l_rc;
-
-    // Assign PlatData. Note that this should really be an errlHndl_t, because
-    // the PLAT deleteData function will attempt to delete an error log, but
-    // this is just for test, the data will be released before the ReturnCode is
-    // destructed.
-    uint32_t l_myData = 6;
-    void * l_pMyData = reinterpret_cast<void *> (&l_myData);
-    (void) l_rc.setPlatError(l_pMyData);
-
-    // Create a ReturnCode using the assignment operator
-    ReturnCode l_rc2;
-    l_rc2 = l_rc;
-
-    // Ensure that the two ReturnCodes are the same
-    if (l_rc != l_rc2)
-    {
-        FAPI_ERR("rcTest10. ReturnCodes differ");
-        l_result = 1;
-    }
-    else
-    {
-        // Ensure that releasePlatData retrieves the PlatData from l_rc
-        void * l_pMyDataCheck = l_rc.releasePlatData();
-
-        if (l_pMyDataCheck != l_pMyData)
-        {
-            FAPI_ERR("rcTest10. releasePlatData returned unexpected data ptr");
-            l_result = 2;
-        }
-        else
-        {
-            // Ensure that releasePlatData retrieves NULL from l_rc2
-            l_pMyDataCheck = NULL;
-            l_pMyDataCheck = l_rc2.releasePlatData();
-
-            if (l_pMyDataCheck != NULL)
-            {
-                FAPI_ERR("rcTest10. releasePlatData returned non NULL ptr");
-                l_result = 3;
-            }
-            else
-            {
-                FAPI_INF("rcTest10. Success!");
-            }
-        }
-    }
-
-    return l_result;
-}
-
-//******************************************************************************
-// rcTest11. Ensures that the getErrorInfo function works when there is no
-//           ErrorInfo
-//******************************************************************************
-uint32_t rcTest11()
-{
-    uint32_t l_result = 0;
-
-    // Create a ReturnCode
-    ReturnCode l_rc;
-
-    // Ensure that the getErrorInfo function returns NULL
-    const ErrorInfo * l_pErrInfo =
-        reinterpret_cast<const ErrorInfo *> (0x12345678);
-
-    l_pErrInfo = l_rc.getErrorInfo();
-
-    if (l_pErrInfo != NULL)
-    {
-        FAPI_ERR("rcTest11. getErrorInfo did not return NULL");
-        l_result = 1;
-    }
-    else
-    {
-        FAPI_INF("rcTest11. Success!");
-    }
-
-    return l_result;
-}
-
-//******************************************************************************
-// rcTest12. Ensures that the getErrorInfo function works when there is
-//           ErrorInfo
-//******************************************************************************
-uint32_t rcTest12()
-{
-    uint32_t l_result = 0;
-
-    // Create a ReturnCode
-    ReturnCode l_rc;
-    l_rc.setPlatError(NULL, FAPI_RC_PLAT_ERR_SEE_DATA);
-
-    // Create fake targets
-    uint32_t l_targetHandle = 3;
-    Target l_target(TARGET_TYPE_DIMM, &l_targetHandle);
-    uint32_t l_target2Handle = 4;
-    Target l_target2(TARGET_TYPE_PROC_CHIP, &l_target2Handle);
-    
-    // Create some FFDC
-    uint8_t l_ffdc = 0x12;
-
-    // Add error information to the ReturnCode, the data is the same as that
-    // produced by the fapiParseErrorInfo.pl script in fapiHwpErrorInfo.H
-    const void * l_objects[] = {&l_ffdc, &l_target, &l_target2};
-    fapi::ReturnCode::ErrorInfoEntry l_entries[7];
-    l_entries[0].iv_type = fapi::ReturnCode::EI_TYPE_FFDC;
-    l_entries[0].ffdc.iv_ffdcObjIndex = 0;
-    l_entries[0].ffdc.iv_ffdcId = 0x22334455;
-    l_entries[0].ffdc.iv_ffdcSize =
-        fapi::ReturnCodeFfdc::getErrorInfoFfdcSize(l_ffdc);
-    l_entries[1].iv_type = fapi::ReturnCode::EI_TYPE_PROCEDURE_CALLOUT;
-    l_entries[1].proc_callout.iv_procedure = fapi::ProcedureCallouts::CODE;
-    l_entries[1].proc_callout.iv_calloutPriority =
-        fapi::CalloutPriorities::MEDIUM;
-    l_entries[2].iv_type = fapi::ReturnCode::EI_TYPE_BUS_CALLOUT;
-    l_entries[2].bus_callout.iv_endpoint1ObjIndex = 1;
-    l_entries[2].bus_callout.iv_endpoint2ObjIndex = 2;
-    l_entries[2].bus_callout.iv_calloutPriority =
-        fapi::CalloutPriorities::MEDIUM;
-    l_entries[3].iv_type = fapi::ReturnCode::EI_TYPE_CDG;
-    l_entries[3].target_cdg.iv_targetObjIndex = 1;
-    l_entries[3].target_cdg.iv_callout = 1;
-    l_entries[3].target_cdg.iv_deconfigure = 1;
-    l_entries[3].target_cdg.iv_gard = 0;
-    l_entries[3].target_cdg.iv_calloutPriority = fapi::CalloutPriorities::HIGH;
-    l_entries[4].iv_type = fapi::ReturnCode::EI_TYPE_CHILDREN_CDG;
-    l_entries[4].children_cdg.iv_parentObjIndex = 1;
-    l_entries[4].children_cdg.iv_callout = 0;
-    l_entries[4].children_cdg.iv_deconfigure = 1;
-    l_entries[4].children_cdg.iv_childType = fapi::TARGET_TYPE_ABUS_ENDPOINT;
-    l_entries[4].children_cdg.iv_gard = 0;
-    l_entries[4].children_cdg.iv_calloutPriority =
-        fapi::CalloutPriorities::HIGH;
-    l_entries[5].iv_type = fapi::ReturnCode::EI_TYPE_HW_CALLOUT;
-    l_entries[5].hw_callout.iv_hw = fapi::HwCallouts::MEM_REF_CLOCK;
-    l_entries[5].hw_callout.iv_calloutPriority = fapi::CalloutPriorities::LOW;
-    l_entries[5].hw_callout.iv_refObjIndex = 0xff;
-    l_entries[5].hw_callout.iv_objPosIndex = 0;
-    l_entries[6].iv_type = fapi::ReturnCode::EI_TYPE_HW_CALLOUT;
-    l_entries[6].hw_callout.iv_hw = fapi::HwCallouts::FLASH_CONTROLLER_PART;
-    l_entries[6].hw_callout.iv_calloutPriority = fapi::CalloutPriorities::LOW;
-    l_entries[6].hw_callout.iv_refObjIndex = 0xff;
-    l_entries[6].hw_callout.iv_objPosIndex = 0;
-
-    l_rc.addErrorInfo(l_objects, l_entries, 7);
-
-    do
-    {
-        // Check that the Error Info can be retrieved
-        const ErrorInfo * l_pErrInfo = NULL;
-        l_pErrInfo = l_rc.getErrorInfo();
-
-        if (l_pErrInfo == NULL)
-        {
-            FAPI_ERR("rcTest12. getErrorInfo returned NULL");
-            l_result = 1;
-            break;
-        }
-
-        // Check the FFDC error information
-        if (l_pErrInfo->iv_ffdcs.size() != 1)
-        {
-            FAPI_ERR("rcTest12. %d FFDCs", l_pErrInfo->iv_ffdcs.size());
-            l_result = 2;
-            break;
-        }
-
-        uint32_t l_size = 0;
-        const void * l_pFfdc = NULL;
-
-        l_pFfdc = l_pErrInfo->iv_ffdcs[0]->getData(l_size);
-
-        if (l_size != sizeof(l_ffdc))
-        {
-            FAPI_ERR("rcTest12. FFDC size is %d", l_size);
-            l_result = 3;
-            break;
-        }
-
-        const uint8_t * l_pFfdcCheck = static_cast<const uint8_t *>(l_pFfdc);
-        if (*l_pFfdcCheck != 0x12)
-        {
-            FAPI_ERR("rcTest12. FFDC is 0x%x", *l_pFfdcCheck);
-            l_result = 4;
-            break;
-        }
-
-        // Check the callout/deconfigure/gard error information
-        if (l_pErrInfo->iv_CDGs.size() != 1)
-        {
-            FAPI_ERR("rcTest12. %d CDGs", l_pErrInfo->iv_CDGs.size());
-            l_result = 5;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[0]->iv_target != l_target)
-        {
-            FAPI_ERR("rcTest12. CDG target mismatch");
-            l_result = 6;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[0]->iv_callout != true)
-        {
-            FAPI_ERR("rcTest12. callout not set");
-            l_result = 7;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[0]->iv_calloutPriority !=
-            CalloutPriorities::HIGH)
-        {
-            FAPI_ERR("rcTest12. CDG callout priority mismatch (%d)",
-                     l_pErrInfo->iv_CDGs[0]->iv_calloutPriority);
-            l_result = 8;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[0]->iv_deconfigure != true)
-        {
-            FAPI_ERR("rcTest12. deconfigure not set");
-            l_result = 9;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[0]->iv_gard != false)
-        {
-            FAPI_ERR("rcTest12. GARD set");
-            l_result = 10;
-            break;
-        }
-
-        // Additional procedure called out due to Bus Callout
-        if (l_pErrInfo->iv_procedureCallouts.size() != 2)
-        {
-            FAPI_ERR("rcTest12. %d proc-callouts",
-                     l_pErrInfo->iv_procedureCallouts.size());
-            l_result = 11;
-            break;
-        }
-
-        if (l_pErrInfo->iv_procedureCallouts[0]->iv_procedure !=
-            ProcedureCallouts::CODE)
-        {
-            FAPI_ERR("rcTest12. procedure callout[0] mismatch (%d)",
-                     l_pErrInfo->iv_procedureCallouts[0]->iv_procedure);
-            l_result = 12;
-            break;
-        }
-
-        if (l_pErrInfo->iv_procedureCallouts[0]->iv_calloutPriority !=
-            CalloutPriorities::MEDIUM)
-        {
-            FAPI_ERR("rcTest12. procedure callout[0] priority mismatch (%d)",
-                     l_pErrInfo->iv_procedureCallouts[0]->iv_calloutPriority);
-            l_result = 13;
-            break;
-        }
-
-        if (l_pErrInfo->iv_procedureCallouts[1]->iv_procedure !=
-            ProcedureCallouts::BUS_CALLOUT)
-        {
-            FAPI_ERR("rcTest12. procedure callout[1] mismatch (%d)",
-                     l_pErrInfo->iv_procedureCallouts[1]->iv_procedure);
-            l_result = 14;
-            break;
-        }
-
-        if (l_pErrInfo->iv_procedureCallouts[1]->iv_calloutPriority !=
-            CalloutPriorities::MEDIUM)
-        {
-            FAPI_ERR("rcTest12. procedure callout[1] priority mismatch (%d)",
-                     l_pErrInfo->iv_procedureCallouts[1]->iv_calloutPriority);
-            l_result = 15;
-            break;
-        }
-
-        if (l_pErrInfo->iv_busCallouts.size() != 1)
-        {
-            FAPI_ERR("rcTest12. %d bus-callouts",
-                     l_pErrInfo->iv_busCallouts.size());
-            l_result = 16;
-            break;
-        }
-
-        if (l_pErrInfo->iv_busCallouts[0]->iv_target1 != l_target)
-        {
-            FAPI_ERR("rcTest12. bus target mismatch 1");
-            l_result = 17;
-            break;
-        }
-
-        if (l_pErrInfo->iv_busCallouts[0]->iv_target2 != l_target2)
-        {
-            FAPI_ERR("rcTest12. bus target mismatch 2");
-            l_result = 18;
-            break;
-        }
-
-        if (l_pErrInfo->iv_busCallouts[0]->iv_calloutPriority !=
-            CalloutPriorities::LOW)
-        {
-            FAPI_ERR("rcTest12. bus callout priority mismatch (%d)",
-                     l_pErrInfo->iv_busCallouts[0]->iv_calloutPriority);
-            l_result = 19;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs.size() != 1)
-        {
-            FAPI_ERR("rcTest12. %d children-cdgs",
-                     l_pErrInfo->iv_childrenCDGs.size());
-            l_result = 20;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[0]->iv_parent != l_target)
-        {
-            FAPI_ERR("rcTest12. parent chip mismatch");
-            l_result = 21;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[0]->iv_childType !=
-            fapi::TARGET_TYPE_ABUS_ENDPOINT)
-        {
-            FAPI_ERR("rcTest12. child type mismatch (0x%08x)",
-                     l_pErrInfo->iv_childrenCDGs[0]->iv_childType);
-            l_result = 22;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[0]->iv_calloutPriority !=
-            CalloutPriorities::HIGH)
-        {
-            FAPI_ERR("rcTest12. child cdg priority mismatch (%d)",
-                     l_pErrInfo->iv_childrenCDGs[0]->iv_calloutPriority);
-            l_result = 23;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[0]->iv_callout != false)
-        {
-            FAPI_ERR("rcTest12. child cdg callout set");
-            l_result = 24;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[0]->iv_deconfigure != true)
-        {
-            FAPI_ERR("rcTest12. child cdg deconfigure not set");
-            l_result = 25;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[0]->iv_gard != false)
-        {
-            FAPI_ERR("rcTest12. child cdg GARD set");
-            l_result = 26;
-            break;
-        }
-
-        if (l_pErrInfo->iv_hwCallouts.size() != 2)
-        {
-            FAPI_ERR("rcTest12. %d hw-callouts",
-                     l_pErrInfo->iv_hwCallouts.size());
-            l_result = 27;
-            break;
-        }
-
-        if (l_pErrInfo->iv_hwCallouts[0]->iv_hw !=
-            HwCallouts::MEM_REF_CLOCK)
-        {
-            FAPI_ERR("rcTest12. hw callout mismatch (%d)",
-                     l_pErrInfo->iv_hwCallouts[0]->iv_hw);
-            l_result = 28;
-            break;
-        }
-
-        if (l_pErrInfo->iv_hwCallouts[0]->iv_calloutPriority !=
-            CalloutPriorities::LOW)
-        {
-            FAPI_ERR("rcTest12. hw callout priority mismatch (%d)",
-                     l_pErrInfo->iv_hwCallouts[0]->iv_calloutPriority);
-            l_result = 29;
-            break;
-        }
-
-        FAPI_INF("rcTest12. Success!");
-    }
-    while(0);
-
-    return l_result;
-}
-
-//******************************************************************************
-// rcTest13. Ensures that the copy constructor works when there is ErrorInfo
-//******************************************************************************
-uint32_t rcTest13()
-{
-    uint32_t l_result = 0;
-
-    // Create a ReturnCode
-    ReturnCode l_rc;
-    l_rc.setPlatError(NULL, FAPI_RC_PLAT_ERR_SEE_DATA);
-
-    // Create a DIMM target
-    uint32_t l_targetHandle = 3;
-    Target l_target(TARGET_TYPE_DIMM, &l_targetHandle);
-
-    // Add error information to the ReturnCode
-    const void * l_objects[] = {&l_target};
-    fapi::ReturnCode::ErrorInfoEntry l_entries[1];
-    l_entries[0].iv_type = fapi::ReturnCode::EI_TYPE_CDG;
-    l_entries[0].target_cdg.iv_targetObjIndex = 0;
-    l_entries[0].target_cdg.iv_callout = 0;
-    l_entries[0].target_cdg.iv_deconfigure = 0;
-    l_entries[0].target_cdg.iv_gard = 1;
-    l_entries[0].target_cdg.iv_calloutPriority = fapi::CalloutPriorities::LOW;
-
-    l_rc.addErrorInfo(l_objects, l_entries, 1);
-
-    // Create a ReturnCode using the copy constructor
-    ReturnCode l_rc2(l_rc);
-
-    do
-    {
-        // Ensure that the two ReturnCodes are the same
-        if (l_rc != l_rc2)
-        {
-            FAPI_ERR("rcTest13. ReturnCodes differ");
-            l_result = 1;
-            break;
-        }
-
-        // Ensure that getErrorInfo returns correct information from l_rc
-        const ErrorInfo * l_pErrInfo = NULL;
-
-        l_pErrInfo = l_rc.getErrorInfo();
-
-        if (l_pErrInfo == NULL)
-        {
-            FAPI_ERR("rcTest13. getErrorInfo returned NULL");
-            l_result = 2;
-            break;
-        }
-       
-        if (l_pErrInfo->iv_CDGs.size() != 1)
-        {
-            FAPI_ERR("rcTest13. %d CDGs", l_pErrInfo->iv_CDGs.size());
-            l_result = 3;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[0]->iv_target != l_target)
-        {
-            FAPI_ERR("rcTest13. CDG target mismatch");
-            l_result = 4;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[0]->iv_gard != true)
-        {
-            FAPI_ERR("rcTest13. GARD not set");
-            l_result = 5;
-            break;
-        }
-
-        // Ensure that getErrorInfo from l_rc2 returns the same pointer
-        const ErrorInfo * l_pErrInfo2 = l_rc2.getErrorInfo();
-
-        if (l_pErrInfo != l_pErrInfo2)
-        {
-            FAPI_ERR("rcTest13. error info mismatch");
-            l_result = 5;
-            break;
-        }
-
-        FAPI_INF("rcTest13. Success!");
-    }
-    while(0);
-
-    return l_result;
-}
-
-//******************************************************************************
-// rcTest14. Ensures that the assignment operator works when there ErrorInfo
-//******************************************************************************
-uint32_t rcTest14()
-{
-    uint32_t l_result = 0;
-
-    // Create a ReturnCode
-    ReturnCode l_rc;
-    l_rc.setPlatError(NULL, FAPI_RC_PLAT_ERR_SEE_DATA);
-
-    // Create a DIMM target
-    uint32_t l_targetHandle = 3;
-    Target l_target(TARGET_TYPE_DIMM, &l_targetHandle);
-
-    // Add error information to the ReturnCode
-    const void * l_objects[] = {&l_target};
-    fapi::ReturnCode::ErrorInfoEntry l_entries[1];
-    l_entries[0].iv_type = fapi::ReturnCode::EI_TYPE_CDG;
-    l_entries[0].target_cdg.iv_targetObjIndex = 0;
-    l_entries[0].target_cdg.iv_callout = 0;
-    l_entries[0].target_cdg.iv_deconfigure = 0;
-    l_entries[0].target_cdg.iv_gard = 1;
-    l_entries[0].target_cdg.iv_calloutPriority = fapi::CalloutPriorities::LOW;
-
-    l_rc.addErrorInfo(l_objects, l_entries, 1);
-
-    // Create a ReturnCode using the assignment operator
-    ReturnCode l_rc2;
-    l_rc2 = l_rc;
-
-    do
-    {
-        // Ensure that the two ReturnCodes are the same
-        if (l_rc != l_rc2)
-        {
-            FAPI_ERR("rcTest14. ReturnCodes differ");
-            l_result = 1;
-            break;
-        }
-
-        // Ensure that getErrorInfo returns correct information from l_rc
-        const ErrorInfo * l_pErrInfo = NULL;
-
-        l_pErrInfo = l_rc.getErrorInfo();
-
-        if (l_pErrInfo == NULL)
-        {
-            FAPI_ERR("rcTest14. getErrorInfo returned NULL");
-            l_result = 2;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs.size() != 1)
-        {
-            FAPI_ERR("rcTest14. %d CDGs", l_pErrInfo->iv_CDGs.size());
-            l_result = 3;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[0]->iv_target != l_target)
-        {
-            FAPI_ERR("rcTest14. CDG target mismatch");
-            l_result = 4;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[0]->iv_gard != true)
-        {
-            FAPI_ERR("rcTest14. GARD not set");
-            l_result = 5;
-            break;
-        }
-
-        // Ensure that getErrorInfo from l_rc2 returns the same pointer
-        const ErrorInfo * l_pErrInfo2 = l_rc2.getErrorInfo();
-
-        if (l_pErrInfo != l_pErrInfo2)
-        {
-            FAPI_ERR("rcTest14. error info mismatch");
-            l_result = 5;
-            break;
-        }
-
-        FAPI_INF("rcTest14. Success!");
-    }
-    while(0);
-
-    return l_result;
-}
-
-//******************************************************************************
-// rcTest15. Ensures that setting the ReturnCode to success clears ErrorInfo
-//******************************************************************************
-uint32_t rcTest15()
-{
-    uint32_t l_result = 0;
-
-    // Create a ReturnCode
-    ReturnCode l_rc;
-    l_rc.setPlatError(NULL, FAPI_RC_PLAT_ERR_SEE_DATA);
-
-    // Create a DIMM target
-    uint32_t l_targetHandle = 3;
-    Target l_target(TARGET_TYPE_DIMM, &l_targetHandle);
-
-    // Add error information to the ReturnCode
-    const void * l_objects[] = {&l_target};
-    fapi::ReturnCode::ErrorInfoEntry l_entries[1];
-    l_entries[0].iv_type = fapi::ReturnCode::EI_TYPE_CDG;
-    l_entries[0].target_cdg.iv_targetObjIndex = 0;
-    l_entries[0].target_cdg.iv_callout = 0;
-    l_entries[0].target_cdg.iv_deconfigure = 0;
-    l_entries[0].target_cdg.iv_gard = 1;
-    l_entries[0].target_cdg.iv_calloutPriority = fapi::CalloutPriorities::LOW;
-
-    l_rc.addErrorInfo(l_objects, l_entries, 1);
-
-    // Set the ReturnCode to success
-    l_rc = FAPI_RC_SUCCESS;
-
-    // Check that there is no ErrorInfo
-    const ErrorInfo * l_pErrInfo = NULL;
-
-    l_pErrInfo = l_rc.getErrorInfo();
-
-    if (l_pErrInfo != NULL)
-    {
-        FAPI_ERR("rcTest15. getErrorInfo returned NULL");
-        l_result = 1;
-    }
-    else
-    {
-        FAPI_INF("rcTest15. Success!");
-    }
-
-    return l_result;
-}
-
-//******************************************************************************
-// rcTest16. Ensures that multiple Error Info of each type can be added
-//******************************************************************************
-uint32_t rcTest16()
-{
-    uint32_t l_result = 0;
-
-    // Create a ReturnCode
-    ReturnCode l_rc;
-    l_rc.setPlatError(NULL, FAPI_RC_PLAT_ERR_SEE_DATA);
-
-    // Create 2 targets
-    uint32_t l_targetHandle = 3;
-    Target l_target(TARGET_TYPE_DIMM, &l_targetHandle);
-
-    uint32_t l_targetHandle2 = 4;
-    Target l_target2(TARGET_TYPE_MCS_CHIPLET, &l_targetHandle2);
-
-    // Create 2 FFDCs
-    uint8_t l_ffdc = 0x12;
-    uint32_t l_ffdc2 = 0x12345678;
-
-    // Add error information to the ReturnCode
-    const void * l_objects[] = {&l_ffdc, &l_ffdc2, &l_target, &l_target2};
-    fapi::ReturnCode::ErrorInfoEntry l_entries[10];
-    l_entries[0].iv_type = fapi::ReturnCode::EI_TYPE_FFDC;
-    l_entries[0].ffdc.iv_ffdcObjIndex = 0;
-    l_entries[0].ffdc.iv_ffdcId = 0x22334455;
-    l_entries[0].ffdc.iv_ffdcSize =
-        fapi::ReturnCodeFfdc::getErrorInfoFfdcSize(l_ffdc);
-    l_entries[1].iv_type = fapi::ReturnCode::EI_TYPE_FFDC;
-    l_entries[1].ffdc.iv_ffdcObjIndex = 1;
-    l_entries[1].ffdc.iv_ffdcId = 0x33445566;
-    l_entries[1].ffdc.iv_ffdcSize =
-        fapi::ReturnCodeFfdc::getErrorInfoFfdcSize(l_ffdc2);
-    l_entries[2].iv_type = fapi::ReturnCode::EI_TYPE_CDG;
-    l_entries[2].target_cdg.iv_targetObjIndex = 2;
-    l_entries[2].target_cdg.iv_callout = 0;
-    l_entries[2].target_cdg.iv_deconfigure = 1;
-    l_entries[2].target_cdg.iv_gard = 0;
-    l_entries[2].target_cdg.iv_calloutPriority = fapi::CalloutPriorities::HIGH;
-    l_entries[3].iv_type = fapi::ReturnCode::EI_TYPE_CDG;
-    l_entries[3].target_cdg.iv_targetObjIndex = 3;
-    l_entries[3].target_cdg.iv_callout = 0;
-    l_entries[3].target_cdg.iv_deconfigure = 0;
-    l_entries[3].target_cdg.iv_gard = 1;
-    l_entries[3].target_cdg.iv_calloutPriority = fapi::CalloutPriorities::MEDIUM;
-    l_entries[4].iv_type = fapi::ReturnCode::EI_TYPE_PROCEDURE_CALLOUT;
-    l_entries[4].proc_callout.iv_procedure = fapi::ProcedureCallouts::CODE; 
-    l_entries[4].proc_callout.iv_calloutPriority = fapi::CalloutPriorities::MEDIUM;
-    l_entries[5].iv_type = fapi::ReturnCode::EI_TYPE_PROCEDURE_CALLOUT;
-    l_entries[5].proc_callout.iv_procedure = fapi::ProcedureCallouts::LVL_SUPPORT;
-    l_entries[5].proc_callout.iv_calloutPriority = fapi::CalloutPriorities::LOW;
-    l_entries[6].iv_type = fapi::ReturnCode::EI_TYPE_BUS_CALLOUT;
-    l_entries[6].bus_callout.iv_endpoint1ObjIndex = 2;
-    l_entries[6].bus_callout.iv_endpoint2ObjIndex = 3;
-    l_entries[6].bus_callout.iv_calloutPriority = fapi::CalloutPriorities::LOW;
-    l_entries[7].iv_type = fapi::ReturnCode::EI_TYPE_BUS_CALLOUT;
-    l_entries[7].bus_callout.iv_endpoint1ObjIndex = 2;
-    l_entries[7].bus_callout.iv_endpoint2ObjIndex = 3;
-    l_entries[7].bus_callout.iv_calloutPriority = fapi::CalloutPriorities::HIGH;
-    l_entries[8].iv_type = fapi::ReturnCode::EI_TYPE_CHILDREN_CDG;
-    l_entries[8].children_cdg.iv_parentObjIndex = 2;
-    l_entries[8].children_cdg.iv_callout = 1;
-    l_entries[8].children_cdg.iv_deconfigure = 1;
-    l_entries[8].children_cdg.iv_childType = fapi::TARGET_TYPE_ABUS_ENDPOINT;
-    l_entries[8].children_cdg.iv_gard = 0;
-    l_entries[8].children_cdg.iv_calloutPriority =
-        fapi::CalloutPriorities::HIGH;
-    l_entries[9].iv_type = fapi::ReturnCode::EI_TYPE_CHILDREN_CDG;
-    l_entries[9].children_cdg.iv_parentObjIndex = 3;
-    l_entries[9].children_cdg.iv_callout = 1;
-    l_entries[9].children_cdg.iv_deconfigure = 0;
-    l_entries[9].children_cdg.iv_childType = fapi::TARGET_TYPE_MBA_CHIPLET;
-    l_entries[9].children_cdg.iv_gard = 1;
-    l_entries[9].children_cdg.iv_calloutPriority =
-        fapi::CalloutPriorities::MEDIUM;
-
-    l_rc.addErrorInfo(l_objects, l_entries, 10);
-
-    do
-    {
-        // Check that the Error Info can be retrieved
-        const ErrorInfo * l_pErrInfo = NULL;
-        l_pErrInfo = l_rc.getErrorInfo();
-
-        if (l_pErrInfo == NULL)
-        {
-            FAPI_ERR("rcTest16. getErrorInfo returned NULL");
-            l_result = 1;
-            break;
-        }
-
-        // Check the FFDC error information
-        if (l_pErrInfo->iv_ffdcs.size() != 2)
-        {
-            FAPI_ERR("rcTest16. %d FFDCs", l_pErrInfo->iv_ffdcs.size());
-            l_result = 2;
-            break;
-        }
-
-        uint32_t l_size = 0;
-        const void * l_pFfdc = NULL;
-
-        l_pFfdc = l_pErrInfo->iv_ffdcs[0]->getData(l_size);
-
-        if (l_size != sizeof(l_ffdc))
-        {
-            FAPI_ERR("rcTest16. FFDC[0] size is %d", l_size);
-            l_result = 3;
-            break;
-        }
-
-        const uint8_t * l_pFfdcCheck = static_cast<const uint8_t *>(l_pFfdc);
-        if (*l_pFfdcCheck != 0x12)
-        {
-            FAPI_ERR("rcTest16. FFDC[0] is 0x%x", *l_pFfdcCheck);
-            l_result = 4;
-            break;
-        }
-
-        l_pFfdc = l_pErrInfo->iv_ffdcs[1]->getData(l_size);
-
-        if (l_size != sizeof(l_ffdc2))
-        {
-            FAPI_ERR("rcTest16. FFDC[1] size is %d", l_size);
-            l_result = 5;
-            break;
-        }
-
-        const uint32_t * l_pFfdc2Check = static_cast<const uint32_t *>(l_pFfdc);
-        if (*l_pFfdc2Check != 0x12345678)
-        {
-            FAPI_ERR("rcTest16. FFDC[1] is 0x%x", *l_pFfdc2Check);
-            l_result = 6;
-            break;
-        }
-
-        // Check the callout/deconfigure/GARD error information
-        if (l_pErrInfo->iv_CDGs.size() != 2)
-        {
-            FAPI_ERR("rcTest16. %d CDGs", l_pErrInfo->iv_CDGs.size());
-            l_result = 7;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[0]->iv_target != l_target)
-        {
-            FAPI_ERR("rcTest16. CDG[0] target mismatch");
-            l_result = 8;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[0]->iv_callout != false)
-        {
-            FAPI_ERR("rcTest16. CDG[0] callout set");
-            l_result = 9;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[0]->iv_calloutPriority !=
-                CalloutPriorities::HIGH)
-        {
-            FAPI_ERR("rcTest16. CDG[0] callout priority mismatch");
-            l_result = 10;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[0]->iv_deconfigure != true)
-        {
-            FAPI_ERR("rcTest16. CDG[0] deconfigure not set");
-            l_result = 11;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[0]->iv_gard != false)
-        {
-            FAPI_ERR("rcTest16. CDG[0] gard set");
-            l_result = 12;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[1]->iv_target != l_target2)
-        {
-            FAPI_ERR("rcTest16. CDG[1] target mismatch");
-            l_result = 13;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[1]->iv_callout != false)
-        {
-            FAPI_ERR("rcTest16. CDG[0] callout set");
-            l_result = 14;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[1]->iv_calloutPriority !=
-            CalloutPriorities::MEDIUM)
-        {
-            FAPI_ERR("rcTest16. CDG[1] callout priority mismatch");
-            l_result = 15;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[1]->iv_deconfigure != false)
-        {
-            FAPI_ERR("rcTest16. CDG[1] deconfigure set");
-            l_result = 16;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[1]->iv_gard != true)
-        {
-            FAPI_ERR("rcTest16. CDG[1] gard not set");
-            l_result = 17;
-            break;
-        }
-
-        // Additional procedures called out due to Bus Callout
-        if (l_pErrInfo->iv_procedureCallouts.size() != 4)
-        {
-            FAPI_ERR("rcTest16. %d proc-callouts",
-                     l_pErrInfo->iv_procedureCallouts.size());
-            l_result = 18;
-            break;
-        }
-
-        if (l_pErrInfo->iv_procedureCallouts[0]->iv_procedure !=
-            ProcedureCallouts::CODE)
-        {
-            FAPI_ERR("rcTest16. procedure[0] callout mismatch (%d)",
-                     l_pErrInfo->iv_procedureCallouts[0]->iv_procedure);
-            l_result = 19;
-            break;
-        }
-
-        if (l_pErrInfo->iv_procedureCallouts[0]->iv_calloutPriority !=
-            CalloutPriorities::MEDIUM)
-        {
-            FAPI_ERR("rcTest16. procedure[0] callout priority mismatch (%d)",
-                     l_pErrInfo->iv_procedureCallouts[0]->iv_calloutPriority);
-            l_result = 20;
-            break;
-        }
-
-        if (l_pErrInfo->iv_procedureCallouts[1]->iv_procedure !=
-            ProcedureCallouts::LVL_SUPPORT)
-        {
-            FAPI_ERR("rcTest16. procedure[1] callout mismatch (%d)",
-                     l_pErrInfo->iv_procedureCallouts[1]->iv_procedure);
-            l_result = 21;
-            break;
-        }
-
-        if (l_pErrInfo->iv_procedureCallouts[1]->iv_calloutPriority !=
-            CalloutPriorities::LOW)
-        {
-            FAPI_ERR("rcTest16. procedure[1] callout priority mismatch (%d)",
-                     l_pErrInfo->iv_procedureCallouts[1]->iv_calloutPriority);
-            l_result = 22;
-            break;
-        }
-
-        if (l_pErrInfo->iv_procedureCallouts[2]->iv_procedure !=
-            ProcedureCallouts::BUS_CALLOUT)
-        {
-            FAPI_ERR("rcTest16. procedure[2] callout mismatch (%d)",
-                     l_pErrInfo->iv_procedureCallouts[2]->iv_procedure);
-            l_result = 23;
-            break;
-        }
-
-        if (l_pErrInfo->iv_procedureCallouts[2]->iv_calloutPriority !=
-            CalloutPriorities::LOW)
-        {
-            FAPI_ERR("rcTest16. procedure[2] callout priority mismatch (%d)",
-                     l_pErrInfo->iv_procedureCallouts[2]->iv_calloutPriority);
-            l_result = 24;
-            break;
-        }
-
-        if (l_pErrInfo->iv_procedureCallouts[3]->iv_procedure !=
-            ProcedureCallouts::BUS_CALLOUT)
-        {
-            FAPI_ERR("rcTest16. procedure[3] callout mismatch (%d)",
-                     l_pErrInfo->iv_procedureCallouts[3]->iv_procedure);
-            l_result = 25;
-            break;
-        }
-
-        if (l_pErrInfo->iv_procedureCallouts[3]->iv_calloutPriority !=
-            CalloutPriorities::HIGH)
-        {
-            FAPI_ERR("rcTest16. procedure[3] callout priority mismatch (%d)",
-                     l_pErrInfo->iv_procedureCallouts[3]->iv_calloutPriority);
-            l_result = 26;
-            break;
-        }
-
-        if (l_pErrInfo->iv_busCallouts.size() != 2)
-        {
-            FAPI_ERR("rcTest16. %d bus-callouts",
-                     l_pErrInfo->iv_busCallouts.size());
-            l_result = 27;
-            break;
-        }
-
-        if (l_pErrInfo->iv_busCallouts[0]->iv_target1 != l_target)
-        {
-            FAPI_ERR("rcTest16. bus target mismatch 1");
-            l_result = 28;
-            break;
-        }
-
-        if (l_pErrInfo->iv_busCallouts[0]->iv_target2 != l_target2)
-        {
-            FAPI_ERR("rcTest16. bus target mismatch 2");
-            l_result = 29;
-            break;
-        }
-
-        if (l_pErrInfo->iv_busCallouts[0]->iv_calloutPriority !=
-            CalloutPriorities::LOW)
-        {
-            FAPI_ERR("rcTest16. bus callout priority mismatch 1 (%d)",
-                     l_pErrInfo->iv_busCallouts[0]->iv_calloutPriority);
-            l_result = 30;
-            break;
-        }
-
-        if (l_pErrInfo->iv_busCallouts[1]->iv_target1 != l_target)
-        {
-            FAPI_ERR("rcTest16. bus target mismatch 3");
-            l_result = 31;
-            break;
-        }
-
-        if (l_pErrInfo->iv_busCallouts[1]->iv_target2 != l_target2)
-        {
-            FAPI_ERR("rcTest16. bus target mismatch 4");
-            l_result = 32;
-            break;
-        }
-
-        if (l_pErrInfo->iv_busCallouts[1]->iv_calloutPriority !=
-            CalloutPriorities::MEDIUM)
-        {
-            FAPI_ERR("rcTest16. bus callout priority mismatch 2 (%d)",
-                     l_pErrInfo->iv_busCallouts[1]->iv_calloutPriority);
-            l_result = 33;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs.size() != 2)
-        {
-            FAPI_ERR("rcTest16. %d children-cdgs",
-                     l_pErrInfo->iv_childrenCDGs.size());
-            l_result = 34;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[0]->iv_parent != l_target)
-        {
-            FAPI_ERR("rcTest16. parent chip mismatch 1");
-            l_result = 35;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[0]->iv_childType !=
-            fapi::TARGET_TYPE_ABUS_ENDPOINT)
-        {
-            FAPI_ERR("rcTest16. child type mismatch 1 (0x%08x)",
-                     l_pErrInfo->iv_childrenCDGs[0]->iv_childType);
-            l_result = 36;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[0]->iv_calloutPriority !=
-            CalloutPriorities::HIGH)
-        {
-            FAPI_ERR("rcTest16. child cdg priority mismatch 1 (%d)",
-                     l_pErrInfo->iv_childrenCDGs[0]->iv_calloutPriority);
-            l_result = 37;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[0]->iv_callout != true)
-        {
-            FAPI_ERR("rcTest16. child cdg callout not set 1");
-            l_result = 38;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[0]->iv_deconfigure != true)
-        {
-            FAPI_ERR("rcTest16. child cdg deconfigure not set 1");
-            l_result = 39;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[0]->iv_gard != false)
-        {
-            FAPI_ERR("rcTest16. child cdg GARD set 1");
-            l_result = 40;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[1]->iv_childType !=
-            fapi::TARGET_TYPE_MBA_CHIPLET)
-        {
-            FAPI_ERR("rcTest16. child type mismatch 2 (0x%08x)",
-                     l_pErrInfo->iv_childrenCDGs[1]->iv_childType);
-            l_result = 41;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[1]->iv_calloutPriority !=
-            CalloutPriorities::MEDIUM)
-        {
-            FAPI_ERR("rcTest16. child cdg priority mismatch 2 (%d)",
-                     l_pErrInfo->iv_childrenCDGs[1]->iv_calloutPriority);
-            l_result = 42;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[1]->iv_callout != true)
-        {
-            FAPI_ERR("rcTest16. child cdg callout not set 2");
-            l_result = 43;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[1]->iv_deconfigure != false)
-        {
-            FAPI_ERR("rcTest16. child cdg deconfigure set 2");
-            l_result = 44;
-            break;
-        }
-
-        if (l_pErrInfo->iv_childrenCDGs[1]->iv_gard != true)
-        {
-            FAPI_ERR("rcTest16. child cdg GARD not set 2");
-            l_result = 45;
-            break;
-        }
-
-        FAPI_INF("rcTest16. Success!");
-    }
-    while(0);
-
-    return l_result;
-}
-
-//******************************************************************************
-// rcTest17. Ensures that static_cast can be applied to a ReturnCode
-//******************************************************************************
-uint32_t rcTest17()
-{
-    uint32_t l_result = 0;
-
-    // Create a ReturnCode
-    ReturnCode l_rc(FAPI_RC_INVALID_ATTR_GET);
-
-    uint32_t l_check = static_cast<uint32_t>(l_rc);
-
-    if (l_check != FAPI_RC_INVALID_ATTR_GET)
-    {
-        FAPI_ERR("rcTest17. RC is not FAPI_RC_INVALID_ATTR_GET, it is 0x%x",
-        l_check);
-        l_result = 1;
-    }
-    else
-    {
-        FAPI_INF("rcTest17. Success!");
-    }
-
-    return l_result;
-}
-
-#ifdef fips
-uint32_t rcTest18()
-{
-    uint32_t l_result = 0;
-
-    // Create a FAPI  ReturnCode
-    ReturnCode l_rc(FAPI_RC_INVALID_ATTR_GET);
-
-    // Create Target of functional processor chip
-    TARGETING::Target *l_proc = NULL;
-
-    //  Use PredicateIsFunctional (formerly HwasPredicate) to filter
-    //  only functional chips
-    TARGETING::PredicateIsFunctional l_isFunctional;
-    do
-    {
-
-        //  filter for functional Proc Chips
-        TARGETING::PredicateCTM l_procChipFilter(TARGETING::CLASS_CHIP,
-                TARGETING::TYPE_PROC );
-
-        // declare a postfix expression
-        TARGETING::PredicatePostfixExpr l_functionalAndProcChipFilter;
-
-        // is-a-proc-chip is-functional AND
-        l_functionalAndProcChipFilter.push(&l_procChipFilter).
-            push(&l_isFunctional).And();
-
-        // loop through all the targets, applying the filter,
-        // and put the results in l_pFuncProc
-        TARGETING::TargetRangeFilter  l_pFuncProcFilter(
-                TARGETING::targetService().begin(),
-                TARGETING::targetService().end(),
-                &l_functionalAndProcChipFilter);
-
-        // Get a pointer to that first function proc
-        if(!l_pFuncProcFilter)
-        {
-            l_result = 1;
-            FAPI_ERR("rcTest18:No functional processors found");
-            break;
-        }
-
-        l_proc = *l_pFuncProcFilter;
-        TARGETING::Target* l_pConstTarget =
-            const_cast<TARGETING::Target*>(l_proc);
-
-        fapi::Target l_fapiTarget(fapi::TARGET_TYPE_PROC_CHIP,
-                     reinterpret_cast<void*>(l_pConstTarget));
-
-        const void * l_objects[] = { &l_fapiTarget};
-        fapi::ReturnCode::ErrorInfoEntry l_entries[1];
-        l_entries[0].iv_type = fapi::ReturnCode::EI_TYPE_CDG;
-        l_entries[0].target_cdg.iv_targetObjIndex = 0;
-        l_entries[0].target_cdg.iv_callout = 0;
-        l_entries[0].target_cdg.iv_deconfigure = 0;
-        l_entries[0].target_cdg.iv_gard = 1;
-        l_entries[0].target_cdg.iv_calloutPriority =
-            fapi::CalloutPriorities::LOW;
-
-
-        // Add the error info
-        l_rc.addErrorInfo(l_objects, l_entries, 1);
-
-        // Check that the Error Info can be retrieved
-        const ErrorInfo * l_pErrInfo = NULL;
-        l_pErrInfo = l_rc.getErrorInfo();
-
-        if (l_pErrInfo == NULL)
-        {
-            FAPI_ERR("rcTest18:getErrorInfo returned NULL");
-            l_result = 2;
-            break;
-        }
-
-        // Check the callout/deconfigure/GARD error information
-        if (l_pErrInfo->iv_CDGs[0]->iv_target != l_fapiTarget)
-        {
-            FAPI_ERR("rcTest18:CDG[0] target mismatch");
-            l_result = 3;
-            break;
-        }
-
-        if (l_pErrInfo->iv_CDGs[0]->iv_gard == false)
-        {
-            FAPI_ERR("rcTest18:CDG[0] gard not set");
-            l_result = 4;
-            break;
-        }
-
-        // fapiRcToErrl is implicitly calling processEICDGs
-        errlHndl_t pError = fapiRcToErrl(l_rc);
-        if(pError == NULL)
-        {
-            FAPI_ERR("rcTest18:fapiRcToErrl returnd No Errorlog handle");
-            l_result = 5;
-            break;
-        }
-
-        srciIdx_t l_calloutCnt = 0;
-        const SrciSrc* pSRC = pError->getSRC();
-        pSRC->Callouts(l_calloutCnt);
-        if(l_calloutCnt < 1)
-        {
-            l_result = 6;
-            FAPI_ERR("Error. No Callout from  fapiRcToErrl");
-            break;
-        }
-
-        // TODO RTC 79353
-        // Garded Target must be UnGard here.
-
-        FAPI_INF("rcTest18:Deconfig/Gard HWP callout TC success");
-        if(pError != NULL)
-        {
-            delete pError;
-            pError = NULL;
-        }
-
-    }while(0);
-    return l_result;
-}
-#endif //fips
-
-}
diff --git a/src/usr/hwpf/test/fapiTargetTest.C b/src/usr/hwpf/test/fapiTargetTest.C
deleted file mode 100644
index b38ddb67a..000000000
--- a/src/usr/hwpf/test/fapiTargetTest.C
+++ /dev/null
@@ -1,422 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/test/fapiTargetTest.C $                          */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2011,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-/**
- *  @file fapitargetTest.C
- *
- *  @brief Implements Target class unit test functions.
- */
-
-/*
- * Change Log ******************************************************************
- * Flag     Defect/Feature  User        Date        Description
- * ------   --------------  ----------  ----------- ----------------------------
- *                          mjjones     04/13/2011  Created.
- *                          mjjones     09/23/2011  Added Success traces
- *
- */
-
-#include <fapi.H>
-
-namespace fapi
-{
-
-//******************************************************************************
-// targetTest1
-//******************************************************************************
-uint32_t targetTest1()
-{
-    uint32_t l_result = 0;
-
-    // Create Target using default constructor
-    Target l_target;
-
-    // Ensure that the handle pointer is NULL
-    void * l_pHandle = l_target.get();
-
-    if (l_pHandle != NULL)
-    {
-        FAPI_ERR("targetTest1. Handle is not NULL");
-        l_result = 1;
-    }
-    else
-    {
-        // Ensure that the type is TARGET_TYPE_NONE
-        TargetType l_type = l_target.getType();
-
-        if (l_type != TARGET_TYPE_NONE)
-        {
-            FAPI_ERR("targetTest1. Type is 0x%x, expected NONE", l_type);
-            l_result = 2;
-        }
-        else
-        {
-            FAPI_INF("targetTest1. Success!");
-        }
-    }
-
-    return l_result;
-}
-
-//******************************************************************************
-// targetTest2
-//******************************************************************************
-uint32_t targetTest2()
-{
-    uint32_t l_result = 0;
-    uint8_t l_handle = 7;
-    void * l_pHandle = reinterpret_cast<void *>(&l_handle);
-
-    // Create Target
-    Target l_target(TARGET_TYPE_DIMM, l_pHandle);
-
-    // Ensure that the handle pointer is as expected
-    void * l_pHandleCheck = l_target.get();
-
-    if (l_pHandleCheck != l_pHandle)
-    {
-        FAPI_ERR("targetTest2. Handle is not as expected");
-        l_result = 1;
-    }
-    else
-    {
-        // Ensure that the type is TARGET_TYPE_DIMM
-        TargetType l_type = l_target.getType();
-
-        if (l_type != TARGET_TYPE_DIMM)
-        {
-            FAPI_ERR("targetTest2. Type is 0x%x, expected DIMM", l_type);
-            l_result = 2;
-        }
-        else
-        {
-            FAPI_INF("targetTest2. Success!");
-        }
-    }
-
-    // Set the handle pointer to NULL to prevent any problem on destruction
-    l_target.set(NULL);
-
-    return l_result;
-}
-
-//******************************************************************************
-// targetTest3
-//******************************************************************************
-uint32_t targetTest3()
-{
-    uint32_t l_result = 0;
-
-    // Create Target using default constructor
-    Target l_target;
-
-    // Set the handle
-    uint8_t l_handle = 7;
-    void * l_pHandle = reinterpret_cast<void *>(&l_handle);
-    l_target.set(l_pHandle);
-
-    // Ensure that the handle pointer is as expected
-    void * l_pHandleCheck = l_target.get();
-
-    if (l_pHandleCheck != l_pHandle)
-    {
-        FAPI_ERR("targetTest3. Handle is not as expected");
-        l_result = 1;
-    }
-    else
-    {
-        // Set the type
-        l_target.setType(TARGET_TYPE_DIMM);
-
-        // Ensure that the type is TARGET_TYPE_DIMM
-        TargetType l_type = l_target.getType();
-
-        if (l_type != TARGET_TYPE_DIMM)
-        {
-            FAPI_ERR("targetTest3. Type is 0x%x, expected DIMM", l_type);
-            l_result = 2;
-        }
-        else
-        {
-            FAPI_INF("targetTest3. Success!");
-        }
-    }
-
-    return l_result;
-}
-
-//******************************************************************************
-// targetTest4
-//******************************************************************************
-uint32_t targetTest4()
-{
-    uint32_t l_result = 0;
-
-    // Create Target
-    uint8_t l_handle = 7;
-    void * l_pHandle = reinterpret_cast<void *>(&l_handle);
-    Target l_target(TARGET_TYPE_DIMM, l_pHandle);
-
-    // Create Target using copy constructor
-    Target l_target2(l_target);
-
-    // Ensure that the target types are the same
-    TargetType l_type = l_target.getType();
-    TargetType l_type2 = l_target2.getType();
-
-    if (l_type != l_type2)
-    {
-        FAPI_ERR("targetTest4. Types are not the same (0x%x, 0x%x)", l_type,
-                 l_type2);
-        l_result = 1;
-    }
-    else
-    {
-        // Ensure that the handles are the same
-        void * l_han1 = l_target.get();
-        void * l_han2 = l_target2.get();
-
-        if (l_han1 != l_han2)
-        {
-            FAPI_ERR("targetTest4. Handles are not the same");
-            l_result = 2;
-        }
-        else
-        {
-            FAPI_INF("targetTest4. Success!");
-        }
-    }
-
-    return l_result;
-}
-
-//******************************************************************************
-// targetTest5
-//******************************************************************************
-uint32_t targetTest5()
-{
-    uint32_t l_result = 0;
-
-    // Create Target
-    uint8_t l_handle = 7;
-    void * l_pHandle = reinterpret_cast<void *>(&l_handle);
-    Target l_target(TARGET_TYPE_DIMM, l_pHandle);
-
-    // Create Target using assignment operator
-    Target l_target2;
-    l_target2 = l_target;
-
-    // Ensure that the target types are the same
-    TargetType l_type = l_target.getType();
-    TargetType l_type2 = l_target2.getType();
-
-    if (l_type != l_type2)
-    {
-        FAPI_ERR("targetTest5. Types are not the same (0x%x, 0x%x)", l_type,
-                 l_type2);
-        l_result = 1;
-    }
-    else
-    {
-        // Ensure that the handles are the same
-        void * l_han1 = l_target.get();
-        void * l_han2 = l_target2.get();
-
-        if (l_han1 != l_han2)
-        {
-            FAPI_ERR("targetTest5. Handles are not the same");
-            l_result = 2;
-        }
-        else
-        {
-            FAPI_INF("targetTest5. Success!");
-        }
-    }
-
-    return l_result;
-}
-
-//******************************************************************************
-// targetTest6
-//******************************************************************************
-uint32_t targetTest6()
-{
-    uint32_t l_result = 0;
-
-    // Create similar Targets
-    uint8_t l_handle = 7;
-    void * l_pHandle = reinterpret_cast<void *>(&l_handle);
-    Target l_target(TARGET_TYPE_DIMM, l_pHandle);
-    Target l_target2(TARGET_TYPE_DIMM, l_pHandle);
-
-    // Ensure that the equality comparison returns true
-    if (!(l_target == l_target2))
-    {
-        FAPI_ERR("targetTest6. 1. Equality comparison false");
-        l_result = 1;
-    }
-    else
-    {
-        // Ensure that the inequality comparison returns false
-        if (l_target != l_target2)
-        {
-            FAPI_ERR("targetTest6. 2. Inequality comparison true");
-            l_result = 2;
-        }
-        else
-        {
-            // Change the target type of l_target2
-            (void)l_target2.setType(TARGET_TYPE_PROC_CHIP);
-
-            // Ensure that the equality comparison returns false
-            if (l_target == l_target2)
-            {
-                FAPI_ERR("targetTest6. 3. Equality comparison true");
-                l_result = 3;
-            }
-            else
-            {
-                // Ensure that the inequality comparison returns true
-                if (!(l_target != l_target2))
-                {
-                    FAPI_ERR("targetTest6. 4. Inequality comparison false");
-                    l_result = 4;
-                }
-                else
-                {
-                    // Reset the target type of l_target2
-                    (void)l_target2.setType(TARGET_TYPE_DIMM);
-
-                    // Change the handle of l_target
-                    uint8_t l_handle2 = 7;
-                    void * l_pHandle2 = reinterpret_cast<void *>(&l_handle2);
-                    (void)l_target.set(l_pHandle2);
-
-                    // Ensure that the equality comparison returns false
-                    if (l_target == l_target2)
-                    {
-                        FAPI_ERR("targetTest6. 5. Equality comparison true");
-                        l_result = 5;
-                    }
-                    else
-                    {
-                        // Ensure that the inequality comparison returns true
-                        if (!(l_target != l_target2))
-                        {
-                            FAPI_ERR("targetTest6. 6. Inequality comparison "
-                                    "false");
-                            l_result = 6;
-                        }
-                        else
-                        {
-                            FAPI_INF("targetTest6. Success!");
-                        }
-                    }
-                }
-            }
-        }
-    }
-
-    return l_result;
-}
-//******************************************************************************
-// targetTest7
-//******************************************************************************
-uint32_t targetTest7()
-{
-    uint32_t l_result = 0;
-    uint8_t l_handle = 7;
-    void * l_pHandle = reinterpret_cast<void *>(&l_handle);
-
-    // Create Target
-    Target l_target(TARGET_TYPE_L4, l_pHandle);
-
-    // Ensure that the handle pointer is as expected
-    void * l_pHandleCheck = l_target.get();
-
-    if (l_pHandleCheck != l_pHandle)
-    {
-        FAPI_ERR("targetTest7. Handle is not as expected");
-        l_result = 1;
-    }
-    else
-    {
-        // Ensure that the type is TARGET_TYPE_L4
-        TargetType l_type = l_target.getType();
-
-        if (l_type != TARGET_TYPE_L4)
-        {
-            FAPI_ERR("targetTest7. Type is 0x%x, expected L4", l_type);
-            l_result = 2;
-        }
-        else
-        {
-            FAPI_INF("targetTest7. Success!");
-        }
-    }
-
-    // Set the handle pointer to NULL to prevent any problem on destruction
-    l_target.set(NULL);
-
-    return l_result;
-}
-//******************************************************************************
-// targetTest8
-//******************************************************************************
-uint32_t targetTest8()
-{
-    uint32_t l_result = 0;
-    uint8_t l_handle = 7;
-    void * l_pHandle = reinterpret_cast<void *>(&l_handle);
-
-    // Create Target
-    Target l_target(TARGET_TYPE_L4, l_pHandle);
-
-    // an L4 Target is not a chip
-    if ( l_target.isChip() )
-    {
-        FAPI_ERR("targetTest8. L4 target incorrectly"
-                                " identified itself as a chip");
-        l_result = 1;
-    }
-    else
-    {
-
-        if ( !l_target.isChiplet() )
-        {
-            FAPI_ERR("targetTest8. L4 target failed to identify as a chiplett" );
-            l_result = 2;
-        }
-        else
-        {
-            FAPI_INF("targetTest8. Success!");
-        }
-    }
-
-    // Set the handle pointer to NULL to prevent any problem on destruction
-    l_target.set(NULL);
-
-    return l_result;
-}
-
-
-}
diff --git a/src/usr/hwpf/test/fapiattrtest.H b/src/usr/hwpf/test/fapiattrtest.H
deleted file mode 100644
index 1e3f69d3d..000000000
--- a/src/usr/hwpf/test/fapiattrtest.H
+++ /dev/null
@@ -1,98 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/test/fapiattrtest.H $                            */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2013,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#ifndef FAPIATTRTEST_H
-#define FAPIATTRTEST_H
-
-/**
- *  @file fapiattrtanktest.H
- *
- *  @brief Test case for FAPI AttributeTank
-*/
-
-#include <cxxtest/TestSuite.H>
-#include "fapiAttrTest.C"
-
-using namespace fapi;
-
-class FapiAttrTest: public CxxTest::TestSuite
-{
-public:
-
-    void test1(void)
-    {
-        if (attrTest1() != 0)
-        {
-            TS_FAIL("attrTest1. Fail");
-        }
-    }
-
-    void test2(void)
-    {
-        if (attrTest2() != 0)
-        {
-            TS_FAIL("attrTest2. Fail");
-        }
-    }
-
-    void test3(void)
-    {
-        if (attrTest3() != 0)
-        {
-            TS_FAIL("attrTest3. Fail");
-        }
-    }
-
-    void test4(void)
-    {
-        if (attrTest4() != 0)
-        {
-            TS_FAIL("attrTest4. Fail");
-        }
-    }
-
-    void test5(void)
-    {
-        if (attrTest5() != 0)
-        {
-            TS_FAIL("attrTest5. Fail");
-        }
-    }
-
-    void test6(void)
-    {
-        if (attrTest6() != 0)
-        {
-            TS_FAIL("attrTest6. Fail");
-        }
-    }
-
-    void test7(void)
-    {
-        if (attrTest7() != 0)
-        {
-            TS_FAIL("attrTest7. Fail");
-        }
-    }
-};
-
-#endif
diff --git a/src/usr/hwpf/test/fapirctest.H b/src/usr/hwpf/test/fapirctest.H
deleted file mode 100644
index cd4c95999..000000000
--- a/src/usr/hwpf/test/fapirctest.H
+++ /dev/null
@@ -1,280 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/test/fapirctest.H $                              */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2014                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#ifndef __FAPItestRc_H
-#define __FAPItestRc_H
-
-/**
- *  @file fapitestRc.H
- *
- *  @brief Test case for FAPI return codes
-*/
-
-#include <cxxtest/TestSuite.H>
-#include <fapi.H>
-#include "fapiRcTest.C"
-
-using namespace fapi;
-
-class FapitestRc: public CxxTest::TestSuite
-{
-public:
-
-    /**
-     * @brief Test FAPI return codes #1
-     */
-    void testRc1(void)
-    {
-        uint32_t l_res = rcTest1();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc1. Fail l_res=%d", l_res);
-        }
-    }
-
-
-    /**
-     * @brief Test FAPI return codes #2
-     */
-    void testRc2()
-    {
-        uint32_t l_res = rcTest2();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc2. Fail l_res=%d", l_res);
-        }
-    }
-
-    /**
-     * @brief Test FAPI return codes #3
-     */
-    void testRc3()
-    {
-        uint32_t l_res = rcTest3();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc3. Fail l_res=%d", l_res);
-        }
-        return;
-    }
-
-    /**
-     * @brief Test FAPI return codes #4
-     */
-    void testRc4()
-    {
-        uint32_t l_res = rcTest4();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc4. Fail l_res=%d", l_res);
-        }
-        return;
-    }
-
-    /**
-     * @brief Test FAPI return codes #5
-     */
-    void testRc5()
-    {
-        uint32_t l_res = rcTest5();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc5. Fail l_res=%d", l_res);
-        }
-        return;
-    }
-
-    /**
-     * @brief Test FAPI return codes #6
-     */
-    void testRc6()
-    {
-        uint32_t l_res = rcTest6();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc6. Fail l_res=%d", l_res);
-        }
-        return;
-    }
-
-    /**
-     * @brief Test FAPI return codes #7
-     */
-    void testRc7()
-    {
-        uint32_t l_res = rcTest7();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc7. Fail l_res=%d", l_res);
-        }
-        return;
-    }
-
-    /**
-     * @brief Test FAPI return codes #8
-     */
-    void testRc8()
-    {
-        uint32_t l_res = rcTest8();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc8. Fail l_res=%d", l_res);
-        }
-    }
-
-    /**
-     * @brief Test FAPI return codes #9
-     */
-    void testRc9()
-    {
-        uint32_t l_res = rcTest9();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc9. Fail l_res=%d", l_res);
-        }
-        return;
-    }
-
-    /**
-     * @brief Test FAPI return codes #10
-     */
-    void testRc10()
-    {
-        uint32_t l_res = rcTest10();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc10. Fail l_res=%d", l_res);
-        }
-        return;
-    }
-
-    /**
-     * @brief Test FAPI return codes #11
-     */
-    void testRc11(void)
-    {
-        uint32_t l_res = rcTest11();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc11. Fail l_res=%d", l_res);
-        }
-    }
-
-
-    /**
-     * @brief Test FAPI return codes #12
-     */
-    void testRc12()
-    {
-        uint32_t l_res = rcTest12();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc12. Fail l_res=%d", l_res);
-        }
-    }
-
-    /**
-     * @brief Test FAPI return codes #13
-     */
-    void testRc13()
-    {
-        uint32_t l_res = rcTest13();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc13. Fail l_res=%d", l_res);
-        }
-        return;
-    }
-
-    /**
-     * @brief Test FAPI return codes #14
-     */
-    void testRc14()
-    {
-        uint32_t l_res = rcTest14();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc14. Fail l_res=%d", l_res);
-        }
-        return;
-    }
-
-    /**
-     * @brief Test FAPI return codes #15
-     */
-    void testRc15()
-    {
-        uint32_t l_res = rcTest15();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc15. Fail l_res=%d", l_res);
-        }
-        return;
-    }
-
-    /**
-     * @brief Test FAPI return codes #16
-     */
-    void testRc16()
-    {
-        uint32_t l_res = rcTest16();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc16. Fail l_res=%d", l_res);
-        }
-        return;
-    }
-
-    /**
-     * @brief Test FAPI return codes #17
-     */
-    void testRc17()
-    {
-        uint32_t l_res = rcTest17();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testRc17. Fail l_res=%d", l_res);
-        }
-        return;
-    }
-};
-
-#endif
diff --git a/src/usr/hwpf/test/fapitargettest.H b/src/usr/hwpf/test/fapitargettest.H
deleted file mode 100644
index 4d468fd45..000000000
--- a/src/usr/hwpf/test/fapitargettest.H
+++ /dev/null
@@ -1,147 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/test/fapitargettest.H $                          */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2011,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#ifndef __FAPITARGETTEST_H
-#define __FAPITARGETTEST_H
-
-/**
- *  @file fapitargettest.H
- *
- *  @brief Test case for FAPI targets
-*/
-
-#include <cxxtest/TestSuite.H>
-#include <fapi.H>
-#include "fapiTargetTest.C"
-
-using namespace fapi;
-
-class FapiTargetTest: public CxxTest::TestSuite
-{
-public:
-
-    /**
-     * @brief Test target #1
-     */
-    void testTarget1()
-    {
-        uint32_t l_res = targetTest1();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testTarget1. Fail");
-        }
-    }
-
-    /**
-     * @brief Test target #2
-     */
-    void testTarget2()
-    {
-        uint32_t l_res = targetTest2();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testTarget2. Fail");
-        }
-    }
-
-    /**
-     * @brief Test target #3
-     */
-    void testTarget3()
-    {
-        uint32_t l_res = targetTest3();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testTarget3. Fail");
-        }
-    }
-
-    /**
-     * @brief Test target #4
-     */
-    void testTarget4()
-    {
-        uint32_t l_res = targetTest4();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testTarget4. Fail");
-        }
-    }
-
-    /**
-     * @brief Test target #5
-     */
-    void testTarget5()
-    {
-        uint32_t l_res = targetTest5();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testTarget5. Fail");
-        }
-    }
-
-    /**
-     * @brief Test target #6
-     */
-    void testTarget6()
-    {
-        uint32_t l_res = targetTest6();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testTarget6. Fail");
-        }
-    }
-
-    /**
-     * @brief Test target #7
-     */
-    void testTarget7()
-    {
-        uint32_t l_res = targetTest7();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testTarget7. Fail");
-        }
-    }
-
-    /**
-     * @brief Test target #8
-     */
-    void testTarget8()
-    {
-        uint32_t l_res = targetTest8();
-
-        if (l_res != 0)
-        {
-            TS_FAIL("testTarget8. Fail");
-        }
-    }
-};
-
-#endif
diff --git a/src/usr/hwpf/test/hwpDQCompressionTest.H b/src/usr/hwpf/test/hwpDQCompressionTest.H
deleted file mode 100644
index 7da111eba..000000000
--- a/src/usr/hwpf/test/hwpDQCompressionTest.H
+++ /dev/null
@@ -1,224 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/test/hwpDQCompressionTest.H $                    */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2014                             */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#ifndef _HWPDQCOMPRESSIONTEST_H
-#define _HWPDQCOMPRESSIONTEST_H
-
-/**
- *  @file hwpDQCompressionTest.H
- *
- *  @brief Tests for DQ and DQS compression and decompression
- *
- */
-
-#include <cxxtest/TestSuite.H>
-#include <hwpf/hwp/mvpd_accessors/DQCompressionLib.H>
-#include "../hwp/mvpd_accessors/compressionTool/DQCompressionReasonCodes.H"
-#include "../hwp/mvpd_accessors/compressionTool/DQCompressionConsts.H"
-#include <hwpf/hwp/mvpd_accessors/getDecompressedISDIMMAttrs.H>
-
-#include <targeting/common/commontargeting.H>
-#include <targeting/common/utilFilter.H>
-#include <targeting/common/trace.H>
-
-using namespace TARGETING;
-using namespace DQCompression;
-
-class HwpDQCompressionTest: public CxxTest::TestSuite
-{
-public:
-    void testDQCompression1()
-    {
-        int l_errl = NO_ERR;
-        do
-        {
-                TRACFCOMP(g_trac_targeting, "Starting DQ Test 1");
-                //Input DQ array
-                uint8_t l_isdimmToC4DQ_P0 [DQarray_size]={8,9,10,11,12,13,14,15,
-                                                      0,1,2,3,4,5,6,7,
-                                                      16,17,18,19,20,21,22,23,
-                                                      64,65,66,67,68,69,70,71,
-                                                      32,33,34,35,36,37,38,39,
-                                                      40,41,42,43,44,45,46,47,
-                                                      48,49,50,51,52,53,54,55,
-                                                      56,57,58,59,60,61,62,63,
-                                                      24,25,26,27,28,29,30,31,
-                                                      255,255,255,255,255,255,
-                                                      255,255};
-
-                //convert array to a vector
-                std::vector<uint8_t> l_isdimmToC4DQ_0 (l_isdimmToC4DQ_P0,
-                            l_isdimmToC4DQ_P0+(sizeof(l_isdimmToC4DQ_P0)/
-                            sizeof(uint8_t)));
-
-                //Pass the vector to the encode function
-                ecmdDataBufferBase l_encodedDQData;
-                l_errl = encodeDQ(l_isdimmToC4DQ_0, DQ, l_encodedDQData);
-
-                if (l_errl)
-                {
-                    TS_FAIL("Error Encoding DQ Data set1 %s",
-                                    ReasonCodes[l_errl]);
-                    break;
-                }
-
-                //Input DQS Array
-                uint8_t l_isdimmToC4DQS_P0 [DQSarray_size]= {2,3,0,1,
-                                                        4,5,16,17,
-                                                        8,9,10,11,
-                                                        12,13,14,15,
-                                                        6,7,255,255};
-                //Convert DQS array to a vector
-                std::vector<uint8_t> l_isdimmToC4DQS_0 (l_isdimmToC4DQS_P0,
-                            l_isdimmToC4DQS_P0+(sizeof(l_isdimmToC4DQS_P0)/
-                            sizeof(uint8_t)));
-
-                //encode
-                ecmdDataBufferBase l_encodedDQSData;
-                l_errl = encodeDQ(l_isdimmToC4DQS_0, DQS, l_encodedDQSData);
-                if (l_errl)
-                {
-                    TS_FAIL("Error Encoding DQS Data1 %s",
-                                    ReasonCodes[l_errl]);
-                    break;
-                }
-
-                //Pass the output to decode
-                uint8_t l_decDQArray [DQarray_size];
-                uint8_t l_decDQSArray[DQSarray_size];
-                decodeISDIMMAttrs(l_encodedDQData, l_encodedDQSData,
-                                l_decDQArray, l_decDQSArray);
-
-                //Check if the initial vector is obtained.
-                //If not, throw an error
-                //First, check DQ
-                for (uint8_t i = 0; i < DQarray_size; i++)
-                {
-                    if(l_decDQArray[i] != l_isdimmToC4DQ_P0[i])
-                    {
-                        TS_FAIL("Decoded Output differs from initial array DQ test1");
-                        break;
-                    }
-                }
-
-                //Check DQS
-                for (uint8_t i = 0; i < DQSarray_size; i++)
-                {
-                    if(l_decDQSArray[i] != l_isdimmToC4DQS_P0[i])
-                    {
-                        TS_FAIL("Decoded Output differs from initial array DQS test1");
-                        break;
-                    }
-                }
-
-                TRACFCOMP(g_trac_targeting, "DQ Test 1 ended successfully");
-        } while (0);
-
-    }
-
-    void testDQCompression2 ()
-    {
-        int l_errl = NO_ERR;
-        do
-        {
-              TRACFCOMP(g_trac_targeting, "Starting DQ Test 2");
-              uint8_t l_isdimmToC4DQ_P1[DQarray_size]={24,25,26,27,28,29,30,31,
-                                                  4,5,6,7,0,1,2,3,
-                                                  20,21,22,23,16,17,18,19,
-                                                  68,69,70,71,64,65,66,67,
-                                                  36,37,38,39,32,33,34,35,
-                                                  43,41,42,40,44,45,46,47,
-                                                  48,49,50,51,52,53,54,55,
-                                                  56,57,58,59,60,61,62,63,
-                                                  15,13,14,12,10,9,11,8,
-                                                  255,255,255,255,255,255,
-                                                  255,255};
-
-                //Convert to a vector
-                std::vector<uint8_t> l_isdimmToC4DQ_1 (l_isdimmToC4DQ_P1,
-                            l_isdimmToC4DQ_P1+(sizeof(l_isdimmToC4DQ_P1)/
-                            sizeof(uint8_t)));
-
-                //Pass the vector to encode function
-                ecmdDataBufferBase l_encodedDQData;
-                l_errl = encodeDQ(l_isdimmToC4DQ_1, DQ, l_encodedDQData);
-
-                if (l_errl)
-                {
-                    TS_FAIL("Error Encoding DQ Data2 %s",
-                                    ReasonCodes[l_errl]);
-                    break;
-                }
-                uint8_t l_isdimmToC4DQS_P1 [DQSarray_size]= {7,6,1,0,
-                                                           4,5,17,16,
-                                                           9,8,10,11,
-                                                           13,12,14,15,
-                                                           2,3,255,255};
-                std::vector<uint8_t> l_isdimmToC4DQS_1 (l_isdimmToC4DQS_P1,
-                          l_isdimmToC4DQS_P1+(sizeof(l_isdimmToC4DQS_P1)/sizeof
-                            (uint8_t)));
-
-                //encode
-                ecmdDataBufferBase l_encodedDQSData;
-                l_errl = encodeDQ(l_isdimmToC4DQS_1, DQS, l_encodedDQSData);
-                if (l_errl)
-                {
-                    TS_FAIL("Error Encoding DQS Data2 %s",
-                                    ReasonCodes[l_errl]);
-                    break;
-                }
-
-                //Pass the output to decode
-                uint8_t l_decDQArray [DQarray_size];
-                uint8_t l_decDQSArray[DQSarray_size];
-                decodeISDIMMAttrs (l_encodedDQData, l_encodedDQSData,
-                                   l_decDQArray, l_decDQSArray);
-
-                //Check if the initial vector is obtained.
-                //If not, throw an error
-                //First, check DQ
-                for (uint8_t i = 0; i < DQarray_size; i++)
-                {
-                    if(l_decDQArray[i] != l_isdimmToC4DQ_P1[i])
-                    {
-                        TS_FAIL("Decoded Output differs initial array DQ test2");
-                        break;
-                    }
-                }
-
-                //Check DQS
-                for (uint8_t i = 0; i < DQSarray_size; i++)
-                {
-                    if(l_decDQSArray[i] != l_isdimmToC4DQS_P1[i])
-                    {
-                        TS_FAIL("Decoded Output differs initial array DQS test2");
-                        break;
-                    }
-                }
-
-                TRACFCOMP(g_trac_targeting, "DQ Test 2 ended successfully");
-        } while (0);
-    }
-};
-#endif
diff --git a/src/usr/hwpf/test/hwpMBvpdAccessorTest.H b/src/usr/hwpf/test/hwpMBvpdAccessorTest.H
deleted file mode 100644
index 239a6ba25..000000000
--- a/src/usr/hwpf/test/hwpMBvpdAccessorTest.H
+++ /dev/null
@@ -1,2078 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/test/hwpMBvpdAccessorTest.H $                    */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-
-#ifndef __HWPMBVPDACCESSORTEST_H
-#define __HWPMBVPDACCESSORTEST_H
-
-// set to 1 for doing unit tests, set to 0 for production
-#define HWPMBVPDACCESSORTEST_UT0 0 // 0 = just one chip, 1 = all
-#define HWPMBVPDACCESSORTEST_UT1 0 // 0 = the last keword added, 1 = all & dump
-#define HWPMBVPDACCESSORTEST_UT2 0 // 0 = min slope intercept tests
-#define HWPMBVPDACCESSORTEST_UT3 0 // 0 = min L4 Bank Delete tests
-#define HWPMBVPDACCESSORTEST_UT4 0 // 0 = min term data tests
-#define HWPMBVPDACCESSORTEST_UT5 0 // 0 = min phase rotator data tests
-#define HWPMBVPDACCESSORTEST_UT6 0 // 0 = include those moved in v5.3 redefine
-#define HWPMBVPDACCESSORTEST_UT7 0 // 0 = min sensor map tests
-
-/**
- *  @file hwpmbvpdaccessortest.H
- *
- *  @brief Test cases for MBvpd HWP accessors.
-*/
-
-#include <cxxtest/TestSuite.H>
-
-#include    <fapi.H>
-#include    <fapiPlatHwpInvoker.H>
-
-#include    <targeting/common/commontargeting.H>
-#include    <targeting/common/utilFilter.H>
-
-#include    <setMvpdRing.H>
-#include    <mvpd_accessors/getMBvpdAddrMirrorData.H>
-#include    <mvpd_accessors/getMBvpdSlopeInterceptData.H>
-#include    <mvpd_accessors/getMBvpdVersion.H>
-#include    <mvpd_accessors/getMBvpdDram2NModeEnabled.H>
-#include    <mvpd_accessors/getMBvpdSensorMap.H>
-#include    <mvpd_accessors/getControlCapableData.H>
-#include    <mvpd_accessors/accessMBvpdL4BankDelete.H>
-#include    <mvpd_accessors/getDecompressedISDIMMAttrs.H>
-#include    <mvpd_accessors/getMBvpdAttr.H>
-
-#include <errl/errlmanager.H>
-#include <errl/errlentry.H>
-#include <devicefw/driverif.H>
-#include <trace/interface.H>
-#include <config.h>
-
-using namespace     fapi;
-using   namespace   TARGETING;
-
-class hwpMBvpdAccessorTest : public CxxTest::TestSuite
-{
-public:
-
-    /**
-     * @brief  call fapiGetMBvpdField to fetch memory buffer vpd records.
-     *
-     */
-    void    testGetMBvpd()
-    {
-        fapi::ReturnCode    l_fapirc;
-        uint8_t             *l_pRecord            =   NULL;
-        uint32_t            l_len                =   0;
-
-        // list of MBVPD records to test
-        struct _testMBvpdRecords {
-            fapi::MBvpdRecord record;
-            fapi::MBvpdKeyword keyword;
-        }  l_mbvpdRecords[] = {
-#if HWPMBVPDACCESSORTEST_UT1
-            { MBVPD_RECORD_VEIR, MBVPD_KEYWORD_PDI},
-//          { MBVPD_RECORD_VER0, MBVPD_KEYWORD_PDI},//in spec, not supported
-            { MBVPD_RECORD_MER0, MBVPD_KEYWORD_PDI},
-            { MBVPD_RECORD_VSPD, MBVPD_KEYWORD_PDI},
-            { MBVPD_RECORD_VSPD, MBVPD_KEYWORD_MT},
-            { MBVPD_RECORD_VSPD, MBVPD_KEYWORD_MR},
-            { MBVPD_RECORD_VSPD, MBVPD_KEYWORD_PDA},
-            { MBVPD_RECORD_VSPD, MBVPD_KEYWORD_EL},
-            { MBVPD_RECORD_VSPD, MBVPD_KEYWORD_LM},
-            { MBVPD_RECORD_VSPD, MBVPD_KEYWORD_MW},
-            { MBVPD_RECORD_VSPD, MBVPD_KEYWORD_MV},
-            { MBVPD_RECORD_VSPD, MBVPD_KEYWORD_AM},
-#endif
-            { MBVPD_RECORD_VINI, MBVPD_KEYWORD_VZ},
-        };
-
-        TS_TRACE( "testGetMBvpd entry" );
-
-        TARGETING::TargetHandleList l_memBufList;
-        getAllChips(l_memBufList, TYPE_MEMBUF);
-
-        TS_TRACE( "testGetMBvpd l_memBufList.size()= 0x%x ",
-                                      l_memBufList.size() );
-
-        // loop thru all the memory buffers
-        for (uint8_t l_mbNum=0; l_mbNum < l_memBufList.size(); l_mbNum++ )
-        {
-            //  make a local copy of the memory buffer target
-            TARGETING::Target*  l_mb_target = l_memBufList[l_mbNum];
-
-            //  dump physical path to target
-            EntityPath l_path;
-            l_path  =   l_mb_target->getAttr<ATTR_PHYS_PATH>();
-            l_path.dump();
-
-            // cast OUR type of target to a FAPI type of target.
-            fapi::Target l_fapi_mb_target(
-                                          TARGET_TYPE_MEMBUF_CHIP,
-                   (const_cast<TARGETING::Target*>(l_mb_target)) );
-
-            // loop through mvpd records of interest
-            const uint32_t numRecords =
-                    sizeof(l_mbvpdRecords)/sizeof(l_mbvpdRecords[0]);
-            for (uint8_t i=0;i<numRecords;i++) {
-
-                TS_TRACE( "record = 0x%x keyword = 0x%x",
-                   l_mbvpdRecords[i].record,
-                   l_mbvpdRecords[i].keyword);
-
-                TS_TRACE( "call fapiGetMBvpdField with NULL pointer" );
-
-                //  call fapiGetMvpdField once with a NULL pointer to get the
-                //  buffer size should return no error now.
-                l_fapirc = fapiGetMBvpdField(l_mbvpdRecords[i].record,
-                                        l_mbvpdRecords[i].keyword,
-                                        l_fapi_mb_target,
-                                        NULL,
-                                        l_len );
-                if ( l_fapirc != fapi::FAPI_RC_SUCCESS )
-                {
-                    TS_FAIL( "fapiGetMBvpdField:  expected FAPI_RC_SUCCESS" );
-                    fapiLogError(l_fapirc);
-                    return;
-                }
-
-                TS_TRACE( "fapiGetMBvpdField: size of record = 0x%x",
-                      l_len );
-
-                //  do a malloc instead of a new just for variety
-                l_pRecord =   reinterpret_cast<uint8_t *>(malloc(l_len) );
-
-                //  call fapiGetMvpdField once with a valid pointer
-                l_fapirc = fapiGetMBvpdField(l_mbvpdRecords[i].record,
-                                        l_mbvpdRecords[i].keyword,
-                                        l_fapi_mb_target,
-                                        l_pRecord,
-                                        l_len );
-                if ( l_fapirc != fapi::FAPI_RC_SUCCESS )
-                {
-                    TS_FAIL( "fapiGetMBvpdField:  expected FAPI_RC_SUCCESS" );
-                    fapiLogError(l_fapirc);
-                    free( l_pRecord );
-                    return;
-                }
-#if HWPMBVPDACCESSORTEST_UT1
-                TRACFCOMP(g_trac_test,"testMBvpd:Record=%d,Keyword=%d",
-                                        l_mbvpdRecords[i].record,
-                                        l_mbvpdRecords[i].keyword);
-                TRACFBIN(g_trac_test,"testMBvpd:DumpRecord:",
-                      l_pRecord,
-                      l_len );
-#endif
-                //  call fapiSetMvpdField
-                l_fapirc = fapiSetMBvpdField(l_mbvpdRecords[i].record,
-                                        l_mbvpdRecords[i].keyword,
-                                        l_fapi_mb_target,
-                                        l_pRecord,
-                                        l_len );
-                if ( l_fapirc != fapi::FAPI_RC_SUCCESS )
-                {
-                    TS_FAIL( "fapiSetMBvpdField:  expected FAPI_RC_SUCCESS" );
-                    fapiLogError(l_fapirc);
-                    free( l_pRecord );
-                    return;
-                }
-
-                //  clean up memory
-                free( l_pRecord );
-            }
-        }
-
-        TS_TRACE( "testGetMBvpd exit" );
-
-    }
-
-    void testGetDQAttrISDIMM()
-    {
-        fapi::ReturnCode l_fapirc;
-
-        TS_TRACE("DQ Attributes ISDIMM entry");
-
-        TARGETING::TargetHandleList l_memBufList;
-        getAllChips(l_memBufList, TYPE_MEMBUF);
-
-        for(uint8_t l_mbNum = 0; l_mbNum < l_memBufList.size(); l_mbNum++)
-        {
-            TARGETING::TargetHandleList l_mbaList;
-            getChildAffinityTargets(l_mbaList,l_memBufList[l_mbNum],
-                            CLASS_UNIT,TYPE_MBA,false);
-
-            for(uint8_t l_mbaNum = 0; l_mbaNum < l_mbaList.size(); l_mbaNum++)
-            {
-                //dump physical path to target
-                EntityPath l_mbaPath;
-                l_mbaPath = l_mbaList[l_mbaNum] ->getAttr<ATTR_PHYS_PATH>();
-                l_mbaPath.dump();
-
-                //cast out type of target to a FAPI type of target.
-                fapi::Target l_fapi_mba_target(TARGET_TYPE_MBA_CHIPLET,
-                        (const_cast<TARGETING::Target*>(l_mbaList[l_mbaNum])));
-
-                uint8_t l_customDimm = 0;
-                l_fapirc = FAPI_ATTR_GET(ATTR_EFF_CUSTOM_DIMM,
-                                &l_fapi_mba_target,l_customDimm);
-                if(l_fapirc)
-                {
-                    FAPI_ERR("hwpMBvpdAccessorTest: Read of custom dimm failed");
-                    break;
-                }
-
-                //if custom_dimm = 0, use isdimm otherwise this test is useless
-                if(fapi::ENUM_ATTR_EFF_CUSTOM_DIMM_NO == l_customDimm)
-                {
-
-                    // make a local copy of the memory buffer target
-                    TARGETING::Target* l_mb_target = l_memBufList[l_mbNum];
-
-                    // dump physical path to target
-                    EntityPath l_path;
-                    l_path = l_mb_target->getAttr<ATTR_PHYS_PATH>();
-                    l_path.dump();
-
-                    // cast OUR type of target to a FAPI type of target.
-                    fapi::Target l_fapi_mb_target(
-                                TARGET_TYPE_MEMBUF_CHIP,
-                                (const_cast<TARGETING::Target*>(l_mb_target)));
-                    uint8_t l_valDQ[4][80];
-                    l_fapirc = FAPI_ATTR_GET(ATTR_VPD_ISDIMMTOC4DQ,
-                                    &l_fapi_mb_target,l_valDQ);
-
-                    if(l_fapirc) break;
-                    TS_TRACE("DQ Attributes ISDIMM Accessor"
-                             "first element=0x%08x",l_valDQ[0][0]);
-                }
-            }
-        }
-        if (l_fapirc)
-        {
-            TS_FAIL("getDQAttrISDIMM: FAPI_ATTR_GET fail rc=0x%x",
-                  static_cast<uint32_t>(l_fapirc));
-            fapiLogError(l_fapirc);
-        }
-        TS_TRACE("testGetDQAttrISDIMM exit");
-    }
-
-    void testGetDQSAttrISDIMM()
-    {
-         fapi::ReturnCode l_fapirc;
-
-         TS_TRACE("DQS Attributes ISDIMM entry");
-
-         TARGETING::TargetHandleList l_memBufList;
-         getAllChips(l_memBufList, TYPE_MEMBUF);
-
-         for(uint8_t l_mbNum = 0; l_mbNum < l_memBufList.size(); l_mbNum++)
-         {
-             TARGETING::TargetHandleList l_mbaList;
-             getChildAffinityTargets(l_mbaList,l_memBufList[l_mbNum],
-                             CLASS_UNIT,TYPE_MBA,false);
-
-             for(uint8_t l_mbaNum = 0; l_mbaNum < l_mbaList.size(); l_mbaNum++)
-             {
-                 //dump physical path to target
-                 EntityPath l_mbaPath;
-                 l_mbaPath = l_mbaList[l_mbaNum]->getAttr<ATTR_PHYS_PATH>();
-                 l_mbaPath.dump();
-
-                 //cast our type of target to a FAPI type of target
-                 fapi::Target l_fapi_mba_target(TARGET_TYPE_MBA_CHIPLET,
-                       (const_cast<TARGETING::Target*>(l_mbaList[l_mbaNum])));
-
-                 uint8_t l_customDimm = 0;
-                 l_fapirc = FAPI_ATTR_GET(ATTR_EFF_CUSTOM_DIMM,
-                                 &l_fapi_mba_target,l_customDimm);
-                 if(l_fapirc)
-                 {
-                     FAPI_ERR("hwpMBvpdAccessorTest: Read of custom dimm failed");
-                     break;
-                 }
-
-                 //if custom_dimm = 0, use isdimm otherwise this test is useless
-                 if(fapi::ENUM_ATTR_EFF_CUSTOM_DIMM_NO == l_customDimm)
-                 {
-
-                     // make a local copy of the memory buffer target
-                     TARGETING::Target* l_mb_target = l_memBufList[l_mbNum];
-
-                     // dump physical path to target
-                     EntityPath l_path;
-                     l_path = l_mb_target->getAttr<ATTR_PHYS_PATH>();
-                     l_path.dump();
-
-                     // cast OUR type of target to a FAPI type of target.
-                     fapi::Target l_fapi_mb_target(
-                              TARGET_TYPE_MEMBUF_CHIP,
-                              (const_cast<TARGETING::Target*>(l_mb_target)));
-
-                     uint8_t l_valDQS[4][20];
-                     l_fapirc = FAPI_ATTR_GET(ATTR_VPD_ISDIMMTOC4DQS,
-                                    &l_fapi_mb_target,l_valDQS);
-
-                     if(l_fapirc) break;
-                     TS_TRACE("DQS Attributes ISDIMM Accessor"
-                              "first element=0x%08x",l_valDQS[0][0]);
-                 }
-             }
-         }
-         if (l_fapirc)
-         {
-             TS_FAIL("getDQSAttrISDIMM: FAPI_ATTR_GET fail rc=0x%x",
-               static_cast<uint32_t>(l_fapirc));
-             fapiLogError(l_fapirc);
-         }
-         TS_TRACE("testGetDQSAttrISDIMM exit");
-
-    }
-
-    void testDQandDQSISDIMMAttrs()
-    {
-
-        TS_TRACE("testDQandDQSISDIMMAttrs entry");
-        //first testing the 0 test case;
-        ecmdDataBufferBase l_data_buffer_DQ1(136); //17 bits, just one DQ
-        ecmdDataBufferBase l_data_buffer_DQS1(16); //2 bits, just one DQS
-        for(int l_index =0;l_index<136; l_index++)
-        {
-            l_data_buffer_DQ1.writeBit(l_index,0);
-            if(l_index<16) l_data_buffer_DQS1.writeBit(l_index,0);
-        }
-        uint8_t l_finalDQArray[80];
-        uint8_t l_finalDQSArray[20];
-
-        decodeISDIMMAttrs(l_data_buffer_DQ1, l_data_buffer_DQS1,
-                        l_finalDQArray, l_finalDQSArray);
-
-        uint8_t l_DQOutput1[80] = {0,1,2,3,4,5,6,7,
-                                8,9,10,11,12,13,14,15,
-                                16,17,18,19,20,21,22,23,
-                                24,25,26,27,28,29,30,31,
-                                32,33,34,35,36,37,38,39,
-                                40,41,42,43,44,45,46,47,
-                                48,49,50,51,52,53,54,55,
-                                56,57,58,59,60,61,62,63,
-                                64,65,66,67,68,69,70,71,
-                                255,255,255,255,255,255,255,255};
-        uint8_t l_DQSOutput1[20] = {0,1,2,3,4,5,6,7,
-                                 8,9,10,11,12,13,14,
-                                 15,16,17,255,255};
-
-
-        for(int l_zeroFinalIndex = 0; l_zeroFinalIndex<80;l_zeroFinalIndex++)
-        {
-            if(l_finalDQArray[l_zeroFinalIndex] !=
-                            l_DQOutput1[l_zeroFinalIndex])
-            {
-                TS_TRACE("testDQandDQSISDIMMAttrs failed, DQ is wrong");
-                break;
-            }
-            if(l_zeroFinalIndex<20 && (l_finalDQSArray[l_zeroFinalIndex] !=
-                                    l_DQSOutput1[l_zeroFinalIndex]))
-            {
-                TS_TRACE("testDQandDQSISDIMMAttrs failed, DQS is wrong");
-                break;
-            }
-            if(l_zeroFinalIndex == 79)
-            {
-                TS_TRACE("testDQandDQSISDIMMAttrs passed the all zero test");
-            }
-        }
-        //and now for actual data
-        uint32_t l_byteOrder = 0b000000001001111111111001;
-        uint32_t l_nibSwap = 0b0000000111110000;
-        uint32_t l_nibToNib1 = 0b00000010101011110000000000000000;
-        uint32_t l_nibToNib2 = 0b00000000000000000000000010101000;
-        uint32_t l_nibToNib3 = 0b00000000000000000000000000000000;
-        uint32_t l_nibSwapDQS = 0b0000000100010000;
-
-        l_data_buffer_DQ1.insertFromRight(l_byteOrder,0,24);
-        l_data_buffer_DQ1.insertFromRight(l_nibSwap,24,16);
-        l_data_buffer_DQ1.insertFromRight(l_nibToNib1,40,32);
-        l_data_buffer_DQ1.insertFromRight(l_nibToNib2,72,32);
-        l_data_buffer_DQ1.insertFromRight(l_nibToNib3,104,32);
-
-        l_data_buffer_DQS1.insertFromRight(l_nibSwapDQS,0,16);
-
-        decodeISDIMMAttrs(l_data_buffer_DQ1, l_data_buffer_DQS1,
-                        l_finalDQArray, l_finalDQSArray);
-
-        uint8_t l_DQOutput2[80] = {15,13,14,12,10,9,11,8,
-                        4,5,6,7,0,1,2,3,
-                        20,21,22,23,16,17,18,19,
-                        68,69,70,71,64,65,66,67,
-                        36,37,38,39,32,33,34,35,
-                        43,41,42,40,44,45,46,47,
-                        48,49,50,51,52,53,54,55,
-                        56,57,58,59,60,61,62,63,
-                        24,25,26,27,28,29,30,31,
-                        255,255,255,255,255,255,255,255};
-        uint8_t l_DQSOutput2[20] = {3,2,0,1,4,5,16,17,
-                         9,8,10,11,12,13,14,15,
-                         6,7,255,255};
-
-        for(int l_finalIndex = 0; l_finalIndex<80;l_finalIndex++)
-        {
-            if(l_finalDQArray[l_finalIndex] != l_DQOutput2[l_finalIndex])
-            {
-                TS_TRACE("testDQandDQSISDIMMAttrs failed, DQ is wrong");
-                break;
-            }
-            if(l_finalIndex<20 && (l_finalDQSArray[l_finalIndex] !=
-                                    l_DQSOutput2[l_finalIndex]))
-            {
-                TS_TRACE("testDQandDQSISDIMMAttrs failed, DQS is wrong");
-                break;
-            }
-            if(l_finalIndex == 79)
-            {
-                TS_TRACE("testDQandDQSISDIMMAttrs passed the actual data test");
-            }
-        }
-        TS_TRACE("testDQandDQSISDIMMAttrs exit");
-
-    }
-
-    /**
-     * @brief call getControlCapableData to ensure that it's getting the MR
-     *        keyword correctly, and getting the right data
-     *
-     */
-    void testGetControlCapableData()
-    {
-        fapi::ReturnCode l_fapirc;
-
-        TS_TRACE( "getControlCapableData entry" );
-
-        TARGETING::TargetHandleList l_memBufList;
-        getAllChips(l_memBufList, TYPE_MEMBUF);
-
-#if HWPMBVPDACCESSORTEST_UT0
-        uint8_t l_mbNum = 0; //check them all in unit test
-#else
-        uint8_t l_mbNum = (l_memBufList.size() > 0) ? l_memBufList.size()-1 : 0;
-#endif
-        for (; l_mbNum < l_memBufList.size(); l_mbNum++ )
-        {
-            //  make a local copy of the memory buffer target
-            TARGETING::Target*  l_mb_target = l_memBufList[l_mbNum];
-
-            //  dump physical path to target
-            EntityPath l_path;
-            l_path  =   l_mb_target->getAttr<ATTR_PHYS_PATH>();
-            l_path.dump();
-
-            // cast OUR type of target to a FAPI type of target.
-            fapi::Target l_fapi_mb_target(
-                                          TARGET_TYPE_MEMBUF_CHIP,
-                   (const_cast<TARGETING::Target*>(l_mb_target)) );
-
-        }
-        if (l_fapirc)
-        {
-            TS_FAIL( "getControlCapableData: FAPI_ATTR_GET fail rc=0x%x",
-                  static_cast<uint32_t>(l_fapirc) );
-            fapiLogError(l_fapirc);
-        }
-
-        TS_TRACE( "testGetControlCapableData exit" );
-
-    }
-
-    /**
-     * @brief call getRCDCntlWord015 to ensure that it's getting the MR
-     *        keyword correctly, and getting the right data
-     *
-     */
-    void testGetRCDCntlWord015()
-    {
-        FAPI_IMP( "testGetRCDCntlWord015 entry" );
-        fapi::ReturnCode l_fapirc;
-
-        TARGETING::TargetHandleList l_memBufList;
-        getAllChips(l_memBufList, TYPE_MEMBUF);
-
-#if HWPMBVPDACCESSORTEST_UT0
-        uint8_t l_mbNum = 0; //check them all in unit test
-#else
-        uint8_t l_mbNum = (l_memBufList.size() > 0) ? l_memBufList.size()-1 : 0;
-#endif
-        for(; l_mbNum < l_memBufList.size(); l_mbNum++)
-        {
-            TARGETING::TargetHandleList l_mbaList;
-            getChildAffinityTargets(l_mbaList,l_memBufList[l_mbNum],
-                                    CLASS_UNIT,TYPE_MBA,false);
-
-            for ( uint8_t l_mbaNum=0; l_mbaNum < l_mbaList.size(); l_mbaNum++ )
-            {
-                TARGETING::TargetHandleList l_dimmList;
-                getChildAffinityTargets(l_dimmList,l_mbaList[l_mbaNum],
-                               CLASS_LOGICAL_CARD,TYPE_DIMM,false);
-
-                for ( uint8_t l_dimmNum=0; l_dimmNum < l_dimmList.size(); l_dimmNum++ )
-                {
-                    // make a local copy of the dimm target
-                    TARGETING::Target* l_dimm_target = l_dimmList[l_dimmNum];
-
-                    //cast our type of target to a fapi target
-                    fapi::Target l_fapi_dimm_target( TARGET_TYPE_DIMM,
-                          (const_cast<TARGETING::Target*>(l_dimm_target)));
-
-                    //Get FAPI ATTR
-                    uint64_t l_val = 0;
-                    l_fapirc = FAPI_ATTR_GET(ATTR_VPD_DIMM_RCD_CNTL_WORD_0_15,
-                             (const_cast<fapi::Target*>(&l_fapi_dimm_target)),l_val);
-
-                    if (l_fapirc)
-                    {
-                        TS_FAIL( "testGetRCDCntlWord015: FAPI_ATTR_GET fail rc=0x%x",
-                            static_cast<uint32_t>(l_fapirc) );
-                        fapiLogError(l_fapirc);
-                    }
-                    FAPI_IMP("testGetRCDCntlWord015: attr value: 0x%X", l_val);
-                }
-            }
-        }
-        FAPI_IMP( "testGetRCDCntlWord015 exit" );
-    }
-    /**
-     * @brief call getMBvpdSlopeInterceptData to fetch power slope and intercept
-     *        attributes from the MW and MV keywords
-     *
-     */
-    void    testGetSlopeInterceptData()
-    {
-        fapi::ReturnCode    l_fapirc;
-        getMBvpdSlopeInterceptData_FP_t (l_getMBvpdSlopeInterceptData)
-                              = &getMBvpdSlopeInterceptData;
-        uint32_t l_val = 0xFFFFFFFF;
-
-        TS_TRACE( "testGetSlopeInterceptData entry" );
-
-        TARGETING::TargetHandleList l_memBufList;
-        getAllChips(l_memBufList, TYPE_MEMBUF);
-
-        TS_TRACE( "testGetSlopeInterceptData l_memBufList.size()=%d",
-                                      l_memBufList.size() );
-        // loop thru memory buffers
-#if HWPMBVPDACCESSORTEST_UT0
-        uint8_t l_mbNum = 0;    // check them all in unit test
-#else
-        uint8_t l_mbNum = (l_memBufList.size() > 0) ? l_memBufList.size()-1 : 0;
-#endif
-        for (; l_mbNum < l_memBufList.size(); l_mbNum++ )
-        {
-            //  make a local copy of the memory buffer target
-            TARGETING::Target*  l_mb_target = l_memBufList[l_mbNum];
-
-            //  dump physical path to target
-            EntityPath l_path;
-            l_path  =   l_mb_target->getAttr<ATTR_PHYS_PATH>();
-            l_path.dump();
-
-            // cast OUR type of target to a FAPI type of target.
-            fapi::Target l_fapi_mb_target(
-                                          TARGET_TYPE_MEMBUF_CHIP,
-                   (const_cast<TARGETING::Target*>(l_mb_target)) );
-
-            // MASTER_POWER_SLOPE
-            l_fapirc = (*l_getMBvpdSlopeInterceptData)(l_fapi_mb_target,
-                fapi::MASTER_POWER_SLOPE, l_val);
-            if (l_fapirc) break;
-                TS_TRACE( "testSlopeInterceptData accessor "
-                "MASTER_POWER_SLOPE=0x%08x", l_val);
-#if HWPMBVPDACCESSORTEST_UT2
-
-            // MASTER_POWER_INTERCEPT
-            l_fapirc = (*l_getMBvpdSlopeInterceptData)(l_fapi_mb_target,
-                fapi::MASTER_POWER_INTERCEPT, l_val);
-            if (l_fapirc) break;
-                TS_TRACE( "testSlopeInterceptData accessor "
-                "MASTER_POWER_INTERCEPT=0x%08x", l_val);
-
-            // SUPPLIER_POWER_SLOPE
-            l_fapirc = (*l_getMBvpdSlopeInterceptData)(l_fapi_mb_target,
-                fapi::SUPPLIER_POWER_SLOPE, l_val);
-            if (l_fapirc) break;
-                TS_TRACE( "testSlopeInterceptData accessor "
-                "SUPPLIER_POWER_SLOPE=0x%08x", l_val);
-#endif
-            // SUPPLIER_POWER_INTERCEPT
-            l_fapirc = (*l_getMBvpdSlopeInterceptData)(l_fapi_mb_target,
-                fapi::SUPPLIER_POWER_INTERCEPT, l_val);
-            if (l_fapirc) break;
-                TS_TRACE( "testSlopeInterceptData accessor "
-                "SUPPLIER_POWER_INTERCEPT=0x%08x", l_val);
-
-            // MASTER_POWER_SLOPE
-            l_fapirc = FAPI_ATTR_GET(ATTR_CDIMM_VPD_MASTER_POWER_SLOPE,
-                &l_fapi_mb_target, l_val);
-            if (l_fapirc) break;
-            TS_TRACE( "testSlopeInterceptData attr "
-                "MASTER_POWER_SLOPE=0x%08x", l_val);
-#if HWPMBVPDACCESSORTEST_UT2
-            // MASTER_POWER_INTERCEPT
-            l_fapirc = FAPI_ATTR_GET(ATTR_CDIMM_VPD_MASTER_POWER_INTERCEPT,
-                &l_fapi_mb_target, l_val);
-            if (l_fapirc) break;
-            TS_TRACE( "testSlopeInterceptData attr "
-                "MASTER_POWER_INTERCEPT=0x%08x", l_val);
-
-            // SUPPLIER_POWER_SLOPE
-            l_fapirc = FAPI_ATTR_GET(ATTR_CDIMM_VPD_SUPPLIER_POWER_SLOPE,
-                &l_fapi_mb_target, l_val);
-            if (l_fapirc) break;
-            TS_TRACE( "testSlopeInterceptData attr "
-                "SUPPLIER_POWER_SLOPE=0x%08x", l_val);
-
-#endif
-            // SUPPLIER_POWER_INTERCEPT
-            l_fapirc = FAPI_ATTR_GET(ATTR_CDIMM_VPD_SUPPLIER_POWER_INTERCEPT,
-                &l_fapi_mb_target, l_val);
-            if (l_fapirc) break;
-            TS_TRACE( "testSlopeInterceptData attr "
-                "SUPPLIER_POWER_INTERCEPT=0x%08x", l_val);
-        }
-
-        if (l_fapirc)
-        {
-           TS_FAIL( "fapiGetSlopeInterceptData: FAPI_ATTR_GET fail rc=0x%x",
-                 static_cast<uint32_t>(l_fapirc) );
-           fapiLogError(l_fapirc);
-        }
-
-        TS_TRACE( "testGetSlopeInterceptData exit" );
-
-    }
-
-    /**
-     * @brief call accessMBvpdL4BankDelete to fetch VSPD keyword MX
-     *
-     */
-    void    testL4BankDelete()
-    {
-        fapi::ReturnCode    l_fapirc( fapi::FAPI_RC_SUCCESS );
-#if HWPMBVPDACCESSORTEST_UT3
-        accessMBvpdL4BankDelete_FP_t (l_accessMBvpdL4BankDelete)
-                              = &accessMBvpdL4BankDelete;
-#endif
-
-        TS_TRACE( "testL4BankDelete entry" );
-
-        TARGETING::TargetHandleList l_memBufList;
-        getAllChips(l_memBufList, TYPE_MEMBUF);
-
-        TS_TRACE( "testL4BankDelete l_memBufList.size()=%d",
-                                      l_memBufList.size() );
-        // loop thru memory buffers
-#if HWPMBVPDACCESSORTEST_UT0
-        uint8_t l_mbNum = 0;    // check them all in unit test
-#else
-        uint8_t l_mbNum = (l_memBufList.size() > 0) ? l_memBufList.size()-1 : 0;
-#endif
-        for (; l_mbNum < l_memBufList.size(); l_mbNum++ )
-        {
-            //  make a local copy of the memory buffer target
-            TARGETING::Target*  l_mb_target = l_memBufList[l_mbNum];
-
-            // cast OUR type of target to a FAPI type of target.
-            fapi::Target l_fapi_mb_target( TARGET_TYPE_MEMBUF_CHIP,
-                   (const_cast<TARGETING::Target*>(l_mb_target)) );
-
-            // verify HWP accessor
-            uint32_t l_val = 0xffffffff;
-
-#if HWPMBVPDACCESSORTEST_UT3
-            // Get
-            l_fapirc=(*l_accessMBvpdL4BankDelete)(l_fapi_mb_target,
-                         l_val,
-                         GET_L4_BANK_DELETE_MODE);
-            if (l_fapirc)
-            {
-               TS_FAIL( "fapiGetVersion: HWP accessor get fail rc=0x%x",
-                     static_cast<uint32_t>(l_fapirc) );
-               fapiLogError(l_fapirc);
-            }
-            else
-            {
-                TS_TRACE( "testL4BankDelete accessor get 0x%08x",l_val);
-            }
-            // Set (use same value)
-            l_fapirc=(*l_accessMBvpdL4BankDelete)(l_fapi_mb_target,
-                     l_val,
-                     SET_L4_BANK_DELETE_MODE);
-            if (l_fapirc)
-            {
-               TS_FAIL( "fapiL4BankDelete accessor set fail rc=0x%x",
-                     static_cast<uint32_t>(l_fapirc) );
-               fapiLogError(l_fapirc);
-            }
-#endif
-            // verify attribute
-            l_val = 0xffffffff;
-            // Get
-            l_fapirc = FAPI_ATTR_GET(ATTR_L4_BANK_DELETE_VPD,
-                       &l_fapi_mb_target,
-                       l_val);
-            if (l_fapirc)
-            {
-               TS_FAIL( "fapiL4BankDelete: HWP attribute get fail rc=0x%x",
-                         static_cast<uint32_t>(l_fapirc) );
-               fapiLogError(l_fapirc);
-            }
-            else
-            {
-                TS_TRACE( "testL4BankDelete attribute get 0x%08x",l_val);
-            }
-#if HWPMBVPDACCESSORTEST_UT3
-            // Set (use same value)
-            l_fapirc = FAPI_ATTR_SET(ATTR_L4_BANK_DELETE_VPD,
-                       &l_fapi_mb_target,
-                       l_val);
-            if (l_fapirc)
-            {
-               TS_FAIL( "fapiL4BankDelete: HWP attribute set fail rc=0x%x",
-                     static_cast<uint32_t>(l_fapirc) );
-               fapiLogError(l_fapirc);
-            }
-#endif
-        }
-
-        TS_TRACE( "testL4BankDelete exit" );
-     }
-
-/**
-     * @brief call getMBvpdSensorMap to fetch sensor map
-     *        attributes from the MW keyword
-     *
-     */
-    void    testGetSensorMap()
-    {
-        fapi::ReturnCode    l_fapirc;
-        uint8_t l_val = 0xFF;
-
-        TS_TRACE( "testGetSensorMap entry" );
-
-        TARGETING::TargetHandleList l_memBufList;
-        getAllChips(l_memBufList, TYPE_MEMBUF);
-
-        TS_TRACE( "testGetSensorMap l_memBufList.size()=%d",
-                                      l_memBufList.size() );
-        // loop thru memory buffers
-#if HWPMBVPDACCESSORTEST_UT0
-        uint8_t l_mbNum = 0;    // check them all in unit test
-#else
-        uint8_t l_mbNum = (l_memBufList.size() > 0) ? l_memBufList.size()-1 : 0;
-#endif
-        for (; l_mbNum < l_memBufList.size(); l_mbNum++ )
-        {
-            //  make a local copy of the memory buffer target
-            TARGETING::Target*  l_mb_target = l_memBufList[l_mbNum];
-
-            //  dump physical path to target
-            EntityPath l_path;
-            l_path  =   l_mb_target->getAttr<ATTR_PHYS_PATH>();
-            l_path.dump();
-
-            // cast OUR type of target to a FAPI type of target.
-            fapi::Target l_fapi_mb_target(
-                                          TARGET_TYPE_MEMBUF_CHIP,
-                   (const_cast<TARGETING::Target*>(l_mb_target)) );
-
-#if HWPMBVPDACCESSORTEST_UT7
-            // test accessor directly
-            getMBvpdSensorMap_FP_t (l_getMBvpdSensorMap) = &getMBvpdSensorMap;
-
-            // Primary Sensor Map
-            l_fapirc = (*l_getMBvpdSensorMap)(l_fapi_mb_target,
-                fapi::SENSOR_MAP_PRIMARY, l_val);
-            if (l_fapirc) break;
-                TS_TRACE( "testSensorMap accessor "
-                "SENSOR_MAP_PRIMARY=0x%02x", l_val);
-
-            // Secondary Sensor Map
-            l_fapirc = (*l_getMBvpdSensorMap)(l_fapi_mb_target,
-                fapi::SENSOR_MAP_SECONDARY, l_val);
-            if (l_fapirc) break;
-                TS_TRACE( "testSensorMap accessor "
-                "SENSOR_MAP_SECONDARY=0x%02x", l_val);
-
-            // test attribute
-            // Primary Sensor Map
-            l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CDIMM_SENSOR_MAP_PRIMARY,
-                &l_fapi_mb_target, l_val);
-            if (l_fapirc) break;
-                TS_TRACE( "testSensorMap attr "
-                "SENSOR_MAP_PRIMARY=0x%02x", l_val);
-#endif
-
-            // Secondary Sensor Map
-            l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CDIMM_SENSOR_MAP_SECONDARY,
-                &l_fapi_mb_target, l_val);
-            if (l_fapirc) break;
-                TS_TRACE( "testSensorMap attr "
-                "SENSOR_MAP_SECONDARY=0x%02x", l_val);
-        }
-
-        if (l_fapirc)
-        {
-           TS_FAIL( "fapiGetSensorMap: FAPI_ATTR_GET fail rc=0x%x",
-                 static_cast<uint32_t>(l_fapirc) );
-           fapiLogError(l_fapirc);
-        }
-
-        TS_TRACE( "testGetSensorMap exit" );
-
-    }
-
-    /**
-     * @brief call getMBvpdVersion to fetch vpd version
-     *
-     */
-    void    testGetVersion()
-    {
-        fapi::ReturnCode    l_fapirc;
-        getMBvpdVersion_FP_t (l_getMBvpdVersion)
-                              = &getMBvpdVersion;
-
-        TS_TRACE( "testGetVersion entry" );
-
-        TARGETING::TargetHandleList l_memBufList;
-        getAllChips(l_memBufList, TYPE_MEMBUF);
-
-        TS_TRACE( "testGetVersion l_memBufList.size()=%d",
-                                      l_memBufList.size() );
-        // loop thru memory buffers
-#if HWPMBVPDACCESSORTEST_UT0
-        uint8_t l_mbNum = 0;    // check them all in unit test
-#else
-        uint8_t l_mbNum = (l_memBufList.size() > 0) ? l_memBufList.size()-1 : 0;
-#endif
-        for (; l_mbNum < l_memBufList.size(); l_mbNum++ )
-        {
-            TARGETING::TargetHandleList l_mbaList;
-            getChildAffinityTargets(l_mbaList,l_memBufList[l_mbNum],
-                            CLASS_UNIT,TYPE_MBA,false);
-
-            TS_TRACE( "testGetVersion l_mbaBufList.size()=%d",
-                    l_mbaList.size());
-
-            // loop thru all the mbas (should be 2)
-#if HWPMBVPDACCESSORTEST_UT0
-            uint8_t l_mbaNum = 0;  // check them all in unit test
-#else
-            uint8_t l_mbaNum = (l_mbaList.size() > 0) ? l_mbaList.size()-1:0 ;
-#endif
-            for (; l_mbaNum < l_mbaList.size(); l_mbaNum++ )
-            {
-                TARGETING::TargetHandleList l_dimmList;
-
-                getChildAffinityTargets(l_dimmList,l_mbaList[l_mbaNum],
-                            CLASS_LOGICAL_CARD,TYPE_DIMM,false);
-                TS_TRACE( "testGetVersion l_dimmList.size()=%d",
-                    l_dimmList.size());
-
-                // cast OUR type of target to a FAPI type of target.
-                fapi::Target l_fapi_mba_target( TARGET_TYPE_MBA_CHIPLET,
-                      (const_cast<TARGETING::Target*>(l_mbaList[l_mbaNum])));
-
-                // verify HWP accessor
-                uint32_t l_val = 0xffffffff;
-
-                l_fapirc = (*l_getMBvpdVersion)(l_fapi_mba_target,l_val);
-                if (l_fapirc)
-                {
-                   TS_FAIL( "fapiGetVersion: HWP accessor fail rc=0x%x",
-                         static_cast<uint32_t>(l_fapirc) );
-                   fapiLogError(l_fapirc);
-                }
-                else
-                {
-                    TS_TRACE( "testGetVersion accessor 0x%08x",l_val);
-                }
-
-                // loop thru all the DIMMs (should be 4)
-#if HWPMBVPDACCESSORTEST_UT0
-                uint8_t l_dimmNum = 0;  // check them all in unit test
-#else
-                uint8_t l_dimmNum =
-                             (l_dimmList.size() > 0) ? l_dimmList.size()-1:0 ;
-#endif
-                for (; l_dimmNum < l_dimmList.size(); l_dimmNum++ )
-                {
-                    //  dump physical path to target
-                    EntityPath l_path;
-                    l_path = l_dimmList[l_dimmNum]->getAttr<ATTR_PHYS_PATH>();
-                    l_path.dump();
-
-                    // cast OUR type of target to a FAPI type of target.
-                    fapi::Target l_fapi_dimm_target(
-                                          TARGET_TYPE_DIMM,
-                      (const_cast<TARGETING::Target*>(l_dimmList[l_dimmNum])));
-
-                    // verify getting all attributes
-                    l_fapirc = FAPI_ATTR_GET(ATTR_VPD_VERSION,
-                           &l_fapi_dimm_target,
-                           l_val);
-                    TS_TRACE( "testGetVersion attribute %d 0x%08x",
-                                   l_dimmNum,l_val);
-                }
-                if (l_fapirc)
-                {
-                   TS_FAIL( "fapiGetVersion: FAPI_ATTR_GET fail rc=0x%x",
-                         static_cast<uint32_t>(l_fapirc) );
-                   fapiLogError(l_fapirc);
-                }
-            }
-        }
-
-        TS_TRACE( "testGetVersion exit" );
-
-    }
-
-    /**
-     * @brief call getMBvpdDram2NModeEnabled to retrieve 2N mode
-     *
-     */
-    void    testGetDram2NModeEnabled()
-    {
-        fapi::ReturnCode    l_fapirc;
-        getMBvpdDram2NModeEnabled_FP_t (l_getMBvpdDram2NModeEnabled)
-                              = &getMBvpdDram2NModeEnabled;
-
-        TS_TRACE( "testGetDram2NModeEnabled entry" );
-
-        TARGETING::TargetHandleList l_memBufList;
-        getAllChips(l_memBufList, TYPE_MEMBUF);
-
-        TS_TRACE( "testGetDram2NModeEnabled l_memBufList.size()=%d",
-                                      l_memBufList.size() );
-        // loop thru memory buffers
-#if HWPMBVPDACCESSORTEST_UT0
-        uint8_t l_mbNum = 0;    // check them all in unit test
-#else
-        uint8_t l_mbNum = (l_memBufList.size() > 0) ? l_memBufList.size()-1 : 0;
-#endif
-        for (; l_mbNum < l_memBufList.size(); l_mbNum++ )
-        {
-            TARGETING::TargetHandleList l_mbaList;
-            getChildAffinityTargets(l_mbaList,l_memBufList[l_mbNum],
-                            CLASS_UNIT,TYPE_MBA,false);
-
-            TS_TRACE( "testGetDram2NModeEnabled l_mbaBufList.size()=%d",
-                    l_mbaList.size());
-
-            // loop thru all the mbas (should be 2)
-#if HWPMBVPDACCESSORTEST_UT0
-            uint8_t l_mbaNum = 0;  // check them all in unit test
-#else
-            uint8_t l_mbaNum = (l_mbaList.size() > 0) ? l_mbaList.size()-1:0 ;
-#endif
-            for (; l_mbaNum < l_mbaList.size(); l_mbaNum++ )
-            {
-                // cast OUR type of target to a FAPI type of target.
-                fapi::Target l_fapi_mba_target( TARGET_TYPE_MBA_CHIPLET,
-                      (const_cast<TARGETING::Target*>(l_mbaList[l_mbaNum])));
-
-                // verify HWP accessor
-                uint8_t l_val = 0xFF;
-
-                l_fapirc = (*l_getMBvpdDram2NModeEnabled)
-                                     (l_fapi_mba_target,l_val);
-                if (l_fapirc)
-                {
-                   TS_FAIL("fapiGetDram2NModeEnabled:HWP accessor fail rc=0x%x",
-                         static_cast<uint32_t>(l_fapirc) );
-                   fapiLogError(l_fapirc);
-                }
-                else
-                {
-                    TS_TRACE("testGetDram2NModeEnabled accessor 0x%02x",
-                           l_val);
-                }
-                // verify attribute
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_DRAM_2N_MODE_ENABLED,
-                           &l_fapi_mba_target,
-                           l_val);
-                if (l_fapirc)
-                {
-                   TS_FAIL("fapiGetDram2NModeEnabled:"
-                         " FAPI_ATTR_GET fail rc=0x%x",
-                         static_cast<uint32_t>(l_fapirc) );
-                   fapiLogError(l_fapirc);
-                }
-                else
-                {
-                    TS_TRACE( "testGetDram2NModeEnabled attribute 0x%02x",
-                           l_val);
-                }
-            }
-        }
-
-        TS_TRACE( "testGetDram2NModeEnabled exit" );
-
-    }
-
-
-    /**
-     * @brief call getMBvpdAddrMirrorData to fetch memory buffer AM attributes
-     *
-     */
-    void    testGetAddrMirrorData()
-    {
-        fapi::ReturnCode    l_fapirc;
-        getMBvpdAddrMirrorData_FP_t (l_getMBvpdAddrMirrorData)
-                              = &getMBvpdAddrMirrorData;
-
-        TS_TRACE( "testGetAddrMirrorData entry" );
-
-        TARGETING::TargetHandleList l_memBufList;
-        getAllChips(l_memBufList, TYPE_MEMBUF);
-
-        TS_TRACE( "testGetAddrMirrorData l_memBufList.size()=%d",
-                                      l_memBufList.size() );
-        // loop thru memory buffers
-#if HWPMBVPDACCESSORTEST_UT0
-        uint8_t l_mbNum = 0;    // check them all in unit test
-#else
-        uint8_t l_mbNum = (l_memBufList.size() > 0) ? l_memBufList.size()-1 : 0;
-#endif
-        for (; l_mbNum < l_memBufList.size(); l_mbNum++ )
-        {
-            TARGETING::TargetHandleList l_mbaList;
-            getChildAffinityTargets(l_mbaList,l_memBufList[l_mbNum],
-                            CLASS_UNIT,TYPE_MBA,false);
-
-            TS_TRACE( "testGetAddrMirrorData l_mbaBufList.size()=%d",
-                    l_mbaList.size());
-
-            // loop thru all the mbas (should be 2)
-#if HWPMBVPDACCESSORTEST_UT0
-            uint8_t l_mbaNum = 0;  // check them all in unit test
-#else
-            uint8_t l_mbaNum = (l_mbaList.size() > 0) ? l_mbaList.size()-1:0 ;
-#endif
-            for (; l_mbaNum < l_mbaList.size(); l_mbaNum++ )
-            {
-                // cast OUR type of target to a FAPI type of target.
-                fapi::Target l_fapi_mba_target( TARGET_TYPE_MBA_CHIPLET,
-                      (const_cast<TARGETING::Target*>(l_mbaList[l_mbaNum])));
-
-                // verify HWP accessor
-                uint8_t l_val[2][2] = {{0xFF,0xFF},{0xFF,0xFF}};
-
-                l_fapirc = (*l_getMBvpdAddrMirrorData)(l_fapi_mba_target,l_val);
-                if (l_fapirc)
-                {
-                   TS_FAIL( "fapiGetAddrMirrorData: HWP accessor fail rc=0x%x",
-                         static_cast<uint32_t>(l_fapirc) );
-                   fapiLogError(l_fapirc);
-                }
-                else
-                {
-                    TS_TRACE( "testGetAddrMirrorData accessor "
-                           "(0x%02x,0x%02x),(0x%02x,0x%02x)",
-                           l_val[0][0], l_val[0][1], l_val[1][0], l_val[1][1]);
-                }
-
-                // verify attribute
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_DRAM_ADDRESS_MIRRORING,
-                           &l_fapi_mba_target,
-                           l_val);
-                if (l_fapirc)
-                {
-                   TS_FAIL( "fapiGetAddrMirrorData: FAPI_ATTR_GET fail rc=0x%x",
-                         static_cast<uint32_t>(l_fapirc) );
-                   fapiLogError(l_fapirc);
-                }
-                else
-                {
-                    TS_TRACE( "testGetAddrMirrorData attribute "
-                           "(0x%02x,0x%02x),(0x%02x,0x%02x)",
-                           l_val[0][0], l_val[0][1], l_val[1][0], l_val[1][1]);
-                }
-            }
-        }
-
-        TS_TRACE( "testGetAddrMirrorData exit" );
-
-    }
-
-    /**
-     * @brief call getMBvpdAttr to fetch memory buffer MT attributes
-     *
-     */
-    void    testGetTermData()
-    {
-        fapi::ReturnCode    l_fapirc;
-        uint8_t val1[2][2] = {{0xFF,0xFF},{0xFF,0xFF}};
-        uint32_t val3[2] = {0xFFFFFFFF,0xFFFFFFFF};
-        uint32_t val7[2][2] = {{0xFFFFFFFF,0xFFFFFFFF},
-                              {0xFFFFFFFF,0xFFFFFFFF}};
-#if HWPMBVPDACCESSORTEST_UT4
-        uint8_t val2[2][2][4]={
-                              {{0xFF,0xFF,0xFF,0xFF},{0xFF,0xFF,0xFF,0xFF}},
-                              {{0xFF,0xFF,0xFF,0xFF},{0xFF,0xFF,0xFF,0xFF}}};
-        uint8_t l_errorChk = 1; //do error checks just once
-        uint8_t  val4[2] = {0xFF,0xFF};
-        uint8_t  val5[2] = {0xFF,0xFF};
-#endif
-        uint64_t val6    = 0xFFFFFFFFFFFFFFFF;
-
-#if HWPMBVPDACCESSORTEST_UT4
-        getMBvpdAttr_FP_t (l_getMBvpdAttr)
-                              = &getMBvpdAttr;
-#endif
-        TS_TRACE( "testGetTermData entry" );
-
-        // ensure attributes are in proper version order
-        for (uint32_t i=0;
-                   i < fapi::getAttrData::g_MBVPD_ATTR_DEF_array_size; i++)
-        {
-            fapi::AttributeId l_attrId  =
-                   fapi::getAttrData::g_MBVPD_ATTR_DEF_array[i].iv_attrId;
-            fapi::getAttrData::DimmType l_dimmType =
-                   fapi::getAttrData::g_MBVPD_ATTR_DEF_array[i].iv_dimmType;
-            fapi::getAttrData::VpdVersion l_version =
-                   fapi::getAttrData::g_MBVPD_ATTR_DEF_array[i].iv_version;
-            // from this piont to the end of the table, for this attribute
-            // dimm type and version type (VZ or VD),
-            // the version should be less in value.
-            // Otherwise, an intended match will not be found
-            fapi::getAttrData::VpdVersion l_verType =
-                      (fapi::getAttrData::VpdVersion)
-                          (l_version & fapi::getAttrData::ALL_VER);
-            l_version = (fapi::getAttrData::VpdVersion)
-                          (l_version & fapi::getAttrData::VER_MASK);
-
-            for (uint32_t j=i+1;
-                   j < fapi::getAttrData::g_MBVPD_ATTR_DEF_array_size; j++)
-            {
-                if ( (l_attrId ==
-                  fapi::getAttrData::g_MBVPD_ATTR_DEF_array[j].iv_attrId) &&
-                     (l_verType &
-                fapi::getAttrData::g_MBVPD_ATTR_DEF_array[j].iv_version &
-                                              fapi::getAttrData::ALL_VER) &&
-                     ((l_dimmType ==
-                fapi::getAttrData::g_MBVPD_ATTR_DEF_array[j].iv_dimmType) ||
-                     ( fapi::getAttrData::ALL_DIMM ==
-                fapi::getAttrData::g_MBVPD_ATTR_DEF_array[j].iv_dimmType)) &&
-                     (l_version   <
-                (fapi::getAttrData::g_MBVPD_ATTR_DEF_array[j].iv_version &
-                                             fapi::getAttrData::VER_MASK)))
-                {
-                    TS_FAIL( "testGetTermData table error: "
-                      " attr 0x%08x dimm %d row %d version 0x%04x <"
-                      " row %d version 0x%04x",
-                      l_attrId,l_dimmType,i,l_version,
-                      j,
-                  (fapi::getAttrData::g_MBVPD_ATTR_DEF_array[j].iv_version &
-                        fapi::getAttrData::VER_MASK));
-                }
-            }
-        }
-
-        TARGETING::TargetHandleList l_memBufList;
-        getAllChips(l_memBufList, TYPE_MEMBUF);
-
-        TS_TRACE( "testGetTermData l_memBufList.size()=%ld",
-                                      l_memBufList.size() );
-
-        // loop thru memory buffers
-#if HWPMBVPDACCESSORTEST_UT0
-        uint8_t l_mbNum = 0;    // check them all in unit test
-#else
-        uint8_t l_mbNum = (l_memBufList.size() > 0) ? l_memBufList.size()-1 : 0;
-#endif
-        for (; l_mbNum < l_memBufList.size(); l_mbNum++ )
-        {
-            TARGETING::TargetHandleList l_mbaList;
-            getChildAffinityTargets(l_mbaList,l_memBufList[l_mbNum],
-                            CLASS_UNIT,TYPE_MBA,false);
-
-            TS_TRACE( "testGetTermData l_mbaBufList.size()=%ld",
-                    l_mbaList.size());
-
-            // loop thru all the mbas (should be 2)
-#if HWPMBVPDACCESSORTEST_UT0
-            uint8_t l_mbaNum = 0;  // check them all in unit test
-#else
-            uint8_t l_mbaNum = (l_mbaList.size() > 0) ? l_mbaList.size()-1:0 ;
-#endif
-            for (; l_mbaNum < l_mbaList.size(); l_mbaNum++ )
-            {
-                //  dump physical path to target
-                EntityPath l_path;
-                l_path  =   l_mbaList[l_mbaNum]->getAttr<ATTR_PHYS_PATH>();
-                l_path.dump();
-
-                // cast OUR type of target to a FAPI type of target.
-                fapi::Target l_fapi_mba_target(
-                                          TARGET_TYPE_MBA_CHIPLET,
-                   (const_cast<TARGETING::Target*>(l_mbaList[l_mbaNum])) );
-
-#if HWPMBVPDACCESSORTEST_UT4
-            // check for interface errors being caught. Just once.
-            if (l_errorChk) {
-               // check size matches type for each of the 4 types
-               l_fapirc = (*l_getMBvpdAttr)(l_fapi_mba_target,
-                           fapi::ATTR_VPD_DRAM_RON,
-                           &val1, sizeof(val1)+1); //invalid size
-               if (l_fapirc != fapi::RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE)
-               {
-                  TS_FAIL("testGetTermData: expect invalid size RC"
-                         " for output type UINT8_BY2_BY2_t:"
-                         " 0x%08x,0x%08x",
-                         fapi::RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE,
-                         static_cast<uint32_t>(l_fapirc));
-               }
-               l_fapirc = (*l_getMBvpdAttr)(l_fapi_mba_target,
-                           fapi::ATTR_VPD_DRAM_RTT_NOM,
-                           &val2, sizeof(val2)-1); //invalid size
-               if (l_fapirc != fapi::RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE)
-               {
-                  TS_FAIL("testGetTermData: expect invalid size RC"
-                         " for output type UINT8_BY2_BY2_BY4_t:"
-                         " 0x%08x,0x%08x",
-                         fapi::RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE,
-                         static_cast<uint32_t>(l_fapirc));
-               }
-               l_fapirc = (*l_getMBvpdAttr)(l_fapi_mba_target,
-                           fapi::ATTR_VPD_CEN_RD_VREF,
-                           &val3, sizeof(val3)+2); //invalid size
-               if (l_fapirc != fapi::RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE)
-               {
-                  TS_FAIL("testGetTermData: expect invalid size RC"
-                         " for output type UINT32_BY2_t:"
-                         " 0x%08x,0x%08x",
-                         fapi::RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE,
-                         static_cast<uint32_t>(l_fapirc));
-               }
-               l_fapirc = (*l_getMBvpdAttr)(l_fapi_mba_target,
-                           fapi::ATTR_VPD_DRAM_WRDDR4_VREF,
-                           &val4, 0); //invalid size
-               if (l_fapirc != fapi::RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE)
-               {
-                  TS_FAIL("testGetTermData: expect invalid size RC"
-                         " for output type UINT8_BY2_t:"
-                         " 0x%08x,0x%08x",
-                         fapi::RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE,
-                         static_cast<uint32_t>(l_fapirc));
-               }
-               // check for catching an invalid ID
-               l_fapirc = (*l_getMBvpdAttr)(l_fapi_mba_target,
-                           (fapi::AttributeId)99, //invalid ID
-                           &val1, sizeof(val1));
-               if (l_fapirc != fapi::RC_MBVPD_ATTRIBUTE_NOT_FOUND)
-               {
-                  TS_FAIL("testGetTermData: expect invalid ID:"
-                         " 0x%08x,0x%08x",
-                         fapi::RC_MBVPD_ATTRIBUTE_NOT_FOUND,
-                         static_cast<uint32_t>(l_fapirc));
-               }
-               l_errorChk =0;
-           }
-#endif
-           // Verify fetching attributes using FAPI_ATTR_GET
-           // TERM_DATA_DRAM_RON
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_DRAM_RON,
-                   &l_fapi_mba_target, val1);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_DRAM_RON=(0x%02x,0x%02x),(0x%02x,0x%02x)",
-                   val1[0][0], val1[0][1], val1[1][0], val1[1][1]);
-
-#if HWPMBVPDACCESSORTEST_UT4
-           // TERM_DATA_DRAM_RTT_NOM
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_DRAM_RTT_NOM,
-                   &l_fapi_mba_target, val2);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_DRAM_RTT_NOM");
-               TS_TRACE("testGetTermData[0][0]=0x%02x,0x%02x,0x%02x,0x%02x",
-                   val2[0][0][0], val2[0][0][1], val2[0][0][2], val2[0][0][3]);
-               TS_TRACE("testGetTermData[0][1]=0x%02x,0x%02x,0x%02x,0x%02x",
-                   val2[0][1][0], val2[0][1][1], val2[0][1][2], val2[0][1][3]);
-               TS_TRACE("testGetTermData[1][0]=0x%02x,0x%02x,0x%02x,0x%02x",
-                   val2[1][0][0], val2[1][0][1], val2[1][0][2], val2[1][0][3]);
-               TS_TRACE("testGetTermData[1][1]=0x%02x,0x%02x,0x%02x,0x%02x",
-                   val2[1][1][0], val2[1][1][1], val2[1][1][2], val2[1][1][3]);
-
-           // TERM_DATA_DRAM_RTT_WR
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_DRAM_RTT_WR,
-                   &l_fapi_mba_target, val2);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_DRAM_RTT_WR");
-               TS_TRACE("testGetTermData[0][0]=0x%02x,0x%02x,0x%02x,0x%02x",
-                   val2[0][0][0], val2[0][0][1], val2[0][0][2], val2[0][0][3]);
-               TS_TRACE("testGetTermData[0][1]=0x%02x,0x%02x,0x%02x,0x%02x",
-                   val2[0][1][0], val2[0][1][1], val2[0][1][2], val2[0][1][3]);
-               TS_TRACE("testGetTermData[1][0]=0x%02x,0x%02x,0x%02x,0x%02x",
-                   val2[1][0][0], val2[1][0][1], val2[1][0][2], val2[1][0][3]);
-               TS_TRACE("testGetTermData[1][1]=0x%02x,0x%02x,0x%02x,0x%02x",
-                   val2[1][1][0], val2[1][1][1], val2[1][1][2], val2[1][1][3]);
-
-           // TERM_DATA_ODT_RD
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_ODT_RD,
-                   &l_fapi_mba_target, val2);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_ODT_RD");
-               TS_TRACE("testGetTermData[0][0]=0x%02x,0x%02x,0x%02x,0x%02x",
-                   val2[0][0][0], val2[0][0][1], val2[0][0][2], val2[0][0][3]);
-               TS_TRACE("testGetTermData[0][1]=0x%02x,0x%02x,0x%02x,0x%02x",
-                   val2[0][1][0], val2[0][1][1], val2[0][1][2], val2[0][1][3]);
-               TS_TRACE("testGetTermData[1][0]=0x%02x,0x%02x,0x%02x,0x%02x",
-                   val2[1][0][0], val2[1][0][1], val2[1][0][2], val2[1][0][3]);
-               TS_TRACE("testGetTermData[1][1]=0x%02x,0x%02x,0x%02x,0x%02x",
-                   val2[1][1][0], val2[1][1][1], val2[1][1][2], val2[1][1][3]);
-
-           // TERM_DATA_ODT_WR
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_ODT_WR,
-                   &l_fapi_mba_target, val2);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_ODT_WR");
-               TS_TRACE("testGetTermData[0][0]=0x%02x,0x%02x,0x%02x,0x%02x",
-                   val2[0][0][0], val2[0][0][1], val2[0][0][2], val2[0][0][3]);
-               TS_TRACE("testGetTermData[0][1]=0x%02x,0x%02x,0x%02x,0x%02x",
-                   val2[0][1][0], val2[0][1][1], val2[0][1][2], val2[0][1][3]);
-               TS_TRACE("testGetTermData[1][0]=0x%02x,0x%02x,0x%02x,0x%02x",
-                   val2[1][0][0], val2[1][0][1], val2[1][0][2], val2[1][0][3]);
-               TS_TRACE("testGetTermData[1][1]=0x%02x,0x%02x,0x%02x,0x%02x",
-                   val2[1][1][0], val2[1][1][1], val2[1][1][2], val2[1][1][3]);
-#endif
-           // ATTR_VPD_DIMM_RCD_OUTPUT_TIMING
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_DIMM_RCD_OUTPUT_TIMING,
-                   &l_fapi_mba_target, val1);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-              "ATTR_VPD_DIMM_RCD_OUTPUT_TIMING=(0x%02x,0x%02x),(0x%02x,0x%02x)",
-                   val1[0][0], val1[0][1], val1[1][0], val1[1][1]);
-
-           // ATTR_VPD_DIMM_RCD_IBT
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_DIMM_RCD_IBT,
-                   &l_fapi_mba_target, val7);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-              "ATTR_VPD_DIMM_RCD_IBT=(0x%08x,0x%08x),(0x%08x,0x%08x)",
-                   val7[0][0], val7[0][1], val7[1][0], val7[1][1]);
-
-           // TERM_DATA_CEN_RD_VREF
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_RD_VREF,
-                   &l_fapi_mba_target, val3);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_CEN_RD_VREF=0x%08x,0x%08x",
-                   val3[0], val3[1]);
-
-#if HWPMBVPDACCESSORTEST_UT4
-           // TERM_DATA_DRAM_WR_VREF
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_DRAM_WR_VREF,
-                   &l_fapi_mba_target, val3);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_DRAM_WR_VREF=0x%08x,0x%08x",
-                   val3[0], val3[1]);
-
-           // TERM_DATA_DRAM_WRDDR4_VREF
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_DRAM_WRDDR4_VREF,
-                   &l_fapi_mba_target, val4);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_DRAM_WRDDR4_VREF=0x%02x,0x%02x",
-                   val4[0], val4[1]);
-
-           // TERM_DATA_CEN_RCV_IMP_DQ_DQS
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_RCV_IMP_DQ_DQS,
-                   &l_fapi_mba_target, val4);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_CEN_RCV_IMP_DQ_DQS=0x%02x,0x%02x",
-                   val4[0], val4[1]);
-
-           // TERM_DATA_CEN_DRV_IMP_DQ_DQS
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_DRV_IMP_DQ_DQS,
-                   &l_fapi_mba_target, val4);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_CEN_DRV_IMP_DQ_DQS=0x%02x,0x%02x",
-                   val4[0], val4[1]);
-
-           // TERM_DATA_CEN_DRV_IMP_CNTL
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_DRV_IMP_CNTL,
-                   &l_fapi_mba_target, val4);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_CEN_DRV_IMP_CNTL=0x%02x,0x%02x",
-                   val4[0], val4[1]);
-
-           // TERM_DATA_CEN_DRV_IMP_ADDR
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_DRV_IMP_ADDR,
-                   &l_fapi_mba_target, val4);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_CEN_DRV_IMP_ADDR=0x%02x,0x%02x",
-                   val4[0], val4[1]);
-
-           // TERM_DATA_CEN_DRV_IMP_CLK
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_DRV_IMP_CLK,
-                   &l_fapi_mba_target, val4);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_CEN_DRV_IMP_CLK=0x%02x,0x%02x",
-                   val4[0], val4[1]);
-
-           // TERM_DATA_CEN_DRV_IMP_SPCKE
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_DRV_IMP_SPCKE,
-                   &l_fapi_mba_target, val4);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_CEN_DRV_IMP_SPCKE=0x%02x,0x%02x",
-                   val4[0], val4[1]);
-
-           // TERM_DATA_CEN_SLEW_RATE_DQ_DQS
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_SLEW_RATE_DQ_DQS,
-                   &l_fapi_mba_target, val4);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_CEN_SLEW_RATE_DQ_DQS=0x%02x,0x%02x",
-                   val4[0], val4[1]);
-
-           // TERM_DATA_CEN_SLEW_RATE_CNTL
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_SLEW_RATE_CNTL,
-                   &l_fapi_mba_target, val4);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_CEN_SLEW_RATE_CNTL=0x%02x,0x%02x",
-                   val4[0], val4[1]);
-
-           // TERM_DATA_CEN_SLEW_RATE_ADDR
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_SLEW_RATE_ADDR,
-                   &l_fapi_mba_target, val4);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_CEN_SLEW_RATE_ADDR=0x%02x,0x%02x",
-                   val4[0], val4[1]);
-
-           // TERM_DATA_CEN_SLEW_RATE_CLK
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_SLEW_RATE_CLK,
-                   &l_fapi_mba_target, val4);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_CEN_SLEW_RATE_CLK=0x%02x,0x%02x",
-                   val4[0], val4[1]);
-
-           // TERM_DATA_CEN_SLEW_RATE_SPCKE
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_SLEW_RATE_SPCKE,
-                   &l_fapi_mba_target, val4);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_CEN_SLEW_RATE_SPCKE=0x%02x,0x%02x",
-                   val4[0], val4[1]);
-
-           // TERM_DATA_CKE_PRI_MAP
-               val3[0] = 0xFFFFFFFF;
-               val3[1] = 0xFFFFFFFF;
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CKE_PRI_MAP,
-                   &l_fapi_mba_target, val3);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_CKE_PRI_MAP=0x%08x,0x%08x",
-                   val3[0], val3[1]);
-#endif
-
-           // TERM_DATA_CKE_PWR_MAP
-               val6 = 0xFFFFFFFFFFFFFFFF;
-               l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CKE_PWR_MAP,
-                   &l_fapi_mba_target, val6);
-               if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_CKE_PWR_MAP=0x%016lx", val6);
-
-#if HWPMBVPDACCESSORTEST_UT4
-           // TERM_DATA_RLO
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_RLO,
-                   &l_fapi_mba_target, val5);
-                if (l_fapirc) break;
-               TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_VPD_RLO=(0x%02x,0x%02x)",
-                   val5[0], val5[1]);
-
-           // TERM_DATA_WLO
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_WLO,
-                   &l_fapi_mba_target, val5);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_VPD_WLO=(0x%02x,0x%02x)",
-                   val5[0], val5[1]);
-
-           // TERM_DATA_GPO
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_GPO,
-                   &l_fapi_mba_target, val5);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetTermData attr "
-                   "TERM_DATA_VPD_GPO=(0x%02x,0x%02x)",
-                   val5[0], val5[1]);
-#endif
-            }
-            if (l_fapirc)
-            {
-               TS_FAIL( "fapiGetTermData: FAPI_ATTR_GET fail rc=0x%x",
-                         static_cast<uint32_t>(l_fapirc) );
-               fapiLogError(l_fapirc);
-            }
-        }
-
-
-        TS_TRACE( "testGetTermData exit" );
-
-    }
-
-
-    /**
-     * @brief call getMBvpdAttr to fetch memory buffer MR attributes
-     *
-     */
-    void    testGetPhaseRotatorData()
-    {
-        fapi::ReturnCode    l_fapirc;
-        const uint8_t PORT_SIZE = 2;
-        uint8_t l_attr_eff_cen_phase_rot[PORT_SIZE];
-
-        TS_TRACE( "testGetPhaseRotatorData entry" );
-
-        TARGETING::TargetHandleList l_memBufList;
-        getAllChips(l_memBufList, TYPE_MEMBUF);
-
-        TS_TRACE( "testGetPhaseRotatorData l_memBufList.size()=%ld",
-                                      l_memBufList.size() );
-
-        // loop thru memory buffers
-#if HWPMBVPDACCESSORTEST_UT0
-        uint8_t l_mbNum = 0;    // check them all in unit test
-#else
-        uint8_t l_mbNum = (l_memBufList.size() > 0) ? l_memBufList.size()-1 : 0;
-#endif
-        for (; l_mbNum < l_memBufList.size(); l_mbNum++ )
-        {
-            TARGETING::TargetHandleList l_mbaList;
-            getChildAffinityTargets(l_mbaList,l_memBufList[l_mbNum],
-                            CLASS_UNIT,TYPE_MBA,false);
-
-            TS_TRACE( "testGetPhaseRotatorData l_mbaBufList.size()=%ld",
-                    l_mbaList.size());
-
-            // loop thru all the mbas (should be 2)
-#if HWPMBVPDACCESSORTEST_UT0
-            uint8_t l_mbaNum = 0;  // check them all in unit test
-#else
-            uint8_t l_mbaNum = (l_mbaList.size() > 0) ? l_mbaList.size()-1:0 ;
-#endif
-            for (; l_mbaNum < l_mbaList.size(); l_mbaNum++ )
-            {
-                //  dump physical path to target
-                EntityPath l_path;
-                l_path  =   l_mbaList[l_mbaNum]->getAttr<ATTR_PHYS_PATH>();
-                l_path.dump();
-
-                // cast OUR type of target to a FAPI type of target.
-                fapi::Target l_fapi_mba_target(
-                                          TARGET_TYPE_MBA_CHIPLET,
-                   (const_cast<TARGETING::Target*>(l_mbaList[l_mbaNum])) );
-
-               // verify getting all attributes
-
-               // getting all the attributes is a bit of over kill.
-               // cen_ddrphy.initfile accesses all the values
-               // the exhaustive test is good for unit test
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M0_CLK_P0,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M0_CLK_P0=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-#if HWPMBVPDACCESSORTEST_UT5
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M0_CLK_P1,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M0_CLK_P1=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M1_CLK_P0,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M1_CLK_P0=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M1_CLK_P1,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M1_CLK_P1=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_A0,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_A0=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_A1,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_A1=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_A2,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_A2=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_A3,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_A3=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_A4,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_A4=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_A5,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_A5=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_A6,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_A6=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_A7,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_A7=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_A8,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_A8=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_A9,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_A9=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_A10,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_A10=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_A11,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_A11=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_A12,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_A12=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_A13,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_A13=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_A14,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_A14=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_A15,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_A15=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_BA0,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_BA0=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_BA1,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_BA1=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_BA2,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_BA2=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_CASN,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_CASN=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_RASN,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_RASN=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_CMD_WEN,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_CMD_WEN=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_PAR,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_PAR=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M_ACTN,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M_ACTN=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CKE0,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CKE0=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CKE1,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CKE1=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CKE2,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CKE2=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CKE3,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CKE3=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CSN0,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CSN0=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CSN1,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CSN1=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CSN2,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CSN2=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CSN3,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_CSN3=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_ODT0,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_ODT0=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_ODT1,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M0_CNTL_ODT1=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CKE0,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CKE0=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CKE1,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CKE1=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CKE2,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CKE2=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CKE3,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CKE3=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CSN0,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CSN0=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CSN1,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CSN1=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CSN2,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CSN2=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CSN3,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_CSN3=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_ODT0,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_ODT0=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_ODT1,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_ODT1=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-#endif
-#ifdef HWPMBVPDACCESSORTEST_UT6
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_TSYS_ADR,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_TSYS_ADR=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-
-                l_fapirc = FAPI_ATTR_GET(ATTR_VPD_TSYS_DP18,
-                           &l_fapi_mba_target,
-                           l_attr_eff_cen_phase_rot);
-                if (l_fapirc) break;
-                TS_TRACE( "testGetPhaseRotatorData"
-                    " ATTR_VPD_TSYS_DP18=(0x%02x,0x%02x)",
-                     l_attr_eff_cen_phase_rot[0],
-                     l_attr_eff_cen_phase_rot[1]);
-#endif
-            }
-            if (l_fapirc)
-            {
-               TS_FAIL( "fapiGetPhaseRotatorData: FAPI_ATTR_GET fail rc=0x%x",
-                         static_cast<uint32_t>(l_fapirc) );
-               fapiLogError(l_fapirc);
-            }
-        }
-
-        TS_TRACE( "testGetPhaseRotatorData exit" );
-
-    }
-
-};  // end class
-
-#endif
diff --git a/src/usr/hwpf/test/hwpMvpdAccessorTest.H b/src/usr/hwpf/test/hwpMvpdAccessorTest.H
deleted file mode 100644
index 111f80388..000000000
--- a/src/usr/hwpf/test/hwpMvpdAccessorTest.H
+++ /dev/null
@@ -1,899 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/test/hwpMvpdAccessorTest.H $                     */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012,2014              */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-
-#ifndef __HWPMVPDACCESSORTEST_H
-#define __HWPMVPDACCESSORTEST_H
-
-// set to 1 for doing unit tests, set to 0 for production
-#define HWPMVPDACCESSORTEST_UT 0
-
-/**
- *  @file hwpMvpdAccessorTest.H
- *
- *  @brief Test cases for Mvpd HWP accessors.
-*/
-
-#include <cxxtest/TestSuite.H>
-
-#include    <fapi.H>
-#include    <fapiPlatHwpInvoker.H>
-
-#include    <targeting/common/commontargeting.H>
-#include    <targeting/common/utilFilter.H>
-
-#include    <getMvpdRing.H>
-#include    <setMvpdRing.H>
-
-#include <errl/errlmanager.H>
-#include <errl/errlentry.H>
-#include <devicefw/driverif.H>
-#include <trace/interface.H>
-
-//      pull in CompressedScanData def from proc_slw_build HWP
-#include <p8_scan_compression.H>
-
-using namespace     fapi;
-using   namespace   TARGETING;
-
-class hwpMvpdAccessorTest: public CxxTest::TestSuite
-{
-public:
-
-    /**
-     * @brief   call fapiGetMvpdField to fetch a mvpd records.
-     *
-     */
-    void    testGetMvpd()
-    {
-        fapi::ReturnCode    l_fapirc( fapi::FAPI_RC_SUCCESS );
-        uint8_t             *l_pdRRecord            =   NULL;
-        uint32_t            l_pdRLen                =   0;
-
-        // list of MVPD records to test. Need to be in PNOR or procmvpd.dat
-        // when g_usePNOR is false.
-        struct _testMvpdRecords {
-            fapi::MvpdRecord record;
-            fapi::MvpdKeyword keyword;
-        }  l_mvpdRecords[] = {
-#if HWPMVPDACCESSORTEST_UT
-            { MVPD_RECORD_CP00, MVPD_KEYWORD_PDG},
-            { MVPD_RECORD_MER0, MVPD_KEYWORD_PDI},
-//          { MVPD_RECORD_VER0, MVPD_KEYWORD_PDI}, //VER0 in spec,not supported
-#endif
-            { MVPD_RECORD_VWML, MVPD_KEYWORD_PDI},
-        };
-
-        TS_TRACE( "testGetMvpd entry" );
-
-        TARGETING::TargetHandleList l_cpuTargetList;
-        getAllChips(l_cpuTargetList, TYPE_PROC);
-
-        TS_TRACE( "testGetMvpd l_cpuTargetList.size()= 0x%x ",
-                                      l_cpuTargetList.size() );
-
-
-        // loop thru all the cpu's
-        for (TargetHandleList::iterator l_cpu_iter = l_cpuTargetList.begin();
-                l_cpu_iter != l_cpuTargetList.end();
-                ++l_cpu_iter)
-        {
-            //  make a local copy of the CPU target
-            TARGETING::Target* l_cpu_target = *l_cpu_iter;
-
-            TS_TRACE( "target HUID %.8X", TARGETING::get_huid(l_cpu_target));
-
-            // cast OUR type of target to a FAPI type of target.
-            fapi::Target l_fapi_cpu_target(
-                                          TARGET_TYPE_PROC_CHIP,
-                   (const_cast<TARGETING::Target*>(l_cpu_target)) );
-
-            // loop through mvpd records of interest
-            const uint32_t numRecords =
-                    sizeof(l_mvpdRecords)/sizeof(l_mvpdRecords[0]);
-            for (uint8_t i=0;i<numRecords;i++) {
-
-                TS_TRACE( "record = 0x%x keyword = 0x%x",
-                   l_mvpdRecords[i].record,
-                   l_mvpdRecords[i].keyword);
-
-                TS_TRACE( "call fapiGetMvpdField with NULL pointer" );
-
-                //  call fapiGetMvpdField once with a NULL pointer to get the
-                //  buffer size should return no error now.
-                l_fapirc = fapiGetMvpdField(l_mvpdRecords[i].record,
-                                        l_mvpdRecords[i].keyword,
-                                        l_fapi_cpu_target,
-                                        NULL,
-                                        l_pdRLen );
-                if ( l_fapirc != fapi::FAPI_RC_SUCCESS )
-                {
-                    TS_FAIL( "fapiGetMvpdField:  expected FAPI_RC_SUCCESS" );
-                    fapiLogError(l_fapirc);
-                    return;
-                }
-
-                TS_TRACE( "fapiGetMvpdField: size of record = 0x%x",
-                      l_pdRLen );
-
-                //  do a malloc instead of a new just for variety
-                l_pdRRecord =   reinterpret_cast<uint8_t *>(malloc(l_pdRLen) );
-
-                //  call fapiGetMvpdField once with a valid pointer
-                l_fapirc = fapiGetMvpdField(l_mvpdRecords[i].record,
-                                        l_mvpdRecords[i].keyword,
-                                        l_fapi_cpu_target,
-                                        l_pdRRecord,
-                                        l_pdRLen );
-                if ( l_fapirc != fapi::FAPI_RC_SUCCESS )
-                {
-                    TS_FAIL( "fapiGetMvpdField:  expected FAPI_RC_SUCCESS" );
-                    fapiLogError(l_fapirc);
-                    free( l_pdRRecord );
-                    return;
-                }
-
-                //  clean up memory
-                free( l_pdRRecord );
-            }
-        }
-
-        TS_TRACE( "testGetMvpd exit" );
-    }
-
-
-    // Structure used to save/restore the VPD
-    typedef struct saveRestoreData_t {
-        TARGETING::Target* target;
-        uint8_t* CP00_pdG;
-        size_t CP00_pdG_size;
-        uint8_t* CP00_pdR;
-        size_t CP00_pdR_size;
-    } saveRestoreData_t;
-
-    /**
-     * @brief Test get and set of Repair Rings
-     */
-    void testRepairRings()
-    {
-        fapi::ReturnCode    l_fapirc        =   fapi::FAPI_RC_SUCCESS;
-        uint8_t             *l_pRingBuf     =   NULL;
-        uint32_t            l_ringBufsize   =   0;
-        uint32_t            l_ringId        =   0;
-        uint32_t            l_chipletId     =   0;
-        uint32_t            l_bufsize       =   0x200;
-        errlHndl_t l_errhdl = NULL;
-
-        // This data needs to be in sync with the procmvpd.dat file
-        // the setMvpdFunc tests use the last row. The test
-        //  expects it to be a mid x20 byte ring in the #G keyword
-        struct _testRRstr {
-            fapi::MvpdKeyword keyword;
-            uint32_t ringIdval;
-            uint32_t chipletIdval;
-            uint32_t size;
-            uint32_t rc;
-        }  l_ringModifiers[] = {
-            { MVPD_KEYWORD_PDG, 0xa4, 0xFF, 0x20,  //last #G
-                                fapi::RC_REPAIR_RING_NOT_FOUND },
-            { MVPD_KEYWORD_PDR, 0xe0, 0x08, 0x20, //first #R
-                                FAPI_RC_SUCCESS },
-            { MVPD_KEYWORD_PDR, 0xe2, 0x16, 0x20, //big #R
-                                FAPI_RC_SUCCESS },
-            { MVPD_KEYWORD_PDG, 0xa2, 0x08, 0x20, //mid #G
-                                FAPI_RC_SUCCESS },
-            { MVPD_KEYWORD_PDR, 0xe1, 0x16, 0x20,//big #R
-                                FAPI_RC_SUCCESS },
-        };
-        const size_t VALID_INDEX = 2;
-        const size_t TEST_INDEX = 4;
-
-        TS_TRACE( "testRepairRings entry" );
-
-        std::list<saveRestoreData_t> l_srData;
-
-        TARGETING::TargetHandleList l_cpuTargetList;
-        getAllChips(l_cpuTargetList, TYPE_PROC);
-
-        // loop thru all the cpu's
-        for (TargetHandleList::iterator l_cpu_iter = l_cpuTargetList.begin();
-                l_cpu_iter != l_cpuTargetList.end();
-                ++l_cpu_iter)
-        {
-            //  make a local copy of the CPU target
-            TARGETING::Target* l_cpu_target = *l_cpu_iter;
-
-            TS_TRACE( "testRepairRings: "
-                "target HUID %.8X",
-                TARGETING::get_huid(l_cpu_target));
-
-            //--  Save the entire VPD record to restore later
-            saveRestoreData_t tmpsave;
-            tmpsave.target = l_cpu_target;
-
-            // do a read with NULL buffer to get the record size
-            l_errhdl = deviceRead( l_cpu_target,
-                                   NULL,
-                                   tmpsave.CP00_pdG_size,
-                                   DEVICE_MVPD_ADDRESS( MVPD_RECORD_CP00,
-                                                        MVPD_KEYWORD_PDG ) );
-            if( l_errhdl )
-            {
-                TS_FAIL("Error finding size of CP00/#G for %.8X",
-                        TARGETING::get_huid(l_cpu_target));
-                errlCommit( l_errhdl, VPD_COMP_ID );
-                continue;
-            }
-
-            // now go get the data
-            tmpsave.CP00_pdG = new uint8_t[tmpsave.CP00_pdG_size];
-            l_errhdl = deviceRead( l_cpu_target,
-                                   tmpsave.CP00_pdG,
-                                   tmpsave.CP00_pdG_size,
-                                   DEVICE_MVPD_ADDRESS( MVPD_RECORD_CP00,
-                                                        MVPD_KEYWORD_PDG ) );
-            if( l_errhdl )
-            {
-                TS_FAIL("Error reading CP00/#G from %.8X",
-                        TARGETING::get_huid(l_cpu_target));
-                errlCommit( l_errhdl, VPD_COMP_ID );
-                delete[] tmpsave.CP00_pdG;
-                continue;
-            }
-
-            // do a read with NULL buffer to get the record size
-            l_errhdl = deviceRead( l_cpu_target,
-                                   NULL,
-                                   tmpsave.CP00_pdR_size,
-                                   DEVICE_MVPD_ADDRESS( MVPD_RECORD_CP00,
-                                                        MVPD_KEYWORD_PDR ) );
-            if( l_errhdl )
-            {
-                TS_FAIL("Error finding size of CP00/#R for %.8X",
-                        TARGETING::get_huid(l_cpu_target));
-                errlCommit( l_errhdl, VPD_COMP_ID );
-                continue;
-            }
-
-            // now go get the data
-            tmpsave.CP00_pdR = new uint8_t[tmpsave.CP00_pdR_size];
-            l_errhdl = deviceRead( l_cpu_target,
-                                   tmpsave.CP00_pdR,
-                                   tmpsave.CP00_pdR_size,
-                                   DEVICE_MVPD_ADDRESS( MVPD_RECORD_CP00,
-                                                        MVPD_KEYWORD_PDR ) );
-            if( l_errhdl )
-            {
-                TS_FAIL("Error reading CP00/#R from %.8X",
-                        TARGETING::get_huid(l_cpu_target));
-                errlCommit( l_errhdl, VPD_COMP_ID );
-                delete[] tmpsave.CP00_pdR;
-                continue;
-            }
-
-            // add to the master list
-            l_srData.push_back(tmpsave);
-
-            // cast OUR type of target to a FAPI type of target.
-            fapi::Target l_fapi_cpu_target(
-                              TARGET_TYPE_PROC_CHIP,
-                              (const_cast<TARGETING::Target*>(l_cpu_target)) );
-
-            //  allocate some space to put the record(s)
-            if( l_pRingBuf != NULL )
-            {
-                delete[] l_pRingBuf;
-            }
-            l_pRingBuf      =    new uint8_t[l_bufsize];
-
-            //  ----------------------------------------------------------------
-            //  Pass in 0 for the ring modifier, should return with "not found"
-            //  error
-            //  ----------------------------------------------------------------
-            TS_TRACE( "testRepairRings: pass in invalid ringId" );
-            l_ringBufsize   =   l_bufsize;
-            l_ringId        =   0;     // ringId
-            l_chipletId     =   0;     // chipletId
-            l_fapirc    =   getMvpdRing(  MVPD_RECORD_CP00,
-                                          MVPD_KEYWORD_PDR,
-                                          l_fapi_cpu_target,
-                                          l_chipletId,
-                                          l_ringId,
-                                          l_pRingBuf,
-                                          l_ringBufsize );
-            TS_TRACE("testRepairRings:ringId=0x%x chipletId=0x%x Bufsize=0x%x",
-                      l_ringId,
-                      l_chipletId,
-                      l_ringBufsize );
-            if ( l_fapirc != fapi::RC_REPAIR_RING_NOT_FOUND )
-            {
-                //  note:  "uint32_t" below is an _operator_ of fapi::ReturnCode
-                TS_FAIL("testRepairRings: expect not found rc FAIL: 0x%x, 0x%x",
-                         fapi::RC_REPAIR_RING_NOT_FOUND,
-                         static_cast<uint32_t>(l_fapirc) );
-                fapiLogError(l_fapirc);
-            }
-
-            //  ----------------------------------------------------------------
-            //  Pass in a buffer size that is too small with a valid
-            //  ringId/chipletId, should return error with correct length
-            //  and invalid size return code..
-            //  ----------------------------------------------------------------
-            TS_TRACE( "testRepairRings: pass buffer too small %d ",
-                    VALID_INDEX );
-            l_ringBufsize   =   0x0;
-            l_ringId        =   l_ringModifiers[VALID_INDEX].ringIdval;
-            l_chipletId     =   l_ringModifiers[VALID_INDEX].chipletIdval;
-            l_fapirc    =   getMvpdRing(  MVPD_RECORD_CP00,
-                                          MVPD_KEYWORD_PDR,
-                                          l_fapi_cpu_target,
-                                          l_chipletId,
-                                          l_ringId,
-                                          l_pRingBuf,
-                                          l_ringBufsize );
-            TS_TRACE("testRepairRings:ringId=0x%x chipletId=0x%x: Bufsize=0x%x",
-                      l_ringId,
-                      l_chipletId,
-                      l_ringBufsize );
-            if ( l_fapirc != fapi::RC_REPAIR_RING_INVALID_SIZE )
-            {
-                //  note:  "uint32_t" below is an _operator_ of fapi::ReturnCode
-                TS_FAIL("testRepairRings: expect invalid size FAIL: exp=0x%x,"
-                         " act=0x%x, ring=0x%X",
-                         fapi::RC_REPAIR_RING_INVALID_SIZE,
-                         static_cast<uint32_t>(l_fapirc),
-                         l_ringId);
-
-                fapiLogError(l_fapirc);
-            }
-            else if ( l_ringBufsize != l_ringModifiers[VALID_INDEX].size )
-            {
-                TS_FAIL( "testRepairRings: size mismatch FAIL1 on ring 0x%X:"
-                         " exp=0x%x, act=0x%x",
-                         l_ringId,
-                         l_ringModifiers[VALID_INDEX].size,
-                         l_ringBufsize  );
-            }
-
-            //  ----------------------------------------------------------------
-            //  Pass in a NULL pointer with a valid ringId/chipletId, should
-            //  return with correct length and successful return code.
-            //  ----------------------------------------------------------------
-            TS_TRACE( "testRepairRings: get size of ring %d ", VALID_INDEX );
-            l_ringBufsize   =   0x0;
-            l_ringId        =   l_ringModifiers[VALID_INDEX].ringIdval;
-            l_chipletId     =   l_ringModifiers[VALID_INDEX].chipletIdval;
-            l_fapirc    =   getMvpdRing(  MVPD_RECORD_CP00,
-                                          MVPD_KEYWORD_PDR,
-                                          l_fapi_cpu_target,
-                                          l_chipletId,
-                                          l_ringId,
-                                          NULL,
-                                          l_ringBufsize );
-            TS_TRACE("testRepairRings:ringId=0x%x chipletId=0x%x: Bufsize=0x%x",
-                      l_ringId,
-                      l_chipletId,
-                      l_ringBufsize );
-            if ( l_fapirc )
-            {
-                //  note:  "uint32_t" below is an _operator_ of fapi::ReturnCode
-                TS_FAIL( "testRepairRings: expect success rc FAIL: 0x%x, 0x%x",
-                         fapi::FAPI_RC_SUCCESS,
-                         static_cast<uint32_t>(l_fapirc));
-
-                fapiLogError(l_fapirc);
-            }
-            else if ( l_ringBufsize != l_ringModifiers[VALID_INDEX].size )
-            {
-                TS_FAIL( "testRepairRings: size mismatch FAIL2 on ring 0x%X:"
-                         " exp=0x%x, act=0x%x",
-                         l_ringId,
-                         l_ringModifiers[VALID_INDEX].size,
-                         l_ringBufsize  );
-            }
-
-            //  ----------------------------------------------------------------
-            //  Fetch rings
-            //  ----------------------------------------------------------------
-            const uint32_t numRings =
-                        sizeof(l_ringModifiers)/sizeof(l_ringModifiers[0]);
-            for (size_t i=0;i<numRings;i++)
-            {
-                TS_TRACE( "testRepairRings: get ring %d", i );
-                l_ringBufsize   =   l_bufsize;
-                l_ringId    =   l_ringModifiers[i].ringIdval;
-                l_chipletId =   l_ringModifiers[i].chipletIdval;
-                l_fapirc    =   getMvpdRing(  MVPD_RECORD_CP00,
-                                          l_ringModifiers[i].keyword,
-                                          l_fapi_cpu_target,
-                                          l_chipletId,
-                                          l_ringId,
-                                          l_pRingBuf,
-                                          l_ringBufsize );
-                TS_TRACE("testRepairRings ringId=0x%x chipletId=0x%x size=0x%x",
-                      l_ringId, l_chipletId, l_ringBufsize );
-
-                if ( l_fapirc != l_ringModifiers[i].rc )
-                {
-                    // note: uint32_t below is an _operator_ of fapi::ReturnCode
-                    TS_FAIL( "testRepairRings: getMvpdRing rc FAIL 1: rc=0x%x,"
-                             " ring=0x%X, chiplet=0x%X, i=%d",
-                             static_cast<uint32_t>(l_fapirc),
-                             l_ringId,
-                             l_chipletId,
-                             i );
-                    fapiLogError(l_fapirc);
-                    continue;
-                }
-                else if( l_fapirc != fapi::FAPI_RC_SUCCESS )
-                {
-                    // not an error, but the next check isn't valid
-                    continue;
-                }
-
-                if ( l_ringBufsize != l_ringModifiers[i].size )
-                {
-                    TS_FAIL( "testRepairRings: size mismatch FAIL3 on ring %X:"
-                             " exp=0x%x, act=0x%x",
-                             l_ringId,
-                             l_ringModifiers[i].size,
-                             l_ringBufsize  );
-                }
-
-                // Dump ring buffer here.
-                TRACDBIN(g_trac_test,"testRepairRings:Dump Repair Ring Buffer:",
-                      l_pRingBuf,
-                      l_ringBufsize );
-           }
-
-            //  ----------------------------------------------------------------
-            //  write different data, read it back to verify, then put the
-            //     original data back.
-            //  ----------------------------------------------------------------
-            uint32_t  l_offset =0;
-            uint8_t   l_data = 0;
-            uint8_t  *l_pData = NULL;
-
-            // use data from last fetch test case.
-            TS_TRACE( "testRepairRings: update in place  ring %d", TEST_INDEX );
-            l_ringId    =   l_ringModifiers[TEST_INDEX].ringIdval;
-            l_chipletId =   l_ringModifiers[TEST_INDEX].chipletIdval;
-            l_ringBufsize = l_ringModifiers[TEST_INDEX].size;
-
-            // put in recognizable data for the debug data dump
-            l_pData = l_pRingBuf+sizeof(CompressedScanData);
-            for (l_offset = 0,l_data=0x10; l_offset <
-                 l_ringBufsize-sizeof(CompressedScanData); l_offset++)
-            {
-               *l_pData++ = l_data++;
-            }
-            TRACDBIN( g_trac_test, "testRepairRings: updated ring data:",
-                      l_pRingBuf,
-                      l_ringBufsize );
-            setMvpdRing_FP_t (l_setMvpdRing) = &setMvpdRing; //verify typedef
-            l_fapirc    =   (*l_setMvpdRing)(  MVPD_RECORD_CP00,
-                                          l_ringModifiers[TEST_INDEX].keyword,
-                                          l_fapi_cpu_target,
-                                          l_chipletId,
-                                          l_ringId,
-                                          l_pRingBuf,
-                                          l_ringBufsize );
-
-            if ( l_fapirc != fapi::FAPI_RC_SUCCESS )
-            {
-                //  note:  "uint32_t" below is an _operator_ of fapi::ReturnCode
-                TS_FAIL( "testRepairRings: setMvpdRing rc FAIL 1: exp=0x%x,"
-                         " rc=0x%x",
-                         fapi::FAPI_RC_SUCCESS,
-                         static_cast<uint32_t>(l_fapirc) );
-                fapiLogError(l_fapirc);
-            }
-
-            //  ----------------------------------------------------------------
-            //  write back a smaller ring to cause a shift left in the record
-            //  ----------------------------------------------------------------
-            TS_TRACE( "testRepairRings: shrink a  ring %d", TEST_INDEX );
-            l_ringBufsize = l_ringModifiers[TEST_INDEX].size-4;
-            reinterpret_cast<CompressedScanData *>(l_pRingBuf)->
-                                                   iv_size = l_ringBufsize;
-
-            // put in recognizable data for the debug data dump
-            l_pData = l_pRingBuf+sizeof(CompressedScanData);
-            for (l_offset = 0,l_data=0x20; l_offset <
-                 l_ringBufsize-sizeof(CompressedScanData); l_offset++)
-            {
-               *l_pData++ = l_data++;
-            }
-            TRACDBIN( g_trac_test, "testRepairRings: updated ring data:",
-                      l_pRingBuf,
-                      l_ringBufsize );
-            l_fapirc    =   setMvpdRing(  MVPD_RECORD_CP00,
-                                          l_ringModifiers[TEST_INDEX].keyword,
-                                          l_fapi_cpu_target,
-                                          l_chipletId,
-                                          l_ringId,
-                                          l_pRingBuf,
-                                          l_ringBufsize );
-
-            if ( l_fapirc != fapi::FAPI_RC_SUCCESS )
-            {
-                //  note:  "uint32_t" below is an _operator_ of fapi::ReturnCode
-                TS_FAIL( "testRepairRings: setMvpdRing rc FAIL 2:"
-                         " exp=0x%x, rc=0x%x",
-                         fapi::FAPI_RC_SUCCESS,
-                         static_cast<uint32_t>(l_fapirc) );
-
-                fapiLogError(l_fapirc);
-            }
-
-            //  ----------------------------------------------------------------
-            //  write back a larger  ring to cause a shift right in the record
-            //  ----------------------------------------------------------------
-            TS_TRACE( "testRepairRings: grow a ring %d", TEST_INDEX );
-            l_ringBufsize = l_ringModifiers[TEST_INDEX].size+16;
-            reinterpret_cast<CompressedScanData *>(l_pRingBuf)->
-                                                 iv_size = l_ringBufsize;
-
-            // put in recognizable data for the debug data dump
-            l_pData = l_pRingBuf+sizeof(CompressedScanData);
-            for (l_offset = 0,l_data=0x30; l_offset <
-                         l_ringBufsize-sizeof(CompressedScanData); l_offset++)
-            {
-               *l_pData++ = l_data++;
-            }
-            TRACDBIN( g_trac_test, "testRepairRings: updated ring data:",
-                      l_pRingBuf,
-                      l_ringBufsize );
-            l_fapirc    =   setMvpdRing(  MVPD_RECORD_CP00,
-                                          l_ringModifiers[TEST_INDEX].keyword,
-                                          l_fapi_cpu_target,
-                                          l_chipletId,
-                                          l_ringId,
-                                          l_pRingBuf,
-                                          l_ringBufsize );
-
-            if ( l_fapirc != fapi::FAPI_RC_SUCCESS )
-            {
-                //  note:  "uint32_t" below is an _operator_ of fapi::ReturnCode
-                TS_FAIL( "testRepairRings: setMvpdRing rc FAIL 3: exp=0x%x,"
-                         " rc=0x%x",
-                         fapi::FAPI_RC_SUCCESS,
-                         static_cast<uint32_t>(l_fapirc) );
-
-                fapiLogError(l_fapirc);
-            }
-
-            //  ----------------------------------------------------------------
-            //  append a ring that is not already there to the end
-            //  ----------------------------------------------------------------
-            TS_TRACE( "testRepairRings: append a ring" );
-            l_ringId    =   0x77;
-            l_chipletId =   0x88;
-            l_ringBufsize = l_ringModifiers[TEST_INDEX].size;
-            reinterpret_cast<CompressedScanData *>(l_pRingBuf)->
-                                                   iv_size = l_ringBufsize;
-            reinterpret_cast<CompressedScanData *>(l_pRingBuf)->
-                                                   iv_ringId = l_ringId;
-            reinterpret_cast<CompressedScanData *>(l_pRingBuf)->
-                                                   iv_chipletId = l_chipletId;
-
-            // put in recognizable data for the debug data dump
-            l_pData = l_pRingBuf+sizeof(CompressedScanData);
-            for (l_offset = 0,l_data=0x50; l_offset <
-                        l_ringBufsize-sizeof(CompressedScanData); l_offset++)
-            {
-               *l_pData++ = l_data++;
-            }
-            TRACDBIN( g_trac_test, "testRepairRings: updated ring data:",
-                      l_pRingBuf,
-                      l_ringBufsize );
-            l_fapirc    =   setMvpdRing(  MVPD_RECORD_CP00,
-                                          l_ringModifiers[TEST_INDEX].keyword,
-                                          l_fapi_cpu_target,
-                                          l_chipletId,
-                                          l_ringId,
-                                          l_pRingBuf,
-                                          l_ringBufsize );
-
-            if ( l_fapirc != fapi::FAPI_RC_SUCCESS )
-            {
-                //  note:  "uint32_t" below is an _operator_ of fapi::ReturnCode
-                TS_FAIL( "testRepairRings: setMvpdRing rc FAIL 4: exp=0x%x,"
-                         " rc=0x%x",
-                         fapi::FAPI_RC_SUCCESS,
-                         static_cast<uint32_t>(l_fapirc) );
-
-                fapiLogError(l_fapirc);
-            }
-
-            // read back data to prove the writes worked
-            l_ringId    =   l_ringModifiers[TEST_INDEX].ringIdval;
-            l_chipletId =   l_ringModifiers[TEST_INDEX].chipletIdval;
-            l_ringBufsize = l_ringModifiers[TEST_INDEX].size+16;
-            l_fapirc    =   getMvpdRing(  MVPD_RECORD_CP00,
-                                          l_ringModifiers[TEST_INDEX].keyword,
-                                          l_fapi_cpu_target,
-                                          l_chipletId,
-                                          l_ringId,
-                                          l_pRingBuf,
-                                          l_ringBufsize );
-
-            if ( l_fapirc != fapi::FAPI_RC_SUCCESS )
-            {
-                TS_FAIL( "testRepairRings: getMvpdRing rc FAIL 2: 0x%x, 0x%x",
-                         fapi::FAPI_RC_SUCCESS,
-                         static_cast<uint32_t>(l_fapirc) );
-                fapiLogError(l_fapirc);
-            }
-            else
-            {
-                l_pData = l_pRingBuf+sizeof(CompressedScanData);
-                for( l_offset = 0,l_data=0x30;
-                     l_offset < l_ringBufsize-sizeof(CompressedScanData);
-                     l_offset++)
-                {
-                    if( l_pData[l_offset] != l_data++ )
-                    {
-                        TS_FAIL("Mismatch after write on ring %X",
-                                l_ringId);
-                        TRACFBIN(g_trac_test,
-                                 "ringdata=",
-                                 l_pRingBuf,l_ringBufsize);
-                    }
-                }
-            }
-
-            // read back data to prove the writes worked
-            l_ringId    =   0x77;
-            l_chipletId =   0x88;
-            l_ringBufsize = l_ringModifiers[TEST_INDEX].size;
-            l_fapirc    =   getMvpdRing(  MVPD_RECORD_CP00,
-                                          l_ringModifiers[TEST_INDEX].keyword,
-                                          l_fapi_cpu_target,
-                                          l_chipletId,
-                                          l_ringId,
-                                          l_pRingBuf,
-                                          l_ringBufsize );
-
-            if ( l_fapirc != fapi::FAPI_RC_SUCCESS )
-            {
-                TS_FAIL( "testRepairRings: getMvpdRing rc FAIL 3: 0x%x, 0x%x",
-                         fapi::FAPI_RC_SUCCESS,
-                         static_cast<uint32_t>(l_fapirc) );
-                fapiLogError(l_fapirc);
-            }
-            else
-            {
-                l_pData = l_pRingBuf+sizeof(CompressedScanData);
-                for (l_offset = 0,l_data=0x50;
-                     l_offset < l_ringBufsize-sizeof(CompressedScanData);
-                     l_offset++)
-                {
-                    if( l_pData[l_offset] != l_data++ )
-                    {
-                        TS_FAIL("Mismatch after write on ring %X",
-                                l_ringId);
-                        TRACFBIN(g_trac_test,
-                                 "ringdata=",
-                                 l_pRingBuf,l_ringBufsize);
-                    }
-                }
-            }
-
-
-            //  ----------------------------------------------------------------
-            //  Pass in a buffer size that does not match the exact size
-            //  of the ringId/chipletId, should  return with correct length
-            //  and invalid size return code.
-            //  ----------------------------------------------------------------
-            TS_TRACE("testRepairRing:bad size ring=0x%x chiplet=0x%x size=0x%x",
-                      l_ringId,
-                      l_chipletId,
-                      l_ringBufsize );
-            l_ringBufsize   =   l_bufsize;
-            l_ringId        =   l_ringModifiers[TEST_INDEX].ringIdval;
-            l_chipletId     =   l_ringModifiers[TEST_INDEX].chipletIdval;
-            l_fapirc    =   setMvpdRing(  MVPD_RECORD_CP00,
-                                          MVPD_KEYWORD_PDR,
-                                          l_fapi_cpu_target,
-                                          l_chipletId,
-                                          l_ringId,
-                                          l_pRingBuf,
-                                          l_ringBufsize );
-
-            if ( l_fapirc != fapi::RC_MVPD_RING_FUNC_INVALID_PARAMETER )
-            {
-                //  note:  "uint32_t" below is an _operator_ of fapi::ReturnCode
-                TS_FAIL("testRepairRings:invalid ring size rc FAIL:"
-                         " exp=0x%x, act=0x%x",
-                         fapi::RC_REPAIR_RING_INVALID_SIZE,
-                         static_cast<uint32_t>(l_fapirc));
-
-                fapiLogError(l_fapirc);
-            }
-
-            //  ----------------------------------------------------------------
-            //  Pass in 0 for the ring modifier, should return with "not found"
-            //  error
-            //  ----------------------------------------------------------------
-            TS_TRACE( "testRepairRings: pass in invalid ringId" );
-            l_ringBufsize   =   l_ringModifiers[TEST_INDEX].size;
-            l_ringId        =   0;     // ringId
-            l_chipletId     =   0;     // chipletId
-            l_fapirc    =   setMvpdRing(  MVPD_RECORD_CP00,
-                                          MVPD_KEYWORD_PDR,
-                                          l_fapi_cpu_target,
-                                          l_chipletId,
-                                          l_ringId,
-                                          l_pRingBuf,
-                                          l_ringBufsize );
-
-            TS_TRACE("testRepairRings:ringId=0x%x chipletId=0x%x size=0x%x",
-                      l_ringId,
-                      l_chipletId,
-                      l_ringBufsize );
-            if ( l_fapirc != fapi::RC_MVPD_RING_FUNC_INVALID_PARAMETER )
-            {
-                //  note:  "uint32_t" below is an _operator_ of fapi::ReturnCode
-                TS_FAIL( "testRepairRings:  rc FAIL: exp=0x%x, act=0x%x",
-                         fapi::RC_REPAIR_RING_NOT_FOUND,
-                         static_cast<uint32_t>(l_fapirc) );
-                fapiLogError(l_fapirc);
-            }
-            //  ----------------------------------------------------------------
-            //  Pass in a NULL pointer with a valid ringId/chipletId, should
-            //  return with correct length and successful return code.
-            //  ----------------------------------------------------------------
-            TS_TRACE( "testRepairRings: get size of ring(from set) %d ",
-                     TEST_INDEX );
-            l_ringBufsize   =   0x0;
-            l_ringId        =   l_ringModifiers[TEST_INDEX].ringIdval;
-            l_chipletId     =   l_ringModifiers[TEST_INDEX].chipletIdval;
-            l_fapirc    =   setMvpdRing(  MVPD_RECORD_CP00,
-                                          MVPD_KEYWORD_PDR,
-                                          l_fapi_cpu_target,
-                                          l_chipletId,
-                                          l_ringId,
-                                          NULL,
-                                          l_ringBufsize );
-
-            TS_TRACE("testRepairRings:ringId=0x%x chipletId=0x%x size=0x%x",
-                      l_ringId,
-                      l_chipletId,
-                      l_ringBufsize );
-            if ( l_fapirc != fapi::RC_MVPD_RING_FUNC_INVALID_PARAMETER )
-            {
-                //  note:  "uint32_t" below is an _operator_ of fapi::ReturnCode
-                TS_FAIL( "testRepairRings: setMvpdRing rc FAIL 5:"
-                         " exp=0x%x, act=0x%x",
-                         fapi::RC_MVPD_RING_FUNC_INVALID_PARAMETER,
-                         static_cast<uint32_t>(l_fapirc));
-
-                fapiLogError(l_fapirc);
-            }
-
-            //  ----------------------------------------------------------------
-            //  Pass in an invalid chiplet id with a valid ring, should fail
-            //  ----------------------------------------------------------------
-            l_ringBufsize   =   l_bufsize;
-            l_ringId        =   l_ringModifiers[TEST_INDEX].ringIdval;
-            l_chipletId     =   0x22;
-            TS_TRACE("testRepairRing:invalid chiplet ring=0x%X chiplet=0x%X"
-                      " size=0x%x",
-                      l_ringId,
-                      l_chipletId,
-                      l_ringBufsize );
-            l_fapirc    =   getMvpdRing(  MVPD_RECORD_CP00,
-                                          MVPD_KEYWORD_PDR,
-                                          l_fapi_cpu_target,
-                                          l_chipletId,
-                                          l_ringId,
-                                          l_pRingBuf,
-                                          l_ringBufsize );
-
-            if ( l_fapirc != fapi::RC_REPAIR_RING_NOT_FOUND )
-            {
-                //  note:  "uint32_t" below is an _operator_ of fapi::ReturnCode
-                TS_FAIL("testRepairRings:invalid chipletid rc FAIL:"
-                         " exp=0x%x, act=0x%x",
-                         fapi::RC_REPAIR_RING_NOT_FOUND,
-                         static_cast<uint32_t>(l_fapirc));
-
-                fapiLogError(l_fapirc);
-            }
-
-        }
-
-        //-- Put the original data back into the vpd
-        for( std::list<saveRestoreData_t>::iterator sv = l_srData.begin();
-             sv != l_srData.end();
-             ++sv )
-        {
-            if( sv->target == NULL )
-            {
-                continue;
-            }
-
-            if( sv->CP00_pdG != NULL )
-            {
-                l_errhdl = deviceWrite( sv->target,
-                                        sv->CP00_pdG,
-                                        sv->CP00_pdG_size,
-                                        DEVICE_MVPD_ADDRESS( MVPD_RECORD_CP00,
-                                                          MVPD_KEYWORD_PDG ) );
-                if( l_errhdl )
-                {
-                    TS_FAIL("Error restoring CP00/#G to %.8X",
-                            TARGETING::get_huid(sv->target));
-                    errlCommit( l_errhdl, VPD_COMP_ID );
-                }
-                delete[] sv->CP00_pdG;
-                sv->CP00_pdG = NULL;
-            }
-
-            if( sv->CP00_pdR != NULL )
-            {
-                l_errhdl = deviceWrite( sv->target,
-                                        sv->CP00_pdR,
-                                        sv->CP00_pdR_size,
-                                        DEVICE_MVPD_ADDRESS( MVPD_RECORD_CP00,
-                                                          MVPD_KEYWORD_PDR ) );
-                if( l_errhdl )
-                {
-                    TS_FAIL("Error restoring CP00/#R to %.8X",
-                            TARGETING::get_huid(sv->target));
-                    errlCommit( l_errhdl, VPD_COMP_ID );
-                }
-                delete[] sv->CP00_pdR;
-                sv->CP00_pdR = NULL;
-            }
-        }
-        //--
-
-        //  delete allocated space
-        if( l_pRingBuf )
-        {
-            delete[]    l_pRingBuf;
-        }
-        for( std::list<saveRestoreData_t>::iterator sv = l_srData.begin();
-             sv != l_srData.end();
-             ++sv )
-        {
-            if( sv->CP00_pdG != NULL )
-            {
-                delete[] sv->CP00_pdG;
-                sv->CP00_pdG = NULL;
-            }
-            if( sv->CP00_pdR != NULL )
-            {
-                delete[] sv->CP00_pdR;
-                sv->CP00_pdR = NULL;
-            }
-        }
-
-
-        TS_TRACE( "testRepairRings exit" );
-    }
-
-};  // end class
-
-#endif
diff --git a/src/usr/hwpf/test/hwpftest.H b/src/usr/hwpf/test/hwpftest.H
deleted file mode 100644
index ad416db08..000000000
--- a/src/usr/hwpf/test/hwpftest.H
+++ /dev/null
@@ -1,861 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/test/hwpftest.H $                                */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#ifndef __HWPFTEST_H
-#define __HWPFTEST_H
-
-/**
- *  @file hwpftest.H
- *
- *  @brief Test case for HWPF implementation
-*/
-
-#include <cxxtest/TestSuite.H>
-#include <fapi.H>
-#include <fapiPlatHwpInvoker.H>
-#include <errl/errlentry.H>
-#include <errl/errlmanager.H>
-#include <targeting/common/commontargeting.H>
-#include <targeting/common/utilFilter.H>
-#include <fapiHwpExecInitFile.H>
-#include <vpd/spdenums.H>
-
-using namespace fapi;
-using namespace TARGETING;
-
-struct ifScom_t {
-    uint64_t addr;
-    uint64_t data;
-};
-
-struct hwpfTestArgs_t {
-    ifScom_t      ifScom;
-    fapi::Target  fapiTarget;
-    uint32_t      count;
-    tid_t         tid;
-    struct {
-        uint64_t  Write:1;    // 1 = Write
-        uint64_t  AttrTest:1; // 1 = run Attr access test
-        uint64_t  ScomTest:1; // 1 = run Scom register access test
-    };
-};
-
-static const uint32_t ATTR_TEST_VALUE   = 10;
-static const uint32_t MAX_TEST_TASKS    = 30;
-static const uint32_t CREATE_TASK_PAIRS = 6;
-static const uint32_t MAX_TEST_COUNT    = 0x000001FF;
-
-/**
- * @brief repeated Scom access and Attrubute access through Fapi until
- *        MAX_TEST_COUNT accesses has been done or an error occurs.
- */
-void* testHwpScomAcc( void *i_phwpTestArgs )
-{
-    fapi::ReturnCode l_rc = fapi::FAPI_RC_SUCCESS;
-    ecmdDataBufferBase l_ScomData(64);
-
-    hwpfTestArgs_t * l_args = static_cast<hwpfTestArgs_t *>(i_phwpTestArgs);
-
-    // repeat as long as no error and in running mode until count reaches
-    // at MAX_TEST_COUNT or an error occurs
-    for (l_args->count = 0; l_args->count != MAX_TEST_COUNT; ++l_args->count)
-    {
-        if (l_args->Write)
-        {
-            if (l_args->ScomTest)
-            {
-                // set up ecmdDataBuffer with written data
-                l_ScomData.setDoubleWord(0, (l_args->ifScom).data);
-                l_rc = fapiPutScom( l_args->fapiTarget,
-                                    (l_args->ifScom).addr, l_ScomData );
-
-                if (l_rc != fapi::FAPI_RC_SUCCESS)
-                {
-                    TS_TRACE("testHwpScomAcc: Error from fapiPutScom");
-                    break;
-                }
-            }
-
-            if (l_args->AttrTest)
-            {
-                uint8_t l_uint8_1 = ATTR_TEST_VALUE;
-                l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT8_1, NULL, l_uint8_1);
-                if (l_rc != fapi::FAPI_RC_SUCCESS)
-                {
-                    TS_TRACE("testHwpScomAcc: ATTR_SCRATCH_UINT8_1. "
-                             "Error from SET");
-                    break;
-                }
-            }
-        }
-        else
-        {
-            if (l_args->ScomTest)
-            {
-                l_rc = fapiGetScom( l_args->fapiTarget,
-                                    (l_args->ifScom).addr, l_ScomData );
-                if (l_rc != fapi::FAPI_RC_SUCCESS)
-                {
-                    TS_TRACE("testHwpScomAcc: Error RC from fapiGetScom");
-                    break;
-                }
-                if ((l_args->ifScom).data != l_ScomData.getDoubleWord(0))
-                {
-                    (l_args->ifScom).data = l_ScomData.getDoubleWord(0);
-                    TS_TRACE("testHwpScomAcc: Error Data from fapiGetScom");
-                    break;
-                }
-            }
-
-            if (l_args->AttrTest)
-            {
-                uint8_t l_uint8_2 = 0xff;
-                l_rc = FAPI_ATTR_GET(ATTR_SCRATCH_UINT8_1, NULL, l_uint8_2);
-                if (l_rc != fapi::FAPI_RC_SUCCESS)
-                {
-                    TS_TRACE("testHwpScomAcc: ATTR_SCRATCH_UINT8_1."
-                            "  Error RC from GET");
-                    break;
-                }
-                if (l_uint8_2 != ATTR_TEST_VALUE)
-                {
-                    TS_TRACE("testHwpScomAcc: ATTR_SCRATCH_UINT8_1."
-                            " Error data %d from GET", l_uint8_2);
-                    break;
-                }
-            }
-        }
-    }
-    return NULL;
-}
-
-class HwpfTest: public CxxTest::TestSuite
-{
-public:
-
-    /**
-      * @brief Test HWPF trace
-      */
-    void testHwpf1()
-    {
-        // Trace into all the FAPI trace buffers
-        uint32_t l_val = 4;
-        const char * l_pStr = "test-str";
-
-        FAPI_INF("Test INF Trace");
-        FAPI_INF("Test INF Trace. hex: 0x%x", l_val);
-        FAPI_INF("Test INF Trace. string: %s", l_pStr);
-        FAPI_INF("Test INF Trace. 0x%x, %s", l_val, l_pStr);
-
-        FAPI_IMP("Test IMP Trace");
-        FAPI_IMP("Test IMP Trace. hex: 0x%x", l_val);
-        FAPI_IMP("Test IMP Trace. string: %s", l_pStr);
-        FAPI_IMP("Test IMP Trace. 0x%x, %s", l_val, l_pStr);
-
-        FAPI_ERR("Test ERR Trace");
-        FAPI_ERR("Test ERR Trace. hex: 0x%x", l_val);
-        FAPI_ERR("Test ERR Trace. string: %s", l_pStr);
-        FAPI_ERR("Test ERR Trace. 0x%x, %s", l_val, l_pStr);
-
-        FAPI_DBG("Test DBG Trace");
-        FAPI_DBG("Test DBG Trace. hex: 0x%x", l_val);
-        FAPI_DBG("Test DBG Trace. string: %s", l_pStr);
-        FAPI_DBG("Test DBG Trace. 0x%x, %s", l_val, l_pStr);
-
-        FAPI_MFG("Test MFG Trace");
-        FAPI_MFG("Test MFG Trace. hex: 0x%x", l_val);
-        FAPI_MFG("Test MFG Trace. string: %s", l_pStr);
-        FAPI_MFG("Test MFG Trace. 0x%x, %s", l_val, l_pStr);
-        return;
-    }
-
-    /**
-     * @brief Test HWPF: call a test procedure that generates an error
-     */
-    void testHwpf2()
-    {
-        errlHndl_t l_err = NULL;
-
-        // Get the master processor chip
-        TARGETING::Target* l_pTarget = NULL;
-        TARGETING::targetService().masterProcChipTargetHandle(l_pTarget);
-
-        // Create a FAPI Target and invoke the hwpTestError HWP. The HWP
-        // returns an error to test out error handling
-        fapi::Target l_fapiTarget(TARGET_TYPE_PROC_CHIP,
-                reinterpret_cast<void *> (l_pTarget));
-
-        TARGETING::TargetHandleList l_mbaTargetList;
-        TARGETING::getAllChiplets(l_mbaTargetList, TARGETING::TYPE_MBA);
-
-        // just grab the first one in the list.
-        TARGETING::Target * l_mbaTarget = l_mbaTargetList[0];
-        // Cast to a FAPI type of target.
-        fapi::Target l_fapiMbaTarget( fapi::TARGET_TYPE_MBA_CHIPLET,
-                (reinterpret_cast<void *>( l_mbaTarget)) );
-
-        FAPI_INVOKE_HWP(l_err, hwpTestError, l_fapiTarget, l_fapiMbaTarget);
-
-        if (l_err)
-        {
-            // Delete the error rather than committing it to avoid it getting
-            // interpreted as a real problem
-            TS_TRACE("testHwpf2: Unit Test passed. "
-                    "hwpTestError failed. Error deleted");
-            delete l_err;
-            l_err = NULL;
-        }
-        else
-        {
-            TS_FAIL("testHwpf2: Unit Test failed. "
-                    "hwpTestError passed. Error logged");
-        }
-    }
-
-    /**
-     * @brief Test HWPF Config: call a test procedure that exercises the FAPI
-     *        config query functions
-     */
-    void testHwpf3()
-    {
-        errlHndl_t l_err = NULL;
-
-        // Get the master processor chip
-        TARGETING::Target* l_pTarget = NULL;
-        TARGETING::targetService().masterProcChipTargetHandle(l_pTarget);
-
-        // Create a FAPI Target and invoke the hwpTestConfig HWP. The HWP
-        // exercises the FAPI config query functions
-        fapi::Target l_fapiTarget(TARGET_TYPE_PROC_CHIP,
-                                  reinterpret_cast<void *> (l_pTarget));
-
-        FAPI_INVOKE_HWP(l_err, hwpTestConfig, l_fapiTarget);
-
-        if (l_err)
-        {
-            TS_FAIL("testHwpf3: Unit Test failed. "
-                    "hwpTestConfig failed. Error logged");
-            errlCommit(l_err,HWPF_COMP_ID);
-        }
-        else
-        {
-            TS_TRACE("testHwpf3: Unit Test passed. "
-                     "hwpTestConfig passed. Error logged");
-        }
-    }
-
-    /**
-     * @brief Test HWPF InitFile: call the procedure that exercises a
-     *        sample initfile
-     */
-    void testHwpf5()
-    {
-#ifndef __HOSTBOOT_RUNTIME
-        typedef struct ifScom {
-            uint64_t addr;
-            uint64_t origData;
-            uint64_t writtenData;
-        }ifScom_t;
-
-        //Note:  this data is based on the sample.initfile.
-        //If the initfile changes, this data will also need to be changed.
-        ifScom_t l_ifScomData[] =
-        {
-            {/*PORE_GPE0_SCRATCH0_*/0x0006000A, 0, 0x0ABBC00000000000},
-            {/*PORE_GPE0_SCRATCH1_*/0x0006000B, 0, 0x00000000C4000000},
-            {/*PORE_GPE0_SCRATCH2_*/0x0006000C, 0, 0x0100000800000000},
-            {/*PORE_GPE1_SCRATCH0_*/0x0006002A, 0, 0x0000000000000000},
-            {/*PORE_GPE1_SCRATCH1_*/0x0006002B, 0, 0x0000016000003000},
-            {/*PORE_GPE1_SCRATCH2_*/0x0006002C, 0, 0x0c9c0c190010480d},
-            {/*PORE_SLW_SCRATCH0_*/0x0006800A,  0, 0x0c90000000000000},
-            {/*PORE_SLW_SCRATCH1_*/0x0006800B,  0, 0x0001901832002090},
-            {/*PORE_SLW_SCRATCH2_*/0x0006800C,  0, 0x0000000000000192},
-            {/*PORE_SBE_SCRATCH1_*/0x000E000B,  0, 0x0000000000000192},
-            {/*PORE_SBE_SCRATCH2_*/0x000E000C,  0, 0x0000014000000000}
-        };
-
-        fapi::ReturnCode l_rc;
-        ecmdDataBufferBase l_ScomData(64);
-
-        do {
-            // Set up some attributes used by sample.initfile
-            uint8_t l_uint8 = 1;
-            l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT8_1, NULL, l_uint8);
-            if (l_rc != fapi::FAPI_RC_SUCCESS)
-            {
-                TS_FAIL("testHwpf5: ATTR_SCRATCH_UINT8_1. Error from SET");
-                break;
-            }
-
-            l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT8_2, NULL, l_uint8);
-            if (l_rc != fapi::FAPI_RC_SUCCESS)
-            {
-                TS_FAIL("testHwpf5: ATTR_SCRATCH_UINT8_2. Error from SET");
-                break;
-            }
-
-            uint32_t l_uint32 = 3;
-            l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT32_1, NULL, l_uint32);
-            if (l_rc != fapi::FAPI_RC_SUCCESS)
-            {
-                TS_FAIL("testHwpf5: ATTR_SCRATCH_UINT32_1. Error from SET");
-                break;
-            }
-
-            l_uint32 = 0;
-            l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT32_2, NULL, l_uint32);
-            if (l_rc != fapi::FAPI_RC_SUCCESS)
-            {
-                TS_FAIL("testHwpf5: ATTR_SCRATCH_UINT32_2. Error from SET");
-                break;
-            }
-
-            uint64_t l_uint64 = 2;
-            l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT64_1, NULL, l_uint64);
-            if (l_rc != fapi::FAPI_RC_SUCCESS)
-            {
-                TS_FAIL("testHwpf5: ATTR_SCRATCH_UINT64_1. Error from SET");
-                break;
-            }
-
-            l_uint64 = 0;
-            l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT64_2, NULL, l_uint64);
-            if (l_rc != fapi::FAPI_RC_SUCCESS)
-            {
-                TS_FAIL("testHwpf5: ATTR_SCRATCH_UINT64_2. Error from SET");
-                break;
-            }
-
-            uint8_t l_uint8array1[32];
-            l_uint8array1[0] = 1;
-            l_uint8array1[1] = 4;
-            l_uint8array1[2] = 1;
-            l_uint8array1[3] = 2;
-            l_uint8array1[7] = 1;
-            l_uint8array1[17] = 6;
-            l_uint8array1[18] = 6;
-            l_uint8array1[31] = 8;
-            l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT8_ARRAY_1,
-                                                       NULL, l_uint8array1);
-            if (l_rc != fapi::FAPI_RC_SUCCESS)
-            {
-                TS_FAIL("testHwpf5: ATTR_SCRATCH_UINT8_ARRAY_1. "
-                        " Error from SET");
-                break;
-            }
-
-            uint8_t l_uint8array2[2][3][4];
-            l_uint8array2[0][1][2] = 0xC4;
-            l_uint8array2[1][2][3] = 0xBE;
-            l_rc = FAPI_ATTR_SET(ATTR_SCRATCH_UINT8_ARRAY_2,
-                                                       NULL, l_uint8array2);
-            if (l_rc != fapi::FAPI_RC_SUCCESS)
-            {
-                TS_FAIL("testHwpf5: ATTR_SCRATCH_UINT8_ARRAY_2. "
-                        "Error from SET");
-                break;
-            }
-
-            //Set the targets
-
-            std::vector<fapi::Target> l_target;
-
-            // Get the master processor chip & set it as the main target for Scom ops
-            TARGETING::Target* l_pTarget = NULL;
-            TARGETING::targetService().masterProcChipTargetHandle(l_pTarget);
-
-            fapi::Target l_fapiTarget(TARGET_TYPE_PROC_CHIP,
-                                      reinterpret_cast<void *> (l_pTarget));
-            l_target.push_back(l_fapiTarget);
-
-            // Get the target for the MBA chiplets of the first MEMBUF chip
-            TARGETING::PredicateCTM l_membufChip(TARGETING::CLASS_CHIP,
-                                                 TARGETING::TYPE_MEMBUF);
-
-            TARGETING::TargetRangeFilter l_filter(
-                TARGETING::targetService().begin(),
-                TARGETING::targetService().end(),
-                &l_membufChip);
-
-            PredicateCTM l_mba(CLASS_UNIT,TYPE_MBA);
-
-            // Just look at the first MEMBUF chip
-            if (l_filter)
-            {
-                TargetHandleList l_list;
-                (void) targetService().getAssociated(
-                    l_list,
-                    *l_filter,
-                    TARGETING::TargetService::CHILD,
-                    TARGETING::TargetService::ALL,
-                    &l_mba);
-
-                if (2 == l_list.size())
-                {
-                    for (size_t i = 0; i < l_list.size(); i++)
-                    {
-                        //Set the associated targets
-                        fapi::Target l_fapiTargetAssoc(fapi::TARGET_TYPE_MBA_CHIPLET,
-                            reinterpret_cast<void *>(l_list.at(i)));
-                        l_target.push_back(l_fapiTargetAssoc);
-                    }
-                }
-                else
-                {
-                    TS_FAIL("testHwpf5: Incorrect # of MBAs found: %u",
-                        l_list.size());
-
-                    size_t l_ffdc = l_list.size();
-                    size_t & FFDC_IF_TEST_NUM_MBAS_FOUND = l_ffdc;
-                    FAPI_SET_HWP_ERROR(l_rc,
-                        RC_HWP_EXEC_INITFILE_TEST_INCORRECT_NUM_MBAS_FOUND);
-                    break;
-                }
-            }
-            else
-            {
-                TS_FAIL("testHwpf5: No MEMBUFs found");
-                FAPI_SET_HWP_ERROR(l_rc, RC_HWP_EXEC_INITFILE_TEST_NO_MEMBUF_FOUND);
-                break;
-            }
-
-            // Save original scom data to restore at end of test
-            for (uint32_t i = 0; i < sizeof(l_ifScomData)/sizeof(ifScom_t); i++)
-            {
-                l_rc = fapiGetScom(l_fapiTarget, l_ifScomData[i].addr,
-                                                                   l_ScomData);
-                if (l_rc != fapi::FAPI_RC_SUCCESS)
-                {
-                    TS_FAIL("testHwpf5: Error from fapiGetScom");
-                    break;
-                }
-
-                l_ifScomData[i].origData = l_ScomData.getDoubleWord(0);
-            }
-
-            if (l_rc != fapi::FAPI_RC_SUCCESS)
-            {
-                break;
-            }
-
-            // Set scom data to 0 to start from known state for bit ops
-            l_ScomData.setDoubleWord(0, 0ll);
-            for (uint32_t i = 0; i < sizeof(l_ifScomData)/sizeof(ifScom_t); i++)
-            {
-                l_rc = fapiPutScom(l_fapiTarget, l_ifScomData[i].addr,
-                                                                   l_ScomData);
-                if (l_rc != fapi::FAPI_RC_SUCCESS)
-                {
-                    TS_FAIL("testHwpf5: Error from fapiPutScom");
-                    break;
-                }
-            }
-
-            if (l_rc != fapi::FAPI_RC_SUCCESS)
-            {
-                break;
-            }
-
-            //Call Hwp to execute the initfile
-            FAPI_EXEC_HWP(l_rc, fapiHwpExecInitFile, l_target, "sample.if");
-
-            if (l_rc != fapi::FAPI_RC_SUCCESS)
-            {
-                TS_FAIL("testHwpf5: Error from fapiHwpExecInitFile");
-                break;
-            }
-
-            //Verify the data written
-            for (uint32_t i = 0; i < sizeof(l_ifScomData)/sizeof(ifScom_t); i++)
-            {
-                l_rc = fapiGetScom(l_fapiTarget, l_ifScomData[i].addr,
-                                                                   l_ScomData);
-                if (l_rc != fapi::FAPI_RC_SUCCESS)
-                {
-                    TS_FAIL("testHwpf5: Error from fapiGetScom");
-                    break;
-                }
-
-                if (l_ScomData.getDoubleWord(0) != l_ifScomData[i].writtenData)
-                {
-                    TS_FAIL("testHwpf5: GetScom addr 0x%.16llX "
-                            "data read 0x%.16llX data expected 0x%.16llX",
-                             l_ifScomData[i].addr, l_ScomData.getDoubleWord(0),
-                             l_ifScomData[i].writtenData);
-                    FAPI_SET_HWP_ERROR(l_rc, RC_HWP_EXEC_INITFILE_TEST_FAILED);
-                    break;
-                }
-            }
-
-            if (l_rc != fapi::FAPI_RC_SUCCESS)
-            {
-                break;
-            }
-
-            // Restore the original Scom data
-            uint32_t l_ecmdRc = ECMD_DBUF_SUCCESS;
-            for (uint32_t i = 0; i < sizeof(l_ifScomData)/sizeof(ifScom_t); i++)
-            {
-                l_ecmdRc = l_ScomData.setDoubleWord(0,l_ifScomData[i].origData);
-                if (l_ecmdRc != ECMD_DBUF_SUCCESS)
-                {
-                    TS_FAIL("testHwpf5: fapiPutScom to restore, error from "
-                            "ecmdDataBuffer setDoubleWord() - rc 0x%.8X",
-                            l_ecmdRc);
-                    l_rc.setEcmdError(l_ecmdRc);
-                    break;
-                }
-
-                l_rc = fapiPutScom(l_fapiTarget, l_ifScomData[i].addr,
-                                                                   l_ScomData);
-                if (l_rc != fapi::FAPI_RC_SUCCESS)
-                {
-                    TS_FAIL("testHwpf5: Error from fapiGetScom");
-                    break;
-                }
-            }
-
-            if (l_rc != fapi::FAPI_RC_SUCCESS)
-            {
-                break;
-            }
-
-        } while (0);
-
-        if (l_rc != fapi::FAPI_RC_SUCCESS)
-        {
-            fapiLogError(l_rc);
-            TS_FAIL("testHwpf5: Unit Test failed. Error logged");
-        }
-        else
-        {
-            TS_TRACE("testHwpf5: Unit Test passed. "
-                     "fapiHwpExecInitFile passed.");
-        }
-#endif
-    }
-
-    /**
-     * @brief Test case for stressing the taskmgr, memory usage, and HWPF API
-     *        It starts (CREATE_TASK_PAIRS * 2) tasks.
-     */
-    void testHwpf6()
-    {
-#ifndef __HOSTBOOT_RUNTIME
-        fapi::ReturnCode l_rc = fapi::FAPI_RC_SUCCESS;
-
-        // Get the sys target handle
-        TARGETING::Target* l_pTarget = NULL;
-        TARGETING::targetService().getTopLevelTarget(l_pTarget);
-
-        uint8_t l_vpoMode = 0;
-
-        if (l_pTarget &&
-            l_pTarget->tryGetAttr<TARGETING::ATTR_IS_SIMULATION>(l_vpoMode) &&
-            l_vpoMode == 0)
-        {
-            static const uint32_t NUM_OF_SCOMREGS = 4;
-            ifScom_t l_ifScom[NUM_OF_SCOMREGS] =
-            {
-                {0x000000000006002b, 0x0000000000000183},
-                {0x000000000006002c, 0x0000000000000183},
-                {0x000000000006800b, 0},
-                {0x000000000006800c, 0x8000000000000000 >> 0x17},
-            };
-
-            // Get the master processor chip
-            l_pTarget = NULL;
-            TARGETING::targetService().masterProcChipTargetHandle(l_pTarget);
-
-            // Create a FAPI Target of the master processor
-            fapi::Target l_fapiTarget(TARGET_TYPE_PROC_CHIP,
-                                          reinterpret_cast<void *> (l_pTarget));
-
-            hwpfTestArgs_t l_args[MAX_TEST_TASKS] = {{{0},},};
-
-            uint8_t l_index = 0;
-            uint32_t i;
-
-            for (i = 0; i < (CREATE_TASK_PAIRS * 2); i++)
-            {
-                // start one task
-                l_args[i].ifScom      = l_ifScom[l_index];
-                l_args[i].fapiTarget  = l_fapiTarget;
-                l_args[i].Write       = (i % 2) ? 0 : 1;
-                l_args[i].AttrTest    = 1;
-                l_args[i].ScomTest    = 1;
-                l_args[i].tid = task_create(testHwpScomAcc,
-                                            static_cast<void *>(&l_args[i]));
-                // Change ifScom register after a pair of tasks started
-                l_index = (i % 2) ? (l_index + 1) % NUM_OF_SCOMREGS : l_index;
-            }
-
-            int status;
-
-            for (i = 0; i < MAX_TEST_TASKS; i++)
-            {
-                if (l_args[i].ifScom.addr != 0)
-                {
-                    task_wait_tid( l_args[i].tid, &status,  NULL );
-                }
-            }
-
-            for (i = 0; i < NUM_OF_SCOMREGS; i++)
-            {
-                ecmdDataBufferBase l_ScomData(64);
-                l_rc = fapiGetScom( l_fapiTarget, l_ifScom[i].addr,
-                                                             l_ScomData );
-                if (l_rc != fapi::FAPI_RC_SUCCESS ||
-                    l_ScomData.getDoubleWord(0) != l_ifScom[i].data)
-                {
-                    TS_FAIL("testHwpf6: Scom register has unexpected data");
-                    break;
-                }
-            }
-
-            if (l_rc.ok() && i == NUM_OF_SCOMREGS)
-            {
-                uint8_t l_uint8 = 0;
-                l_rc = FAPI_ATTR_GET(ATTR_SCRATCH_UINT8_1, NULL, l_uint8);
-                if (l_rc != fapi::FAPI_RC_SUCCESS || l_uint8 != ATTR_TEST_VALUE)
-                {
-                    TS_FAIL("testHwpf6: ATTR_SCRATCH_UINT8_1"
-                             " has unexpected data");
-                }
-                else
-                {
-                    TS_TRACE("testHwpf6: Unit Test passed.");
-                }
-            }
-        }
-#endif
-    }
-
-//    // unit test breakpoint
-//    void testHwpf7()
-//    {
-//        fapi::Target  fapiTarget;
-//        FAPI_INF("AT breakpoint");
-//        fapiBreakPoint(fapiTarget,__LINE__);
-//
-//        // requires outside hb-istep resume  command to continue
-//
-//        FAPI_INF("RESUME from breakpoint");
-//    }
-
-    /**
-     * @brief Test case Accessing DIMM SPD Attribute from FAPI
-     *
-     */
-    void testHwpf8()
-    {
-        fapi::ReturnCode l_rc;
-
-        do
-        {
-            // Get a DIMM Target
-            TargetHandleList dimmList;
-            getAllLogicalCards( dimmList,
-                                TARGETING::TYPE_DIMM );
-
-            if (dimmList.size())
-            {
-                fapi::Target l_dTarget(TARGET_TYPE_DIMM,
-                                       static_cast<void *> (dimmList[0]));
-
-                uint8_t opt[18] = { 0, };
-
-                l_rc = FAPI_ATTR_GET(ATTR_SPD_MODULE_PART_NUMBER,
-                                                       &l_dTarget, opt);
-
-                if (l_rc.ok())
-                {
-                    FAPI_INF("testHwpf8: PN = %s", opt);
-                }
-                else
-                {
-                    TS_FAIL("testHwpf8: ATTR_SPD_MODULE_PART_NUMBER GET fails");
-                }
-            }
-
-        } while(0);
-
-    }
-
-    /**
-     * @brief Call a test procedure that exercises the Bad DQ data
-     */
-    void testHwpf9()
-    {
-#ifndef __HOSTBOOT_RUNTIME
-        errlHndl_t l_err = NULL;
-
-        // Look for functional DIMMs
-        TARGETING::PredicateIsFunctional l_functional;
-        TARGETING::PredicateCTM l_dimmFilter(CLASS_LOGICAL_CARD, TYPE_DIMM);
-        TARGETING::PredicatePostfixExpr l_functionalDimms;
-        l_functionalDimms.push(&l_dimmFilter).push(&l_functional).And();
-
-        TARGETING::TargetRangeFilter l_filter(
-            TARGETING::targetService().begin(),
-            TARGETING::targetService().end(),
-            &l_functionalDimms);
-
-        // Look for the first functional DIMM
-        if (l_filter)
-        {
-            // Get the associated MBA
-            TARGETING::PredicateCTM l_mbaFilter(CLASS_UNIT, TYPE_MBA);
-            TARGETING::TargetHandleList l_MBAs;
-
-            TARGETING::targetService().getAssociated(l_MBAs, (*l_filter),
-                TARGETING::TargetService::PARENT_BY_AFFINITY,
-                TARGETING::TargetService::ALL,
-                &l_mbaFilter);
-
-            if (l_MBAs.size() == 1)
-            {
-                fapi::Target l_fapiTarget(TARGET_TYPE_MBA_CHIPLET,
-                    static_cast<void *>(l_MBAs[0]));
-
-                FAPI_INVOKE_HWP(l_err, fapiTestHwpDq, l_fapiTarget);
-
-                if (l_err)
-                {
-                    TS_FAIL("testHwpf9: fapiTestHwpDq failed. Error logged");
-                    errlCommit(l_err, HWPF_COMP_ID);
-                }
-                else
-                {
-                    TS_TRACE("testHwpf9: Unit Test passed");
-                }
-            }
-            else
-            {
-                TS_FAIL("testHwpf9: Parent MBA not found");
-            }
-        }
-        else
-        {
-            TS_TRACE("testHwpf9: No functional DIMMs found, skipping test");
-        }
-#endif
-    }
-
-    /**
-     * @brief Access the test Chip EC Feature attributes
-     */
-    void testHwpf10()
-    {
-        do
-        {
-            fapi::ReturnCode l_rc;
-            uint8_t l_chipHasFeature = 0xff;
-
-            // Get the first procesor chip
-            TARGETING::TargetHandleList l_chipList;
-            TARGETING::getAllChips(l_chipList, TARGETING::TYPE_PROC, false);
-
-            if (l_chipList.size() == 0)
-            {
-                TS_FAIL("testHwpf10: Chip not found");
-                break;
-            }
-
-            // Create a FAPI Chip Target
-            fapi::Target l_fapiChipTarget(fapi::TARGET_TYPE_PROC_CHIP,
-                                          static_cast<void *>(l_chipList[0]));
-
-            // Get a test Chip EC Feature attribute
-            l_rc = FAPI_ATTR_GET(ATTR_CHIP_EC_FEATURE_TEST1, &l_fapiChipTarget,
-                                 l_chipHasFeature);
-            if (l_rc)
-            {
-                TS_FAIL("testHwpf10: Chip ATTR_CHIP_EC_FEATURE_TEST1 get failed.");
-                break;
-            }
-
-            FAPI_INF("testHwpf10: Chip ATTR_CHIP_EC_FEATURE_TEST1: %d",
-                     l_chipHasFeature);
-
-            // Get another Chip EC Feature attribute
-            l_chipHasFeature = 0xff;
-            l_rc = FAPI_ATTR_GET(ATTR_CHIP_EC_FEATURE_TEST2, &l_fapiChipTarget,
-                                 l_chipHasFeature);
-            if (l_rc)
-            {
-                TS_FAIL("testHwpf10: Chip ATTR_CHIP_EC_FEATURE_TEST2 get failed.");
-                break;
-            }
-
-            FAPI_INF("testHwpf10: Chip ATTR_CHIP_EC_FEATURE_TEST2: %d",
-                     l_chipHasFeature);
-
-            // Get the first MCS child chiplet of the chip
-            TARGETING::TargetHandleList l_mcsList;
-            TARGETING::getChildChiplets(l_mcsList, l_chipList[0],
-                                        TARGETING::TYPE_MCS, false);
-
-            if (l_mcsList.size() == 0)
-            {
-                TS_FAIL("testHwpf10: MCS not found");
-                break;
-            }
-
-            // Create a FAPI MCS Chiplet Target
-            fapi::Target l_fapiMcsTarget(fapi::TARGET_TYPE_MCS_CHIPLET,
-                                         static_cast<void *>(l_mcsList[0]));
-
-            // Get a test Chip EC Feature attribute
-            l_chipHasFeature = 0xff;
-            l_rc = FAPI_ATTR_GET(ATTR_CHIP_EC_FEATURE_TEST1, &l_fapiMcsTarget,
-                                 l_chipHasFeature);
-            if (l_rc)
-            {
-                TS_FAIL("testHwpf10: MCS ATTR_CHIP_EC_FEATURE_TEST1 get failed.");
-                break;
-            }
-
-            FAPI_INF("testHwpf10: MCS ATTR_CHIP_EC_FEATURE_TEST1: %d",
-                     l_chipHasFeature);
-
-            // Get another Chip EC Feature attribute
-            l_chipHasFeature = 0xff;
-            l_rc = FAPI_ATTR_GET(ATTR_CHIP_EC_FEATURE_TEST2, &l_fapiMcsTarget,
-                                 l_chipHasFeature);
-            if (l_rc)
-            {
-                TS_FAIL("testHwpf10: MCS ATTR_CHIP_EC_FEATURE_TEST2 get failed.");
-                break;
-            }
-
-            FAPI_INF("testHwpf10: MCS ATTR_CHIP_EC_FEATURE_TEST2: %d",
-                     l_chipHasFeature);
-
-        } while(0);
-    }
-
-};
-
-#endif
diff --git a/src/usr/hwpf/test/hwpftest.mk b/src/usr/hwpf/test/hwpftest.mk
deleted file mode 100644
index 6a06ceea7..000000000
--- a/src/usr/hwpf/test/hwpftest.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/test/hwpftest.mk $
-#
-# OpenPOWER HostBoot Project
-#
-# COPYRIGHT International Business Machines Corp. 2011,2014
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/ecmddatabuffer
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/fapi
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/plat
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp
-EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/mvpd_accessors
-EXTRAINCDIR += ${ROOTPATH}/src/usr/initservice/istepdispatcher
-
-#   CompressedScanData struct needed for getRepairRings()
-EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/include
-EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build
-
diff --git a/src/usr/hwpf/test/hwpisteperrortest.H b/src/usr/hwpf/test/hwpisteperrortest.H
deleted file mode 100644
index f6337e393..000000000
--- a/src/usr/hwpf/test/hwpisteperrortest.H
+++ /dev/null
@@ -1,289 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/hwpf/test/hwpisteperrortest.H $                       */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-#ifndef __HWPIstepErrorTest_H
-#define __HWPIstepErrorTest_H
-
-#include <cxxtest/TestSuite.H>
-#include <errl/errlentry.H>
-#include <isteps/hwpisteperror.H>
-#include <istepdispatcher.H>
-
-using namespace ISTEP;
-using namespace ISTEP_ERROR;
-
-class HwpIStepErrorTest: public CxxTest::TestSuite
-{
-public:
-    /**
-     * @brief Test IStepError class
-     */
-    void testIstepError1(void)
-    {
-        uint8_t l_iStep = 0;
-        uint8_t l_subStep =0;
-        const uint16_t MY_REASON_CODE = 0xC0DE;
-        const uint8_t  MY_MODULE_ID = 0xBB;
-
-        TS_TRACE("testIStepError1: entry");
-
-        // Get the expected iStep and subStep. Likely the last valid values
-        // since the test case is running after the iSteps.
-        INITSERVICE::IStepDispatcher::
-                getTheInstance().getIstepInfo(l_iStep,l_subStep);
-
-        // Create an error log
-        errlHndl_t l_errl = new ERRORLOG::ErrlEntry(
-                                ERRORLOG::ERRL_SEV_INFORMATIONAL,
-                                MY_MODULE_ID,
-                                MY_REASON_CODE,
-                                TWO_UINT32_TO_UINT64( 0xDE, 0xAD),
-                                TO_UINT64(0xBEEF) );
-        do {
-
-            IStepError l_stepError;
-
-            l_stepError.addErrorDetails( l_errl );
-
-            TS_TRACE("testIStepError1: original elog eid is %d",
-                          l_errl->eid() );
-
-            TS_TRACE("testIStepError1: original elog reasoncode is %d",
-                          l_errl->reasonCode() );
-
-            // grab the values from the original errorlog for use later
-            uint64_t test_data0 = l_errl->eid();
-            test_data0 <<= 32;
-
-            test_data0 |= l_errl->reasonCode();
-
-            // this call to get resets the error handle
-            errlHndl_t new_errl = l_stepError.getErrorHandle();
-
-            uint64_t l_data0 = new_errl->getUserData1();
-
-            uint32_t eid = ( l_data0  & 0xFFFFFFFF00000000) >> 32;
-            uint32_t reason = (uint32_t)(l_data0 & 0x00000000FFFFFFFF);
-
-            // Verify the reference to the added error log.
-            // Added log id is in bytes 0-3 of userdata 1.
-            // Reason code is in bytes 4-6 of userdata 1.
-            if( eid != l_errl->eid() )
-            {
-                TS_FAIL("testIstepError1: expected"
-                            "eid[0x%.8x] == l_errl->eid()[0x%.8x] "
-                            "eid rebuilt from user data of "
-                            "IStepError did not match original error eid",
-                            eid, l_errl->eid());
-            }
-            else
-            {
-                TS_TRACE("testIstepError1: passed: eid == l_errl->eid()");
-            }
-
-            if( reason != l_errl->reasonCode() )
-            {
-                TS_FAIL("testIstepError1: "
-                        "expected reasonCode == l_errl->reasonCode() \
-                          reasonCode rebuilt from user data of \
-                          IStepError did not match original reasoncode");
-
-            }
-            else
-            {
-                TS_TRACE("testIstepError1: passed: "
-                         "reason == l_errl->reasonCode()");
-            }
-
-            // Verify that we counted the error we added.
-            // Count is in bytes 0-3 of userdata 2.
-            // iStep and subStep in bytes 4-6 of userdata 2.
-            uint64_t l_data1 = new_errl->getUserData2();
-
-            uint32_t l_count  = ( l_data1&0xFFFFFFFF00000000 ) >> 32;
-            uint32_t l_errlStepSubStep =
-                            (uint32_t)(l_data1&0x00000000FFFFFFFF);
-            uint32_t l_expectedStepSubStep =
-                            (uint32_t)(l_subStep | (l_iStep<<8));
-
-            if( l_count != 1 )
-            {
-                TS_FAIL("error count in IStepError not correct,"
-                        " should be 1, is %d",l_count);
-            }
-            else
-            {
-                TS_TRACE("passed: error count = 1");
-            }
-
-            if( l_errlStepSubStep != l_expectedStepSubStep )
-            {
-                TS_FAIL("Step/SubStep in IStepError not correct,"
-                        " should be 0x%08x, is 0x%08x ",
-                        l_expectedStepSubStep,
-                        l_errlStepSubStep);
-            }
-            else
-            {
-                TS_TRACE("passed: step/subStep correct");
-            }
-
-            errlCommit( l_errl, CXXTEST_COMP_ID );
-            errlCommit( new_errl, CXXTEST_COMP_ID );
-
-        }while(0);
-    }
-
-    void testIstepError2(void)
-    {
-        uint8_t l_iStep = 0;
-        uint8_t l_subStep =0;
-        const uint16_t MY_REASON_CODE = 0xC0DE;
-        const uint8_t  MY_MODULE_ID = 0xBB;
-
-        TS_TRACE("testIStepError2: entry");
-
-        // Get the expected iStep and subStep. Likely the last valid values
-        // since the test case is running after the iSteps.
-        INITSERVICE::IStepDispatcher::
-                getTheInstance().getIstepInfo(l_iStep,l_subStep);
-
-        // Create an error log
-        errlHndl_t l_errl = new ERRORLOG::ErrlEntry(
-                                ERRORLOG::ERRL_SEV_INFORMATIONAL,
-                                MY_MODULE_ID,
-                                MY_REASON_CODE,
-                                TWO_UINT32_TO_UINT64( 0xDE, 0xAD),
-                                TO_UINT64(0xBEEF) );
-        do {
-
-            IStepError l_stepError;
-
-            l_stepError.addErrorDetails( l_errl );
-
-            TS_TRACE("testIStepError2: original elog eid is %d",
-                      l_errl->eid() );
-
-            TS_TRACE("testIStepError2: original elog reasoncode is %d",
-                      l_errl->reasonCode() );
-
-            // grab the values from the original errorlog for use later
-            uint64_t test_data0 = l_errl->eid();
-            test_data0 <<= 32;
-
-            test_data0 |= l_errl->reasonCode();
-
-            // add a new elog in three more times..
-            // Create an error log -- junk data
-            errlHndl_t l_errl2 = new ERRORLOG::ErrlEntry(
-                                ERRORLOG::ERRL_SEV_INFORMATIONAL,
-                                0x05,
-                                0xcafe,
-                                TWO_UINT32_TO_UINT64( 0xDE, 0xAD),
-                                TO_UINT64(0xBEEF) );
-
-            l_stepError.addErrorDetails( l_errl2 );
-            l_stepError.addErrorDetails( l_errl2 );
-            l_stepError.addErrorDetails( l_errl2 );
-
-            // count should be 4 and the data0 and data 1 values of the
-            // istep error should be the same as before
-
-            // this call to get resets the error handle
-            errlHndl_t new_errl = l_stepError.getErrorHandle();
-
-            uint64_t l_data0 = new_errl->getUserData1();
-
-            uint32_t eid = ( l_data0  & 0xFFFFFFFF00000000) >> 32;
-            uint32_t reason = (uint32_t)(l_data0 & 0x00000000FFFFFFFF);
-
-            if( eid != l_errl->eid() )
-            {
-                TS_FAIL("testIStepError2: expected "
-                        "eid[0x%.8x] == l_errl->eid()[0x%.8x] "
-                        "eid rebuilt from user data of "
-                        "IStepError did not match original error eid",
-                        eid, l_errl->eid());
-            }
-            else
-            {
-                TS_TRACE("testIStepError2: passed: eid == l_errl->eid()");
-            }
-
-            if( reason != l_errl->reasonCode() )
-            {
-                TS_FAIL("testIStepError2: "
-                        "expected reasonCode == l_errl->reasonCode()"
-                        "reasonCode rebuilt from user data of"
-                        "IStepError did not match original reasoncode");
-
-            }
-            else
-            {
-                TS_TRACE("testIStepError2: passed: "
-                         "reason == l_errl->reasonCode()");
-            }
-
-            // Verify that 4 logs have been added.
-            // Count is in bytes 0-3 of userdata 2.
-            // iStep and subStep in bytes 4-6 of userdata 2.
-            uint64_t l_data1 = new_errl->getUserData2();
-
-            uint32_t l_count  = ( l_data1&0xFFFFFFFF00000000 ) >> 32;
-            uint32_t l_errlStepSubStep =
-                            (uint32_t)(l_data1&0x00000000FFFFFFFF);
-            uint32_t l_expectedStepSubStep =
-                            (uint32_t)(l_subStep | (l_iStep<<8));
-
-            if( l_count != 4 )
-            {
-                TS_FAIL("error count in IStepError not correct,"
-                        " should be 4, is %d",l_count);
-            }
-            else
-            {
-                TS_TRACE("passed: error count = 4");
-            }
-
-            if( l_errlStepSubStep != l_expectedStepSubStep )
-            {
-                TS_FAIL("Step/SubStep in IStepError not correct,"
-                        " should be 0x%08x, is 0x%08x ",
-                        l_expectedStepSubStep,
-                        l_errlStepSubStep);
-            }
-            else
-            {
-                TS_TRACE("passed: step/subStep correct");
-            }
-
-            errlCommit( l_errl, CXXTEST_COMP_ID );
-            errlCommit( new_errl, CXXTEST_COMP_ID );
-            errlCommit( l_errl2, CXXTEST_COMP_ID );
-
-        }while(0);
-    }
-
-};
-#endif
diff --git a/src/usr/hwpf/test/makefile b/src/usr/hwpf/test/makefile
deleted file mode 100644
index 05f04c657..000000000
--- a/src/usr/hwpf/test/makefile
+++ /dev/null
@@ -1,42 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/test/makefile $
-#
-# OpenPOWER HostBoot Project
-#
-# Contributors Listed Below - COPYRIGHT 2011,2014
-# [+] International Business Machines Corp.
-#
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-ROOTPATH = ../../../..
-MODULE = testhwpf
-
-include hwpftest.mk
-
-TESTS += fapiattrtest.H
-TESTS += fapirctest.H
-TESTS += fapitargettest.H
-TESTS += hwpftest.H
-TESTS += hwpisteperrortest.H
-TESTS += hwpMBvpdAccessorTest.H
-TESTS += hwpMvpdAccessorTest.H
-TESTS += hwpDQCompressionTest.H
-TESTS += $(if $(CONFIG_HTMGT),occAccessTest.H)
-SUBDIRS += runtime.d
-
-include ${ROOTPATH}/config.mk
-
diff --git a/src/usr/hwpf/test/runtime/makefile b/src/usr/hwpf/test/runtime/makefile
deleted file mode 100644
index 921e9c7ac..000000000
--- a/src/usr/hwpf/test/runtime/makefile
+++ /dev/null
@@ -1,39 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/hwpf/test/runtime/makefile $
-#
-# OpenPOWER HostBoot Project
-#
-# COPYRIGHT International Business Machines Corp. 2011,2014
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-ROOTPATH = ../../../../..
-
-HOSTBOOT_RUNTIME = 1
-MODULE = testhwpf_rt
-
-include ../hwpftest.mk
-
-TESTS += ../fapiattrtest.H
-TESTS += ../fapitargettest.H
-TESTS += ../fapirctest.H
-TESTS += ../hwpftest.H
-TESTS += rt_occtest.H
-#TESTS += ../hwpMvpdAccessorTest.H 
-#TESTS += ../hwpMBvpdAccessorTest.H
-
-include ${ROOTPATH}/config.mk
-
diff --git a/src/usr/isteps/HBconfig b/src/usr/isteps/HBconfig
new file mode 100644
index 000000000..5fb85e79b
--- /dev/null
+++ b/src/usr/isteps/HBconfig
@@ -0,0 +1,32 @@
+config NO_DMI_EREPAIR
+    default y if(!MEMVPD_WRITE || !MEMVPD_READ)
+    help
+        Do not apply erepair information on the DMI bus during boot
+
+config SET_NOMINAL_PSTATE
+    default n
+    depends on !HTMGT
+    help
+        Set the PState to Nominal just before starting the payload.
+
+config START_OCC_DURING_BOOT
+    default n
+    help
+        Activates all the OCCs during IPL
+
+config PALMETTO_VDDR
+    default n
+    help
+        Enable the Hostboot DRAM VDDR function for Palmetto
+
+config PCA95X_8BIT
+    default n
+    depends on (!PCA95X_16BIT)
+    help
+        Set the PCA95X support to an 8 bit chip.
+
+config PCA95X_16BIT
+    default y if (!PCA95X_8BIT)
+    depends on (!PCA95X_8BIT)
+    help
+        Set the PCA95X support to a 16 bit chip.
diff --git a/src/usr/hwpf/plugins/HWPF_COMP_ID_Parse.C b/src/usr/isteps/plugins/HWPF_COMP_ID_Parse.C
index 39ab188a2..311704425 100644
--- a/src/usr/hwpf/plugins/HWPF_COMP_ID_Parse.C
+++ b/src/usr/isteps/plugins/HWPF_COMP_ID_Parse.C
@@ -1,11 +1,13 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/hwpf/plugins/HWPF_COMP_ID_Parse.C $                   */
+/* $Source: src/usr/isteps/plugins/HWPF_COMP_ID_Parse.C $                 */
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012,2014              */
+/* Contributors Listed Below - COPYRIGHT 2016                             */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
 /*                                                                        */
 /* Licensed under the Apache License, Version 2.0 (the "License");        */
 /* you may not use this file except in compliance with the License.       */
diff --git a/src/usr/hwpf/plugins/fapiPlatUdParserHwp.H b/src/usr/isteps/plugins/fapiPlatUdParserHwp.H
index 211bcd065..12c85e7c6 100644
--- a/src/usr/hwpf/plugins/fapiPlatUdParserHwp.H
+++ b/src/usr/isteps/plugins/fapiPlatUdParserHwp.H
@@ -1,11 +1,13 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/hwpf/plugins/fapiPlatUdParserHwp.H $                  */
+/* $Source: src/usr/isteps/plugins/fapiPlatUdParserHwp.H $                */
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2013,2014              */
+/* Contributors Listed Below - COPYRIGHT 2016                             */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
 /*                                                                        */
 /* Licensed under the Apache License, Version 2.0 (the "License");        */
 /* you may not use this file except in compliance with the License.       */
@@ -34,7 +36,7 @@
  *  fapi::ReturnCode
  */
 #include "errluserdetails.H"
-#include "fapiPlatHwpErrParser.H"
+//TODO-RTC:151336 #include "platHwpErrParser.H"
 
 namespace fapi
 {
@@ -71,7 +73,7 @@ public:
                        const uint32_t i_buflen) const
     {
         // Call a FAPI generated function to parse the return code
-        fapiParseHwpRc(i_parser, i_pBuffer, i_buflen);
+        //TODO-RTC:151336 fapi2::parseHwpRc(i_parser, i_pBuffer, i_buflen);
     }
 
 private:
diff --git a/src/usr/hwpf/plugins/hwpfUdParserFactory.H b/src/usr/isteps/plugins/hwpfUdParserFactory.H
index 4a9083ab6..f5515e464 100644
--- a/src/usr/hwpf/plugins/hwpfUdParserFactory.H
+++ b/src/usr/isteps/plugins/hwpfUdParserFactory.H
@@ -1,11 +1,13 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/hwpf/plugins/hwpfUdParserFactory.H $                  */
+/* $Source: src/usr/isteps/plugins/hwpfUdParserFactory.H $                */
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2013,2014              */
+/* Contributors Listed Below - COPYRIGHT 2016                             */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
 /*                                                                        */
 /* Licensed under the Apache License, Version 2.0 (the "License");        */
 /* you may not use this file except in compliance with the License.       */
@@ -29,7 +31,7 @@
  *  Defines the PlatUserDetailsParserFactory class
  */
 #include "errludparserfactory.H"
-#include "fapiPlatUdParserHwp.H"
+//TODO-RTC:151336 #include "fapiPlatUdParserHwp.H"
 #include "hwpistepud.H"
 
 namespace fapi
@@ -50,8 +52,8 @@ public:
      */
     HwpfUserDetailsParserFactory()
     {
-        registerParser<PlatUserDetailsParserHwpRcValue>(HWPF_UDT_HWP_RCVALUE);
-        registerParser<PlatUserDetailsParserHwpFfdc>(HWPF_UDT_HWP_FFDC);
+        //TODO-RTC:151336 registerParser<PlatUserDetailsParserHwpRcValue>(HWPF_UDT_HWP_RCVALUE);
+        //TODO-RTC:151336 registerParser<PlatUserDetailsParserHwpFfdc>(HWPF_UDT_HWP_FFDC);
         registerParser<ISTEP_ERROR::HwpUserDetailsParserIstep>
             (HWPF_UDT_STEP_ERROR_DETAILS);
     }
diff --git a/src/usr/hwpf/plugins/hwpistepud.H b/src/usr/isteps/plugins/hwpistepud.H
index f688b9067..d0e868459 100644
--- a/src/usr/hwpf/plugins/hwpistepud.H
+++ b/src/usr/isteps/plugins/hwpistepud.H
@@ -1,11 +1,13 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/hwpf/plugins/hwpistepud.H $                           */
+/* $Source: src/usr/isteps/plugins/hwpistepud.H $                         */
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012,2014              */
+/* Contributors Listed Below - COPYRIGHT 2016                             */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
 /*                                                                        */
 /* Licensed under the Apache License, Version 2.0 (the "License");        */
 /* you may not use this file except in compliance with the License.       */
diff --git a/src/usr/hwpf/hwp/occ/makefile b/src/usr/occ/makefile
index 042b66ec4..0d5144e99 100644
--- a/src/usr/hwpf/hwp/occ/makefile
+++ b/src/usr/occ/makefile
@@ -1,11 +1,11 @@
 # IBM_PROLOG_BEGIN_TAG
 # This is an automatically generated prolog.
 #
-# $Source: src/usr/hwpf/hwp/occ/makefile $
+# $Source: src/usr/occ/makefile $
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2013,2015
+# Contributors Listed Below - COPYRIGHT 2013,2016
 # [+] International Business Machines Corp.
 #
 #
diff --git a/src/usr/hwpf/hwp/occ/occ.C b/src/usr/occ/occ.C
index 070477fa7..c13f09e70 100644
--- a/src/usr/hwpf/hwp/occ/occ.C
+++ b/src/usr/occ/occ.C
@@ -1,7 +1,7 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ.C $                                  */
+/* $Source: src/usr/occ/occ.C $                                           */
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
diff --git a/src/usr/hwpf/hwp/occ/occ.mk b/src/usr/occ/occ.mk
index 073b9dc7c..a64a2f2e3 100644
--- a/src/usr/hwpf/hwp/occ/occ.mk
+++ b/src/usr/occ/occ.mk
@@ -1,11 +1,11 @@
 # IBM_PROLOG_BEGIN_TAG
 # This is an automatically generated prolog.
 #
-# $Source: src/usr/hwpf/hwp/occ/occ.mk $
+# $Source: src/usr/occ/occ.mk $
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2014,2015
+# Contributors Listed Below - COPYRIGHT 2014,2016
 # [+] International Business Machines Corp.
 #
 #
diff --git a/src/usr/hwpf/hwp/occ/occAccess.C b/src/usr/occ/occAccess.C
index 01d555cad..d06a47680 100644
--- a/src/usr/hwpf/hwp/occ/occAccess.C
+++ b/src/usr/occ/occAccess.C
@@ -1,11 +1,11 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occAccess.C $                            */
+/* $Source: src/usr/occ/occAccess.C $                                     */
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2014,2015                        */
+/* Contributors Listed Below - COPYRIGHT 2014,2016                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
diff --git a/src/usr/hwpf/hwp/occ/occ_common.C b/src/usr/occ/occ_common.C
index 285eeebe3..98a01a9da 100644
--- a/src/usr/hwpf/hwp/occ/occ_common.C
+++ b/src/usr/occ/occ_common.C
@@ -1,7 +1,7 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/occ_common.C $                           */
+/* $Source: src/usr/occ/occ_common.C $                                    */
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
diff --git a/src/usr/hwpf/hwp/occ/p8_pmc_force_vsafe.C b/src/usr/occ/p8_pmc_force_vsafe.C
index 8f763d911..3bd59b986 100644
--- a/src/usr/hwpf/hwp/occ/p8_pmc_force_vsafe.C
+++ b/src/usr/occ/p8_pmc_force_vsafe.C
@@ -1,11 +1,11 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/p8_pmc_force_vsafe.C $                   */
+/* $Source: src/usr/occ/p8_pmc_force_vsafe.C $                            */
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
+/* Contributors Listed Below - COPYRIGHT 2013,2016                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
diff --git a/src/usr/hwpf/hwp/occ/p8_pmc_force_vsafe.H b/src/usr/occ/p8_pmc_force_vsafe.H
index 647524166..eeec2b840 100755
--- a/src/usr/hwpf/hwp/occ/p8_pmc_force_vsafe.H
+++ b/src/usr/occ/p8_pmc_force_vsafe.H
@@ -1,11 +1,11 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/p8_pmc_force_vsafe.H $                   */
+/* $Source: src/usr/occ/p8_pmc_force_vsafe.H $                            */
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
+/* Contributors Listed Below - COPYRIGHT 2013,2016                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
diff --git a/src/usr/hwpf/hwp/occ/runtime/makefile b/src/usr/occ/runtime/makefile
index f44b7ec99..008798945 100644
--- a/src/usr/hwpf/hwp/occ/runtime/makefile
+++ b/src/usr/occ/runtime/makefile
@@ -1,11 +1,13 @@
 # IBM_PROLOG_BEGIN_TAG
 # This is an automatically generated prolog.
 #
-# $Source: src/usr/hwpf/hwp/occ/runtime/makefile $
+# $Source: src/usr/occ/runtime/makefile $
 #
 # OpenPOWER HostBoot Project
 #
-# COPYRIGHT International Business Machines Corp. 2014
+# Contributors Listed Below - COPYRIGHT 2016
+# [+] International Business Machines Corp.
+#
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
diff --git a/src/usr/hwpf/hwp/occ/runtime/rt_occ.C b/src/usr/occ/runtime/rt_occ.C
index 282dacb96..a5a2126b0 100644
--- a/src/usr/hwpf/hwp/occ/runtime/rt_occ.C
+++ b/src/usr/occ/runtime/rt_occ.C
@@ -1,7 +1,7 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/hwpf/hwp/occ/runtime/rt_occ.C $                       */
+/* $Source: src/usr/occ/runtime/rt_occ.C $                                */
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
diff --git a/src/usr/hwpf/test/occAccessTest.H b/src/usr/runtime/occ/test/occAccessTest.H
index 6c037ec61..87c222669 100644
--- a/src/usr/hwpf/test/occAccessTest.H
+++ b/src/usr/runtime/occ/test/occAccessTest.H
@@ -1,11 +1,11 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/hwpf/test/occAccessTest.H $                           */
+/* $Source: src/usr/runtime/occ/test/occAccessTest.H $                    */
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2014,2015                        */
+/* Contributors Listed Below - COPYRIGHT 2014,2016                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
diff --git a/src/usr/hwpf/test/runtime/rt_occtest.H b/src/usr/runtime/occ/test/rt_occtest.H
index 2072182ed..0b827ca9a 100644
--- a/src/usr/hwpf/test/runtime/rt_occtest.H
+++ b/src/usr/runtime/occ/test/rt_occtest.H
@@ -1,11 +1,11 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/hwpf/test/runtime/rt_occtest.H $                      */
+/* $Source: src/usr/runtime/occ/test/rt_occtest.H $                       */
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2014,2015                        */
+/* Contributors Listed Below - COPYRIGHT 2014,2016                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */