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-rw-r--r--src/usr/hwpf/hwp/slave_sbe/proc_tp_collect_dbg_data/proc_tp_collect_dbg_data_attributes.xml69
1 files changed, 0 insertions, 69 deletions
diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_tp_collect_dbg_data/proc_tp_collect_dbg_data_attributes.xml b/src/usr/hwpf/hwp/slave_sbe/proc_tp_collect_dbg_data/proc_tp_collect_dbg_data_attributes.xml
deleted file mode 100644
index 5a0689f0d..000000000
--- a/src/usr/hwpf/hwp/slave_sbe/proc_tp_collect_dbg_data/proc_tp_collect_dbg_data_attributes.xml
+++ /dev/null
@@ -1,69 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG -->
-<!-- This is an automatically generated prolog. -->
-<!-- -->
-<!-- $Source: src/usr/hwpf/hwp/slave_sbe/proc_tp_collect_dbg_data/proc_tp_collect_dbg_data_attributes.xml $ -->
-<!-- -->
-<!-- OpenPOWER HostBoot Project -->
-<!-- -->
-<!-- Contributors Listed Below - COPYRIGHT 2015 -->
-<!-- [+] International Business Machines Corp. -->
-<!-- -->
-<!-- -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License"); -->
-<!-- you may not use this file except in compliance with the License. -->
-<!-- You may obtain a copy of the License at -->
-<!-- -->
-<!-- http://www.apache.org/licenses/LICENSE-2.0 -->
-<!-- -->
-<!-- Unless required by applicable law or agreed to in writing, software -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS, -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or -->
-<!-- implied. See the License for the specific language governing -->
-<!-- permissions and limitations under the License. -->
-<!-- -->
-<!-- IBM_PROLOG_END_TAG -->
-<!-- $Id: proc_tp_collect_dbg_data_attributes.xml,v 1.1 2014/10/03 20:24:15 jmcgill Exp $ -->
-<!-- proc_tp_collect_dbg_data_attributes.xml -->
-<attributes>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_PERV_VITL_LENGTH</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Length of perv_vitl_chain ring in bits
- creator: platform
- firmware notes:
- </description>
- <valueType>uint32</valueType>
- <platInit/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_TP_VITL_SPY_LENGTH</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Length of tp_vitl FFDC spy in bits
- creator: platform
- firmware notes:
- </description>
- <valueType>uint32</valueType>
- <platInit/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_TP_VITL_SPY_OFFSETS</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Set of ring offsets which form tp_vitl FFDC spy definition.
- High-order 16 bits provide starting bit of range.
- Low-order 16 bits provide ending bit of range.
- Entries will be processed from index 0 to 23 (value of 0xFFFFFF should be used to signify last entry to process).
- creator: platform
- firmware notes:
- </description>
- <valueType>uint32</valueType>
- <array>24</array>
- <platInit/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
-</attributes>
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