diff options
author | Thi Tran <thi@us.ibm.com> | 2013-01-07 15:11:58 -0600 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-01-19 14:37:56 -0600 |
commit | 5dccb59031180c1cbd467ec36d77f63b62de04ce (patch) | |
tree | 4888e8a340ea5603cf6bc578e5d706e0ac32e3d3 /src/build | |
parent | 63a1ec42cc6b0a3e63112535e07c24e68d798397 (diff) | |
download | talos-hostboot-5dccb59031180c1cbd467ec36d77f63b62de04ce.tar.gz talos-hostboot-5dccb59031180c1cbd467ec36d77f63b62de04ce.zip |
Updated VPO tools and proc_start_clock_chiplets v1.10
Change-Id: I1c70b41527a5de809d3f8f2f3f6bef64abccf1c2
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2869
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/build')
-rw-r--r-- | src/build/citest/etc/patches/patchlist.txt | 8 | ||||
-rw-r--r-- | src/build/citest/etc/patches/s1.act.proc_start_clock_chiplets_patch | 13 | ||||
-rwxr-xr-x | src/build/citest/etc/workarounds.postsimsetup | 8 | ||||
-rwxr-xr-x | src/build/debug/Hostboot/ContTrace.pm | 32 | ||||
-rwxr-xr-x | src/build/debug/vpo-debug-framework.pl | 38 | ||||
-rw-r--r-- | src/build/vpo/Setup_Env | 46 | ||||
-rw-r--r-- | src/build/vpo/VBU_Cacheline.pm | 4 |
7 files changed, 85 insertions, 64 deletions
diff --git a/src/build/citest/etc/patches/patchlist.txt b/src/build/citest/etc/patches/patchlist.txt index 5c8c92fb3..67c4cb454 100644 --- a/src/build/citest/etc/patches/patchlist.txt +++ b/src/build/citest/etc/patches/patchlist.txt @@ -4,3 +4,11 @@ Brief description of the problem or reason for patch -CMVC: Defect/Req for checking the changes into fips810 -Files: list of files -Coreq: list of associated changes, e.g. workarounds.presimsetup + +proc_start_clock_chiplets v1.10 requires some clock bits to be set in the clock status registers +at the time when it runs. Action file need to be updated to set these bits when at the time when +instructions are started +-RTC: Task 61816 will remove this patch +-CMVC: 865799 +-Files: s1.act_proc_start_clock_chiplets.patch +-Coreq: None
\ No newline at end of file diff --git a/src/build/citest/etc/patches/s1.act.proc_start_clock_chiplets_patch b/src/build/citest/etc/patches/s1.act.proc_start_clock_chiplets_patch new file mode 100644 index 000000000..1ddb9d540 --- /dev/null +++ b/src/build/citest/etc/patches/s1.act.proc_start_clock_chiplets_patch @@ -0,0 +1,13 @@ +--- s1.act_sandbox 2013-01-07 14:53:52.585244917 -0600 ++++ s1.act_updated 2013-01-07 14:54:39.095617417 -0600 +@@ -57,7 +57,9 @@ + EFFECT: TARGET=[FSIMBOX(0x1C)] OP=[OR,BUF] DATA=[LITERAL(64,000FFFFF 00000000)] + + #Also has effect of causing clocks on +- EFFECT: TARGET=[REG(0x08030008)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,000007FF FFFFFFFF)] ++ EFFECT: TARGET=[REG(0x08030008)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,007FFFFF FFFFFFFF)] ++ EFFECT: TARGET=[REG(0x04030008)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,00003FFF FFFFFFFF)] ++ EFFECT: TARGET=[REG(0x09030008)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,000E07FF FFFFFFFF)] + EFFECT: TARGET=[LOGIC(0xFF000001)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,0xFDB40000 0x00000001)] + EFFECT: TARGET=[LOGIC(0xFF000001)] OP=[BIT,ON] BIT=[17] # EX5 vital + EFFECT: TARGET=[LOGIC(0xFF000001)] OP=[BIT,ON] BIT=[18] # EX5 diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup index 40bf41a1a..c666adb01 100755 --- a/src/build/citest/etc/workarounds.postsimsetup +++ b/src/build/citest/etc/workarounds.postsimsetup @@ -25,3 +25,11 @@ ## Workarounds that are run after start_simics is executed for the first time ## to setup the sandbox ## + +echo "+++ Updating s1.act" +mkdir -p $sb/simu/data/cec-chip +cp $BACKING_BUILD/src/simu/data/cec-chip/s1.act $sb/simu/data/cec-chip + +## Added action for proc_start_clock_chiplets v1.10 and beyond +echo "+++ Update actions for proc_start_clock_chiplets v1.10" +patch -p0 $sb/simu/data/cec-chip/s1.act $HOSTBOOTROOT/src/build/citest/etc/patches/s1.act.proc_start_clock_chiplets_patch diff --git a/src/build/debug/Hostboot/ContTrace.pm b/src/build/debug/Hostboot/ContTrace.pm index da1b8112d..89a7472ff 100755 --- a/src/build/debug/Hostboot/ContTrace.pm +++ b/src/build/debug/Hostboot/ContTrace.pm @@ -1,26 +1,26 @@ #!/usr/bin/perl -# IBM_PROLOG_BEGIN_TAG -# This is an automatically generated prolog. +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. # -# $Source: src/build/debug/Hostboot/ContTrace.pm $ +# $Source: src/build/debug/Hostboot/ContTrace.pm $ # -# IBM CONFIDENTIAL +# IBM CONFIDENTIAL # -# COPYRIGHT International Business Machines Corp. 2012 +# COPYRIGHT International Business Machines Corp. 2012,2013 # -# p1 +# p1 # -# Object Code Only (OCO) source materials -# Licensed Internal Code Source Materials -# IBM HostBoot Licensed Internal Code +# Object Code Only (OCO) source materials +# Licensed Internal Code Source Materials +# IBM HostBoot Licensed Internal Code # -# The source code for this program is not published or other- -# wise divested of its trade secrets, irrespective of what has -# been deposited with the U.S. Copyright Office. +# The source code for this program is not published or otherwise +# divested of its trade secrets, irrespective of what has been +# deposited with the U.S. Copyright Office. # -# Origin: 30 +# Origin: 30 # -# IBM_PROLOG_END_TAG +# IBM_PROLOG_END_TAG use strict; package Hostboot::ContTrace; @@ -91,7 +91,7 @@ sub main return; } - my $trigger = ::readScom(0x00050038,8); + my $trigger = ::readScom(0x00050038); if ($dbgMsg) { ::userDisplay("$trigger...\n"); @@ -129,7 +129,7 @@ sub main ::userDisplay("$cycles\n"); } - ::writeScom(0x00050038, 8, 0x0); + ::writeScom(0x00050038, 0x0); open TRACE, ($args->{"fsp-trace"}." -s ".::getImgPath(). "hbotStringFile $fsptrace_options $fname |") || die; diff --git a/src/build/debug/vpo-debug-framework.pl b/src/build/debug/vpo-debug-framework.pl index 983fb19db..b13ca0a99 100755 --- a/src/build/debug/vpo-debug-framework.pl +++ b/src/build/debug/vpo-debug-framework.pl @@ -814,7 +814,6 @@ sub translateAddr # Scom size is always 64-bit # # @param[in] scom address to read -# @param[in] data size IN BYTES - currently ignored, assumed to be 8 # # @return hex string containing data read # @@ -823,10 +822,10 @@ sub translateAddr sub readScom { my $addr = shift; - my $size = shift; my $vpoaddr = ::translateAddr( $addr ); + # Use simGETFAC to speed up VPO my $cmd = "simGETFAC " . "B0.C0.S0.P0.E8.TPC.FSI.FSI_MAILBOX.FSXCOMP." . "FSXLOG.LBUS_MAILBOX.Q_$vpoaddr.NLC.L2 32"; @@ -839,18 +838,20 @@ sub readScom $result =~ s/\n//g; ## debug - ## ::userDisplay "--- readScom: ", - ## (sprintf("0x%x-->%s, 0x%x : %s", $addr,$vpoaddr,$size,$result)), "\n"; + #::userDisplay "--- readScom: ", + # (sprintf("0x%x-->%s, %s", $addr,$vpoaddr,$result)), "\n"; ## comes in as a 32-bit #, need to shift 32 to match simics - return (hex ( "0x" . $result . "00000000" )); + my $scomvalue = "0x" . $result; + $scomvalue = hex($scomvalue); + $scomvalue <<= 32; + return ($scomvalue); } # @sub writeScom # @brief Write a scom address in VPO. # # @param[in] - scom address -# @param[in] - data size IN BYTES - ignored, assumed to be 8 # @param[in] - binary data value. Scom value is aways assumed to be 64bits # # @return none @@ -860,28 +861,13 @@ sub readScom sub writeScom { my $addr = shift; - my $size = shift; my $value = shift; - my $cmd = ""; - - my $vpoaddr = ::translateAddr( $addr ); - - ## vpo takes a 32 bit value in the lower 32 bits - my $value32 = ( ( $value >> 32 ) & 0x00000000ffffffff ); - my $valuestr = sprintf( "0x%x", $value32 ); - - ## debug - ## ::userDisplay "--- writeScom: ", - ## (sprintf("0x%x-->%s, 0x%x, %s",$addr,$vpoaddr,$size,$valuestr)), "\n"; - - ## now go ahead and write the real value - $cmd = "simSTKFAC " . - "B0.C0.S0.P0.E8.TPC.FSI.FSI_MAILBOX.FSXCOMP." . - "FSXLOG.LBUS_MAILBOX.Q_$vpoaddr.NLC.L2 $valuestr 32 -quiet"; + my $addrstr = sprintf( "%08x", $addr ); + my $valuestr = sprintf( "%016x", $value ); - ( system( $cmd ) == 0 ) - or die "$cmd failed, $? : $! \n"; + # Use putscom because simPUTFAC doesn't work consistenly + system("putscom pu $addrstr $valuestr -cft -quiet"); return; } @@ -898,7 +884,7 @@ sub checkContTrace() my $SCRATCH_MBOX0 = 0x00050038; my $contTrace = ""; - $contTrace = ::readScom( $SCRATCH_MBOX0, 8 ); + $contTrace = ::readScom( $SCRATCH_MBOX0 ); if ( $contTrace != 0 ) { ## activate continuous trace diff --git a/src/build/vpo/Setup_Env b/src/build/vpo/Setup_Env index fd452e714..e550d4bf1 100644 --- a/src/build/vpo/Setup_Env +++ b/src/build/vpo/Setup_Env @@ -1,26 +1,26 @@ #!/bin/sh "Use source to invoke this script" -# IBM_PROLOG_BEGIN_TAG -# This is an automatically generated prolog. +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. # -# $Source: src/build/vpo/Setup_Env $ +# $Source: src/build/vpo/Setup_Env $ # -# IBM CONFIDENTIAL +# IBM CONFIDENTIAL # -# COPYRIGHT International Business Machines Corp. 2012 +# COPYRIGHT International Business Machines Corp. 2012,2013 # -# p1 +# p1 # -# Object Code Only (OCO) source materials -# Licensed Internal Code Source Materials -# IBM HostBoot Licensed Internal Code +# Object Code Only (OCO) source materials +# Licensed Internal Code Source Materials +# IBM HostBoot Licensed Internal Code # -# The source code for this program is not published or other- -# wise divested of its trade secrets, irrespective of what has -# been deposited with the U.S. Copyright Office. +# The source code for this program is not published or otherwise +# divested of its trade secrets, irrespective of what has been +# deposited with the U.S. Copyright Office. # -# Origin: 30 +# Origin: 30 # -# IBM_PROLOG_END_TAG +# IBM_PROLOG_END_TAG ################################################################################ # @@ -47,6 +47,7 @@ # # Version 1.5 10-09-2012 Added m_9_g/m_10_g/m_10_h models # +# Version 1.6 01-03-2012 Updated for m_10_b, m_11_a ################################################################################ # Define useful pointers to automated tests/scripts @@ -89,18 +90,17 @@ unset HB_VBUPNOR_ADDR HB_SYSMVPD_ADDR HB_SYSSPD_ADDR Setup_MyEnv() { # Default Sprint release - - sprint=hb0606a_1219.810 + sprint=hb0107a_1250.810 # Initialize HostBoot environment/cronus/tools - note new naming convention export AUTOVBU_CRONUS_SIM=dev - export ISTEP_ARCHIVE=archives/12.11.15 + export ISTEP_ARCHIVE=archives/13.01.08 export GLOBAL_DEBUG=8.VW.Vc.dG.F3.0I.E8.V - export HB_TOOLS=$AUTOVBU_HBTOOLS_BASEDIR/rel.20121126 + export HB_TOOLS=$AUTOVBU_HBTOOLS_BASEDIR/rel.20130110 # Select default model -- choose either VBU or VPO versions - export VPO_MODEL=m_10_h; unset VBU_MODEL; VBUVPO=VPO + export VPO_MODEL=m_11_a; unset VBU_MODEL; VBUVPO=VPO # Default AWAN request time - shorter periods get AWAN faster @@ -270,7 +270,13 @@ Setup_MyDynamic() { # Set other defaults based upon MODEL case "$VPO_MODEL$VBU_MODEL" in - s1_e8052_nA_p8_c0400_cen1_cen081_unopt_1|s1_e8052_c0400_cen1_cen081_unopt_1|s1_e8050_c0400_cen1_cen081_unopt_1|s1_e8050_nA_p8_c0400_cen1_cen081_unopt_1|m_9_a|m_9_g|m_10_g) + s1_e8042_c0400_cen1_cen0*|m_10_b|s1_e8053_n8_p8_c0400_cen1_cen081_unopt_1|m_11_a) + export AUTOVBU_ECMD_VER=${AUTOVBU_ECMD_VER-p8s1} + export AWAN_CONFIG=${AWAN_CONFIG-star8b} + unset DEFAULT_LEVEL + ;; + + s1_e8052_nA_p8_c0400_cen1_cen081_unopt_1|s1_e8052_c0400_cen1_cen081_unopt_1|s1_e8050_c0400_cen1_cen081_unopt_1|s1_e8050_nA_p8_c0400_cen1_cen081_unopt_1|m_9_a|m_9_g|m_10_g) export AUTOVBU_ECMD_VER=${AUTOVBU_ECMD_VER-p8s1} export AWAN_CONFIG=${AWAN_CONFIG-star12b} unset DEFAULT_LEVEL diff --git a/src/build/vpo/VBU_Cacheline.pm b/src/build/vpo/VBU_Cacheline.pm index 8ab892149..254b24598 100644 --- a/src/build/vpo/VBU_Cacheline.pm +++ b/src/build/vpo/VBU_Cacheline.pm @@ -6,7 +6,7 @@ # # IBM CONFIDENTIAL # -# COPYRIGHT International Business Machines Corp. 2011,2012 +# COPYRIGHT International Business Machines Corp. 2011,2013 # # p1 # @@ -79,7 +79,7 @@ my $CORE = "-cft"; my $SIM_CLOCKS = $ENV{'HB_SIMCLOCKS'}; if ( ! defined ( $SIM_CLOCKS ) || $SIM_CLOCKS == 0 ) { - $SIM_CLOCKS = "5000000"; + $SIM_CLOCKS = "4000000"; } print "clocks=$SIM_CLOCKS\n"; |