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* unsupported insn for bswap emittedDoug Gilbert2017-10-061-1/+1
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* Indicate that PPE42 fused branch instructions modify the CRDoug Gilbert2017-08-182-16/+27
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* Prevent unsupported load/store index updateinstructions on PPEDoug Gilbert2017-02-101-5/+119
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* Fix compile issue when compiling with gcc 6Douglas Gilbert2017-01-171-2/+2
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* Fix insn attribute length field for load zero-extend operationDoug Gilbert2016-10-282-29/+22
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* PPE42 compare immediate branch with immediate value out of rangeDoug Gilbert2016-09-131-4/+21
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* requre 8 byte alignment on offsettable memory access for 64bit load/storeDoug Gilbert2016-08-153-6/+27
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* Add RTL to correctly handle unavailable lwzux instructionDoug Gilbert2016-08-151-2/+15
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* PPE42 compiler generates invalid crnot instructionDoug Gilbert2016-08-151-2/+6
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* Turn off 64bit load/stores in epilog/proglogDoug Gilbert2016-08-152-4/+6
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* Fix PPE42 illegal stwux asm commandDoug Gilbert2016-08-152-2/+26
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* Unsigned compare immediate branch emitting wrong instructionsDoug Gilbert2016-08-152-1/+7
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* Remove more places lbzux was being usedDoug Gilbert2016-08-151-466/+507
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* Fix where signed compare should be unsigned compareDoug Gilbert2016-08-151-11/+10
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* Delivered 05/2015Doug Gilbert2016-08-152-1/+3
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* provide clrbwibcDoug Gilbert2016-08-152-30/+45
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* bnbwi supportDoug Gilbert2016-08-154-6/+144
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* Add ppe405 and ppe42 cpu typesDoug Gilbert2016-08-157-111/+144
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* 64 bit load/store peepholesDoug Gilbert2016-08-153-13/+188
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* 64 bit load/storeDoug Gilbert2016-08-153-19/+43
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* Compare-branch fused instructionsDoug Gilbert2016-08-154-31/+204
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* hack1Doug Gilbert2016-08-154-890/+900
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* [AArch64] Restore recog state after finding pre-madd instructionktkachov2014-10-291-0/+4
| | | | | | | | | | * config/aarch64/aarch64.c (aarch64_madd_needs_nop): Restore recog state after aarch64_prev_real_insn call. * gcc.target/aarch64/madd_after_asm_1.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@216853 138bc75d-0d04-0410-961f-82ee72b054a4
* [gcc]wschmidt2014-10-133-5/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2014-10-12 Bill Schmidt <wschmidt@linux.vnet.ibm.com> Backport from mainline r215880 2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Issue a warning message when vec_lvsl or vec_lvsr is used with a little endian target. Backport from mainline r215882 2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * altivec.md (altivec_lvsl): New define_expand. (altivec_lvsl_direct): Rename define_insn from altivec_lvsl. (altivec_lvsr): New define_expand. (altivec_lvsr_direct): Rename define_insn from altivec_lvsr. * rs6000.c (rs6000_expand_builtin): Change to use altivec_lvs[lr]_direct; remove commented-out code. [gcc/testsuite] 2014-10-12 Bill Schmidt <wschmidt@linux.vnet.ibm.com> Backport from mainline r215880 2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * g++.dg/ext/altivec-2.C: Compile with -Wno-deprecated to avoid failing with the new warning message. * gcc.dg/vmx/3c-01a.c: Likewise. * gcc.dg/vmx/ops-long-1.c: Likewise. * gcc.dg/vmx/ops.c: Likewise. * gcc.target/powerpc/altivec-20.c: Likewise. * gcc.target/powerpc/altivec-6.c: Likewise. * gcc.target/powerpc/altivec-vec-merge.c: Likewise. * gcc.target/powerpc/vsx-builtin-8.c: Likewise. * gcc.target/powerpc/warn-lvsl-lvsr.c: New test. Backport from mainline r215882 2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * gcc.target/powerpc/lvsl-lvsr.c: New test. Backport from mainline r216017 2014-10-08 Pat Haugen <pthaugen@us.ibm.com> * gcc.dg/vmx/3c-01a.c: Add default options from vmx.exp. * gcc.dg/vmx/ops.c: Likewise. * gcc.dg/vmx/ops-long-1.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@216134 138bc75d-0d04-0410-961f-82ee72b054a4
* [AArch64] Add --enable-fix-cortex-a53-835769 configure-time optionktkachov2014-10-102-1/+10
| | | | | | | | | | | | | | | | | Backport from mainline 2014-10-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * configure.ac: Add --enable-fix-cortex-a53-835769 option. * configure: Regenerate. * config/aarch64/aarch64.c (aarch64_override_options): Handle TARGET_FIX_ERR_A53_835769_DEFAULT. * config/aarch64/aarch64.opt (mfix-cortex-a53-835769): Set Init value to 2. * doc/install.texi (aarch64*-*-*): Document new --enable-fix-cortex-a53-835769 option. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@216079 138bc75d-0d04-0410-961f-82ee72b054a4
* [AArch64] Implement workaround for ARM Cortex-A53 erratum 835769ktkachov2014-10-104-0/+137
| | | | | | | | | | | | | | | | | | | | | | Backport from mainline 2014-10-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * config/aarch64/aarch64.h (FINAL_PRESCAN_INSN): Define. (ADJUST_INSN_LENGTH): Define. * config/aarch64/aarch64.opt (mfix-cortex-a53-835769): New option. * config/aarch64/aarch64.c (is_mem_p): New function. (is_memory_op): Likewise. (aarch64_prev_real_insn): Likewise. (is_madd_op): Likewise. (dep_between_memop_and_curr): Likewise. (aarch64_madd_needs_nop): Likewise. (aarch64_final_prescan_insn): Likewise. * doc/invoke.texi (AArch64 Options): Document -mfix-cortex-a53-835769 and -mno-fix-cortex-a53-835769 options. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@216077 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/olegendo2014-10-081-2/+12
| | | | | | | | | | | | | | | | Backport from mainline 2014-10-08 Oleg Endo <olegendo@gcc.gnu.org> PR target/52941 * config/sh/sync.md (atomic_exchangesi_hard, atomic_exchange<mode>_hard, atomic_fetch_<fetchop_name>si_hard, atomic_fetch_<fetchop_name><mode>_hard, atomic_fetch_nandsi_hard, atomic_fetch_nand<mode>_hard, atomic_<fetchop_name>_fetchsi_hard, atomic_<fetchop_name>_fetch<mode>_hard, atomic_nand_fetchsi_hard, atomic_nand_fetch<mode>_hard): Add missing set of T_REG. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@216019 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/63428jakub2014-10-011-2/+2
| | | | | | | | | | | * config/i386/i386.c (expand_vec_perm_pshufb): Fix up rperm[0] argument to avx2_permv2ti. * gcc.dg/torture/vshuf-4.inc: Move test 122 from EXPTESTS to test 24 in TESTS. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215780 138bc75d-0d04-0410-961f-82ee72b054a4
* [PATCH][ARM] Disable store_minmaxsi pattern for arm_restrict_iktkachov2014-10-011-1/+1
| | | | | | | | | | Backport from mainline 2014-10-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/arm/arm.md (*store_minmaxsi): Disable for arm_restrict_it. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215761 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport from mainlineuros2014-10-011-6/+12
| | | | | | | | | | | | | | | 2014-09-30 Uros Bizjak <ubizjak@gmail.com> * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only. (fmod<mode>3): Ditto. (fpremxf4_i387): Ditto. (reminderxf3): Ditto. (reminder<mode>3): Ditto. (fprem1xf4_i387): Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215751 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/61407fxcoudert2014-09-292-25/+35
| | | | | | | | | | | | | | | | | * config/darwin-c.c (version_as_macro): Added extra 0 for OS X 10.10 and above. * config/darwin-driver.c (darwin_find_version_from_kernel): Removed kernel version check to avoid incrementing it after every major OS X release. (darwin_default_min_version): Avoid static memory buffer. * gcc.dg/darwin-minversion-1.c: Fixed formatting * gcc.dg/darwin-minversion-2.c: Fixed formatting * gcc.dg/darwin-minversion-3.c: Fixed formatting * gcc.dg/darwin-minversion-4.c: Added test for OS X 10.10 git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215690 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-09-29 Charles Baylis <charles.baylis@linaro.org>cbaylis2014-09-294-23/+31
| | | | | | | | | | | | | | | | | | | | | Backport from mainline r212303 PR target/49423 * config/arm/arm-protos.h (arm_legitimate_address_p, arm_is_constant_pool_ref): Add prototypes. * config/arm/arm.c (arm_legitimate_address_p): Remove static. (arm_is_constant_pool_ref) New function. * config/arm/arm.md (unaligned_loadhis, arm_zero_extendhisi2_v6, arm_zero_extendqisi2_v6): Use Uh constraint for memory operand. (arm_extendhisi2, arm_extendhisi2_v6): Use Uh constraint for memory operand and remove pool_range and neg_pool_range attributes. (arm_extendqihi_insn, arm_extendqisi, arm_extendqisi_v6): Remove pool_range and neg_pool_range attributes. * config/arm/constraints.md (Uh): New constraint. (Uq): Don't allow constant pool references. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215685 138bc75d-0d04-0410-961f-82ee72b054a4
* * config/pa/pa.c (pa_output_function_epilogue): Only updatedanglin2014-09-281-3/+6
| | | | | | | | last_address when a nonnote insn is found. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215670 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/olegendo2014-09-251-2/+2
| | | | | | | | | | | | | Backport from mainline 2014-09-25 Nick Clifton <nickc@redhat.com> 2014-09-25 Oleg Endo <olegendo@gcc.gnu.org> PR target/62218 * config/sh/sync.md (atomic_fetch_nand<mode>_soft_imask, atomic_test_and_set_soft_imask): Fix typo in instruction sequence. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215608 138bc75d-0d04-0410-961f-82ee72b054a4
* [gcc]wschmidt2014-09-251-1/+2
| | | | | | | | | | | | | | | | | | | 2014-09-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com> PR target/63335 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Exclude VSX_BUILTIN_XVCMPGEDP_P from special handling. [gcc/testsuite] 2014-09-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com> PR target/63335 * gcc.target/powerpc/pr63335.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215603 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-09-23 Michael Meissner <meissner@linux.vnet.ibm.com>meissner2014-09-231-10/+27
| | | | | | | | | | | | | | | | | | | | | | | * config/rs6000/rs6000.md (f32_vsx): New mode attributes to refine the constraints used on 32/64-bit floating point moves. (f32_av): Likewise. (f64_vsx): Likewise. (f64_dm): Likewise. (f64_av): Likewise. (BOOL_REGS_OUTPUT): Use wt constraint for TImode instead of wa. (BOOL_REGS_OP1): Likewise. (BOOL_REGS_OP2): Likewise. (BOOL_REGS_UNARY): Likewise. (mov<mode>_hardfloat, SFmode/SDmode): Tighten down constraints for 32/64-bit floating point moves. Do not use wa, instead use ww/ws for moves involving VSX registers. Do not use constraints that target VSX registers for decimal types. (mov<mode>_hardfloat32, DFmode/DDmode): Likewise. (mov<mode>_hardfloat64, DFmode/DDmode): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215522 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-09-19 Michael Meissner <meissner@linux.vnet.ibm.com>meissner2014-09-194-109/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Back port from trunk: 2014-09-19 Michael Meissner <meissner@linux.vnet.ibm.com> * config/rs6000/predicates.md (fusion_gpr_mem_load): Move testing for base_reg_operand to be common between LO_SUM and PLUS. (fusion_gpr_mem_combo): New predicate to match a fused address that combines the addis and memory offset address. * config/rs6000/rs6000-protos.h (fusion_gpr_load_p): Change calling signature. (emit_fusion_gpr_load): Likewise. * config/rs6000/rs6000.c (fusion_gpr_load_p): Change calling signature to pass each argument separately, rather than using an operands array. Rewrite the insns found by peephole2 to be a single insn, rather than hoping the insns will still be together when the peephole pass is done. Drop being called via a normal peephole. (emit_fusion_gpr_load): Change calling signature to be called from the fusion_gpr_load_<mode> insns with a combined memory address instead of the peephole pass passing the addis and offset separately. * config/rs6000/rs6000.md (UNSPEC_FUSION_GPR): New unspec for GPR fusion. (power8 fusion peephole): Drop support for doing power8 via a normal peephole that was created by the peephole2 pass. (power8 fusion peephole2): Create a new insn with the fused address, so that the fused operation is kept together after register allocation is done. (fusion_gpr_load_<mode>): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215405 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-09-19 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>krebbel2014-09-191-5/+14
| | | | | | | | | | | | PR target/62662 * config/s390/s390.c (s390_emit_epilogue): When doing the return address load optimization force s390_optimize_prologue to leave it that way. Only do the optimization if we already decided to push r14 into a stack slot. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215383 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/61853danglin2014-09-161-2/+8
| | | | | | | | | * config/pa/pa.c (pa_function_value): Directly handle aggregates that fit exactly in a word or double word. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215310 138bc75d-0d04-0410-961f-82ee72b054a4
* * config/msp430/msp430.md (extendhipsi2): Use 20-bit form of RLAM/RRAM.dj2014-09-121-3/+3
| | | | | | | | (extend_and_shift1_hipsi2): Likewise. (extend_and_shift2_hipsi2): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215230 138bc75d-0d04-0410-961f-82ee72b054a4
* Also turn off OPTION_MASK_ABI_X32 for -m16hjl2014-09-111-2/+3
| | | | | | | | | | Backport from mainline PR target/63228 * config/i386/i386.c (ix86_option_override_internal): Also turn off OPTION_MASK_ABI_X32 for -m16. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215195 138bc75d-0d04-0410-961f-82ee72b054a4
* [AArch64] Cheap fix for argument types of vmull_high_lane_{us}{16,32}jgreenhalgh2014-09-111-4/+4
| | | | | | | | | | | | * config/aarch64/arm_neon.h (vmull_high_lane_s16): Fix argument types. (vmull_high_lane_s32): Likewise. (vmull_high_lane_u16): Likewise. (vmull_high_lane_u32): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215178 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport r214946: [AArch64] One-liner: fix type of an add in SIMD registersalalaw012014-09-111-1/+1
| | | | | | | | gcc/: * config/aarch64/aarch64.md (adddi3_aarch64): Set type to neon_add. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215175 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport r214953 from mainlinealalaw012014-09-111-246/+240
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2014-09-05 Alan Lawrence <alan.lawrence@arm.com> gcc/: * config/aarch64/arm_neon.h (int32x1_t, int16x1_t, int8x1_t, uint32x1_t, uint16x1_t, uint8x1_t): Remove typedefs. (vqabsb_s8, vqabsh_s16, vqabss_s32, vqaddb_s8, vqaddh_s16, vqadds_s32, vqaddb_u8, vqaddh_u16, vqadds_u32, vqdmlalh_s16, vqdmlalh_lane_s16, vqdmlals_s32, vqdmlslh_s16, vqdmlslh_lane_s16, vqdmlsls_s32, vqdmulhh_s16, vqdmulhh_lane_s16, vqdmulhs_s32, vqdmulhs_lane_s32, vqdmullh_s16, vqdmullh_lane_s16, vqdmulls_s32, vqdmulls_lane_s32, vqmovnh_s16, vqmovns_s32, vqmovnd_s64, vqmovnh_u16, vqmovns_u32, vqmovnd_u64, vqmovunh_s16, vqmovuns_s32, vqmovund_s64, vqnegb_s8, vqnegh_s16, vqnegs_s32, vqrdmulhh_s16, vqrdmulhh_lane_s16, vqrdmulhs_s32, vqrdmulhs_lane_s32, vqrshlb_s8, vqrshlh_s16, vqrshls_s32, vqrshlb_u8, vqrshlh_u16, vqrshls_u32, vqrshrnh_n_s16, vqrshrns_n_s32, vqrshrnd_n_s64, vqrshrnh_n_u16, vqrshrns_n_u32, vqrshrnd_n_u64, vqrshrunh_n_s16, vqrshruns_n_s32, vqrshrund_n_s64, vqshlb_s8, vqshlh_s16, vqshls_s32, vqshlb_u8, vqshlh_u16, vqshls_u32, vqshlb_n_s8, vqshlh_n_s16, vqshls_n_s32, vqshlb_n_u8, vqshlh_n_u16, vqshls_n_u32, vqshlub_n_s8, vqshluh_n_s16, vqshlus_n_s32, vqshrnh_n_s16, vqshrns_n_s32, vqshrnd_n_s64, vqshrnh_n_u16, vqshrns_n_u32, vqshrnd_n_u64, vqshrunh_n_s16, vqshruns_n_s32, vqshrund_n_s64, vqsubb_s8, vqsubh_s16, vqsubs_s32, vqsubb_u8, vqsubh_u16, vqsubs_u32, vsqaddb_u8, vsqaddh_u16, vsqadds_u32, vuqaddb_s8, vuqaddh_s16, vuqadds_s32): Replace all int{32,16,8}x1_t with int{32,16,8}_t. gcc/testsuite/: * gcc.target/aarch64/scalar_intrinsics.c (*): Replace all int{32,16,8}x1_t with int{32,16,8}_t. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215173 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/gjl2014-09-111-6/+36
| | | | | | | | | | | | | | | | | | | | | | Backport from 2014-09-11 trunk r215152. PR target/63223 * config/avr/avr.md (*tablejump.3byte-pc): New insn. (*tablejump): Restrict to !AVR_HAVE_EIJMP_EICALL. Add void clobber. (casesi): Expand to *tablejump.3byte-pc if AVR_HAVE_EIJMP_EICALL. libgcc/ Backport from 2014-09-11 trunk r215152. PR target/63223 * config/avr/libgcc.S (__tablejump2__): Rewrite to use RAMPZ, ELPM and R24 as needed. Make work for all devices and .text locations. (__do_global_ctors, __do_global_dtors): Use word addresses. (__tablejump__, __tablejump_elpm__): Remove functions. * t-avr (LIB1ASMFUNCS): Remove _tablejump, _tablejump_elpm. Add _tablejump2. (XICALL, XIJMP): New macros. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215153 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-09-10 Michael Meissner <meissner@linux.vnet.ibm.com>meissner2014-09-101-11/+11
| | | | | | | | | | | | | | | Backport from mainline 2014-09-10 Michael Meissner <meissner@linux.vnet.ibm.com> * config/rs6000/vsx.md (vsx_fmav4sf4): Use correct constraints for V2DF, V4SF, DF, and DI modes. (vsx_fmav2df2): Likewise. (vsx_float_fix_<mode>2): Likewise. (vsx_reduc_<VEC_reduc_name>_v2df_scalar): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215139 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport r215136 from trunkdavidxl2014-09-101-2/+8
| | | | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215137 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-09-09 Bill Schmidt <wschmidt@us.ibm.com>wschmidt2014-09-091-1/+1
| | | | | | | | | | | | | | | | | | | | Backported from mainline 2014-09-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * config/rs6000/vsx.md (*vsx_extract_<mode>_load): Always match selection of 0th memory doubleword, regardless of endianness. 2014-09-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com> Backported from mainline 2014-09-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * gcc.target/powerpc/vsx-extract-1.c: Test 0th doubleword regardless of endianness. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215096 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/62040carrot2014-09-042-4/+42
| | | | | | | | | | | | | * config/aarch64/iterators.md (VQ_NO2E, VQ_2E): New iterators. * config/aarch64/aarch64-simd.md (move_lo_quad_internal_<mode>): Split it into two patterns. (move_lo_quad_internal_be_<mode>): Likewise. * gcc.target/aarch64/pr62040.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@214913 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/62261kkojima2014-09-021-0/+36
| | | | | | | | | | * config/sh/sh.md (ashlsi3): Handle negative shift count for TARGET_SHMEDIA. (ashldi3, ashrsi3, ashrdi3, lshrsi3, lshrdi3): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@214833 138bc75d-0d04-0410-961f-82ee72b054a4
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