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authorDoug Gilbert <dgilbert999@users.noreply.github.com>2017-10-13 09:24:09 -0500
committerGitHub <noreply@github.com>2017-10-13 09:24:09 -0500
commitc13849780c80d1ed466efbeaabcc663fe48cd87d (patch)
tree2c0223224c8d7c263087cdc2bb8da39bf8dc7bb7 /gcc/config
parentf8c463f16d47773cfd9946a8948a50efde3fee14 (diff)
parent35b1c5c7fb6699541b35cd0fd6414d08b9af5ebe (diff)
downloadppe42-gcc-gcc-4_9_2-ppe42.tar.gz
ppe42-gcc-gcc-4_9_2-ppe42.zip
Merge pull request #5 from dgilbert999/gcc-4_9_2-ppe42gcc-4_9_2-ppe42
unsupported insn for bswap emitted
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/rs6000/rs6000.md2
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index c4af8d35bc5..59a346261c1 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -2412,7 +2412,7 @@
[(set (match_operand:SI 0 "reg_or_mem_operand" "")
(bswap:SI
(match_operand:SI 1 "reg_or_mem_operand" "")))]
- ""
+ "rs6000_cpu != PROCESSOR_PPE42"
{
if (!REG_P (operands[0]) && !REG_P (operands[1]))
operands[1] = force_reg (SImode, operands[1]);
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