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* Clarify CFAM failure reason04-16-2019Raptor Engineering Development Team2019-04-191-1/+9
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* Add Blackbird supportRaptor Engineering Development Team2019-04-195-4/+28
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* Add Talos supportRaptor Engineering Development Team2019-04-195-3/+30
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* tests: Fix the core address calculationAmitay Isaacs2019-03-281-3/+3
| | | | | | | fake.dts was changed to have fixed addresses for core (to be able to test exact dn name match). Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* libpdbg/p8chip.c: Emulate sreset using ramming for active threadsNicholas Piggin2019-03-271-3/+128
| | | | | | | | | | | | | | Based on patch from Alistair, some fixes and changes: - account HILE bit, set/clear MSR_LE - clear MSR_PR - don't use raw ramming (clearer this way, not perf critical) At the moment, must manually stop all threads in the core, and manually restart them. Can change behaviour depending on what exactly we want (e.g., sreset all threads may be good for debugging). Signed-off-by: Alistair Popple <alistair@popple.id.au> Tested-by: Stewart Smith <stewart@linux.ibm.com>
* libpdbg/p8chip.c: ram state setup sequence match workbookNicholas Piggin2019-03-271-28/+13
| | | | | | | | | | | | | | | | | | This makes a few changes to stop and ram procedure. First of all, the existing thread_stop procedure is also setting up some of the ram state. Change that to just do the stop sequence from the workbook, and move the ram stuff into ram setup and destroy. The workbook calls for inactive threads being rammed to set a thread active state before ram mode is exited, in order for GPRs modified by ramming to avoid getting lost. Currently the code does that in the stop sequence before ram mode is activated. The code also currently deasserts the thread active bit after exiting ram mode, which is not part of the workbook, so this is no longer done. Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
* libpdbg: use MTMSRD opcode rather than MTMSRNicholas Piggin2019-03-271-1/+1
| | | | XXX: have to ensure this still does the right thing on P9
* libpdbg/p8chip.c: release special wakeups for P8Nicholas Piggin2019-03-271-9/+58
| | | | | | This copies the special wakeup release logic from p9chip.c Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
* Revert incorrect version of "libpdbg/p8chip.c: Emulate sreset using ramming..."Alistair Popple2019-03-271-76/+6
| | | | | | This reverts commit 3ce2bc04c70bf6f961a62a380f7b4459445ed2da. Signed-off-by: Alistair Popple <alistair@popple.id.au>
* Revert incorrect version of "libpdbg/p8chip.c: ram state setup sequence ..."Alistair Popple2019-03-271-13/+28
| | | | | | This reverts commit eb1d866e30a1f8488fb794776bb5a1e0bc42d2e5. Signed-off-by: Alistair Popple <alistair@popple.id.au>
* Revert incorrect version of "libpdbg: use MTMSRD opcode rather than MTMSR"Alistair Popple2019-03-271-1/+1
| | | | | | This reverts commit f795d2904010c0b2e2ad8d8163dffc906ce8cef7. Signed-off-by: Alistair Popple <alistair@popple.id.au>
* Revert incorrect version of "libpdbg/p8chip.c: release special wakeups for P8"Alistair Popple2019-03-271-53/+8
| | | | | | | | This reverts commit 7de0ee34699e297f1f224fce1790c3cd03bc2f32. The incorrect version of "libpdbg/p8chip.c: release special wakeups for P8" was applied, the next patch will commit the correct version. Signed-off-by: Alistair Popple <alistair@popple.id.au>
* path: Avoid a match for nested nodes of the same classAmitay Isaacs2019-03-261-0/+13
| | | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org> Tested-by: Rashmica Gupta <rashmica.g@gmail.com>
* tests: Add a test for dn name matchAmitay Isaacs2019-03-262-1/+25
| | | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org> Tested-by: Rashmica Gupta <rashmica.g@gmail.com>
* path: Match targets with dn name correctlyAmitay Isaacs2019-03-261-3/+5
| | | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org> Tested-by: Rashmica Gupta <rashmica.g@gmail.com>
* api: Fix API interface for external usageArtem Senichev2019-03-262-1/+8
| | | | | | | | | | | 1. File 'ccan/short_types/short_types.h' is not used by external interface and should be used as internal dependency only (ccan directory is not installed by make script). 2. Extern "C" declaration of API allows us to call libpdbg functions from C++ modules. Signed-off-by: Artem Senichev <artemsen@gmail.com> Signed-off-by: Alistair Popple <alistair@popple.id.au>
* main: Use new api to read/write memoryAmitay Isaacs2019-03-263-22/+14
| | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* adu: Add new api for memory read/writeAmitay Isaacs2019-03-262-0/+23
| | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* adu: Set default blocksize for aduAmitay Isaacs2019-03-261-0/+6
| | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* adu: Add read/write methods for adu targetAmitay Isaacs2019-03-262-0/+6
| | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* adu: Convert __adu_{get, put}mem_blocksize to adu functionsAmitay Isaacs2019-03-261-23/+53
| | | | | | This will help add a generic read/write methods for adu class. Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* libpdbg/p8chip.c: Emulate sreset using ramming for active threadsNicholas Piggin2019-03-081-6/+76
| | | | | | | | | | | Based on patch from Alistair, some fixes and changes: - account HILE bit, set/clear MSR_LE - clear MSR_PR - don't use raw ramming (clearer this way, not perf critical) At the moment, must manually stop all threads in the core, and manually restart them. Can change behaviour depending on what exactly we want (e.g., sreset all threads may be good for debugging).
* libpdbg/p8chip.c: ram state setup sequence match workbookNicholas Piggin2019-03-081-28/+13
| | | | | | | | | | | | | | | | | | This makes a few changes to stop and ram procedure. First of all, the existing thread_stop procedure is also setting up some of the ram state. Change that to just do the stop sequence from the workbook, and move the ram stuff into ram setup and destroy. The workbook calls for inactive threads being rammed to set a thread active state before ram mode is exited, in order for GPRs modified by ramming to avoid getting lost. Currently the code does that in the stop sequence before ram mode is activated. The code also currently deasserts the thread active bit after exiting ram mode, which is not part of the workbook, so this is no longer done. Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
* libpdbg: use MTMSRD opcode rather than MTMSRNicholas Piggin2019-03-081-1/+1
| | | | XXX: have to ensure this still does the right thing on P9
* libpdbg/p8chip.c: release special wakeups for P8Nicholas Piggin2019-03-081-8/+53
| | | | | | This copies the special wakeup release logic from p9chip.c Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
* libpdbg/p8chip.c: Only write the SP_STOP bit onceNicholas Piggin2019-03-081-2/+4
| | | | | | | | | The workbook recipe is to write SP_STOP once, then poll for status. Also add a small delay between polling to give a reasonable timeout and avoid hitting the scom bus hard for no good reason. Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
* libpdbg/p8chip.c: read status from correct targetNicholas Piggin2019-03-081-1/+1
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* libpdbg: Fix CHECK_ERR macro to evaluate once in error caseNicholas Piggin2019-03-081-2/+3
| | | | Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
* main: Set I2C backend device specified in argumentsArtem Senichev2019-02-051-0/+8
| | | | | | | | | Restores the functionality that allows to set I2C backend device through command line arguments, it was broken by commit dacc9b57e4615f125eb1f56d842a64c40abb1408 Signed-off-by: Artem Senichev <artemsen@gmail.com> Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
* adu: Add arugments for block sizeAlistair Popple2018-12-185-75/+207
| | | | | | | | | | | | | | Not all memory can be read with the default ADU block size of 8 bytes. Specifically cache-inhibited access to some MMIO regions such as PCIe BAR spaces requires 4 byte accesses to avoid check stopping the machine. This patch adds library functions to read/write IO memory which takes a block size argument and two new put/getmemio commands to allow a specific block size to be specified from the command line. Signed-off-by: Alistair Popple <alistair@popple.id.au> Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
* optcmd: Add parser for 8-bit power of 2 integersAlistair Popple2018-12-112-0/+27
| | | | Signed-off-by: Alistair Popple <alistair@popple.id.au>
* README: Add information about target selectionAmitay Isaacs2018-12-071-1/+52
| | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* dtc: Drop chip-id propertyAmitay Isaacs2018-12-072-3/+0
| | | | | | The property "chip-id" is not used any more in pdbg. Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* libpdbg: Drop pdbg_target_chip_id()Amitay Isaacs2018-12-072-19/+0
| | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* libpdbg: Use index instead of chip-id for idAmitay Isaacs2018-12-073-8/+11
| | | | | | | Instead of using two different ways to id various chiplets, consistently use "index" property. Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* libpdbg: Fix probing of pibAmitay Isaacs2018-12-071-1/+1
| | | | | | The kernel uses "%08x" to create a directory in debugfs. Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* main: Drop unused target_select/target_selected functionsAmitay Isaacs2018-12-032-15/+1
| | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* main: Convert gdbserver command to path based targetingAmitay Isaacs2018-12-031-39/+38
| | | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org> Reviewed-by: Rashmica Gupta <rashmica.g@gmail.com>
* main: Convert htm commands to path based targetingAmitay Isaacs2018-12-031-44/+62
| | | | | | | | | If none of the expected targets are selected, log an error. core htm - core target nest htm - pib target Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* main: Drop unused iterators with callbacksAmitay Isaacs2018-12-032-69/+0
| | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* main: Convert regs command to path based targetingAmitay Isaacs2018-12-031-34/+33
| | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* main: Convert threadstatus command to path based targetingAmitay Isaacs2018-12-031-92/+91
| | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* main: Convert thread commands start/stop/step/sresetAmitay Isaacs2018-12-031-25/+50
| | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* main: Convert getring to path based targetingAmitay Isaacs2018-12-031-18/+38
| | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* main: Mark print_target staticAmitay Isaacs2018-12-031-1/+1
| | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* main: Move device_node setting before parse_optionsAmitay Isaacs2018-12-031-3/+6
| | | | | | | Parsing -l options requires device_node to be set. It is used in pir_map() to map Linux CPU to proc/core/thread. Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* libpdbg: Split nhtm hardware units for p8 and p9Amitay Isaacs2018-12-031-6/+21
| | | | | | | | | | Even though device tree compatible property can hold multiple strings, the struct pdbg_target definition can only take a single compatible string. Also, rename chtm hw unit to match nhtm. Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* libpdbg: Remove zalloc macroAlistair Popple2018-12-031-2/+1
| | | | | Signed-off-by: Alistair Popple <alistair@popple.id.au> Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
* main: Ignore nodes that do not have class namesAmitay Isaacs2018-11-161-1/+6
| | | | | | | | | It's possible that pdbg doesn't have hw units defined for all the nodes in the device tree. So if we encounter a node without class name ignore that node while matching path. Signed-off-by: Amitay Isaacs <amitay@ozlabs.org> Reviewed-by: Alistair Popple <alistair@popple.id.au>
* main: Convert register functions to path based targetingAmitay Isaacs2018-11-161-60/+95
| | | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org> Reviewed-by: Alistair Popple <alistair@popple.id.au>
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