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* Add initial S2RAM power plane support to Blackbird FPGAHEADv1.02masterRaptor Engineering Development Team2021-10-291-4/+59
| | | | | | | | | This enables support for the standby-coupled VDDRA 1.2V power plane on Blackbird planar revision 1.02 and above. NOTE: When building the FPGA image for Blackbird planar revision 1.01 or below, PLATFORM_HAS_S2RAM_POWER_PLANES must be set to 0 to avoid incorrect firmware operation.
* Re-enable pg_reg accessv1.01Raptor Engineering Development Team2019-06-131-9/+7
| | | | Bump version number
* Fix mode set jumpers not being reported to hostRaptor Engineering Development Team2019-06-131-1/+1
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* Fix a few wire declarations that should have been registersRaptor Engineering Development Team2019-06-131-7/+7
| | | | | | | Set FPGA reset line to output reg instead of inout These changes fixed synthesis warnings / overrides, and are not expected to change the functionality of the resultant bitstreams.
* Mark boot phase pin as pullupv1.00Raptor Engineering Development Team2019-05-102-3/+14
| | | | | | | The AST2500 GPIO pins require external pullup or pulldown resistors if they are to be used as inputs. Use pullup to retain the same conventions as Talos II.
* Fix U-boot phase LED blink orderRaptor Engineering Development Team2019-05-031-3/+3
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* Disable HDD LED if chassis power is offRaptor Engineering Development Team2019-05-031-3/+8
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* Add option to invert HDD LED signallingRaptor Engineering Development Team2019-05-031-4/+16
| | | | This can be used to restore expected operation when NVMe drives are installed with an inverted ready line
* Switch audio powerdown signal to input and expose to host via manufacturing ↵Raptor Engineering Development Team2018-10-092-8/+3
| | | | debug registers
* Enable power and SATA LEDsRaptor Engineering Development Team2018-09-302-15/+60
| | | | Rename audio disable for clarity, and enable audio by default
* Initial Remus variantRaptor Engineering Development Team2018-09-303-248/+93
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* Fix regulator test modeRaptor Engineering Development Team2018-06-141-6/+8
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* Add regulator test mode for manufacturingRaptor Engineering Development Team2018-06-111-7/+9
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* Enable pullup on secondary CPU presence detect pinRaptor Engineering Development Team2018-06-062-3/+13
| | | | Bump FPGA version
* Fix LICENSE textRaptor Engineering Development Team2018-05-171-1/+1
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* Remove ATX power good filtering logicRaptor Engineering Development Team2018-05-131-23/+1
| | | | | ATX PG must remain high for minimum periods according to the specification Don't try to work around faulty external power supply designs
* Move ATX force enable to I2C register 0x33Raptor Engineering Development Team2018-05-132-13/+22
| | | | | | Expose mode select jumper to host Switch ATX PG filter to slower clock source and reduce counter width Bump FPGA version in preparation for release
* Extend ATX power enable signalRaptor Engineering Development Team2018-05-021-34/+36
| | | | | | | The ATX specification allows up to 500ms for the ATX power good signal to be asserted after power on request Extend time from power on request to fault condition set to about 800ms in order to ensure that PSUs close to the specification margins do not induce spurious faults.
* Update BMC reset logicRaptor Engineering Development Team2018-04-261-3/+3
| | | | Reset now attempted after 30 seconds of failure to exit U-boot
* Fix BMC watchdogRaptor Engineering Development Team2018-04-232-60/+83
| | | | | | Debounce ATX power good to work around certain Delta PSUs asserting PG before rails can be loaded Initialize various registers to 0 to save die area Bump version number for further development
* Wire second debug jumper as VGA disable, and expose value to hostRaptor Engineering Development Team2018-04-142-5/+4
| | | | Bump revision number reported to 0x07
* Fix BMC-initiated error clearRaptor Engineering Development Team2018-04-111-2/+2
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* Add BMC startup watchdogRaptor Engineering Development Team2018-03-071-1/+23
| | | | This works around ASpeed fast blink boot hang errata (app note #3)
* Add LED override readbackRaptor Engineering Development Team2018-02-191-0/+3
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* Add manufacturing fault trace logic for power sequencingRaptor Engineering Development Team2018-02-131-6/+22
| | | | Explicitly call out register addresses
* Enhance front panel LED compatibility with SuperMicro chassis optionsRaptor Engineering Development Team2018-01-281-6/+21
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* Add pullup on FlexVer™ reset lineRaptor Engineering Development Team2018-01-231-2/+12
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* Separate BMC status and chassis reset request linesRaptor Engineering Development Team2018-01-222-16/+8
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* Remove DD1 VCS overcurrent bug hackRaptor Engineering Development Team2018-01-222-11/+1
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* Add I2C write capabilityRaptor Engineering Development Team2018-01-193-7/+63
| | | | Add front panel LED override
* Switch U-Boot phase indicators to staggered faderRaptor Engineering Development Team2018-01-171-6/+37
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* Indicate BMC boot phase as follows:Raptor Engineering Development Team2018-01-171-6/+48
| | | | | 1.) Initial power-on / U-Boot: KR pattern 2.) Kernel / userspace booting: fading pattern
* Correct polarity of BMC boot complete signalRaptor Engineering Development Team2018-01-172-9/+39
| | | | Use fading startup pattern instead of prior KR pattern
* Fix power rails not going offline on system shutdownRaptor Engineering Development Team2018-01-171-2/+2
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* Speed BMC boot pattern up somewhatRaptor Engineering Development Team2018-01-171-2/+2
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* Enable network link and activity LEDs on front and rear panelRaptor Engineering Development Team2018-01-171-12/+77
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* Expose power good/enable busses to I2C for debugging and diagnostic purposesRaptor Engineering Development Team2018-01-161-0/+16
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* Use open drain output on CPU standby reset lineRaptor Engineering Development Team2018-01-161-2/+15
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* Take fan controller out of reset when BMC power good is establishedRaptor Engineering Development Team2018-01-131-2/+2
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* Convert combinatorial logic to registered logic to work around apparent ↵Raptor Engineering Development Team2018-01-123-113/+201
| | | | | | | | | Yosys bug Add initial internal oscillator Fix license in PCF file Tested to work on initial Talos™ II hardware
* Fix license template in MakefileRaptor Engineering Development Team2018-01-071-3/+20
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* Add vendor ID registersRaptor Engineering Development Team2017-12-311-3/+22
| | | | Add CPU1 presence detect to response field
* Properly generate programming fileRaptor Engineering Development Team2017-12-301-2/+2
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* Add initial Talos™ II front panel control logicRaptor Engineering Development Team2017-12-303-15/+128
| | | | Add initial Talos™ II system control logic
* Remove spurious power_sequencer.v fileRaptor Engineering Development Team2017-12-302-224/+2
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* Initial buildable variant for Talos™ IIRaptor Engineering Development Team2017-12-306-621/+847
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* Initial conversion pass VHDL to VerilogRaptor Engineering Development Team2017-12-299-1603/+1038
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* Prepare files for Talos™ II modificationsRaptor Engineering Development Team2017-12-293-130/+130
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* Initial import of Romulus support filesIBM2017-12-294-0/+1603
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