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* doc: Tidy up first part of top-level README fileRobert P. J. Day2016-01-081-85/+43
| | | | | | | | | | | | First (small) pass at tidying up the README file, including: * remove references to obsolete CREDITS file * remove (some) references to obsolete boards.cfg file * remove at least one reference to a "scrapped" board * cut down unnecessarily detailed directory hierarchy * bunch of grammar and spelling tweaks Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* armv8: fsl-layerscale: Rewrite reserving memory for MC and debug serverYork Sun2015-12-151-2/+2
| | | | | | | | | | | MC and debug server are not board-specific. Move reserving memory to SoC file, using the new board_reserve_ram_top function. Reduce debug server memory by 2MB to make room for secure memory. In the system with MC and debug server, the top of u-boot memory is not the end of memory. PRAM is not used for this reservation. Signed-off-by: York Sun <yorksun@freescale.com>
* common: Rewrite hiding the end of memoryYork Sun2015-12-151-1/+1
| | | | | | | | | | | As the name may be confusing, the CONFIG_SYS_MEM_TOP_HIDE reserves some memory from the end of ram, tracked by gd->ram_size. It is not always the top of u-boot visible memory. Rewrite the macro with a weak function to provide flexibility for complex calcuation. Legacy use of this macro is still supported. Signed-off-by: York Sun <yorksun@freescale.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Reserve secure memoryYork Sun2015-12-151-0/+8
| | | | | | | | | | | | | | | Secure memory is at the end of memory, separated and reserved from OS, tracked by gd->secure_ram. Secure memory can host MMU tables, security monitor, etc. This is different from PRAM used to reserve private memory. PRAM offers memory at the top of u-boot memory, not necessarily the real end of memory for systems with very large DDR. Using the end of memory simplifies MMU setup and avoid memory fragmentation. "bdinfo" command shows gd->secure_ram value if this memory is marked as secured. Signed-off-by: York Sun <yorksun@freescale.com>
* armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha2015-11-301-0/+3
| | | | | | | | | | | LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun <yorksun@freescale.com>
* eeprom: Zap CONFIG_SPI_XMarek Vasut2015-11-211-5/+0
| | | | | | | | | | This macro is no longer used, so just reap it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
* video: input: Clean up after i8042 conversionSimon Glass2015-11-191-17/+12
| | | | | | | | | Now that i8042 uses driver model, adjust other mentions of it and remove old code that is no-longer used. Update the README and unify the keyboard text into one place. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Drop CONFIG_ISA_KEYBOARDSimon Glass2015-11-191-5/+0
| | | | | | | This option is mentioned but does not do anything. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* video: Drop unused console functionsSimon Glass2015-11-191-7/+0
| | | | | | | | | | | | | | | | | | CONFIG_CONSOLE_CURSOR, CONFIG_SYS_CONSOLE_BLINK_COUNT and CONFIG_CONSOLE_TIME are not used by any board. The implementation is not great and stands in the way of a refactor of i8042. Drop these for now. They can be re-introduced quite easily later, perhaps with driver-model real-time-clock (RTC) support. When reintroducing, it might be useful to make a few changes: - Blink time would be more useful than blink count - The confusing #ifdefs should be avoided - The time functions should support driver model - It would be best keyed off console_tstc() or some similar idle loop rather than a particular input driver (i8042 in this case) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: cros_ec: Convert cros_ec keyboard driver to driver modelSimon Glass2015-11-191-5/+0
| | | | | | | | Adjust the cros_ec keyboard driver to support driver model. Make this the default for all Exynos boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* board_init: Change the logic to setup malloc_baseFabio Estevam2015-11-121-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Prior to commit 5ba534d247d418 ("arm: Switch 32-bit ARM to using generic global_data setup") we used to have assembly code that configured the malloc_base address. Since this commit we use the board_init_f_mem() function in C to setup malloc_base address. In board_init_f_mem() there was a deliberate choice to support only early malloc() or full malloc() in SPL, but not both. Adapt this logic to allow both to be used, one after the other, in SPL. This issue has been observed in a Congatec board, where we need to retrieve the manufacturing information from the SPI NOR (the SPI API calls malloc) prior to configuring the DRAM. In this case as malloc_base was not configured we always see malloc to fail. With this change we are able to use malloc in SPL prior to DRAM gets initialized. Also update the CONFIG_SYS_SPL_MALLOC_START entry in the README file. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* i2c: ihs_i2c: Dual channel supportDirk Eibach2015-11-121-0/+9
| | | | | | | Support two i2c masters per FPGA. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2015-10-291-2/+10
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| * net: TFTP: variables cleanup and additionAlbert ARIBAUD \(3ADEV\)2015-10-281-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TFTP source and destination port variable names are 'tftpsrcp' and 'tftpdstp' in the code, but 'tftpsrcport' and 'tftpdstport' in the README file. Fix the README. Add environment variable 'tftptimeoutcountmax'. As per the comments about the global variable tftp_timeout_count_max, make sure tftptimeoutcountmax is nonnegative. Introduce configuration option CONFIG_NET_TFTP_VARS, which controls whether environment variables tftpblocksize, tftptimeout, and tftptimoueoutcountmax are read by the TFTP client code. CONFIG_NET_TFTP_VARS defaults to y but can be set to n by targets with to tight size contraints. Make bf527-ezkit set CONFIG_NET_TFTP_VARS to n to keep the target size below limit.
* | Merge git://git.denx.de/u-boot-dmTom Rini2015-10-271-2/+2
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| * | dm: tpm: Move tpm_tis_i2c to tpm_i2c_infineonChristophe Ricard2015-10-231-2/+2
| |/ | | | | | | | | | | | | | | | | | | As there is no TCG specification or recommendation for i2c TPM 1.2, move tpm_tis_i2c driver to tpm_i2c_infineon. Other tpm vendors like Atmel or STMicroelectronics may have a different transport protocol for i2c. Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ubi,ubifs: sync with linux v4.2Heiko Schocher2015-10-261-0/+4
|/ | | | | | | | | | | | | | | | | sync with linux v4.2 commit 64291f7db5bd8150a74ad2036f1037e6a0428df2 Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Aug 30 11:34:09 2015 -0700 Linux 4.2 This update is needed, as it turned out, that fastmap was in experimental/broken state in kernel v3.15, which was the last base for U-Boot. Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
* cmd: bootvx: Always get VxWorks bootline from envBin Meng2015-10-211-10/+2
| | | | | | | | | | | | | | | | | | | So far VxWorks bootline can be contructed from various environment variables, but when these variables do not exist we get these from corresponding config macros. This is not helpful as it requires rebuilding U-Boot, and to make sure these config macros take effect we should not have these environment variables. This is a little bit complex and confusing. Now we change the logic to always contruct the bootline from environments (the only single source), by adding two new variables "bootdev" and "othbootargs", and adding some comments about network related settings mentioning they are optional. The doc about the bootline handling is also updated. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
* arndale: Apply Cortex-A15 errata #773022 and #774769Ian Campbell2015-10-111-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We run 4 Arndale boards in our automated test framework, they have been running quite happily for quite some time using a Debian Wheezy userspace. However when upgrading to a Debian Jessie we started seeing frequent segmentation faults from gcc when building the kernel, to the extent that it is unable to successfully build the kernel twice in a row, and often fails on the first attempt. Searching around I found https://bugs.launchpad.net/arndale/+bug/1081417 which pointed towards http://www.spinics.net/lists/kvm-arm/msg03723.html and CPU Errata 773022 and 774769. This errata needs to be applied to all processors in an SMP system, meaning that the usual strategy of applying them in arch/arm/cpu/armv7/start.S is not appropriate (since that applies to the boot processor only). Instead we apply these errata in the secure monitor which is code that is traversed by all processors as they are brought up. The net affect on Arndale is that ACTLR changes from 0x40 to 0x2000042. I ran 17 kernel compile iterations overnight with no segfaults. Runtime testing was done on our v2014.10 based branch and forward ported (with only minimal and trivial contextual conflicts) to current master, where it has been build tested only. I suppose in theory these errata apply to any Exynos5250 based boards, but Arndale is the only one I have access to and I have therefore chosen to be conservative and only apply it there. Also, reorder CONFIG_ARM_ERRATA_794072 in README to make the list numerically sorted. Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
* I2C: mxc_i2c: make I2C1 and I2C2 optionalAlbert ARIBAUD \\(3ADEV\\)2015-10-021-2/+6
| | | | | | | | | | | | | | | | | | | The driver assumed that I2C1 and I2C2 were always enabled, and if they were not, then an asynchronous abort was (silently) raised, to be caught much later on in the Linux kernel. Fix this by making I2C1 and I2C2 optional just like I2C3 and I2C4 are. To make the change binary-invariant, declare I2C1 and I2C2 in every include/configs/ file which defines CONFIG_SYS_I2C_MXC. Also, while updating README about CONFIG_SYS_I2C_MXC_I2C1 and CONFIG_SYS_I2C_MXC_I2C2, add missing descriptions for I2C4 speed (CONFIG_SYS_MXC_I2C4_SPEED) and slave (CONFIG_SYS_MXC_I2C4_SLAVE) config options. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* arm: Remove unused ST-Ericsson u8500 archStefan Roese2015-09-151-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This arch does not seem to be supported / used at all in the current U-Boot mainline source tree any more. So lets remove the core u8500 code and code that was only referenced by this platform. Please note that this patch also removes these config options: - CONFIG_PL011_SERIAL_RLCR - CONFIG_PL011_SERIAL_FLUSH_ON_INIT As they only seem to be referenced by u8500 based boards. Without any such board in the current code, these config option don't make sense any more. Lets remove them as well. If someone still wants to use this platform, then please send patches to re-enable support by adding at least one board that references this code. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: John Rigby <john.rigby@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Tom Rini <trini@konsulko.com> Cc: Heiko Schocher <hs@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* tpm: Drop two unused optionsSimon Glass2015-08-311-6/+0
| | | | | | | | | | | The address of the I2C TPM is now defined in the device tree so there is no need for the CONFIG options. Remove them from the README and board config to avoid confusion. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* net: e1000: Add Kconfig optionsSimon Glass2015-08-211-3/+0
| | | | | | | Add Kconfig options in preparation for moving boards to use Kconfig. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* ARM: Introduce erratum workaround for 801819Nishanth Menon2015-08-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add workaround for Cortex-A15 ARM erratum 801819 which says in summary that "A livelock can occur in the L2 cache arbitration that might prevent a snoop from completing. Under certain conditions this can cause the system to deadlock. " Recommended workaround is as follows: Do both of the following: 1) Do not use the write-back no-allocate memory type. 2) Do not issue write-back cacheable stores at any time when the cache is disabled (SCTLR.C=0) and the MMU is enabled (SCTLR.M=1). Because it is implementation defined whether cacheable stores update the cache when the cache is disabled it is not expected that any portable code will execute cacheable stores when the cache is disabled. For implementations of Cortex-A15 configured without the “L2 arbitration register slice” option (typically one or two core systems), you must also do the following: 3) Disable write-streaming in each CPU by setting ACTLR[28:25] = 0b1111 So, we provide an option to disable write streaming on OMAP5 and DRA7. It is a rare condition to occur and may be enabled selectively based on platform acceptance of risk. Applies to: A15 revisions r2p0, r2p1, r2p2, r2p3 or r2p4 and REVIDR[3] is set to 0. Note: certain unicore SoCs *might* not have REVIDR[3] not set, but might not meet the condition for the erratum to occur when they donot have ACP (Accelerator Coherency Port) hooked to ACE (AXI Coherency Extensions). Such SoCs will need the work around handled in the SoC specific manner, since there is no ARM generic manner to detect such configurations. Based on ARM errata Document revision 18.0 (22 Nov 2013) Suggested-by: Richard Woodruff <r-woodruff2@ti.com> Suggested-by: Brad Griffis <bgriffis@ti.com> Reviewed-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
* Reproducible U-Boot build support, using SOURCE_DATE_EPOCHPaul Kocialkowski2015-07-271-0/+12
| | | | | | | | | | | | | | In order to achieve reproducible builds in U-Boot, timestamps that are defined at build-time have to be somewhat eliminated. The SOURCE_DATE_EPOCH environment variable allows setting a fixed value for those timestamps. Simply by setting SOURCE_DATE_EPOCH to a fixed value, a number of targets can be built reproducibly. This is the case for e.g. sunxi devices. However, some other devices might need some more tweaks, especially regarding the image generation tools. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* usb: CONFIG_USB_FASTBOOT prefix replacement for consistencyPaul Kocialkowski2015-07-221-2/+2
| | | | | | | | | | FASTBOOT is defined both by CONFIG_USB_FUNCTION_FASTBOOT AND CONFIG_CMD_FASTBOOT, so it doesn't make much sense to have a CONFIG_USB_FASTBOOT prefix for fastboot-specific options, especially given that other config options for fastboot use the CONFIG_FASTBOOT prefix. This replaces the CONFIG_USB_FASTBOOT prefix with CONFIG_FASTBOOT, for consistency. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* usb: Fastboot function config for better consistency with other functionsPaul Kocialkowski2015-07-221-0/+3
| | | | | | | | | | | | USB download gadget functions such as thor and dfu have a separate config option for the USB gadget part of the code, independent from the command part. This switches the fastboot USB gadget to the same scheme, for better consistency. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)
* usb: USB download gadget and functions config options coherent namingPaul Kocialkowski2015-07-221-1/+1
| | | | | | | | | | | | This introduces a coherent scheme for naming USB download gadget and functions config options. The download USB gadget config option is moved to CONFIG_USB_GADGET_DOWNLOAD for better consistency with other gadgets and each function's config option is moved to a CONFIG_USB_FUNCTION_ prefix. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)
* armv8/fsl-lsch3: Support 256M mem split for MC & dbg-srvrPrabhakar Kushwaha2015-07-201-0/+15
| | | | | | | | | | | | The agreed split of the top of memory is 256M for debug server and 256M for MC. This patch implements the split. In addition, the MC mem must be 512MB aligned, so the amount of memory to hide must be 512MB to achieve that alignment. Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* README: Remove CONFIG_SPI_FLASH_DATAFLASH help textJagan Teki2015-07-011-5/+0
| | | | | | Since the help text is added in drivers/mtd/spi/Kconfig Signed-off-by: Jagan Teki <jteki@openedev.com>
* README: Remove CONFIG_SPI_FLASH_BAR help textJagan Teki2015-07-011-5/+0
| | | | | | Since the help text is added in drivers/mtd/spi/Kconfig Signed-off-by: Jagan Teki <jteki@openedev.com>
* README: Remove CONFIG_SPI_FLASH_MTD help textJagan Teki2015-07-011-9/+0
| | | | | | Since the help text is added in drivers/mtd/spi/Kconfig Signed-off-by: Jagan Teki <jteki@openedev.com>
* README: Add CONFIG_SPI_FLASH_DATAFLASH descriptionJagan Teki2015-07-011-0/+5
| | | | | | | This patch adds CONFIG_SPI_FLASH_DATAFLASH descrition on README file for more readble for users. Signed-off-by: Jagan Teki <jteki@openedev.com>
* mtd, spi: Add MTD layer driverDaniel Schwierzeck2015-06-301-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MTD layer driver for spi, original patch from: http://git.denx.de/?p=u-boot/u-boot-mips.git;a=commitdiff;h=bb246819cdc90493dd7089eaa51b9e639765cced Changes from Heiko Schocher against this patch: - Remove compile error if not defining CONFIG_SPI_FLASH_MTD: LD drivers/mtd/spi/built-in.o drivers/mtd/spi/sf_probe.o: In function `spi_flash_mtd_unregister': /home/hs/abb/imx6/u-boot/drivers/mtd/spi/sf_internal.h:168: multiple definition of `spi_flash_mtd_unregister' drivers/mtd/spi/sf_params.o:/home/hs/abb/imx6/u-boot/drivers/mtd/spi/sf_internal.h:168: first defined here drivers/mtd/spi/sf_ops.o: In function `spi_flash_mtd_unregister': /home/hs/abb/imx6/u-boot/drivers/mtd/spi/sf_internal.h:168: multiple definition of `spi_flash_mtd_unregister' drivers/mtd/spi/sf_params.o:/home/hs/abb/imx6/u-boot/drivers/mtd/spi/sf_internal.h:168: first defined here make[1]: *** [drivers/mtd/spi/built-in.o] Fehler 1 make: *** [drivers/mtd/spi] Fehler 2 - Add a README entry. - Add correct writebufsize, to fit with Linux v3.14 MTD, UBI/UBIFS sync. Note (From Jagan): For testing raw mtd parition erase/read/write operations using cmd_sf, sf_mtd should be required to register the spi flash device to MTD layer but the sf_mtd_info ops were not required until and unless if we use any flash filesystem layer say for example UBI. Due to this the foot-print got increased ~290bytes in non-UBI case here that should be acceptible. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Jagannadh Teki <jteki@openedev.com> Reviewed-by: Jagannadh Teki <jteki@openedev.com>
* Move defaults from config_cmd_default.h to KconfigJoe Hershberger2015-06-251-3/+1
| | | | | | | | | | This sets the default commands Kconfig to match include/config_cmd_default.h commands in the common/Kconfig and removes them from include/configs. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> [trini: rastaban, am43xx_evm_usbhost_boot, am43xx_evm_ethboot updates] Signed-off-by: Tom Rini <trini@konsulko.com>
* README: Describe CONFIG_SYS_NO_FLASHChris Packham2015-06-191-0/+13
| | | | | | | | | | | Unlike most configuration options defining this actually disables support for a feature (parallel flash). Eventually the logic behind this should probably be flipped so that '#ifndef CONFIG_SYS_NO_FLASH' becomes '#ifdef CONFIG_HAS_PARALLEL_FLASH' but for now lets document the existing behaviour. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
* autoboot.c: Remove CONFIG_AUTOBOOT_STOP_STR2 and CONFIG_AUTOBOOT_DELAY_STR2Stefan Roese2015-06-081-2/+0
| | | | | | | | | | | | | | | These defines for a 2nd autoboot stop and delay string are nearly unused. Only sc3 defines CONFIG_AUTOBOOT_DELAY_STR2. And a patch to remove this most likely unmaintained board is also posted to the list. By removing these defines the code will become cleaner and moving the remaining compile options to Kconfig will get easier. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de>
* env: Add regex support to env_attrsJoe Hershberger2015-05-211-0/+8
| | | | | | | Allow the features that use env_attrs to specify regexs for the name Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-netTom Rini2015-05-201-15/+4
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| * net: Remove all references to CONFIG_ETHADDR and friendsJoe Hershberger2015-05-191-14/+2
| | | | | | | | | | | | | | | | | | | | We really don't want boards defining fixed MAC addresses in their config so we just remove the option to set it in a fixed way. If you must have a MAC address that was not provisioned, then use the random MAC address functionality. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * net: Implement random ethaddr fallback in eth.cJoe Hershberger2015-05-191-1/+2
| | | | | | | | | | | | | | | | | | Implement the random ethaddr fallback in eth.c so it is in a common place and not reimplemented in each board or driver that wants this behavior. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | console: Fix pre-console flushing via cfb_console being very slowHans de Goede2015-05-191-0/+3
|/ | | | | | | | | | | | | | | | | | | | | | | | | On my A10 OlinuxIno Lime I noticed a huge (5+ seconds) delay coming from console_init_r. This turns out to be caused by the preconsole buffer flushing to the cfb_console. The Lime only has a 16 bit memory bus and that is already heavy used to scan out the 1920x1080 framebuffer. The problem is that print_pre_console_buffer() was printing the buffer once character at a time and the cfb_console code then ends up doing a cache-flush for touched display lines for each character. This commit fixes this by first building a 0 terminated buffer and then printing it in one puts() call, avoiding unnecessary cache flushes. This changes the time for the flush from 5+ seconds to not noticable. The downside of this approach is that the pre-console buffer needs to fit on the stack, this is not that much to ask since we are talking about plain text here. This commit also adjusts the sunxi CONFIG_PRE_CON_BUF_SZ to actually fit on the stack. Sunxi currently is the only user of the pre-console code so no other boards need to be adjusted. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* README: fix typo in 'currently'Fabio Estevam2015-05-081-1/+1
| | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* x86: Remove the old VGA driverBin Meng2015-04-291-6/+0
| | | | | | | CONFIG_VIDEO_VGA is no longer needed thus remove it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-04-281-11/+0
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| * Revert "spi: add config option to enable the WP pin function on st micron ↵Jagannadha Sutradharudu Teki2015-04-231-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | flashes" This reverts commit 562f8df18da62ae02c4ace1e530451fe82c3312d. Note: Even un-reverting this patch couldn't works as expected, based on the latest testing from Heiko Schocher. Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Cc: Heiko Schocher <hs@denx.de>
* | armv8/ls2085a: Fix generic timer clock sourceYork Sun2015-04-231-0/+8
| | | | | | | | | | | | | | | | | | | | The timer clock is system clock divided by 4, not fixed 12MHz. This is common to the SoC, not board specific. Primary core is fixed when u-boot still runs in board_f. Secondary cores are fixed by reading a variable set by u-boot. Signed-off-by: York Sun <yorksun@freescale.com> CC: Mark Rutland <mark.rutland@arm.com>
* | driver/ddr/fsl: Add built-in memory test for DDR4 driverYork Sun2015-04-231-0/+3
| | | | | | | | | | | | | | | | | | Add built-in memory test to catch errors after DDR is initialized, before any other transactions. To enable this test, define CONFIG_FSL_DDR_BIST. An environmental variable "ddr_bist" is checked before starting test. It takes a while (several seconds) depending on system memory size. Signed-off-by: York Sun <yorksun@freescale.com>
* | driver/i2c/mxc: Enable I2C bus 3 and 4York Sun2015-04-231-0/+2
|/ | | | | | | | | Some SoCs have more than two I2C busses. Instead of adding ifdef to the driver, macros are put into board header file where CONFIG_SYS_I2C_MXC is defined. Signed-off-by: York Sun <yorksun@freescale.com> CC: Heiko Schocher <hs@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2015-04-201-0/+20
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