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* [mlir] Change the syntax of AffineMapAttr and IntegerSetAttr to avoid ↵River Riddle2020-01-133-79/+79
| | | | | | | | | | conflicts with function types. Summary: The current syntax for AffineMapAttr and IntegerSetAttr conflict with function types, making it currently impossible to round-trip function types(and e.g. FuncOp) in the IR. This revision changes the syntax for the attributes by wrapping them in a keyword. AffineMapAttr is wrapped with `affine_map<>` and IntegerSetAttr is wrapped with `affine_set<>`. Reviewed By: nicolasvasilache, ftynse Differential Revision: https://reviews.llvm.org/D72429
* [VectorOps] unify vector dialect "subscripts"Aart Bik2019-12-202-34/+34
| | | | PiperOrigin-RevId: 286650682
* [VectorOps] remove redundant returns from invalid ops testAart Bik2019-12-201-27/+0
| | | | PiperOrigin-RevId: 286640660
* [VectorOps] Update vector transfer_read/write ops to operatate on memrefs ↵Andy Davis2019-12-192-4/+45
| | | | | | | | | with vector element type. Update vector transfer_read/write ops to operatate on memrefs with vector element type. This handle cases where the memref vector element type represents the minimal memory transfer unit (or multiple of the minimal memory transfer unit). PiperOrigin-RevId: 286482115
* [VectorOps] Add vector ReshapeOp to the VectorOps dialect.Andy Davis2019-12-192-0/+77
| | | | | | Adds vector ReshapeOp to the VectorOps dialect. An aggregate vector reshape operation, which aggregates multiple hardware vectors, can enable optimizations during decomposition (e.g. loading one input hardware vector and performing multiple rotate and scatter store operations to the vector output). PiperOrigin-RevId: 286440658
* [VectorOps] minor cleanup: vector dialect "subscripts" are i32Aart Bik2019-12-192-12/+12
| | | | | | | | Introduces some centralized methods to move towards consistent use of i32 as vector subscripts. Note: sizes/strides/offsets attributes are still i64 PiperOrigin-RevId: 286434133
* [VectorOps] Add vector.print definition, with lowering supportAart Bik2019-12-182-0/+15
| | | | | | | | | | | | | | | | Examples: vector.print %f : f32 vector.print %x : vector<4xf32> vector.print %y : vector<3x4xf32> vector.print %z : vector<2x3x4xf32> LLVM lowering replaces these with fully unrolled calls into a small runtime support library that provides some basic printing operations (single value, opening closing bracket, comma, newline). PiperOrigin-RevId: 286230325
* Add pattern rewrite which splits a vector TransferWriteOp into slices ↵Andy Davis2019-12-171-10/+21
| | | | | | according to the unrolling/slicing scheme of its InsertSlicesOp operand. PiperOrigin-RevId: 286042578
* Add pattern rewrite to forward vector tuple elements to their users.Andy Davis2019-12-171-13/+4
| | | | | | User(TupleGetOp(ExtractSlicesOp(InsertSlicesOp(TupleOp(Producer))) -> User(Producer) PiperOrigin-RevId: 286020249
* Add pattern rewrite which splits a vector TransferReadOp into slices ↵Andy Davis2019-12-171-5/+12
| | | | | | according to the unrolling/slicing scheme of its ExtractSlicesOp user. PiperOrigin-RevId: 285975613
* Update vector op unrolling transformation to generate ExtractSlicesOp and ↵Andy Davis2019-12-171-151/+144
| | | | | | InsertSlicesOp (instead of less structured chain of StridedSliceOps and InsertStridedSliceOps). PiperOrigin-RevId: 285968051
* Add InsertSlicesOp to the VectorOps dialect.Andy Davis2019-12-162-0/+43
| | | | PiperOrigin-RevId: 285830394
* [VectorOps] Add [insert/extract]element definition together with lowering to ↵Aart Bik2019-12-162-1/+43
| | | | | | | | | | | | | | LLVM Similar to insert/extract vector instructions but (1) work on 1-D vectors only (2) allow for a dynamic index %c3 = constant 3 : index %0 = vector.insertelement %arg0, %arg1[%c : index] : vector<4xf32> %1 = vector.extractelement %arg0[%c3 : index] : vector<4xf32> PiperOrigin-RevId: 285792205
* Adds ExtractSlicesOp to the VectorOps dialect.Andy Davis2019-12-162-0/+68
| | | | | | | ExtractSlicesOp extracts slices of its vector operand and with a specified tiling scheme. This operation centralizes the tiling scheme around a single op, which simplifies vector op unrolling and subsequent pattern rewrite transformations. PiperOrigin-RevId: 285761129
* Add VectorOp transform pattern which splits vector TransferReadOps to target ↵Andy Davis2019-12-101-1/+65
| | | | | | vector unroll size. PiperOrigin-RevId: 284880592
* Uniformize Vector transforms as patterns on the model of Linalg - NFCNicolas Vasilache2019-12-101-0/+238
| | | | | | This reorganizes the vector transformations to be more easily testable as patterns and more easily composable into fused passes in the future. PiperOrigin-RevId: 284817474
* [VectorOps] Add a ShuffleOp to the VectorOps dialectAart Bik2019-12-092-14/+67
| | | | | | | | | | For example %0 = vector.shuffle %x, %y [3 : i32, 2 : i32, 1 : i32, 0 : i32] : vector<2xf32>, vector<2xf32> yields a vector<4xf32> result with a permutation of the elements of %x and %y PiperOrigin-RevId: 284657191
* [VectorOps] Fix off-by-one error in insert/extract validationAart Bik2019-12-091-0/+14
| | | | PiperOrigin-RevId: 284652653
* [VecOps] Rename vector.[insert|extract]element to just vector.[insert|extract]Aart Bik2019-12-062-38/+38
| | | | | | | Since these operations lower to [insert|extract][element|value] at LLVM dialect level, neither element nor value would correctly reflect the meaning. PiperOrigin-RevId: 284240727
* [VectorOps] Add lowering of vector.broadcast to LLVM IRAart Bik2019-12-061-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For example, a scalar broadcast %0 = vector.broadcast %x : f32 to vector<2xf32> return %0 : vector<2xf32> which expands scalar x into vector [x,x] by lowering to the following LLVM IR dialect to implement the duplication over the leading dimension. %0 = llvm.mlir.undef : !llvm<"<2 x float>"> %1 = llvm.mlir.constant(0 : index) : !llvm.i64 %2 = llvm.insertelement %x, %0[%1 : !llvm.i64] : !llvm<"<2 x float>"> %3 = llvm.shufflevector %2, %0 [0 : i32, 0 : i32] : !llvm<"<2 x float>">, !llvm<"<2 x float>"> return %3 : vector<2xf32> In the trailing dimensions, the operand is simply "passed through", unless a more elaborate "stretch" is required. For example %0 = vector.broadcast %arg0 : vector<1xf32> to vector<4xf32> return %0 : vector<4xf32> becomes %0 = llvm.mlir.undef : !llvm<"<4 x float>"> %1 = llvm.mlir.constant(0 : index) : !llvm.i64 %2 = llvm.extractelement %arg0[%1 : !llvm.i64] : !llvm<"<1 x float>"> %3 = llvm.mlir.constant(0 : index) : !llvm.i64 %4 = llvm.insertelement %2, %0[%3 : !llvm.i64] : !llvm<"<4 x float>"> %5 = llvm.shufflevector %4, %0 [0 : i32, 0 : i32, 0 : i32, 0 : i32] : !llvm<"<4 x float>">, !llvm<"<4 x float>"> llvm.return %5 : !llvm<"<4 x float>"> PiperOrigin-RevId: 284219926
* Unroll vector masks along with their associated vector arguments.Andy Davis2019-12-062-8/+4
| | | | | | | | | Updates vector ContractionOp to use proper vector masks (produced by CreateMaskOp/ConstantMaskOp). Leverages the following canonicalizations in unrolling unit test: CreateMaskOp -> ConstantMaskOp, StridedSliceOp(ConstantMaskOp) -> ConstantMaskOp Removes IndexTupleOp (no longer needed now that we have vector mask ops). Updates all unit tests. PiperOrigin-RevId: 284182168
* Add canonicalization patterns for vector CreateMaskOp and StridedSliceOp to ↵Andy Davis2019-12-043-0/+129
| | | | | | | | | | | be used in the unroll vector op transformation. Adds a ConstantMaskOp to the vector ops dialect. Adds the following canonicalization patterns: CreateMaskOp -> ConstantMaskOp StridedSliceOp(ConstantMaskOp) -> ConstantMaskOp PiperOrigin-RevId: 283816752
* Add CreateMaskOp to the VectorOps dialect.Andy Davis2019-12-032-0/+22
| | | | PiperOrigin-RevId: 283591888
* [VectorOps] Add legality rules to broadcastAart Bik2019-12-022-2/+20
| | | | PiperOrigin-RevId: 283360101
* [VectorOps] Refine BroadcastOp in VectorOps dialectAart Bik2019-11-262-8/+8
| | | | | | | | Since second argument is always fully overwritten and shape is define in "to" clause, it is not needed. Also renamed "into" to "to" now that arg is dropped. PiperOrigin-RevId: 282686475
* [VectorOps] Add a BroadcastOp to the VectorOps dialectAart Bik2019-11-262-0/+16
| | | | PiperOrigin-RevId: 282643305
* Add a vector.InsertStridedSliceOpNicolas Vasilache2019-11-252-7/+56
| | | | | | This new op is the counterpart of vector.StridedSliceOp and will be used for in the pattern rewrites for vector unrolling. PiperOrigin-RevId: 282447414
* Update VectorContractionOp to take iterator types and index mapping ↵Andy Davis2019-11-252-26/+180
| | | | | | attributes compatible with linalg ops. PiperOrigin-RevId: 282412311
* Add vector.insertelement opNicolas Vasilache2019-11-252-4/+48
| | | | | | | | | This is the counterpart of vector.extractelement op and has the same limitations at the moment (static I64IntegerArrayAttr to express position). This restriction will be filterd in the future. LLVM lowering will be added in a subsequent commit. PiperOrigin-RevId: 282365760
* Add VectorContractionOp to the VectorOps dialect.Andy Davis2019-11-202-0/+98
| | | | PiperOrigin-RevId: 281605471
* Add VectorOps.StridedSliceOpNicolas Vasilache2019-11-192-0/+71
| | | | | | | | | | | | | | | | | | | | | The `vector.strided_slice` takes an n-D vector, k-D `offsets` integer array attribute, a k-D `sizes` integer array attribute, a k-D `strides` integer array attribute and extracts the n-D subvector at the proper offset. Returns an n-D vector where the first k-D dimensions match the `sizes` attribute. The returned subvector contains the elements starting at offset `offsets` and ending at `offsets + sizes`. Example: ``` %1 = vector.strided_slice %0 {offsets : [0, 2], sizes : [2, 4], strides : [1, 1]}: vector<4x8x16xf32> // returns a vector<2x4x16xf32> ``` This op will be useful for progressive lowering within the VectorOp dialect. PiperOrigin-RevId: 281352749
* Move VectorOps to Tablegen - (almost) NFCNicolas Vasilache2019-11-142-0/+165
| | | | | | | | | | | | | | | | This CL moves VectorOps to Tablegen and cleans up the implementation. This is almost NFC but 2 changes occur: 1. an interface change occurs in the padding value specification in vector_transfer_read: the value becomes non-optional. As a shortcut we currently use %f0 for all paddings. This should become an OpInterface for vectorization in the future. 2. the return type of vector.type_cast is trivial and simplified to `memref<vector<...>>` Relevant roundtrip and invalid tests that used to sit in core are moved to the vector dialect. The op documentation is moved to the .td file. PiperOrigin-RevId: 280430869
* Extend vector.outerproduct with an optional 3rd argumentNicolas Vasilache2019-08-162-13/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL adds an optional third argument to the vector.outerproduct instruction. When such a third argument is specified, it is added to the result of the outerproduct and is lowered to FMA intrinsic when the lowering supports it. In the future, we can add an attribute on the `vector.outerproduct` instruction to modify the operations for which to emit code (e.g. "+/*", "max/+", "min/+", "log/exp" ...). This CL additionally performs minor cleanups in the vector lowering and adds tests to improve coverage. This has been independently verified to result in proper fma instructions for haswell as follows. Input: ``` func @outerproduct_add(%arg0: vector<17xf32>, %arg1: vector<8xf32>, %arg2: vector<17x8xf32>) -> vector<17x8xf32> { %2 = vector.outerproduct %arg0, %arg1, %arg2 : vector<17xf32>, vector<8xf32> return %2 : vector<17x8xf32> } } ``` Command: ``` mlir-opt vector-to-llvm.mlir -vector-lower-to-llvm-dialect --disable-pass-threading | mlir-opt -lower-to-cfg -lower-to-llvm | mlir-translate --mlir-to-llvmir | opt -O3 | llc -O3 -march=x86-64 -mcpu=haswell -mattr=fma,avx2 ``` Output: ``` outerproduct_add: # @outerproduct_add # %bb.0: ... vmovaps 112(%rbp), %ymm8 vbroadcastss %xmm0, %ymm0 ... vbroadcastss 64(%rbp), %ymm15 vfmadd213ps 144(%rbp), %ymm8, %ymm0 # ymm0 = (ymm8 * ymm0) + mem ... vfmadd213ps 400(%rbp), %ymm8, %ymm9 # ymm9 = (ymm8 * ymm9) + mem ... ``` PiperOrigin-RevId: 263743359
* Add a higher-order vector.outerproduct operation in MLIRNicolas Vasilache2019-08-092-5/+32
| | | | | | | | This CL is step 2/n towards building a simple, programmable and portable vector abstraction in MLIR that can go all the way down to generating assembly vector code via LLVM's opt and llc tools. This CL adds the vector.outerproduct operation to the MLIR vector dialect as well as the appropriate roundtrip test. Lowering to LLVM will occur in the following CL. PiperOrigin-RevId: 262552027
* Add a higher-order vector.extractelement operation in MLIRNicolas Vasilache2019-08-092-0/+49
This CL is step 2/n towards building a simple, programmable and portable vector abstraction in MLIR that can go all the way down to generating assembly vector code via LLVM's opt and llc tools. This CL adds the vector.extractelement operation to the MLIR vector dialect as well as the appropriate roundtrip test. Lowering to LLVM will occur in the following CL. PiperOrigin-RevId: 262545089
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