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path: root/llvm/utils/TableGen/X86RecognizableInstr.cpp
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* [ms] [X86] Use "P" modifier on all branch-target operands in inline X86 assem...Eric Astor2020-01-091-41/+41
* [llvm] Migrate llvm::make_unique to std::make_uniqueJonas Devlieghere2019-08-151-6/+6
* [X86] Limit vpermil2pd/vpermil2ps immediates to 4 bits in the assembly parser.Craig Topper2019-08-071-0/+2
* [X86] Add VP2INTERSECT instructionsPengfei Wang2019-05-311-0/+20
* [X86] Split the VEX_WPrefix in X86Inst tablegen class into 3 separate fields ...Craig Topper2019-04-091-20/+12
* [X86] Merge the different Jcc instructions for each condition code into singl...Craig Topper2019-04-051-1/+9
* [X86] Merge the different SETcc instructions for each condition code into sin...Craig Topper2019-04-051-1/+16
* [X86] Merge the different CMOV instructions for each condition code into sing...Craig Topper2019-04-051-5/+23
* fix typo: "\t" => " "Liang Zou2019-03-311-1/+1
* [X86] Allow any 8-bit immediate to be used with BT/BTC/BTR/BTS not just sign ...Craig Topper2019-03-181-0/+6
* [X86] Remove the _alt forms of (V)CMP instructions. Use a combination of cust...Craig Topper2019-03-181-4/+0
* [X86] Remove the _alt forms of AVX512 VPCMP instructions. Use a combination o...Craig Topper2019-03-171-2/+0
* [X86] Remove the _alt forms of XOP VPCOM instructions. Use a combination of c...Craig Topper2019-03-171-2/+0
* [X86] Print %st(0) as %st when its implicit to the instruction. Continue prin...Craig Topper2019-02-041-0/+2
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [X86] Don't ignore 0x66 prefix on relative jumps in 64-bit mode. Fix opcode s...Craig Topper2018-08-131-2/+2
* [X86] Add a new VEX_WPrefix encoding to tag EVEX instruction that have VEX.W=...Craig Topper2018-06-191-8/+16
* [X86] Rename vy512mem->vy512xmem and vz256xmem->vz256mem.Craig Topper2018-06-061-4/+4
* [X86] movdiri and movdir64b instructionsGabor Buella2018-05-011-0/+4
* [X86] Remove 'opaque ptr' from the intel syntax parser and printer.Craig Topper2018-05-011-8/+2
* [X86] Revert r330638 - accidental commitGabor Buella2018-04-231-4/+0
* [X86] movdiri and movdir64b instructionsGabor Buella2018-04-231-0/+4
* [X86] Remove an unnecessary HANDLE_OPTIONAL line from the disassembler operan...Craig Topper2018-04-221-1/+0
* [X86] Disassembler support for having an ADSIZE prefix affect instructions wi...Craig Topper2018-04-051-0/+4
* [X86][TableGen] Add a missing error check to make sure EVEX instructions use ...Craig Topper2018-04-031-1/+5
* [TableGen] Use llvm::cast instead of static_cast so that the cast will be che...Craig Topper2018-04-031-1/+1
* [X86] Add a new disassembler opcode map for 3DNow. Stop treating 3DNow as an ...Craig Topper2018-03-241-10/+8
* [X86] Use unique_ptr to simplify memory management. NFCCraig Topper2018-03-241-9/+7
* [X86] Use X86_INSTR_MRM_MAPPING macro instead of listing all MRM_C0-MRM_FF fo...Craig Topper2018-03-241-24/+5
* [X86] Remove an unnecessary switch around two other switches. NFCCraig Topper2018-03-241-69/+54
* [X86] Merge the Has3DNow0F0FOpcode TSFlag into the OpMap encoding. NFCCraig Topper2018-03-241-9/+10
* [X86] Add all of the MRM_C0-MRM_FF forms to the switch in RecognizableInstr::...Craig Topper2018-03-121-27/+20
* [X86][3DNOW] Teach decoder about AMD 3DNow! instrsRafael Auler2018-02-151-13/+16
* [X86] Revisit the fix I made years ago to make 'xchgl %eax, %eax' not encode ...Craig Topper2018-01-161-2/+0
* Avoid constructing an out-of-range value for an enumeration (which results in...Richard Smith2017-12-081-5/+4
* [X86] Fix disassembler table generation to prevent instructions tagged with '...Craig Topper2017-10-231-2/+3
* [X86] Fix disassembly of EVEX rounding control and SAE instructions.Craig Topper2017-10-231-16/+13
* [X86] Teach the disassembler that some instructions use VEX.W==0 without a co...Craig Topper2017-10-221-2/+4
* [X86] Fix disassembling of EVEX instructions to stop accidentally decoding th...Craig Topper2017-10-211-13/+13
* [tablegen] Avoid creating temporary stringsAlexander Shaposhnikov2017-07-051-1/+1
* fix trivial typos in comments; NFCHiroshi Inoue2017-07-041-1/+1
* [X86] Moving X86Local namespace from .cpp to .h file to use it in memory fold...Ayman Musa2017-05-111-124/+1
* Fixed assert message to correctly refer to MRMSrcReg4VOp3Frm/MRMSrcMeg4VOp3Frm.Simon Pilgrim2017-04-271-2/+2
* [X86][AVX] Extend hasVEX_WPrefix bit to accept WIG value (W Ignore) + update ...Ayman Musa2017-02-201-9/+13
* [X86] Merge the disassemblers handling of the different TYPE_RELs by getting ...Craig Topper2017-01-161-6/+6
* [X86] Reduce the number of operand 'types' the disassembler needs to deal wit...Craig Topper2017-01-161-87/+86
* [AVX-512] Begin giving the disassembler a way to recognize that VSIB is a dif...Craig Topper2017-01-161-15/+17
* [AVX-512] Correct memory operand size for VPGATHERQPS and VPGATHERQDCraig Topper2017-01-161-0/+2
* [X86] Create a new instruction format to handle 4VOp3 encoding. This saves on...Craig Topper2016-08-221-16/+25
* [X86] Create a new instruction format to handle MemOp4 encoding. This saves o...Craig Topper2016-08-221-15/+28
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