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authorRafael Auler <rafaelauler@fb.com>2018-02-15 21:20:31 +0000
committerRafael Auler <rafaelauler@fb.com>2018-02-15 21:20:31 +0000
commitde9ad4ba848729f0826131a947fdbaae98df6d05 (patch)
tree235da52f857bfe603877b4767a9494b868cb6ab7 /llvm/utils/TableGen/X86RecognizableInstr.cpp
parent775c7af4f9ff934a85d4b6d521fffc7f5ac26cc0 (diff)
downloadbcm5719-llvm-de9ad4ba848729f0826131a947fdbaae98df6d05.tar.gz
bcm5719-llvm-de9ad4ba848729f0826131a947fdbaae98df6d05.zip
[X86][3DNOW] Teach decoder about AMD 3DNow! instrs
Summary: This patch makes the decoder understand old AMD 3DNow! instructions that have never been properly supported in the X86 disassembler, despite being supported in other subsystems. Hopefully this should make the X86 decoder more complete with respect to binaries containing legacy code. Reviewers: craig.topper Reviewed By: craig.topper Subscribers: llvm-commits, maksfb, bruno Differential Revision: https://reviews.llvm.org/D43311 llvm-svn: 325295
Diffstat (limited to 'llvm/utils/TableGen/X86RecognizableInstr.cpp')
-rw-r--r--llvm/utils/TableGen/X86RecognizableInstr.cpp29
1 files changed, 16 insertions, 13 deletions
diff --git a/llvm/utils/TableGen/X86RecognizableInstr.cpp b/llvm/utils/TableGen/X86RecognizableInstr.cpp
index 81cd12f92a5..b2c30689d7f 100644
--- a/llvm/utils/TableGen/X86RecognizableInstr.cpp
+++ b/llvm/utils/TableGen/X86RecognizableInstr.cpp
@@ -80,19 +80,20 @@ RecognizableInstr::RecognizableInstr(DisassemblerTables &tables,
Form = byteFromRec(Rec, "FormBits");
Encoding = byteFromRec(Rec, "OpEncBits");
- OpSize = byteFromRec(Rec, "OpSizeBits");
- AdSize = byteFromRec(Rec, "AdSizeBits");
- HasREX_WPrefix = Rec->getValueAsBit("hasREX_WPrefix");
- HasVEX_4V = Rec->getValueAsBit("hasVEX_4V");
- VEX_WPrefix = byteFromRec(Rec,"VEX_WPrefix");
- IgnoresVEX_L = Rec->getValueAsBit("ignoresVEX_L");
- HasEVEX_L2Prefix = Rec->getValueAsBit("hasEVEX_L2");
- HasEVEX_K = Rec->getValueAsBit("hasEVEX_K");
- HasEVEX_KZ = Rec->getValueAsBit("hasEVEX_Z");
- HasEVEX_B = Rec->getValueAsBit("hasEVEX_B");
- IsCodeGenOnly = Rec->getValueAsBit("isCodeGenOnly");
- ForceDisassemble = Rec->getValueAsBit("ForceDisassemble");
- CD8_Scale = byteFromRec(Rec, "CD8_Scale");
+ OpSize = byteFromRec(Rec, "OpSizeBits");
+ AdSize = byteFromRec(Rec, "AdSizeBits");
+ HasREX_WPrefix = Rec->getValueAsBit("hasREX_WPrefix");
+ HasVEX_4V = Rec->getValueAsBit("hasVEX_4V");
+ VEX_WPrefix = byteFromRec(Rec,"VEX_WPrefix");
+ IgnoresVEX_L = Rec->getValueAsBit("ignoresVEX_L");
+ HasEVEX_L2Prefix = Rec->getValueAsBit("hasEVEX_L2");
+ HasEVEX_K = Rec->getValueAsBit("hasEVEX_K");
+ HasEVEX_KZ = Rec->getValueAsBit("hasEVEX_Z");
+ HasEVEX_B = Rec->getValueAsBit("hasEVEX_B");
+ Has3DNow0F0FOpcode = Rec->getValueAsBit("has3DNow0F0FOpcode");
+ IsCodeGenOnly = Rec->getValueAsBit("isCodeGenOnly");
+ ForceDisassemble = Rec->getValueAsBit("ForceDisassemble");
+ CD8_Scale = byteFromRec(Rec, "CD8_Scale");
Name = Rec->getName();
@@ -288,6 +289,8 @@ InstructionContext RecognizableInstr::insnContext() const {
errs() << "Instruction does not use a prefix: " << Name << "\n";
llvm_unreachable("Invalid prefix");
}
+ } else if (Has3DNow0F0FOpcode) {
+ insnContext = IC_3DNOW;
} else if (Is64Bit || HasREX_WPrefix || AdSize == X86Local::AdSize64) {
if (HasREX_WPrefix && (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD))
insnContext = IC_64BIT_REXW_OPSIZE;
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