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path: root/llvm/utils/TableGen/RegisterInfoEmitter.cpp
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* TableGen: Use enum names in composeSubRegIndices tableMatt Arsenault2019-10-271-1/+1
* Retire llvm::less/equal in favor of C++14 std::less<>/equal_to<>.Benjamin Kramer2019-08-221-2/+2
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* Use the container form llvm::sort(C)Fangrui Song2018-10-311-1/+1
* [MC] Remove PhysRegSize from MCRegisterClassBjorn Pettersson2018-08-091-4/+0
* [tablegen] Improve performance of -gen-register-info by replacing barely-nece...Daniel Sanders2018-08-081-11/+51
* [TableGen] Change std::sort to llvm::sort in response to r327219Mandeep Singh Grang2018-04-061-1/+1
* Fix layering of MachineValueType.h by moving it from CodeGen to SupportDavid Blaikie2018-03-231-3/+3
* [X86] Add phony registers for high halves of regs with low halvesKrzysztof Parzyszek2018-03-201-2/+2
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-1/+1
* [TableGen] : Simplify RegisterInfoEmitterJaved Absar2017-10-131-6/+4
* Move "(void)variable" closer to the assertion that uses it, NFCKrzysztof Parzyszek2017-09-191-1/+1
* Silence warning about unused variable in release buildKrzysztof Parzyszek2017-09-141-0/+1
* TableGen support for parameterized register class informationKrzysztof Parzyszek2017-09-141-20/+64
* TableGen: Add -gen-register-info-debug-dumpMatthias Braun2017-08-281-4/+67
* Break up long lines, NFCKrzysztof Parzyszek2017-06-281-2/+4
* [TableGen] Adapt more places to getValueAsString now returning a StringRef in...Craig Topper2017-05-311-4/+3
* Move spill size and alignment info from MC to TargetRegisterInfoKrzysztof Parzyszek2017-03-241-7/+7
* Revert r298652 on Quentin's requestKrzysztof Parzyszek2017-03-241-4/+4
* Move spill size and alignment info from MC to TargetRegisterInfoKrzysztof Parzyszek2017-03-231-4/+4
* Implement LaneBitmask::any(), use it to replace !none(), NFCIKrzysztof Parzyszek2016-12-161-2/+2
* Fix ubsan failures in lane mask shiftsKrzysztof Parzyszek2016-12-151-4/+8
* Extract LaneBitmask into a separate typeKrzysztof Parzyszek2016-12-151-30/+30
* TableGen: Use StringRef instead of const std::string& in return vals.Matthias Braun2016-12-041-1/+1
* [Sparc] Use target name instead of namespace as prefix for MCRegisterClasses ...Jacob Baungard Hansen2016-11-211-1/+1
* [tablegen] Merge duplicate definitions of getMinimalTypeForRange. NFC.Daniel Sanders2016-11-191-16/+9
* Avoid some copies by using const references.Benjamin Kramer2016-05-271-1/+1
* Fix Clang-tidy modernize-use-bool-literals in generated Target code; other mi...Eugene Zelenko2016-05-171-26/+43
* TableGen: Produce CoveredBySubRegs summary for register classesMatthias Braun2016-04-281-1/+3
* TargetRegisterInfo: Introduce reverseComposeSubRegIndexLaneMask()Matthias Braun2016-04-281-12/+29
* Remove extra 'nullptr' entry from an array in tablegen register info file. It...Craig Topper2015-09-221-1/+1
* Fix formatting of a tablegen register info file by putting a line break in a ...Craig Topper2015-09-221-3/+2
* Use makeArrayRef and None to simplify some code in a tablegen register info f...Craig Topper2015-09-221-12/+18
* Targets: commonize some stack realignment codeJF Bastien2015-07-201-3/+1
* Target RegisterInfo: devirtualize TargetFrameLoweringJF Bastien2015-07-101-0/+12
* MIR Serialization: Serialize the register mask machine operands.Alex Lorenz2015-06-291-0/+22
* TableGen: Generate more const goodnessMatthias Braun2015-04-011-2/+2
* RegAllocGreedy: Allow target to specify register class ordering.Matthias Braun2015-03-311-0/+1
* Do not track subregister liveness when it brings no benefitsMatthias Braun2015-03-191-1/+3
* Have getRegPressureSetLimit take a MachineFunction so that aEric Christopher2015-03-111-2/+3
* TblGen: Remove copy of SmallVector::operator==. NFC intended.Benjamin Kramer2015-03-021-10/+1
* Switch a std::map to a DenseMap in CodeGenRegisters.Owen Anderson2015-02-271-7/+9
* STLExtras: Provide less/equal functors with templated function call operators...David Blaikie2015-02-021-2/+2
* Replace another std::set in the core of CodeGenRegister, this time with sorte...Owen Anderson2015-01-311-1/+1
* Change more of the guts of CodeGenRegister's RegUnit tracking to be based on ...Owen Anderson2015-01-311-8/+8
* Tablegen'erate lanemasks for register units.Matthias Braun2014-12-101-6/+35
* Add function that translates subregister lane masks to other subregs.Matthias Braun2014-12-101-1/+96
* Let tablegen compute maximum lanemask for regs/regclasses.Matthias Braun2014-12-101-1/+2
* Simplify ownership of RegClasses by using list<CodeGenRegisterClass> instead ...David Blaikie2014-12-031-30/+19
* Range-for some stuff related to RegClasses, and comment cases where range-for...David Blaikie2014-12-031-47/+43
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