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* llvm/test/CodeGen/X86/peephole-fold-movsd.ll: Relax an expression for win32.NAKAMURA Takumi2014-09-151-1/+1
* Add a triple to fix the bots.Rafael Espindola2014-09-151-1/+1
* Fix a lot of confusion around inserting nops on empty functions.Rafael Espindola2014-09-153-22/+30
* [CodeGenPrepare][AddressingModeMatcher] Fix a think-o for the sext(zext) -> z...Quentin Colombet2014-09-151-0/+63
* [X86] Fix a bug in X86's peephole optimization.Akira Hatanaka2014-09-151-0/+31
* CHECK-LABELize testMatt Arsenault2014-09-152-19/+19
* R600/SI: Prefer selecting more e64 instruction forms.Matt Arsenault2014-09-156-9/+81
* R600/SI: Make sure double vector fmul is testedMatt Arsenault2014-09-151-4/+29
* R600/SI: Add some mubuf testcases.Matt Arsenault2014-09-151-0/+34
* R600/SI: Add preliminary support for flat address spaceMatt Arsenault2014-09-151-0/+182
* [mips] Marked the DADDiu instruction aliases as MIPS III.Toma Tabacu2014-09-158-0/+32
* [x86] Begin emitting PBLENDW instructions for integer blend operationsChandler Carruth2014-09-152-17/+17
* [x86] Add an explicit SSE3 run to this test and flesh out a bunch ofChandler Carruth2014-09-151-0/+86
* [x86] Teach the x86 DAG combiner to form UNPCKLPS and UNPCKHPSChandler Carruth2014-09-151-0/+14
* [x86] Teach the x86 DAG combiner to form MOVSLDUP and MOVSHDUPChandler Carruth2014-09-151-0/+30
* [x86] Undo a flawed transform I added to form UNPCK instructions whenChandler Carruth2014-09-156-23/+22
* [x86] Teach the new vector shuffle lowering to use 'punpcklwd' andChandler Carruth2014-09-151-24/+39
* InstSimplify: Simplify trivial and/or of icmpsDavid Majnemer2014-09-151-0/+120
* [x86] Teach the new vector shuffle lowering to use BLENDPS and BLENDPD.Chandler Carruth2014-09-143-37/+99
* llvm/test/CodeGen/X86/vec_shuffle-38.ll: Add explicit -mtriple=x86_64-unknown...NAKAMURA Takumi2014-09-141-1/+1
* [x86] Add an SSE41 mode to this test. Nothing interesting here, its theChandler Carruth2014-09-141-0/+19
* [x86] Switch this test to use an ALL prefix with special SSE2 and SSE3Chandler Carruth2014-09-141-120/+129
* [x86] Add some test cases where we should emit blendpd in SSE4.1. NoChandler Carruth2014-09-141-0/+15
* [x86] Teach the vector combiner that picks a canonical shuffle from toChandler Carruth2014-09-148-22/+53
* R600/SI: Fix broken check linesMatt Arsenault2014-09-141-2/+2
* [FastISel][AArch64] Add support for non-native types for logical ops.Juergen Ributzka2014-09-131-0/+176
* [AArch64] Update test case to pass with post-RA MI scheduler.Chad Rosier2014-09-131-1/+1
* Stop suppress error messages in test case to see why one buildbot is failingNick Kledzik2014-09-121-1/+1
* [llvm-objdump] support -rebase option for mach-o to dump rebasing infoNick Kledzik2014-09-122-0/+15
* llvm-profdata: Avoid undefined behaviour when reading raw profilesJustin Bogner2014-09-121-2/+0
* FileCheckize. NFC.Chad Rosier2014-09-121-21/+25
* [AArch64] Enable post-RA MI scheduler.Chad Rosier2014-09-121-0/+31
* [lit] Parse all strings as UTF-8 rather than ASCII.Jordan Rose2014-09-121-0/+3
* llvm/test/CodeGen/X86/vec_ctbits.ll: Add explicit -mtriple=x86_64-unknown. It...NAKAMURA Takumi2014-09-121-1/+1
* [mips][microMIPS] Implement JRADDIUSP instructionZoran Jovanovic2014-09-121-0/+5
* Address comments on r217622Bill Schmidt2014-09-121-0/+12
* [mips][microMIPS] Implement BGEZALS and BLTZALS instructionsZoran Jovanovic2014-09-121-0/+10
* [mips][microMIPS] Implement JALS and JALRS instructions.Zoran Jovanovic2014-09-121-0/+10
* [mips][microMIPS] Implement TLBP, TLBR, TLBWI and TLBWR instructionsZoran Jovanovic2014-09-121-0/+12
* [ARM] Teach the cost model that cross-class copies are costly.James Molloy2014-09-121-56/+56
* Legalizer: Use the scalar bit width when promoting bit counting instrs onBenjamin Kramer2014-09-121-1/+50
* Revert "llvm-cov: Remove an overly system specific test"Justin Bogner2014-09-112-0/+31
* R600/SI: Fix off by 1 error in used register countMatt Arsenault2014-09-111-1/+8
* [MCJIT] Make sure we test ARM BR24 relocations with both internal and externalLang Hames2014-09-111-2/+7
* [CodeGenPrepare] Teach the addressing mode matcher how to promote zext.Quentin Colombet2014-09-111-0/+15
* Add missing colon to RUN line...Bill Schmidt2014-09-111-1/+1
* [PATCH, PowerPC] Accept 'U' and 'X' constraints in inline asmBill Schmidt2014-09-111-0/+32
* [MCJIT] Add support for ARM HALF_DIFF relocations to MCJIT.Lang Hames2014-09-111-15/+19
* Add triple to test to fix botsMatt Arsenault2014-09-111-1/+1
* Provide an implementation of getNoopForMachoTarget for SPARC.Brad Smith2014-09-111-0/+8
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