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| author | Chandler Carruth <chandlerc@gmail.com> | 2014-09-14 23:28:12 +0000 |
|---|---|---|
| committer | Chandler Carruth <chandlerc@gmail.com> | 2014-09-14 23:28:12 +0000 |
| commit | f2a92921f9c77df997aa7bbb9ee2efbe9816e364 (patch) | |
| tree | 832d7a4c6a72bb09d6de34c9b20a5b2d0f34d989 /llvm/test | |
| parent | b39692264758cdf295dc984455024c5e41deda34 (diff) | |
| download | bcm5719-llvm-f2a92921f9c77df997aa7bbb9ee2efbe9816e364.tar.gz bcm5719-llvm-f2a92921f9c77df997aa7bbb9ee2efbe9816e364.zip | |
[x86] Add an SSE41 mode to this test. Nothing interesting here, its the
same as SSE3.
llvm-svn: 217741
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll b/llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll index 62779f6791e..619105f5026 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse3 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE3 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE41 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-unknown" @@ -55,6 +56,10 @@ define <2 x double> @shuffle_v2f64_00(<2 x double> %a, <2 x double> %b) { ; SSE3-LABEL: @shuffle_v2f64_00 ; SSE3: unpcklpd {{.*}} # xmm0 = xmm0[0,0] ; SSE3-NEXT: retq +; +; SSE41-LABEL: @shuffle_v2f64_00 +; SSE41: unpcklpd {{.*}} # xmm0 = xmm0[0,0] +; SSE41-NEXT: retq %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 0> ret <2 x double> %shuffle } @@ -82,6 +87,11 @@ define <2 x double> @shuffle_v2f64_22(<2 x double> %a, <2 x double> %b) { ; SSE3: unpcklpd {{.*}} # xmm1 = xmm1[0,0] ; SSE3-NEXT: movapd %xmm1, %xmm0 ; SSE3-NEXT: retq +; +; SSE41-LABEL: @shuffle_v2f64_22 +; SSE41: unpcklpd {{.*}} # xmm1 = xmm1[0,0] +; SSE41-NEXT: movapd %xmm1, %xmm0 +; SSE41-NEXT: retq %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 2, i32 2> ret <2 x double> %shuffle } @@ -252,6 +262,11 @@ define <2 x double> @insert_dup_reg_v2f64(double %a) { ; SSE3-LABEL: @insert_dup_reg_v2f64 ; SSE3: unpcklpd {{.*}} # xmm0 = xmm0[0,0] ; SSE3-NEXT: retq +; +; FIXME: This should match movddup as well! +; SSE41-LABEL: @insert_dup_reg_v2f64 +; SSE41: unpcklpd {{.*}} # xmm0 = xmm0[0,0] +; SSE41-NEXT: retq %v = insertelement <2 x double> undef, double %a, i32 0 %shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 0, i32 0> ret <2 x double> %shuffle @@ -265,6 +280,10 @@ define <2 x double> @insert_dup_mem_v2f64(double* %ptr) { ; SSE3-LABEL: @insert_dup_mem_v2f64 ; SSE3: movddup {{.*}}, %xmm0 ; SSE3-NEXT: retq +; +; SSE41-LABEL: @insert_dup_mem_v2f64 +; SSE41: movddup {{.*}}, %xmm0 +; SSE41-NEXT: retq %a = load double* %ptr %v = insertelement <2 x double> undef, double %a, i32 0 %shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 0, i32 0> |
