| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [mips][msa] Test basic operations for the N32 ABI too. | Daniel Sanders | 2015-05-05 | 1 | -0/+3 |
| * | [mips] [IAS] Remove AssemblerPredicate's from RelocPIC and RelocStatic. | Toma Tabacu | 2015-04-08 | 1 | -1/+8 |
| * | [mips] [IAS] Add support for the XOR $reg,imm pseudo-instruction. | Toma Tabacu | 2015-03-17 | 1 | -0/+1 |
| * | [mips] Add support for COP1's Branch-On-Cond-Likely instructions | Vasileios Kalintiris | 2014-10-17 | 2 | -0/+6 |
| * | [mips] Add support for COP0's Branch-On-Cond-Likely instructions | Vasileios Kalintiris | 2014-10-17 | 1 | -0/+8 |
| * | [mips] Marked the DI/EI instruction aliases as MIPS32r2 | Vasileios Kalintiris | 2014-10-16 | 1 | -0/+11 |
| * | [mips] Improve the error messages given by MipsAsmParser. | Toma Tabacu | 2014-09-16 | 1 | -38/+38 |
| * | [mips] Move 32-bit ADDiu instruction alias from Mips64InstrInfo.td to MipsIns... | Toma Tabacu | 2014-09-16 | 1 | -0/+1 |
| * | [mips] Marked the ADDi instruction aliases as not available in Mips32R6 and M... | Toma Tabacu | 2014-09-16 | 1 | -0/+4 |
| * | [mips] Marked the DADDiu instruction aliases as MIPS III. | Toma Tabacu | 2014-09-15 | 1 | -0/+4 |
| * | [mips] Marked the Trap-on-Condition instructions as Mips II | Daniel Sanders | 2014-09-05 | 1 | -0/+12 |
| * | [mips] SYNC $stype instruction was added in Mips32 | Matheus Almeida | 2014-06-18 | 2 | -0/+11 |
| * | [mips] Update MipsAsmParser so that it's possible to handle immediates that s... | Matheus Almeida | 2014-06-18 | 1 | -0/+1 |
| * | [mips] Implement alias for 'and' and 'or' instructions for all ISAs. | Matheus Almeida | 2014-06-18 | 1 | -0/+2 |
| * | [mips][mips64r6] [ls][wd]c2 were re-encoded with 11-bit signed immediates rat... | Daniel Sanders | 2014-06-16 | 1 | -2/+2 |
| * | [mips][mips64r6] b(ge|lt)zal are not available on MIPS32r6/MIPS64r6 and bal i... | Daniel Sanders | 2014-06-13 | 1 | -0/+4 |
| * | [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6 | Daniel Sanders | 2014-06-12 | 3 | -12/+30 |
| * | [mips] Marked up instructions added in MIPS-V and tested that IAS for -mcpu=m... | Daniel Sanders | 2014-05-12 | 2 | -0/+129 |
| * | [mips] Marked up instructions added in MIPS-IV and tested that IAS for -mcpu=... | Daniel Sanders | 2014-05-09 | 2 | -0/+105 |
| * | [mips] Marked up instructions added in MIPS-III and tested that IAS for -mcpu... | Daniel Sanders | 2014-05-09 | 2 | -0/+88 |
| * | [mips] Added missing dsra -> dsrav and sra -> srav aliases. | Daniel Sanders | 2014-05-09 | 1 | -0/+1 |
| * | [mips] Correct tests that are meant to test valid assembly. They were actuall... | Daniel Sanders | 2014-05-08 | 2 | -100/+100 |
| * | [mips] Implement l[wd]c3, and s[wd]c3. | Daniel Sanders | 2014-05-08 | 4 | -2/+5 |
| * | [mips] Marked up instructions added in MIPS-II and tested that IAS for -mcpu=... | Daniel Sanders | 2014-05-08 | 2 | -0/+37 |
| * | [mips] Implement tlbp, tlbr, tlbwi, and tlbwr | Daniel Sanders | 2014-05-08 | 2 | -4/+4 |
| * | [mips] Add highly experimental support for MIPS-I, MIPS-II, MIPS-III, and MIPS-V | Daniel Sanders | 2014-05-07 | 2 | -4/+2 |
| * | [mips] Removed two-operand alias for sllv, sr[al]v, rotrv, dsllv, dsr[al]v, a... | Daniel Sanders | 2014-05-01 | 1 | -3/+0 |
| * | [mips] Add instruction alias (negu). | Matheus Almeida | 2014-04-30 | 1 | -0/+2 |
| * | [mips] Add instruction alias (sltu). | Matheus Almeida | 2014-04-30 | 1 | -0/+1 |
| * | [mips] Add instruction alias (sll and srl). | Matheus Almeida | 2014-04-30 | 1 | -0/+2 |
| * | [mips] Update tests with encoding information for slt, slti, sltiu and sltu. | Matheus Almeida | 2014-04-30 | 1 | -4/+4 |
| * | [mips] Use TwoOperandAliasConstraint for shift instructions. | Matheus Almeida | 2014-04-16 | 1 | -4/+13 |
| * | [mips] Implement ehb, ssnop, and pause in assembler | Daniel Sanders | 2014-04-03 | 2 | -2/+2 |
| * | [mips] Added a full set of instruction test cases for all ISA's (but not ASE's). | Daniel Sanders | 2014-03-31 | 2 | -0/+102 |
