| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [Mips] Add s.d instruction alias for Mips1 | Simon Atanasyan | 2019-06-12 | 1 | -0/+13 |
| * | [mips] Add missing instructions | Aleksandar Beserminji | 2018-08-29 | 2 | -5/+5 |
| * | [mips] Correct predicates for loads, bit manipulation instructions and some p... | Simon Dardis | 2018-06-20 | 1 | -0/+2 |
| * | [mips] Guard some floating point instructions correctly | Simon Dardis | 2018-06-12 | 1 | -0/+9 |
| * | [mips] Correct the predicates for shifts. | Simon Dardis | 2018-05-02 | 1 | -0/+30 |
| * | [mips] Correct the predicates for special nops, tlb ctrl instrs, software bre... | Simon Dardis | 2018-04-12 | 1 | -0/+12 |
| * | [mips] Correct the definition of m(f|t)c(0|2) | Simon Dardis | 2018-03-07 | 1 | -0/+5 |
| * | Make test changes added in r324584 more robust by using a regex instead of ha... | Douglas Yung | 2018-02-09 | 1 | -10/+10 |
| * | [mips] Define certain instructions in microMIPS32r3 | Stefan Maksimovic | 2018-02-08 | 1 | -10/+20 |
| * | [mips] Properly select abs and sqrt instructions | Stefan Maksimovic | 2018-01-23 | 1 | -3/+5 |
| * | [AArch64][SVE] Re-submit patch series for ZIP1/ZIP2 | Sander de Smalen | 2017-12-20 | 6 | -26/+26 |
| * | Revert "[AArch64][SVE] Asm" changes, they broke libjpeg_turbo | Reid Kleckner | 2017-12-18 | 6 | -26/+26 |
| * | [TableGen][AsmMatcherEmitter] Only choose specific diagnostic for enabled ins... | Sander de Smalen | 2017-12-18 | 6 | -26/+26 |
| * | [mips] Correct c.cond.fmt instruction definition. | Simon Dardis | 2017-01-16 | 4 | -16/+48 |
| * | [mips] not instruction alias | Simon Dardis | 2016-11-16 | 1 | -0/+2 |
| * | [mips] Macro expansion for ld, sd for O32 | Simon Dardis | 2016-10-18 | 2 | -4/+0 |
| * | [mips] sgtu, s[rl]l, sra, dnegu, neg instruction aliases | Simon Dardis | 2016-07-26 | 1 | -0/+9 |
| * | [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2... | Zlatko Buljan | 2016-07-11 | 4 | -6/+2 |
| * | [mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instruct... | Hrvoje Varga | 2016-06-27 | 4 | -8/+8 |
| * | [mips] Weaken asm predicate for memory offsets | Simon Dardis | 2016-05-27 | 1 | -0/+21 |
| * | [mips] Range check simm16 | Daniel Sanders | 2016-03-31 | 3 | -12/+12 |
| * | [mips] Range check simm11 and mem_simm11. | Daniel Sanders | 2016-03-31 | 3 | -6/+12 |
| * | [mips] Range check simm9 and fix a bug this revealed. | Daniel Sanders | 2016-03-31 | 3 | -10/+10 |
| * | [mips] Range check uimm20 and fixed a bug this revealed. | Daniel Sanders | 2016-02-29 | 1 | -0/+2 |
| * | [mips] added support for trunc macro | Zoran Jovanovic | 2016-02-22 | 1 | -0/+25 |
| * | [mips] Never select JAL for calls to an absolute immediate address. | Daniel Sanders | 2016-01-11 | 1 | -0/+1 |
| * | [mips] Remap move as or. | Vasileios Kalintiris | 2015-08-11 | 1 | -2/+2 |
| * | [mips][msa] Test basic operations for the N32 ABI too. | Daniel Sanders | 2015-05-05 | 1 | -0/+3 |
| * | [mips] [IAS] Remove AssemblerPredicate's from RelocPIC and RelocStatic. | Toma Tabacu | 2015-04-08 | 1 | -1/+8 |
| * | [mips] [IAS] Add support for the XOR $reg,imm pseudo-instruction. | Toma Tabacu | 2015-03-17 | 1 | -0/+1 |
| * | [mips] Add support for COP1's Branch-On-Cond-Likely instructions | Vasileios Kalintiris | 2014-10-17 | 2 | -0/+6 |
| * | [mips] Add support for COP0's Branch-On-Cond-Likely instructions | Vasileios Kalintiris | 2014-10-17 | 1 | -0/+8 |
| * | [mips] Marked the DI/EI instruction aliases as MIPS32r2 | Vasileios Kalintiris | 2014-10-16 | 1 | -0/+11 |
| * | [mips] Improve the error messages given by MipsAsmParser. | Toma Tabacu | 2014-09-16 | 1 | -38/+38 |
| * | [mips] Move 32-bit ADDiu instruction alias from Mips64InstrInfo.td to MipsIns... | Toma Tabacu | 2014-09-16 | 1 | -0/+1 |
| * | [mips] Marked the ADDi instruction aliases as not available in Mips32R6 and M... | Toma Tabacu | 2014-09-16 | 1 | -0/+4 |
| * | [mips] Marked the DADDiu instruction aliases as MIPS III. | Toma Tabacu | 2014-09-15 | 1 | -0/+4 |
| * | [mips] Marked the Trap-on-Condition instructions as Mips II | Daniel Sanders | 2014-09-05 | 1 | -0/+12 |
| * | [mips] SYNC $stype instruction was added in Mips32 | Matheus Almeida | 2014-06-18 | 2 | -0/+11 |
| * | [mips] Update MipsAsmParser so that it's possible to handle immediates that s... | Matheus Almeida | 2014-06-18 | 1 | -0/+1 |
| * | [mips] Implement alias for 'and' and 'or' instructions for all ISAs. | Matheus Almeida | 2014-06-18 | 1 | -0/+2 |
| * | [mips][mips64r6] [ls][wd]c2 were re-encoded with 11-bit signed immediates rat... | Daniel Sanders | 2014-06-16 | 1 | -2/+2 |
| * | [mips][mips64r6] b(ge|lt)zal are not available on MIPS32r6/MIPS64r6 and bal i... | Daniel Sanders | 2014-06-13 | 1 | -0/+4 |
| * | [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6 | Daniel Sanders | 2014-06-12 | 3 | -12/+30 |
| * | [mips] Marked up instructions added in MIPS-V and tested that IAS for -mcpu=m... | Daniel Sanders | 2014-05-12 | 2 | -0/+129 |
| * | [mips] Marked up instructions added in MIPS-IV and tested that IAS for -mcpu=... | Daniel Sanders | 2014-05-09 | 2 | -0/+105 |
| * | [mips] Marked up instructions added in MIPS-III and tested that IAS for -mcpu... | Daniel Sanders | 2014-05-09 | 2 | -0/+88 |
| * | [mips] Added missing dsra -> dsrav and sra -> srav aliases. | Daniel Sanders | 2014-05-09 | 1 | -0/+1 |
| * | [mips] Correct tests that are meant to test valid assembly. They were actuall... | Daniel Sanders | 2014-05-08 | 2 | -100/+100 |
| * | [mips] Implement l[wd]c3, and s[wd]c3. | Daniel Sanders | 2014-05-08 | 4 | -2/+5 |
