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* [PPC] Disassemble little endian ppc instructions in the right byte orderBenjamin Kramer2015-07-151-0/+664
* [AArch64] Fix problems in decoding generic MSR instructionsPetr Pavlu2015-07-151-0/+4
* AArch64: add rev64 alias for 64-bit rev instruction.Tim Northover2015-07-141-0/+3
* [mips] Fix li/la differences between IAS and GAS.Daniel Sanders2015-07-148-86/+381
* [MC] Correctly escape .safeseh's symbolDavid Majnemer2015-07-131-0/+6
* [ARM] Handle commutativity when converting to tADDhirr in Thumb2Scott Douglass2015-07-132-0/+3
* [ARM] Add Thumb2 ADD with SP narrowing from 3 operand to 2Scott Douglass2015-07-131-1/+16
* [ARM] Small refactor of tryConvertingToTwoOperandForm (nfc)Scott Douglass2015-07-131-3/+77
* AVX-512: Added all AVX-512 forms of Vector Convert for Float/Double/Int/Long ...Elena Demikhovsky2015-07-134-0/+2665
* [llvm-objdump] Require that jump targets shown in -d are functionsDavid Majnemer2015-07-091-0/+4
* [ARM] Thumb1 3 to 2 operand convertion for commutative operationsScott Douglass2015-07-092-0/+19
* [ARM] Don't be overzealous converting Thumb1 3 to 2 operandsScott Douglass2015-07-091-0/+12
* [ARM] Add Thumb2 ADD with PC narrowing from 3 operand to 2Scott Douglass2015-07-091-0/+4
* [ARM] Refactor converting Thumb1 from 3 to 2 operand (nfc)Scott Douglass2015-07-091-0/+19
* [ARM] Add ADD tests for Thumb2 narrowing (nfc)Scott Douglass2015-07-091-1/+67
* [llvm-objdump] Print the call target next to the instructionDavid Majnemer2015-07-071-11/+11
* [Sparc] Add more instruction aliases.James Y Knight2015-07-062-3/+131
* [Sparc] Add support for flush instruction.James Y Knight2015-07-061-0/+10
* [X86][AVX512] Multiply Packed Unsigned Integers with Round and ScaleAsaf Badouh2015-07-062-0/+109
* [x86][AVX512] add Multiply High OpAsaf Badouh2015-07-052-0/+216
* [X86] Fix incorrect/inefficient pushw encodings for x86-64 targetsMichael Kuperstein2015-07-053-0/+45
* [X86] Add proper 64-bit mode checks to jrcxz and jcxz.Craig Topper2015-07-041-0/+6
* Reworking the test part of r241149Gabor Ballabas2015-07-024-0/+33
* [X86] Convert an instruction relaxation test to use objdump instead of readobjMichael Kuperstein2015-07-021-58/+64
* [AArch64] Implement add/adds/sub/subs/cmp/cmn with negative immediate aliasesArnaud A. de Grandmaison2015-07-012-5/+99
* AVX-512: Implemented missing encoding for FMA scalar instructionsIgor Breger2015-07-011-0/+1249
* [X86] Avoid over-relaxation of 8-bit immediates in integer arithmetic instruc...Michael Kuperstein2015-07-012-0/+194
* Revert part of r241149, "Fix PR23872: Integrated assembler error message when...NAKAMURA Takumi2015-07-011-28/+0
* [mips][microMIPS] Implement SLL and NOP instructionsZoran Jovanovic2015-07-012-0/+6
* Fix PR23872: Integrated assembler error message when using .type directive wi...Gabor Ballabas2015-07-011-0/+28
* [mips] [IAS] Add support for the .module softfloat/hardfloat directives.Toma Tabacu2015-06-302-0/+46
* [mips] [IAS] Make .module directives change AssemblerOptions->front().Toma Tabacu2015-06-301-0/+14
* [mips] [IAS] Add support for the .set oddspreg/nooddspreg directives.Toma Tabacu2015-06-302-0/+20
* AVX-512: all forms of SCATTER instruction on SKX,Elena Demikhovsky2015-06-291-0/+128
* [ARM]: Extend -mfpu options for half-precision and vfpv3xdJaved Absar2015-06-291-0/+5
* AVX-512: Implemented missing encoding and intrinsics for FMA instructionsIgor Breger2015-06-292-0/+6697
* [x86][AVX512]Asaf Badouh2015-06-282-0/+367
* AVX-512: Added all SKX forms of GATHER instructions.Elena Demikhovsky2015-06-282-0/+303
* [mips] Fold duplicate big-endian disassembler tests together.Daniel Sanders2015-06-2714-1398/+122
* [mips] Sort big-endian disassembler tests by opcode.Daniel Sanders2015-06-2714-2205/+2193
* [mips] Make little-endian disassembler test filenames consistent.Daniel Sanders2015-06-273-0/+0
* [mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0.Daniel Sanders2015-06-2737-16/+156
* [MC] Ensure that pending labels are flushed when -mc-relax-all flag is usedPetr Hosek2015-06-271-0/+30
* [MC] Align fragments when -mc-relax-all flag is usedPetr Hosek2015-06-272-0/+54
* AMDGPU/SI: Update amd_kernel_code_t definition and add assembler supportTom Stellard2015-06-261-0/+217
* AMDGPU/SI: Add hsa code object directivesTom Stellard2015-06-262-0/+32
* [X86]: Correctly sign-extend 16-bit immediate in CALL instruction.Douglas Katzman2015-06-263-0/+11
* [mips] [IAS] Add partial support for the ULW pseudo-instruction.Toma Tabacu2015-06-264-0/+245
* Diagnose undefined temporary symbols.Rafael Espindola2015-06-254-31/+7
* Add a test for a recent regression.Rafael Espindola2015-06-251-0/+13
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