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* [mips] Correct the predicates for a number of instructions.Simon Dardis2018-05-291-6/+6
| | | | | | | | | | Previously, their listed predicates were overridden at the scope level. Reviewers: atanasyan, abeserminji, smaksimovic Differential Revision: https://reviews.llvm.org/D46947 llvm-svn: 333405
* [mips][microMIPS] Implement movep instructionZoran Jovanovic2015-02-101-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D7465 llvm-svn: 228703
* [mips][microMIPS] Implement LWGP instructionJozef Kolek2015-01-281-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D6650 llvm-svn: 227325
* [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction BJozef Kolek2015-01-211-0/+10
| | | | | | | | | | | | | | Implement microMIPS 16-bit unconditional branch instruction B. Implemented 16-bit microMIPS unconditional instruction has real name B16, and B is an alias which expands to either B16 or BEQ according to the rules: b 256 --> b16 256 # R_MICROMIPS_PC10_S1 b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1 b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1 Differential Revision: http://reviews.llvm.org/D3514 llvm-svn: 226657
* Reverted revision 226577.Jozef Kolek2015-01-201-10/+0
| | | | llvm-svn: 226595
* [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction BJozef Kolek2015-01-201-0/+10
| | | | | | | | | | | | | | Implement microMIPS 16-bit unconditional branch instruction B. Implemented 16-bit microMIPS unconditional instruction has real name B16, and B is an alias which expands to either B16 or BEQ according to the rules: b 256 --> b16 256 # R_MICROMIPS_PC10_S1 b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1 b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1 Differential Revision: http://reviews.llvm.org/D3514 llvm-svn: 226577
* [mips][microMIPS] Implement BEQZ16 and BNEZ16 instructionsJozef Kolek2015-01-121-0/+10
| | | | | | Differential Revision: http://reviews.llvm.org/D5271 llvm-svn: 225627
* [mips][microMIPS] Implement LWSP and SWSP instructionsJozef Kolek2014-12-231-0/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D6416 llvm-svn: 224771
* The andi16, addiusp and jraddiusp micromips instructions were missing ↵Vladimir Medic2014-12-011-0/+12
| | | | | | dedicated decoder methods in MipsDisassembler.cpp to properly decode immediate operands. These methods are added together with corresponding tests. llvm-svn: 223006
* [mips][microMIPS] Implement NOP aliasesJozef Kolek2014-11-291-2/+2
| | | | | | | | | This patch implements microMIPS 16-bit (MOVE16 $0, $0) and 32-bit (SLL $0, $0, 0) NOP aliases. http://reviews.llvm.org/D6440 llvm-svn: 222953
* [mips][microMIPS] Implement BREAK16 and SDBBP16 instructionsJozef Kolek2014-11-271-0/+6
| | | | | | | | Patch by Radovan Obradovic. Differential Revision: http://reviews.llvm.org/D5048 llvm-svn: 222900
* [mips][microMIPS] Implement disassembler support for 16-bit instructions ↵Jozef Kolek2014-11-261-0/+3
| | | | | | | | LBU16, LHU16, LW16, SB16, SH16 and SW16 Differential Revision: http://reviews.llvm.org/D6405 llvm-svn: 222847
* [mips][microMIPS] Fix JRADDIUSP instructionJozef Kolek2014-11-241-4/+2
| | | | | | | | | Fix JRADDIUSP instruction, remove delay slot flag because this instruction doesn't have delay slot. Differential Revision: http://reviews.llvm.org/D6365 llvm-svn: 222658
* [mips][microMIPS] Implement LBU16, LHU16, LW16, SB16, SH16 and SW16 instructionsJozef Kolek2014-11-241-0/+21
| | | | | | Differential Revision: http://reviews.llvm.org/D5122 llvm-svn: 222653
* [mips][microMIPS] Implement ANDI16 instructionZoran Jovanovic2014-11-051-0/+3
| | | | llvm-svn: 221367
* Reverted revisions 221351, 221352 and 221353.Zoran Jovanovic2014-11-051-3/+0
| | | | llvm-svn: 221354
* [mips][microMIPS] Implement ANDI16 instructionZoran Jovanovic2014-11-051-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D5163 llvm-svn: 221351
* [mips][microMIPS] Implement ADDIUR1SP instructionZoran Jovanovic2014-10-231-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D5153 llvm-svn: 220477
* ps][microMIPS] Implement ADDIUR2 instructionZoran Jovanovic2014-10-231-0/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D5151 llvm-svn: 220476
* ps][microMIPS] Implement LI16 instructionZoran Jovanovic2014-10-231-0/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D5149 llvm-svn: 220475
* [mips][microMIPS] Implement CodeGen support for SLL16 and SRL16 instructionsZoran Jovanovic2014-10-231-0/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D5774 llvm-svn: 220474
* [mips][microMIPS] Implement ADDU16 and SUBU16 instructionsZoran Jovanovic2014-10-211-0/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D5118 llvm-svn: 220276
* [mips][microMIPS] Implement AND16, NOT16, OR16 and XOR16 instructionsZoran Jovanovic2014-10-211-0/+12
| | | | | | Differential Revision: http://reviews.llvm.org/D5117 llvm-svn: 220275
* [mips][microMIPS] Implement ADDIUSP instructionZoran Jovanovic2014-10-101-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D5084 llvm-svn: 219500
* [mips][microMIPS] Implement JR16 instructionZoran Jovanovic2014-10-101-0/+5
| | | | | | Differential Revision: http://reviews.llvm.org/D5062 llvm-svn: 219498
* [mips][microMIPS] Implement ADDIUS5 instructionZoran Jovanovic2014-10-101-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D5049 llvm-svn: 219495
* ps][microMIPS] Implement JRC instructionZoran Jovanovic2014-10-101-2/+5
| | | | | | Differential Revision: http://reviews.llvm.org/D5045 llvm-svn: 219494
* [mips][microMIPS] Implement JALRS16 instructionZoran Jovanovic2014-10-101-0/+5
| | | | | | Differential Revision: http://reviews.llvm.org/D5027 llvm-svn: 219493
* [mips][microMIPS] Implement JRADDIUSP instructionZoran Jovanovic2014-09-121-0/+5
| | | | | | Differential Revision: http://reviews.llvm.org/D5046 llvm-svn: 217681
* Implementation of 16-bit microMIPS instructions MFHI and MFLO.Zoran Jovanovic2014-04-031-0/+6
| | | | | | Differential Revision: http://llvm-reviews.chandlerc.com/D3141 llvm-svn: 205532
* Implementation of microMIPS 16-bit instructions MOVE and JALR.Zoran Jovanovic2014-03-201-0/+21
Differential Revision: http://llvm-reviews.chandlerc.com/D3112 llvm-svn: 204325
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