| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [mips] Fix decoding of microMIPS JALX instruction | Simon Atanasyan | 2019-09-09 | 1 | -0/+1 |
| * | [mips] Correct the predicates of arithmetic and logic instructions. | Simon Dardis | 2018-05-30 | 1 | -2/+2 |
| * | [mips] Correct the predicates for a number of instructions. | Simon Dardis | 2018-05-29 | 1 | -2/+2 |
| * | [mips] Fix predicates of mfc1, mtc1 instructions | Simon Dardis | 2018-05-15 | 1 | -0/+4 |
| * | [mips] Fix the predicates of round, ceiling, floor and trunc. | Simon Dardis | 2018-05-14 | 1 | -0/+10 |
| * | [mips] Enable disassembly of fused (negative) multiply add/sub instructions | Simon Dardis | 2018-05-11 | 1 | -0/+8 |
| * | [mips] Move conditional moves out of isCodeGenOnly | Simon Dardis | 2018-05-09 | 1 | -0/+8 |
| * | [mips] Fix the definition of sync, synci | Simon Dardis | 2018-04-25 | 1 | -0/+2 |
| * | [mips] Correct the predicates for special nops, tlb ctrl instrs, software bre... | Simon Dardis | 2018-04-12 | 1 | -0/+4 |
| * | [mips] Fix the definitions of the EVA instructions | Simon Dardis | 2018-03-13 | 1 | -1/+1 |
| * | [mips] Define certain instructions in microMIPS32r3 | Stefan Maksimovic | 2018-02-08 | 1 | -0/+12 |
| * | [mips] Properly select abs and sqrt instructions | Stefan Maksimovic | 2018-01-23 | 1 | -0/+4 |
| * | [mips] Add movep for microMIPS32R6 and fix microMIPS32r3 version | Simon Dardis | 2017-11-06 | 1 | -0/+1 |
| * | [mips] Fix (dis)assembly of abs.fmt for micromips | Simon Dardis | 2017-10-26 | 1 | -0/+2 |
| * | [mips][micromips] Fix (dis)assembly of bc1(t|f) | Simon Dardis | 2017-10-16 | 1 | -0/+2 |
| * | Recommit: "[mips] Add rsqrt, recip for MIPS" | Simon Dardis | 2016-10-05 | 1 | -0/+4 |
| * | Revert "[mips] Add rsqrt, recip for MIPS" | Simon Dardis | 2016-10-05 | 1 | -4/+0 |
| * | [mips] Add rsqrt, recip for MIPS | Simon Dardis | 2016-09-27 | 1 | -0/+4 |
| * | [mips][microMIPS] Implement BLTZC, BLEZC, BGEZC and BGTZC instructions, fix d... | Hrvoje Varga | 2016-08-22 | 1 | -12/+12 |
| * | [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2... | Zlatko Buljan | 2016-07-11 | 1 | -0/+6 |
| * | [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and NO... | Zlatko Buljan | 2016-06-15 | 1 | -2/+0 |
| * | [mips][microMIPS] Add CodeGen support for microMIPSr6 ROTR and ROTRV and add ... | Zlatko Buljan | 2016-05-04 | 1 | -0/+2 |
| * | [mips][microMIPS] Revert commit r266977 | Zlatko Buljan | 2016-04-25 | 1 | -2/+0 |
| * | [mips][microMIPS] Implement LL, SC, MOVEP, ROTR, ROTRV and SYSCALL instructio... | Zlatko Buljan | 2016-04-21 | 1 | -0/+2 |
| * | [mips][microMIPS] Implement LLE and SCE instructions | Hrvoje Varga | 2015-10-15 | 1 | -0/+2 |
| * | [mips][microMIPS] Implement LWLE, LWRE, SWLE and SWRE instructions | Hrvoje Varga | 2015-10-15 | 1 | -0/+4 |
| * | [mips][disassembler] Merged disassembler tests into the corresponding ISA/ASE... | Daniel Sanders | 2015-10-06 | 1 | -0/+185 |
