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path: root/llvm/test/MC/Disassembler/Hexagon/alu32_perm.txt
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* [Hexagon] Replace instruction definitions with auto-generated onesKrzysztof Parzyszek2017-02-101-13/+13
* [Hexagon] Organizing tests and adding a few missing jump instruction encodings.Colin LeMahieu2015-01-291-1/+1
* [Hexagon] Adding missing instruction encodings and tests.Colin LeMahieu2015-01-291-0/+8
* [Hexagon] Adding combine ri/ir instructions.Colin LeMahieu2014-12-101-0/+4
* [Hexagon] Adding combine reg, reg with predicated forms.Colin LeMahieu2014-12-081-0/+2
* [Hexagon] Adding packhl instruction.Colin LeMahieu2014-12-081-0/+2
* [Hexagon] Updating mux_ir/ri/ii/rr with encoding bitsColin LeMahieu2014-12-051-0/+8
* [Hexagon] Adding DoubleRegs decoder. Moving C2_mux and A2_nop. Adding combi...Colin LeMahieu2014-12-051-0/+2
* [Hexagon] Adding combine reg-reg forms.Colin LeMahieu2014-12-051-0/+8
* [Hexagon] Marking several instructions as isCodeGenOnly=0 and adding direct d...Colin LeMahieu2014-12-051-0/+6
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