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path: root/llvm/test/CodeGen/MIR/X86/implicit-register-flag.mir
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* [X86] Merge the different Jcc instructions for each condition code into singl...Craig Topper2019-04-051-2/+2
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-15/+15
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-3/+3
* llc: Add support for -run-pass noneMatthias Braun2016-07-161-1/+1
* [MIR] Print on the given output instead of stderr.Quentin Colombet2016-07-131-1/+1
* When printing MIR, output to errs() rather than outs().Justin Lebar2016-02-191-1/+1
* MIR Parser: Implicit register verifier should accept unexpected implicitAlex Lorenz2015-08-181-0/+30
* MIR Serialization: Change MIR syntax - use custom syntax for MBBs.Alex Lorenz2015-08-131-20/+16
* MIR Tests: Add liveins and successors to make tests pass with machine verifier.Alex Lorenz2015-07-241-0/+1
* MIR Serialization: Serialize the implicit register flag.Alex Lorenz2015-07-061-0/+41
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