index
:
bcm5719-llvm
meklort-10.0.0
meklort-10.0.1
ortega-7.0.1
Project Ortega BCM5719 LLVM
Raptor Computing Systems
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
llvm
/
test
/
CodeGen
/
MIR
/
X86
/
implicit-register-flag.mir
Commit message (
Expand
)
Author
Age
Files
Lines
*
[X86] Merge the different Jcc instructions for each condition code into singl...
Craig Topper
2019-04-05
1
-2
/
+2
*
Followup on Proposal to move MIR physical register namespace to '$' sigil.
Puyan Lotfi
2018-01-31
1
-15
/
+15
*
[CodeGen] Unify MBB reference format in both MIR and debug output
Francis Visoiu Mistrih
2017-12-04
1
-3
/
+3
*
llc: Add support for -run-pass none
Matthias Braun
2016-07-16
1
-1
/
+1
*
[MIR] Print on the given output instead of stderr.
Quentin Colombet
2016-07-13
1
-1
/
+1
*
When printing MIR, output to errs() rather than outs().
Justin Lebar
2016-02-19
1
-1
/
+1
*
MIR Parser: Implicit register verifier should accept unexpected implicit
Alex Lorenz
2015-08-18
1
-0
/
+30
*
MIR Serialization: Change MIR syntax - use custom syntax for MBBs.
Alex Lorenz
2015-08-13
1
-20
/
+16
*
MIR Tests: Add liveins and successors to make tests pass with machine verifier.
Alex Lorenz
2015-07-24
1
-0
/
+1
*
MIR Serialization: Serialize the implicit register flag.
Alex Lorenz
2015-07-06
1
-0
/
+41