summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir
Commit message (Expand)AuthorAgeFilesLines
* [X86] Merge the different Jcc instructions for each condition code into singl...Craig Topper2019-04-051-2/+2
* [MIRParser] Update a diagnostic message to use the correct register sigil. NFCMatt Davis2018-06-191-1/+1
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-5/+5
* llc: Add support for -run-pass noneMatthias Braun2016-07-161-1/+1
* Fix PR 24724 - The implicit register verifier shouldn't assume certain operandAlex Lorenz2015-09-101-1/+1
* MIR Serialization: Change MIR syntax - use custom syntax for MBBs.Alex Lorenz2015-08-131-16/+12
* MIR Parser: Verify the implicit machine register operands.Alex Lorenz2015-07-071-0/+38
OpenPOWER on IntegriCloud