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path: root/llvm/test/CodeGen/MIR/X86/constant-pool.mir
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* [X86] Model MXCSR for all SSE instructionsCraig Topper2019-10-301-22/+22
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-26/+26
* [CodeGen] Always use `printReg` to print registers in both MIR and debugFrancis Visoiu Mistrih2017-11-301-6/+6
* [MIR] Print target-specific constant poolsDiana Picus2017-08-021-0/+6
* llc: Add support for -run-pass noneMatthias Braun2016-07-161-1/+1
* [MIR] Print on the given output instead of stderr.Quentin Colombet2016-07-131-1/+1
* When printing MIR, output to errs() rather than outs().Justin Lebar2016-02-191-1/+1
* MIR Serialization: Change MIR syntax - use custom syntax for MBBs.Alex Lorenz2015-08-131-42/+34
* MIR Serialization: Serialize the machine operand's offset.Alex Lorenz2015-08-051-0/+29
* MIR Serialization: Initial serialization of machine constant pools.Alex Lorenz2015-07-201-0/+118
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