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path: root/llvm/test/CodeGen/ARM/vldlane.ll
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* [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).Kristof Beyls2017-06-281-1/+1
* ARM: handle post-indexed NEON ops where the offset isn't the access width.Tim Northover2017-04-201-0/+16
* [ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]la...Jeroen Ketema2015-09-301-46/+46
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-45/+45
* [opaque pointer type] Add textual IR support for explicit type parameter to g...David Blaikie2015-02-271-3/+3
* ARM: fixup more tests to specify the target more explicitlySaleem Abdulrasool2014-04-031-2/+4
* ARM: force soft-float ABI for tests depending on it.Tim Northover2013-12-181-2/+2
* Update to more CodeGen tests to use CHECK-LABEL for labels corresponding to f...Stephen Lin2013-07-181-1/+1
* Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to f...Stephen Lin2013-07-141-33/+33
* Make ARMAsmPrinter generate the correct alignment specifier syntax in instruc...Kristof Beyls2013-02-221-14/+14
* Also set addrmode6 alignment when align==size.Jakob Stoklund Olesen2011-10-271-2/+12
* Teach LiveInterval::isZeroLength about null SlotIndexes.Jakob Stoklund Olesen2011-05-161-4/+4
* Fix a bunch of ARM tests to be register allocation independent.Jakob Stoklund Olesen2011-05-031-11/+11
* Do not lose mem_operands while lowering VLD / VST intrinsics.Evan Cheng2011-04-191-3/+7
* Fix ARM tests to be register allocator independent.Jakob Stoklund Olesen2011-03-311-1/+2
* Add codegen support for using post-increment NEON load/store instructions.Bob Wilson2011-02-071-0/+53
* Fix crash compiling a QQQQ REG_SEQUENCE for a Neon vld3_lane operation.Bob Wilson2010-12-171-0/+19
* Add float patterns for Neon vld1-lane/dup and vst1-lane operations.Bob Wilson2010-12-101-0/+18
* Fix some invalid alignments for Neon vld-dup and vld/st-lane instructions.Bob Wilson2010-12-101-5/+8
* Add codegen patterns for VST1-lane instructions. Radar 8599955.Bob Wilson2010-11-031-1/+1
* Add support for alignment operands on VLD1-lane instructions.Bob Wilson2010-11-011-10/+13
* Add VLD1-lane testcases for quad-register types.Bob Wilson2010-11-011-0/+27
* Add NEON VLD1-lane instructions. Partial fix for Radar 8599955.Bob Wilson2010-11-011-0/+27
* Support alignment for NEON vld-lane and vst-lane instructions.Bob Wilson2010-10-191-20/+30
* Add alignment arguments to all the NEON load/store intrinsics.Bob Wilson2010-08-271-42/+42
* Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,Dan Gohman2010-05-031-12/+12
* Fix tests for Neon load/store intrinsics to match the i8* types expected byBob Wilson2010-04-201-18/+36
* Add codegen support for NEON vld4lane intrinsics with 128-bit vectors.Bob Wilson2009-10-081-0/+53
* Add codegen support for NEON vld3lane intrinsics with 128-bit vectors.Bob Wilson2009-10-081-0/+47
* Add codegen support for NEON vld2lane intrinsics with 128-bit vectors.Bob Wilson2009-10-081-0/+41
* Update NEON struct names to match llvm-gcc changes.Bob Wilson2009-10-061-72/+72
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-091-1/+1
* Fix incorrect declarations of intrinsics in this test.Bob Wilson2009-09-011-12/+12
* Add test for vld{234}_lane instructions.Bob Wilson2009-09-011-0/+187
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