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* [ARM] Only produce qadd8b under hasV6OpsDavid Green2020-05-191-0/+1
* [MachineSink] Fix for breaking phi edges with instructions with multiple defsDavid Green2020-05-071-0/+56
* Don't generate libcalls for wide shift on Windows ARM (PR42711)Hans Wennborg2020-02-251-1/+7
* [FPEnv][ARM] Don't call mutateStrictFPToFP when loweringJohn Brawn2020-02-181-0/+45
* [ARM] Fix infinite loop when lowering STRICT_FP_EXTENDJohn Brawn2020-02-181-19/+39
* [FPEnv][ARM] Add lowering of STRICT_FSETCC and STRICT_FSETCCSJohn Brawn2020-02-181-8/+451
* Revert "[DebugInfo] Remove some users of DBG_VALUEs IsIndirect field"Jeremy Morse2020-02-121-1/+1
* Revert "[ARM] Improve codegen of volatile load/store of i64"Victor Campos2020-02-081-180/+0
* [ARM] Expand vector reduction intrinsics on soft floatNikita Popov2020-02-051-0/+63
* [AArch64][ARM] Always expand ordered vector reductions (PR44600)Nikita Popov2020-02-052-0/+332
* [CodeGen] Move fentry-insert, xray-instrumentation and patchable-function bef...Fangrui Song2020-01-241-3/+3
* [ARM][Thumb2] Fix ADD/SUB invalid writes to SPDiogo Sampaio2020-01-142-5/+5
* [LegalizeTypes] Add SoftenFloatResult support for STRICT_SINT_TO_FP/STRICT_UI...Andrew Wei2020-01-141-0/+18
* [SelectionDAG] ComputeKnownBits - minimum leading/trailing zero bits in LSHR/...Simon Pilgrim2020-01-132-75/+16
* Add support for __declspec(guard(nocf))Andrew Paverd2020-01-101-11/+11
* Reverting, broke some bots. Need further investigation.Diogo Sampaio2020-01-102-5/+5
* [ARM][Thumb2] Fix ADD/SUB invalid writes to SPDiogo Sampaio2020-01-102-5/+5
* [ARM][MVE] MVE-I should not be disabled by -mfpu=noneMomchil Velikov2020-01-091-1/+1
* [ARM][MVE] Enable masked gathers from vector of pointersAnna Welker2020-01-081-0/+1
* [ARM] Regenerate bfi.ll test casesSimon Pilgrim2020-01-071-27/+74
* [ARM][MVE] VPT Blocks: findVCMPToFoldIntoVPSSjoerd Meijer2020-01-071-0/+1
* [ARM] Improve codegen of volatile load/store of i64Victor Campos2020-01-071-0/+180
* [ARM] Use correct TRAP opcode for thumb in FastISelDavid Green2020-01-061-1/+1
* [ARM] Use isFMAFasterThanFMulAndFAdd for scalars as well as MVE vectorsDavid Green2020-01-053-5/+5
* [ARM] Fill in FP16 FMA patternsDavid Green2020-01-051-64/+44
* [ARM] Add and update FMA tests. NFCDavid Green2020-01-053-31/+480
* [TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits ...Simon Pilgrim2020-01-041-6/+3
* [DAGCombine] Initialize the default operation action for SIGN_EXTEND_INREG fo...QingShan Zhang2020-01-031-7/+7
* [ARM] Update ifcvt test target triples and opcodes. NFCDavid Green2020-01-028-41/+41
* Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"...Fangrui Song2019-12-2414-20/+20
* Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" a...Fangrui Song2019-12-2436-105/+105
* [DAGCombine] visitEXTRACT_SUBVECTOR - 'little to big' extract_subvector(bitca...Sanjay Patel2019-12-231-2/+2
* [ARM] [Windows] Use COFF stubs for calls to extern_weak functionsMartin Storsjö2019-12-231-3/+6
* Revert "[ARM] Improve codegen of volatile load/store of i64"Victor Campos2019-12-201-153/+0
* [ARM] Improve codegen of volatile load/store of i64Victor Campos2019-12-191-0/+153
* Reapply: [DebugInfo] Correctly handle salvaged casts and split fragments at ISelstozer2019-12-181-0/+72
* Revert "[DebugInfo] Correctly handle salvaged casts and split fragments at ISel"stozer2019-12-181-72/+0
* [DebugInfo] Correctly handle salvaged casts and split fragments at ISelstozer2019-12-181-0/+72
* [FPEnv] Remove unnecessary rounding mode argument for constrained intrinsicsUlrich Weigand2019-12-171-24/+24
* [PGO][PGSO] Enable size optimizations in code gen / target passes for cold code.Hiroshi Yamauchi2019-12-131-0/+25
* [ARM] Fix in ICE when retrieving the number of micro-ops for vlldm/vlstmMomchil Velikov2019-12-131-0/+72
* Revert "[ARM][MVE] findVCMPToFoldIntoVPS. NFC."Sjoerd Meijer2019-12-131-1/+0
* [ARM][MVE] findVCMPToFoldIntoVPS. NFC.Sjoerd Meijer2019-12-121-0/+1
* [NFC][ARM] Add some test triplesSam Parker2019-12-122-181/+773
* [DebugInfo] Prevent invalid fragments at ISel from dropping debug infostozer2019-12-121-0/+51
* [LegalizeTypes] Bugfixes for big-endian targets when handling BITCASTsMikael Holmen2019-12-101-9/+12
* Add testcases exposing PR44135Mikael Holmen2019-12-101-0/+56
* [PGO][PGSO] Instrument the code gen / target passes.Hiroshi Yamauchi2019-12-091-0/+7
* Revert "[PGO][PGSO] Instrument the code gen / target passes."Hiroshi Yamauchi2019-12-061-7/+0
* Revert "ARM-Darwin: keep the frame register reserved even if not updated."Alina Sbirlea2019-12-061-15/+0
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