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path: root/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir
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* [globalisel] Add G_SEXT_INREGDaniel Sanders2019-08-091-28/+28
* [GlobalISel] Enable CSE in the IRTranslator & legalizer for -O0 with constant...Amara Emerson2019-04-151-8/+0
* [ARM GlobalISel] Support integer division for Thumb2Diana Picus2019-01-281-38/+60
* [GISel]: Change how CSE is enabled by default for each passAditya Nandakumar2019-01-241-4/+4
* [globalisel] Remove redundant -global-isel option from tests that use -run-pa...Daniel Sanders2018-05-051-4/+4
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-168/+168
* [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.Puyan Lotfi2018-01-101-24/+24
* [CodeGen] Always use `printReg` to print registers in both MIR and debugFrancis Visoiu Mistrih2017-11-301-12/+12
* [GISel]: Rework legalization algorithm for better elimination ofAditya Nandakumar2017-11-141-16/+8
* [ARM GlobalISel] Fix call opcodesDiana Picus2017-10-251-24/+24
* MIR: Print the register class or bank in vreg defsJustin Bogner2017-10-241-144/+144
* [GISel][ARM]: Fix illegal Generic copies in testsAditya Nandakumar2017-10-231-72/+184
* [ARM] GlobalISel: Support G_(S|U)REM for s8 and s16Diana Picus2017-07-181-0/+174
* [ARM] GlobalISel: Tighten legalizer tests. NFCDiana Picus2017-07-111-0/+20
* [ARM] GlobalISel: Add support for i32 moduloDiana Picus2017-06-151-0/+75
* [ARM] GlobalISel: Legalize s8 and s16 G_(S|U)DIVDiana Picus2017-04-241-0/+154
* [ARM] GlobalISel: Support G_(S|U)DIV for s32Diana Picus2017-04-241-0/+76
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