| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | AMDGPU: Use gfx9 carry-less add/sub instructions | Matt Arsenault | 2017-11-30 | 1 | -9/+22 |
| * | AMDGPU: Enable IPRA | Matt Arsenault | 2017-11-28 | 1 | -3/+3 |
| * | [AMDGPU] Fix SITargetLowering::LowerCall for pointer info of byval argument | Yaxun Liu | 2017-11-22 | 1 | -26/+27 |
| * | [AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/su... | Dmitry Preobrazhensky | 2017-11-20 | 1 | -6/+6 |
| * | AMDGPU: Make frame register caller preserved | Matt Arsenault | 2017-09-14 | 1 | -1/+1 |
| * | AMDGPU: Don't spill SP reg like a normal CSR | Matt Arsenault | 2017-09-13 | 1 | -0/+2 |
| * | AMDGPU: Fix not accounting for tail call resource usage | Matt Arsenault | 2017-09-05 | 1 | -0/+31 |
| * | AMDGPU: Start adding tail call support | Matt Arsenault | 2017-08-11 | 1 | -0/+225 |

