| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [AMDGPU] Created a sub-register class for the return address operand in the r... | Christudasan Devadasan | 2019-07-09 | 1 | -5/+5 |
| * | AMDGPU: Make s34 the FP register | Matt Arsenault | 2019-07-08 | 1 | -16/+17 |
| * | AMDGPU: Always use s33 for global scratch wave offset | Matt Arsenault | 2019-06-20 | 1 | -6/+6 |
| * | AMDGPU: Don't fix emergency stack slot at offset 0 | Matt Arsenault | 2019-06-05 | 1 | -2/+2 |
| * | AMDGPU: Activate all lanes when spilling CSR VGPR for SGPR spills | Matt Arsenault | 2019-05-24 | 1 | -3/+9 |
| * | [SchedModel] Fix for read advance cycles with implicit pseudo operands. | Jonas Paulsson | 2018-10-30 | 1 | -2/+2 |
| * | AMDGPU: Increase default stack alignment | Matt Arsenault | 2018-03-29 | 1 | -4/+4 |
| * | [AMDGPU] Switch to the new addr space mapping by default | Yaxun Liu | 2018-02-02 | 1 | -5/+5 |
| * | AMDGPU: Remove error on calls for amdgcn | Matt Arsenault | 2017-08-03 | 1 | -3/+3 |
| * | AMDGPU: Fix clobbering CSR VGPRs when spilling SGPR to it | Matt Arsenault | 2017-08-02 | 1 | -4/+16 |
| * | AMDGPU: Initial implementation of calls | Matt Arsenault | 2017-08-01 | 1 | -0/+41 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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