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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-08-02 01:52:45 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-08-02 01:52:45 +0000 |
| commit | 8e8f8f43b043b1839973fcc28694ca8d220a2137 (patch) | |
| tree | f7a857bfcd95c3eb2e3d235938ffdcf0df62a6ae /llvm/test/CodeGen/AMDGPU/nested-calls.ll | |
| parent | 1d6317c3ad5d16355f2a261ff8bdda78f76357b5 (diff) | |
| download | bcm5719-llvm-8e8f8f43b043b1839973fcc28694ca8d220a2137.tar.gz bcm5719-llvm-8e8f8f43b043b1839973fcc28694ca8d220a2137.zip | |
AMDGPU: Fix clobbering CSR VGPRs when spilling SGPR to it
llvm-svn: 309783
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/nested-calls.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/nested-calls.ll | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/nested-calls.ll b/llvm/test/CodeGen/AMDGPU/nested-calls.ll index 2d8d666a26b..f8ce8186e45 100644 --- a/llvm/test/CodeGen/AMDGPU/nested-calls.ll +++ b/llvm/test/CodeGen/AMDGPU/nested-calls.ll @@ -9,9 +9,21 @@ declare void @external_void_func_i32(i32) #0 ; GCN-LABEL: {{^}}test_func_call_external_void_func_i32_imm: ; GCN: s_waitcnt -; GCN-NOT: s32 +; GCN: s_mov_b32 s5, s32 +; Spill CSR VGPR used for SGPR spilling +; GCN: buffer_store_dword v32, off, s[0:3], s5 offset:4 +; GCN-DAG: s_add_u32 s32, s32, 0x200 +; GCN-DAG: v_writelane_b32 v32, s33, 0 +; GCN-DAG: v_writelane_b32 v32, s34, 1 +; GCN-DAG: v_writelane_b32 v32, s35, 2 + ; GCN: s_swappc_b64 -; GCN-NOT: s32 + +; GCN: v_readlane_b32 s35, v32, 2 +; GCN: v_readlane_b32 s34, v32, 1 +; GCN: v_readlane_b32 s33, v32, 0 +; GCN: buffer_load_dword v32, off, s[0:3], s5 offset:4 +; GCN: s_sub_u32 s32, s32, 0x200 ; GCN: s_setpc_b64 define void @test_func_call_external_void_func_i32_imm() #0 { call void @external_void_func_i32(i32 42) @@ -21,10 +33,10 @@ define void @test_func_call_external_void_func_i32_imm() #0 { ; GCN-LABEL: {{^}}test_func_call_external_void_func_i32_imm_stack_use: ; GCN: s_waitcnt ; GCN: s_mov_b32 s5, s32 -; GCN: s_add_u32 s32, s32, 0x1100{{$}} +; GCN: s_add_u32 s32, s32, 0x1200{{$}} ; GCN: buffer_store_dword v{{[0-9]+}}, off, s[0:3], s5 offset ; GCN: s_swappc_b64 -; GCN: s_sub_u32 s32, s32, 0x1100{{$}} +; GCN: s_sub_u32 s32, s32, 0x1200{{$}} ; GCN: s_setpc_b64 define void @test_func_call_external_void_func_i32_imm_stack_use() #0 { %alloca = alloca [16 x i32], align 4 |
