| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | AMDGPU/GlobalISel: Fix import of zext of s16 op patterns | Matt Arsenault | 2020-01-09 | 1 | -4/+2 |
| * | AMDGPU: Relax 32-bit SGPR register class | Matt Arsenault | 2019-10-18 | 1 | -6/+6 |
| * | AMDGPU: Fix i16 arithmetic pattern redundancy | Matt Arsenault | 2019-10-08 | 1 | -12/+4 |
| * | AMDGPU/GlobalISel: Fix selection of 16-bit shifts | Matt Arsenault | 2019-10-07 | 1 | -98/+270 |
| * | AMDGPU/GlobalISel: Select G_SHL | Matt Arsenault | 2019-07-16 | 1 | -0/+203 |
 |
index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
| summaryrefslogtreecommitdiffstats |
|