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path: root/llvm/test/CodeGen/AMDGPU/GlobalISel
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* Revert "[AMDGPU] Invert the handling of skip insertion."Nicolai Hähnle2020-02-031-4/+7
* [AMDGPU] Invert the handling of skip insertion.cdevadas2020-01-151-7/+4
* AMDGPU/GlobalISel: Select llvm.amdgcn.ds.ordered.{add|swap}Matt Arsenault2020-01-133-0/+11
* AMDGPU/GlobalISel: Add some baseline tests for vector extractMatt Arsenault2020-01-131-0/+468
* AMDGPU/GlobalISel: Fix branch targets when emitting SI_IFMatt Arsenault2020-01-131-0/+61
* GlobalISel: Fix assertion on wide G_ZEXT sourcesMatt Arsenault2020-01-131-0/+25
* AMDGPU/GlobalISel: Don't use XEXEC class for SGPRsMatt Arsenault2020-01-1238-196/+193
* AMDGPU/GlobalISel: Copy type when inserting readfirstlaneMatt Arsenault2020-01-128-29/+29
* AMDGPU/GlobalISel: Clamp G_ZEXT source sizesMatt Arsenault2020-01-107-238/+967
* AMDGPU/GlobalISel: Select G_EXTRACT_VECTOR_ELTMatt Arsenault2020-01-092-0/+2099
* AMDGPU/GlobalISel: Fix G_EXTRACT_VECTOR_ELT mapping for s-v caseMatt Arsenault2020-01-091-10/+16
* TableGen/GlobalISel: Add way for SDNodeXForm to work on timmMatt Arsenault2020-01-091-0/+46
* GlobalISel: Handle llvm.read_registerMatt Arsenault2020-01-091-0/+2
* AMDGPU/GlobalISel: Fix argument lowering for vectors of pointersMatt Arsenault2020-01-091-14/+116
* AMDGPU/GlobalISel: Widen 16-bit shift amount sourcesMatt Arsenault2020-01-093-80/+94
* AMDGPU/GlobalISel: Fix import of integer med3Matt Arsenault2020-01-094-0/+616
* AMDGPU/GlobalISel: Fix import of zext of s16 op patternsMatt Arsenault2020-01-094-12/+138
* AMDGPU/GlobalISel: Fix add of neg inline constant patternMatt Arsenault2020-01-091-0/+113
* Revert "Revert "[MIR] Target specific MIR formating and parsing""Daniel Sanders2020-01-088-91/+91
* Revert "[MIR] Target specific MIR formating and parsing"Nico Weber2020-01-088-91/+91
* [MIR] Target specific MIR formating and parsingPeng Guo2020-01-088-91/+91
* Revert "[MIR] Target specific MIR formating and parsing"Daniel Sanders2020-01-088-91/+91
* [MIR] Target specific MIR formating and parsingPeng Guo2020-01-088-91/+91
* AMDGPU/GlobalISel: Fix scalar G_SELECT for arbitrary pointersMatt Arsenault2020-01-072-1/+97
* AMDGPU/GlobalISel: Add some missing G_SELECT testcasesMatt Arsenault2020-01-071-0/+142
* AMDGPU/GlobalISel: Fix missing test for s16 icmpMatt Arsenault2020-01-071-0/+236
* AMDGPU/GlobalISel: Fix readfirstlane pattern importMatt Arsenault2020-01-071-0/+63
* AMDGPU/GlobalISel: Fix import of s_abs_i32 patternMatt Arsenault2020-01-071-0/+105
* AMDGPU/GlobalISel: Select llvm.amdgcn.wqm.voteMatt Arsenault2020-01-071-0/+3
* AMDGPU/GlobalISel: Legalize G_READCYCLECOUNTERMatt Arsenault2020-01-061-0/+3
* AMDGPU/GlobalISel: Select G_UADDE/G_USUBEMatt Arsenault2020-01-064-0/+318
* AMDGPU/GlobalISel: Replace handling of boolean valuesMatt Arsenault2020-01-0651-2036/+2185
* GlobalISel: Implement lower for G_INTRINSIC_ROUNDMatt Arsenault2020-01-062-54/+779
* GlobalISel: Fix unsupported legalize actionMatt Arsenault2020-01-061-0/+78
* AMDGPU/GlobalISel: Select scalar v2s16 G_BUILD_VECTORMatt Arsenault2020-01-061-0/+239
* AMDGPU/GlobalISel: Select more G_EXTRACTs correctlyMatt Arsenault2020-01-061-0/+20
* GlobalISel: Scalarize all division operationsMatt Arsenault2020-01-044-0/+1732
* AMDGPU/GlobalISel: Refine SMRD selection rulesMatt Arsenault2020-01-042-32/+150
* AMDGPU/GlobalISel: Legalize more odd sized loadsMatt Arsenault2020-01-044-302/+34
* AMDGPU/GlobalISel: Assume vcc phis for any vcc inputMatt Arsenault2020-01-042-84/+66
* AMDGPU/GlobalISel: Fix off by one in operand indexMatt Arsenault2020-01-033-116/+78
* AMDGPU/GlobalISel: Correct MMO sizes in some testsMatt Arsenault2020-01-024-932/+98
* AMDGPU/GlobalISel: Regenerate check linesMatt Arsenault2020-01-027-13076/+13076
* AMDGPU/GlobalISel: Select mul24 intrinsicsMatt Arsenault2019-12-301-0/+65
* [MIPS GlobalISel] Select bitreverse. RecommitPetar Avramovic2019-12-301-6/+15
* AMDGPU/GlobalISel: Select llvm.amdgcn.fmad.ftzMatt Arsenault2019-12-301-0/+233
* AMDGPU/GlobalISel: Add select test for fexp2Matt Arsenault2019-12-301-0/+42
* GlobalISel: moreElementsVector for FP min/maxMatt Arsenault2019-12-302-56/+28
* AMDGPU/GlobalISel: Account for G_PHI result bankMatt Arsenault2019-12-302-12/+98
* Revert "[MIPS GlobalISel] Select bitreverse"Dmitri Gribenko2019-12-301-15/+6
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