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* IT turns out that during jumpless setcc lowering eq and ne were swapped.Anton Korobeynikov2010-02-211-8/+5
| | | | | | This fixes PR6348 llvm-svn: 96734
* fix and un-xfail X86/vec_ss_load_fold.llChris Lattner2010-02-211-3/+2
| | | | llvm-svn: 96720
* Undo r96654. The printing of ARM shift instructions in canonical forms can beJohnny Chen2010-02-211-24/+28
| | | | | | | | handled in ARMInstPrinter.cpp. And added PLD/PLDW/PLI (Preload Data/Instruction) for disassembly only. llvm-svn: 96719
* rename SelectScalarSSELoad -> SelectScalarSSELoadXXX and rewriteChris Lattner2010-02-211-18/+28
| | | | | | | | | | | | it to follow the mode needed by the new isel. Instead of returning the input and output chains, it just returns the (currently only one, which is a silly limitation) node that has input and output chains. Since we want the old thing to still work, add a new SelectScalarSSELoad to emulate the old interface. The XXX suffix and the wrapper will eventually go away. llvm-svn: 96715
* Eliminate some uses of immAllOnes, just use -1, it doesChris Lattner2010-02-212-4/+4
| | | | | | the same thing and is more efficient for the matcher. llvm-svn: 96712
* Rename getSDiv to getExactSDiv to reflect its behavior in cases whereDan Gohman2010-02-191-23/+25
| | | | | | the division would have a remainder. llvm-svn: 96693
* Check for overflow when scaling up an add or an addrec forDan Gohman2010-02-191-18/+49
| | | | | | scaled reuse. llvm-svn: 96692
* Revert 96634. It causes assertion failures for 126.gcc and 176.gcc inBob Wilson2010-02-193-17/+6
| | | | | | the armv6 nightly tests. llvm-svn: 96691
* Add a comment.Dan Gohman2010-02-191-0/+6
| | | | llvm-svn: 96688
* Add support for the 'alignstack' attribute to the x86 backend. Fixes PR5254.Charles Davis2010-02-192-1/+6
| | | | | | Also, FileCheck'ize a test. llvm-svn: 96686
* Teach ScalarEvolution how to compute a tripcount for a loop withDan Gohman2010-02-191-0/+13
| | | | | | | | true or false as its exit condition. These are usually eliminated by SimplifyCFG, but the may be left around during a pass which wishes to preserve the CFG. llvm-svn: 96683
* Revert Anton's most recent EH patch (r96637), since it breaks a lot ofBob Wilson2010-02-193-17/+40
| | | | | | ARM and Thumb tests. llvm-svn: 96680
* Revert commits 96556 and 96640, because commit 96556 breaks theDuncan Sands2010-02-193-112/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dragonegg self-host build. I reverted 96640 in order to revert 96556 (96640 goes on top of 96556), but it also looks like with both of them applied the breakage happens even earlier. The symptom of the 96556 miscompile is the following crash: llvm[3]: Compiling AlphaISelLowering.cpp for Release build cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed. Stack dump: 0. Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE' g++: Internal error: Aborted (program cc1plus) This occurs when building LLVM using LLVM built by LLVM (via dragonegg). Probably LLVM has miscompiled itself, though it may have miscompiled GCC and/or dragonegg itself: at this point of the self-host build, all of GCC, LLVM and dragonegg were built using LLVM. Unfortunately this kind of thing is extremely hard to debug, and while I did rummage around a bit I didn't find any smoking guns, aka obviously miscompiled code. Found by bisection. r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines Some dag combiner goodness: Transform br (xor (x, y)) -> br (x != y) Transform br (xor (xor (x,y), 1)) -> br (x == y) Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm" r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines Transform (xor (setcc), (setcc)) == / != 1 to (xor (setcc), (setcc)) != / == 1. e.g. On x86_64 %0 = icmp eq i32 %x, 0 %1 = icmp eq i32 %y, 0 %2 = xor i1 %1, %0 br i1 %2, label %bb, label %return => testl %edi, %edi sete %al testl %esi, %esi sete %cl cmpb %al, %cl je LBB1_2 llvm-svn: 96672
* recommit 96626, evidence that it broke things appearsDale Johannesen2010-02-192-0/+36
| | | | | | to be spurious llvm-svn: 96662
* Added entries for ASR, LSL, LSR, ROR, and RRX so that the disassembler printsJohnny Chen2010-02-191-0/+24
| | | | | | | | | | | | | | | | | out the canonical form (A8.6.98) instead of the pseudo-instruction as provided via MOVs. DBG_ARM_DISASM=YES llvm-mc -triple=arm-unknown-unknown --disassemble 0xc0 0x00 0xa0 0xe1 Opcode=29 Name=ASR Format=ARM_FORMAT_LDMISCFRM 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- | 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 1: 0: 0| 0: 0: 0: 0| ------------------------------------------------------------------------------------------------- asr r0, r0, #1 llvm-svn: 96654
* Revert 96626, which causes build failure on ppc Darwin.Dale Johannesen2010-02-192-36/+0
| | | | llvm-svn: 96653
* Transform (xor (setcc), (setcc)) == / != 1 toEvan Cheng2010-02-191-3/+13
| | | | | | | | | | | | | | | | | | | (xor (setcc), (setcc)) != / == 1. e.g. On x86_64 %0 = icmp eq i32 %x, 0 %1 = icmp eq i32 %y, 0 %2 = xor i1 %1, %0 br i1 %2, label %bb, label %return => testl %edi, %edi sete %al testl %esi, %esi sete %cl cmpb %al, %cl je LBB1_2 llvm-svn: 96640
* Use the same encoding for EH stuff uniformly on all MachO targets.Anton Korobeynikov2010-02-193-40/+17
| | | | | | This hopefulyl should unbreak EH on PPC/Darwin. llvm-svn: 96637
* Radar 7636153. In the presence of large call frames, it's not sufficientJim Grosbach2010-02-193-6/+17
| | | | | | | | | for ARM to just check if a function has a FP to determine if it's safe to simplify the stack adjustment pseudo ops prior to eliminating frame indices. Allow targets to override the default behavior and does so for ARM and Thumb2. llvm-svn: 96634
* When determining the set of interesting reuse factors, considerDan Gohman2010-02-191-9/+15
| | | | | | | | strides in foreign loops. This helps locate reuse opportunities with existing induction variables in foreign loops and reduces the need for inserting new ones. This fixes rdar://7657764. llvm-svn: 96629
* Indvars needs to explicitly notify ScalarEvolution when it is replacingDan Gohman2010-02-182-0/+36
| | | | | | | | a loop exit value, so that if a loop gets deleted, ScalarEvolution isn't stick holding on to dangling SCEVAddRecExprs for that loop. This fixes PR6339. llvm-svn: 96626
* Added LDRD_PRE/POST & STRD_PRE/POST for disassembly only.Johnny Chen2010-02-182-0/+80
| | | | llvm-svn: 96619
* replaceUsesOfWithOnConstant implementation for unions.Talin2010-02-181-1/+46
| | | | llvm-svn: 96616
* Hoist this loop-invariant logic out of the loop.Dan Gohman2010-02-181-4/+6
| | | | llvm-svn: 96614
* Always normalize spill weights, also for intervals created by spilling.Jakob Stoklund Olesen2010-02-182-4/+10
| | | | | | | | | | | | | | Moderate the weight given to very small intervals. The spill weight given to new intervals created when spilling was not normalized in the same way as the original spill weights calculated by CalcSpillWeights. That meant that restored registers would tend to hang around because they had a much higher spill weight that unspilled registers. This improves the runtime of a few tests by up to 10%, and there are no significant regressions. llvm-svn: 96613
* Make CodePlacementOpt detect special EH control flow byDan Gohman2010-02-181-7/+8
| | | | | | | | | | checking whether AnalyzeBranch disagrees with the CFG directly, rather than looking for EH_LABEL instructions. EH_LABEL instructions aren't always at the end of the block, due to FP_REG_KILL and other things. This fixes an infinite loop compiling MultiSource/Benchmarks/Bullet. llvm-svn: 96611
* Destroy MDNodes gracefully while deleting llvm context.Devang Patel2010-02-182-1/+18
| | | | llvm-svn: 96609
* Generate DBG_VALUE from dbg.value intrinsics. These currentlyDale Johannesen2010-02-181-0/+31
| | | | | | comes out as comments but will eventually generate DWARF. llvm-svn: 96601
* Remap the call sites of a shared function in interrupt line functions.Sanjiv Gupta2010-02-182-0/+27
| | | | llvm-svn: 96591
* Re-factoring.Sanjiv Gupta2010-02-182-67/+90
| | | | llvm-svn: 96589
* Uniformize the way these options are printed. Requested byDuncan Sands2010-02-182-2/+2
| | | | | | Russell Wallace. llvm-svn: 96580
* Remove terminating dot in description. Inconsistency pointedDuncan Sands2010-02-181-1/+1
| | | | | | out by Russell Wallace. llvm-svn: 96579
* Refer to -help instead of --help since this is what tools themselves say.Duncan Sands2010-02-181-7/+7
| | | | | | | | Also, have tools output -help-hidden rather than refer to --help-hidden, for consistency, and likewise adjust documentation. This doesn't change every mention of --help, only those which seemed clearly safe. llvm-svn: 96578
* add a missing type cast.Chris Lattner2010-02-181-1/+1
| | | | llvm-svn: 96574
* Use NEON vmin/vmax instructions for floating-point selects.Bob Wilson2010-02-183-9/+109
| | | | | | Radar 7461718. llvm-svn: 96572
* Added LDRSBT, LDRHT, LDRSHT for disassembly only. And fixed encoding errorsJohnny Chen2010-02-182-6/+24
| | | | | | of AI3ldsbpo, AI3ldhpo, and AI3ldshpo in ARMInstrFormats.td in the process. llvm-svn: 96565
* Some dag combiner goodness:Evan Cheng2010-02-183-22/+102
| | | | | | | | Transform br (xor (x, y)) -> br (x != y) Transform br (xor (xor (x,y), 1)) -> br (x == y) Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm" llvm-svn: 96556
* Added for disassembly only the variants of DMB, DSB, and ISB.Johnny Chen2010-02-181-0/+60
| | | | llvm-svn: 96540
* MC/Mach-O: Update fixup values for change to X86 offsets.Daniel Dunbar2010-02-171-6/+4
| | | | llvm-svn: 96532
* Remove the NEON N2VSInt instruction class: it's only used in one place andBob Wilson2010-02-171-10/+4
| | | | | | | since it has no pattern, there's not much point in distinguishing an "N2VS" class for intrinsics anyway. llvm-svn: 96525
* Added CLREX (Clear-Exclusive) for disassembly only.Johnny Chen2010-02-171-0/+8
| | | | | | A8.6.30 llvm-svn: 96523
* More cleanup for NEON:Bob Wilson2010-02-171-101/+90
| | | | | | | | | | | | * Use "S" abbreviation for scalar single FP registers in class and pattern names, instead of keeping the "D" (for "double") abbreviation and tacking on an "s" elsewhere in the name. * Move the scalar single FP register classes and patterns to be more consistent with other definitions in the file. * Rename "VNEGf32d" definition to "VNEGfd" for consistency. * Deleted the N2VDIntsPat pattern; N2VSPat is good enough. llvm-svn: 96521
* Added RFE for disassembly only.Johnny Chen2010-02-171-1/+16
| | | | | | | B6.1.8 RFE Return From Exception loads the PC and the CPSR from the word at the specified address and the following word respectively. llvm-svn: 96519
* Make the non-temporal bit "significant" in MemSDNodes so they aren'tDavid Greene2010-02-171-8/+17
| | | | | | CSE'd or otherwise combined with temporal MemSDNodes. llvm-svn: 96505
* Remember to define super registers in mips calls.Jakob Stoklund Olesen2010-02-171-3/+2
| | | | llvm-svn: 96504
* Add Regex::sub, for doing regular expression substitution with backreferences.Daniel Dunbar2010-02-171-0/+76
| | | | llvm-svn: 96503
* Dead code elimination.Jakob Stoklund Olesen2010-02-172-38/+0
| | | | llvm-svn: 96496
* "Fix and issue in SparcAsmPrinter where multiple identical .LLGETPCHn ↵Chris Lattner2010-02-171-5/+6
| | | | | | symbols could be emitted in the same file (it was uniqued by block number, but not by function number). " Patch by Nathan Keynes! llvm-svn: 96495
* move isOnlyReachableByFallthrough out of MachineBasicBlock into AsmPrinter,Chris Lattner2010-02-173-31/+69
| | | | | | | and add a sparc implementation that knows about delay slots. Patch by Nathan Keynes! llvm-svn: 96492
* add a note, from PR5100Chris Lattner2010-02-171-0/+2
| | | | llvm-svn: 96490
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