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| author | Evan Cheng <evan.cheng@apple.com> | 2010-02-19 00:34:39 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-02-19 00:34:39 +0000 |
| commit | d2d9252f35673f3a6c49ee302e8c735dea02eefe (patch) | |
| tree | e37178731e81a90db050ac5c8a1d87dc619dd2ae /llvm/lib | |
| parent | dc61962e67cc49444c74c1bc7d4a9664ce68d961 (diff) | |
| download | bcm5719-llvm-d2d9252f35673f3a6c49ee302e8c735dea02eefe.tar.gz bcm5719-llvm-d2d9252f35673f3a6c49ee302e8c735dea02eefe.zip | |
Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.
e.g. On x86_64
%0 = icmp eq i32 %x, 0
%1 = icmp eq i32 %y, 0
%2 = xor i1 %1, %0
br i1 %2, label %bb, label %return
=>
testl %edi, %edi
sete %al
testl %esi, %esi
sete %cl
cmpb %al, %cl
je LBB1_2
llvm-svn: 96640
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 9f9d8b0ffd5..2cb4fc9c3c5 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -1855,9 +1855,19 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1, SDValue Op0 = N0; if (Op0.getOpcode() == ISD::TRUNCATE) Op0 = Op0.getOperand(0); - if (Op0.getOpcode() == ISD::AND && - isa<ConstantSDNode>(Op0.getOperand(1)) && - cast<ConstantSDNode>(Op0.getOperand(1))->getAPIntValue() == 1) { + + if ((Op0.getOpcode() == ISD::XOR || Op0.getOpcode() == ISD::AND) && + Op0.getOperand(0).getOpcode() == ISD::SETCC && + Op0.getOperand(1).getOpcode() == ISD::SETCC) { + // (and (setcc), (setcc)) == / != 1 -> (setcc) == / != (setcc) + // (xor (setcc), (setcc)) == / != 1 -> (setcc) != / == (setcc) + if (Op0.getOpcode() == ISD::XOR) + Cond = (Cond == ISD::SETEQ) ? ISD::SETNE : ISD::SETEQ; + return DAG.getSetCC(dl, VT, Op0.getOperand(0), Op0.getOperand(1), + Cond); + } else if (Op0.getOpcode() == ISD::AND && + isa<ConstantSDNode>(Op0.getOperand(1)) && + cast<ConstantSDNode>(Op0.getOperand(1))->getAPIntValue() == 1) { if (Op0.getValueType() != VT) Op0 = DAG.getNode(ISD::AND, dl, VT, DAG.getNode(ISD::TRUNCATE, dl, VT, Op0.getOperand(0)), |
