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| author | Johnny Chen <johnny.chen@apple.com> | 2010-02-18 03:27:42 +0000 |
|---|---|---|
| committer | Johnny Chen <johnny.chen@apple.com> | 2010-02-18 03:27:42 +0000 |
| commit | 74c904589e8be8c52fbdfc96d6eeadb6743842f8 (patch) | |
| tree | 89ec56328a8d61a6b5589510ea4b8790f108d219 /llvm/lib | |
| parent | 89b12b34f6bdb715eaad3996d22e2a49ab912692 (diff) | |
| download | bcm5719-llvm-74c904589e8be8c52fbdfc96d6eeadb6743842f8.tar.gz bcm5719-llvm-74c904589e8be8c52fbdfc96d6eeadb6743842f8.zip | |
Added LDRSBT, LDRHT, LDRSHT for disassembly only. And fixed encoding errors
of AI3ldsbpo, AI3ldhpo, and AI3ldshpo in ARMInstrFormats.td in the process.
llvm-svn: 96565
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrFormats.td | 6 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 24 |
2 files changed, 24 insertions, 6 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrFormats.td b/llvm/lib/Target/ARM/ARMInstrFormats.td index db604580cce..ea9cdc9ca61 100644 --- a/llvm/lib/Target/ARM/ARMInstrFormats.td +++ b/llvm/lib/Target/ARM/ARMInstrFormats.td @@ -734,7 +734,7 @@ class AI3ldhpo<dag oops, dag iops, Format f, InstrItinClass itin, let Inst{6} = 0; // S bit let Inst{7} = 1; let Inst{20} = 1; // L bit - let Inst{21} = 1; // W bit + let Inst{21} = 0; // W bit let Inst{24} = 0; // P bit let Inst{27-25} = 0b000; } @@ -747,7 +747,7 @@ class AI3ldshpo<dag oops, dag iops, Format f, InstrItinClass itin, let Inst{6} = 1; // S bit let Inst{7} = 1; let Inst{20} = 1; // L bit - let Inst{21} = 1; // W bit + let Inst{21} = 0; // W bit let Inst{24} = 0; // P bit let Inst{27-25} = 0b000; } @@ -760,7 +760,7 @@ class AI3ldsbpo<dag oops, dag iops, Format f, InstrItinClass itin, let Inst{6} = 1; // S bit let Inst{7} = 1; let Inst{20} = 1; // L bit - let Inst{21} = 1; // W bit + let Inst{21} = 0; // W bit let Inst{24} = 0; // P bit let Inst{27-25} = 0b000; } diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index 77831534f6f..5dc215b5654 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -1069,7 +1069,7 @@ def LDRSB_POST: AI3ldsbpo<(outs GPR:$dst, GPR:$base_wb), "ldrsb", "\t$dst, [$base], $offset", "$base = $base_wb", []>; } -// LDRT and LDRBT are for disassembly only. +// LDRT, LDRBT, LDRSBT, LDRHT, LDRSHT are for disassembly only. def LDRT : AI2ldwpo<(outs GPR:$dst, GPR:$base_wb), (ins GPR:$base, am2offset:$offset), LdFrm, IIC_iLoadru, @@ -1078,8 +1078,26 @@ def LDRT : AI2ldwpo<(outs GPR:$dst, GPR:$base_wb), } def LDRBT : AI2ldbpo<(outs GPR:$dst, GPR:$base_wb), - (ins GPR:$base,am2offset:$offset), LdFrm, IIC_iLoadru, - "ldrb", "\t$dst, [$base], $offset", "$base = $base_wb", []> { + (ins GPR:$base,am2offset:$offset), LdFrm, IIC_iLoadru, + "ldrbt", "\t$dst, [$base], $offset", "$base = $base_wb", []> { + let Inst{21} = 1; // overwrite +} + +def LDRSBT : AI3ldsbpo<(outs GPR:$dst, GPR:$base_wb), + (ins GPR:$base,am2offset:$offset), LdMiscFrm, IIC_iLoadru, + "ldrsbt", "\t$dst, [$base], $offset", "$base = $base_wb", []> { + let Inst{21} = 1; // overwrite +} + +def LDRHT : AI3ldhpo<(outs GPR:$dst, GPR:$base_wb), + (ins GPR:$base, am3offset:$offset), LdMiscFrm, IIC_iLoadru, + "ldrht", "\t$dst, [$base], $offset", "$base = $base_wb", []> { + let Inst{21} = 1; // overwrite +} + +def LDRSHT : AI3ldshpo<(outs GPR:$dst, GPR:$base_wb), + (ins GPR:$base,am3offset:$offset), LdMiscFrm, IIC_iLoadru, + "ldrsht", "\t$dst, [$base], $offset", "$base = $base_wb", []> { let Inst{21} = 1; // overwrite } |
