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* R600/SI: Use bcnt instruction for ctpopMatt Arsenault2014-06-106-11/+27
* R600: Handle fcopysignMatt Arsenault2014-06-105-3/+27
* R600/SI: Handle sign_extend and zero_extend to i64 with patterns.Matt Arsenault2014-06-103-42/+36
* Add a FIXME.Eric Christopher2014-06-101-0/+2
* Move AArch64SelectionDAGInfo down to the subtarget.Eric Christopher2014-06-104-4/+6
* [FastISel] Collect statistics about failing intrinsic calls.Juergen Ributzka2014-06-101-1/+50
* Remove the cached little endian variable. We can get it easily offEric Christopher2014-06-102-7/+4
* Have AArch64SelectionDAGInfo take a DataLayout parameter ratherEric Christopher2014-06-103-4/+4
* Remove caching of the subtarget for AArch64SelectionDAGInfo.Eric Christopher2014-06-102-7/+4
* Move DataLayout onto the AArch64 subtarget.Eric Christopher2014-06-104-11/+15
* Test commit, wraps some lines to fit in 80 columns.Zachary Turner2014-06-101-2/+4
* Move AArch64FrameLowering into the subtarget.Eric Christopher2014-06-104-5/+11
* Remove the uses of AArch64TargetMachine and AArch64Subtarget fromEric Christopher2014-06-105-16/+9
* Do Materialize Floating Point in Mips Fast-IselReed Kotler2014-06-101-2/+23
* [X86] Improved target combine rules for selecting horizontal add/sub.Andrea Di Biagio2014-06-101-2/+20
* Hexagon: Expand i1 SELECT_CCTom Stellard2014-06-101-0/+1
* [X86] AVX512: Add vmovntdqaAdam Nemet2014-06-101-0/+11
* Fix a bug in the Thumb1 ARM Load/Store optimizerRenato Golin2014-06-101-7/+7
* SelectionDAG: Don't use MVT::Other to determine legality of ISD::SELECT_CCTom Stellard2014-06-106-28/+22
* SelectionDAG: Enable (and (setcc x), (setcc y)) -> (setcc (and x, y)) for vec...Tom Stellard2014-06-101-4/+4
* SelectionDAG: Expand SELECT_CC to SELECT + SETCCTom Stellard2014-06-107-52/+24
* [PPC64LE] Recognize shufflevector patterns for little endianBill Schmidt2014-06-103-84/+151
* [AArch64] Emit .ident compiler version attribute.Chad Rosier2014-06-101-0/+2
* Condition codes AL and NV are invalid in the aliases that useArtyom Skrobov2014-06-102-1/+10
* Anonymous definitions in foreach blocks triggered a 'def already exists'Artyom Skrobov2014-06-101-2/+7
* AArch64: disallow x30 & x29 as the destination for indirect tail callsTim Northover2014-06-101-1/+1
* Revert "X86: elide comparisons after cmpxchg instructions."Tim Northover2014-06-102-106/+57
* X86: elide comparisons after cmpxchg instructions.Tim Northover2014-06-102-57/+106
* AArch64: teach FastISel how to handle offset FrameIndicesTim Northover2014-06-101-4/+11
* AArch64: make FastISel memcpy emission more robust.Tim Northover2014-06-101-3/+5
* Delete X86JITInfo in the subtarget destructor.Eric Christopher2014-06-101-0/+1
* [ConstantHoisting][X86] Improve the cost model for small constants with large...Juergen Ributzka2014-06-101-8/+35
* Reorder Value and User fields to save 8 bytes of padding on 64-bitReid Kleckner2014-06-091-4/+3
* Removing an "if (!this)" check from two print methods. The condition willRichard Trieu2014-06-098-10/+12
* [PPC64LE] Generate correct code for unaligned little-endian vector loadsBill Schmidt2014-06-091-21/+39
* Generate better location ranges for some register-described variables.Alexey Samsonov2014-06-091-24/+55
* ARM: add VLA extension for WoA Itanium ABISaleem Abdulrasool2014-06-093-1/+125
* Look through addrspacecasts when turning ptr comparisons intoMatt Arsenault2014-06-091-5/+21
* Remove old fenv.h workaround for a historic clang driver bugAlp Toker2014-06-091-9/+2
* Fold FEnv.h into the implementationAlp Toker2014-06-091-7/+41
* Move all of the x86 subtarget initialized variables down into the x86 subtargetEric Christopher2014-06-097-67/+95
* R600/SI: Rename VOP3 helper class to be more generalMatt Arsenault2014-06-092-4/+4
* [X86] Add target combine rules for horizontal add/sub.Andrea Di Biagio2014-06-092-0/+106
* R600/SI: Keep 64-bit not on SALUMatt Arsenault2014-06-093-10/+69
* R600: Fix selection failure for vector bswapMatt Arsenault2014-06-091-0/+1
* [PPC64LE] Generate correct little-endian code for v16i8 multiplyBill Schmidt2014-06-091-4/+16
* [msan] Workaround for invalid origins in shufflevector.Evgeniy Stepanov2014-06-091-4/+8
* [mips] Fix a bug for NaCl target - Don't report the error when non-dangerousSasa Stankovic2014-06-091-7/+6
* [X86] Avoid emitting unnecessary test instructions.Andrea Di Biagio2014-06-091-2/+19
* [DAG] Expose NoSignedWrap, NoUnsignedWrap and Exact flags to SelectionDAG.Andrea Di Biagio2014-06-094-17/+109
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