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| author | Tim Northover <tnorthover@apple.com> | 2014-06-10 10:50:24 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-06-10 10:50:24 +0000 |
| commit | 9ffd0b020f5e128edcc403aee0bc1d7b0ea3b754 (patch) | |
| tree | 57180484cd56e942ed0279880017194834c241a6 /llvm/lib | |
| parent | 7b9f86da5d9db958434a3d0666097d17c042c9ca (diff) | |
| download | bcm5719-llvm-9ffd0b020f5e128edcc403aee0bc1d7b0ea3b754.tar.gz bcm5719-llvm-9ffd0b020f5e128edcc403aee0bc1d7b0ea3b754.zip | |
AArch64: disallow x30 & x29 as the destination for indirect tail calls
As Ana Pazos pointed out, these have to be restored to their incoming values
before a function returns; i.e. before the tail call. So they can't be used
correctly as the destination register.
llvm-svn: 210525
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64RegisterInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64RegisterInfo.td b/llvm/lib/Target/AArch64/AArch64RegisterInfo.td index 21c927f2385..a30e4ad0b5d 100644 --- a/llvm/lib/Target/AArch64/AArch64RegisterInfo.td +++ b/llvm/lib/Target/AArch64/AArch64RegisterInfo.td @@ -175,7 +175,7 @@ def GPR64all : RegisterClass<"AArch64", [i64], 64, (add GPR64common, XZR, SP)>; // This is for indirect tail calls to store the address of the destination. def tcGPR64 : RegisterClass<"AArch64", [i64], 64, (sub GPR64common, X19, X20, X21, X22, X23, X24, X25, X26, - X27, X28)>; + X27, X28, FP, LR)>; // GPR register classes for post increment amount of vector load/store that // has alternate printing when Rm=31 and prints a constant immediate value |
