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* [X86][FastISel] Assert that we are dealing with arithmetic with overflow ↵Zvi Rackover2016-11-151-0/+3
| | | | | | intrinsics. NFC llvm-svn: 286961
* [AMDGPU] TableGen: change individual instruction flags to bit type from bits<1>Sam Kolton2016-11-153-47/+47
| | | | | | | | | | | | Summary: This is needed to be able to use this flags in InstrMappings. Reviewers: tstellarAMD, vpykhtin Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye Differential Revision: https://reviews.llvm.org/D26666 llvm-svn: 286960
* [X86][FastISel] Fix lowering of overflow result on AVX512 targetsZvi Rackover2016-11-151-2/+2
| | | | | | | | | | | | | | | | Summary: Fix a case where the overflow value of type i1, which is legal on AVX512, was assigned to a VK1 register class. We always want this value to be assigned to a GPR since the overflow return value is lowered to a SETO instruction. Fixes pr30981. Reviewers: mkuper, igorb, craig.topper, guyblank, qcolombet Subscribers: qcolombet, llvm-commits Differential Revision: https://reviews.llvm.org/D26620 llvm-svn: 286958
* Test commit, remove trailing space.Florian Hahn2016-11-151-1/+1
| | | | | | This commit is used to test commit access. llvm-svn: 286957
* Introduce TLI predicative for base-relative Jump Tables.Joerg Sonnenberger2016-11-153-38/+6
| | | | | | | | | | | For 64bit ABIs it is common practice to use relative Jump Tables with potentially different relocation bases. As the logic for the jump table itself doesn't depend on the relocation base, make it easier for targets to use the generic logic. Start by dropping the now redundant MIPS logic. Differential Revision: https://reviews.llvm.org/D26578 llvm-svn: 286951
* [ARM] Add machine scheduler for Cortex-R52 Javed Absar2016-11-153-1/+985
| | | | | | | | | | | | | This patch adds the Sched Machine Model for Cortex-R52. Details of the pipeline and descriptions are in comments in file ARMScheduleR52.td included in this patch. Reviewers: rengolin, jmolloy Differential Revision: https://reviews.llvm.org/D26500 llvm-svn: 286949
* DAGCombiner: fix combine of trunc and selectAsaf Badouh2016-11-151-1/+1
| | | | | | | | | | | | | bugzilla: https://llvm.org/bugs/show_bug.cgi?id=29002 pr29002 Differential Revision: https://reviews.llvm.org/D26449 llvm-svn: 286938
* TableGen: Add operator !orMatt Arsenault2016-11-154-2/+9
| | | | llvm-svn: 286936
* [X86][GlobalISel] Add minimal call lowering support to the IRTranslatorZvi Rackover2016-11-157-2/+196
| | | | | | | | | | | | | | | Summary: Add basic functionality to support call lowering for X86. Currently only supports functions which return void and take zero arguments. Inspired by commit 286573. Reviewers: ab, qcolombet, t.p.northover Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D26593 llvm-svn: 286935
* [X86] Add LLVM version number for each intrinsic handled by auto upgrade for ↵Craig Topper2016-11-151-152/+158
| | | | | | | | | | age tracking. One day we'd like to remove some of this autoupgrade support and it will be easier if we know how long some of it has been around. Differential Revision: https://reviews.llvm.org/D26321 llvm-svn: 286933
* AMDGPU: Fix f16 fabs/fnegMatt Arsenault2016-11-152-4/+18
| | | | llvm-svn: 286931
* Simplify identify_magic.Rui Ueyama2016-11-151-26/+23
| | | | | | This patch defines a memcmp-ish helper function to simplify identify_magic. llvm-svn: 286928
* Improve DWARF parsing speed by improving DWARFAbbreviationDeclarationGreg Clayton2016-11-153-36/+132
| | | | | | | | | | | | | | | | | | | | This patch gets a DWARF parsing speed improvement by having DWARFAbbreviationDeclaration instances know if they have a fixed byte size. If an abbreviation has a fixed byte size that can be calculated given a DWARFUnit, then parsing a DIE becomes two steps: parse ULEB128 abbrev code, and then add constant size to the offset. This patch also adds a fixed byte size to each DWARFAbbreviationDeclaration::AttributeSpec so that attributes can quickly skip their values if needed without the need to lookup the fixed for size. Notable improvements: - DWARFAbbreviationDeclaration::findAttributeIndex() now returns an Optional<uint32_t> instead of a uint32_t and we no longer have to look for the magic -1U return value - Optional<uint32_t> DWARFAbbreviationDeclaration::findAttributeIndex(dwarf::Attribute attr) const; - DWARFAbbreviationDeclaration now has a getAttributeValue() function that extracts an attribute value given a DIE offset that takes advantage of the DWARFAbbreviationDeclaration::AttributeSpec::ByteSize - bool DWARFAbbreviationDeclaration::getAttributeValue(const uint32_t DIEOffset, const dwarf::Attribute Attr, const DWARFUnit &U, DWARFFormValue &FormValue) const; - A DWARFAbbreviationDeclaration instance can return a fixed byte size for itself so DWARF parsing is faster: - Optional<size_t> DWARFAbbreviationDeclaration::getFixedAttributesByteSize(const DWARFUnit &U) const; - Any functions that used to take a "const DWARFUnit *U" that would crash if U was NULL now take a "const DWARFUnit &U" and are only called with a valid DWARFUnit Differential Revision: https://reviews.llvm.org/D26567 llvm-svn: 286924
* Fix -Wswitch.Rui Ueyama2016-11-152-0/+2
| | | | llvm-svn: 286920
* Add a file magic for CL.exe's object file created with /GL.Rui Ueyama2016-11-152-11/+8
| | | | | | | | | | | | This patch makes it possible to identify object files created by CL.exe with /GL option. Such file contains Microsoft proprietary intermediate code instead of target machine code to do LTO. I need this to print out user-friendly error message from LLD. Differential Revision: https://reviews.llvm.org/D26645 llvm-svn: 286919
* AMDGPU: Set hasExtraSrcRegAllocReq on v_div_scale_*Matt Arsenault2016-11-151-0/+2
| | | | | | | This doesn't solve any problems I know about, but this should have more conservative assumptions about the operands' llvm-svn: 286913
* AMDGPU: Fix formatting of 1/2pi immediateMatt Arsenault2016-11-151-2/+2
| | | | llvm-svn: 286912
* MIRParser: Add support for parsing vreg reg alloc hintsTom Stellard2016-11-153-2/+30
| | | | | | | | | | Reviewers: qcolombet, MatzeB Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D26573 llvm-svn: 286911
* [AArch64] Compute the Newton series for reciprocals nativelyEvandro Menezes2016-11-143-6/+75
| | | | | | | | | | Implement the Newton series for square root, its reciprocal and reciprocal natively using the specialized instructions in AArch64 to perform each series iteration. Differential revision: https://reviews.llvm.org/D26518 llvm-svn: 286907
* Linker: Remove unnecessary call to copyMetadata in IRLinker::linkGlobalVariable.Peter Collingbourne2016-11-141-2/+0
| | | | | | | | | | | This was causing us to create duplicate metadata on global variables. Debug info test case by Adrian Prantl, additional test cases by me. Fixes PR31012. Differential Revision: https://reviews.llvm.org/D26622 llvm-svn: 286905
* RegAllocGreedy: Properly initialize this pass, so that -run-pass will workTom Stellard2016-11-142-13/+19
| | | | | | | | | | Reviewers: qcolombet, MatzeB Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D26572 llvm-svn: 286895
* [tsan] Add support for C++ exceptions into TSan (call __tsan_func_exit ↵Kuba Brecka2016-11-147-178/+195
| | | | | | | | | | during unwinding), LLVM part This adds support for TSan C++ exception handling, where we need to add extra calls to __tsan_func_exit when a function is exitted via exception mechanisms. Otherwise the shadow stack gets corrupted (leaked). This patch moves and enhances the existing implementation of EscapeEnumerator that finds all possible function exit points, and adds extra EH cleanup blocks where needed. Differential Revision: https://reviews.llvm.org/D26177 llvm-svn: 286893
* Add a checkSymbolTable() method to the MachOObjectFile class.Kevin Enderby2016-11-141-0/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The philosophy of the error checking in libObject for Mach-O files is that the constructor will check the load commands so for their tables the offsets and sizes are properly contained in the file. But there is no checking of the entries of any of the tables. For the contents of the tables themselves the methods accessing the contents of the entries return errors as needed. In some cases this however makes it difficult or cumbersome to produce a good error message which would include the tool name, file name, archive member, and name of the architecture of a slice of a universal file the error occurred in. So idea is that there will be a method to check a table which can be called up front before using it allowing a good error message to be produced before a table is used. And if only verification of the Mach-O file and its tables are wanted a new possible method checkAllTables() could be added to call all of the methods to check all the tables at some time when such methods exist. The checkSymbolTable() is the first of such methods to check one of the Mach-O file tables. This method initially will used in llvm-objdump’s DisassembleMachO() routine before it gets the section and symbol information. As if there are problems with the symbol table currently the error is first encountered by the bool operator() in the SymbolSorter() struct which passed to std::sort(). In this case there is no context as to the file name the symbol which results a poor error message: LLVM ERROR: truncated or malformed object (bad string index: 22 for symbol at index 1) with the added call to the checkSymbolTable() method the error message includes the tool name and file name: llvm-objdump: 'macho-invalid-symbol-strx': truncated or malformed object (bad string table index: 22 past the end of string table, for symbol at index 1) llvm-svn: 286887
* [Hexagon] Give a predicate function a more meaningful nameKrzysztof Parzyszek2016-11-142-18/+18
| | | | | | | Change "orisadd" to "IsOrAdd" to follow the naming conventions, and change "isOrAdd" in the C++ code to "isOrEquivalentToAdd". llvm-svn: 286886
* ARM: try to fix GCC 4.8 compilation again after r286881.Tim Northover2016-11-141-1/+2
| | | | llvm-svn: 286882
* Recommit: ARM: sort register lists by encoding in push/pop instructions.Tim Northover2016-11-143-2/+28
| | | | | | | | | | | | | | | | | For example we were producing push {r8, r10, r11, r4, r5, r7, lr} This is misleading (r4, r5 and r7 are actually pushed before the rest), and other components (stack folding recently) often forget to deal with the extra complexity coming from the different order, leading to miscompiles. Finally, we warn about our own code in -no-integrated-as mode without this, which is really not a good idea. Fixed usage of std::sort so that we (hopefully) use instantiations that actually exist in GCC 4.8. llvm-svn: 286881
* [AArch64] Change some pointers to references. NFC.Geoff Berry2016-11-141-16/+16
| | | | | | Follow-up change to r286875. llvm-svn: 286879
* [AArch64] Split 0 vector stores into scalar store pairs.Geoff Berry2016-11-141-4/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Replace a splat of zeros to a vector store by scalar stores of WZR/XZR. The load store optimizer pass will merge them to store pair stores. This should be better than a movi to create the vector zero followed by a vector store if the zero constant is not re-used, since one instructions and one register live range will be removed. For example, the final generated code should be: stp xzr, xzr, [x0] instead of: movi v0.2d, #0 str q0, [x0] Reviewers: t.p.northover, mcrosier, MatzeB, jmolloy Subscribers: aemerson, rengolin, llvm-commits Differential Revision: https://reviews.llvm.org/D26561 llvm-svn: 286875
* [AArch64] Factor out transform code from split16BStore. NFC.Geoff Berry2016-11-141-24/+31
| | | | llvm-svn: 286874
* [ThinLTO] Only promote exported locals as marked in indexTeresa Johnson2016-11-143-16/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: We have always speculatively promoted all renamable local values (except const non-address taken variables) for both the exporting and importing module. We would then internalize them back based on the ThinLink results if they weren't actually exported. This is inefficient, and results in unnecessary renames. It also meant we had to check the non-renamability of a value in the summary, which was already checked during function importing analysis in the ThinLink. Made renameModuleForThinLTO (which does the promotion/renaming) instead use the index when exporting, to avoid unnecessary renames/promotions. For importing modules, we can simply promoted all values as any local we import by definition is exported and needs promotion. This required changes to the method used by the FunctionImport pass (only invoked from 'opt' for testing) and when invoked from llvm-link, since neither does a ThinLink. We simply conservatively mark all locals in the index as promoted, which preserves the current aggressive promotion behavior. I also needed to change an llvm-lto based test where we had previously been aggressively promoting values that weren't importable (aliasees), but now will not promote. Reviewers: mehdi_amini Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D26467 llvm-svn: 286871
* [libFuzzer] replace 'auto' with 'auto *' to better follow the LLVM styleKostya Serebryany2016-11-141-3/+3
| | | | llvm-svn: 286870
* Revert: r286868 - Test commitDaniel Sanders2016-11-141-1/+0
| | | | llvm-svn: 286869
* Test commitDaniel Sanders2016-11-141-0/+1
| | | | llvm-svn: 286868
* Revert "ARM: sort register lists by encoding in push/pop instructions."Tim Northover2016-11-143-28/+2
| | | | | | | This reverts commit 286866. It broke a bot, something to do with exactly which templates std::sort accepts. llvm-svn: 286867
* ARM: sort register lists by encoding in push/pop instructions.Tim Northover2016-11-143-2/+28
| | | | | | | | | | | | | | For example we were producing push {r8, r10, r11, r4, r5, r7, lr} This is misleading (r4, r5 and r7 are actually pushed before the rest), and other components (stack folding recently) often forget to deal with the extra complexity coming from the different order, leading to miscompiles. Finally, we warn about our own code in -no-integrated-as mode without this, which is really not a good idea. llvm-svn: 286866
* [PPC] Add intrinsic mapping to the xscvhpsp instructionSean Fertile2016-11-141-0/+9
| | | | | | | | | add an intrinsic to expose the 'VSX Scalar Convert Half-Precision to Single-Precision' instruction. Differential review: https://reviews.llvm.org/D26536 llvm-svn: 286862
* AMDGPU/SI: Support data types other than V4f32 in image intrinsicsChangpeng Fang2016-11-142-63/+73
| | | | | | | | | | | | | | | | Summary: Extend image intrinsics to support data types of V1F32 and V2F32. TODO: we should define a mapping table to change the opcode for data type of V2F32 but just one channel is active, even though such case should be very rare. Reviewers: tstellarAMD Differential Revision: http://reviews.llvm.org/D26472 llvm-svn: 286860
* Use _Unwind_Backtrace on Apple platforms.Bob Wilson2016-11-141-1/+1
| | | | | | | | | | | | | Darwin's backtrace() function does not work with sigaltstack (which was enabled when available with r270395) — it does a sanity check to make sure that the current frame pointer is within the expected stack area (which it is not when using an alternate stack) and gives up otherwise. The alternative of _Unwind_Backtrace seems to work fine on macOS, so use that when backtrace() fails. Note that we then use backtrace_symbols_fd() with the addresses from _Unwind_Backtrace, but I’ve tested that and it also seems to work fine. rdar://problem/28646552 llvm-svn: 286851
* TypoAdrian Prantl2016-11-141-1/+1
| | | | llvm-svn: 286845
* Restore "[ThinLTO] Prevent exporting of locals used/defined in module level asm"Teresa Johnson2016-11-144-9/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This restores the rest of r286297 (part was restored in r286475). Specifically, it restores the part requiring adding a dependency from the Analysis to Object library (downstream use changed to correctly model split BitReader vs BitWriter libraries). Original description of this part of patch follows: Module level asm may also contain defs of values. We need to prevent export of any refs to local values defined in module level asm (e.g. a ref in normal IR), since that also requires renaming/promotion of the local. To do that, the summary index builder looks at all values in the module level asm string that are not marked Weak or Global, which is exactly the set of locals that are defined. A summary is created for each of these local defs and flagged as NoRename. This required adding handling to the BitcodeWriter to look at GV declarations to see if they have a summary (rather than skipping them all). Finally, added an assert to IRObjectFile::CollectAsmUndefinedRefs to ensure that an MCAsmParser is available, otherwise the module asm parse would silently fail. Initialized the asm parser in the opt tool for use in testing this fix. Fixes PR30610. llvm-svn: 286844
* [Hexagon] Remove unsafe load instructions that affect Stack Slot ColoringSumanth Gundapaneni2016-11-141-12/+0
| | | | | | | | | | | | | | | | | The Stack slot coloring pass removes a store that is followed by a load that deal with the same stack slot. The function isLoadFromStackSlot is supposed to consider the loads that have no side-effects. This patch fixed the issue by removing the unsafe loads from this function Eg: %vreg0<def> = L2_loadruh_io <fi#15>, 0 S2_storeri_io <fi#15>, 0, %vreg0 In this case, we load an unsigned extended half word and store this in to the same stack slot. The Stack slot coloring pass considers safe to remove the store. This patch marked all the non-vector byte and half word loads as unsafe. llvm-svn: 286843
* [ThinLTO] Make inline assembly handling more efficient in summaryTeresa Johnson2016-11-144-9/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The change in r285513 to prevent exporting of locals used in inline asm added all locals in the llvm.used set to the reference set of functions containing inline asm. Since these locals were marked NoRename, this automatically prevented importing of the function. Unfortunately, this caused an explosion in the summary reference lists in some cases. In my particular example, it happened for a large protocol buffer generated C++ file, where many of the generated functions contained an inline asm call. It was exacerbated when doing a ThinLTO PGO instrumentation build, where the PGO instrumentation included thousands of private __profd_* values that were added to llvm.used. We really only need to include a single llvm.used local (NoRename) value in the reference list of a function containing inline asm to block it being imported. However, it seems cleaner to add a flag to the summary that explicitly describes this situation, which is what this patch does. Reviewers: mehdi_amini Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D26402 llvm-svn: 286840
* [CostModel][X86] Added mul costs for vXi8 vectorsSimon Pilgrim2016-11-141-5/+21
| | | | | | More realistic v16i8/v32i8/v64i8 MUL costs - we have to extend to vXi16, use PMULLW and then truncate the result llvm-svn: 286838
* [X86][AVX] Fixed v16i16/v32i8 ADD/SUB costs on AVX1 subtargetsSimon Pilgrim2016-11-141-0/+4
| | | | | | | | Add explicit v16i16/v32i8 ADD/SUB costs, matching the costs of v4i64/v8i32 - they were missing for some reason. This has side effects on the LV max bandwidth tests (AVX1 now prefers 128-bit vectors vs AVX2 which still prefers 256-bit) llvm-svn: 286832
* [PPC] add intrinsics for vec extract exp/significand and vec test data class.Sean Fertile2016-11-141-6/+18
| | | | | | Differential Revision: https://reviews.llvm.org/D26272 llvm-svn: 286829
* Remove redundant condition (PR28352) NFCI.Simon Pilgrim2016-11-141-2/+3
| | | | | | We were already testing is the op was not a leaf, so need to then test if it was a leaf (added it to the assert instead). llvm-svn: 286817
* [InlineCost] Remove skew when calculating call costsJames Molloy2016-11-141-1/+3
| | | | | | | | | | | | | | | When calculating the cost of a call instruction we were applying a heuristic penalty as well as the cost of the instruction itself. However, when calculating the benefit from inlining we weren't discounting the equivalent penalty for the call instruction that would be removed! This caused skew in the calculation and meant we wouldn't inline in the following, trivial case: int g() { h(); } int f() { g(); } llvm-svn: 286814
* Remove redundant condition (PR28800) NFCI.Simon Pilgrim2016-11-141-2/+1
| | | | | | | | | | 'A || (!A && B)' is equivalent to 'A || B': (LoopCycle > DefCycle) || (LoopCycle <= DefCycle && LoopStage <= DefStage) --> (LoopCycle > DefCycle) || (LoopStage <= DefStage) llvm-svn: 286811
* GlobalISel: Fix indentation. NFCDiana Picus2016-11-142-4/+4
| | | | llvm-svn: 286808
* [JumpThreading] Prevent non-deterministic use listsPablo Barrio2016-11-141-8/+7
| | | | | | | | | | | | | | | | | Summary: Unfolding selects was previously done with the help of a vector of pointers that was then sorted to be able to remove duplicates. As this sorting depends on the memory addresses, it was non-deterministic. A SetVector is used now so that duplicates are removed without the need of sorting first. Reviewers: mgrang, efriedma Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D26450 llvm-svn: 286807
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