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authorSimon Pilgrim <llvm-dev@redking.me.uk>2016-11-14 14:45:16 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2016-11-14 14:45:16 +0000
commit27fed8e5d636d67ed5e2dff77705dcae1fcd0b15 (patch)
tree13c14878cb5ff358c251334e2ec8c047ddb6f258 /llvm/lib
parente784395c99db265d8e7d358b1e03b1240abdad72 (diff)
downloadbcm5719-llvm-27fed8e5d636d67ed5e2dff77705dcae1fcd0b15.tar.gz
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[X86][AVX] Fixed v16i16/v32i8 ADD/SUB costs on AVX1 subtargets
Add explicit v16i16/v32i8 ADD/SUB costs, matching the costs of v4i64/v8i32 - they were missing for some reason. This has side effects on the LV max bandwidth tests (AVX1 now prefers 128-bit vectors vs AVX2 which still prefers 256-bit) llvm-svn: 286832
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86TargetTransformInfo.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index 7029a02e682..5b3091eed3c 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -526,6 +526,10 @@ int X86TTIImpl::getArithmeticInstrCost(
// Two ops + 1 extract + 1 insert = 4.
{ ISD::MUL, MVT::v16i16, 4 },
{ ISD::MUL, MVT::v8i32, 4 },
+ { ISD::SUB, MVT::v32i8, 4 },
+ { ISD::ADD, MVT::v32i8, 4 },
+ { ISD::SUB, MVT::v16i16, 4 },
+ { ISD::ADD, MVT::v16i16, 4 },
{ ISD::SUB, MVT::v8i32, 4 },
{ ISD::ADD, MVT::v8i32, 4 },
{ ISD::SUB, MVT::v4i64, 4 },
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