diff options
| author | Sean Fertile <sfertile@ca.ibm.com> | 2016-11-14 14:42:37 +0000 |
|---|---|---|
| committer | Sean Fertile <sfertile@ca.ibm.com> | 2016-11-14 14:42:37 +0000 |
| commit | adda5b2d2b4785a1d76334532845ad14c339921f (patch) | |
| tree | 9369ffeb94484f94c9ec6de5d69196870e846e64 /llvm/lib | |
| parent | c0681d2b0e76fe49f541f31b95cc235c984c68ff (diff) | |
| download | bcm5719-llvm-adda5b2d2b4785a1d76334532845ad14c339921f.tar.gz bcm5719-llvm-adda5b2d2b4785a1d76334532845ad14c339921f.zip | |
[PPC] add intrinsics for vec extract exp/significand and vec test data class.
Differential Revision: https://reviews.llvm.org/D26272
llvm-svn: 286829
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrVSX.td | 24 |
1 files changed, 18 insertions, 6 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td index e9a06f3a381..cdf6a24b725 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td +++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td @@ -2206,10 +2206,18 @@ let AddedComplexity = 400, Predicates = [HasP9Vector] in { IIC_VecFP, [(set v4f32: $XT,(int_ppc_vsx_xviexpsp v4i32:$XA, v4i32:$XB))]>; // Vector Extract Exponent/Significand DP/SP - def XVXEXPDP : XX2_XT6_XO5_XB6<60, 0, 475, "xvxexpdp", vsrc, []>; - def XVXEXPSP : XX2_XT6_XO5_XB6<60, 8, 475, "xvxexpsp", vsrc, []>; - def XVXSIGDP : XX2_XT6_XO5_XB6<60, 1, 475, "xvxsigdp", vsrc, []>; - def XVXSIGSP : XX2_XT6_XO5_XB6<60, 9, 475, "xvxsigsp", vsrc, []>; + def XVXEXPDP : XX2_XT6_XO5_XB6<60, 0, 475, "xvxexpdp", vsrc, + [(set v2i64: $XT, + (int_ppc_vsx_xvxexpdp v2f64:$XB))]>; + def XVXEXPSP : XX2_XT6_XO5_XB6<60, 8, 475, "xvxexpsp", vsrc, + [(set v4i32: $XT, + (int_ppc_vsx_xvxexpsp v4f32:$XB))]>; + def XVXSIGDP : XX2_XT6_XO5_XB6<60, 1, 475, "xvxsigdp", vsrc, + [(set v2i64: $XT, + (int_ppc_vsx_xvxsigdp v2f64:$XB))]>; + def XVXSIGSP : XX2_XT6_XO5_XB6<60, 9, 475, "xvxsigsp", vsrc, + [(set v4i32: $XT, + (int_ppc_vsx_xvxsigsp v4f32:$XB))]>; //===--------------------------------------------------------------------===// @@ -2230,10 +2238,14 @@ let AddedComplexity = 400, Predicates = [HasP9Vector] in { let UseVSXReg = 1 in { def XVTSTDCSP : XX2_RD6_DCMX7_RS6<60, 13, 5, (outs vsrc:$XT), (ins u7imm:$DCMX, vsrc:$XB), - "xvtstdcsp $XT, $XB, $DCMX", IIC_VecFP, []>; + "xvtstdcsp $XT, $XB, $DCMX", IIC_VecFP, + [(set v4i32: $XT, + (int_ppc_vsx_xvtstdcsp v4f32:$XB, imm:$DCMX))]>; def XVTSTDCDP : XX2_RD6_DCMX7_RS6<60, 15, 5, (outs vsrc:$XT), (ins u7imm:$DCMX, vsrc:$XB), - "xvtstdcdp $XT, $XB, $DCMX", IIC_VecFP, []>; + "xvtstdcdp $XT, $XB, $DCMX", IIC_VecFP, + [(set v2i64: $XT, + (int_ppc_vsx_xvtstdcdp v2f64:$XB, imm:$DCMX))]>; } // UseVSXReg = 1 //===--------------------------------------------------------------------===// |
