summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
...
* llvm-cov: Moved printing after error checks.Yuchen Wu2013-11-191-6/+8
| | | | llvm-svn: 195153
* reverts 195057 per requestJack Carter2013-11-195-9/+70
| | | | llvm-svn: 195152
* llvm-cov: Added constness property to methods.Yuchen Wu2013-11-191-14/+15
| | | | | | | Added constness to methods that shouldn't modify objects. Replaced operator[] lookup in maps with find() instead. llvm-svn: 195151
* DataLayout: value initialize globals to avoid static construction.Benjamin Kramer2013-11-191-2/+2
| | | | llvm-svn: 195150
* Support multiple COFF sections with the same name but different COMDAT.Rafael Espindola2013-11-194-45/+111
| | | | | | | | | | | | | | | | | | This is the first step to fix pr17918. It extends the .section directive a bit, inspired by what the ELF one looks like. The problem with using linkonce is that given .section foo .linkonce.... .section foo .linkonce we would already have switched sections when getting to .linkonce. The cleanest solution seems to be to add the comdat information in the .section itself. llvm-svn: 195148
* Obvious pasto survived a couple rounds of cleanup.Andrew Trick2013-11-191-2/+1
| | | | | | Caught by Aaron Ballman. llvm-svn: 195138
* YAML I/O - Added default trait support for std:string. Making another ↵John Thompson2013-11-191-0/+11
| | | | | | attempt at this, this time doing a clean build on Linux, and running the LLVM, clang, and extra tests, to try to make sure there's no problems. llvm-svn: 195134
* Fix assembly operands for the SSE2 cvtsd2ss instruction.Cameron McInally2013-11-191-2/+2
| | | | llvm-svn: 195129
* [Mips] Adjust float ABI settings in case of MIPS16 mode.Simon Atanasyan2013-11-191-0/+10
| | | | | | | | | | | Hard float for mips16 means essentially to compile as soft float but to use a runtime library for soft float that is written with native mips32 floating point instructions (those runtime routines run in mips32 hard float mode). The patch reviewed by Reed Kotler. llvm-svn: 195123
* Formatting and 80-col.Eric Christopher2013-11-194-15/+21
| | | | llvm-svn: 195122
* Fix comment.Eric Christopher2013-11-191-1/+2
| | | | llvm-svn: 195121
* Refactor the section emission code to remove duplicates now thatEric Christopher2013-11-191-39/+15
| | | | | | | we can emit various sections in any order. No functional change. llvm-svn: 195120
* Reformat file.Eric Christopher2013-11-191-249/+283
| | | | llvm-svn: 195119
* Fix an issue where SROA computed different results based on the relativeChandler Carruth2013-11-191-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | order of slices of the alloca which have exactly the same size and other properties. This was found by a perniciously unstable sort implementation used to flush out buggy uses of the algorithm. The fundamental idea is that findCommonType should return the best common type it can find across all of the slices in the range. There were two bugs here previously: 1) We would accept an integer type smaller than a byte-width multiple, and if there were different bit-width integer types, we would accept the first one. This caused an actual failure in the testcase updated here when the sort order changed. 2) If we found a bad combination of types or a non-load, non-store use before an integer typed load or store we would bail, but if we found the integere typed load or store, we would use it. The correct behavior is to always use an integer typed operation which covers the partition if one exists. While a clever debugging sort algorithm found problem #1 in our existing test cases, I have no useful test case ideas for #2. I spotted in by inspection when looking at this code. llvm-svn: 195118
* Add support for software expansion of 64-bit integer division instructions.Michael Ilseman2013-11-191-45/+199
| | | | | | Patch by Dmitri Shtilman! llvm-svn: 195116
* Fix patchpoint comments.Andrew Trick2013-11-191-1/+2
| | | | llvm-svn: 195103
* Use symbolic operands in the patchpoint folding routine and fix a spilling bug.Andrew Trick2013-11-191-8/+6
| | | | | | Fixes <rdar://15487687> [JS] AnyRegCC argument ends up being spilled llvm-svn: 195094
* Add an abstraction to handle patchpoint operands.Andrew Trick2013-11-192-67/+101
| | | | | | | Hard-coded operand indices were scattered throughout lowering stages and layers. It was super bug prone. llvm-svn: 195093
* Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.Hao Liu2013-11-199-191/+1840
| | | | llvm-svn: 195078
* Remove unused special member functions and reformat.Eric Christopher2013-11-192-14/+3
| | | | llvm-svn: 195077
* Fix previous commit and fully remove variable.Eric Christopher2013-11-193-5/+3
| | | | llvm-svn: 195076
* Remove unused variable.Eric Christopher2013-11-191-1/+0
| | | | llvm-svn: 195075
* Implement AArch64 SISD intrinsics for vget_high and vget_low.Jiangning Liu2013-11-191-4/+33
| | | | llvm-svn: 195074
* implement MC layer of AArch64 neon instruction PMULL and PMULL2 with 128 bit ↵Kevin Qin2013-11-192-0/+12
| | | | | | integer. llvm-svn: 195072
* Add predicate for AArch64 crypto instructions.Jiangning Liu2013-11-191-1/+8
| | | | llvm-svn: 195071
* [Mips] Support for MicroMips STO refactoring.Jack Carter2013-11-194-58/+9
| | | | | | | | | | | | | | | | No true functional changes. Change the "hack" name of emitMipsHackSTOCG to emitSymSTO. Remove demonstration code in AsmParser for emitMipsHackSTOCG and emitMipsHackELFFlags. The STO field is in an ELF symbol and is not an explicit directive. That said, we are missing the compliment call in AsmParser and that will need to be addressed soon. XFAIL dummy tests for emitMipsHackELFFlags and emitMipsHackELFFlags. These will built out with following patches. llvm-svn: 195067
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-1975-57/+256
| | | | | | | | | | | | This patch removes most of the trivial cases of weak vtables by pinning them to a single object file. The memory leaks in this version have been fixed. Thanks Alexey for pointing them out. Differential Revision: http://llvm-reviews.chandlerc.com/D2068 Reviewed by Andy llvm-svn: 195064
* DwarfDebug: Move trailing else to the same line as prior closing braceDavid Blaikie2013-11-181-4/+2
| | | | llvm-svn: 195060
* DwarfDebug: Remove some more redundant explicit constructions.David Blaikie2013-11-181-4/+3
| | | | llvm-svn: 195059
* [Mips] MipsTargetStreamer refactoring.Jack Carter2013-11-184-64/+92
| | | | | | No functionality changes. llvm-svn: 195057
* DebugInfo: Simplify a few more explicit constructions, underconstrained ↵David Blaikie2013-11-182-25/+22
| | | | | | types, and make DIType(MDNode*) explicit like all the other DI* node ctors. llvm-svn: 195055
* Revert "COFF: Emit all MCSymbols rather than filtering out some of them"Reid Kleckner2013-11-182-2/+20
| | | | | | | | This reverts commit r190888, to fix PR17967. The original change wasn't the right way to get @feat.00 into the object file. The right fix is to make @feat.00 be a global symbol. llvm-svn: 195053
* Debug info: Let LowerDbgDeclare perfom the dbg.declare -> dbg.valueAdrian Prantl2013-11-181-1/+5
| | | | | | | | | | lowering only for load/stores to scalar allocas. The resulting values confuse the backend and don't add anything because we can describe array-allocas with a dbg.declare intrinsic just fine. rdar://problem/15464571 llvm-svn: 195052
* The 'optnone' attribute means don't inline anything into this functionPaul Robinson2013-11-182-3/+7
| | | | | | | | | | (except functions marked always_inline). Functions with 'optnone' must also have 'noinline' so they don't get inlined into any other function. Based on work by Andrea Di Biagio. llvm-svn: 195046
* R600/SI: Fix moveToVALU when the first operand is VSrc.Matt Arsenault2013-11-182-2/+4
| | | | | | | Moving into a VSrc doesn't always work, since it could be replaced with an SGPR later. llvm-svn: 195042
* R600/SI: Fix multiple SGPR reads when using VCC.Matt Arsenault2013-11-181-0/+18
| | | | | | | No other SGPR operands are allowed, so if VCC is used, move the other to a VGPR. llvm-svn: 195041
* R600/SI: Implement add i64, but do not yet enable.Matt Arsenault2013-11-182-0/+29
| | | | | | | | Test doesn't actually check the output. I need to fix add i64 being matched for the addressing calculations. llvm-svn: 195040
* R600/SI: Specify SSrc operandsMatt Arsenault2013-11-181-2/+2
| | | | llvm-svn: 195039
* R600/SI: addc / adde i32 are legalMatt Arsenault2013-11-181-0/+2
| | | | llvm-svn: 195038
* R600/SI: Match addc to S_ADD_U32.Matt Arsenault2013-11-181-0/+7
| | | | | | The carry always goes to SCC. llvm-svn: 195037
* R600/SI: Match adde/sube to S_ADDC_U32/S_SUBB_U32Matt Arsenault2013-11-181-2/+4
| | | | llvm-svn: 195036
* R600/SI: Specify S_ADD/S_SUB set SCC and add is commutableMatt Arsenault2013-11-181-1/+13
| | | | llvm-svn: 195035
* R600/SI: Move patterns to match add / sub to scalar instructionsMatt Arsenault2013-11-182-10/+16
| | | | llvm-svn: 195034
* R600/SI: Fix extra defs of VCC / SCC.Matt Arsenault2013-11-181-4/+15
| | | | | | | When replacing scalar operations with vector, the wrong implicit output register was used. llvm-svn: 195033
* R600: Enable the IR structurizer by defaultTom Stellard2013-11-183-6/+5
| | | | llvm-svn: 195031
* R600: Fix a crash in the AMDILCFGStrucurizerTom Stellard2013-11-181-6/+7
| | | | | | | The ifPatternMatch() function was not correctly reporting the number of matches in some cases. llvm-svn: 195030
* R600: Add a SubtargetFeatture for disabling the ifcvt pass.Tom Stellard2013-11-184-1/+14
| | | | | | This is useful when writing test cases for the AMDIL structurizer. llvm-svn: 195029
* R600: Use lower-case for EnableIRStructurizer featureTom Stellard2013-11-181-1/+1
| | | | | | | llc converts all values passed to -mattr= to lowercase, so this enables us to toggle this feature when using llc. llvm-svn: 195028
* R600/SI: Fix illegal VGPR->SGPR copy inside of loopTom Stellard2013-11-181-2/+1
| | | | llvm-svn: 195026
* R600/SI: Fix another case of illegal VGPR->SGPR copyTom Stellard2013-11-181-3/+2
| | | | llvm-svn: 195025
OpenPOWER on IntegriCloud