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authorCameron McInally <cameron.mcinally@nyu.edu>2013-11-19 14:36:00 +0000
committerCameron McInally <cameron.mcinally@nyu.edu>2013-11-19 14:36:00 +0000
commitd1cd0be6f38411c89ea97954e6151f248136c460 (patch)
tree4d025735e8859cd514926f68c00eb84c95955cb9 /llvm/lib
parentc302161f70987de4ce6d6b9095bddc532ed9117b (diff)
downloadbcm5719-llvm-d1cd0be6f38411c89ea97954e6151f248136c460.tar.gz
bcm5719-llvm-d1cd0be6f38411c89ea97954e6151f248136c460.zip
Fix assembly operands for the SSE2 cvtsd2ss instruction.
llvm-svn: 195129
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86InstrSSE.td4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td
index 3395b6231e3..a5debc02569 100644
--- a/llvm/lib/Target/X86/X86InstrSSE.td
+++ b/llvm/lib/Target/X86/X86InstrSSE.td
@@ -1810,14 +1810,14 @@ def Int_VCVTSD2SSrm: I<0x5A, MRMSrcReg,
let Constraints = "$src1 = $dst" in {
def Int_CVTSD2SSrr: I<0x5A, MRMSrcReg,
(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
- "cvtsd2ss\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+ "cvtsd2ss\t{$src2, $dst|$dst, $src2}",
[(set VR128:$dst,
(int_x86_sse2_cvtsd2ss VR128:$src1, VR128:$src2))],
IIC_SSE_CVT_Scalar_RR>, XD, Requires<[UseSSE2]>,
Sched<[WriteCvtF2F]>;
def Int_CVTSD2SSrm: I<0x5A, MRMSrcReg,
(outs VR128:$dst), (ins VR128:$src1, sdmem:$src2),
- "cvtsd2ss\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+ "cvtsd2ss\t{$src2, $dst|$dst, $src2}",
[(set VR128:$dst, (int_x86_sse2_cvtsd2ss
VR128:$src1, sse_load_f64:$src2))],
IIC_SSE_CVT_Scalar_RM>, XD, Requires<[UseSSE2]>,
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