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* Get the register and count from the register list operands.Bill Wendling2010-11-081-8/+5
| | | | llvm-svn: 118458
* reglist has two operands.Bill Wendling2010-11-081-0/+1
| | | | llvm-svn: 118457
* The "addRegListOperands()" function returns the start register and the totalBill Wendling2010-11-081-15/+21
| | | | | | number of registers in the list. llvm-svn: 118456
* Add support for ARM's specialized vector-compare-against-zero instructions.Owen Anderson2010-11-083-24/+68
| | | | llvm-svn: 118453
* Initial support for Mips32 and Mips32r2. Patch contributed by Akira Hatanaka ↵Bruno Cardoso Lopes2010-11-083-12/+22
| | | | | | (ahatanaka@mips.com) llvm-svn: 118447
* Add "write back" bit encoding.Bill Wendling2010-11-081-8/+16
| | | | llvm-svn: 118446
* Fix PR8211Bruno Cardoso Lopes2010-11-081-0/+6
| | | | llvm-svn: 118445
* Remove contributor names as per coding statndard.Michael J. Spencer2010-11-081-3/+0
| | | | llvm-svn: 118442
* Re-introduce the MaxLookup limit to BasicAliasAnalysis'Dan Gohman2010-11-081-2/+8
| | | | | | | pointsToConstantMemory code to guard against possible compile time slowdowns. llvm-svn: 118440
* Adding working version of assembly parser for the MBlaze backendWesley Peck2010-11-0825-810/+498
| | | | | | Major cleanup of whitespace and formatting issues in MBlaze backend llvm-svn: 118434
* Fix a thinko that Duncan spotted.Dan Gohman2010-11-081-1/+1
| | | | llvm-svn: 118430
* Revert 118422 in search of bot verdancy.Dale Johannesen2010-11-082-78/+10
| | | | llvm-svn: 118429
* Adds support for spilling previously allocated live intervals toAndrew Trick2010-11-084-88/+207
| | | | | | | | | handle cases in which a register is unavailable for spill code. Adds LiveIntervalUnion::extract. While processing interferences on a live virtual register, reuses the same Query object for each physcial reg. llvm-svn: 118423
* Support -mcpu=cortex-a8 in ARM attributes - Has Fixme. 1 Test modified.Jason W Kim2010-11-082-10/+78
| | | | llvm-svn: 118422
* Fix typo.Daniel Dunbar2010-11-081-1/+1
| | | | llvm-svn: 118421
* Make FunctionAttrs TBAA-aware.Dan Gohman2010-11-081-12/+24
| | | | llvm-svn: 118417
* Implement getModRefBehavior for TypeBasedAliasAnalysis.Dan Gohman2010-11-081-0/+23
| | | | llvm-svn: 118416
* Complete listing of ARM/MC/ELF relocation enumsJason W Kim2010-11-081-3/+134
| | | | llvm-svn: 118413
* Extend the AliasAnalysis::pointsToConstantMemory interface to allow itDan Gohman2010-11-087-75/+76
| | | | | | | | | | | | to optionally look for constant or local (alloca) memory. Teach BasicAliasAnalysis::pointsToConstantMemory to look through Select and Phi nodes, and to support looking for local memory. Remove FunctionAttrs' PointsToLocalOrConstantMemory function, now that AliasAnalysis knows all the tricks that it knew. llvm-svn: 118412
* Delete getIntrinsicModRefBehavior. Clients can just use the normalDan Gohman2010-11-081-7/+0
| | | | | | | getModRefBehavior now, since it now understands intrinsics as well as normal functions. llvm-svn: 118411
* Make FunctionAttrs use AliasAnalysis::getModRefBehavior, now that itDan Gohman2010-11-081-18/+33
| | | | | | knows about intrinsic functions. llvm-svn: 118410
* Teach BasicAliasAnalysis::getModRefBehavior(const Function *F)Dan Gohman2010-11-081-3/+11
| | | | | | to analyze intrinsic functions. llvm-svn: 118409
* Add generating function declaration for PTXChe-Liang Chiou2010-11-082-11/+129
| | | | llvm-svn: 118398
* Add physical register counting functionsChe-Liang Chiou2010-11-086-0/+176
| | | | llvm-svn: 118397
* Add a dummy PTXMCAsmStreamer classChe-Liang Chiou2010-11-084-0/+588
| | | | llvm-svn: 118396
* Set default flags for .rodata.Rafael Espindola2010-11-081-1/+3
| | | | llvm-svn: 118395
* Add registry hook for assembly text outputChe-Liang Chiou2010-11-081-4/+5
| | | | llvm-svn: 118394
* Make RegList an ASM operand so that TableGen will generate code for it. This isBill Wendling2010-11-081-2/+7
| | | | | | an initial implementation and may change once reglists are fully fleshed out. llvm-svn: 118390
* Revert.Bill Wendling2010-11-081-1/+1
| | | | llvm-svn: 118389
* Add simplification of floating point comparisons with the resultDuncan Sands2010-11-071-0/+20
| | | | | | | of a select instruction, the same as already exists for integer comparisons. llvm-svn: 118379
* Fix a README item: when doing a comparison with the resultDuncan Sands2010-11-072-14/+21
| | | | | | | | of a select instruction, see if doing the compare with the true and false values of the select gives the same result. If so, that can be used as the value of the comparison. llvm-svn: 118378
* Speed up AddSectionToTheEnd. It was walking all fragments in all sections.Rafael Espindola2010-11-071-19/+4
| | | | | | | | | | This is really slow with we have 1000s of sections each with a corresponding relocation section. Also, it is only used by the ELF writer to add basic data, so there is no need to force a new layout pass. Should fix PR8563. llvm-svn: 118377
* In this context, a reglist is a reg.Bill Wendling2010-11-071-1/+1
| | | | llvm-svn: 118375
* Fix memory leak in StringRef::edit_distance(). 'Allocated' could be leaked ↵Ted Kremenek2010-11-071-5/+6
| | | | | | on an early return. llvm-svn: 118370
* Add method for checking if a path is a symbolic link.Rafael Espindola2010-11-072-0/+14
| | | | llvm-svn: 118367
* Relax dwarf line fragments. This fixes a crash in the included testcase.Rafael Espindola2010-11-071-13/+18
| | | | llvm-svn: 118365
* implement aliases for div/idiv that have an explicit A register operand,Chris Lattner2010-11-061-0/+20
| | | | | | implementing rdar://8431864 llvm-svn: 118364
* Add support for parsing register lists. We can't use a bitfield to keep track ofBill Wendling2010-11-061-22/+64
| | | | | | | | | | | the registers, because the register numbers may be much greater than the number of bits available in the machine's register. I extracted the register list verification code out of the actual parsing of the registers. This made checking for errors much easier. It also limits the number of warnings that would be emitted for cascading infractions. llvm-svn: 118363
* add aliases for movs between seg registers and mem. There are multipleChris Lattner2010-11-061-0/+5
| | | | | | | | | | different forms of this instruction (movw/movl/movq) which we reported as being ambiguous. Since they all do the same thing, gas just picks the one with the shortest encoding. Follow its lead here. This implements rdar://8208615 llvm-svn: 118362
* move the "sh[lr]d op,op" -> "shld $1, op,op" aliases to the .td file.Chris Lattner2010-11-062-10/+18
| | | | llvm-svn: 118361
* Return the base register of a register list for the "getReg()" method. This isBill Wendling2010-11-061-3/+8
| | | | | | | to satisfy the ClassifyOperand method of the Asm matcher without having to add a RegList type to every back-end. llvm-svn: 118360
* work-in-progressChris Lattner2010-11-061-7/+6
| | | | llvm-svn: 118358
* General cleanup:Bill Wendling2010-11-061-36/+21
| | | | | | | - Make ARMOperand a class so that some things are internal to the class. - Reformatting. llvm-svn: 118357
* go to great lengths to work around a GAS bug my previous patchChris Lattner2010-11-062-8/+8
| | | | | | | | | | | | | | | | exposed: GAS doesn't accept "fcomip %st(1)", it requires "fcomip %st(1), %st(0)" even though st(0) is implicit in all other fp stack instructions. Fortunately, there is an alias for fcomip named "fcompi" and gas does accept the default argument for the alias (boggle!). As such, switch the canonical form of this instruction to "pi" instead of "ip". This makes the code generator and disassembler generate pi, avoiding the gas bug. llvm-svn: 118356
* rework the rotate-by-1 instructions to be defined like theChris Lattner2010-11-063-25/+46
| | | | | | | | | | | | | shift-by-1 instructions, where the asmstring doesn't contain the implicit 1. It turns out that a bunch of these rotate instructions were completely broken because they used 1 instead of $1. This fixes assembly mismatches on "rclb $1, %bl" and friends, where we used to generate the 3 byte form, we now generate the proper 2-byte form. llvm-svn: 118355
* change the fp comparison instructions to not have %st0 explicitlyChris Lattner2010-11-062-12/+9
| | | | | | | listed in its asm string, for consistency with the other similar instructions. llvm-svn: 118354
* move the plethora of fp stack aliases to the .td file.Chris Lattner2010-11-062-39/+48
| | | | llvm-svn: 118353
* add (and document) the ability for alias results to haveChris Lattner2010-11-062-13/+16
| | | | | | | | fixed physical registers. Start moving fp comparison aliases to the .td file (which default to using %st1 if nothing is specified). llvm-svn: 118352
* Add a RegList (register list) object to ARMOperand. It will be used soon to holdBill Wendling2010-11-061-1/+38
| | | | | | | (surprise!) a list of registers. Register lists are consecutive, so we only need to record the start register plus the number of registers. llvm-svn: 118351
* generalize alias support to allow the result of an alias toChris Lattner2010-11-062-21/+20
| | | | | | | add fixed immediate values. Move the aad and aam aliases to use this, and document it. llvm-svn: 118350
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