summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorBill Wendling <isanbard@gmail.com>2010-11-08 23:50:20 +0000
committerBill Wendling <isanbard@gmail.com>2010-11-08 23:50:20 +0000
commitaeead4d1e1c41879e8f3dc630c0f942a3f93d1c4 (patch)
tree540e2ce6931a716930f09fd967151a047a9cfcec /llvm/lib
parent8d2aa03ce1385506ce74d4d0fddafad09a79dc2d (diff)
downloadbcm5719-llvm-aeead4d1e1c41879e8f3dc630c0f942a3f93d1c4.tar.gz
bcm5719-llvm-aeead4d1e1c41879e8f3dc630c0f942a3f93d1c4.zip
reglist has two operands.
llvm-svn: 118457
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/ARMInstrInfo.td1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index 7c7257900fd..0a988138a92 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -278,6 +278,7 @@ def brtarget : Operand<OtherVT>;
// A list of registers separated by comma. Used by load/store multiple.
def reglist : Operand<i32> {
+ int NumOperands = 2;
string EncoderMethod = "getRegisterListOpValue";
let PrintMethod = "printRegisterList";
}
OpenPOWER on IntegriCloud