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| author | Chris Lattner <sabre@nondot.org> | 2010-11-06 21:37:06 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-11-06 21:37:06 +0000 |
| commit | ca7801e472de05e13c8570e706d32a3213d5d0e2 (patch) | |
| tree | 00a4938e18270b0d7570c6f8e3a5fb2eaf56a7c4 /llvm/lib | |
| parent | 64f91b9825f620d62de34d15200d3a69d238759f (diff) | |
| download | bcm5719-llvm-ca7801e472de05e13c8570e706d32a3213d5d0e2.tar.gz bcm5719-llvm-ca7801e472de05e13c8570e706d32a3213d5d0e2.zip | |
go to great lengths to work around a GAS bug my previous patch
exposed:
GAS doesn't accept "fcomip %st(1)", it requires "fcomip %st(1), %st(0)"
even though st(0) is implicit in all other fp stack instructions.
Fortunately, there is an alias for fcomip named "fcompi" and gas does
accept the default argument for the alias (boggle!).
As such, switch the canonical form of this instruction to "pi" instead
of "ip". This makes the code generator and disassembler generate pi,
avoiding the gas bug.
llvm-svn: 118356
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrFPStack.td | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 12 |
2 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/Target/X86/X86InstrFPStack.td b/llvm/lib/Target/X86/X86InstrFPStack.td index ea27e2de1ed..9124f90de55 100644 --- a/llvm/lib/Target/X86/X86InstrFPStack.td +++ b/llvm/lib/Target/X86/X86InstrFPStack.td @@ -586,13 +586,13 @@ def UCOM_FIr : FPI<0xE8, AddRegFrm, // CC = cmp ST(0) with ST(i) "fucomi\t$reg">, DB; def UCOM_FIPr : FPI<0xE8, AddRegFrm, // CC = cmp ST(0) with ST(i), pop (outs), (ins RST:$reg), - "fucomip\t$reg">, DF; + "fucompi\t$reg">, DF; } def COM_FIr : FPI<0xF0, AddRegFrm, (outs), (ins RST:$reg), "fcomi\t$reg">, DB; def COM_FIPr : FPI<0xF0, AddRegFrm, (outs), (ins RST:$reg), - "fcomip\t$reg">, DF; + "fcompi\t$reg">, DF; // Floating point flag ops. let Defs = [AX] in diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 8ae51b29286..18ea78a00ed 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -1319,12 +1319,12 @@ def : MnemonicAlias<"fcmova", "fcmovnbe">; def : MnemonicAlias<"fcmovnae", "fcmovb">; def : MnemonicAlias<"fcmovna", "fcmovbe">; def : MnemonicAlias<"fcmovae", "fcmovnb">; -def : MnemonicAlias<"fcompi", "fcomip">; +def : MnemonicAlias<"fcomip", "fcompi">; def : MnemonicAlias<"fildq", "fildll">; def : MnemonicAlias<"fldcww", "fldcw">; def : MnemonicAlias<"fnstcww", "fnstcw">; def : MnemonicAlias<"fnstsww", "fnstsw">; -def : MnemonicAlias<"fucompi", "fucomip">; +def : MnemonicAlias<"fucomip", "fucompi">; def : MnemonicAlias<"fwait", "wait">; @@ -1387,11 +1387,11 @@ def : InstAlias<"fdivp", (DIVR_FPrST0 ST1)>; def : InstAlias<"fdivrp", (DIV_FPrST0 ST1)>; def : InstAlias<"fxch", (XCH_F ST1)>; def : InstAlias<"fcomi", (COM_FIr ST1)>; -def : InstAlias<"fcomip", (COM_FIPr ST1)>; +def : InstAlias<"fcompi", (COM_FIPr ST1)>; def : InstAlias<"fucom", (UCOM_Fr ST1)>; def : InstAlias<"fucomp", (UCOM_FPr ST1)>; def : InstAlias<"fucomi", (UCOM_FIr ST1)>; -def : InstAlias<"fucomip", (UCOM_FIPr ST1)>; +def : InstAlias<"fucompi", (UCOM_FIPr ST1)>; // Handle fmul/fadd/fsub/fdiv instructions with explicitly written st(0) op. // For example, "fadd %st(4), %st(0)" -> "fadd %st(4)". We also disambiguate @@ -1415,9 +1415,9 @@ defm : FpUnaryAlias<"fdivp", DIVR_FPrST0>; defm : FpUnaryAlias<"fdivr", DIVR_FST0r>; defm : FpUnaryAlias<"fdivrp", DIV_FPrST0>; defm : FpUnaryAlias<"fcomi", COM_FIr>; -defm : FpUnaryAlias<"fcomip", COM_FIPr>; defm : FpUnaryAlias<"fucomi", UCOM_FIr>; -defm : FpUnaryAlias<"fucomip", UCOM_FIPr>; +defm : FpUnaryAlias<"fcompi", COM_FIPr>; +defm : FpUnaryAlias<"fucompi", UCOM_FIPr>; // Handle "f{mulp,addp} st(0), $op" the same as "f{mulp,addp} $op", since they |
