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* Add support for ISD::TRAP to the XCore backendRichard Osborne2008-12-032-1/+16
| | | | llvm-svn: 60479
* Refactor code. No functionality change.Evan Cheng2008-12-031-72/+75
| | | | llvm-svn: 60478
* CC should only be a ConstantSDNode at this point. Just use 'cast' instead of ↵Bill Wendling2008-12-031-9/+9
| | | | | | 'dyn_cast'. llvm-svn: 60477
* Mark x86's V_SET0 and V_SETALLONES with isSimpleLoad, and teach X86'sDan Gohman2008-12-032-5/+37
| | | | | | | | | | | | foldMemoryOperand how to "fold" them, by converting them into constant-pool loads. When they aren't folded, they use xorps/cmpeqd, but for example when register pressure is high, they may now be folded as memory operands, which reduces register pressure. Also, mark V_SET0 isAsCheapAsAMove so that two-address-elimination will remat it instead of copying zeros around (V_SETALLONES was already marked). llvm-svn: 60461
* Add a sanity-check to tablegen to catch the case where isSimpleLoadDan Gohman2008-12-035-4/+14
| | | | | | | | | is set but mayLoad is not set. Fix all the problems this turned up. Change code to not use isSimpleLoad instead of mayLoad unless it really wants isSimpleLoad. llvm-svn: 60459
* Fix a missing #include.Dan Gohman2008-12-031-0/+1
| | | | llvm-svn: 60458
* Fix this comment to reflect that it applies to types otherDan Gohman2008-12-031-1/+1
| | | | | | than just i32. llvm-svn: 60455
* Fix byval arguments in the fastcc calling convention. The fastcc conventionDan Gohman2008-12-031-0/+5
| | | | | | | | | delegates to the regular x86-32 convention which handles byval, but only after it handles a few cases, and it's necessary to handle byval before handling those cases. This fixes PR3122 (and rdar://6400815), llvm-gcc miscompiling LLVM. llvm-svn: 60453
* CellSPU:Scott Michel2008-12-023-45/+179
| | | | | | | | | | - Incorporate Tilmann Scheller's ISD::TRUNCATE custom lowering patch - Update SPU calling convention info, even if it's not used yet (but can be at some point or another) - Ensure that any-extended f32 loads are custom lowered, especially when they're promoted for use in printf. llvm-svn: 60438
* add a noteChris Lattner2008-12-021-0/+21
| | | | llvm-svn: 60404
* - Remove the buggy -X/C -> X/-C transform. This isn't valid when X isn't aBill Wendling2008-12-021-0/+10
| | | | | | | | | constant. If X is a constant, then this is folded elsewhere. - Added a note to Target/README.txt to indicate that we'd like to implement this when we're able. llvm-svn: 60399
* Second stab at target-dependent lowering of everyone's favorite nodes: [SU]ADDOBill Wendling2008-12-022-27/+36
| | | | | | | | | | | - LowerXADDO lowers [SU]ADDO into an ADD with an implicit EFLAGS define. The EFLAGS are fed into a SETCC node which has the conditional COND_O or COND_C, depending on the type of ADDO requested. - LowerBRCOND now recognizes if it's coming from a SETCC node with COND_O or COND_C set. llvm-svn: 60388
* Reapply r60382. This time, don't mark "ADC" nodes with "implicit EFLAGS".Bill Wendling2008-12-023-29/+110
| | | | llvm-svn: 60385
* Temporarily revert r60382. It caused CodeGen/X86/i2k.ll and others to fail.Bill Wendling2008-12-013-135/+40
| | | | llvm-svn: 60383
* - Have "ADD" instructions return an implicit EFLAGS.Bill Wendling2008-12-013-40/+135
| | | | | | - Add support for seto, setno, setc, and setnc instructions. llvm-svn: 60382
* CellSPU:Scott Michel2008-12-013-92/+80
| | | | | | | | | - Fix v2[if]64 vector insertion code before IBM files a bug report. - Ensure that zero (0) offsets relative to $sp don't trip an assert (add $sp, 0 gets legalized to $sp alone, tripping an assert) - Shuffle masks passed to SPUISD::SHUFB are now v16i8 or v4i32 llvm-svn: 60358
* There are no longer any places that require aDuncan Sands2008-12-017-21/+21
| | | | | | | | MERGE_VALUES node with only one operand, so get rid of special code that only existed to handle that possibility. llvm-svn: 60349
* Change the interface to the type legalization methodDuncan Sands2008-12-0114-299/+335
| | | | | | | | | | | ReplaceNodeResults: rather than returning a node which must have the same number of results as the original node (which means mucking around with MERGE_VALUES, and which is also easy to get wrong since SelectionDAG folding may mean you don't get the node you expect), return the results in a vector. llvm-svn: 60348
* Implement ((A|B)&1)|(B&-2) -> (A&1) | B transformation. This also takes care ofBill Wendling2008-12-011-6/+0
| | | | | | permutations of this pattern. llvm-svn: 60312
* Add instruction combining for ((A&~B)|(~A&B)) -> A^B and all permutations.Bill Wendling2008-11-301-6/+0
| | | | llvm-svn: 60291
* Implement (A&((~A)|B)) -> A&B transformation in the instruction combiner. ThisBill Wendling2008-11-301-10/+0
| | | | | | takes care of all permutations of this pattern. llvm-svn: 60290
* A couple small cleanups, plus a new potential optimization.Eli Friedman2008-11-301-3/+29
| | | | llvm-svn: 60286
* Moving potential optimizations out of PR2330 into lib/Target/README.txt. Eli Friedman2008-11-301-0/+262
| | | | | | Hopefully this isn't too much stuff to dump into this file. llvm-svn: 60285
* Add include files needed when building withDuncan Sands2008-11-282-0/+2
| | | | | | gcc 4.4 (due to use of sprintf). llvm-svn: 60209
* Fix build with gcc-4.4: it doesn't like PICStyleDuncan Sands2008-11-283-15/+15
| | | | | | being both a namespace and a variable name. llvm-svn: 60208
* Also update the README.Nick Lewycky2008-11-271-7/+1
| | | | llvm-svn: 60188
* Add a synthetic missed optimization.Nick Lewycky2008-11-271-0/+24
| | | | llvm-svn: 60186
* Comment out code that isn't entirely correct.Bill Wendling2008-11-271-1/+3
| | | | llvm-svn: 60156
* Eliminate a compile time warning.Evan Cheng2008-11-271-1/+1
| | | | llvm-svn: 60145
* On x86 favors folding short immediate into some arithmetic operations (e.g. ↵Evan Cheng2008-11-271-5/+40
| | | | | | | | | | | | | | | add, and, xor, etc.) because materializing an immediate in a register is expensive in turns of code size. e.g. movl 4(%esp), %eax addl $4, %eax is 2 bytes shorter than movl $4, %eax addl 4(%esp), %eax llvm-svn: 60139
* Generate something sensible for an [SU]ADDO op when the overflow/carry flag isBill Wendling2008-11-264-6/+40
| | | | | | | | | | | | | | | the conditional for the BRCOND statement. For instance, it will generate: addl %eax, %ecx jo LOF instead of addl %eax, %ecx ; About 10 instructions to compare the signs of LHS, RHS, and sum. jl LOF llvm-svn: 60123
* Cosmetic.Evan Cheng2008-11-261-2/+2
| | | | llvm-svn: 60110
* Emit declaration for globals and externs.Sanjiv Gupta2008-11-265-38/+120
| | | | | | Custom lower AND, OR, XOR bitwise operations. llvm-svn: 60098
* Fish kill flag annotations in PUSH instructions.Dan Gohman2008-11-262-3/+5
| | | | llvm-svn: 60095
* __fastcall and __stdcall are mingw extensions to gcc for windows. Use theNick Lewycky2008-11-261-2/+2
| | | | | | __attribute__ notation which is supported on more platforms. llvm-svn: 60083
* CellSPU:Scott Michel2008-11-251-24/+2
| | | | | | | | | (a) Remove conditionally removed code in SelectXAddr. Basically, hope for the best that the A-form and D-form address predicates catch everything before the code decides to emit a X-form address. (b) Expand vector store test cases to include the usual suspects. llvm-svn: 60034
* CellSPU: Relax constraints on when to generate a X-form address, evidentlyScott Michel2008-11-251-0/+7
| | | | | | | | they were too tight according to bug 3126. Fix bug 3126. llvm-svn: 60006
* CellSPU: Fix mnemonic typo in pattern; "shlqbyi" -> "shlqby".Scott Michel2008-11-252-1/+3
| | | | llvm-svn: 59998
* - Make lowering of "add with overflow" customizable by back-ends.Bill Wendling2008-11-242-0/+15
| | | | | | | - Mark "add with overflow" as having a custom lowering for X86. Give it a null lowering representation for now. llvm-svn: 59971
* CellSPU:Scott Michel2008-11-241-4/+15
| | | | | | | | | (a) Slight rethink on i64 zero/sign/any extend code - use a shuffle to directly zero-extend i32 to i64, but use rotates and shifts for sign extension. Also ensure unified register consistency. (b) Add new test harness for i64 operations: i64ops.ll llvm-svn: 59970
* CellSPU:Scott Michel2008-11-246-108/+82
| | | | | | | | | | (a) Improve the extract element code: there's no need to do gymnastics with rotates into the preferred slot if a shuffle will do the same thing. (b) Rename a couple of SPUISD pseudo-instructions for readability and better semantic correspondence. (c) Fix i64 sign/any/zero extension lowering. llvm-svn: 59965
* If the type legalizer actually legalized anythingDuncan Sands2008-11-241-2/+2
| | | | | | | | | | | | | (this doesn't happen that often, since most code does not use illegal types) then follow it by a DAG combiner run that is allowed to generate illegal operations but not illegal types. I didn't modify the target combiner code to distinguish like this between illegal operations and illegal types, so it will not produce illegal operations as well as not producing illegal types. llvm-svn: 59960
* Fix comments.Matthijs Kooijman2008-11-241-2/+2
| | | | llvm-svn: 59958
* Move target independent td files from lib/Target/ to include/llvm/Target so ↵Evan Cheng2008-11-2414-1582/+10
| | | | | | they can be distributed along with the header files. llvm-svn: 59953
* Added missing description for -disable-mmx option.Mon P Wang2008-11-241-1/+1
| | | | llvm-svn: 59929
* Rename SetCCResultContents to BooleanContents. InDuncan Sands2008-11-236-6/+6
| | | | | | | practice these booleans are mostly produced by SetCC, however the concept is more general. llvm-svn: 59911
* Added -disable-mmx using a patch from Preston Gurd.Mon P Wang2008-11-231-1/+5
| | | | llvm-svn: 59901
* CellSPU: Fix bug 3056. Varadic extract_element was not implemented (nor was itScott Michel2008-11-225-102/+294
| | | | | | ever conceived to occur). llvm-svn: 59891
* Make a convenient helper for printing offsets.Anton Korobeynikov2008-11-225-33/+11
| | | | llvm-svn: 59872
* CellSPU:Scott Michel2008-11-214-51/+123
| | | | | | | | (a) Fix bgs 3052, 3057 (b) Incorporate Duncan's suggestions re: i1 promotion (c) Indentation updates. llvm-svn: 59790
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