diff options
| author | Scott Michel <scottm@aero.org> | 2008-11-25 00:23:16 +0000 |
|---|---|---|
| committer | Scott Michel <scottm@aero.org> | 2008-11-25 00:23:16 +0000 |
| commit | 524c284aeff6b26246c2b1c15184c5c92a4095a3 (patch) | |
| tree | 4531cc35b3025dcfb217d3976c1904b4b68bf637 /llvm/lib/Target | |
| parent | 5c4cc094981d8524904f5cf8dd599a0ee5d632bf (diff) | |
| download | bcm5719-llvm-524c284aeff6b26246c2b1c15184c5c92a4095a3.tar.gz bcm5719-llvm-524c284aeff6b26246c2b1c15184c5c92a4095a3.zip | |
CellSPU: Fix mnemonic typo in pattern; "shlqbyi" -> "shlqby".
llvm-svn: 59998
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/CellSPU/SPUISelLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/CellSPU/SPUInstrInfo.td | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/CellSPU/SPUISelLowering.cpp b/llvm/lib/Target/CellSPU/SPUISelLowering.cpp index 0b954743984..6e64caecb41 100644 --- a/llvm/lib/Target/CellSPU/SPUISelLowering.cpp +++ b/llvm/lib/Target/CellSPU/SPUISelLowering.cpp @@ -177,7 +177,9 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM) setOperationAction(ISD::SELECT_CC, MVT::i8, Custom); setOperationAction(ISD::SELECT_CC, MVT::i16, Custom); setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); +#if 0 setOperationAction(ISD::SELECT_CC, MVT::i64, Custom); +#endif // SPU has no intrinsics for these particular operations: setOperationAction(ISD::MEMBARRIER, MVT::Other, Expand); diff --git a/llvm/lib/Target/CellSPU/SPUInstrInfo.td b/llvm/lib/Target/CellSPU/SPUInstrInfo.td index 1d7800eafeb..227b6725517 100644 --- a/llvm/lib/Target/CellSPU/SPUInstrInfo.td +++ b/llvm/lib/Target/CellSPU/SPUInstrInfo.td @@ -1982,7 +1982,7 @@ defm SHLQBII : ShiftLeftQuadByBitsImm; // not by bits. See notes above on SHLQBI. class SHLQBYInst<dag OOL, dag IOL, list<dag> pattern>: - RI7Form<0b11111011100, OOL, IOL, "shlqbyi\t$rT, $rA, $rB", + RI7Form<0b11111011100, OOL, IOL, "shlqby\t$rT, $rA, $rB", RotateShift, pattern>; class SHLQBYVecInst<ValueType vectype>: |
